openbcm

commit 972a462e367ed66fc81f866a9b16235a59cd3dec
parent 55b6c4a5d22e15c70032eb004751fe19c8104175
Author: Broadcom SDK Release <sdk.releases@broadcom.com>
Date:   Thu, 16 Jan 2020 15:24:25 -0800

SDK-176461: Implemented SOC function to disable PCIE hotswap manager. This fu...

Devices: 56870_A0,56980_A0
Module: PCIe Firmware

Symptom:
Implement Option to Disable Hotswap Manager for CMIC-X devices

Implemented SOC function to disable PCIE hotswap manager. This function
can be invoked using BCM switch control API.

Diffstat:
M
sdk-6.5.16/include/bcm/switch.h
 | 
8
++++++--
M
sdk-6.5.16/include/soc/drv.h
 | 
1
+
M
sdk-6.5.16/src/appl/diag/cint/bcm_cint_data.c
 | 
1
+
M
sdk-6.5.16/src/bcm/esw/switch.c
 | 
31
+++++++++++++++++++++++++++++++
M
sdk-6.5.16/src/soc/esw/drv.c
 | 
43
+++++++++++++++++++++++++++++++++++++++++++

5 files changed, 82 insertions(+), 2 deletions(-)
diff --git a/sdk-6.5.16/include/bcm/switch.h b/sdk-6.5.16/include/bcm/switch.h
@@ -2518,7 +2518,10 @@ typedef enum bcm_switch_control_e {
                                            large scale multicast NAT updates. */
     bcmSwitchL2ChangeFieldsEnable = 1214, /* Enable L2 Change Fields for VFI
                                            switched packets. */
-    bcmSwitch__Count = 1215             /* Must be last.  Not a usable value. */
+    bcmSwitchPcieHotSwapDisable = 1215, /* When set value=1 PCIE Hot swap
+                                           manager is disabled. Applicable for
+                                           CMICX based devices only */
+    bcmSwitch__Count = 1216             /* Must be last.  Not a usable value. */
 } bcm_switch_control_t;
 
 #define BCM_SWITCH_CONTROL_STR \
@@ -3736,7 +3739,8 @@ typedef enum bcm_switch_control_e {
     "L3McLargeNATRewriteType0", \
     "L3McLargeNATRewriteType1", \
     "L3McLargeNATRewriteType2", \
-    "L2ChangeFieldsEnable" 
+    "L2ChangeFieldsEnable", \
+    "PcieHotSwapDisable" 
 
 /* ecmp hash bit count enums */
 typedef enum bcm_switch_ecmp_hash_bit_count_e {
diff --git a/sdk-6.5.16/include/soc/drv.h b/sdk-6.5.16/include/soc/drv.h
@@ -6430,6 +6430,7 @@ extern int soc_pipe_port_get(int unit, uint32 port_type, int pipe,
 extern int soc_get_reg_first_block_id(int unit,soc_reg_t reg,uint32 *block);
 #endif /* defined(BCM_SAND_SUPPORT) */
 
+extern int soc_pcie_hot_swap_disable(int unit);
 
 #ifdef INCLUDE_MACSEC
 #endif     /* INCLUDE_MACSEC */
diff --git a/sdk-6.5.16/src/appl/diag/cint/bcm_cint_data.c b/sdk-6.5.16/src/appl/diag/cint/bcm_cint_data.c
@@ -123714,6 +123714,7 @@ static cint_enum_map_t __cint_enum_map__bcm_switch_control_t[] =
     { "bcmSwitchL3McLargeNATRewriteType1", bcmSwitchL3McLargeNATRewriteType1 },
     { "bcmSwitchL3McLargeNATRewriteType2", bcmSwitchL3McLargeNATRewriteType2 },
     { "bcmSwitchL2ChangeFieldsEnable", bcmSwitchL2ChangeFieldsEnable },
+    { "bcmSwitchPcieHotSwapDisable", bcmSwitchPcieHotSwapDisable },
     { "bcmSwitch__Count", bcmSwitch__Count },
     { NULL }
 };
diff --git a/sdk-6.5.16/src/bcm/esw/switch.c b/sdk-6.5.16/src/bcm/esw/switch.c
@@ -22359,6 +22359,15 @@ defined(BCM_TRIDENT3_SUPPORT))
         }
 #endif
 
+    case bcmSwitchPcieHotSwapDisable:
+        if (arg == 1) {
+            rv = soc_pcie_hot_swap_disable(unit);
+        } else {
+            rv = BCM_E_PARAM;
+        }
+        return rv;
+    break;
+
     default:
         break;
     }
@@ -26186,6 +26195,28 @@ defined(BCM_TRIDENT3_SUPPORT))
         }
 #endif
 
+    case bcmSwitchPcieHotSwapDisable:
+#ifdef BCM_CMICX_SUPPORT
+    if (soc_feature(unit, soc_feature_cmicx) &&
+            (soc_cm_get_bus_type(unit) & SOC_PCI_DEV_TYPE)) {
+        uint32  rval;
+        if (SOC_REG_IS_VALID(unit, PAXB_0_PAXB_HOTSWAP_CTRLr) &&
+            SOC_REG_FIELD_VALID(unit, PAXB_0_PAXB_HOTSWAP_CTRLr, ENABLEf)) {
+            SOC_IF_ERROR_RETURN(READ_PAXB_0_PAXB_HOTSWAP_CTRLr(unit, &rval));
+            *arg = soc_reg_field_get(
+                       unit, PAXB_0_PAXB_HOTSWAP_CTRLr, rval, ENABLEf);
+            *arg ^= 1;
+            return BCM_E_NONE;
+        } else {
+            return BCM_E_UNAVAIL;
+        }
+    } else
+#endif
+    {
+        return BCM_E_UNAVAIL;
+    }
+    break;
+
     default:
         break;
     }
diff --git a/sdk-6.5.16/src/soc/esw/drv.c b/sdk-6.5.16/src/soc/esw/drv.c
@@ -8976,6 +8976,49 @@ soc_pci_hotswap_recover(int unit)
 
 /*
  * Function:
+ *      soc_pcie_hot_swap_disable
+ * Purpose:
+ *      Disable hot swap manager.
+ * Parameters:
+ *      unit - unit #
+ * Returns:
+ *      SOC_E_XXX
+*/
+int
+soc_pcie_hot_swap_disable(int unit)
+{
+    int rv = SOC_E_UNAVAIL;
+
+#ifdef BCM_CMICX_SUPPORT
+    uint32  rval;
+    if (soc_feature(unit, soc_feature_cmicx) &&
+            (soc_cm_get_bus_type(unit) & SOC_PCI_DEV_TYPE)) {
+        /* Disable Hot Swap manager*/
+        if (SOC_REG_IS_VALID(unit, PAXB_0_PAXB_HOTSWAP_CTRLr) &&
+            SOC_REG_FIELD_VALID(unit, PAXB_0_PAXB_HOTSWAP_CTRLr, ENABLEf)) {
+            SOC_IF_ERROR_RETURN(READ_PAXB_0_PAXB_HOTSWAP_CTRLr(unit, &rval));
+            soc_reg_field_set(unit, PAXB_0_PAXB_HOTSWAP_CTRLr, &rval, ENABLEf, 0);
+            SOC_IF_ERROR_RETURN(
+                WRITE_PAXB_0_PAXB_HOTSWAP_CTRLr(unit, rval));
+            /* Enable reset to propogate to paxb data path logic when pcie link is down. */
+            SOC_IF_ERROR_RETURN
+                (READ_PAXB_0_RESET_ENABLE_IN_PCIE_LINK_DOWNr(unit, &rval));
+            soc_reg_field_set(unit, PAXB_0_RESET_ENABLE_IN_PCIE_LINK_DOWNr, &rval,
+                              EN_PAXB_RESETf, 1);
+            SOC_IF_ERROR_RETURN
+                (WRITE_PAXB_0_RESET_ENABLE_IN_PCIE_LINK_DOWNr(unit, rval));
+            LOG_INFO(BSL_LS_SOC_COMMON,
+                (BSL_META_U(unit, "PCIE HOTSWAP Manager is disabled!\n")));
+            rv = SOC_E_NONE;
+        }
+    }
+#endif
+    return rv;
+}
+
+
+/*
+ * Function:
  *      soc_do_init
  * Purpose:
  *      Optionally reset, and initialize a StrataSwitch.