commit 584e5ab9115028bdc14d852354d8240aa39fdcb3 parent 972a462e367ed66fc81f866a9b16235a59cd3dec Author: Broadcom SDK Release <sdk.releases@broadcom.com> Date: Thu, 16 Jan 2020 15:50:22 -0800 SDK-175986: A config property "mmu_pfc_group_optimized_mtu_size" added to to... Devices: 56980_A0,56980_B0 Module: MMU Symptom: A config property needed to specify the EB MTU size (e.g. mmu_pfc_group_optimized_mtu_size=1024), and this can not be changed during runtime. A config property "mmu_pfc_group_optimized_mtu_size" added to to specify the EB MTU size (e.g. mmu_pfc_group_optimized_mtu_size=1024), and this can not be changed during runtime. If this config property is not specified, then default MTU size of 9K will be used. Diffstat:
8 files changed, 42 insertions(+), 6 deletions(-)
diff --git a/sdk-6.5.16/include/soc/property.h b/sdk-6.5.16/include/soc/property.h @@ -10113,6 +10113,9 @@ /* PCIE hot swap timeout in microseconds for IDLE/READY condition */ #define spn_PCIE_HOT_SWAP_TIMEOUT_USEC "pcie_hot_swap_timeout_usec" +/* Specify the maximum MTU size for PFC optimized groups. */ +#define spn_MMU_PFC_GROUP_OPTIMIZED_MTU_SIZE "mmu_pfc_group_optimized_mtu_size" + #define BCM_SOC_PROP_NAMES_INITIALIZER \ { \ "10g_is_cx4", \ @@ -11408,6 +11411,7 @@ "mmu_overcommit", \ "mmu_overcommit_stack", \ "mmu_pfc_class_profile", \ + "mmu_pfc_group_optimized_mtu_size", \ "mmu_pll_lock_tests", \ "mmu_port_num_mc_queue", \ "mmu_queue_flush_timeout", \ diff --git a/sdk-6.5.16/src/appl/diag/cint/soc_property_vars.c b/sdk-6.5.16/src/appl/diag/cint/soc_property_vars.c @@ -2301,4 +2301,5 @@ void soc_cint_property_vars_init(void) cint_interpreter_create_pointer("char", "spn_PROGRAMMABILITY_IMAGE_NAME", "programmability_image_name"); cint_interpreter_create_pointer("char", "spn_TDM_MODE", "tdm_mode"); cint_interpreter_create_pointer("char", "spn_PCIE_HOT_SWAP_TIMEOUT_USEC", "pcie_hot_swap_timeout_usec"); + cint_interpreter_create_pointer("char", "spn_MMU_PFC_GROUP_OPTIMIZED_MTU_SIZE", "mmu_pfc_group_optimized_mtu_size"); } diff --git a/sdk-6.5.16/src/examples/xgs/tomahawk3/mmu/flow_control/mmu_pfc_dd_test.c b/sdk-6.5.16/src/examples/xgs/tomahawk3/mmu/flow_control/mmu_pfc_dd_test.c @@ -15,7 +15,7 @@ bshell (0, "config add mmu_lossless=1"); /*Modify flex_enable and MTU size to aloow more number of PFC-optimized * classes*/ bshell(0, "config add port_flex_enable=0"); -bshell (0, "config add max_mtu_size=1024"); +bshell (0, "config add mmu_pfc_group_optimized_mtu_size=1024"); bshell(0, "rc"); /* Program Pipeline for traffic flooding to different queues */ diff --git a/sdk-6.5.16/src/examples/xgs/tomahawk3/mmu/flow_control/mmu_pfc_ext_user_control.c b/sdk-6.5.16/src/examples/xgs/tomahawk3/mmu/flow_control/mmu_pfc_ext_user_control.c @@ -11,7 +11,7 @@ bshell(0, "config add pfc_deadlock_seq_control=1"); /*Modify flex_enable and MTU size to aloow more number of PFC-optimized * classes*/ bshell(0, "config add port_flex_enable=0"); -bshell (0, "config add max_mtu_size=1024"); +bshell (0, "config add mmu_pfc_group_optimized_mtu_size=1024"); bshell(0, "rc"); /* Program Pipeline for traffic flooding to different queues */ diff --git a/sdk-6.5.16/src/examples/xgs/tomahawk3/mmu/flow_control/mmu_pfc_sample1.c b/sdk-6.5.16/src/examples/xgs/tomahawk3/mmu/flow_control/mmu_pfc_sample1.c @@ -10,7 +10,7 @@ bshell (0, "config add mmu_lossless=1"); /*Modify flex_enable and MTU size to aloow more number of PFC-optimized * classes*/ bshell(0, "config add port_flex_enable=0"); -bshell (0, "config add max_mtu_size=1024"); +bshell (0, "config add mmu_pfc_group_optimized_mtu_size=1024"); /* Change scheduler to have 6UC+6MC queues for each port*/ bshell(0, "config add mmu_port_num_mc_queue=3"); diff --git a/sdk-6.5.16/src/examples/xgs/tomahawk3/mmu/flow_control/mmu_pfc_sample2.c b/sdk-6.5.16/src/examples/xgs/tomahawk3/mmu/flow_control/mmu_pfc_sample2.c @@ -10,7 +10,7 @@ bshell (0, "config add mmu_lossless=1"); /*Modify flex_enable and MTU size to aloow more number of PFC-optimized * classes*/ bshell(0, "config add port_flex_enable=0"); -bshell (0, "config add max_mtu_size=1024"); +bshell (0, "config add mmu_pfc_group_optimized_mtu_size=1024"); /* Change scheduler to have 8UC+4MC queues for each port*/ bshell(0, "config add mmu_port_num_mc_queue=2"); diff --git a/sdk-6.5.16/src/examples/xgs/tomahawk3/mmu/flow_control/mmu_pfc_sample3.c b/sdk-6.5.16/src/examples/xgs/tomahawk3/mmu/flow_control/mmu_pfc_sample3.c @@ -10,7 +10,7 @@ bshell (0, "config add mmu_lossless=1"); /*Modify flex_enable and MTU size to aloow more number of PFC-optimized * classes*/ bshell(0, "config add port_flex_enable=0"); -bshell (0, "config add max_mtu_size=1024"); +bshell (0, "config add mmu_pfc_group_optimized_mtu_size=1024"); /* Change scheduler to have 10UC+2MC queues for each port*/ bshell(0, "config add mmu_port_num_mc_queue=1"); diff --git a/sdk-6.5.16/src/soc/esw/tomahawk3/traffic_manager/pfc.c b/sdk-6.5.16/src/soc/esw/tomahawk3/traffic_manager/pfc.c @@ -557,6 +557,7 @@ _soc_th3_pfc_rx_mapping_hw_write( SOC_IF_ERROR_RETURN (soc_reg32_get(unit, hp_reg, REG_PORT_ANY, profile_id, &rval)); soc_reg_field_set(unit, hp_reg, &rval, hp_field, hp_bmp); + SOC_IF_ERROR_RETURN (soc_reg32_set(unit, hp_reg, REG_PORT_ANY, profile_id, rval)); @@ -951,7 +952,7 @@ soc_th3_pfc_num_optimized_group_get( } speed_id = _soc_th3_pfc_speed_encoding_get(unit, speed); - mtu_size = soc_property_get(unit, spn_MAX_MTU_SIZE, 9416); + mtu_size = soc_property_get(unit, spn_MMU_PFC_GROUP_OPTIMIZED_MTU_SIZE, 9416); mtu_id = _soc_th3_pfc_mtu_encoding_get(unit, mtu_size); if (mtu_id == -1 || speed_id == -1) { @@ -1148,6 +1149,8 @@ soc_th3_pfc_rx_init_from_cfg(int unit) char s_name[SOC_PROPERTY_NAME_MAX], s_opt[SOC_PROPERTY_NAME_MAX]; int cos_list[TH3_PFC_COS_NUM], opt_val[TH3_PFC_PRIORITY_NUM]; soc_cosq_pfc_class_map_config_t rx_config[TH3_PFC_PRIORITY_NUM]; + int mtu_size; + uint32 rval = 0; for (i = 0; i <= TH3_PFC_CLASS_PROFILE_ID_MAX; i++) { set_profile = 0; @@ -1193,6 +1196,34 @@ soc_th3_pfc_rx_init_from_cfg(int unit) } } } + + mtu_size = soc_property_get(unit, spn_MMU_PFC_GROUP_OPTIMIZED_MTU_SIZE, 9416); + + if (mtu_size < 9416) { + mtu_size = (mtu_size + _TH3_MMU_BYTES_PER_CELL - 1) / _TH3_MMU_BYTES_PER_CELL; + rval = 0; + SOC_IF_ERROR_RETURN + (soc_reg32_get(unit, MMU_EBCFP_OPT_EBGRP_REDUCED_MTUr, + REG_PORT_ANY, 0, &rval)); + + soc_reg_field_set(unit, MMU_EBCFP_OPT_EBGRP_REDUCED_MTUr, &rval, + REDUCED_MTUf, mtu_size); + SOC_IF_ERROR_RETURN + (soc_reg32_set(unit, MMU_EBCFP_OPT_EBGRP_REDUCED_MTUr, + REG_PORT_ANY, 0, rval)); + + /* specify to use this setting for all 8 profiles and 8 PFC priorities. */ + for (i = 0; i <= TH3_PFC_CLASS_PROFILE_ID_MAX; i++) { + SOC_IF_ERROR_RETURN + (soc_reg32_get(unit, MMU_EBCFP_OPT_EBGRP_MTU_PROFILEr, + REG_PORT_ANY, i, &rval)); + soc_reg_field_set(unit, MMU_EBCFP_OPT_EBGRP_MTU_PROFILEr, + &rval, OPT_EBGRP_MAX_MTU_BMPf, 0); + SOC_IF_ERROR_RETURN + (soc_reg32_set(unit, MMU_EBCFP_OPT_EBGRP_MTU_PROFILEr, + REG_PORT_ANY, i, rval)); + } + } return SOC_E_NONE; }