openbcm

Git mirror of https://github.com/Broadcom-Network-Switching-Software/OpenBCM
git clone git://git.finwo.net/mirror/broadcom/openbcm
Log | Files | Refs | README

ibde.h (6315B)


      1 /*
      2  * Copyright 2017 Broadcom
      3  * 
      4  * This program is free software; you can redistribute it and/or modify
      5  * it under the terms of the GNU General Public License, version 2, as
      6  * published by the Free Software Foundation (the "GPL").
      7  * 
      8  * This program is distributed in the hope that it will be useful, but
      9  * WITHOUT ANY WARRANTY; without even the implied warranty of
     10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
     11  * General Public License version 2 (GPLv2) for more details.
     12  * 
     13  * You should have received a copy of the GNU General Public License
     14  * version 2 (GPLv2) along with this source code.
     15  */
     16 /*
     17  * $Id: ibde.h,v 1.27 Broadcom SDK $
     18  * $Copyright: (c) 2005 Broadcom Corp.
     19  * All Rights Reserved.$
     20  */
     21 
     22 #ifndef __IBDE_H__
     23 #define __IBDE_H__
     24 
     25 #include <sal/types.h>
     26 
     27 /*
     28  * Represents a collection of devices 
     29  */
     30 
     31 typedef struct ibde_dev_s {
     32     uint16 device;
     33     uint8  rev;
     34     sal_vaddr_t base_address;
     35     sal_vaddr_t base_address1;
     36     sal_vaddr_t base_address2;
     37     /* a unique number representing the specific device.
     38      * Must be different for different devices.
     39      * May be used to identify specific devices in the system.
     40      * May be implemented as a full PCIe address, a persistent configurable user value, ...
     41      * Possible implementation value stores in QSPI flash memory of the device. */
     42     uint32 dev_unique_id;
     43 } ibde_dev_t;
     44 
     45 
     46 typedef struct ibde_s {
     47 
     48     const char *(*name)(void);
     49   
     50     /* Returns the number of devices available */
     51     /* Each device is is accessed through a handle */
     52     /* Handles are assumed to index the array of devices */
     53   
     54     /* Support SWITCH or ETHERNET or CPU devices */
     55     int     (*num_devices)(int type);
     56 #define BDE_ALL_DEVICES         0
     57 #define BDE_SWITCH_DEVICES      1
     58 #define BDE_ETHER_DEVICES       2
     59 #define BDE_CPU_DEVICES         3
     60 
     61     const   ibde_dev_t *(*get_dev)(int d);
     62 
     63     /* 
     64      * Get types of underlaying devices.
     65      * A combination of bus type and functional type is returned.
     66      * In case of bus type, support PCI and SPI device types.
     67      * In case of functional type, specify if underlaying device is
     68      * a switching or ethernet device.
     69      */
     70     uint32  (*get_dev_type)(int d);
     71 #define BDE_PCI_DEV_TYPE      SAL_PCI_DEV_TYPE    /* PCI device */
     72 #define BDE_SPI_DEV_TYPE      SAL_SPI_DEV_TYPE    /* SPI device */
     73 #define BDE_EB_DEV_TYPE       SAL_EB_DEV_TYPE     /* EB device */
     74 #define BDE_ICS_DEV_TYPE      SAL_ICS_DEV_TYPE    /* ICS device */
     75 #define BDE_MII_DEV_TYPE      SAL_MII_DEV_TYPE    /* MII device */
     76 #define BDE_I2C_DEV_TYPE      SAL_I2C_DEV_TYPE    /* I2C device */
     77 #define BDE_AXI_DEV_TYPE      SAL_AXI_DEV_TYPE    /* AXI device */
     78 #define BDE_EMMI_DEV_TYPE     SAL_EMMI_DEV_TYPE   /* EMMI device */
     79 #define BDE_DEV_BUS_ALT       SAL_DEV_BUS_ALT     /* Alternate Access */
     80 #define BDE_DEV_BUS_MSI       SAL_DEV_BUS_MSI     /* Message-signaled interrupts */
     81 
     82 #define BDE_DEV_BUS_TYPE_MASK SAL_DEV_BUS_TYPE_MASK
     83     
     84 #define BDE_SWITCH_DEV_TYPE   SAL_SWITCH_DEV_TYPE /* Switch device */
     85 #define BDE_ETHER_DEV_TYPE    SAL_ETHER_DEV_TYPE  /* Ethernet device */
     86 #define BDE_CPU_DEV_TYPE      SAL_CPU_DEV_TYPE    /* CPU device */
     87 
     88 #define BDE_BYTE_SWAP         0x01000000          /* SW byte swap */
     89 #define BDE_NO_IPROC          0x02000000          /* Device uses two BARs, but is not iProc */
     90 
     91 #define BDE_8MB_REG_SPACE     0x10000000          /* 8MB sized CMIC BAR */
     92 #define BDE_256K_REG_SPACE    0x20000000          /* Map 256K (v 64K) */
     93 #define BDE_128K_REG_SPACE    0x40000000          /* Map 128K (v 64K) */
     94 #define BDE_320K_REG_SPACE    0x80000000          /* Map 256K+64K */
     95 
     96 /* Bus supports only 16bit reads */
     97 #define BDE_DEV_BUS_RD_16BIT  SAL_DEV_BUS_RD_16BIT 
     98 
     99 /* Bus supports only 16bit writes */
    100 #define BDE_DEV_BUS_WR_16BIT  SAL_DEV_BUS_WR_16BIT
    101 
    102 /* Backward compatibility */
    103 #define BDE_ET_DEV_TYPE       BDE_MII_DEV_TYPE
    104 
    105 #define BDE_DEV_MEM_MAPPED(_d) \
    106     ((_d) & (BDE_PCI_DEV_TYPE | BDE_ICS_DEV_TYPE | BDE_EB_DEV_TYPE |\
    107              BDE_EMMI_DEV_TYPE | BDE_AXI_DEV_TYPE))
    108 
    109     /* 
    110      * PCI Bus Access
    111      */
    112     uint32  (*pci_conf_read)(int d, uint32 addr);
    113     int     (*pci_conf_write)(int d, uint32 addr, uint32 data);
    114     void    (*pci_bus_features)(int d, int *be_pio, int *be_packet,
    115                                 int *be_other);
    116 
    117     uint32  (*read)(int d, uint32 addr);
    118     int     (*write)(int d, uint32 addr, uint32 data);
    119 
    120     uint32* (*salloc)(int d, int size, const char *name);
    121     void    (*sfree)(int d, void *ptr);
    122     int     (*sflush)(int d, void *addr, int length);
    123     int     (*sinval)(int d, void *addr, int length);
    124 
    125     int     (*interrupt_connect)(int d, void (*)(void*), void *data);  
    126     int     (*interrupt_disconnect)(int d);
    127 
    128     sal_paddr_t  (*l2p)(int d, void *laddr);
    129     void* (*p2l)(int d, sal_paddr_t paddr);
    130 
    131     /* 
    132      * SPI Access via SMP
    133      */
    134     int  (*spi_read)(int d, uint32 addr, uint8 *buf, int len);
    135     int  (*spi_write)(int d, uint32 addr, uint8 *buf, int len);
    136     /* Special SPI access addresses */
    137 #define BDE_DEV_OP_EMMI_INIT    SAL_DEV_OP_EMMI_INIT
    138 
    139     /* 
    140      * iProc register access
    141      */
    142     uint32  (*iproc_read)(int d, uint32 addr);
    143     int     (*iproc_write)(int d, uint32 addr, uint32 data);
    144 
    145     /* 
    146      * Shared memory access
    147      */
    148     uint32  (*shmem_read)(int dev, uint32 addr, uint8 *buf, uint32 len);
    149     void    (*shmem_write)(int dev, uint32 addr, uint8 *buf, uint32 len);
    150     sal_vaddr_t (*shmem_map)(int dev, uint32 addr, uint32 size);
    151 
    152     /*
    153      *  cmic
    154      */
    155     int   (*get_cmic_ver)(int d,  uint32 *ver);
    156 
    157     /*
    158      * I2C operations on the Device, assuming it is connected by I2C to the CPU.
    159      */
    160     /* Read from the internal device Address space using I2C */
    161     int (*i2c_device_read)(
    162         int dev,       /* The device ID to access */
    163         uint32 addr,   /* The address to access in the internal device address space */
    164         uint32 *value);/* the value to be read. */
    165     /* Write to the internal device Address space using I2C */
    166     int (*i2c_device_write)(
    167         int dev,       /* The device ID to access */
    168         uint32 addr,   /* The address to access in the internal device address space */
    169         uint32 value); /* the value to be written. */
    170 
    171 } ibde_t;
    172 
    173 
    174 /* System BDE */
    175 extern ibde_t *bde;
    176 
    177 
    178 #endif /* __IBDE_H__ */