dev_int.h (1488B)
1 /* 2 * DO NOT EDIT THIS FILE! 3 * This file is auto-generated. 4 * Edits to this file will be lost when it is regenerated. 5 * 6 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 7 * 8 * Copyright 2007-2020 Broadcom Inc. All rights reserved. 9 */ 10 11 #ifndef BCMINT_LTSW_DEV_INT_H 12 #define BCMINT_LTSW_DEV_INT_H 13 14 /*! 15 * \brief Device information. 16 */ 17 typedef struct bcmint_dev_info_s { 18 19 /*! CMIC port. */ 20 int cmic_port; 21 22 /*! Number of phyical port. */ 23 int phys_port_num; 24 25 /*! Maximum phyical port. */ 26 int phys_port_max; 27 28 /*! Number of logical port. */ 29 int logic_port_num; 30 31 /*! Maximum logical port. */ 32 int logic_port_max; 33 34 /*! Number of pipes. */ 35 int pipe_num; 36 37 /*! Maximum pipe. */ 38 int pipe_max; 39 40 /*! Number of pp pipes. */ 41 int pp_pipe_num; 42 43 /*! Maximum pp pipe. */ 44 int pp_pipe_max; 45 46 /*! Maximum addressable ports, has to be 2^n-1. */ 47 int port_addr_max; 48 49 /*! Maximum modid supported. */ 50 int modid_max; 51 52 /*! Modid count. */ 53 int modid_count; 54 55 /*! Maximum port id in each module. */ 56 int modport_max; 57 58 /*! Maximum port in in first module. */ 59 int modport_max_first; 60 61 /*! The family that the chip belongs to. */ 62 int family; 63 64 /*! Core clock frequency. */ 65 int core_frequency; 66 67 /*! packet buffer number */ 68 int packet_buffer_num; 69 70 } bcmint_dev_info_t; 71 72 #endif /* BCMINT_LTSW_DEV_INT_H */