ifacc.h (2820B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2020 Broadcom Inc. All rights reserved. 6 * 7 * File: ifacc.h 8 */ 9 #ifndef _BCM_INT_IFA_CC_H_ 10 #define _BCM_INT_IFA_CC_H_ 11 12 #if defined(INCLUDE_IFA) 13 14 /* Maximum number of gports supported by IFA-CC Eapp */ 15 #define BCM_IFA_CC_MAX_NUM_GPORT 64 16 17 /* Maximum number of PIPES */ 18 #define BCM_IFA_CC_MAX_NUM_PIPES 8 19 20 /* EGR_VLAN_XLATE_1_SINGLE data size */ 21 #define BCM_IFA_CC_EVLXT_DATA_SIZE 4 22 23 /* 5 sec for FW response */ 24 #define BCM_IFA_CC_UC_MSG_TIMEOUT 5000000 25 26 /* 100 usec for FW response */ 27 #define BCM_IFA_CC_UC_STATUS_TIMEOUT 100 28 29 #define BCM_IFA_CC_M0_NUM_UCS 0x4 30 #define BCM_IFA_CC_M0_EAPP_STATUS_OFFSET 0xC0 31 #define BCM_IFA_CC_M0_EAPP_STATUS 0xBADC0DE1 32 #define BCM_IFA_CC_APP_STATUS_1 0xC001C0DE 33 #define BCM_IFA_CC_APP_STATUS_2 0xC0DEC001 34 #define BCM_IFA_CC_CONFIG_STATUS_BIT 0x1 35 36 typedef struct _bcm_ifa_cc_gport_port_queue_map_s { 37 /* gport value */ 38 bcm_gport_t gport; 39 40 /* DGPP Port */ 41 bcm_gport_t dgpp; 42 43 /* global queue based on physical port and local queue id */ 44 uint32 global_num; 45 46 /* Pipe Port and queue number */ 47 uint16 pipe_num; 48 uint16 port_num; 49 uint16 queue_num; 50 51 struct _bcm_ifa_cc_gport_port_queue_map_s *next; 52 53 } _bcm_ifa_cc_gport_port_queue_map_t; 54 55 /* IFA CC */ 56 typedef struct _bcm_ifa_cc_data_s { 57 uint32 app_status[2]; 58 uint32 host_status; 59 uint32 uc_status; 60 uint32 debug_info[16]; 61 uint32 uc_bit_map; 62 uint32 flag; 63 uint32 num_pipes; 64 uint32 num_gports; 65 uint32 num_sbus_dma; 66 uint32 ports_per_pipe; 67 uint32 queues_per_pipe; 68 uint32 queues_per_port; 69 uint32 dgpp[BCM_IFA_CC_MAX_NUM_GPORT]; 70 uint32 gport[BCM_IFA_CC_MAX_NUM_GPORT]; 71 uint32 pri_class_id[BCM_IFA_CC_MAX_NUM_GPORT]; 72 uint32 port_pipe_queue[BCM_IFA_CC_MAX_NUM_GPORT]; 73 uint32 egr_tx_cnt_tbl_addr[BCM_IFA_CC_MAX_NUM_PIPES]; 74 uint32 queue_size_tbl_addr[BCM_IFA_CC_MAX_NUM_PIPES]; 75 uint32 egr_vlan_xlate_tbl_addr[BCM_IFA_CC_MAX_NUM_PIPES]; 76 uint32 egr_vlan_xlate_tbl_offset[BCM_IFA_CC_MAX_NUM_GPORT]; 77 uint32 egr_vlan_xlate_tbl_data[(BCM_IFA_CC_MAX_NUM_GPORT * BCM_IFA_CC_EVLXT_DATA_SIZE)]; 78 } _bcm_ifa_cc_data_t; 79 80 #define BASEADDR_OFFSET_COMMON_SRAM(unit) \ 81 (SOC_IS_TRIDENT3X(unit) ? 0x01350000 : 0x01350000) 82 #define BASEADDR_OFFSET(unit) (SOC_IS_TRIDENT3X(unit) ? 0x100 : 0x100) 83 #define ifa_cc_offset(mem) \ 84 ((size_t)((char *)&((_bcm_ifa_cc_data_t *)0)->mem - \ 85 (char *)(_bcm_ifa_cc_data_t *)0)) 86 87 #endif /* INCLUDE_IFA */ 88 #endif /* !_BCM_INT_IFA_CC_H_ */