hurricane4.h (19172B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2020 Broadcom Inc. All rights reserved. 6 * 7 * File: hurricane4.h 8 * Purpose: Function declarations for Hurricane4 Internal functions. 9 */ 10 11 #ifndef _BCM_INT_HURRICANE4_H_ 12 #define _BCM_INT_HURRICANE4_H_ 13 14 #include <bcm_int/esw/mbcm.h> 15 #include <bcm_int/esw/cosq.h> 16 #include <bcm/oob.h> 17 #include <bcm_int/esw/pfc_deadlock.h> 18 #include <soc/profile_mem.h> 19 20 #if defined(BCM_HURRICANE4_SUPPORT) 21 #include <soc/esw/port.h> 22 #include <bcm_int/esw/l2.h> 23 #include <bcm_int/esw/trident3.h> 24 #include <bcm_int/esw/helix5.h> 25 #include <bcm_int/esw/field.h> 26 #include <bcm_int/esw/keygen_api.h> 27 #include <bcm/flowtracker.h> 28 #include <bcm_int/esw/flowtracker/ft_alu.h> 29 #include <bcm_int/esw/flowtracker/ft_group.h> 30 31 /****************cosq start *****************************************/ 32 /* entries_per_profile comes from MAXIDX in PHB_MAPPING_TBL_1 33 * MAXIDX => 4608, #(72 ports x 64 profiles) */ 34 #define _BCM_HR4_PHB_MAP_TAB1_ENTRIES_PER_PROFILE (72) 35 36 #define _BCM_PFC_DEADLOCK_MASK 0xFF 37 38 typedef enum { 39 _BCM_HR4_COSQ_INDEX_STYLE_WRED_QUEUE, 40 _BCM_HR4_COSQ_INDEX_STYLE_WRED_PORT, 41 _BCM_HR4_COSQ_INDEX_STYLE_WRED_DEVICE, 42 _BCM_HR4_COSQ_INDEX_STYLE_UCAST_QUEUE, 43 _BCM_HR4_COSQ_INDEX_STYLE_MCAST_QUEUE, 44 _BCM_HR4_COSQ_INDEX_STYLE_EGR_POOL, 45 _BCM_HR4_COSQ_INDEX_STYLE_COS, 46 _BCM_HR4_COSQ_INDEX_STYLE_UCAST_QUEUE_GROUP, 47 _BCM_HR4_COSQ_INDEX_STYLE_COUNT 48 } _bcm_hr4_cosq_index_style_t; 49 50 extern int bcmi_hr4_port_fn_drv_init(int unit); 51 52 /* COSQ Module */ 53 extern int 54 bcm_hr4_cosq_init(int unit); 55 56 extern int 57 bcm_hr4_cosq_config_get(int unit, int *numq); 58 59 extern int 60 bcm_hr4_cosq_config_set(int unit, int numq); 61 62 extern int 63 bcm_hr4_cosq_gport_attach(int unit, bcm_gport_t input_gport, 64 bcm_gport_t parent_gport, bcm_cos_queue_t cosq); 65 66 extern int 67 bcm_hr4_cosq_gport_detach(int unit, bcm_gport_t input_gport, 68 bcm_gport_t parent_gport, bcm_cos_queue_t cosq); 69 70 extern int 71 bcm_hr4_cosq_gport_attach_get(int unit, bcm_gport_t sched_gport, 72 bcm_gport_t *input_gport, bcm_cos_queue_t *cosq); 73 extern int 74 bcm_hr4_cosq_gport_get(int unit, bcm_gport_t gport, bcm_gport_t *port, 75 int *numq, uint32 *flags); 76 extern int 77 bcm_hr4_cosq_gport_traverse(int unit, bcm_cosq_gport_traverse_cb cb, 78 void *user_data); 79 extern int 80 bcm_hr4_cosq_gport_child_get(int unit, bcm_gport_t in_gport, 81 bcm_cos_queue_t cosq, bcm_gport_t *out_gport); 82 extern int 83 bcm_hr4_cosq_gport_traverse_by_port(int unit, bcm_gport_t port, 84 bcm_cosq_gport_traverse_cb cb, 85 void *user_data); 86 extern int 87 _bcm_hr4_cosq_port_resolve(int unit, bcm_gport_t gport, bcm_module_t *modid, 88 bcm_port_t *port, bcm_trunk_t *trunk_id, int *id, 89 int *qnum); 90 extern int 91 bcm_hr4_rx_queue_channel_set_test(int unit, bcm_cos_queue_t queue_id, 92 bcm_rx_chan_t chan_id); 93 extern int 94 bcm_hr4_cosq_sched_weight_max_get(int unit, int mode, int *weight_max); 95 96 extern int 97 bcm_hr4_cosq_gport_sched_get(int unit, bcm_gport_t gport, bcm_cos_queue_t cosq, 98 int *mode, int *weight); 99 100 extern int 101 bcm_hr4_cosq_gport_sched_set(int unit, bcm_gport_t gport, bcm_cos_queue_t cosq, 102 int mode, int weight); 103 104 extern int 105 bcm_hr4_cosq_port_sched_get(int unit, bcm_pbmp_t pbm, int *mode, int *weights, 106 int *delay); 107 108 extern int 109 bcm_hr4_cosq_port_sched_set(int unit, bcm_pbmp_t pbm, int mode, const int 110 *weights, int delay); 111 extern int 112 bcm_hr4_cosq_gport_bandwidth_get(int unit, bcm_gport_t gport, 113 bcm_cos_queue_t cosq, uint32 *kbits_sec_min, 114 uint32 *kbits_sec_max, uint32 *flags); 115 116 extern int 117 bcm_hr4_cosq_gport_bandwidth_set(int unit, bcm_gport_t gport, 118 bcm_cos_queue_t cosq, uint32 kbits_sec_min, 119 uint32 kbits_sec_max, uint32 flags); 120 121 extern int 122 bcm_hr4_cosq_port_bandwidth_get(int unit, bcm_port_t port, bcm_cos_queue_t cosq, 123 uint32 *min_quantum, uint32 *max_quantum, 124 uint32 *burst_quantum, uint32 *flags); 125 126 extern int 127 bcm_hr4_cosq_port_bandwidth_set(int unit, bcm_port_t port, bcm_cos_queue_t cosq, 128 uint32 min_quantum, uint32 max_quantum, 129 uint32 burst_quantum, uint32 flags); 130 extern int 131 bcm_hr4_cosq_port_pps_set(int unit, bcm_port_t port, bcm_cos_queue_t cosq, 132 int pps); 133 134 extern int 135 bcm_hr4_cosq_port_pps_get(int unit, bcm_port_t port, bcm_cos_queue_t cosq, 136 int *pps); 137 138 extern int 139 bcm_hr4_cosq_port_burst_set(int unit, bcm_port_t port, bcm_cos_queue_t cosq, 140 int burst); 141 142 extern int 143 bcm_hr4_cosq_port_burst_get(int unit, bcm_port_t port, bcm_cos_queue_t cosq, 144 int *burst); 145 146 extern int 147 _bcm_hr4_cosq_index_resolve(int unit, bcm_port_t port, 148 bcm_cos_queue_t cosq, _bcm_hr4_cosq_index_style_t style, 149 bcm_port_t *local_port, int *index, int *count); 150 151 extern int bcm_hr4_cosq_control_set(int unit, bcm_gport_t gport, 152 bcm_cos_queue_t cosq, 153 bcm_cosq_control_t type, int arg); 154 extern int bcm_hr4_cosq_control_get(int unit, bcm_gport_t gport, 155 bcm_cos_queue_t cosq, 156 bcm_cosq_control_t type, int *arg); 157 extern int 158 bcm_hr4_cosq_config_get(int unit, int *numq); 159 extern int 160 bcm_hr4_cosq_config_set(int unit, int numq); 161 162 extern int 163 bcm_hr4_cosq_discard_set(int unit, uint32 flags); 164 165 extern int 166 bcm_hr4_cosq_discard_get(int unit, uint32 *flags); 167 168 extern int 169 bcm_hr4_cosq_discard_port_set(int unit, bcm_port_t port, bcm_cos_queue_t cosq, 170 uint32 color, int drop_start, int drop_slope, 171 int average_time); 172 173 extern int 174 bcm_hr4_cosq_discard_port_get(int unit, bcm_port_t port, bcm_cos_queue_t cosq, 175 uint32 color, int *drop_start, int *drop_slope, 176 int *average_time); 177 178 extern int 179 bcm_hr4_cosq_gport_discard_set(int unit, bcm_gport_t gport, 180 bcm_cos_queue_t cosq, 181 bcm_cosq_gport_discard_t *discard); 182 183 extern int 184 bcm_hr4_cosq_gport_discard_get(int unit, bcm_gport_t gport, 185 bcm_cos_queue_t cosq, 186 bcm_cosq_gport_discard_t *discard); 187 188 extern int bcm_hr4_cosq_wred_resolution_entry_create(int unit, int *index); 189 190 extern int bcm_hr4_cosq_wred_resolution_entry_destroy(int unit, int index); 191 192 extern int bcm_hr4_cosq_wred_resolution_set(int unit, int index, 193 bcm_cosq_discard_rule_t *rule); 194 195 extern int bcm_hr4_cosq_wred_resolution_get(int unit, int index, int max, 196 bcm_cosq_discard_rule_t *rule, 197 int *count); 198 extern int 199 bcm_hr4_cosq_mapping_set(int unit, bcm_port_t gport, bcm_cos_t priority, 200 bcm_cos_queue_t cosq); 201 202 extern int 203 bcm_hr4_cosq_mapping_get(int unit, bcm_port_t gport, bcm_cos_t priority, 204 bcm_cos_queue_t *cosq); 205 206 extern int 207 bcm_hr4_cosq_gport_mapping_set(int unit, bcm_port_t ing_port, 208 bcm_cos_t int_pri, uint32 flags, 209 bcm_gport_t gport, bcm_cos_queue_t cosq); 210 211 extern int 212 bcm_hr4_cosq_gport_mapping_get(int unit, bcm_port_t ing_port, 213 bcm_cos_t int_pri, uint32 flags, 214 bcm_gport_t *gport, bcm_cos_queue_t *cosq); 215 216 extern int 217 bcm_hr4_cosq_field_classifier_get(int unit, int classifier_id, 218 bcm_cosq_classifier_t *classifier); 219 220 extern int 221 bcm_hr4_cosq_field_classifier_id_create(int unit, bcm_cosq_classifier_t 222 *classifier, int *classifier_id); 223 224 extern int 225 bcm_hr4_cosq_field_classifier_id_destroy(int unit, int classifier_id); 226 227 extern int 228 bcm_hr4_cosq_field_classifier_map_set(int unit, int classifier_id, int count, 229 bcm_cos_t *priority_array, bcm_cos_queue_t *cosq_array); 230 231 extern int 232 bcm_hr4_cosq_field_classifier_map_get(int unit, int classifier_id,int array_max, 233 bcm_cos_t *priority_array, bcm_cos_queue_t *cosq_array, int *array_count); 234 235 extern int 236 bcm_hr4_cosq_field_classifier_map_clear(int unit, int classifier_id); 237 238 extern int 239 bcm_hr4_cosq_stat_set(int unit, bcm_gport_t port, 240 bcm_cos_queue_t cosq, 241 bcm_cosq_stat_t stat, uint64 value); 242 extern int 243 bcm_hr4_cosq_stat_get(int unit, bcm_gport_t port, 244 bcm_cos_queue_t cosq, 245 bcm_cosq_stat_t stat, int sync_mode, 246 uint64 *value); 247 extern int 248 bcm_hr4_cosq_gport_info_get(int unit, bcm_gport_t gport, 249 bcm_cosq_gport_level_info_t *info); 250 251 extern int 252 bcm_hr4_hgcos_select_port_control_set(int unit, bcm_port_t port, 253 bcm_port_control_t type, int value); 254 extern int 255 bcm_hr4_hgcos_select_port_control_get(int unit, bcm_port_t port, 256 bcm_port_control_t type, int *value); 257 258 extern int 259 bcm_hr4_cosq_safc_class_mapping_set(int unit, bcm_gport_t port, int array_count, 260 bcm_cosq_safc_class_mapping_t *mapping_array); 261 262 extern int 263 bcm_hr4_cosq_safc_class_mapping_get(int unit, bcm_gport_t port, int array_max, 264 bcm_cosq_safc_class_mapping_t *mapping_array, 265 int *array_count); 266 extern int 267 bcm_hr4_cosq_port_pfc_op(int unit, bcm_port_t port, 268 bcm_switch_control_t sctype, _bcm_cosq_op_t op, 269 bcm_gport_t *gport, int gport_count); 270 271 extern int 272 bcm_hr4_cosq_port_pfc_get(int unit, bcm_port_t port, 273 bcm_switch_control_t sctype, 274 bcm_gport_t *gport, int gport_count, 275 int *actual_gport_count); 276 277 extern int 278 bcm_hr4_cosq_pfc_class_mapping_set(int unit, bcm_gport_t port, 279 int array_count, 280 bcm_cosq_pfc_class_mapping_t *mapping_array); 281 282 extern int 283 bcm_hr4_cosq_pfc_class_mapping_get(int unit, bcm_gport_t port, 284 int array_max, 285 bcm_cosq_pfc_class_mapping_t *mapping_array, 286 int *array_count); 287 288 extern int bcm_hr4_cosq_port_attach(int unit, bcm_port_t port); 289 extern int bcm_hr4_cosq_port_detach(int unit, bcm_port_t port); 290 291 extern int bcmi_hr4_port_cosmap_update(int unit, pbmp_t pbmp, int enable); 292 extern void bcm_hr4_cosq_sw_dump(int unit); 293 #ifdef BCM_WARM_BOOT_SUPPORT 294 extern int bcm_hr4_cosq_sync(int unit); 295 #endif 296 297 extern int 298 bcm_hr4_cosq_cpu_cosq_enable_set(int unit, bcm_cos_queue_t cosq, int enable); 299 300 extern int 301 bcm_hr4_cosq_cpu_cosq_enable_get(int unit, bcm_cos_queue_t cosq, int *enable); 302 303 extern int 304 bcm_hr4_cosq_buffer_id_multi_get(int unit, bcm_gport_t gport, 305 bcm_cos_queue_t cosq, bcm_cosq_dir_t direction, 306 int array_max, bcm_cosq_buffer_id_t *buf_id_array, 307 int *array_count); 308 309 extern void bcm_hr4_pstats_deinit(int unit); 310 extern int bcm_hr4_pstats_init(int unit); 311 312 extern int 313 _bcm_hr4_cosq_inv_mapping_get(int unit, bcm_gport_t gport, 314 bcm_cos_queue_t cosq, 315 uint32 flags, bcm_port_t *ing_port, 316 bcm_cos_t *priority); 317 318 /* pfc deadlock */ 319 #define HR4_PFC_DEADLOCK_MAX_COS 26 320 321 /* Below structure to contain register/field name specific to chip */ 322 typedef struct _bcm_hr4_pfc_hw_resorces_s { 323 soc_reg_t timer_count[HR4_PFC_DEADLOCK_MAX_COS]; 324 soc_reg_t timer_status[HR4_PFC_DEADLOCK_MAX_COS]; 325 soc_reg_t timer_mask[HR4_PFC_DEADLOCK_MAX_COS]; 326 soc_reg_t timer_en[HR4_PFC_DEADLOCK_MAX_COS]; 327 soc_reg_t chip_config[4]; 328 soc_reg_t port_config[2]; 329 soc_field_t cos_field[HR4_PFC_DEADLOCK_MAX_COS]; 330 soc_field_t time_init_val[HR4_PFC_DEADLOCK_MAX_COS]; 331 soc_field_t time_unit_field; 332 soc_field_t recovery_action_field; 333 soc_field_t deadlock_status_field; 334 } _bcm_hr4_pfc_hw_resorces_t; 335 336 typedef struct _bcm_hr4_pfc_deadlock_control_s { 337 uint8 pfc_deadlock_cos_max; /* Max COS supported for PFC Deadlock 338 * Detection and Recovery */ 339 uint8 pfc_deadlock_cos_used; /* Total COS configured for PFC Deadlock 340 * Detection and Recovery */ 341 uint8 hw_cos_idx_inuse[HR4_PFC_DEADLOCK_MAX_COS]; /* Boolean for used Cos indices */ 342 uint8 cb_enabled; /* Indicator if CB is enabled */ 343 bcm_switch_pfc_deadlock_detection_interval_t time_unit; /* 0 - 100ms, 344 * 1 - 10ms */ 345 uint32 cb_interval; /* CB interval duration */ 346 bcm_cos_t pfc_pri2cos[HR4_PFC_DEADLOCK_MAX_COS]; /* Mapping to reduce run-time 347 * computation */ 348 bcm_cos_t pfc_cos2pri[HR4_PFC_DEADLOCK_MAX_COS]; /* Mapping to reduce run-time 349 * computation */ 350 _bcm_pfc_deadlock_config_t cos_config[HR4_PFC_DEADLOCK_MAX_COS]; 351 _bcm_hr4_pfc_hw_resorces_t hw_regs_fields; 352 bcm_switch_pfc_deadlock_action_t recovery_action; 353 uint32 cb_count; /* Debug ctr to keep track of #times CB fn is called */ 354 _bcm_cosq_inv_mapping_get_f cosq_inv_mapping_get; /* Function to retrieve 355 * Port/Priority from a 356 * given Gport */ 357 } _bcm_hr4_pfc_deadlock_control_t; 358 359 #define _BCM_HR4_PFC_DEADLOCK_HW_RES_INIT(deadlock_hw) \ 360 do { \ 361 int i = 0; \ 362 for (i = 0; i < HR4_PFC_DEADLOCK_MAX_COS; i++) { \ 363 (deadlock_hw)->timer_count[i] = (INVALIDr); \ 364 (deadlock_hw)->timer_status[i] = (INVALIDr); \ 365 (deadlock_hw)->timer_mask[i] = (INVALIDr); \ 366 (deadlock_hw)->timer_en[i] = (INVALIDr); \ 367 (deadlock_hw)->cos_field[i] = (INVALIDf); \ 368 (deadlock_hw)->time_init_val[i] = (INVALIDf); \ 369 } \ 370 (deadlock_hw)->port_config[0] = (INVALIDr); \ 371 (deadlock_hw)->port_config[1] = (INVALIDr); \ 372 (deadlock_hw)->chip_config[0] = (INVALIDr); \ 373 (deadlock_hw)->chip_config[1] = (INVALIDr); \ 374 (deadlock_hw)->time_unit_field = (INVALIDf); \ 375 (deadlock_hw)->recovery_action_field = (INVALIDf); \ 376 (deadlock_hw)->deadlock_status_field = (INVALIDf); \ 377 } while(0); 378 379 #define _BCM_HR4_UNIT_PFC_DEADLOCK_CONTROL(u) _bcm_hr4_pfc_deadlock_control[(u)] 380 #define _BCM_HR4_PFC_DEADLOCK_CONFIG(u,cos) \ 381 (&((_bcm_hr4_pfc_deadlock_control[(u)])->cos_config[(cos)])) 382 #define _BCM_HR4_PFC_DEADLOCK_COS_ENABLED(u,cos) \ 383 ((((_bcm_hr4_pfc_deadlock_control[(u)])->cos_config[(cos)].flags) & \ 384 _BCM_PFC_DEADLOCK_F_ENABLE) ? TRUE : FALSE) 385 #define _BCM_HR4_PFC_DEADLOCK_CB_INTERVAL(u) \ 386 ((_bcm_hr4_pfc_deadlock_control[(u)])->cb_interval) 387 #define _BCM_HR4_PFC_DEADLOCK_CB_ENABLED(u) \ 388 (((_bcm_hr4_pfc_deadlock_control[(u)])->cb_enabled) ? (TRUE) :(FALSE)) 389 #define _BCM_HR4_PFC_DEADLOCK_CB_COUNT(u) \ 390 ((_bcm_hr4_pfc_deadlock_control[(u)])->cb_count) 391 #define _BCM_HR4_PFC_DEADLOCK_TIME_UNIT(u) \ 392 ((_bcm_hr4_pfc_deadlock_control[(u)])->time_unit) 393 #define _BCM_HR4_PFC_DEADLOCK_RECOVERY_ACTION(u) \ 394 ((_bcm_hr4_pfc_deadlock_control[(u)])->recovery_action) 395 396 extern _bcm_hr4_pfc_deadlock_control_t *_bcm_hr4_pfc_deadlock_control[BCM_MAX_NUM_UNITS]; 397 398 extern int _bcm_hr4_pfc_deadlock_recovery_reset(int unit); 399 400 extern int 401 _bcm_hr4_pfc_deadlock_control_set(int unit, bcm_switch_control_t type, int arg); 402 403 extern int 404 _bcm_hr4_pfc_deadlock_control_get(int unit, bcm_switch_control_t type, int *arg); 405 406 extern int bcm_hr4_pfc_deadlock_recovery_start(int unit, 407 bcm_port_t port, int pri); 408 extern int bcm_hr4_pfc_deadlock_recovery_exit(int unit, 409 bcm_port_t port, int pri); 410 411 extern int _bcm_hr4_pfc_deadlock_init(int unit); 412 extern int _bcm_hr4_pfc_deadlock_hw_res_init(int unit); 413 414 extern int _bcm_hr4_pfc_deadlock_deinit(int unit); 415 extern int _bcm_hr4_pfc_deadlock_reinit(int unit); 416 417 418 extern int 419 _bcm_hr4_pfc_deadlock_hw_cos_index_get(int unit, 420 bcm_cos_t priority, 421 int *hw_cos_index); 422 extern int 423 _bcm_hr4_pfc_deadlock_hw_cos_index_set(int unit, 424 bcm_cos_t priority, 425 int *hw_cos_index); 426 extern int 427 _bcm_hr4_pfc_deadlock_chip_config_get(int unit, 428 bcm_cos_t priority, 429 soc_reg_t* chip_config); 430 extern int 431 _bcm_hr4_pfc_deadlock_hw_oper(int unit, 432 _bcm_pfc_deadlock_oper_t operation, 433 bcm_cos_t priority, 434 _bcm_pfc_deadlock_config_t *config); 435 extern int 436 _bcm_hr4_pfc_deadlock_q_config_helper(int unit, 437 _bcm_pfc_deadlock_oper_t operation, 438 bcm_gport_t gport, 439 bcm_cosq_pfc_deadlock_queue_config_t *config, 440 uint8 *enable_status); 441 extern int 442 bcm_hr4_pfc_deadlock_ignore_pfc_xoff_gen(int unit, int priority, 443 bcm_port_t port, uint32 *rval32); 444 extern int 445 _bcm_hr4_pfc_deadlock_recovery_end(int unit, int cos, bcm_port_t port); 446 extern int 447 _bcm_hr4_pfc_deadlock_monitor(int unit); 448 449 extern int 450 bcm_hr4_pfc_deadlock_queue_info_get(int unit, bcm_gport_t gport, bcm_port_t *mmu_port, 451 bcm_port_t *local_port, int *type, int *split); 452 453 extern int 454 bcm_hr4_dump_port_hsp(int unit, bcm_port_t port); 455 #if defined(INCLUDE_XFLOW_MACSEC) 456 extern 457 int 458 _bcmi_xflow_macsec_hr4_port_enable_set(int unit, int nport, bcm_port_t *port, int enable); 459 #endif 460 #endif /* BCM_HURRICANE4_SUPPORT */ 461 #endif /* !_BCM_INT_HURRICANE4_H_ */