gdpll.h (3969B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2020 Broadcom Inc. All rights reserved. 6 * 7 * File: gdpll.h 8 * Purpose: Internal GDPLL header 9 */ 10 11 #ifndef __BCM_INT_GDPLL_H__ 12 #define __BCM_INT_GDPLL_H__ 13 14 #if defined(INCLUDE_GDPLL) 15 16 #include <sal/core/sync.h> 17 18 #include <bcm/gdpll.h> 19 #include <bcm_int/esw/gdpll_shared.h> 20 21 /* Number of GDPLL IA and OA locations */ 22 #define BCM_GDPLL_NUM_IA_ENTRIES 256 23 #define BCM_GDPLL_NUM_OA_ENTRIES 128 24 25 #define BCM_GDPLL_IA_START (0x03271000) 26 #define BCM_GDPLL_OA_START (0x03272000) 27 28 /* TBD - As per section 6.6, port events are from 0 to 191 and misc events 29 * start from 192 30 */ 31 #define BCM_GDPLL_NUM_INPUT_EVENTS 256 32 #define BCM_GDPLL_IA_START_TXPI_TXSOF 128 33 #define BCM_GDPLL_IA_START_MISC 192 34 #define BCM_GDPLL_IA_START_R5 214 35 36 #define GDPLL_DEBUGBUFF_LOCAL_COPY 37 #ifdef GDPLL_DEBUGBUFF_LOCAL_COPY 38 #define GDPLL_NUM_DEBUG_BUFFERS 2 39 #endif 40 41 #define SWAP32_ENDIAN(x) ( \ 42 (((x) << 24) & 0xff000000) | \ 43 (((x) << 8) & 0x00ff0000) | \ 44 (((x) >> 8) & 0x0000ff00) | \ 45 (((x) >> 24) & 0x000000ff)) 46 #define SWAP16_ENDIAN(x) ( \ 47 (((x) << 8) & 0xff00) | \ 48 (((x) >> 8) & 0x00ff)) 49 50 #ifdef LE_HOST 51 #define swap32(_l) (_l) 52 #define swap16(_s) (_s) 53 #define swap64_h(x) (u64_H(x)) 54 #define swap64_l(x) (u64_L(x)) 55 #else 56 #define swap32(_l) _shr_swap32(_l) 57 #define swap16(_s) _shr_swap16(_s) 58 #define swap64_h(x) (swap32(u64_L(x))) 59 #define swap64_l(x) (swap32(u64_H(x))) 60 #endif 61 62 /* M7 TCM region references */ 63 #define BCM_M7_ITCM_BASE (0x3260000) 64 #define BCM_M7_DTCM_BASE (0x3264000) 65 66 #define READ_NS_REGr(unit, reg, idx, rvp) \ 67 soc_iproc_getreg(unit, soc_reg_addr(unit, reg, REG_PORT_ANY, idx), rvp); 68 #define WRITE_NS_REGr(unit, reg, idx, rv) \ 69 soc_iproc_setreg(unit, soc_reg_addr(unit, reg, REG_PORT_ANY, idx), rv) 70 71 #ifdef BCM_WARM_BOOT_SUPPORT 72 extern int _bcm_gdpll_scache_sync(int unit); 73 #endif 74 75 /* Internal datastructure for event destination config */ 76 typedef struct gdpll_event_dest_cfg_s { 77 bcm_gdpll_event_dest_t event_dest; 78 int ts_counter; /* 0: TS0 1:TS1*/ 79 int ppm_check_enable; /* PPM check enable */ 80 } gdpll_event_dest_cfg_t; 81 82 /* Internal datastructure for gdpll channel */ 83 typedef struct dpll_chan_s { 84 uint32 flag; /* Channel flags */ 85 uint32 eventId_ref; /* Channel reference event */ 86 uint32 eventId_fb; /* Channel feedback event */ 87 bcm_port_t lport_ref; 88 bcm_port_t lport_fb; 89 int gdpllport_ref; 90 int gdpllport_fb; 91 int phaseConterRef; 92 uint8 enable; 93 bcm_gdpll_chan_state_t prev_state; 94 bcm_gdpll_chan_state_t curr_state; 95 bcm_gdpll_chan_t gdpll_chan_config; 96 }dpll_chan_t; 97 98 /* Internal datastructure for gdpll context */ 99 typedef struct gdpll_context_s { 100 /* Per dpll channel parameters */ 101 dpll_chan_t dpll_chan[BCM_GDPLL_NUM_CHANNELS]; 102 103 /* event_id array holds the Input array location for that event */ 104 int eventId[BCM_GDPLL_NUM_INPUT_EVENTS]; 105 sal_mutex_t mutex; 106 107 /* User callback for debug registry */ 108 bcm_gdpll_debug_cb debug_cb; 109 void *pUserData; 110 111 /* User callback for various events */ 112 bcm_gdpll_cb gdpll_cb[bcmGdpllCbMax]; 113 void *pGdpll_cb_data[bcmGdpllCbMax]; 114 115 /* Debug buffer sync constructs */ 116 sal_sem_t debug_sem; 117 uint32 debugRdIdx; 118 119 /* CB constructs */ 120 sal_sem_t cb_sem; 121 }gdpll_context_t; 122 123 /* Internal datastructure for dpll config */ 124 typedef struct dpll_param_s { 125 int debugMode; 126 bcm_gdpll_chan_dpll_config_t dpll_config; 127 bcm_gdpll_chan_dpll_state_t dpll_state; 128 } dpll_param_t; 129 130 extern uint32 _bcm_esw_gdpll_event_fb_divisor_get(int unit, int chan); 131 #endif /* INCLUDE_GDPLL */ 132 #endif /* __BCM_INT_GDPLL_H__ */