switch_load_balancing.h (30224B)
1 /** 2 * \file bcm_int/dnx/switch/switch_load_balancing.h 3 * 4 * Load balancing definitions, for DNX, mainly related to BCM APIs 5 * 6 * Purpose: 7 * Definitions for logical and physical LB-related operations. 8 */ 9 /* 10 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 11 * 12 * Copyright 2007-2020 Broadcom Inc. All rights reserved. 13 */ 14 15 #ifndef SWITCH_LOAD_BALANCING_H_INCLUDED 16 /* { */ 17 #define SWITCH_LOAD_BALANCING_H_INCLUDED 18 19 #ifndef BCM_DNX_SUPPORT 20 #error "This file is for use by DNX (JR2) family only!" 21 #endif 22 /* 23 * Includes 24 * { 25 */ 26 #include <soc/dnx/dnx_data/auto_generated/dnx_data_switch.h> 27 #include <bcm/switch.h> 28 /* 29 * } 30 */ 31 32 /* 33 * Macros 34 * { 35 */ 36 /* 37 * If IPPE_PRSE_LOAD_BALANCING_SEED_IS_INCLUDED is set to a non-zero value then it is 38 * assumed that IPPE_PRSE_LOAD_BALANCING_SEED has been returned to the registers file. 39 * 40 * Actually, when this happens, remove this 'define' altogether. 41 */ 42 #define IPPE_PRSE_LOAD_BALANCING_SEED_IS_INCLUDED 0 43 /* 44 * Set maximal limit on the number of characters on identifiers, in string form, within 45 * the enumeration 'bcm_switch_control_t', not including the 'bcmSwitch' prefix. 46 */ 47 #define SWITCH_CONTROL_NAME_LIMIT 30 48 /* 49 * } 50 */ 51 /* 52 * Typedefs 53 * { 54 */ 55 /** 56 * Used to indicate the 'DESTINATION' field on LOAD_BALANCING_CRC_SELECTION tcam. 57 */ 58 typedef uint32 dnx_switch_ld_destination_t; 59 /** 60 * Used to indicate the 'OUTLIF_0' field on LOAD_BALANCING_CRC_SELECTION tcam. 61 */ 62 typedef uint32 dnx_switch_lb_outlif_0_t; 63 /** 64 * Used to indicate the 'VALID' field on LOAD_BALANCING_CRC_SELECTION tcam 65 */ 66 typedef uint32 dnx_switch_lb_valid_t; 67 /* 68 * } 69 */ 70 /* 71 * Enums 72 * { 73 */ 74 /** 75 * \brief - 76 * Enumeration of the various general crc seeds. To be used 77 * on BCM-level get/set. 78 * \see 79 * * dnx_switch_lb_general_seeds_t 80 * * bcm_dnx_switch_control_indexed_set() (for 'bcmSwitchHashSeed') 81 */ 82 typedef enum 83 { 84 FIRST_GENERAL_SEEDS = 0, 85 SEED_FOR_MPLS_STACK_0 = FIRST_GENERAL_SEEDS, 86 SEED_FOR_MPLS_STACK_1, 87 SEED_FOR_PARSER, 88 MUM_GENERAL_SEEDS 89 } dnx_switch_lb_general_seeds_e; 90 91 /** 92 * Enum that lists all valid DNX hash CRC functions 93 */ 94 typedef enum 95 { 96 DNX_SWITCH_LB_HASH_CONFIG_CRC16_0x1015D, 97 DNX_SWITCH_LB_HASH_CONFIG_CRC16_0x100D7, 98 DNX_SWITCH_LB_HASH_CONFIG_CRC16_0x10039, 99 DNX_SWITCH_LB_HASH_CONFIG_CRC16_0x10AC5, 100 DNX_SWITCH_LB_HASH_CONFIG_CRC16_0x109E7, 101 DNX_SWITCH_LB_HASH_CONFIG_CRC16_0x10939, 102 DNX_SWITCH_LB_HASH_CONFIG_CRC16_0x12105, 103 DNX_SWITCH_LB_HASH_CONFIG_CRC16_0x1203D, 104 DNX_SWITCH_LB_HASH_CONFIG_COUNT 105 } dnx_switch_lb_hash_config_e; 106 107 /** 108 * Enum that lists all possible values for symmetrical hashing. 109 */ 110 typedef enum 111 { 112 /** The symmetrical fields of the header are hashed non-symmetrically */ 113 DNX_SWITCH_LB_HASH_NON_SYMMETRICAL, 114 /** The symmetrical fields of the header are hashed symmetrically */ 115 DNX_SWITCH_LB_HASH_SYMMETRICAL, 116 /** The symmetrical fields of the header are disabled from hashing */ 117 DNX_SWITCH_LB_HASH_NO_SYMMETRICAL_FIELD, 118 } dnx_switch_lb_hash_symmetrical_e; 119 120 /* 121 * } 122 */ 123 /* 124 * Structures 125 * { 126 */ 127 /** 128 * \brief - 129 * LOAD_BALANCING_CRC_SELECTION tcam key fields 130 * To be used for loading a new entry or for searching 131 * for existing entry. 132 */ 133 typedef struct 134 { 135 /** 136 * 'Destination' field (21 bits. See "destination" field type in field_types_definition.xml) 137 */ 138 dnx_switch_ld_destination_t lb_destination; 139 /** 140 * 'Destination_mask' field (21 bits. See "destination" field type in field_types_definition.xml) 141 */ 142 dnx_switch_ld_destination_t lb_destination_mask; 143 /** 144 * 'Outlif_0' field (22 bits. See "glob_out_lif" field type in field_types_definition.xml) 145 */ 146 dnx_switch_lb_outlif_0_t outlif_0; 147 /** 148 * 'Outlif_0_mask' field (22 bits. See "glob_out_lif" field type in field_types_definition.xml) 149 */ 150 dnx_switch_lb_outlif_0_t outlif_0_mask; 151 } dnx_switch_lb_tcam_key_t; 152 /** 153 * \brief - 154 * LOAD_BALANCING_CRC_SELECTION tcam result fields 155 * To be used for loading a new entry or for reading 156 * an existing entry. 157 */ 158 typedef struct 159 { 160 /** 161 * 'CLIENT_x_CRC_16_SEL' field (3 bits. See "destination" field type in field_types_definition.xml) 162 * repeated 5 times, one per client. 163 */ 164 uint32 client_x_crc_16_sel[DNX_DATA_MAX_SWITCH_LOAD_BALANCING_NOF_LB_CLIENTS]; 165 } dnx_switch_lb_tcam_result_t; 166 /** 167 * \brief - 168 * LOAD_BALANCING_RESERVED_LABELS register fields 169 * To be used for loading the various controls on how to 170 * handle reserved MPLS labels and the first label following a reserved 171 * label. 172 * \remark - 173 * This register is only loaded at initialization stage. 174 */ 175 typedef struct 176 { 177 /** 178 * Bitmap. Only the LS 16 bits count. 179 * There are 16 MPLS reserved labels. 180 * Each bit indicates whether corresponding reserved label is to be 181 * included into load balancing calculation. 182 */ 183 uint16 reserved_current_label_indication; 184 /** 185 * Bitmap. Only the LS 16 bits count. 186 * There are 16 MPLS reserved labels. 187 * Each bit indicates whether corresponding reserved label is to be 188 * forced into load balancing calculation even if it was terminated. 189 */ 190 uint16 reserved_current_label_force_layer; 191 /** 192 * Bitmap. Only the LS 16 bits count. 193 * There are 16 MPLS reserved labels. 194 * Each bit indicates whether label following corresponding reserved label 195 * is to be forced into load balancing calculation even if it was terminated. 196 */ 197 uint16 reserved_next_label_indication; 198 /** 199 * Bitmap. Only the LS 16 bits count. 200 * There are 16 MPLS reserved labels. 201 * This field is redundant and must be set the same as 'reserved_next_label_indication'. 202 */ 203 uint16 reserved_next_label_valid; 204 } dnx_switch_lb_mpls_reserved_t; 205 /** 206 * \brief - 207 * IPPB_MPLS_LABEL_CRC_32_SEEDS register fields 208 * and 209 * IPPE_PRSE_LOAD_BALANCING_SEED register fields 210 * To be used for loading the seeds for crc functions used by 211 * the two MPLS stacks and the parser. Each is 32-bits wide. 212 * \remark - 213 * None 214 */ 215 typedef struct 216 { 217 /** 218 * 32-bits seed for crc to be used by the first MPLS stack. 219 */ 220 uint32 mpls_stack_0; 221 /** 222 * 32-bits seed for crc to be used by the second MPLS stack. 223 */ 224 uint32 mpls_stack_1; 225 /** 226 * 32-bits seed for crc to be used by the second MPLS stack(terminated layer).Only for supported devices. 227 */ 228 uint32 mpls_stack_2; 229 /** 230 * 32-bits seed for crc to be used by the second MPLS stack(unterminated layer).Only for supported devices. 231 */ 232 uint32 mpls_stack_3; 233 /** 234 * 32-bits seed for crc to be used by the parser. 235 */ 236 uint32 parser; 237 } dnx_switch_lb_general_seeds_t; 238 /** 239 * \brief - 240 * MPLS_LAYER_IDENTIFICATION_BITMAP_CFG register fields 241 * To be used for loading the identification of MPLS 242 * protocols. To be used by FWD hw. 243 * \remark - 244 * This register is only loaded at initialization stage. 245 * \see - 246 * dbal_enum_value_field_current_protocol_type_e 247 * DBAL_ENUM_FVAL_CURRENT_PROTOCOL_TYPE_MPLS 248 */ 249 typedef struct 250 { 251 /** 252 * Bitmap of 32 bits. 253 * Contains the MPLS protocols identification (Each protocol has a five-bits number). 254 * The bits, which are set, identify MPLS protocols to FWD hw. 255 */ 256 uint32 mpls_identification; 257 } dnx_switch_lb_mpls_identification_t; 258 259 /** 260 * \brief - 261 * Structure used as input to: 262 * dnx_switch_load_balancing_lsms_crc_select_set 263 * dnx_switch_load_balancing_lsms_crc_select_get 264 * Used for set/get on IPPB_LB_CLIENTS_CRC_32_BITS_SELECTION_BITMAP register fields 265 * \remark - 266 * Note that the 'lb_selection_bit_map' element is used 267 * both as input (on 'set') and as output (on 'get'). 268 * \see - 269 * IPPB_LB_CLIENTS_CRC_32_BITS_SELECTION_BITMAP 270 * DBAL_TABLE_LOAD_BALANCING_CLIET_FWD_BIT_SEL 271 */ 272 typedef struct 273 { 274 /* 275 * Identifier of load balancing client for which 'selection_bit_map' is 276 * to be set (or for 'get' operation). 277 */ 278 uint8 lb_client; 279 /** 280 * Value of selection bitmap to 'load into' (or 'retrieve from') hw 281 * register. The selection bitmap is an 8 bits value (one per layer record). 282 */ 283 uint16 lb_selection_bit_map; 284 } dnx_switch_lb_lsms_crc_select_t; 285 286 /* 287 * } 288 */ 289 /* 290 * Prototypes 291 * { 292 */ 293 /** 294 * \brief - Initialize LOAD_BALANCING module (under SWITCH). \n 295 * 296 * \par DIRECT_INPUT: 297 * \param [in] unit - Unit-ID 298 * \par INDIRECT INPUT: 299 * \par DIRECT OUTPUT: 300 * shr_error_e 301 */ 302 shr_error_e dnx_switch_load_balancing_module_init( 303 int unit); 304 305 /** 306 * \brief 307 * Given physical identifier of load-balancing client (as per IPPB_LOAD_BALANCING_CRC_SELECTION_CAM), 308 * get the corresponding logical client identifier (from bcm_switch_control_t). 309 * Currently, there are 5 clients: 310 * bcmSwitchECMPHashConfig (Phys. LB client 0) 311 * bcmSwitchECMPSecondHierHashConfig (Phys. LB client 1) 312 * bcmSwitchECMPThirdHierHashConfig (Phys. LB client 2) 313 * bcmSwitchTrunkHashConfig (Phys. LB client 3) 314 * bcmSwitchNwtworkHashConfig (Phys. LB client 4) 315 * Physical-logical correspondence is stored in 'data'. 316 * \param [in] unit - 317 * Identifier of HW platform. 318 * \param [in] physical_client - 319 * Physical identifier of LB client, as used in IPPB_LOAD_BALANCING_CRC_SELECTION_CAM. 320 * \param [out] logical_client_p - 321 * Pointer to element of enum of type bcm_switch_control_t. This procedure loads pointed memory 322 * by the logical identifier of the client. High level users relate to logical identifiers only. 323 * \return 324 * \retval Zero - On success 325 * \retval Error - Identifier as per shr_error_e 326 * \remark 327 * None 328 * \see 329 * * bcm_switch_control_t 330 * * bcm_dnx_switch_control_indexed_set 331 */ 332 shr_error_e dnx_switch_lb_physical_client_to_logical( 333 int unit, 334 uint32 physical_client, 335 bcm_switch_control_t * logical_client_p); 336 /** 337 * \brief 338 * Given logical identifier of load-balancing client (from bcm_switch_control_t), 339 * get the corresponding physical client identifier (as per IPPB_LOAD_BALANCING_CRC_SELECTION_CAM). 340 * Currently, there are 5 clients: 341 * bcmSwitchECMPHashConfig (Phys. LB client 0) 342 * bcmSwitchECMPSecondHierHashConfig (Phys. LB client 1) 343 * bcmSwitchECMPThirdHierHashConfig (Phys. LB client 2) 344 * bcmSwitchTrunkHashConfig (Phys. LB client 3) 345 * bcmSwitchNwtworkHashConfig (Phys. LB client 4) 346 * Physical-logical correspondence is stored in 'data'. 347 * \param [in] unit - 348 * Identifier of HW platform. 349 * \param [in] logical_client_in - 350 * Logical identifier of LB client, element of enum of type bcm_switch_control_t. 351 * High level users relate to logical identifiers only. 352 * \param [out] physical_client_p - 353 * Pointer to uint32. This procedure loads pointed memory by the physical identifier, 354 * (as used in IPPB_LOAD_BALANCING_CRC_SELECTION_CAM) of the client. 355 * \return 356 * \retval Zero - On success 357 * \retval Error - Identifier as per shr_error_e 358 * \remark 359 * None 360 * \see 361 * * bcm_switch_control_t 362 * * bcm_dnx_switch_control_indexed_set 363 */ 364 shr_error_e dnx_switch_lb_logical_client_to_physical( 365 int unit, 366 bcm_switch_control_t logical_client_in, 367 uint32 *physical_client_p); 368 /** 369 * \brief 370 * Given 'switch_control' enumeration (as per bcm_switch_control_t), 371 * get the corresponding string. 372 * Note that we are using, in DNX, a definition from BCM. This is because 373 * bcm_switch_control_t is also considered a DNX enumeration (to avoid doubling 374 * it). 375 * \param [in] unit - 376 * Identifier of HW platform. 377 * \param [in] switch_control - 378 * Numerical identifier within the enumerator 'bcm_switch_control_t'. 379 * \param [out] name_p - 380 * Pointer to pointer to string. This procedure loads pointed memory by the 381 * pointer to the string that is the identifier of 'switch_control' as taken 382 * from 'bcm_switch_control_t'. 383 * \return 384 * \retval Zero - On success 385 * \retval Error - Identifier as per shr_error_e 386 * \remark 387 * None 388 * \see 389 * * bcm_switch_control_t 390 * * dnx_switch_load_balancing_tcam_info_set 391 */ 392 shr_error_e dnx_switch_control_t_name( 393 int unit, 394 bcm_switch_control_t switch_control, 395 char **name_p); 396 /** 397 * \brief 398 * Given string representation enumeration 'bcm_switch_control_t', 399 * get the corresponding numeric value. On the input string, the prefix "bcmSwitch" 400 * is assumed to be omitted. 401 * Note that we are using, in DNX, a definition from BCM. This is because 402 * bcm_switch_control_t is also considered a DNX enumeration (to avoid doubling 403 * it). 404 * \param [in] unit - 405 * Identifier of HW platform. 406 * \param [in] switch_control_name_p - 407 * String identifier within the enumerator 'bcm_switch_control_t'. 408 * \param [out] value_p - 409 * This procedure loads pointed memory by numeric value corresponding to input 410 * string identifier. 411 * \return 412 * \retval Zero if no error was detected 413 * \retval Negative if error was detected. See \ref shr_error_e 414 * \remark 415 * None 416 * \see 417 * * bcm_switch_control_t 418 * * appl_dnx_load_balancing_starter 419 */ 420 shr_error_e dnx_switch_control_t_value( 421 int unit, 422 char *switch_control_name_p, 423 uint32 *value_p); 424 /** 425 * \brief 426 * Initialize TCAM logical key structure of type 'dnx_switch_lb_tcam_key_t'. 427 * \param [in] unit - 428 * Identifier of HW platform. 429 * \param [out] tcam_key_p - 430 * Pointer to structure of type 'dnx_switch_lb_tcam_key_t'. This procedure loads 431 * pointed structure by default values (all 0) 432 * \return 433 * \retval Zero if no error was detected 434 * \retval Negative if error was detected. See \ref shr_error_e 435 * \see 436 */ 437 shr_error_e dnx_switch_lb_tcam_key_t_init( 438 int unit, 439 dnx_switch_lb_tcam_key_t * tcam_key_p); 440 /** 441 * \brief 442 * Initialize TCAM logical result structure of type 'dnx_switch_lb_tcam_result_t'. 443 * \param [in] unit - 444 * Identifier of HW platform. 445 * \param [out] tcam_result_p - 446 * Pointer to structure of type 'dnx_switch_lb_tcam_result_t'. This procedure loads 447 * pointed structure by default values (all 0) 448 * \return 449 * \retval Zero if no error was detected 450 * \retval Negative if error was detected. See \ref shr_error_e 451 * \see 452 */ 453 shr_error_e dnx_switch_lb_tcam_result_t_init( 454 int unit, 455 dnx_switch_lb_tcam_result_t * tcam_result_p); 456 /** 457 * \brief 458 * Set (write to HW) the single field of MPLS_LAYER_IDENTIFICATION_BITMAP_CFG table. 459 * This field relates to identifying MPLS protocols to FWD hw. 460 * \param [in] unit - 461 * Identifier of HW platform. 462 * \param [in] mpls_identification_p - 463 * Pointer to structure of type dnx_switch_lb_mpls_identification_t which 464 * contains the single field 'MPLS_BIT_IDENTIFIER'. It is a bitmaps of 32 bits. 465 * The bits set will indicate, to HW, the identification of MPLS protocols. 466 * \return 467 * \retval Zero if no error was detected 468 * \retval Negative if error was detected. See \ref shr_error_e 469 * \remark 470 * None 471 * \see 472 * * dnx_switch_lb_mpls_identification_t 473 * * dnx_switch_load_balancing_mpls_identification_get 474 * * dbal_enum_value_field_current_protocol_type_e 475 */ 476 shr_error_e dnx_switch_load_balancing_mpls_identification_set( 477 int unit, 478 dnx_switch_lb_mpls_identification_t * mpls_identification_p); 479 /** 480 * \brief 481 * Get (read from HW) the single field of MPLS_LAYER_IDENTIFICATION_BITMAP_CFG table. 482 * This field relates to identifying MPLS protocols to ingress FWD hw 483 * bllock. 484 * \param [in] unit - 485 * Identifier of HW platform. 486 * \param [in] mpls_identification_p - 487 * Pointer to structure of type dnx_switch_lb_mpls_identification_t. This 488 * procedure loads the single field 'MPLS_BIT_IDENTIFIER' into its place. It 489 * is a bitmaps of 32 bits. The bits set will indicate, to HW, the 490 * identification of MPLS protocols. 491 * \return 492 * \retval Zero if no error was detected 493 * \retval Negative if error was detected. See \ref shr_error_e 494 * \remark 495 * None 496 * \see 497 * * dnx_switch_lb_mpls_identification_t 498 * * dnx_switch_load_balancing_mpls_identification_set 499 * * dbal_enum_value_field_current_protocol_type_e 500 */ 501 shr_error_e dnx_switch_load_balancing_mpls_identification_get( 502 int unit, 503 dnx_switch_lb_mpls_identification_t * mpls_identification_p); 504 /** 505 * \brief 506 * Set (write to HW) all fields of LOAD_BALANCING_GENERAL_SEEDS table. 507 * All fields relate to load-balancing handling of general crc seeds 508 * for MPLS stack 0 and 1 and for parser. 509 * Essentially, one single register is involved. 510 * \param [in] unit - 511 * Identifier of HW platform. 512 * \param [in] general_seeds_p - 513 * Pointer to structure of type dnx_switch_lb_general_seeds_t which contains 514 * all 3 fields to load. Each field is of 32 bits. 515 * \return 516 * \retval Zero if no error was detected 517 * \retval Negative if error was detected. See \ref shr_error_e 518 * \remark 519 * For now, IPPE_PRSE_LOAD_BALANCING_SEED has not been included in the 520 * register file and, therefore, is not accessed. 521 * See IPPE_PRSE_LOAD_BALANCING_SEED_IS_INCLUDED. 522 * \see 523 * * dnx_switch_lb_general_seeds_t 524 * * dnx_switch_load_balancing_general_seeds_get 525 * * IPPE_PRSE_LOAD_BALANCING_SEED_IS_INCLUDED 526 */ 527 shr_error_e dnx_switch_load_balancing_general_seeds_set( 528 int unit, 529 dnx_switch_lb_general_seeds_t * general_seeds_p); 530 /** 531 * \brief 532 * Get (read from HW) all fields of LOAD_BALANCING_GENERAL_SEEDS table. 533 * All fields relate to load-balancing handling of general crc seeds 534 * for MPLS stack 0 and 1 and for parser. 535 * Essentially, one single register is involved. 536 * \param [in] unit - 537 * Identifier of HW platform. 538 * \param [in] general_seeds_p - 539 * Pointer to structure of type dnx_switch_lb_general_seeds_t which is 540 * loaded, by this procedure, by all 3 fields to load. Each field is 541 * of 32 bits. 542 * \return 543 * \retval Zero if no error was detected 544 * \retval Negative if error was detected. See \ref shr_error_e 545 * \remark 546 * For now, IPPE_PRSE_LOAD_BALANCING_SEED has not been included in the 547 * register file and, therefore, is not accessed. 548 * See IPPE_PRSE_LOAD_BALANCING_SEED_IS_INCLUDED. 549 * \see 550 * * dnx_switch_lb_general_seeds_t 551 * * dnx_switch_load_balancing_general_seeds_set 552 * * IPPE_PRSE_LOAD_BALANCING_SEED_IS_INCLUDED 553 */ 554 shr_error_e dnx_switch_load_balancing_general_seeds_get( 555 int unit, 556 dnx_switch_lb_general_seeds_t * general_seeds_p); 557 /** 558 * \brief 559 * Set (write to HW) all fields of LOAD_BALANCING_RESERVED_LABELS table. 560 * All fields relate to load-balancing handling of reserved MPLS labels. 561 * Essentially, one single register is involved. 562 * \param [in] unit - 563 * Identifier of HW platform. 564 * \param [in] mpls_reserved_p - 565 * Pointer to structure of type dnx_switch_lb_mpls_reserved_t which contains 566 * all 4 fields to load. Each field is a bitmaps of 16 bits. 567 * Note that third and fourth elements must be equal. 568 * \return 569 * \retval Zero if no error was detected 570 * \retval Negative if error was detected. See \ref shr_error_e 571 * \remark 572 * None 573 * \see 574 * * dnx_switch_lb_mpls_reserved_t 575 * * dnx_switch_load_balancing_mpls_reserved_label_get 576 */ 577 shr_error_e dnx_switch_load_balancing_mpls_reserved_label_set( 578 int unit, 579 dnx_switch_lb_mpls_reserved_t * mpls_reserved_p); 580 /** 581 * \brief 582 * Get (read from HW) all fields of LOAD_BALANCING_RESERVED_LABELS table. 583 * All fields relate to load-balancing handling of reserved MPLS labels. 584 * Essentially, one single register is involved. 585 * \param [in] unit - 586 * Identifier of HW platform. 587 * \param [in] mpls_reserved_p - 588 * Pointer to structure of type dnx_switch_lb_mpls_reserved_t. This procedure 589 * loads it with all 4 fields . Each field is a bitmaps of 16 bits. 590 * Note that third and fourth elements should be equal. 591 * \return 592 * \retval Zero if no error was detected 593 * \retval Negative if error was detected. See \ref shr_error_e 594 * \remark 595 * None 596 * \see 597 * * dnx_switch_lb_mpls_reserved_t 598 * * dnx_switch_load_balancing_mpls_reserved_label_set 599 */ 600 shr_error_e dnx_switch_load_balancing_mpls_reserved_label_get( 601 int unit, 602 dnx_switch_lb_mpls_reserved_t * mpls_reserved_p); 603 604 /** 605 * \brief 606 * Convert between a CRC enumeration value into the matching HW value. 607 * \param [in] unit - 608 * Identifier of HW platform. 609 * \param [in] crc_enum_value - 610 * The CRC enumeration value 611 * \param [out] hw_val - 612 * The matching HW value of the incoming enumeration value. 613 * \return 614 * \retval Zero if no error was detected 615 * \retval Negative if error was detected. See \ref shr_error_e 616 * \remark 617 * \see 618 */ 619 shr_error_e dnx_switch_load_balancing_crc_function_enum_to_hw_get( 620 int unit, 621 bcm_switch_hash_config_t crc_enum_value, 622 uint32 *hw_val); 623 624 /** 625 * \brief 626 * Convert between a CRC HW value into the matching enumeration value . 627 * \param [in] unit - 628 * Identifier of HW platform. 629 * \param [in] hw_val - 630 * The CRC function HW value 631 * \param [out] crc_enum_value - 632 * The matching enumeration value of the incoming HW value. 633 * \return 634 * \retval Zero if no error was detected 635 * \retval Negative if error was detected. See \ref shr_error_e 636 * \remark 637 * \see 638 */ 639 shr_error_e dnx_switch_load_balancing_crc_function_hw_to_enum_get( 640 int unit, 641 uint32 hw_val, 642 bcm_switch_hash_config_t * crc_enum_value); 643 644 /** 645 * \brief 646 * Set (write to HW) a LOAD_BALANCING_CRC_SELECTION TCAM entry. 647 * Caller indicated which entry to load and, also, the key, mask, data 648 * and 'valid' indication. 649 * \param [in] unit - 650 * Identifier of HW platform. 651 * \param [in] index - 652 * TCAM index (entry ID) 653 * \param [in] tcam_key_p - 654 * Pointer to structure. LOAD_BALANCING_CRC_SELECTION TCAM key ('destination', 'outlif_0', ...) 655 * \param [in] tcam_result_p - 656 * Pointer to structure. LOAD_BALANCING_CRC_SELECTION TCAM result (Array of 657 * 'crc selection', one per client). 658 * Note that each of the clients must have a unique crc select value. For example, 659 * if clinet '0' selects crc function '4' then no other client may use crc function '4'. 660 * \param [in] tcam_valid - 661 * LOAD_BALANCING_CRC_SELECTION TCAM valid indication. If caller 662 * sets this input to '0' then entry becomes invalid (erased) 663 * \return 664 * \retval Zero if no error was detected 665 * \retval Negative if error was detected. See \ref shr_error_e 666 * \remark 667 * This table, just like all other tables, in DBAL, is initialized to 'all 0' 668 * on standard power up sequence. So, at initialization, all tcam entries are 669 * configured to 'invalid' 670 * \see 671 * * bcm_switch_control_t 672 * * bcm_dnx_switch_control_indexed_set 673 */ 674 shr_error_e dnx_switch_load_balancing_tcam_info_set( 675 int unit, 676 int index, 677 dnx_switch_lb_tcam_key_t * tcam_key_p, 678 dnx_switch_lb_tcam_result_t * tcam_result_p, 679 dnx_switch_lb_valid_t tcam_valid); 680 /** 681 * \brief 682 * Get (write to HW) a LOAD_BALANCING_CRC_SELECTION TCAM entry. 683 * Caller indicated which entry to get. Retrievd info is: key, mask, result 684 * and 'valid' indication. 685 * \param [in] unit - 686 * Identifier of HW platform. 687 * \param [in] index - 688 * TCAM index (entry ID) 689 * \param [out] tcam_key_p - 690 * Pointer to structure of type dnx_switch_lb_tcam_key_t. This procedure 691 * load structure by LOAD_BALANCING_CRC_SELECTION TCAM key ('destination', 'outlif_0, ...) 692 * \param [out] tcam_result_p - 693 * Pointer to structure of type dnx_switch_lb_tcam_result_t. This procedure 694 * load structure by LOAD_BALANCING_CRC_SELECTION TCAM result (Array of 'crc selection', 695 * one per client) 696 * \param [out] tcam_valid_p - 697 * Pointer to dnx_switch_lb_valid_t. This procedure loads pointed memory by 698 * LOAD_BALANCING_CRC_SELECTION TCAM valid indication 699 * \return 700 * \retval Zero if no error was detected 701 * \retval Negative if error was detected. See \ref shr_error_e 702 * \see 703 * * bcm_switch_control_t 704 * * bcm_dnx_switch_control_indexed_set 705 */ 706 shr_error_e dnx_switch_load_balancing_tcam_info_get( 707 int unit, 708 int index, 709 dnx_switch_lb_tcam_key_t * tcam_key_p, 710 dnx_switch_lb_tcam_result_t * tcam_result_p, 711 dnx_switch_lb_valid_t * tcam_valid_p); 712 713 /** 714 * \brief 715 * Set (write to HW) selected crc seed on LOAD_BALANCING_CLIET_FWD_BIT_SEL table. 716 * \param [in] unit - 717 * Identifier of HW platform. 718 * \param [in] lsms_crc_select_p - 719 * Pointer to structure of type dnx_switch_lb_lsms_crc_select_t which contains 720 * the identifier of the selected client (lb_client) and 721 * the bit-map itself, used for selection of MS/LS bits for hashing (lb_selection_bit_map). 722 * Identifier must be smaller than the number of supported clients (5). 723 * Bit map may have bits set only from BIT(0) to BIT(7) (incl.). All other bits 724 * must be set to zero. See dnx_data_switch.load_balancing.nof_layer_records_from_parser 725 * \return 726 * \retval Zero if no error was detected 727 * \retval Negative if error was detected. See \ref shr_error_e 728 * \remark 729 * None 730 * \see 731 * * dnx_switch_lb_lsms_crc_select_t 732 * * dnx_switch_load_balancing_lsms_crc_select_get 733 * * dnx_data_switch.load_balancing.nof_layer_records_from_parser 734 * * dnx_data_switch.load_balancing.nof_lb_clients 735 * * IPPB_LB_CLIENTS_CRC_32_BITS_SELECTION_BITMAP 736 * * LB_CLIENTS_CRC_32_BITS_SELECTION_BITMAP_N 737 */ 738 shr_error_e dnx_switch_load_balancing_lsms_crc_select_set( 739 int unit, 740 dnx_switch_lb_lsms_crc_select_t * lsms_crc_select_p); 741 /** 742 * \brief 743 * Get (Read from HW) selected crc seed on LOAD_BALANCING_CLIET_FWD_BIT_SEL table. 744 * \param [in] unit - 745 * Identifier of HW platform. 746 * \param [in] lsms_crc_select_p - 747 * Pointer to structure of type dnx_switch_lb_lsms_crc_select_t which contains 748 * the identifier of the selected client (lb_client) 749 * as input, and container to get the corresponding bit-map itself, used for 750 * selection of MS/LS bits for hashing (lb_selection_bit_map), 751 * as output. 752 * Identifier must be smaller than the number of supported clients (5). 753 * \return 754 * \retval Zero if no error was detected 755 * \retval Negative if error was detected. See \ref shr_error_e 756 * \remark 757 * None 758 * \see 759 * * dnx_switch_lb_lsms_crc_select_t 760 * * dnx_switch_load_balancing_lsms_crc_select_set 761 * * dnx_data_switch.load_balancing.nof_layer_records_from_parser 762 * * dnx_data_switch.load_balancing.nof_lb_clients 763 */ 764 shr_error_e dnx_switch_load_balancing_lsms_crc_select_get( 765 int unit, 766 dnx_switch_lb_lsms_crc_select_t * lsms_crc_select_p); 767 /** 768 * \brief 769 * Set (write to HW) selected crc seed on LOAD_BALANCING_CRC_SEEDS table. 770 * \param [in] unit - 771 * Identifier of HW platform. 772 * \param [in] crc_hw_function_index - 773 * The CRC function index in the HW of the seed that is about to be updated. 774 * \param [in] lb_crc_seed - 775 * The new seed value of the provided CRC function. 776 * \return 777 * \retval Zero if no error was detected 778 * \retval Negative if error was detected. See \ref shr_error_e 779 * \remark 780 * None 781 * \see 782 * * dnx_switch_lb_crc_seed_t 783 * * dnx_switch_load_balancing_crc_seed_get 784 */ 785 shr_error_e dnx_switch_load_balancing_crc_seed_set( 786 int unit, 787 uint32 crc_hw_function_index, 788 uint16 lb_crc_seed); 789 /** 790 * \brief 791 * Get (read from HW) selected crc seed on LOAD_BALANCING_CRC_SEEDS table. 792 * \param [in] unit - 793 * Identifier of HW platform. 794 * \param [in] crc_hw_function_index - 795 * The CRC function index in the HW of the seed that is about to be received. 796 * \param [out] lb_crc_seed - 797 * The seed of the requested CRC function. 798 * \return 799 * \retval Zero if no error was detected 800 * \retval Negative if error was detected. See \ref shr_error_e 801 * \remark 802 * None 803 * \see 804 * * dnx_switch_lb_crc_seed_t 805 * * dnx_switch_load_balancing_crc_seed_set 806 */ 807 shr_error_e dnx_switch_load_balancing_crc_seed_get( 808 int unit, 809 uint32 crc_hw_function_index, 810 uint16 *lb_crc_seed); 811 812 /** 813 * \brief 814 * Set a nibble (that follow an MPLS BOS) to speculate a protocol. 815 * \param [in] unit - 816 * The unit number. 817 * \param [in] nibble - 818 * The nibble to set the speculation protocol to. 819 * \param [in] protocol - 820 * The speculative protocol. 821 * \return 822 * \retval Zero if no error was detected 823 * \retval Negative if error was detected. See \ref shr_error_e 824 * \remark 825 * None 826 * \see 827 */ 828 shr_error_e dnx_switch_load_balancing_nibble_speculation_set( 829 int unit, 830 int nibble, 831 bcm_switch_mpls_next_protocol_t protocol); 832 /** 833 * \brief 834 * get a nibble (that follow an MPLS BOS) speculate a protocol. 835 * \param [in] unit - 836 * The unit number. 837 * \param [in] nibble - 838 * The nibble value that is speculated by. 839 * \param [out] protocol - 840 * The speculative protocol. 841 * \return 842 * \retval Zero if no error was detected 843 * \retval Negative if error was detected. See \ref shr_error_e 844 * \remark 845 * None 846 * \see 847 */ 848 shr_error_e dnx_switch_load_balancing_nibble_speculation_get( 849 int unit, 850 int nibble, 851 bcm_switch_mpls_next_protocol_t * protocol); 852 853 /** 854 * \brief - Set the header fields that can be part of the construction of an LB key 855 * according to the user masking option. 856 * 857 * \param [in] unit - Relevant unit. 858 * \param [in] type - The type of header to be masked. 859 * \param [in] mask - The mask of the selected header 860 * \return 861 * Error indication according to shr_error_e enum 862 * 863 * \remark 864 * None 865 * \see 866 * * None 867 */ 868 shr_error_e dnx_switch_control_load_balancing_hash_fields_masking_set( 869 int unit, 870 bcm_switch_control_t type, 871 uint32 mask); 872 873 /** 874 * \brief - return the mask option that determine the header fields that can be part of the construction of an LB key. 875 * 876 * \param [in] unit - Relevant unit. 877 * \param [in] type - The type of header to be masked. 878 * \param [out] mask - The mask of the selected header 879 * \return 880 * Error indication according to shr_error_e enum 881 * 882 * \remark 883 * None 884 * \see 885 * * None 886 */ 887 shr_error_e dnx_switch_control_load_balancing_hash_fields_masking_get( 888 int unit, 889 bcm_switch_control_t type, 890 uint32 *mask); 891 892 /* 893 * } 894 */ 895 /* } */ 896 #endif /* SWITCH_LOAD_BALANCING_H_INCLUDED */