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kbp_recover.h (2850B)

      1 /** \file kbp_recover.h
      2  *
      3  * Functions and defines for handling jericho2 kbp recover sequence.
      4  */
      5 /*
      6  * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file.
      7  * 
      8  * Copyright 2007-2020 Broadcom Inc. All rights reserved.
      9  */
     10 #if defined(INCLUDE_KBP)
     11 
     12 #ifndef _KBP_RECOVER_INCLUDED__
     13 /*
     14  * {
     15  */
     16 
     17 #define _KBP_RECOVER_INCLUDED__
     18 
     19 /*************
     20  * INCLUDES  *
     21  */
     22 /*
     23  * {
     24  */
     25 
     26 /*
     27  * }
     28  */
     29 
     30 /*************
     31  * DEFINES   *
     32  */
     33 /*
     34  * {
     35  */
     36 
     37 #define DNX_KBP_CLAUSE45_ADDR(devad, regad)     \
     38             ((((devad) & 0x3F) << 16) |          \
     39              ((regad) & 0xFFFF))
     40 
     41 #define DNX_KBP_TX_PCS_EN_REG    (0xF00F)
     42 
     43 #define DNX_KBP_TX_PHASE_MATCHING_FIFO_CTRL_QUAD0_REG    (0xF160)
     44 #define DNX_KBP_TX_PHASE_MATCHING_FIFO_CTRL_QUAD1_REG    (0xF161)
     45 #define DNX_KBP_TX_PHASE_MATCHING_FIFO_CTRL_QUAD2_REG    (0xF162)
     46 #define DNX_KBP_TX_PHASE_MATCHING_FIFO_CTRL_QUAD3_REG    (0xF163)
     47 #define DNX_KBP_TX_PHASE_MATCHING_FIFO_CTRL_QUAD4_REG    (0xF164)
     48 #define DNX_KBP_TX_PHASE_MATCHING_FIFO_CTRL_QUAD5_REG    (0xF165)
     49 #define DNX_KBP_TX_PHASE_MATCHING_FIFO_CTRL_QUAD6_REG    (0xF166)
     50 #define DNX_KBP_TX_PHASE_MATCHING_FIFO_CTRL_QUAD7_REG    (0xF167)
     51 #define DNX_KBP_TX_PHASE_MATCHING_FIFO_CTRL_QUAD8_REG    (0xF168)
     52 
     53 #define DNX_KBP_TX_PHASE_MATCHING_FIFO_IN_RESET_VAL    (0x3037)
     54 #define DNX_KBP_TX_PHASE_MATCHING_FIFO_OUT_OF_RESET_VAL    (0x3035)
     55 
     56 #define DNX_KBP_RECOVER_LINK_UP_LOOP_TIMES    (0x64)
     57 #define DNX_KBP_RECORD_REPLY_VALID_CHECK_TIMES    (5)
     58 
     59 /*OP2 register*/
     60 #define DNX_KBP_RX_LINK_CTRL_REG    (0x3002)
     61 #define DNX_KBP_TX_LINK_CTRL_REG    (0x7002)
     62 
     63 #define DNX_KBP_FEC_CTRL_REG        (0xF807)
     64 #define DNX_KBP_RX_TX_PCS_CTRL_REG  (0xF801)
     65 #define DNX_KBP_CDR_STATUS_REG      (0xF822)
     66 #define DNX_KBP_LINKUP_STATUS_REG   (0x2829)
     67 
     68 #define DNX_KBP_PHMF_FIFO_CTRL_REG  (0xF852)
     69 
     70 #define DNX_KBP_CLEAR_ERR_0_CTRL_REG  (0x2850)
     71 #define DNX_KBP_CLEAR_ERR_0_1_CTRL_REG  (0x2851)
     72 #define DNX_KBP_CLEAR_ERR_1_CTRL_REG  (0x2003)
     73 #define DNX_KBP_CLEAR_ERR_2_CTRL_REG  (0xF806)
     74 #define DNX_KBP_CLEAR_ERR_3_CTRL_REG  (0x10)
     75 
     76 /*
     77  * }
     78  */
     79 /*************
     80  * MACROS    *
     81  */
     82 /*
     83  * {
     84  */
     85 
     86 /*
     87  * }
     88  */
     89 
     90 /*************
     91  * ENUMS     *
     92  */
     93 /*
     94  * {
     95  */
     96 
     97 /*
     98  * }
     99  */
    100 
    101 /*************
    102  * GLOBALS   *
    103  */
    104 /*
    105  * {
    106  */
    107 /*
    108  * }
    109  */
    110 /*************
    111  * FUNCTIONS *
    112  */
    113 /*
    114  * {
    115  */
    116 shr_error_e dnx_kbp_recover_run_recovery_sequence(
    117     int unit,
    118     uint32 core,
    119     uint32 mdio_id);
    120 
    121 shr_error_e dnx_kbp_phase_matching_fifo_reset(
    122     int unit,
    123     uint32 mdio_id,
    124     int kbp_port_id,
    125     int reset);
    126 
    127 shr_error_e dnx_kbp_op_link_stability_check(
    128     int unit,
    129     uint32 core,
    130     uint32 kbp_mdio_id,
    131     uint32 retries);
    132 
    133 shr_error_e dnx_kbp_device_interface_enable_link(
    134     int unit,
    135     uint32 enable);
    136 
    137 /*
    138  * }
    139  */
    140 #endif /* __KBP_RECOVER_INCLUDED__ */
    141 #endif /* defined(INCLUDE_KBP) */