init.h (27472B)
1 /** \file bcm_int/dnx/init/init.h 2 * 3 * Internal DNX INIT APIs 4 */ 5 6 /* 7 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 8 * 9 * Copyright 2007-2020 Broadcom Inc. All rights reserved. 10 */ 11 12 #ifndef _BCMINT_DNX_INIT_INIT_H_INCLUDED 13 /* 14 * { 15 */ 16 #define _BCMINT_DNX_INIT_INIT_H_INCLUDED 17 18 #ifndef BCM_DNX_SUPPORT 19 #error "This file is for use by DNX (JR2) family only!" 20 #endif 21 22 #include <shared/shrextend/shrextend_debug.h> 23 #include <shared/utilex/utilex_seq.h> 24 #include <sal/core/time.h> 25 26 /** 27 * Default time threshold (in microseconds) for the time each 28 * step is taking during init. This value was chosen because the 29 * majority of the steps are below it. For steps that are 30 * expected to be above the default, an explicit threshold can be 31 * set or DNX Data can be used. 32 */ 33 #define BCM_INIT_STEP_TIME_THRESH_DEFAULT 100000 34 35 /* 36 * Dynamic or internal flag which are recieved by the flag CB. developer can use them to write his flag CBs. 37 * when inserting a new sub-list to the init sequence the STEP_IS_LIST flag should be used. in each flag CB the developer 38 * is expected to use the SKIP flag according to a logic which is internal to his module, the flag CB should assign those 39 * flags according to SOC properties (for example if soc property trunk_disable is set, the CB should set the skip flag to dynamic_flags). 40 */ 41 /** 42 * Skip step 43 */ 44 #define DNX_INIT_STEP_F_SKIP UTILEX_SEQ_STEP_F_SKIP 45 46 /** 47 * Print in verbose level 48 */ 49 #define DNX_INIT_STEP_F_VERBOSE UTILEX_SEQ_STEP_F_VERBOSE 50 51 /** 52 * Skip Step due to WB 53 */ 54 #define DNX_INIT_STEP_F_WB_SKIP UTILEX_SEQ_STEP_F_WB_SKIP 55 /** 56 * Allow writing to registers and changing SW state 57 */ 58 #define DNX_INIT_STEP_F_WB_DISABLE_CHECKS UTILEX_SEQ_STEP_F_WB_DISABLE_CHECKS 59 /** 60 * \brief step required for access only initalization (allow lite inializtion with access only) 61 */ 62 #define DNX_INIT_STEP_F_REQUIRED_FOR_ACCESS_ONLY UTILEX_SEQ_STEP_F_REQUIRED_FOR_ACCESS_ONLY 63 /** 64 * \brief step required for access only (including per port access) initalization (allow lite with access only) 65 */ 66 #define DNX_INIT_STEP_F_REQUIRED_FOR_PORT_ACCESS_ONLY UTILEX_SEQ_STEP_F_REQUIRED_FOR_PORT_ACCESS_ONLY 67 /** 68 * \brief step required for minimal startup supporting phy enable 69 */ 70 #define DNX_INIT_STEP_F_REQUIRED_FOR_HEAT_UP UTILEX_SEQ_STEP_F_REQUIRED_FOR_HEAT_UP 71 72 /** 73 * \brief Allow running this step as a stand-alone 74 */ 75 #define DNX_INIT_STEP_F_STANDALONE_EN UTILEX_SEQ_STEP_F_STANDALONE_EN 76 /** 77 * \brief 78 * Time threshold flags - used for testing how much time each step in the Init takes. 79 * If flag is set to PER_DEVICE the value will be taken from DNX data. THIS FLAG CAN NOT BE USED FOR STEPS BEFORE DNX DATA IS INITIALIZED 80 * If EXPLICIT flag is specified, the value will be taken from an array of the Step IDs and corresponding thresholds. It is user defined 81 * and allows to set a specific value for steps before the DNX Data initialization. 82 * If no flag is specified, default value will be assumed. 83 */ 84 #define DNX_INIT_STEP_F_TIME_THRESH_EXPLICIT UTILEX_SEQ_STEP_F_TIME_THRESH_EXPLICIT 85 #define DNX_INIT_STEP_F_TIME_THRESH_PER_DEVICE UTILEX_SEQ_STEP_F_TIME_THRESH_PER_DEVICE 86 87 /** 88 * Skip memory test 89 */ 90 #define DNX_INIT_STEP_F_MEM_TEST_SKIP UTILEX_SEQ_STEP_F_MEM_TEST_SKIP 91 /** 92 * \brief 93 * Run the step in parallel on a seperate thread 94 */ 95 #define DNX_INIT_STEP_F_RUN_ON_THREAD UTILEX_SEQ_STEP_F_RUN_ON_THREAD 96 /** 97 * \brief 98 * Join all active seq threads before executing the current step 99 */ 100 #define DNX_INIT_STEP_F_JOIN_ALL_THREADS UTILEX_SEQ_STEP_F_JOIN_ALL_THREADS 101 102 /** 103 * \brief Maximal step name size 104 */ 105 #define DNX_INIT_STEP_NAME_SIZE (256) 106 107 /** 108 * The additional Header is UDP 1-7 109 */ 110 #define ADDITIONAL_HEADERS_UDP_SESSION_INDEX_MIN (1) 111 #define ADDITIONAL_HEADERS_UDP_SESSION_INDEX_MAX (8) 112 #define ADDITIONAL_HEADERS_UDP_USER_DEFINED(udp_index) (DBAL_ENUM_FVAL_ETPP_ADDITIONAL_HEADER_PROFILE_STACK_ATTRIBUTES_AHS_UDP_SESSION_8 + udp_index - 1) 113 114 /** 115 * \brief From where to take the data from FFC meta-data 116 */ 117 #define FFC_OFFSET 0 118 /** 119 * \brief Build PRT FFC_INSTRUCTION values 120 */ 121 #define BUILD_PRT_FFC(offset,width,ffc_width,input_offset,ffc_input_offset) \ 122 (((offset) << FFC_OFFSET) | \ 123 ((width) << (ffc_width)) | \ 124 ((input_offset) << (ffc_input_offset))) 125 126 /** 127 * \brief Describes the IDs for the different steps and 128 * sub-steps of the Init. each entry here needs to be 129 * aligned with DNX_INIT_STEP_NAME_STR below. 130 */ 131 typedef enum 132 { 133 /** 134 * Invalid Value, used to indicate to APIs that this input is 135 * not relevant 136 */ 137 DNX_INIT_STEP_INVALID_STEP = UTILEX_SEQ_STEP_INVALID, 138 /** 139 * Value used get the first step of the enum 140 */ 141 DNX_INIT_STEP_FIRST_STEP = UTILEX_SEQ_STEP_INVALID + 1, 142 /** 143 * Sub-list containing all TM modules 144 */ 145 DNX_INIT_STEP_TM_MODULES = DNX_INIT_STEP_FIRST_STEP, 146 /** 147 * Sub-list containing all PP modules 148 */ 149 DNX_INIT_STEP_PP_MODULES, 150 /** 151 * Init Schan 152 */ 153 DNX_INIT_STEP_SCHAN, 154 /** 155 * Init adapter reg access 156 */ 157 DNX_INIT_STEP_ADAPTER_REG_ACC, 158 /** 159 * Init device feature list 160 */ 161 DNX_INIT_STEP_FEATURE, 162 /** 163 * Init Info config 164 */ 165 DNX_INIT_STEP_INFO_CONFIG, 166 /** 167 * Init contorl structures. 168 */ 169 DNX_INIT_STEP_CONTROL, 170 /** 171 * Init needed mutexes. 172 */ 173 DNX_INIT_STEP_MUTEXES, 174 /** 175 * Init memory mutexes. 176 */ 177 DNX_INIT_STEP_MEM_MUTEX, 178 /** 179 * Init time analyzer. 180 */ 181 DNX_INIT_STEP_TIME_ANALYZER, 182 /** 183 * Init the MBCM. 184 */ 185 DNX_INIT_STEP_MBCM_INIT, 186 /** 187 * Init the dnx_defines - legacy step should be removed in the future. 188 */ 189 DNX_INIT_STEP_DEFINES_INIT, 190 /** 191 * Init the dnx_imp_defines - legacy step should be removed in the future. 192 */ 193 DNX_INIT_STEP_IMP_DEFINES_INIT, 194 /** 195 * Sub-list containing all Legacy Soc Steps, 196 * eventually this should be empty and canceled. 197 */ 198 DNX_INIT_STEP_LEGACY_SOC, 199 /** 200 * Init Dnx Data. 201 */ 202 DNX_INIT_STEP_DNX_DATA, 203 /** 204 * Init Error Recovery. 205 */ 206 DNX_INIT_STEP_ERROR_RECOVERY, 207 /** 208 * Init SW State. 209 */ 210 DNX_INIT_STEP_SW_STATE, 211 /** 212 * Init DBAL. 213 */ 214 DNX_INIT_STEP_DBAL, 215 /** 216 * Init Common Modules. 217 */ 218 DNX_INIT_STEP_COMMON_MODULES, 219 /** 220 * Init RX. 221 */ 222 DNX_INIT_STEP_RX, 223 /** 224 * Init TX. 225 */ 226 DNX_INIT_STEP_TX, 227 /** 228 * Restore Soc Control. 229 */ 230 DNX_INIT_STEP_RESTORE_SOC_CONTROL, 231 /** 232 * mark driver as not inited 233 */ 234 DNX_INIT_STEP_MARK_NOT_INITED, 235 /** 236 * init Done step, used to update relevant modules that the init 237 * was done 238 */ 239 DNX_INIT_STEP_INIT_DONE, 240 /** 241 * Configuration of the endianness 242 */ 243 DNX_INIT_STEP_ENDIANNESS_CONFIG, 244 /** 245 * Use polling for s-bus access 246 */ 247 DNX_INIT_STEP_POLLING, 248 /** 249 * Rings s-bus and broadcast blocks 250 */ 251 DNX_INIT_STEP_RING_CONFIG, 252 /** 253 * Configuring s-bus timeout and clear errors 254 */ 255 DNX_INIT_STEP_SBUS_TIMEOUT, 256 /** 257 * Iproc/PAXB configuration not configured earlier 258 */ 259 DNX_INIT_STEP_IPROC, 260 /** 261 * Making Hard Reset 262 */ 263 DNX_INIT_STEP_HARD_RESET, 264 /** 265 * Verifying core clock values. 266 */ 267 DNX_INIT_STEP_CORE_CLOCK_VERIFY, 268 /** 269 * Configuration of SBUS 270 */ 271 DNX_INIT_STEP_SBUS, 272 /** 273 * Configuration of the Soft reset 274 */ 275 DNX_INIT_STEP_SOFT_RESET, 276 /** 277 * DMA init/deinit 278 */ 279 DNX_INIT_STEP_DMA, 280 /** 281 * Configuration of the PLLs 282 */ 283 DNX_INIT_STEP_PLL_CONFIG, 284 /** 285 * Move s-bus access interrupts to be polled 286 */ 287 DNX_INIT_STEP_SBUS_INTERRUPTS, 288 /** 289 * Init of the BIST tests 290 */ 291 DNX_INIT_STEP_BIST_TESTS, 292 /** 293 * Set memory write masks to not mask 294 */ 295 DNX_INIT_STEP_MEM_MASKS, 296 /** 297 * Set the Broadcast configuration 298 */ 299 DNX_INIT_STEP_BRDC_CONFIG, 300 /** 301 * Pre-Sofr inializtion 302 */ 303 DNX_INIT_STEP_PRE_SOFT_INIT, 304 /** 305 * Making the Soft Init 306 */ 307 DNX_INIT_STEP_SOFT_INIT, 308 /** 309 * init access step list 310 */ 311 DNX_INIT_STEP_ACCESS, 312 /** 313 * init TS, BS, NIF and Fabric PLL 314 */ 315 DNX_INIT_STEP_PLL, 316 /** 317 * init Vlan Algo Res 318 */ 319 DNX_INIT_STEP_VLAN_ALGO_RES, 320 /** 321 * init STG Algo Res 322 */ 323 DNX_INIT_STEP_ALGO_STG, 324 /** 325 * init QOS Algo 326 */ 327 DNX_INIT_STEP_ALGO_QOS, 328 /** 329 * init TUNNEL Algo 330 */ 331 DNX_INIT_STEP_ALGO_TUNNEL, 332 /** 333 * Init algo instru 334 */ 335 DNX_INIT_STEP_ALGO_INSTRU, 336 /** 337 * init PP Multicast Algo 338 */ 339 DNX_INIT_STEP_ALGO_PPMC, 340 /** 341 * init SAT Algo Res 342 */ 343 DNX_INIT_STEP_ALGO_SAT, 344 /** 345 * Init algo template. 346 */ 347 DNX_INIT_STEP_ALGO_TEMPLATE, 348 /** 349 * init HW overwrites 350 */ 351 DNX_INIT_STEP_HW_OVERWRITE, 352 /** 353 * init PEMLA 354 */ 355 DNX_INIT_STEP_PEMLA, 356 /** 357 * init ARR 358 */ 359 DNX_INIT_STEP_ARR, 360 /** 361 * Init Utilties modules 362 */ 363 DNX_INIT_STEP_UTILITIES, 364 /** 365 * Init Algo modules 366 */ 367 DNX_INIT_STEP_ALGO, 368 /** 369 * Legacy soc modules list 370 */ 371 DNX_INIT_STEP_SOC_MODULES, 372 /** 373 * Init algo LIF module. 374 */ 375 DNX_INIT_STEP_ALGO_LIF, 376 /** 377 * init L3 Algo Res 378 */ 379 DNX_INIT_STEP_ALGO_L3, 380 /** 381 * init L2 Algo 382 */ 383 DNX_INIT_STEP_ALGO_L2, 384 /** 385 * init IN_LIF_PROFILE Algo Res 386 */ 387 DNX_INIT_STEP_ALGO_IN_LIF_PROFILE, 388 /** 389 * init OUT_LIF_PROFILE Algo Res 390 */ 391 DNX_INIT_STEP_ALGO_OUT_LIF_PROFILE, 392 /** 393 * init L2 module 394 */ 395 DNX_INIT_STEP_L2_MODULE, 396 /** 397 * init L3 module 398 */ 399 DNX_INIT_STEP_L3_MODULE, 400 /** 401 * init switch module 402 */ 403 DNX_INIT_STEP_SWITCH_MODULE, 404 /** 405 * init in_lif_profile module 406 */ 407 DNX_INIT_STEP_IN_LIF_PROFILE_MODULE, 408 /** 409 * init out_lif_profile module 410 */ 411 DNX_INIT_STEP_OUT_LIF_PROFILE_MODULE, 412 /** 413 * init PORT_INGRESS module 414 */ 415 DNX_INIT_STEP_PORT_INGRESS_MODULE, 416 /** 417 * init MIRROR module 418 */ 419 DNX_INIT_STEP_MIRROR_MODULE, 420 /** 421 * Init LIF module. 422 */ 423 DNX_INIT_STEP_LIF, 424 /** 425 * Appl properties - used to set properties values through APIs. 426 */ 427 DNX_INIT_STEP_APPL_PROPERTIES, 428 /** 429 * init PP PORT module 430 */ 431 DNX_INIT_STEP_PP_PORT, 432 /** 433 * init misc. access data structures - signals, regs/mems mcm ad-ons 434 */ 435 DNX_INIT_STEP_AUX_ACCESS, 436 /** 437 * initialize visibility settings 438 */ 439 DNX_INIT_STEP_VISIBILITY, 440 /** 441 * init all UTILEX services 442 */ 443 DNX_INIT_STEP_UTILEX, 444 /** 445 * init VLAN module 446 */ 447 DNX_INIT_STEP_VLAN, 448 /** 449 * init SRv6 module 450 */ 451 DNX_INIT_STEP_SRV6, 452 /** 453 * init STG module 454 */ 455 DNX_INIT_STEP_STG, 456 /** 457 * init QOS module 458 */ 459 DNX_INIT_STEP_QOS, 460 /** 461 * init Time module 462 */ 463 DNX_INIT_STEP_TIME, 464 465 /** 466 * init PTP module 467 */ 468 DNX_INIT_STEP_PTP, 469 /** 470 * init OAM module 471 */ 472 DNX_INIT_STEP_OAM, 473 /** 474 * init BFD module 475 */ 476 DNX_INIT_STEP_BFD, 477 /** 478 * init PP module 479 */ 480 DNX_INIT_STEP_PP_GENERAL, 481 482 /** 483 * init MPLS module 484 */ 485 DNX_INIT_MPLS, 486 /** 487 * init CRPS module 488 */ 489 DNX_INIT_STEP_CRPS_MODULE, 490 /** 491 * init Meter module 492 */ 493 DNX_INIT_STEP_POLICER_MODULE, 494 /** 495 * init SAT module 496 */ 497 DNX_INIT_STEP_SAT_MODULE, 498 /** 499 * init STIF module 500 */ 501 DNX_INIT_STEP_STIF_MODULE, 502 /** 503 * init Ingress Congestion module 504 */ 505 DNX_INIT_STEP_COSQ_INGRESS_MODULE, 506 /** 507 * init cosq latency module 508 */ 509 DNX_INIT_STEP_COSQ_LATENCY_MODULE, 510 /** 511 * init Flow Control module 512 */ 513 DNX_INIT_STEP_FLOW_CONTROL_MODULE, 514 /** 515 * init PFC Deadlock module 516 */ 517 DNX_INIT_STEP_PFC_DEADLOCK_MODULE, 518 /** 519 * init E2E scheduler module 520 */ 521 DNX_INIT_STEP_SCH_MODULE, 522 /** 523 * init Fabric transmit module 524 */ 525 DNX_INIT_STEP_FABRIC_TRANSMIT_MODULE, 526 /** 527 * init Fabric module 528 */ 529 DNX_INIT_STEP_FABRIC_MODULE, 530 /** 531 * init Mib module 532 */ 533 DNX_INIT_STEP_MIB_MODULE, 534 /** 535 * init Ecgm module 536 */ 537 DNX_INIT_STEP_EGRESS_CONGESTION_MODULE, 538 /** 539 * init Trunk module 540 */ 541 DNX_INIT_STEP_TRUNK_MODULE, 542 /** 543 * init MACSec/IPSec module 544 */ 545 DNX_INIT_STEP_SEC_MODULE, 546 /** 547 * Algo Lane Map module 548 */ 549 DNX_INIT_STEP_ALGO_LANE_MAP, 550 /** 551 * Algo Port module 552 */ 553 DNX_INIT_STEP_ALGO_PORT, 554 /** 555 * Algo Port IMB module 556 */ 557 DNX_INIT_STEP_ALGO_PORT_IMB, 558 /** 559 * Algo Port PP module 560 */ 561 DNX_INIT_STEP_ALGO_PORT_PP, 562 /** 563 * init DBAL general Module 564 */ 565 DNX_INIT_STEP_DBAL_GENERAL, 566 /** 567 * init DBAL fields 568 */ 569 DNX_INIT_STEP_DBAL_FIELDS, 570 /** 571 * init DBAL tables 572 */ 573 DNX_INIT_STEP_DBAL_TABLES, 574 /** 575 * init DBAL MDB access layer 576 */ 577 DNX_INIT_STEP_DBAL_ACCESS_MDB, 578 /** 579 * init DBAL PEMLA access layer 580 */ 581 DNX_INIT_STEP_DBAL_ACCESS_PEMLA, 582 /** 583 * init DBAL SW access layer 584 */ 585 DNX_INIT_STEP_DBAL_ACCESS_SW, 586 /** 587 * Set lane map (convert ucode_port property to BCM api call) 588 */ 589 DNX_INIT_STEP_DYN_PORT_LANE_MAP_SET, 590 /** 591 * Operations to do after DBAL is done with init 592 */ 593 DNX_INIT_STEP_DBAL_POST_OPERATIONS, 594 /** 595 * Power Up PHYs (for Heat up mode only) 596 */ 597 DNX_INIT_STEP_PHY_POWER_UP, 598 /** 599 * Add ports (convert ucode_port property to BCM api call) 600 */ 601 DNX_INIT_STEP_DYN_PORT_ADD, 602 /** 603 * Set port properties (convert soc properties to BCM api call) 604 */ 605 DNX_INIT_STEP_DYN_PORT_PROP_SET, 606 /** 607 * Used as a temp step to add ports until dynamic port will be implemented 608 */ 609 DNX_INIT_STEP_DYN_PORT_TEMP, 610 /** 611 * init STK_SYS module 612 */ 613 DNX_INIT_STEP_STK_SYS_MODULE, 614 /** 615 * init IPQ module 616 */ 617 DNX_INIT_STEP_IPQ_MODULE, 618 /** 619 * init IQS module 620 */ 621 DNX_INIT_STEP_IQS_MODULE, 622 /** 623 * init PVT mon 624 */ 625 DNX_INIT_STEP_PVT_MON, 626 /** 627 * init Instrumentation mon 628 */ 629 DNX_INIT_STEP_INSTRU, 630 /** 631 * init Reflector 632 */ 633 DNX_INIT_STEP_REFLECTOR, 634 /** 635 * init Eventor 636 */ 637 DNX_INIT_STEP_EVENTOR, 638 /** 639 * init MULTICAST module 640 */ 641 DNX_INIT_STEP_MULTICAST_MODULE, 642 /** 643 * init TDM module 644 */ 645 DNX_INIT_STEP_TDM_MODULE, 646 /** 647 * init BIER module 648 */ 649 DNX_INIT_STEP_BIER_MODULE, 650 /** 651 * init RX Algo Res 652 */ 653 DNX_INIT_STEP_ALGO_RX, 654 /** 655 * init Field module 656 */ 657 DNX_INIT_STEP_FIELD, 658 /** 659 * init Field module 660 */ 661 DNX_INIT_STEP_ALGO_FIELD, 662 /** 663 * init TDM module 664 */ 665 DNX_INIT_STEP_ALGO_TDM, 666 /** 667 * init oam module 668 */ 669 DNX_INIT_STEP_ALGO_OAM, 670 /** 671 * init BFD module 672 */ 673 DNX_INIT_STEP_ALGO_BFD, 674 /** 675 * init OAMP module 676 */ 677 DNX_INIT_STEP_ALGO_OAMP, 678 /** 679 * init MPLS Algo module 680 */ 681 DNX_INIT_STEP_ALGO_MPLS, 682 /** 683 * init VLAN Algo module 684 */ 685 DNX_INIT_STEP_ALGO_VLAN, 686 /** 687 * init EGR_POINTED Algo module 688 */ 689 DNX_INIT_STEP_ALGO_EGR_POINTED, 690 /** 691 * init Shell Commands Data 692 */ 693 DNX_INIT_STEP_SH_CMD, 694 /** 695 * init Shell Commands Data for dnx tree 696 */ 697 DNX_INIT_STEP_SH_CMD_DNX, 698 /** 699 * init Shell Commands Data for ctest tree 700 */ 701 DNX_INIT_STEP_SH_CMD_CTEST, 702 /** 703 * init IMB (Interface Managment Block) module. include NIF and 704 * Fabric modules. 705 */ 706 DNX_INIT_STEP_PORT_MODULE, 707 /** 708 * init OFP rate module. 709 * Fabric modules. 710 */ 711 DNX_INIT_STEP_OFP_RATES_MODULE, 712 /** 713 * init EGR queuing module. 714 * Fabric modules. 715 */ 716 DNX_INIT_STEP_EGR_QUEUING_MODULE, 717 /** 718 * Configuration Tune step 719 */ 720 DNX_INIT_STEP_TUNE, 721 /** 722 * Set mem defaults 723 */ 724 DNX_INIT_STEP_MEM_DEFAULTS, 725 /** 726 * PEM init sequence 727 */ 728 DNX_INIT_STEP_PEM_SEQ_INIT, 729 /** 730 * Set DTQs Contexts sizes 731 */ 732 DNX_INIT_STEP_DTQS_CONTEXTS_INIT, 733 /** 734 * Disable traffic. Has to be done before HW access. 735 * Currently it's called right after DBAL init since this step 736 * Calls for APIs use DBAL (technically this step should be 737 * called after access init). 738 */ 739 DNX_INIT_STEP_DISABLE_TRAFFIC, 740 /** 741 * Disable data traffic 742 */ 743 DNX_INIT_STEP_DISABLE_DATA_TRAFFIC, 744 /** 745 * Disable fabric control cells 746 */ 747 DNX_INIT_STEP_DISABLE_CONTROL_CELLS, 748 /** 749 * Configuration of 'legacy' structures within DNX FIELD 750 */ 751 DNX_INIT_STEP_FLD_LEGACY, 752 /** 753 * Configuration of 'mapping' structures (e.g., BCM actions to DNX actions) within DNX FIELD 754 */ 755 DNX_INIT_STEP_FLD_MAPPING, 756 /** 757 * Configuration of 'sw state' structures (e.g., allocated keys) within DNX FIELD. Mostly related to 'algo'. 758 */ 759 DNX_INIT_STEP_FLD_SWSTATE, 760 /** 761 * Configuration of HW tables (e.g., FES tables, such as 762 * DBAL_TABLE_FIELD_PMF_A_FES_2ND_INSTRUCTION) within DNX FIELD. 763 */ 764 DNX_INIT_STEP_FLD_TABLES, 765 /** 766 * Configuration of default PMF programs within DNX FIELD. 767 */ 768 DNX_INIT_STEP_FLD_PGMSET, 769 /** 770 * Configuration of the Field range tables. 771 */ 772 DNX_INIT_STEP_FLD_RANGE, 773 /** 774 * Configuration of resources for TCAM manager and within DNX FIELD. 775 */ 776 DNX_INIT_STEP_FLD_TCAMFW, 777 /** 778 * Configuration of resources for TCAM Handlers and within DNX FIELD. 779 */ 780 DNX_INIT_STEP_FLD_HANDLERS, 781 /** 782 * Configuration of resources for Field Context. 783 */ 784 DNX_INIT_STEP_FLD_CONTEXT, 785 /** 786 * Configuration of resources for Field Presel. 787 */ 788 DNX_INIT_STEP_FLD_PRESEL, 789 /** 790 * Configuration of the pre-defined UDH types length. 791 */ 792 DNX_INIT_STEP_FLD_UDH, 793 /** 794 * Configuration of the pre-defined system headers. 795 */ 796 DNX_INIT_STEP_FLD_SYS_HDRS, 797 /** 798 * Configuration of resources for TCAM manager and within DNX FIELD. 799 */ 800 DNX_INIT_STEP_KBP_MNGR, 801 /** 802 * consistent hashing manager algo. 803 */ 804 DNX_INIT_STEP_ALGO_CHM, 805 /** 806 * SRAM packet buffer. 807 */ 808 DNX_INIT_STEP_SPB, 809 /** 810 * Dram init. 811 */ 812 DNX_INIT_STEP_DRAM, 813 /** 814 * Failover (Protection) module 815 */ 816 DNX_INIT_STEP_FAILOVER, 817 /** 818 * Algo for Failover module 819 */ 820 DNX_INIT_STEP_ALGO_FAILOVER, 821 /** 822 * Family 823 */ 824 DNX_INIT_STEP_FAMILY, 825 /** 826 * Algo for pp stat 827 */ 828 DNX_INIT_STEP_ALGO_STAT_PP, 829 /** 830 * Algo for ptp 831 */ 832 DNX_INIT_STEP_ALGO_PTP, 833 /** 834 * Initialize the descriptor DMA based on the soc properties. 835 */ 836 DNX_INIT_SBUSDMA_DESC, 837 /** 838 * Initialize all the MDB registers according to the MDB profile, architecture specifications and device parameters. 839 */ 840 DNX_INIT_MDB, 841 /** 842 * Dram buffers step. 843 */ 844 DNX_INIT_STEP_DRAM_BUFFERS, 845 /** 846 * Interrupts init 847 */ 848 DNX_INIT_STEP_INTERRUPT, 849 /** 850 * SER interrupt handler 851 */ 852 DNX_INIT_STEP_SER, 853 /** 854 * Shadow memory init 855 */ 856 DNX_INIT_STEP_SHADOW_MEMORY, 857 /* 858 * Set memory cacheable 859 */ 860 DNX_INIT_STEP_MEM_CACHEABLE, 861 /* 862 * Linkscan 863 */ 864 DNX_INIT_STEP_LINKSCAN, 865 /* 866 * Dram temperature monitoring 867 */ 868 DNX_INIT_STEP_TEMPERATURE_MONITOR, 869 /* 870 * Coounter Processor Eviction 871 */ 872 DNX_INIT_STEP_CRPS_EVICTION, 873 /* 874 * MIB thread 875 */ 876 DNX_INIT_STEP_MIB_THREAD, 877 /* 878 * PortMod thread 879 */ 880 DNX_INIT_STEP_PORTMOD_THREAD, 881 /* 882 * Fabric load balance thread 883 */ 884 DNX_INIT_STEP_FABRIC_LOAD_BALANCE, 885 /* 886 * RCPU 887 */ 888 DNX_INIT_STEP_RCPU, 889 /** 890 * stat_pp init. 891 */ 892 DNX_INIT_STEP_STAT_PP, 893 /** 894 * SyncE init. 895 */ 896 DNX_INIT_STEP_SYNCE, 897 /** 898 * ALGO SyncE. 899 */ 900 DNX_INIT_STEP_ALGO_SYNCE, 901 /** 902 * Threads init. 903 */ 904 DNX_INIT_STEP_THREADS, 905 /** 906 * Kleap info init. 907 */ 908 DNX_INIT_KLEAP_INFO, 909 /** 910 * Configure mem monitor mask. 911 */ 912 DNX_INIT_STEP_MEM_MASK, 913 /** 914 * ALGO FlexE Group. 915 */ 916 DNX_INIT_STEP_ALGO_FLEXE_GENERAL, 917 /** 918 * ALGO FlexE core. 919 */ 920 DNX_INIT_STEP_ALGO_FLEXE_CORE, 921 /** 922 * GDDR6 dram. 923 */ 924 DNX_INIT_STEP_GDDR6, 925 /** 926 * FlexE init. 927 */ 928 DNX_INIT_STEP_FLEXE, 929 /** 930 * ALGO Switch init 931 */ 932 DNX_INIT_STEP_ALGO_SWITCH, 933 /** 934 * L2 Flush Traverse thread 935 */ 936 DNX_INIT_STEP_L2_FLUSH_TRAVERSE_THREAD, 937 /** 938 * Enable DRAM blocks 939 */ 940 DNX_INIT_STEP_DRAM_BLOCKS_ENABLE, 941 /** 942 * init Port Interrupts 943 */ 944 DNX_INIT_STEP_PORT_INTERRUPTS, 945 /** 946 * Interrupt event thread 947 */ 948 DNX_INIT_STEP_INTR_EVT_THREAD, 949 /** 950 * Clear interrupts and counter 951 */ 952 DNX_INIT_STEP_CLEAR_COUNTER, 953 /** 954 * Number of init steps, must be before last. 955 */ 956 DNX_INIT_STEP_COUNT, 957 /** 958 * flow init. 959 */ 960 DNX_INIT_STEP_FLOW, 961 /** 962 * Dummy step, used to indicate the last step for a step list. 963 */ 964 DNX_INIT_STEP_LAST_STEP = UTILEX_SEQ_STEP_LAST 965 } dnx_init_step_id_e; 966 967 /** 968 * \brief ptr to step cb function returning shr_error_e, to be 969 * used in each init/deinit step. the step_list_info and the 970 * flags are used for internal purposes, and are managed by the 971 * mechanism. 972 */ 973 typedef shr_error_e( 974 *dnx_step_cb) ( 975 int unit); 976 977 /** 978 * \brief ptr to step flag cb function returning 979 * shr_error_e, to be used in each init step to decode flags 980 * according to a given step logic ( for example Step X should 981 * be skipped if SOC property Y is set to value Z etc). to do 982 * so, one would need to return in dynamic flags the 983 * DNX_INIT_STEP_F_SKIP_DYNAMIC flag. 984 */ 985 typedef shr_error_e( 986 *dnx_step_flag_cb) ( 987 int unit, 988 int *dynamic_flags); 989 990 /** 991 * \brief dnx init arguments structure. 992 * 993 * This structure should contain user's information. 994 * most of the needed info however should be passed as SOC properties. 995 * currently it is used to define a stopping and continuation points 996 */ 997 typedef struct 998 { 999 /** 1000 * this is used to start the init sequence from a certain step. 1001 * this will be used after stopping the init sequence with last 1002 * step. the default for this should be the 1003 * DNX_INIT_STEP_INVALID_STEP step id. 1004 */ 1005 dnx_init_step_id_e first_step; 1006 1007 /** 1008 * this is used to stop the init sequence at a certain step. 1009 * to continue use the init function with first step defined as 1010 * next step of this. the default for this should be the 1011 * DNX_INIT_STEP_INVALID_STEP step id. 1012 */ 1013 dnx_init_step_id_e last_step; 1014 } dnx_init_info_t; 1015 /* 1016 * Typedefs: 1017 * { 1018 */ 1019 /** 1020 * \brief step/sub-step structure. 1021 * 1022 * each step in the Init/Deinit process should be well defined. 1023 * each step should have an Init and Deinit function. 1024 * the Deinit function should not access the HW, just free SW resources. 1025 * a flag CB can also be used, so each step can activate flags according 1026 * to dedicated SOC properties or other logic. 1027 */ 1028 typedef struct dnx_init_step_s dnx_init_step_t; 1029 struct dnx_init_step_s 1030 { 1031 /** 1032 * Step ID, used to uniquely identify a step. 1033 */ 1034 dnx_init_step_id_e step_id; 1035 1036 /** 1037 * Step name 1038 */ 1039 char *step_name; 1040 1041 /** 1042 * Init function CB that will run during the Init Sequence. 1043 */ 1044 dnx_step_cb init_function; 1045 1046 /** 1047 * Deinit function CB that will run during the Deinit Sequence. 1048 */ 1049 dnx_step_cb deinit_function; 1050 1051 /** 1052 * Flag function CB that will run prior to the init function of 1053 * this step to determine which flags are needed to the step 1054 * according to the CB logic - could be looking for certain SOC 1055 * properties for example. 1056 */ 1057 dnx_step_flag_cb flag_function; 1058 1059 /** 1060 * Step Flags, internal flags used by the system's logic 1061 */ 1062 int step_flags; 1063 1064 /** 1065 * Pointer to a sub list of steps to be used if current step 1066 * represents a sub list of steps. 1067 */ 1068 const dnx_init_step_t *step_sub_array; 1069 1070 /* 1071 * Dependency marker for the step. It is used if multithread_en property is equal to 1. 1072 */ 1073 dnx_init_step_id_e depends_on_step_id; 1074 }; 1075 1076 /** 1077 * \brief Structure holding information for steps and their relative time thresholds. 1078 * 1079 * This structure is used for steps with DNX_INIT_STEP_F_TIME_THRESH_EXPLICIT 1080 * flag in order to link the Step ID to the specific user defined time threshold. 1081 */ 1082 typedef struct 1083 { 1084 /** 1085 * Step ID, used to uniquely identify a step. 1086 */ 1087 dnx_init_step_id_e step_id; 1088 1089 /** 1090 * Time threshold - the maximum time the step should take in 1091 * microseconds. 1092 */ 1093 sal_time_t time_thresh; 1094 } dnx_init_time_thresh_info_t; 1095 1096 /* 1097 * } 1098 */ 1099 /** 1100 * \brief - Deep conversion of dnx_init_step_t to utilex_seq_step_t 1101 * The conversion allocate memory that should be freed using 'dnx_step_list_destroy()' 1102 */ 1103 shr_error_e dnx_init_step_list_convert( 1104 int unit, 1105 const dnx_init_step_t * dnx_step_list, 1106 utilex_seq_step_t ** step_list); 1107 1108 /** 1109 * \brief - Deep free of utilex_seq_step_t 1110 * Should be called after 'dnx_init_step_list_convert()' 1111 */ 1112 shr_error_e dnx_init_step_list_destory( 1113 int unit, 1114 utilex_seq_step_t * step_list); 1115 /* 1116 * } 1117 */ 1118 1119 /** 1120 * \brief - Get the time threshold of a given step in BCM init according to the 1121 * step ID and the step fags. If called with flag UTILEX_SEQ_STEP_INVALID 1122 * will return the overall threshold for the full sequence. In this case 1123 * flags are not relevant. 1124 * 1125 * \param [in] unit - Unit # 1126 * \param [in] step_id - Step ID 1127 * \param [in] flags - Step flags 1128 * \param [out] time_thresh - Time threshold for the specified step 1129 * \return 1130 * shr_error_e 1131 * \remark 1132 * * None 1133 * \see 1134 * * None 1135 */ 1136 shr_error_e dnx_time_thresh_cb( 1137 int unit, 1138 int step_id, 1139 uint32 flags, 1140 sal_usecs_t * time_thresh); 1141 1142 /** 1143 * \brief - Get whether DNX BCM init sequence finished. 1144 * 1145 * \param [in] unit - Unit # 1146 * \return 1147 * int - boolean value which denotes if init sequence finished. 1148 * \remark 1149 * * None 1150 * \see 1151 * * None 1152 */ 1153 int dnx_init_is_init_done_get( 1154 int unit); 1155 1156 /** 1157 * \brief - re run init steps according to dnx_init_info. 1158 * 1159 * \param [in] unit - Unit # 1160 * \param [in] flags - dnx_init_run flags are supported. 1161 * \param [in] dnx_init_info - init info 1162 * \return 1163 * shr_error_e. 1164 * \remark 1165 * * the first_step provided in dnx_init_info provided has to be after the DNX_INIT_STEP_DBAL step 1166 * \see 1167 * * None 1168 */ 1169 shr_error_e dnx_init_rerun( 1170 int unit, 1171 int flags, 1172 dnx_init_info_t * dnx_init_info); 1173 1174 /** 1175 * \brief - skip the step when performing wb test 1176 * 1177 * \param [in] unit - Unit # 1178 * \param [out] dynamic_flags - sequence dynamic flags 1179 * \return 1180 * shr_error_e. 1181 * \remark 1182 * \see 1183 * * None 1184 */ 1185 shr_error_e wb_test_mode_skip( 1186 int unit, 1187 int *dynamic_flags); 1188 1189 /* 1190 * } 1191 */ 1192 #endif /* _BCMINT_DNX_INIT_INIT_H_INCLUDED */