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hbmc_cb.h (2652B)

      1 
      2 
      3 /*
      4  * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file.
      5  * 
      6  * Copyright 2007-2020 Broadcom Inc. All rights reserved.
      7  */
      8 
      9 #ifndef _BCMINT_DNX_DRAM_HBMC_HBMCCB_H_INCLUDED
     10 
     11 #define _BCMINT_DNX_DRAM_HBMC_HBMCCB_H_INCLUDED
     12 
     13 #include <soc/hbmc_shmoo.h>
     14 
     15 
     16 shr_error_e dnx_hbmc_modify_mrs_cb(
     17     int unit,
     18     int hbm_ndx,
     19     int channel,
     20     int mr_index,
     21     uint32 data,
     22     uint32 mask);
     23 
     24 
     25 shr_error_e dnx_hbmc_pll_set_cb(
     26     int unit,
     27     int hbm_ndx,
     28     const hbmc_shmoo_pll_t * pll_info);
     29 
     30 
     31 shr_error_e dnx_hbmc_phy_reg_read_cb(
     32     int unit,
     33     int hbm_ndx,
     34     int channel,
     35     uint32 addr,
     36     uint32 *data);
     37 
     38 
     39 shr_error_e dnx_hbmc_phy_reg_write_cb(
     40     int unit,
     41     int hbm_ndx,
     42     int channel,
     43     uint32 addr,
     44     uint32 data);
     45 
     46 
     47 shr_error_e dnx_hbmc_phy_reg_modify_cb(
     48     int unit,
     49     int hbm_ndx,
     50     int channel,
     51     uint32 addr,
     52     uint32 data,
     53     uint32 mask);
     54 
     55 
     56 
     57 shr_error_e dnx_hbmc_enable_wr_parity_cb(
     58     int unit,
     59     int hbm_ndx,
     60     int channel,
     61     int enable);
     62 shr_error_e dnx_hbmc_enable_rd_parity_cb(
     63     int unit,
     64     int hbm_ndx,
     65     int channel,
     66     int enable);
     67 shr_error_e dnx_hbmc_enable_addr_parity_cb(
     68     int unit,
     69     int hbm_ndx,
     70     int channel,
     71     int enable);
     72 shr_error_e dnx_hbmc_enable_wr_dbi_cb(
     73     int unit,
     74     int hbm_ndx,
     75     int channel,
     76     int enable);
     77 shr_error_e dnx_hbmc_enable_rd_dbi_cb(
     78     int unit,
     79     int hbm_ndx,
     80     int channel,
     81     int enable);
     82 
     83 
     84 shr_error_e dnx_hbmc_soft_reset_controller_without_dram_cb(
     85     int unit,
     86     int hbm_ndx,
     87     int channel);
     88 
     89 
     90 
     91 
     92 shr_error_e dnx_hbmc_bist_conf_set_cb(
     93     int unit,
     94     int flags,
     95     int hbm_ndx,
     96     int channel,
     97     const hbmc_shmoo_bist_info_t * info);
     98 
     99 
    100 shr_error_e dnx_hbmc_bist_err_cnt_cb(
    101     int unit,
    102     int flags,
    103     int hbm_ndx,
    104     int channel,
    105     hbmc_shmoo_bist_err_cnt_t * error_counters);
    106 
    107 
    108 shr_error_e dnx_hbmc_enable_refresh_cb(
    109     int unit,
    110     int hbm_ndx,
    111     int channel,
    112     int enable);
    113 
    114 
    115 shr_error_e dnx_hbmc_dram_init_cb(
    116     int unit,
    117     int hbm_ndx,
    118     int phase);
    119 
    120 
    121 
    122 shr_error_e dnx_hbmc_dram_info_access_cb(
    123     int unit,
    124     hbmc_shmoo_dram_info_t * shmoo_info);
    125 
    126 
    127 shr_error_e dnx_hbmc_model_part_get_cb(
    128     int unit,
    129     int hbm_index,
    130     hbmc_shmoo_hbm_model_part_t * model_part);
    131 
    132 
    133 shr_error_e dnx_hbmc_bist_status_get_cb(
    134     int unit,
    135     int hbm_ndx,
    136     int channel,
    137     uint32 *read_cmd_counter,
    138     uint32 *write_cmd_counter,
    139     uint32 *read_data_counter);
    140 
    141 
    142 shr_error_e dnx_hbmc_phy_channel_dwords_alignment_check_cb(
    143     int unit,
    144     int hbm_ndx,
    145     int channel,
    146     int *is_aligned);
    147 
    148 #endif