hbmc.h (6648B)
1 2 3 /* 4 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 5 * 6 * Copyright 2007-2020 Broadcom Inc. All rights reserved. 7 */ 8 9 #ifndef _BCMINT_DNX_DRAM_HBMC_HBMC_H_INCLUDED 10 11 #define _BCMINT_DNX_DRAM_HBMC_HBMC_H_INCLUDED 12 13 #include <shared/shrextend/shrextend_debug.h> 14 15 #ifdef DNX_DATA_INTERNAL 16 #undef DNX_DATA_INTERNAL 17 #endif 18 #include <soc/hbmc_shmoo.h> 19 #include <soc/dnx/dnx_hbmc.h> 20 #include <soc/dnx/swstate/auto_generated/types/dnx_dram_types.h> 21 #include <soc/dnx/dnx_data/auto_generated/dnx_data_max_dram.h> 22 #include <bcm/switch.h> 23 24 25 26 #define DNX_HBMC_ITER_ALL -1 27 #define DNX_HBMC_STR_VAL_SIZE (32) 28 #define DNX_HBMC_HBM_SERIAL_NUMBER_SIZE 2 29 30 31 typedef struct dnx_hbmc_mrs_values_s 32 { 33 34 uint32 35 mr_val[DNX_DATA_MAX_DRAM_GENERAL_INFO_MAX_NOF_DRAMS][DNX_DATA_MAX_DRAM_GENERAL_INFO_NOF_CHANNELS] 36 [DNX_DATA_MAX_DRAM_GENERAL_INFO_NOF_MRS]; 37 } dnx_hbmc_mrs_values_t; 38 39 40 41 42 typedef enum 43 { 44 FIRST_DNX_HBMC_PHY_TUNE_ACTION_E = 0, 45 46 DNX_HBMC_RESTORE_TUNE_PARAMETERS_FROM_SOC_PROPERTIES = FIRST_DNX_HBMC_PHY_TUNE_ACTION_E, 47 48 DNX_HBMC_RESTORE_TUNE_PARAMETERS_FROM_OTP, 49 50 DNX_HBMC_RUN_TUNE, 51 52 DNX_HBMC_SKIP_TUNE, 53 54 DNX_HBMC_RESTORE_TUNE_PARAMS_FROM_SOC_PROPS_OR_OTP_OR_TUNE, 55 56 NUM_DNX_HBMC_PHY_TUNE_ACTION_E 57 } dnx_hbmc_phy_tune_action_e; 58 59 60 typedef enum dnx_hbmc_tdu_matrix_option_e 61 { 62 63 DNX_HBMC_SINGLE_HBM_ATM = 0, 64 65 DNX_HBMC_2_HBMS_ATM = 1, 66 67 DNX_HBMC_NOF_ATMS = 2 68 } dnx_hbmc_tdu_matrix_option_t; 69 70 71 typedef enum dnx_hbmc_diag_registers_type_e 72 { 73 74 DNX_HBMC_DIAG_REG_HISTOGRAM_32_8, 75 76 DNX_HBMC_NOF_DIAG_REG_TYPES 77 } dnx_hbmc_diag_registers_type_t; 78 79 80 shr_error_e dnx_hbmc_configure_plls( 81 int unit, 82 int hbm_index, 83 const hbmc_shmoo_pll_t * pll_info); 84 85 86 shr_error_e dnx_hbmc_pll_init( 87 int unit); 88 89 90 shr_error_e dnx_hbmc_hbm_init( 91 int unit, 92 int hbm_index); 93 94 95 shr_error_e dnx_hbmc_mode_register_get( 96 int unit, 97 int hbm_index, 98 int channel, 99 int mr_index, 100 uint32 *value); 101 102 103 shr_error_e dnx_hbmc_mode_register_set( 104 int unit, 105 int hbm_index, 106 int channel, 107 int mr_index, 108 uint32 value); 109 110 111 shr_error_e dnx_hbmc_run_phy_tune( 112 int unit, 113 int hbm_index, 114 int channel, 115 int shmoo_type, 116 uint32 flags, 117 dnx_hbmc_phy_tune_action_e action); 118 119 120 shr_error_e dnx_hbmc_init_with_apd_phy( 121 int unit); 122 123 124 shr_error_e dnx_hbmc_init( 125 int unit); 126 127 128 shr_error_e dnx_hbmc_deinit( 129 int unit); 130 131 132 shr_error_e dnx_hbmc_sw_state_init( 133 int unit); 134 135 136 shr_error_e dnx_hbmc_temp_monitor_deinit( 137 int unit); 138 139 140 shr_error_e dnx_hbmc_temp_monitor_init( 141 int unit); 142 143 144 shr_error_e dnx_hbmc_temp_monitor_is_active( 145 int unit, 146 int *is_active); 147 148 149 shr_error_e dnx_hbmc_temp_monitor_resume( 150 int unit); 151 152 153 shr_error_e dnx_hbmc_temp_monitor_pause( 154 int unit); 155 156 157 shr_error_e dnx_hbmc_bist_configuration_get( 158 int unit, 159 int hbm_index, 160 int channel, 161 hbmc_shmoo_bist_info_t * info); 162 163 164 shr_error_e dnx_hbmc_bist_configuration_set( 165 int unit, 166 int hbm_index, 167 int channel, 168 const hbmc_shmoo_bist_info_t * info); 169 170 171 shr_error_e dnx_hbmc_bist_start( 172 int unit, 173 int hbm_index, 174 int channel); 175 176 177 shr_error_e dnx_hbmc_bist_stop( 178 int unit, 179 int hbm_index, 180 int channel); 181 182 183 shr_error_e dnx_hbmc_bist_run_done_poll( 184 int unit, 185 int hbm_index, 186 int channel); 187 188 189 shr_error_e dnx_hbmc_channel_soft_init( 190 int unit, 191 int hbm_ndx, 192 int channel); 193 194 195 shr_error_e dnx_hbmc_channels_soft_init_set( 196 int unit, 197 int hbm_index, 198 int in_soft_init); 199 200 201 shr_error_e dnx_hbmc_channels_soft_reset_set( 202 int unit, 203 int hbm_index, 204 int in_soft_reset); 205 206 207 shr_error_e dnx_hbmc_hbmc_soft_init_set( 208 int unit, 209 int hbm_index, 210 int in_soft_init); 211 212 213 shr_error_e dnx_hbmc_hbmc_soft_reset_set( 214 int unit, 215 int hbm_index, 216 int in_soft_reset); 217 218 219 shr_error_e dnx_hbmc_hrc_soft_init_set( 220 int unit, 221 int hbm_index, 222 int in_soft_init); 223 224 225 shr_error_e dnx_hbmc_hrc_soft_reset_set( 226 int unit, 227 int hbm_index, 228 int in_soft_reset); 229 230 231 shr_error_e dnx_hbmc_tdu_soft_init_set( 232 int unit, 233 int hbm_index, 234 int in_soft_init); 235 236 237 shr_error_e dnx_hbmc_tdu_soft_reset_set( 238 int unit, 239 int hbm_index, 240 int in_soft_reset); 241 242 243 shr_error_e dnx_hbmc_soft_init_mrs_save( 244 int unit, 245 dnx_hbmc_mrs_values_t * mr_values_p); 246 247 248 shr_error_e dnx_hbmc_soft_init_mrs_restore( 249 int unit, 250 dnx_hbmc_mrs_values_t * mr_values_p); 251 252 253 shr_error_e dnx_hbmc_ind_access_physical_address_read( 254 int unit, 255 uint32 hbm_index, 256 uint32 channel, 257 uint32 bank, 258 uint32 row, 259 uint32 column, 260 uint32 *data); 261 262 263 shr_error_e dnx_hbmc_ind_access_physical_address_write( 264 int unit, 265 uint32 hbm_index, 266 uint32 channel, 267 uint32 bank, 268 uint32 row, 269 uint32 column, 270 uint32 *pattern); 271 272 273 shr_error_e dnx_hbmc_ind_access_logical_buffer_read( 274 int unit, 275 int core, 276 int buffer, 277 int index, 278 uint32 *data); 279 280 281 shr_error_e dnx_hbmc_ind_access_logical_buffer_write( 282 int unit, 283 int core, 284 int buffer, 285 int index, 286 uint32 *pattern); 287 288 289 shr_error_e dnx_hbmc_redirect_traffic_to_ocb( 290 int unit, 291 uint32 enable, 292 uint8 *hbm_is_empty); 293 294 295 shr_error_e dnx_hbmc_is_traffic_allowed_into_dram( 296 int unit, 297 uint8 *allow_traffic_to_dram); 298 299 300 shr_error_e dnx_hbmc_bist_status_get( 301 int unit, 302 int hbm_index, 303 int channel, 304 uint32 *read_cmd_counter, 305 uint32 *write_cmd_counter, 306 uint32 *read_data_counter); 307 308 309 shr_error_e dnx_hbmc_power_down_cb_register( 310 int unit, 311 uint32 flags, 312 bcm_switch_dram_power_down_callback_t callback, 313 void *userdata); 314 315 316 shr_error_e dnx_hbmc_power_down_cb_unregister( 317 int unit, 318 bcm_switch_dram_power_down_callback_t callback, 319 void *userdata); 320 321 322 shr_error_e dnx_hbmc_power_down( 323 int unit); 324 325 326 shr_error_e dnx_hbmc_reinit( 327 int unit, 328 uint32 flags); 329 330 331 shr_error_e dnx_hbmc_temp_get( 332 int unit, 333 int interface_id, 334 int *value); 335 336 337 shr_error_e dnx_hbmc_vendor_info_to_sw_state_set( 338 int unit, 339 int hbm_index, 340 hbm_dram_vendor_info_hbm_t * vendor_info); 341 342 343 shr_error_e dnx_hbmc_vendor_info_from_sw_state_get( 344 int unit, 345 int hbm_index, 346 hbm_dram_vendor_info_hbm_t * vendor_info); 347 348 349 shr_error_e dnx_hbmc_device_id_to_vendor_info_decode( 350 int unit, 351 soc_dnx_hbm_device_id_t * device_id, 352 hbm_dram_vendor_info_hbm_t * vendor_info); 353 354 355 shr_error_e dnx_hbmc_read_lfsr_loopback_bist_run( 356 int unit, 357 uint32 hbm_index, 358 uint32 channel); 359 360 shr_error_e dnx_hbmc_hbc_blocks_enable_set( 361 int unit); 362 363 364 #endif