sdk5665.asm (4413B)
1 ; 2 ; 3 ; 4 ; This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 5 ; 6 ; Copyright 2007-2019 Broadcom Inc. All rights reserved. 7 ; 8 ; 9 ; This is the default program for the 5665 SDK (BCM95665K4S) 10 ; 11 ; To start it, use the following commands from BCM: 12 ; 13 ; 0:led load sdk5665.hex 14 ; *:led start 15 ; 16 ; The BCM5665 SDK has 26 columns of 4 LEDs each, as shown below: 17 ; 18 ; L01 L03 L05 L07 L09 L11 L13 L15 L17 L19 ... L47 LG1 LG3 19 ; A01 A03 A05 A07 A09 A11 A13 A15 A17 A19 ... A47 AG1 LG3 20 ; L02 L04 L06 L08 L10 L12 L14 L16 L18 L20 ... L48 LG2 LG4 21 ; A02 A04 A06 A08 A10 A12 A14 A16 A18 A20 ... A48 AG2 LG4 22 ; 23 ; There is one bit per LED with the following colors: 24 ; ZERO Green 25 ; ONE Black 26 ; 27 ; The bits are shifted out in the following order: 28 ; A01, L01, ..., A48, L48, AG1, LG1, ..., AG4, LG4 29 ; 30 ; Current implementation: 31 ; 32 ; L01 reflects port 1 link status 33 ; A01 reflects port 1 activity 34 ; 35 ; On the bringup board, the LED polarity is 0 on, 1 off. 36 ; 37 ; 38 39 40 MIN_FE_PORT EQU 0 41 BREAK_FE_PORT EQU 24 42 RESUME_FE_PORT EQU 32 43 MAX_FE_PORT EQU 55 44 STOP_FE_PORT EQU 56 45 NUM_FE_PORT EQU 48 46 47 MIN_GE_PORT EQU 24 48 MAX_GE_PORT EQU 27 49 STOP_GE_PORT EQU 28 50 NUM_GE_PORT EQU 4 51 52 MIN_PORT EQU 0 53 MAX_PORT EQU 55 54 NUM_PORT EQU 52 55 56 PACK_SRC EQU 0 57 PACK_DST EQU 128 58 PACK_NUM EQU 13 59 60 ; 61 ; Main Update Routine 62 ; 63 ; This routine is called once per tick. 64 ; 65 66 update: 67 sub a,a ; ld a,MIN_FE_PORT (but only one instr) 68 69 up1: 70 call doport 71 72 cmp a,BREAK_FE_PORT 73 jnz up1 74 75 ld a,RESUME_FE_PORT 76 77 up2: 78 call doport 79 cmp a,STOP_FE_PORT 80 jnz up2 81 82 ld a,MIN_GE_PORT 83 84 up3: 85 call doport 86 cmp a,STOP_GE_PORT 87 jnz up3 88 89 ; 90 ; This bit is a workaround for a bug in the 5665 LED processor. 91 ; 92 ; The pack instruction should put the data into data mem at 0x80. 93 ; However, the internal register to store this address is only 7 bits. 94 ; So the data is packed starting at address 0. 95 ; This leads to two caveats: 96 ; 97 ; 1) Port 0 data _MUST_ be consumed before the first pack instruction. 98 ; 99 ; 2) The output data must be moved from location 0 to location 128. 100 ; 101 ; 102 103 104 sub b,b ; ld b,PACK_SRC (but only one instr) 105 ld a,PACK_DST 106 packmove: 107 ld (a),(b) 108 inc a 109 inc b 110 cmp b,PACK_NUM 111 jnz packmove 112 113 send 104 ; (48 + 4) * 2 bits 114 115 doport: 116 port a 117 ld (PORT_NUM),a 118 119 call link_status ; Lower LED for this port 120 call activity ; Upper LED for this port 121 122 ; We need to cache the output bits to not stomp Port 0 data. 123 ld a,(LINK_CACHE) 124 pushst a 125 pack 126 127 ld a,(ACT_CACHE) 128 pushst a 129 pack 130 131 ld a,(PORT_NUM) 132 inc a 133 ret 134 135 activity: 136 pushst RX 137 pop 138 jc act_led_set 139 140 pushst TX 141 pop 142 jc act_led_set 143 144 ld a,ONE ; Off 145 ld (ACT_CACHE),a 146 ret 147 148 act_led_set: 149 ld a,ZERO ; On 150 ld (ACT_CACHE),a 151 ret 152 153 link_status: 154 155 ld a,(PORT_NUM) ; Check for link down 156 ld b,PORTDATA 157 add b,a 158 ld b,(b) 159 tst b,0 160 161 jnc ls_led_clear 162 163 ld a,ZERO ; On 164 ld (LINK_CACHE),a 165 ret 166 167 ls_led_clear: 168 ld a,ONE ; Off 169 ld (LINK_CACHE),a 170 ret 171 172 173 ; 174 ; Variables (SDK software initializes LED memory from 0x80-0xff to 0) 175 ; 176 177 TXRX_ALT_COUNT equ 0xe0 178 HD_COUNT equ 0xe1 179 GIG_ALT_COUNT equ 0xe2 180 PORT_NUM equ 0xe3 181 LINK_CACHE equ 0xe4 182 ACT_CACHE equ 0xe5 183 184 ; 185 ; Port data, which must be updated continually by main CPU's 186 ; linkscan task. See $SDK/src/appl/diag/ledproc.c for examples. 187 ; In this program, bit 0 is assumed to contain the link up/down status. 188 ; 189 190 PORTDATA equ 0xa0 ; Size 57 bytes 191 192 ; 193 ; Symbolic names for the bits of the port status fields 194 ; 195 196 RX equ 0x0 ; received packet 197 TX equ 0x1 ; transmitted packet 198 COLL equ 0x2 ; collision indicator 199 SPEED_C equ 0x3 ; 100 Mbps 200 SPEED_M equ 0x4 ; 1000 Mbps 201 DUPLEX equ 0x5 ; half/full duplex 202 FLOW equ 0x6 ; flow control capable 203 LINKUP equ 0x7 ; link down/up status 204 LINKEN equ 0x8 ; link disabled/enabled status 205 ZERO equ 0xE ; always 0 206 ONE equ 0xF ; always 1