pcid.h (8387B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * File: pcid.h 8 * Purpose: Basic include file for pcid 9 */ 10 11 #ifndef _PCID_PCID_H 12 #define _PCID_PCID_H 13 14 #include <unistd.h> 15 #include <stdlib.h> 16 #include <stdio.h> 17 18 #include <soc/cmic.h> 19 #include <soc/drv.h> 20 #include <soc/debug.h> 21 #include <sal/appl/io.h> 22 #include <sal/appl/sal.h> 23 #include <bde/pli/verinet.h> 24 25 #include <sal/core/thread.h> 26 27 #include <sys/types.h> 28 #include <soc/types.h> 29 #include <soc/defs.h> 30 #include <soc/dcb.h> 31 32 #define PCIM_SIZE_MAX 0x40000 33 #define PCIC_SIZE 0x48 34 35 /* Return values for process request */ 36 #define PR_REQUEST_HANDLED 1 37 #define PR_NO_REQUEST 2 38 #define PR_ALL_DONE 0 39 #define PR_ERROR -1 40 41 #define PACKET_CHECK_INTERVAL 500000 42 #define COUNTER_ACT_INTERVAL 1000000 43 44 #define PKT_SIZE_MAX (16 * 1024 + 8) 45 46 #define CPU_MAX_PACKET_QUEUE 100 47 #define CPU_MAX_PACKET_SIZE 16400 48 49 #define SBUS_ADDR_VERSION_1 1 /* Legacy */ 50 #define SBUS_ADDR_VERSION_2 2 /* New */ 51 52 typedef enum bcm_sim_msg_e { 53 BCM_SIM_INVALID, 54 BCM_SIM_ACTIVATE, 55 BCM_SIM_DEACTIVATE, 56 BCM_SIM_KEEP_ALIVE, 57 BCM_SIM_DONE, 58 BCM_SIM_TX_PKT, 59 BCM_SIM_FROM_CPU, 60 BCM_SIM_TO_CPU, 61 BCM_SIM_SBUS_MSG_FROM_CPU, 62 BCM_SIM_SBUS_MSG_TO_CPU, 63 BCM_PKT_OVER_SOCKET 64 } bcm_sim_msg_t; 65 66 typedef enum bcmsim_opcode_e { 67 BCMSIM_SCHAN_REG_READ, 68 BCMSIM_SCHAN_REG_WRITE, 69 BCMSIM_SCHAN_MEM_READ, 70 BCMSIM_SCHAN_MEM_WRITE, 71 BCMSIM_PCI_MEM_READ, 72 BCMSIM_PCI_MEM_WRITE 73 } bcmsim_opcode_t; 74 75 typedef struct soc_datum_s soc_datum_t; 76 77 /* Keep the data part of the following structures the same */ 78 typedef struct sim_data_s { 79 uint32 data[SOC_MAX_MEM_WORDS]; 80 } sim_data_t; 81 82 struct soc_datum_s { 83 soc_datum_t *next; 84 uint32 selectors; 85 uint32 addr; 86 uint32 data[SOC_MAX_MEM_WORDS]; 87 }; 88 89 typedef struct packet_s { 90 uint8 data[PKT_SIZE_MAX]; 91 int length; 92 int consum; 93 #ifdef BCM_TRX_SUPPORT 94 uint32 dcbd[13]; /* TR/SC : 4 + 7 words of HG + PBE */ 95 #else 96 uint32 dcbd[8]; /* FB/ER : 3 + 5 words of HG + PBE */ 97 #endif 98 struct packet_s *next; 99 } packet_t; 100 101 typedef struct pcid_info_s pcid_info_t; 102 103 typedef void (*_pcid_tx_cb_f)(pcid_info_t *pcid_info, dcb_t *dcb, int chan); 104 typedef void (*_pcid_ioctl_f)(pcid_info_t *pcid_info, uint32 *args); 105 typedef int (*_pcid_schan_f)(pcid_info_t *pcid_info, int unit, 106 schan_msg_t* data); 107 typedef int (*_pcid_reset_f)(pcid_info_t *pcid_info, int unit); 108 typedef int (*_pcid_regmem_f)(pcid_info_t *pcid_info, int opcode, 109 uint32 address, uint32 *data, uint32 nbits); 110 111 /* 112 * SOC internal register/memory simulation 113 */ 114 115 #define SOC_DATUM_HASH_SIZE 131 116 #define SOC_HASH_DATUM(addr) ((addr) % SOC_DATUM_HASH_SIZE) 117 #define SOC_HASH_EXTENDED_DATUM(blk, addr) \ 118 ((((addr) % SOC_DATUM_HASH_SIZE) + blk) % SOC_DATUM_HASH_SIZE) 119 120 extern int _soc_datum_read(pcid_info_t *pcid_info, int reg, 121 uint32 selectors, uint32 addr, int words, 122 uint32 *data); 123 extern int _soc_datum_write(pcid_info_t *pcid_info, int reg, 124 uint32 selectors, uint32 addr, int words, 125 uint32 *data); 126 extern int _soc_datum_add(pcid_info_t *pcid_info, int reg, 127 uint32 selectors, uint32 addr, int words, 128 uint32 *data); 129 130 extern int soc_datum_reg_read(pcid_info_t *pcid_info, 131 soc_regaddrinfo_t ainfo, 132 uint32 selectors, uint32 addr, 133 uint32 *data); 134 extern int soc_datum_reg_write(pcid_info_t *pcid_info, 135 soc_regaddrinfo_t ainfo, 136 uint32 selectors, uint32 addr, 137 uint32 *data); 138 139 extern int soc_datum_mem_read(pcid_info_t *pcid_info, 140 uint32 selectors, uint32 addr, 141 uint32 *data); 142 extern int soc_datum_mem_write(pcid_info_t *pcid_info, 143 uint32 selectors, uint32 addr, 144 uint32 *data); 145 146 147 #define SOC_DATUM_TRAVERSE_DIFF 0x1 /* Only invoke callback on datum values 148 * which are different from the 149 * register reset val or 150 * table null entry. 151 */ 152 typedef int (*soc_datum_traverse_cb)(pcid_info_t *pcid_info, uint32 flags, 153 uint32 selectors, uint32 addr, int words, 154 uint32 *data, void *user_data); 155 extern int soc_datum_traverse(pcid_info_t *pcid_info, uint32 flags, 156 soc_datum_traverse_cb *datum_cb); 157 158 struct pcid_info_s { 159 int opt_port; 160 int opt_verbose; 161 int opt_pli_verbose; 162 int opt_debug; 163 int opt_noreset; 164 int opt_pktloop; 165 int opt_pktfile; 166 int opt_counter; 167 int opt_gbp_mb; 168 int opt_gbp_wid; 169 int opt_gbp_banks; 170 int opt_override_devid; 171 int opt_override_revid; 172 int opt_port_config_id; 173 soc_chip_types opt_chip; 174 char *opt_chip_name; 175 int opt_i2crom; 176 FILE *i2crom_fp; 177 int opt_exit; 178 int opt_rpc_error; 179 uint32 pcim[PCIM_SIZE_MAX / 4]; 180 uint32 pcic[PCIC_SIZE / 4]; 181 soc_datum_t *reg_ht[SOC_DATUM_HASH_SIZE + 64]; 182 soc_datum_t *mem_ht[SOC_DATUM_HASH_SIZE + 64]; 183 int sockfd; 184 int newsockfd; 185 netconnection_t *client; 186 int unit; 187 int pkt_count; 188 packet_t *pkt_list; 189 sal_mutex_t pkt_mutex; 190 sal_mutex_t mem_mutex; 191 _pcid_tx_cb_f tx_cb; 192 _pcid_ioctl_f ioctl; 193 sal_sem_t cpu_sem; 194 void *cookie; /* To be used by applications */ 195 int pkt_sockfd; 196 int pkt_newsockfd; 197 int pkt_opt_port; 198 void *pkt_cookie; /* To be used by applications */ 199 int sbus_addr_version; 200 int cmicm; 201 _pcid_schan_f schan_cb; 202 _pcid_reset_f reset_cb; 203 _pcid_regmem_f regmem_cb; 204 sal_thread_t thread_id; 205 int single_mode; 206 }; 207 208 typedef struct cpu_packet_desc_s { 209 int length; 210 pbmp_t port_bitmap; 211 pbmp_t untagged_port_bitmap; 212 pbmp_t l3_port_bitmap; 213 int crc_regen; 214 int pkt_num; 215 int priority; 216 unsigned char data[CPU_MAX_PACKET_SIZE]; 217 unsigned int dest_bitmap; 218 uint32 opcode; 219 uint32 header_type; 220 uint32 dst_modid; 221 uint32 dst_portid; 222 uint32 src_modid; 223 uint32 src_tgid; 224 } cpu_packet_desc_t; 225 226 void *pcid_thread(void *cookie); 227 void pcid_shutdown(pcid_info_t *); 228 229 /* in util.c */ 230 extern int pcid_x2i(int digit); 231 extern void pcid_type_name(char *buffer, uint32 type); 232 233 extern void pcid_test_pkt_handler(pcid_info_t *info, dcb_t *dcb, int chan); 234 extern void pcid_schan_cb_set(pcid_info_t *pcid_info, _pcid_schan_f f); 235 extern void pcid_reset_cb_set(pcid_info_t *pcid_info, _pcid_reset_f f); 236 237 /* 238 * Get L3 hash table bucket size 239 * 16 entries / bucket for Raven, 8 for other FBX devices 240 */ 241 #define L3_BUCKET_SIZE(unit) ( \ 242 soc_mem_index_count(unit, L3_ENTRY_ONLYm) / \ 243 soc_mem_index_count(unit, L3_ENTRY_HIT_ONLYm)) 244 245 /* Macros to Lock & Unlock PCID memory */ 246 #define PCID_MEM_LOCK(pcid_info) \ 247 do { \ 248 if (pcid_info && pcid_info->mem_mutex) { \ 249 sal_mutex_take(pcid_info->mem_mutex, sal_sem_FOREVER); \ 250 } \ 251 } while (0) 252 253 #define PCID_MEM_UNLOCK(pcid_info) \ 254 do { \ 255 if (pcid_info && pcid_info->mem_mutex) { \ 256 sal_mutex_give(pcid_info->mem_mutex); \ 257 } \ 258 } while (0) 259 260 #endif /* _PCID_PCID_H */