portmod_enums.c (19166B)
1 /* 2 * 3 * 4 * 5 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 6 * 7 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 8 * 9 * 10 * DO NOT EDIT THIS FILE! 11 */ 12 13 #include <soc/types.h> 14 #include <soc/error.h> 15 #include <soc/portmod/portmod_internal.h> 16 #include <soc/portmod/portmod.h> 17 #include <soc/portmod/portmod_dispatch.h> 18 19 #ifdef PORTMOD_DIAG 20 21 enum_mapping_t portmod_dispatch_type_t_mapping[] = { 22 #ifdef PORTMOD_PM4X25_SUPPORT 23 {"Pm4x25", portmodDispatchTypePm4x25}, 24 #endif /*PORTMOD_PM4X25_SUPPORT */ 25 #ifdef PORTMOD_PM4X10_SUPPORT 26 {"Pm4x10", portmodDispatchTypePm4x10}, 27 #endif /*PORTMOD_PM4X10_SUPPORT */ 28 #ifdef PORTMOD_PM4X10TD_SUPPORT 29 {"Pm4x10td", portmodDispatchTypePm4x10td}, 30 #endif /*PORTMOD_PM4X10TD_SUPPORT */ 31 #ifdef PORTMOD_PM12X10_SUPPORT 32 {"Pm12x10", portmodDispatchTypePm12x10}, 33 #endif /*PORTMOD_PM12X10_SUPPORT */ 34 #ifdef PORTMOD_PM4x10Q_SUPPORT 35 {"Pm4x10Q", portmodDispatchTypePm4x10Q}, 36 #endif /*PORTMOD_PM4x10Q_SUPPORT */ 37 #ifdef PORTMOD_PM_QTC_SUPPORT 38 {"Pm_qtc", portmodDispatchTypePm_qtc}, 39 #endif /*PORTMOD_PM_QTC_SUPPORT */ 40 #ifdef PORTMOD_PM_OS_ILKN_SUPPORT 41 {"PmOsILKN", portmodDispatchTypePmOsILKN}, 42 #endif /*PORTMOD_PM_OS_ILKN_SUPPORT */ 43 #ifdef PORTMOD_PM_OS_ILKN_50G_SUPPORT 44 {"PmOsILKN_50G", portmodDispatchTypePmOsILKN_50G}, 45 #endif /*PORTMOD_PM_OS_ILKN_50G_SUPPORT */ 46 #ifdef PORTMOD_DNX_FABRIC_SUPPORT 47 {"Dnx_fabric", portmodDispatchTypeDnx_fabric}, 48 #endif /*PORTMOD_DNX_FABRIC_SUPPORT */ 49 #ifdef PORTMOD_DNX_FABRIC_O_NIF_SUPPORT 50 {"Dnx_fabric_o_nif", portmodDispatchTypeDnx_fabric_o_nif}, 51 #endif /*PORTMOD_DNX_FABRIC_O_NIF_SUPPORT */ 52 #ifdef PORTMOD_PM8X50_FABRIC_SUPPORT 53 {"Pm8x50_fabric", portmodDispatchTypePm8x50_fabric}, 54 #endif /*PORTMOD_PM8X50_FABRIC_SUPPORT */ 55 #ifdef PORTMOD_PM4X25TD_SUPPORT 56 {"Pm4x25td", portmodDispatchTypePm4x25td}, 57 #endif /*PORTMOD_PM4X25TD_SUPPORT */ 58 #ifdef PORTMOD_PM12X10_XGS_SUPPORT 59 {"Pm12x10_xgs", portmodDispatchTypePm12x10_xgs}, 60 #endif /*PORTMOD_PM12X10_XGS_SUPPORT */ 61 #ifdef PORTMOD_PM4X2P5_SUPPORT 62 {"Pm4x2p5", portmodDispatchTypePm4x2p5}, 63 #endif /*PORTMOD_PM4X2P5_SUPPORT */ 64 #ifdef PORTMOD_CPM4X25_SUPPORT 65 {"Cpm4x25", portmodDispatchTypeCpm4x25}, 66 #endif /*PORTMOD_CPM4X25_SUPPORT */ 67 #ifdef PORTMOD_PM8X50_SUPPORT 68 {"Pm8x50", portmodDispatchTypePm8x50}, 69 #endif /*PORTMOD_PM8X50_SUPPORT */ 70 #ifdef PORTMOD_PM4X10_QTC_SUPPORT 71 {"Pm4x10_qtc", portmodDispatchTypePm4x10_qtc}, 72 #endif /*PORTMOD_PM4X10_QTC_SUPPORT */ 73 #ifdef PORTMOD_PMNULL_SUPPORT 74 {"PmNull", portmodDispatchTypePmNull}, 75 #endif /*PORTMOD_PMNULL_SUPPORT */ 76 {NULL, 0} 77 }; 78 79 enum_mapping_t portmod_loopback_mode_t_mapping[] = { 80 {"MacOuter", portmodLoopbackMacOuter}, 81 {"MacCore", portmodLoopbackMacCore}, 82 {"MacPCS", portmodLoopbackMacPCS}, 83 {"MacAsyncFifo", portmodLoopbackMacAsyncFifo}, 84 {"PhyGloopPCS", portmodLoopbackPhyGloopPCS}, 85 {"PhyGloopPMD", portmodLoopbackPhyGloopPMD}, 86 {"PhyRloopPCS", portmodLoopbackPhyRloopPCS}, 87 {"PhyRloopPMD", portmodLoopbackPhyRloopPMD}, 88 {"MacRloop", portmodLoopbackMacRloop}, 89 {NULL, 0} 90 }; 91 92 enum_mapping_t portmod_core_port_mode_t_mapping[] = { 93 {"Quad", portmodPortModeQuad}, 94 {"Tri012", portmodPortModeTri012}, 95 {"Tri023", portmodPortModeTri023}, 96 {"Dual", portmodPortModeDual}, 97 {"Single", portmodPortModeSingle}, 98 {NULL, 0} 99 }; 100 101 enum_mapping_t portmod_port_mode_aux_info_t_mapping[] = { 102 {"None", portmodModeInfoNone}, 103 {"ThreePorts", portmodModeInfoThreePorts}, 104 {"TwoDualModePorts", portmodModeInfoTwoDualModePorts}, 105 {NULL, 0} 106 }; 107 108 enum_mapping_t portmod_prbs_mode_t_mapping[] = { 109 {"Phy", portmodPrbsModePhy}, 110 {"Mac", portmodPrbsModeMac}, 111 {NULL, 0} 112 }; 113 114 enum_mapping_t portmod_ext_to_int_phy_ctrlcode_t_mapping[] = { 115 {"Init", portmodExtToInt_CtrlCode_Init}, 116 {"Reset", portmodExtToInt_CtrlCode_Reset}, 117 {"Link", portmodExtToInt_CtrlCode_Link}, 118 {"Enable", portmodExtToInt_CtrlCode_Enable}, 119 {"Duplex", portmodExtToInt_CtrlCode_Duplex}, 120 {"Speed", portmodExtToInt_CtrlCode_Speed}, 121 {"Master", portmodExtToInt_CtrlCode_Master}, 122 {"AN", portmodExtToInt_CtrlCode_AN}, 123 {"AdvLocal", portmodExtToInt_CtrlCode_AdvLocal}, 124 {"AdvRemote", portmodExtToInt_CtrlCode_AdvRemote}, 125 {"LB", portmodExtToInt_CtrlCode_LB}, 126 {"Interface", portmodExtToInt_CtrlCode_Interface}, 127 {"Ability", portmodExtToInt_CtrlCode_Ability}, 128 {"AbilityAdvert", portmodExtToInt_CtrlCode_AbilityAdvert}, 129 {"AbilityRemote", portmodExtToInt_CtrlCode_AbilityRemote}, 130 {"AbilityLocal", portmodExtToInt_CtrlCode_AbilityLocal}, 131 {"LinkupEvt", portmodExtToInt_CtrlCode_LinkupEvt}, 132 {"LinkdnEvt", portmodExtToInt_CtrlCode_LinkdnEvt}, 133 {"MDIX", portmodExtToInt_CtrlCode_MDIX}, 134 {"MDIXStatus", portmodExtToInt_CtrlCode_MDIXStatus}, 135 {"MediumConfig", portmodExtToInt_CtrlCode_MediumConfig}, 136 {"Medium", portmodExtToInt_CtrlCode_Medium}, 137 {"CableDiag", portmodExtToInt_CtrlCode_CableDiag}, 138 {"Control", portmodExtToInt_CtrlCode_Control}, 139 {"Firmware", portmodExtToInt_CtrlCode_Firmware}, 140 {"TimesyncConfig", portmodExtToInt_CtrlCode_TimesyncConfig}, 141 {"TimesyncControl", portmodExtToInt_CtrlCode_TimesyncControl}, 142 {"TimesyncEnhancedCapture", portmodExtToInt_CtrlCode_TimesyncEnhancedCapture}, 143 {"DiagCtrl", portmodExtToInt_CtrlCode_DiagCtrl}, 144 {"LaneControl", portmodExtToInt_CtrlCode_LaneControl}, 145 {"OAMConfig", portmodExtToInt_CtrlCode_OAMConfig}, 146 {"OAMControl", portmodExtToInt_CtrlCode_OAMControl}, 147 {"Multi", portmodExtToInt_CtrlCode_Multi}, 148 {"Probe", portmodExtToInt_CtrlCode_Probe}, 149 {"PreconditionBeforeProbe", portmodExtToInt_CtrlCode_PreconditionBeforeProbe}, 150 {"LinkfaultGet", portmodExtToInt_CtrlCode_LinkfaultGet}, 151 {"SpeedLine", portmodExtToInt_CtrlCode_SpeedLine}, 152 {NULL, 0} 153 }; 154 155 enum_mapping_t portmod_cpm_core_mode_t_mapping[] = { 156 {"AllCpri", portmodCpmAllCpri}, 157 {"AllIEEE", portmodCpmAllIEEE}, 158 {"AllHIGIG", portmodCpmAllHIGIG}, 159 {"MixEthCpri", portmodCpmMixEthCpri}, 160 {NULL, 0} 161 }; 162 163 enum_mapping_t portmod_core_port_enet_cpri_type_t_mapping[] = { 164 {"EthMode", portmodCpmPrtEthMode}, 165 {"EthOfMixedMode", portmodCpmPrtEthOfMixedMode}, 166 {"CpriMode", portmodCpmPrtCpriMode}, 167 {"CpriOfMixedMode", portmodCpmPrtCpriOfMixedMode}, 168 {"Rsvd4Mode", portmodCpmPrtRsvd4Mode}, 169 {"Rsvd4OfMixedMode", portmodCpmPrtRsvd4OfMixedMode}, 170 {NULL, 0} 171 }; 172 173 enum_mapping_t portmod_qtc_mode_t_mapping[] = { 174 {"Invalid", portmodQtcModeInvalid}, 175 {"Ethernet", portmodQtcModeEthernet}, 176 {"Qsgmii", portmodQtcModeQsgmii}, 177 {"Usxgmii", portmodQtcModeUsxgmii}, 178 {NULL, 0} 179 }; 180 181 enum_mapping_t portmod_vco_type_t_mapping[] = { 182 {"Invalid", portmodVCOInvalid}, 183 {"20G", portmodVCO20G}, 184 {"21G", portmodVCO21G}, 185 {"25G", portmodVCO25G}, 186 {"26G", portmodVCO26G}, 187 {"27G", portmodVCO27G}, 188 {"20P625G", portmodVCO20P625G}, 189 {"20P937G", portmodVCO20P937G}, 190 {"22P5G", portmodVCO22P5G}, 191 {"23G", portmodVCO23G}, 192 {"25P781G", portmodVCO25P781G}, 193 {"26P562G", portmodVCO26P562G}, 194 {"6P25G", portmodVCO6P25G}, 195 {"6P5625G", portmodVCO6P5625G}, 196 {"8P125G", portmodVCO8P125G}, 197 {"9P735G", portmodVCO9P735G}, 198 {"10G", portmodVCO10G}, 199 {"10P3125G", portmodVCO10P3125G}, 200 {"10P9375G", portmodVCO10P9375G}, 201 {"12P5G", portmodVCO12P5G}, 202 {"27P343G", portmodVCO27P343G}, 203 {"28P125G", portmodVCO28P125G}, 204 {NULL, 0} 205 }; 206 207 enum_mapping_t portmod_call_back_action_type_t_mapping[] = { 208 {"Pre", portmodCallBackActionTypePre}, 209 {"During", portmodCallBackActionTypeDuring}, 210 {"Post", portmodCallBackActionTypePost}, 211 {NULL, 0} 212 }; 213 214 enum_mapping_t portmod_intr_type_t_mapping[] = { 215 {"MibTxMemErr", portmodIntrTypeMibTxMemErr}, 216 {"MibRxMemErr", portmodIntrTypeMibRxMemErr}, 217 {"MacTxCdcMemErr", portmodIntrTypeMacTxCdcMemErr}, 218 {"MacRxCdcMemErr", portmodIntrTypeMacRxCdcMemErr}, 219 {"MacRxTsCdcMemErr", portmodIntrTypeMacRxTsCdcMemErr}, 220 {"TscErr", portmodIntrTypeTscErr}, 221 {"PmdErr", portmodIntrTypePmdErr}, 222 {"RxFcReqFull", portmodIntrTypeRxFcReqFull}, 223 {"Core0Intr", portmodIntrTypeCore0Intr}, 224 {"Core1Intr", portmodIntrTypeCore1Intr}, 225 {"Core2Intr", portmodIntrTypeCore2Intr}, 226 {"Core3Intr", portmodIntrTypeCore3Intr}, 227 {"Tsc0Intr", portmodIntrTypeTsc0Intr}, 228 {"Tsc1Intr", portmodIntrTypeTsc1Intr}, 229 {"Tsc2Intr", portmodIntrTypeTsc2Intr}, 230 {"Linkdown", portmodIntrTypeLinkdown}, 231 {"MacErr", portmodIntrTypeMacErr}, 232 {"TxPktUnderflow", portmodIntrTypeTxPktUnderflow}, 233 {"TxPktOverflow", portmodIntrTypeTxPktOverflow}, 234 {"TxLlfcMsgOverflow", portmodIntrTypeTxLlfcMsgOverflow}, 235 {"TxTSFifoOverflow", portmodIntrTypeTxTSFifoOverflow}, 236 {"RxPktOverflow", portmodIntrTypeRxPktOverflow}, 237 {"RxMsgOverflow", portmodIntrTypeRxMsgOverflow}, 238 {"TxCdcSingleBitErr", portmodIntrTypeTxCdcSingleBitErr}, 239 {"TxCdcDoubleBitErr", portmodIntrTypeTxCdcDoubleBitErr}, 240 {"RxCdcSingleBitErr", portmodIntrTypeRxCdcSingleBitErr}, 241 {"RxCdcDoubleBitErr", portmodIntrTypeRxCdcDoubleBitErr}, 242 {"RxTsMemSingleBitErr", portmodIntrTypeRxTsMemSingleBitErr}, 243 {"RxTsMemDoubleBitErr", portmodIntrTypeRxTsMemDoubleBitErr}, 244 {"LocalFaultStatus", portmodIntrTypeLocalFaultStatus}, 245 {"RemoteFaultStatus", portmodIntrTypeRemoteFaultStatus}, 246 {"LinkInterruptionStatus", portmodIntrTypeLinkInterruptionStatus}, 247 {"TsEntryValid", portmodIntrTypeTsEntryValid}, 248 {"MibMemSingleBitErr", portmodIntrTypeMibMemSingleBitErr}, 249 {"MibMemDoubleBitErr", portmodIntrTypeMibMemDoubleBitErr}, 250 {"MibMemMultipleBitErr", portmodIntrTypeMibMemMultipleBitErr}, 251 {"TscCore0Err", portmodIntrTypeTscCore0Err}, 252 {"TscCore1Err", portmodIntrTypeTscCore1Err}, 253 {"FcReqFull", portmodIntrTypeFcReqFull}, 254 {NULL, 0} 255 }; 256 257 enum_mapping_t portmod_stat_val_t_mapping[] = { 258 {"IfInOctets", portmodIfInOctets}, 259 {"IfInUcastPkts", portmodIfInUcastPkts}, 260 {"IfInNUcastPkts", portmodIfInNUcastPkts}, 261 {"IfInBroadcastPkts", portmodIfInBroadcastPkts}, 262 {"IfInMulticastPkts", portmodIfInMulticastPkts}, 263 {"IfInDiscards", portmodIfInDiscards}, 264 {"IfInErrors", portmodIfInErrors}, 265 {"IfOutOctets", portmodIfOutOctets}, 266 {"IfOutUcastPkts", portmodIfOutUcastPkts}, 267 {"IfOutNUcastPkts", portmodIfOutNUcastPkts}, 268 {"IfOutBroadcastPkts", portmodIfOutBroadcastPkts}, 269 {"IfOutMulticastPkts", portmodIfOutMulticastPkts}, 270 {"IfOutDiscards", portmodIfOutDiscards}, 271 {"IfOutErrors", portmodIfOutErrors}, 272 {"IpInReceives", portmodIpInReceives}, 273 {"IpInHdrErrors", portmodIpInHdrErrors}, 274 {"IpForwDatagrams", portmodIpForwDatagrams}, 275 {"IpInDiscards", portmodIpInDiscards}, 276 {"Dot1dBasePortMtuExceededDiscards", portmodDot1dBasePortMtuExceededDiscards}, 277 {"Dot1dTpPortInFrames", portmodDot1dTpPortInFrames}, 278 {"Dot1dTpPortOutFrames", portmodDot1dTpPortOutFrames}, 279 {"Dot1dPortInDiscards", portmodDot1dPortInDiscards}, 280 {"EtherStatsDropEvents", portmodEtherStatsDropEvents}, 281 {"EtherStatsOctets", portmodEtherStatsOctets}, 282 {"EtherStatsPkts", portmodEtherStatsPkts}, 283 {"EtherStatsBroadcastPkts", portmodEtherStatsBroadcastPkts}, 284 {"EtherStatsMulticastPkts", portmodEtherStatsMulticastPkts}, 285 {"EtherStatsCRCAlignErrors", portmodEtherStatsCRCAlignErrors}, 286 {"EtherStatsUndersizePkts", portmodEtherStatsUndersizePkts}, 287 {"EtherStatsOversizePkts", portmodEtherStatsOversizePkts}, 288 {"EtherRxOversizePkts", portmodEtherRxOversizePkts}, 289 {"EtherTxOversizePkts", portmodEtherTxOversizePkts}, 290 {"EtherStatsFragments", portmodEtherStatsFragments}, 291 {"EtherStatsJabbers", portmodEtherStatsJabbers}, 292 {"EtherStatsPkts64Octets", portmodEtherStatsPkts64Octets}, 293 {"EtherStatsPkts65to127Octets", portmodEtherStatsPkts65to127Octets}, 294 {"EtherStatsPkts128to255Octets", portmodEtherStatsPkts128to255Octets}, 295 {"EtherStatsPkts256to511Octets", portmodEtherStatsPkts256to511Octets}, 296 {"EtherStatsPkts512to1023Octets", portmodEtherStatsPkts512to1023Octets}, 297 {"EtherStatsPkts1024to1518Octets", portmodEtherStatsPkts1024to1518Octets}, 298 {"BcmEtherStatsPkts1519to1522Octets", portmodBcmEtherStatsPkts1519to1522Octets}, 299 {"BcmEtherStatsPkts1522to2047Octets", portmodBcmEtherStatsPkts1522to2047Octets}, 300 {"BcmEtherStatsPkts2048to4095Octets", portmodBcmEtherStatsPkts2048to4095Octets}, 301 {"BcmEtherStatsPkts4095to9216Octets", portmodBcmEtherStatsPkts4095to9216Octets}, 302 {"BcmEtherStatsPkts9217to16383Octets", portmodBcmEtherStatsPkts9217to16383Octets}, 303 {"BcmReceivedPkts64Octets", portmodBcmReceivedPkts64Octets}, 304 {"BcmReceivedPkts65to127Octets", portmodBcmReceivedPkts65to127Octets}, 305 {"BcmReceivedPkts128to255Octets", portmodBcmReceivedPkts128to255Octets}, 306 {"BcmReceivedPkts256to511Octets", portmodBcmReceivedPkts256to511Octets}, 307 {"BcmReceivedPkts512to1023Octets", portmodBcmReceivedPkts512to1023Octets}, 308 {"BcmReceivedPkts1024to1518Octets", portmodBcmReceivedPkts1024to1518Octets}, 309 {"BcmReceivedPkts1519to2047Octets", portmodBcmReceivedPkts1519to2047Octets}, 310 {"BcmReceivedPkts2048to4095Octets", portmodBcmReceivedPkts2048to4095Octets}, 311 {"BcmReceivedPkts4095to9216Octets", portmodBcmReceivedPkts4095to9216Octets}, 312 {"BcmReceivedPkts9217to16383Octets", portmodBcmReceivedPkts9217to16383Octets}, 313 {"BcmTransmittedPkts64Octets", portmodBcmTransmittedPkts64Octets}, 314 {"BcmTransmittedPkts65to127Octets", portmodBcmTransmittedPkts65to127Octets}, 315 {"BcmTransmittedPkts128to255Octets", portmodBcmTransmittedPkts128to255Octets}, 316 {"BcmTransmittedPkts256to511Octets", portmodBcmTransmittedPkts256to511Octets}, 317 {"BcmTransmittedPkts512to1023Octets", portmodBcmTransmittedPkts512to1023Octets}, 318 {"BcmTransmittedPkts1024to1518Octets", portmodBcmTransmittedPkts1024to1518Octets}, 319 {"BcmTransmittedPkts1519to2047Octets", portmodBcmTransmittedPkts1519to2047Octets}, 320 {"BcmTransmittedPkts2048to4095Octets", portmodBcmTransmittedPkts2048to4095Octets}, 321 {"BcmTransmittedPkts4095to9216Octets", portmodBcmTransmittedPkts4095to9216Octets}, 322 {"BcmTransmittedPkts9217to16383Octets", portmodBcmTransmittedPkts9217to16383Octets}, 323 {"EtherStatsTXNoErrors", portmodEtherStatsTXNoErrors}, 324 {"EtherStatsRXNoErrors", portmodEtherStatsRXNoErrors}, 325 {"Dot3StatsFCSErrors", portmodDot3StatsFCSErrors}, 326 {"Dot3StatsInternalMacTransmitErrors", portmodDot3StatsInternalMacTransmitErrors}, 327 {"Dot3StatsFrameTooLongs", portmodDot3StatsFrameTooLongs}, 328 {"Dot3StatsSymbolErrors", portmodDot3StatsSymbolErrors}, 329 {"Dot3ControlInUnknownOpcodes", portmodDot3ControlInUnknownOpcodes}, 330 {"Dot3InPauseFrames", portmodDot3InPauseFrames}, 331 {"Dot3OutPauseFrames", portmodDot3OutPauseFrames}, 332 {"IfHCInOctets", portmodIfHCInOctets}, 333 {"IfHCInUcastPkts", portmodIfHCInUcastPkts}, 334 {"IfHCInMulticastPkts", portmodIfHCInMulticastPkts}, 335 {"IfHCInBroadcastPkts", portmodIfHCInBroadcastPkts}, 336 {"IfHCOutOctets", portmodIfHCOutOctets}, 337 {"IfHCOutUcastPkts", portmodIfHCOutUcastPkts}, 338 {"IfHCOutMulticastPkts", portmodIfHCOutMulticastPkts}, 339 {"IfHCOutBroadcastPckts", portmodIfHCOutBroadcastPckts}, 340 {"Ipv6IfStatsInReceives", portmodIpv6IfStatsInReceives}, 341 {"Ipv6IfStatsInHdrErrors", portmodIpv6IfStatsInHdrErrors}, 342 {"Ipv6IfStatsInAddrErrors", portmodIpv6IfStatsInAddrErrors}, 343 {"Ipv6IfStatsInDiscards", portmodIpv6IfStatsInDiscards}, 344 {"Ipv6IfStatsOutForwDatagrams", portmodIpv6IfStatsOutForwDatagrams}, 345 {"Ipv6IfStatsOutDiscards", portmodIpv6IfStatsOutDiscards}, 346 {"Ipv6IfStatsInMcastPkts", portmodIpv6IfStatsInMcastPkts}, 347 {"Ipv6IfStatsOutMcastPkts", portmodIpv6IfStatsOutMcastPkts}, 348 {"Ieee8021PfcRequests", portmodIeee8021PfcRequests}, 349 {"Ieee8021PfcIndications", portmodIeee8021PfcIndications}, 350 {"BcmIPMCBridgedPckts", portmodBcmIPMCBridgedPckts}, 351 {"BcmIPMCRoutedPckts", portmodBcmIPMCRoutedPckts}, 352 {"BcmIPMCInDroppedPckts", portmodBcmIPMCInDroppedPckts}, 353 {"BcmIPMCOutDroppedPckts", portmodBcmIPMCOutDroppedPckts}, 354 {"BcmRxVlanTagFrame", portmodBcmRxVlanTagFrame}, 355 {"BcmRxDoubleVlanTagFrame", portmodBcmRxDoubleVlanTagFrame}, 356 {"BcmTxVlanTagFrame", portmodBcmTxVlanTagFrame}, 357 {"BcmTxDoubleVlanTagFrame", portmodBcmTxDoubleVlanTagFrame}, 358 {"BcmRxPFCControlFrame", portmodBcmRxPFCControlFrame}, 359 {"BcmTxPFCControlFrame", portmodBcmTxPFCControlFrame}, 360 {"BcmRxPFCFramePriority0", portmodBcmRxPFCFramePriority0}, 361 {"BcmRxPFCFramePriority1", portmodBcmRxPFCFramePriority1}, 362 {"BcmRxPFCFramePriority2", portmodBcmRxPFCFramePriority2}, 363 {"BcmRxPFCFramePriority3", portmodBcmRxPFCFramePriority3}, 364 {"BcmRxPFCFramePriority4", portmodBcmRxPFCFramePriority4}, 365 {"BcmRxPFCFramePriority5", portmodBcmRxPFCFramePriority5}, 366 {"BcmRxPFCFramePriority6", portmodBcmRxPFCFramePriority6}, 367 {"BcmRxPFCFramePriority7", portmodBcmRxPFCFramePriority7}, 368 {"BcmTxPFCFramePriority0", portmodBcmTxPFCFramePriority0}, 369 {"BcmTxPFCFramePriority1", portmodBcmTxPFCFramePriority1}, 370 {"BcmTxPFCFramePriority2", portmodBcmTxPFCFramePriority2}, 371 {"BcmTxPFCFramePriority3", portmodBcmTxPFCFramePriority3}, 372 {"BcmTxPFCFramePriority4", portmodBcmTxPFCFramePriority4}, 373 {"BcmTxPFCFramePriority5", portmodBcmTxPFCFramePriority5}, 374 {"BcmTxPFCFramePriority6", portmodBcmTxPFCFramePriority6}, 375 {"BcmTxPFCFramePriority7", portmodBcmTxPFCFramePriority7}, 376 {NULL, 0} 377 }; 378 379 enum_mapping_t portmod_preemption_control_t_mapping[] = { 380 {"Invalid", portmodPreemptionControlInvalid}, 381 {"PreemptionSupport", portmodPreemptionControlPreemptionSupport}, 382 {"EnableTx", portmodPreemptionControlEnableTx}, 383 {"VerifyEnable", portmodPreemptionControlVerifyEnable}, 384 {"VerifyTime", portmodPreemptionControlVerifyTime}, 385 {"VerifyAttempts", portmodPreemptionControlVerifyAttempts}, 386 {"NonFinalFragSizeRx", portmodPreemptionControlNonFinalFragSizeRx}, 387 {"FinalFragSizeRx", portmodPreemptionControlFinalFragSizeRx}, 388 {NULL, 0} 389 }; 390 391 enum_mapping_t portmod_preemption_tx_status_t_mapping[] = { 392 {"Inactive", portmodPreemptionTxStatusInactive}, 393 {"Verifying", portmodPreemptionTxStatusVerifying}, 394 {"Active", portmodPreemptionTxStatusActive}, 395 {NULL, 0} 396 }; 397 398 enum_mapping_t portmod_preemption_verify_status_type_t_mapping[] = { 399 {"Status", portmodPreemptionVerifyStatus}, 400 {"CountStatus", portmodPreemptionVerifyCountStatus}, 401 {NULL, 0} 402 }; 403 404 enum_mapping_t portmod_preemption_verify_status_t_mapping[] = { 405 {"Disabled", portmodPreemptionVerifyStatusDisabled}, 406 {"Initial", portmodPreemptionVerifyStatusInitial}, 407 {"InProgress", portmodPreemptionVerifyStatusInProgress}, 408 {"Succeeded", portmodPreemptionVerifyStatusSucceeded}, 409 {"Failed", portmodPreemptionVerifyStatusFailed}, 410 {NULL, 0} 411 }; 412 413 enum_mapping_t portmod_preemption_force_rx_eop_mode_t_mapping[] = { 414 {"SwRxEop", portmodPreemptionForceSwRxEop}, 415 {"AutoHwEop", portmodPreemptionForceAutoHwEop}, 416 {NULL, 0} 417 }; 418 419 #ifdef CPRIMOD_SUPPORT 420 enum_mapping_t portmod_cpri_stage_t_mapping[] = { 421 {"Rx", portmodCpriStageRx}, 422 {"Tx", portmodCpriStageTx}, 423 {NULL, 0} 424 }; 425 426 #endif /* CPRIMOD_SUPPORT */ 427 #endif /*PORTMOD_DIAG*/