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xgxs.c (4574B)


      1 /*
      2  * 
      3  * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file.
      4  * 
      5  * Copyright 2007-2019 Broadcom Inc. All rights reserved.
      6  *
      7  * File:        xgxs.c
      8  * Purpose:     Defines common PHY driver routines for Broadcom XGXS core.
      9  */
     10 
     11 #include <sal/types.h>
     12 #include <sal/core/spl.h>
     13 
     14 #include <soc/drv.h>
     15 #include <soc/debug.h>
     16 #include <soc/error.h>
     17 #include <soc/phyreg.h>
     18 
     19 #include <soc/phy.h>
     20 #include <soc/phy/phyctrl.h>
     21 #include <soc/phy/drv.h>
     22 
     23 #include "phydefs.h"      /* Must include before other phy related includes */
     24 
     25 #if defined(INCLUDE_PHY_XGXS)
     26 #include "phyconfig.h"    /* Must be the first phy include after phydefs.h */
     27 #include "phyreg.h"
     28 #include "xgxs.h"
     29 
     30 /*
     31  *      phy_xgxs_reg_read
     32  * Purpose:
     33  *      Routine to read PHY register
     34  * Parameters:
     35  *      uint         - BCM unit number
     36  *      pc           - PHY state
     37  *      flags        - Flags which specify the register type
     38  *      phy_reg_addr - Encoded register address
     39  *      phy_data     - (OUT) Value read from PHY register
     40  * Note:
     41  *      This register read function is not thread safe. Higher level
     42  * function that calls this function must obtain a per port lock
     43  * to avoid overriding register page mapping between threads.
     44  */
     45 int
     46 phy_xgxs_reg_read(int unit, soc_port_t port, uint32 flags,
     47                   uint32 phy_reg_addr, uint32 *phy_data)
     48 {
     49     uint16               reg_bank;
     50     uint8                reg_addr;
     51     uint16               data;     /* Temporary holder for phy_data */
     52     phy_ctrl_t           *pc;      /* PHY software state */
     53 
     54     COMPILER_REFERENCE(flags);
     55 
     56     pc   = INT_PHY_SW_STATE(unit, port);
     57 
     58     reg_bank  = SOC_PHY_REG_BANK(phy_reg_addr);
     59     reg_addr  = SOC_PHY_REG_ADDR(phy_reg_addr);
     60 
     61     SOC_IF_ERROR_RETURN
     62         (phy_reg_xgxs_read(unit, pc, reg_bank, reg_addr, &data));
     63 
     64    *phy_data = data;
     65 
     66     return SOC_E_NONE;
     67 }
     68 /*
     69  * Function:
     70  *      phy_xgxs_reg_write
     71  * Purpose:
     72  *      Routine to write PHY register
     73  * Parameters:
     74  *      uint         - BCM unit number
     75  *      pc           - PHY state
     76  *      flags        - Flags which specify the register type
     77  *      phy_reg_addr - Encoded register address
     78  *      phy_data     - Value write to PHY register
     79  * Note:
     80  *      This register read function is not thread safe. Higher level
     81  * function that calls this function must obtain a per port lock
     82  * to avoid overriding register page mapping between threads.
     83  */
     84 int
     85 phy_xgxs_reg_write(int unit, soc_port_t port, uint32 flags,
     86                    uint32 phy_reg_addr, uint32 phy_data)
     87 {
     88     uint16               reg_bank;
     89     uint8                reg_addr;
     90     uint16               data;     /* Temporary holder for phy_data */
     91     phy_ctrl_t           *pc;      /* PHY software state */
     92 
     93     COMPILER_REFERENCE(flags);
     94 
     95     pc   = INT_PHY_SW_STATE(unit, port);
     96     data = (uint16) (phy_data & 0x0000FFFF);
     97 
     98     reg_bank  = SOC_PHY_REG_BANK(phy_reg_addr);
     99     reg_addr  = SOC_PHY_REG_ADDR(phy_reg_addr);
    100 
    101     return phy_reg_xgxs_write(unit, pc, reg_bank, reg_addr, data);
    102 } 
    103 /*
    104  * Function:
    105  *      phy_xgxs_reg_modify
    106  * Purpose:
    107  *      Routine to write PHY register
    108  * Parameters:
    109  *      uint         - BCM unit number
    110  *      pc           - PHY state
    111  *      flags        - Flags which specify the register type
    112  *      phy_reg_addr - Encoded register address
    113  *      phy_mo_data  - New value for the bits specified in phy_mo_mask
    114  *      phy_mo_mask  - Bit mask to modify
    115  * Note:
    116  *      This register read function is not thread safe. Higher level
    117  * function that calls this function must obtain a per port lock
    118  * to avoid overriding register page mapping between threads.
    119  */
    120 int
    121 phy_xgxs_reg_modify(int unit, soc_port_t port, uint32 flags,
    122                     uint32 phy_reg_addr, uint32 phy_data,
    123                     uint32 phy_data_mask)
    124 {
    125     uint16               reg_bank;
    126     uint8                reg_addr;
    127     uint16               data;     /* Temporary holder for phy_data */
    128     uint16               mask;     /* Temporary holder for phy_data_mask */
    129     phy_ctrl_t           *pc;      /* PHY software state */
    130 
    131     COMPILER_REFERENCE(flags);
    132 
    133     pc   = INT_PHY_SW_STATE(unit, port);
    134     data = (uint16) (phy_data & 0x0000FFFF);
    135     mask = (uint16) (phy_data_mask & 0x0000FFFF);
    136 
    137     reg_bank  = SOC_PHY_REG_BANK(phy_reg_addr);
    138     reg_addr  = SOC_PHY_REG_ADDR(phy_reg_addr);
    139 
    140     return phy_reg_xgxs_modify(unit, pc, reg_bank, reg_addr, data, mask);
    141 }
    142 
    143 #else /* INCLUDE_PHY_XGXS */
    144 int _phy_xgxs_not_empty;
    145 #endif /* INCLUDE_PHY_XGXS */
    146