wcmod_main.h (26616B)
1 /* 2 * 3 * 4 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 5 * 6 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 7 */ 8 #include <sal/types.h> 9 #include <soc/phy.h> 10 /* FILE: wcmod_main.h */ 11 /* DATE: Mon Jun 13 10:28:56 PDT 2011 */ 12 13 14 #ifndef _WCMOD_MAIN_H_ 15 #define _WCMOD_MAIN_H_ 16 17 #if defined (_DV_TRIUMPH3) || defined (_DV_ODYSSEY) || defined (_DV_NATIVE) || defined (_DV_REDSTONE) || defined (VERILOG) 18 #else 19 #define _SDK_WCMOD_ 20 #endif 21 22 #ifndef STATIC 23 #define STATIC static 24 #endif /* STATIC */ 25 26 #ifndef __KERNEL__ 27 #include <stdio.h> 28 #include <string.h> 29 #include <stdlib.h> 30 #include "errno.h" 31 #endif 32 #include "wcmod_defines.h" 33 34 #ifndef __KERNEL__ 35 #if defined (_DV_TRIUMPH3) || defined (_DV_ODYSSEY) || defined (_DV_NATIVE) || defined (_DV_REDSTONE) 36 #define printf io_printf 37 #endif 38 39 #ifdef CADENCE 40 #include <veriuser.h> 41 #endif /* CADENCE */ 42 43 #ifdef SYNOPSYS 44 #include <vcsuser.h> 45 #endif /* SYNOPSYS */ 46 47 #endif 48 49 #ifdef _SDK_WCMOD_ 50 #include <sal/types.h> 51 #include <soc/error.h> 52 #include <soc/cm.h> 53 #include <soc/util.h> 54 #include <soc/cmic.h> 55 #include <soc/phyreg.h> 56 #include <shared/phyreg.h> 57 #endif 58 59 #ifdef _SDK_WCMOD_ 60 #define _SAL_TYPES_H 61 #define printf bsl_printf 62 #endif 63 64 #ifndef _SDK_WCMOD_ 65 typedef unsigned char uint8; /* 8-bit quantity */ 66 typedef unsigned short uint16; /* 16-bit quantity */ 67 typedef unsigned int uint32; /* 32-bit quantity */ 68 69 /* from "sal/core/time.h" */ 70 typedef uint32 sal_usecs_t; 71 72 /* from "soc/types.h" */ 73 typedef int soc_port_t; 74 75 /* dev 2 is almost always the testbench. */ 76 #define SOC_MAX_NUM_DEVICES 2 77 78 /* there are up to 72 ports, max needed by trident. */ 79 /* Most other platforms use 1, 2, */ 80 /* Hence a second variable called NUM_PORTS which is the actual number of */ 81 /* ports. We set it to max for now. Not a big deal in terms of memory */ 82 83 #define SOC_MAX_NUM_PORTS 72 84 #define NUM_PORTS SOC_MAX_NUM_PORTS 85 #endif /*#ifndef _SDK_WCMOD_ */ 86 87 #ifdef _SDK_WCMOD_ 88 #define SOC_E_NONE 0 89 #define SOC_E_MULT_REG 1 /* this means no errors */ 90 #define SOC_E_FUNC_FOUND 2 /* function found. Nothing more to do. */ 91 #define SOC_E_FUNC_NOT_FOUND 3 /* function not found. Continue search */ 92 #define SOC_E_ERROR SOC_E_INTERNAL 93 #endif 94 95 #define INT_PHY_SW_STATE(unit, port) (int_phy_ctrl[unit][port]) 96 97 /* these are taken from the original wc40.c */ 98 #define WC40_REG_READ(_unit, _pc, _flags, _reg_addr, _val) \ 99 wcmod_reg_aer_read((_unit), (_pc), (_reg_addr), (_val)) 100 101 #define WC40_REG_WRITE(_unit, _pc, _flags, _reg_addr, _val) \ 102 wcmod_reg_aer_write((_unit), (_pc), (_reg_addr), (_val)) 103 104 #define WC40_REG_MODIFY(_unit, _pc, _flags, _reg_addr, _val, _mask) \ 105 wcmod_reg_aer_modify((_unit), (_pc), (_reg_addr), (_val),(_mask)) 106 107 #define WC40_UDELAY(_time) sal_udelay(_time) 108 109 #define PRINTF_ERROR(fmt) printf fmt /* from bcmdrv/systemInit.h */ 110 111 #ifndef _SDK_WCMOD_ 112 #define SOC_IF_ERROR_RETURN(op) \ 113 do { int __rv__; if ((__rv__ = (op)) < 0) \ 114 { PRINTF_ERROR((__FILE__ " : " #op " %d\n", __LINE__)); \ 115 return(__rv__);} } \ 116 while(0) 117 #endif /*_SDK_WCMOD_ */ 118 119 #define CHK_RET_VAL_FUNC(op) \ 120 { int rv; if ((rv=(op)) != 0) \ 121 { printf("ERROR %s:%d. #op# returned %d\n", __FILE__,__LINE__,rv); \ 122 return (rv);} } 123 124 #define WC_AER_BCST_OFS_STRAP 0x1ff 125 #define PHYCTRL_MDIO_ADDR_SHARE (1 << 0) /*use phy base addr. to access lanes */ 126 #define PHYCTRL_MDIO_CL45 (1 << 1) /*use MDIO CL45 to access device */ 127 #define PHY_AER_REG_ADDR_AER(_addr) (((_addr) >> 16) & 0x0000FFFF) 128 #define PHY_AER_REG_ADDR_BLK(_addr) (((_addr) & 0x000FFF0)) 129 #define PHY_AER_REG_ADDR_REGAD(_addr) ((((_addr) & 0x00008000) >> 11) | \ 130 ((_addr) & 0x0000000F)) 131 132 #define PHY_AER_REG 0xFFDE 133 #define PHY_AER_REG_ADDR_CL45_DEVID(_addr) (((_addr) >> 27) & 0x0000001F) 134 #define PHY_AER_REG_ADDR_LANE_NUM(_addr) (((_addr) >> 16) & 0x07FF) 135 #define PHY_AER_REG_ADDR_CL45_REGAD(_addr) (((_addr) & 0x000FFFF)) 136 137 #ifndef _SDK_WCMOD_ 138 #define DEV_CFG_PTR(_pc) (&(((WC40_DEV_DESC_t *)((_pc)->driver_data))->cfg)) 139 #define SOC_PHY_CLAUSE45_ADDR(_devad,_regad) \ 140 ((((_devad) & 0x003F) << 16) | ((_regad) & 0xFFFF)) 141 #endif 142 143 #ifndef _MDK_WCMOD_ 144 #ifndef _SDK_WCMOD_ 145 #define FALSE 0 146 #define TRUE 1 147 #endif /*_SDK_WCMOD_ */ 148 #else 149 int getLane0Phyad(int phyad); 150 #endif /* _MDK_WCMOD_ */ 151 152 /* Borrowed from SDK. This struct controls iterations and time durations 153 * while executing a 'wait' or a 'poll'. No doxygen documentation for this. 154 */ 155 #ifndef _SDK_WCMOD_ 156 typedef struct soc_timeout_s 157 { 158 sal_usecs_t expire; 159 sal_usecs_t usec; 160 int min_polls; 161 int polls; 162 int exp_delay; 163 } soc_timeout_t; 164 #endif /* !_SDK_WCMOD_ */ 165 166 #define WC40_XGXSBLK0_XGXSSTATUSr 0x8001 167 #define WC40_PLL_WAIT 2500 168 169 /*define the constant for bypass pma/pmd speed enforce */ 170 #define PMA_PMD_SPEED_ENFORCE 0x1234 171 172 #define NUMBER_PCS_FUNCTION_TABLE_ENTRIES 100 173 174 /* This struct is a building block of a string associated function table. 175 * It is used to override native PCS Tier1 functions. No doxygen documentation 176 * for this. 177 */ 178 typedef struct strToPCSFunction { 179 char* p; 180 int (*fp)(wcmod_st*); 181 } str2PCSFn; 182 183 #include "wcmod.h" 184 #ifndef _SDK_WCMOD_ 185 #include "wcmod_platform_defines.h" 186 #include "wcmod_phyreg.h" /* for WCMod only. */ 187 #endif 188 189 extern str2PCSFn str2PCSFunc; 190 191 extern void wcmod_init_called(int x); 192 extern void wcmod_init(void); 193 extern int wcmod_tier1_selector(char* s,wcmod_st* c, int *retVal); 194 extern void wcmod_read_cfg(const char* fileName); 195 extern void print_config(int unit, int port); 196 extern int searchPCSFuncTable(char* selStr, wcmod_st* ws); 197 extern void copy_wcmod_st(wcmod_st *from, wcmod_st *to); 198 extern int isLaneEnabled(wcmod_lane_select ls, int lane, wcmod_st *ws); 199 extern wcmod_model_type getGenericModelType(wcmod_model_type model); 200 extern const char* getLaneStr(wcmod_lane_select ls); 201 extern wcmod_spd_intfc_set wcmod_spd_intf_s2e(char* s); 202 203 extern int wcmod_pcs_bypass_ctl(wcmod_st *pc); 204 extern int wcmod_master_slave_control(wcmod_st *pc); 205 extern int wcmod_slave_wakeup_control(wcmod_st *pc); 206 extern int wcmod_100fx_control(wcmod_st *pc); 207 extern int wcmod_tx_lane_disable(wcmod_st *pc); 208 extern int wcmod_power_control(wcmod_st *pc); 209 extern int wcmod_autoneg_set(wcmod_st *pc); 210 extern int wcmod_autoneg_page_set(wcmod_st *pc); 211 extern int wcmod_autoneg_control(wcmod_st *pc); 212 extern int wcmod_carrier_extension_set(wcmod_st *pc); 213 extern int wcmod_reg_read(wcmod_st *pc); 214 extern int wcmod_reg_write(wcmod_st *pc); 215 extern int wcmod_prbs_check(wcmod_st *pc); 216 extern int wcmod_cjpat_crpat_control(wcmod_st *pc); 217 extern int wcmod_cjpat_crpat_check(wcmod_st *pc); 218 extern int wcmod_diag(wcmod_st *pc); 219 extern int wcmod_lane_swap(wcmod_st *pc); 220 extern int wcmod_parallel_detect_control(wcmod_st *pc); 221 extern int wcmod_clause72_control(wcmod_st *pc); 222 extern int wcmod_pll_sequencer_control(wcmod_st *pc); 223 extern int wcmod_prog_data(wcmod_st *pc); 224 extern int wcmod_duplex_control(wcmod_st *pc); 225 extern int wcmod_revid_read(wcmod_st *pc); 226 extern int wcmod_rx_seq_control(wcmod_st *pc); 227 extern int wcmod_tx_rx_polarity(wcmod_st *pc); 228 extern int wcmod_set_port_mode(wcmod_st *pc); 229 extern int wcmod_prbs_control(wcmod_st *pc); 230 extern int wcmod_prbs_decouple_control(wcmod_st *pc); 231 extern int wcmod_scrambler_control(wcmod_st *pc); 232 extern int wcmod_rx_DFE_tap1_control(wcmod_st *pc); 233 extern int wcmod_rx_DFE_tap2_control(wcmod_st *pc); 234 extern int wcmod_rx_DFE_tap3_control(wcmod_st *pc); 235 extern int wcmod_rx_DFE_tap4_control(wcmod_st *pc); 236 extern int wcmod_rx_DFE_tap5_control(wcmod_st *pc); 237 extern int wcmod_rx_PF_control(wcmod_st *pc); 238 extern int wcmod_rx_low_freq_PF_control(wcmod_st *pc); 239 extern int wcmod_rx_VGA_control(wcmod_st *pc); 240 extern int wcmod_soft_reset(wcmod_st *pc); 241 extern int wcmod_tx_reset(wcmod_st *pc); 242 extern int wcmod_rx_reset(wcmod_st *pc); 243 extern int wcmod_aer_lane_select(wcmod_st *pc); 244 extern int wcmod_speed_intf_set(wcmod_st *pc); 245 extern int wcmod_speed_intf_control(wcmod_st *pc); 246 extern int wcmod_tx_bert_control(wcmod_st *pc); 247 extern int wcmod_rx_loopback_control(wcmod_st *pc); 248 extern int wcmod_rx_loopback_pcs_bypass(wcmod_st *pc); 249 extern int wcmod_tx_tap_control(wcmod_st *pc); 250 extern int wcmod_tx_pi_control(wcmod_st *pc); 251 extern int wcmod_tx_loopback_control(wcmod_st *pc); 252 extern int wcmod_port_stat_display(wcmod_st *pc); 253 extern int wcmod_core_reset(wcmod_st *pc); 254 extern int wcmod_tx_amp_control(wcmod_st *pc); 255 extern int wcmod_rx_p1_slicer_control(wcmod_st *pc); 256 extern int wcmod_rx_m1_slicer_control(wcmod_st *pc); 257 extern int wcmod_rx_d_slicer_control(wcmod_st *pc); 258 extern int wcmod_refclk_set(wcmod_st *pc); 259 extern int wcmod_asymmetric_mode_set(wcmod_st *pc); 260 extern int _wcmod_getRevDetails(wcmod_st* pc); 261 extern int _wcmod_lane_enable(wcmod_st* pc); 262 extern int _phy_wcmod_ind_init_common(wcmod_st *st, int fw_load_method); 263 extern int _phy_wcmod_independent_lane_init(wcmod_st *ws); 264 extern int _phy_wcmod_control_prbs_polynomial_set(wcmod_st *ws, uint32 value); 265 extern int _phy_wcmod_control_prbs_tx_invert_data_set(wcmod_st *ws, uint32 value); 266 extern int _phy_wcmod_control_prbs_enable_set(wcmod_st *ws, uint32 enable); 267 extern int _phy_wcmod_control_prbs_polynomial_get(wcmod_st *ws, uint32 *value); 268 extern int _phy_wcmod_control_prbs_tx_invert_data_get(wcmod_st *ws, uint32 *value); 269 extern int _phy_wcmod_control_prbs_enable_get(wcmod_st *ws, uint32 *value); 270 extern int _phy_wcmod_control_prbs_rx_status_get(wcmod_st *ws, uint32 *value); 271 extern int wcmod_firmware_mode_set(wcmod_st *pc); 272 extern int wcmod_EEE_pass_thru_set(wcmod_st *pc); 273 extern int wcmod_uc_status_dump(int unit, soc_port_t port, soc_phy_wcmod_uc_desc_t* pDesc /* the size of array should be MAX_NUM_LANES, parameter is NULL display the data using bsl_printf() */); 274 275 276 /*! 277 \mainpage WCMOD Documentation (Beta) 278 279 This is the documentation site for WCMod (<b>W</b>arpcore <b>C</b>onfiguration <b>MOD</b>ule) 280 281 \version 0.2 282 283 \author WCMod Team 284 285 \date 06/25/10 286 287 <B>Introduction</B><br> 288 289 Warpcore Configuration Module (WCMod) is a source-code/binary distributable 290 multi tiered library that defines a hardware abstraction layer for various 291 configuration modes of the broadcom Warpcore serdes IP. This document expects 292 the reader to be familiar with the Warpcore architecture. 293 294 The tiered structure progressively encapsulates register accesses and sequence 295 hiding complexities like indirect addressing (Address extension registers or 296 AER) and access protocol (MDIO CL22/CL45) implementation. The Tier1 layer, 297 also called WCMod Procedures are building blocks to construct comprehensive 298 warpcore Tier2 layers also called WCMod sequences. 299 300 Tier1 procedures are fixed sequences of register accesses, accomplishing a 301 specific sub-configuration. In general they are mode aware (combo or 302 independent) and only affect independent ports. 303 304 The full list of Tier1 procedures are tabulated below. 305 306 WCMod architecture documentation is created using doxygen and so follows the 307 code structure. Please use the following guidelines to use the documentation. 308 309 The documentation is stored in tabs. If you are reading this you are in the 310 main tab. (See the top left corner of our browser). The other tabs you will 311 see are 'classes' where the #wcmod_st struct is visible and 'files', where following files are visible. 312 313 \li wcmod_cfg_seq.c 314 \li wcmod_configuration_selector.c 315 \li wcmod_enum_defines.c 316 \li wcmod_main.c 317 \li wcmod_phyreg.c 318 319 \li wcmod_configuration_selector.h 320 \li wcmod_defines.h 321 \li wcmod_enum_defines.h 322 \li wcmod_main.h 323 \li wcmod_phyreg.h 324 \li wcmod_platform_defines.h 325 326 All Tier1 procedures have a fixed signature. They return an error code and 327 accept a reference to a C struct (called #wcmod_st). #wcmod_st is used to pass 328 input parameters to the Tier1 procedures and occassionally stores a return 329 value from the Tier1 procedure. #wcmod_st remembers the context of one warpcore 330 (not one port or one lane). If the system has multiple warpcores, the software 331 platform must create and maintain that many #wcmod_st structures. 332 333 Warpcores can be programmed per lane or per port (independent lane mode or 334 combo mode). Platforms control the lanes on which Tier1 procedures operate by 335 setting the #wcmod_st.lane_select element. The lane specific information is set 336 in the #wcmod_st.per_lane_control element which has fields dedicated to each of 337 the 4 lanes. In combo mode, the lane_select element should be set to zero and 338 any inputs to the Tier1 functions should be set in the lane 0 fields. 339 340 Tier1 procedures have no programmatic order dependencies. This implies that the 341 effect of a Tier1 is constant regardless of the state of the warpcore. 342 343 The exceptions are 344 \li #wcmod_set_port_mode function must be called before others. 345 \li Order mandated by Warpcore architecture. 346 \li Aggregate registers which control features of multiple lanes in warpcore. 347 348 <B>WCMod interface to System Platforms</B><br> 349 350 WCMod has an unambiguous interface mechanism to system platforms. Platforms can 351 be software systems like MDK, and SDK or customer specific software. It can 352 also be validation platforms including HDL (verilog/systemVerilog/Vera) based 353 testbenches. 354 355 WCMod functions (tier1 and tier2) operates on a single warpcore at a time. It 356 can be used to access multiple lanes within the warpcore, but cannot access 357 multiple warpcores simultaneously. To access different warpcores multiple calls 358 to tier1 procedures are needed. 359 360 WCMod defines a structure (called wcmod_st) which encapsulates all information 361 of a warpcore needed by WCMod. This structure should be created and maintained 362 by system platforms, one per warpcore. Typically an array of wcmod_st structs 363 is created, accessible by the warpcore's unique physical address. 364 365 All Tier1 procedures are called with a reference to a wcmod_st struct. of the 366 warpcore being accessed. WCMod will read and write information to the struct. 367 as needed. Adopting platforms should treat this struct as read only and should 368 not modify it. 369 370 Software platforms can avail a void pointer #wcmod_st.platform_info to store 371 arbitrary platform specific information. Platforms will manage memory of any 372 associated structure. In diagnostic mode, WCMod cannot print any information 373 about to the void pointer related structure. 374 375 WCMod drivers that access registers require system platforms to attach local 376 drivers to WCMod at compile time. Typically the drivers allow read and write to 377 registers. Any platform specific information needed by the drivers outside the 378 elements of #wcmod_st can passed to the drivers via #wcmod_st.platform_info. 379 WCMod will provide register address offsets, data and masks. 380 381 Warpcore lanes can architecturally be accessed in two ways. 382 \li 1.If the 'prt_ad' straps of the warpcore are strapped to a specific 383 value, say 'lane_add' and the multiport_en strap is enabled, lanes are accessed 384 as lane_add, lane_add+1, lane_add+2 and lane_add+3. This method is not 385 currently supported by WCMod. 386 \li 2.Lanes can be accessed by using the AER offset method. This is the 387 preferred method and is currently supported by WCMod. 388 389 Register access within lanes have the following pattern. 390 391 \li In independent mode tier1 procedures can be called for multiple lanes 392 lanes simultaneously. The lanes are chosen using #wcmod_st.lane_select 393 \li In dual xgxs mode two lanes form a logical port. So Tier1 procedures are 394 called for each dual port. Individual lanes are still accessible. 395 \li In combo mode, Tier1 procedures are called for a warpcore. Register access 396 for individual lanes are still available via #wcmod_st.lane_select. 397 398 <B>Input/Output for Tier1 procedures</B><br> 399 400 As previously mentioned the only input to all tier1 procedures is #wcmod_st. 401 All Tier1 procedures return a status value. Certain procedures, such as 402 'read_rev_id' which have to return a value modify a general purpose element 403 #wcmod_st.accData. Platforms that don't use returned information can ignore 404 this element. Others can pick up the information from #wcmod_st::accData 405 406 <B>WCMod Register Access Methods</B><br> 407 408 The virtual drivers in WCMod will eventually attach to platform specific 409 drivers. But prior to that, the registers, fields, and thier address (which 410 depends on the addressing mode and cl22/cl45 considerations) are disambiguated. 411 The psueodo code below illustrates this breakdown. 412 413 \code 414 WC40_REG_READ(unit, pc, flags, reg_addr, val); 415 * unit ignored 416 * pc is wcmod_st 417 * flags ignored 418 * reg_addr is the arch. address (i.e. needs to decoded) 419 * val is a short int pointer to store the read value. 420 421 wcmod_reg_aer_read(unit, pc, reg_addr, val); 422 * pc is the same wcmod_st 423 * reg_addr is unresolved addr 424 * val is the same short int pointer to store the read value. 425 426 * We fix address for dual XGXS mode. 427 * We fix address for dual strap offsets, multiport_addr_en port etc. 428 * i.e. reg_addr converted to phy_reg_addr 429 * call cl22 or cl45 drivers as needed. Assume we go cl22 way here. 430 431 wcmod_aer_cl22_read(pc, phy_reg_addr, val) 432 * pc is the same wcmod_st 433 * phy_reg_addr is the resolved addr 434 * val is the same short int pointer to store the read value. 435 436 * Figure out broadcast/per lane. 437 * Adjust address again for per lane. i.e. write lane num to bits 16,17 438 * Conduct a series of reg. accesses based on indirect (AER) reg. access 439 * For example, write the offset to reg. 0x1f etc. 440 441 wcmod_cl22_read(pc, phy_reg_addr, val) 442 * pc is the same wcmod_st 443 * phy_reg_addr is the resolved addr 444 * val is the same short int pointer to store the read value. 445 446 * call the physical driver. (compiled for target platform) 447 * In WC verilog, we call a DPI which calls the verilog task 448 * In Trident verilog, we call a DPI which directly access the Parallel 449 450 * control bus of the MDIO ( for simulation speedup) 451 * In MDK (vxworks vers.), we call our cdk_miim_read(), BRCM medium 452 * independent driver 453 * In SDK(all versions) we call a function ptr. that is provided by 454 * the broadcom software team. 455 \endcode 456 457 \note The WCMod and documentation is work in progress. Table below 458 459 <table cellspacing=0> 460 461 <tr><td colspan=3><B>'Current Status' bit-mappings</B></td></tr> 462 463 <tr><td><B>Tier1 </B> </td><td><B>Handle</B> </td><td>PCS or PMA</td><td><B>Status</B></td></tr> 464 <tr><td>wcmod_aer_lane_select </td><td> AER_LANE_SELECT </td><td> PMA/PMD </td><td>DONE <td></tr> 465 <tr><td>wcmod_tx_lane_disable </td><td> TX_LANE_DISABLE </td><td> PMA/PMD </td><td>DONE <td></tr> 466 <tr><td>wcmod_autoneg_page_set </td><td> AUTONEG_PAGE_SET </td><td> PMA/PMD </td><td>DONE <td></tr> 467 <tr><td>wcmod_cjpat_crpat_control </td><td> CJPAT_CRPAT_CONTROL </td><td> PCS </td><td>DONE <td></tr> 468 <tr><td>wcmod_lane_swap </td><td> LANE_SWAP </td><td> PMA/PMD </td><td>DONE <td></tr> 469 <tr><td>wcmod_pll_lock_wait </td><td> PLL_LOCK_WAIT </td><td> PMA/PMD </td><td>DONE <td></tr> 470 <tr><td>wcmod_prbs_check </td><td> PRBS_CHECK </td><td> PMA/PMD </td><td>DONE <td></tr> 471 <tr><td>wcmod_print_wcmod_st </td><td> PRINT_WCMOD_ST </td><td> NONE </td><td>DONE <td></tr> 472 <tr><td>wcmod_prog_data </td><td> PROG_DATA </td><td> PCS </td><td>DONE <td></tr> 473 <tr><td>wcmod_reg_read </td><td> REG_READ </td><td> PCS </td><td>DONE <td></tr> 474 <tr><td>wcmod_revid_read </td><td> REVID_READ </td><td> PCS </td><td>DONE <td></tr> 475 <tr><td>wcmod_rx_loopback_control </td><td> RX_LOOPBACK_CONTROL </td><td> PCS </td><td>DONE <td></tr> 476 <tr><td>wcmod_rx_seq_control </td><td> RX_SEQ_CONTROL </td><td> PMA/PMD </td><td>DONE <td></tr> 477 <tr><td>wcmod_set_port_mode </td><td> SET_PORT_MODE </td><td> BOTH </td><td>DONE <td></tr> 478 <tr><td>wcmod_soft_reset </td><td> SOFT_RESET </td><td> PCS </td><td>DONE <td></tr> 479 <tr><td>wcmod_tx_bert_control </td><td> TX_BERT_CONTROL </td><td> PCS </td><td>DONE <td></tr> 480 <tr><td>wcmod_tx_loopback_control </td><td> TX_LOOPBACK_CONTROL </td><td> PCS </td><td>DONE <td></tr> 481 <tr><td>wcmod_tx_rx_packets_check </td><td> TX_RX_PACKETS_CHECK </td><td> PCS </td><td>DONE <td></tr> 482 <tr><td>wcmod_tx_rx_polarity </td><td> TX_RX_POLARITY </td><td> PCS </td><td>DONE <td></tr> 483 <tr><td>wcmod_100fx_control </td><td> 100FX_CONTROL </td><td> PCS </td><td>DONE <td></tr> 484 <tr><td>wcmod_autoneg_set </td><td> AUTONEG_SET </td><td> PCS </td><td>INPROG <td></tr> 485 <tr><td>wcmod_autoneg_control </td><td> AUTONEG_CONTROL </td><td> PCS </td><td>INPROG <td></tr> 486 <tr><td>wcmod_cjpat_crpat_check </td><td> CJPAT_CRPAT_CHECK </td><td> PCS </td><td>DONE <td></tr> 487 <tr><td>wcmod_clause72_control </td><td> CLAUSE72_CONTROL </td><td> PCS </td><td>DONE <td></tr> 488 <tr><td>wcmod_core_reset </td><td> CORE_RESET </td><td> PCS </td><td>INPROG <td></tr> 489 <tr><td>wcmod_duplex_control </td><td> DUPLEX_CONTROL </td><td> PCS </td><td>DONE <td></tr> 490 <tr><td>wcmod_parallel_detect_control </td><td> PARALLEL_DETECT_CONTROL </td><td> PCS </td><td>INPROG <td></tr> 491 <tr><td>wcmod_pll_sequencer_control </td><td> PLL_SEQUENCER_CONTROL </td><td> PMA/PMD </td><td>DONE <td></tr> 492 <tr><td>wcmod_port_stat_display </td><td> PORT_STAT_DISPLAY </td><td> BOTH </td><td>DONE <td></tr> 493 <tr><td>wcmod_prbs_control </td><td> PRBS_CONTROL </td><td> PMA/PMD </td><td>DONE <td></tr> 494 <tr><td>wcmod_speed_intf_set </td><td> SET_SPEED_INTF(Deprecate)</td><td> BOTH </td><td>INPROG <td></tr> 495 <tr><td>wcmod_speed_intf_control </td><td> SPD_INTF_CONTROL </td><td> BOTH </td><td>INPROG <td></tr> 496 <tr><td>wcmod_Idriver_Ipredriver_set </td><td> IDRIVER_IPREDRIVER_SET </td><td> PMA/PMD </td><td>DONE <td></tr> 497 <tr><td>wcmod_FEC_control </td><td> FEC_CONTROL </td><td> PCS </td><td>DONE <td></tr> 498 <tr><td>wcmod_firmware_set </td><td> FIRMWARE_SET </td><td> PCS </td><td>DONE <td></tr> 499 <tr><td>wcmod_packet_size_IPG_set </td><td> PACKET_SIZE_IPG_SET </td><td> PCS </td><td>NOTDONE<td></tr> 500 <tr><td>wcmod_power_control </td><td> POWER_CONTROL </td><td> PMA/PMD </td><td>NOTDONE<td></tr> 501 <tr><td>wcmod_rx_loopback_sfpplus </td><td> RX_LOOPBACK_SFPPLUS </td><td> PCS </td><td>DONE <td></tr> 502 <tr><td>wcmod_scrambler_control </td><td> SCRAMBLER_CONTROL </td><td> PCS </td><td>NOTDONE<td></tr> 503 <tr><td>wcmod_set_BRCM64B66B </td><td> SET_BRCM64B66B </td><td> PCS </td><td>NOTDONE<td></tr> 504 <tr><td>wcmod_set_rx_DFE_tap1_override</td><td> SET_RX_DFE_TAP1_OVERRIDE</td><td> PMA/PMD </td><td>DONE <td></tr> 505 <tr><td>wcmod_set_rx_DFE_tap2_override</td><td> SET_RX_DFE_TAP2_OVERRIDE</td><td> PMA/PMD </td><td>DONE <td></tr> 506 <tr><td>wcmod_set_rx_DFE_tap3_override</td><td> SET_RX_DFE_TAP3_OVERRIDE</td><td> PMA/PMD </td><td>DONE <td></tr> 507 <tr><td>wcmod_set_rx_DFE_tap4_override</td><td> SET_RX_DFE_TAP4_OVERRIDE</td><td> PMA/PMD </td><td>DONE <td></tr> 508 <tr><td>wcmod_set_rx_DFE_tap5_override</td><td> SET_RX_DFE_TAP5_OVERRIDE</td><td> PMA/PMD </td><td>DONE <td></tr> 509 <tr><td>wcmod_set_rx_PF_override </td><td> SET_RX_PF_OVERRIDE </td><td> PMA/PMD </td><td>DONE <td></tr> 510 <tr><td>wcmod_set_rx_VGA_override </td><td> SET_RX_VGA_OVERRIDE </td><td> PMA/PMD </td><td>DONE <td></tr> 511 <tr><td>wcmod_tx_tap_control </td><td> TX_TAP_CONTROL </td><td> PMA/PMD </td><td>DONE <td></tr> 512 <tr><td>wcmod_rx_p1_slicer_control </td><td> RX_P1_SLICER_CONTROL </td><td> PMA/PMD </td><td>DONE <td></tr> 513 <tr><td>wcmod_rx_m1_slicer_control </td><td> RX_M1_SLICER_CONTROL </td><td> PMA/PMD </td><td>DONE <td></tr> 514 <tr><td>wcmod_rx_d_slicer_control </td><td> RX_D_SLICER_CONTROL </td><td> PMA/PMD </td><td>DONE <td></tr> 515 <tr><td>wcmod_diag </td><td> WCMOD_DIAG </td><td> BOTH </td><td>INPROG <td></tr> 516 517 </table> 518 519 <B>Overriding native with Customer PCS Functions.</B><br> 520 521 Customers can attach custom functions to WCMod. Though it seems to indicate 522 replacement or augmentation of Tier1 functions accessing registers in the PCS 523 domain only (PCS Functions), any WCMod function can be selectively replaced 524 with this methodology. This makes WCMod more versatile in handling PHY modules 525 with different PCS blocks and also locale specific interpretation of tier1 526 functions. The flow chart provided below shows how overriding is possible. 527 528 WCMod provides a structure, #str2PCSFn, to store a function pointer and 529 string pointers to identify it. A function Pointer Table #pcsFuncTable is 530 an array of these structures. The following steps populate #pcsFuncTable table. 531 \li 1. Initialize each element's string pointer to an identifying string 532 \li 2. Initialize same element's function pointer to a function 533 \li 3. Create one element for each overriding function 534 \li 4. The last table entry must have string pointer and function pointer NULLed 535 536 <B>Function Execution.</B><br> 537 WCMod user interface provides unique strings to identify all tier1 functions. 538 Execution of a Tier1 function involves the following steps. 539 540 \li 1. Use input string and query Customer PCS Function Table. 541 \li 2. If the string matches and the associated function pointer is NULLed, we 542 assume user does not want this Tier1 function. 543 \li 3. If a non-NULL function pointer is found, we execute it and evaluate the return code. 544 \li 4. If return code is zero, we exit the loop. Any negative return value is 545 treated as an error. If return code is 1 (Augmentation mode), we continue to 546 search for this function in local table and execute it if found. 547 \li 5. If function is not found we try to find it in the local function table. 548 549 <IMG SRC="../../doc/customerPCSsupport.jpg"> 550 551 */ 552 553 #endif /* _WCMOD_MAIN_H_ */