wcmod_functions.h (6142B)
1 /* 2 * 3 * 4 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 5 * 6 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 7 */ 8 #include <sal/types.h> 9 #ifndef _FUNCTIONS_H_ 10 #define _FUNCTIONS_H_ 11 12 /* These are the Tier1 functions */ 13 14 /* special handle for MDK */ 15 #define WCMOD_INIT "WCMOD_INIT" 16 17 #define MASTER_SLAVE_CONTROL "MASTER_SLAVE_CONTROL" 18 #define SLAVE_WAKEUP_CONTROL "SLAVE_WAKEUP_CONTROL" 19 #define RX_LOOPBACK_PCSBYP "RX_LOOPBACK_PCS_BYPASS" 20 #define PCS_BYPASS_CTL "PCS_BYPASS_CTL" 21 #define TX_TAP_CONTROL "TX_TAP_CONTROL" 22 #define TX_PI_CONTROL "TX_PI_CONTROL" 23 #define TX_AMP_CONTROL "TX_AMP_CONTROL" 24 #define RX_P1_SLICER_CONTROL "RX_P1_SLICER_CONTROL" 25 #define RX_M1_SLICER_CONTROL "RX_M1_SLICER_CONTROL" 26 #define RX_D_SLICER_CONTROL "RX_D_SLICER_CONTROL" 27 #define REFCLK_SET "REFCLK_SET" 28 #define ASYMMETRIC_MODE_SET "ASYMMETRIC_MODE_SET" 29 #define SPD_INTF_CONTROL "SPD_INTF_CONTROL" 30 /* put an _ since this begins with a number */ 31 #define _100FX_CONTROL "100FX_CONTROL" 32 #define TX_LANE_DISABLE "TX_LANE_DISABLE" 33 #define DUPLEX_CONTROL "DUPLEX_CONTROL" 34 #define POWER_CONTROL "POWER_CONTROL" 35 #define AUTONEG_SET "AUTONEG_SET" 36 #define AUTONEG_CONTROL "AUTONEG_CONTROL" 37 #define AUTONEG_PAGE_SET "AUTONEG_PAGE_SET" 38 #define ANEG_CONTROL "ANEG_CONTROL" 39 #define CARRIER_EXTENSION "CARRIER_EXTENSION" 40 #define REG_READ "REG_READ" 41 #define REG_WRITE "REG_WRITE" 42 #define PRBS_CHECK "PRBS_CHECK" 43 #define CJPAT_CRPAT_CONTROL "CJPAT_CRPAT_CONTROL" 44 #define CJPAT_CRPAT_CHECK "CJPAT_CRPAT_CHECK" 45 #define WCMOD_DIAG "WCMOD_DIAG" 46 #define LANE_SWAP "LANE_SWAP" 47 #define PARALLEL_DETECT_CONTROL "PARALLEL_DETECT_CONTROL" 48 #define CLAUSE_72_CONTROL "CLAUSE_72_CONTROL" 49 #define PLL_SEQUENCER_CONTROL "PLL_SEQUENCER_CONTROL" 50 #define PROG_DATA "PROG_DATA" 51 #define REVID_READ "REVID_READ" 52 #define RX_SEQ_CONTROL "RX_SEQ_CONTROL" 53 #define SET_POLARITY "SET_POLARITY" 54 #define SET_PORT_MODE "SET_PORT_MODE" 55 #define PRBS_CONTROL "PRBS_CONTROL" 56 #define PRBS_DECOUPLE_CONTROL "PRBS_DECOUPLE_CONTROL" 57 #define SCRAMBLER_CONTROL "SCRAMBLER_CONTROL" 58 #define RX_PF_CONTROL "RX_PF_CONTROL" 59 #define RX_LOW_FREQ_PF_CONTROL "RX_LOW_FREQ_PF_CONTROL" 60 #define RX_DFE_TAP1_CONTROL "RX_DFE_TAP1_CONTROL" 61 #define RX_DFE_TAP2_CONTROL "RX_DFE_TAP2_CONTROL" 62 #define RX_DFE_TAP3_CONTROL "RX_DFE_TAP3_CONTROL" 63 #define RX_DFE_TAP4_CONTROL "RX_DFE_TAP4_CONTROL" 64 #define RX_DFE_TAP5_CONTROL "RX_DFE_TAP5_CONTROL" 65 #define RX_VGA_CONTROL "RX_VGA_CONTROL" 66 #define SOFT_RESET "SOFT_RESET" 67 #define TX_RESET "TX_RESET" 68 #define RX_RESET "RX_RESET" 69 #define AER_LANE_SELECT "AER_LANE_SELECT" 70 #define SET_SPD_INTF "SET_SPD_INTF" 71 #define TX_BERT_CONTROL "TX_BERT_CONTROL" 72 #define RX_LOOPBACK_CONTROL "RX_LOOPBACK_CONTROL" 73 #define TX_LOOPBACK_CONTROL "TX_LOOPBACK_CONTROL" 74 #define PORT_STAT_DISPLAY "PORT_STAT_DISPLAY" 75 #define CORE_RESET "CORE_RESET" 76 #define HGSOLO "HGSOLO" 77 #define FIRMWARE_MODE_SET "FIRMWARE_MODE_SET" 78 #define EEE_PASS_THRU_SET "EEE_PASS_THRU_SET" 79 80 81 #define _100G_MASTER "100G_MASTER" 82 #define _100G_MASTER_ANEG "100G_MASTER_ANEG" 83 #define _100G_SLAVE "100G_SLAVE" 84 #define _100G_SLAVE_2LANES "100G_SLAVE_2LANES" 85 #define _100G_SLAVE_3LANES "100G_SLAVE_3LANES" 86 #define _100G_SLAVE_4LANES "100G_SLAVE_4LANES" 87 #define _1_2p5G_1100 "1_2p5G_1100" 88 #define _1_2p5G_1010 "1_2p5G_1010" 89 90 /* Diagnostic functions */ 91 #define WCMOD_DIAG "WCMOD_DIAG" 92 93 #define SCRAMBLER_CONTROL "SCRAMBLER_CONTROL" 94 95 /* These are the Tier2+ functions */ 96 97 #define _100M_MII "100M_MII" 98 #define _PCSBYP_6P25 "PCSBYP_6P25" 99 #define XFI "XFI" 100 #define _1G_GMII_COMBO "1G_GMII_COMBO" 101 #define _1G_SGMII_COMBO "1G_SGMII_COMBO" 102 #define _1G_GMII "1G_GMII" 103 #define _1G_SGMII "1G_SGMII" 104 #define _2p5G "2.5G" 105 #define _10G_XAUI "10G_XAUI" 106 #define _10G_HI "10G_HI" 107 #define _10G_X2 "10G_X2" 108 #define _10G_HI_DXGXS "10G_HI_DXGXS" 109 #define _10G_DXGXS "10G_DXGXS" 110 #define _10G_HI_DXGXS_SCR "10G_HI_DXGXS_SCR" 111 #define _10p5G_HI_DXGXS "10.5G_HI_DXGXS" 112 #define _10p5G_DXGXS "10.5G_DXGXS" 113 #define _12G_HI_DXGXS "12G_HI_DXGXS" 114 #define _12G_R2 "12G_R2" 115 #define _12G_DXGXS "12G_DXGXS" 116 #define _15G_DXGXS "15G_DXGXS" 117 #define _20G_DXGXS "20G_DXGXS" 118 #define _21G_DXGXS "21G_DXGXS" 119 #define _20G_CR2 "20G_CR2" 120 #define _21G_XAUI "21G_XAUI" 121 #define _25G_XAUI "25G_XAUI" 122 #define _31p5G_XAUI "31.5G_XAUI" 123 #define _40G_XAUI "40G_XAUI" 124 #define _40G_XLAUI "40G_XLAUI" 125 #define _42G_XLAUI "42G_XLAUI" 126 #define _40G_KR4 "40G_KR4" 127 #define _42G_KR4 "42G_KR4" 128 129 130 131 #define PRBS7_ENABLE "PRBS7_ENABLE" 132 #define PRBS15_ENABLE "PRBS15_ENABLE" 133 #define PRBS23_ENABLE "PRBS23_ENABLE" 134 #define PRBS31_ENABLE "PRBS31_ENABLE" 135 #define PRBS_DISABLE "PRBS_DISABLE" 136 /*PRBS_CHECK is also a Tier2 function */ 137 #define GLOOP_ON "GLOOP_ON" 138 #define GLOOP_OFF "GLOOP_OFF" 139 140 141 #define CARRIER_EXTENSION_ENABLED "CARRIER_EXTENSION_ENABLED" 142 #define CARRIER_EXTENSION_DISABLED "CARRIER_EXTENSION_DISABLED" 143 144 #endif