wcmod_defines.h (23564B)
1 /* 2 * 3 * 4 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 5 * 6 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 7 */ 8 #include <sal/types.h> 9 /*---------------------------------------------------------------------- 10 * Broadcom Corporation 11 * Proprietary and Confidential information 12 * All rights reserved 13 * This source file is the property of Broadcom Corporation, and 14 * may not be copied or distributed in any isomorphic form without the 15 * prior written consent of Broadcom Corporation. 16 *---------------------------------------------------------------------- 17 * Description: define enumerators 18 *---------------------------------------------------------------------- 19 * CVS INFORMATION: 20 * 21 * $Revision: 1.17 $ 22 * $Source: /projects/ntsw-cvs2/swcvs4/minerva/sdk/src/soc/phy/wcmod/include/wcmod_defines.h,v $ 23 * $Date: 2012/06/04 18:23:53 $ 24 * $Header: /projects/ntsw-cvs2/swcvs4/minerva/sdk/src/soc/phy/wcmod/include/wcmod_defines.h,v 1.17 Broadcom SDK $ 25 * $Log: wcmod_defines.h,v $ 26 * Revision 1.17 2012/06/04 18:23:53 wniu 27 * PHY-615 added a new define for PLL enable without lock wait 28 * 29 * Revision 1.16 2012/05/29 23:58:13 wniu 30 * PHY-613 added a member of fiber_pref for wcmod structure 31 * 32 * Revision 1.15 2012/05/21 18:47:30 wniu 33 * PHY-594 added a member of firmware_mode for wcmod structure 34 * 35 * Revision 1.14 2012/05/01 17:50:59 wniu 36 * added 4 variables into wcmod_st to accommodate deadlink vga/dfe value 37 * 38 * Revision 1.13 2012/01/18 06:22:06 mjang 39 * Adding dual_port. dxgxs is for dual port BCST for register access. 40 * dual_port is for indication of being a dual port. 41 * For some dual port setting, only regsisters of one lane should be set. 42 * 43 * Revision 1.12 2012/01/13 08:26:13 mjang 44 * Add one variable for diagnostics functions. 45 * 46 * Revision 1.11 2011/12/20 02:12:26 wniu 47 * added a reg defines for 0x820e 48 * 49 * Revision 1.10 2011/12/07 23:05:35 wniu 50 * added two more mask defines for AUTONEG_ENABLE and AUTONEG_DONE 51 * 52 * Revision 1.9 2011/12/01 22:31:15 wniu 53 * added three mebers vco_freq, pll_divider and oversample_mode into ws structure 54 * 55 * Revision 1.8 2011/11/23 19:44:23 wniu 56 * added another defines for getting vertical offset for eyescan 57 * 58 * Revision 1.7 2011/11/09 22:45:30 wniu 59 * added many diag eyescan defines for soc layer 60 * 61 * Revision 1.6 2011/11/04 20:29:24 wniu 62 * added a new define for low freq PF value override 63 * 64 * Revision 1.5 2011/10/11 01:37:30 wniu 65 * added a void pointer in wcmod structure to accommodate the eye-scan 66 * 67 * Revision 1.4 2011/10/05 02:03:42 wniu 68 * added two more variables for wcmod structure 69 * 70 * Revision 1.3 2011/10/01 03:15:31 wniu 71 * added two more member for tx/rx polarity 72 * 73 * Revision 1.2 2011/09/14 02:17:34 miyarn 74 * Keep the build env happy. shut of complaints about missing id, copyright etc 75 * 76 * Revision 1.1 2011/08/15 15:47:57 mlarsen 77 * Moved from soc/phy directory. 78 * 79 * Revision 1.7 2011/07/28 22:17:25 wniu 80 * added two new variable for HW read and write of the wcmod_st 81 * 82 * Revision 1.6 2011/06/29 23:50:29 wniu 83 * PHY-479 added eye margin stuff into wcmod structure 84 * 85 * Revision 1.5 2011/06/09 23:22:52 wniu 86 * sync up with the Irvine database 87 * 88 * Revision 1.59 2011/06/09 17:17:04 ravick 89 * incorporated RedStone and TR3 changes 90 * 91 * Revision 1.58 2011/03/22 19:46:25 ravick 92 * consistant handles for TAPS + add refclk+plldiv in wcmod_st 93 * 94 * Revision 1.57 2011/03/18 17:59:20 ravick 95 * new wcmod (derived from WC-C0) 96 * 97 * Revision 1.56 2011/03/14 23:00:42 prasunp 98 * power control defines 99 * 100 * Revision 1.55 2011/03/11 18:54:00 ravick 101 * c89 compatibility issues 102 * 103 * Revision 1.54 2011/03/02 21:08:53 ravick 104 * *** empty log message *** 105 * 106 * Revision 1.53 2011/02/28 23:42:16 ravick 107 * *** empty log message *** 108 * 109 * Revision 1.52 2011/02/15 19:39:49 ravick 110 * extended control variables 111 * extended control variables 112 * 113 * Revision 1.51 2011/02/14 23:34:47 ravick 114 * *** empty log message *** 115 * 116 * Revision 1.50 2011/02/04 22:09:31 ravick 117 * removed slash-slash comments 118 * 119 * Revision 1.49 2011/01/28 17:41:00 ravick 120 * *** empty log message *** 121 * 122 * Revision 1.48 2011/01/17 23:52:51 ravick 123 * redstone changes. Also pcs_bypass_control 124 * 125 * Revision 1.47 2011/01/17 23:09:52 ravick 126 * correct typo RX_M1_THESH_ZERO_ON. Documentation cleanup 127 * 128 * Revision 1.46 2010/12/18 00:06:24 aerik 129 * wrote scrambler control function + documentation 130 * 131 * Revision 1.45 2010/12/17 19:35:19 aerik 132 * added DFE, VGA to tier1 selector + documentation for lane power control 133 * 134 * Revision 1.44 2010/12/17 03:17:39 aerik 135 * added peaking filter tier1 136 * 137 * Revision 1.43 2010/12/17 01:37:51 aerik 138 * added dfe functions 139 * 140 * Revision 1.42 2010/12/14 22:42:59 ravick 141 * merge prasuns changes 142 * 143 * Revision 1.41 2010/12/11 00:25:04 ravick 144 * removed slashslash comments 145 * 146 * Revision 1.40 2010/11/19 23:13:14 ravick 147 * use autogeneration of enums on verilog side. chandle, fix diag enums 148 * 149 * Revision 1.39 2010/11/19 16:39:55 ravick 150 * *** empty log message *** 151 * 152 * Revision 1.38 2010/11/18 18:14:33 ravick 153 * changed lane_num to lane_select 154 * 155 * Revision 1.37 2010/11/08 19:06:18 ravick 156 * changes to consolidate address calc. 157 * 158 * Revision 1.36 2010/11/01 20:44:53 aerik 159 * patch for 1g gmii in xenia -- changed pll divider ratio 160 * 161 * Revision 1.35 2010/10/26 23:53:55 aerik 162 * patch for broadcast address bug + 1G xgmii/sgmii in xenia 163 * 164 * Revision 1.34 2010/10/21 17:20:39 aerik 165 * added a div70 macro fro WC B0 166 * 167 * Revision 1.33 2010/10/20 19:45:19 aerik 168 * model number updates 169 * 170 * Revision 1.32 2010/10/14 22:18:36 ravick 171 * autoneg related changes. Too numerous to type 172 * 173 * Revision 1.31 2010/10/13 22:51:56 ravick 174 * changed lane_num to lane_select. Next step is to use enums (currently using 175 * numbers) 176 * added MULTI_REG type. (must enumize this) 177 * 178 * Revision 1.30 2010/09/30 22:14:47 ravick 179 * diags enum 180 * 181 * Revision 1.29 2010/09/24 22:19:14 aerik 182 * added functionality to enable TX with gloop on 183 * 184 * Revision 1.28 2010/09/17 22:11:21 ravick 185 * 1. script to autogenerate enum files. 186 * 2. Makefile changes to support above script 187 * 3. Test vectors changed for new speed modes 188 * 4. Regression debugged 189 * 5. WC verif. checkers debugged. 190 * 6. Documentation enhancements 191 * 7. Remove redundant functions. 192 * 193 * Revision 1.27 2010/09/16 19:48:56 aerik 194 * fixed autoneg function to work with lanes other than 0 195 * 196 * Revision 1.26 2010/09/09 23:04:40 aerik 197 * changed Tier2 param from platform_info_type* to wcmod_st* 198 * 199 * Revision 1.25 2010/08/11 23:30:52 aerik 200 * added additional Tier2 functions + a return value from the Tier2 configuration selector 201 * 202 * Revision 1.24 2010/08/04 21:20:36 aerik 203 * added extra fields to struct wcmod_st to support Triumph3 and Tier2+ 204 * modifications to support Triumph3 and Tier2+ 205 * 206 * Revision 1.23 2010/07/31 01:06:14 aerik 207 * adding a dv target 208 * updated files for integration with full chip DV environments 209 * 210 * Revision 1.22 2010/07/28 22:20:57 aerik 211 * added multi-lane support 212 * added multi-lane support 213 * 214 * Revision 1.21 2010/07/15 19:11:46 ravick 215 * documentation changes 216 * 217 * Revision 1.20 2010/07/13 19:22:30 aerik 218 * generated the wcmod_spd_intf_set enum values from an x-macro definition file 219 * 220 * Revision 1.19 2010/07/09 23:39:09 aerik 221 * introduced some constants for use with wcmod_autoneg_control function for improved readability and usage 222 * 223 * Revision 1.18 2010/07/08 22:45:53 aerik 224 * added USE_CJPAT and USE_CRPAT #defines for use with the CJPAT/CRPAT function 225 * 226 * Revision 1.17 2010/07/02 20:18:58 ravick 227 * modifed lane_select enum to only do any one lane or all lanes. 228 * 229 * Revision 1.16 2010/07/01 21:13:23 ravick 230 * add doxygen target to makefile. Change printfs to display phy_ad 231 * 232 * Revision 1.15 2010/06/28 18:31:20 ravick 233 * added reg_read and reg_write functions. Lots of doxygen hooks 234 * 235 * Revision 1.14 2010/06/24 18:46:18 ravick 236 * this version of code supports doxygen. runwc fixed to understand logext 237 * 238 * Revision 1.13 2010/06/16 18:08:39 ravick 239 * bcst offset 240 * 241 * Revision 1.12 2010/06/15 21:30:56 ravick 242 * AER support for lane access in indep mode 243 * 244 * Revision 1.11 2010/06/07 17:21:25 ravick 245 * pass port/lane etc to final drivers 246 * 247 * Revision 1.10 2010/05/26 22:38:38 aerik 248 * removed prbs_data and prbs_mask fields 249 * 250 * Revision 1.9 2010/05/25 22:47:51 ravick 251 * added wc_touched and other speed modes 252 * 253 * Revision 1.8 2010/05/25 19:13:22 ravick 254 * new wcmod interface, removed most of SDK deps. + indep. lane support 255 * 256 * Revision 1.7 2010/05/19 17:43:20 ravick 257 * combined checkin with fixes,merges,whathaveyous. PRBS yet to work 258 * 259 * Revision 1.6 2010/05/05 22:41:46 aerik 260 * added a few fields to a struct to support DPI calls for prbs 261 * added a few fields to support DPI calls for prbs 262 * 263 * Revision 1.5 2010/05/04 15:53:27 ravick 264 * added another enum for port_type and changed spd_set to spd_intfc_set 265 * 266 * Revision 1.4 2010/05/03 18:24:36 ravick 267 * added port_type, and modified port_mode func.... 268 * 269 * Revision 1.3 2010/04/29 16:09:13 ravick 270 * remove stop/start type handles. Add en_dis variable. tick/hashdef ENABLE_DISABLE 271 * 272 * Revision 1.2 2010/04/29 10:37:33 ravick 273 * changed PDET_CONTRL to PDET_CONTROL 274 * File: wcmod_gloop_combo_1g.vec Status: Locally Modified 275 * added per_lane_info 276 * File: wcmod_defines.h Status: Locally Modified 277 * added several Tier1 funcs 278 * File: wcmod_cfg_seq.c Status: Locally Modified 279 * added selection for several Tier1 funcs 280 * File: wcmod_main.c Status: Locally Modified 281 * 282 * Revision 1.1 2010/04/02 23:17:56 jlouie 283 * Initial Version 284 * 285 *----------------------------------------------------------------------*/ 286 287 288 #ifndef _WCMOD_DEFINES_H_ 289 #define _WCMOD_DEFINES_H_ 290 291 #if defined (_SDK_WCMOD_) 292 #include <sal/types.h> 293 #endif 294 #include "wcmod_enum_defines.h" 295 296 /*! The number of serdes blocks (not lanes) in the system (may be multiple 297 * chips) -- this should be changed by the user as it determines the number of 298 * mutexes */ 299 #define NUMBER_OF_LOCKS (2*3*18) 300 301 /*! Use CJPPAT. This constant is used with the function #wcmod_cjpat_crpat_control() */ 302 #define USE_CJPAT 0x1 303 /*! Use CRPPAT. This constant is used with the function #wcmod_cjpat_crpat_control() */ 304 #define USE_CRPAT 0x10 305 306 /*! Do not use auto-negotiation. This constant is used with the function #wcmod_autoneg_control() */ 307 #define DO_NOT_USE_AN 0x0 308 /*! Use clause-37 auto-negotiation. This constant is used with the function #wcmod_autoneg_control() */ 309 #define USE_CLAUSE_37_AN 0x1 310 #define USE_CLAUSE_37_AN_LANE0 (USE_CLAUSE_37_AN << 0) 311 #define USE_CLAUSE_37_AN_LANE1 (USE_CLAUSE_37_AN << 4) 312 #define USE_CLAUSE_37_AN_LANE2 (USE_CLAUSE_37_AN << 8) 313 #define USE_CLAUSE_37_AN_LANE3 (USE_CLAUSE_37_AN << 12) 314 /*! Use clause-73 auto-negotiation. This constant is used with the function #wcmod_autoneg_control() */ 315 #define USE_CLAUSE_73_AN 0x2 316 #define USE_CLAUSE_73_AN_LANE0 (USE_CLAUSE_73_AN << 0) 317 #define USE_CLAUSE_73_AN_LANE1 (USE_CLAUSE_73_AN << 4) 318 #define USE_CLAUSE_73_AN_LANE2 (USE_CLAUSE_73_AN << 8) 319 #define USE_CLAUSE_73_AN_LANE3 (USE_CLAUSE_73_AN << 12) 320 /*! Use clause-37 auto-negotiation with BAM. This constant is used with the function #wcmod_autoneg_control() */ 321 #define USE_CLAUSE_37_AN_WITH_BAM 0x4 322 #define USE_CLAUSE_37_AN_WITH_BAM_LANE0 (USE_CLAUSE_37_AN_WITH_BAM << 0) 323 #define USE_CLAUSE_37_AN_WITH_BAM_LANE1 (USE_CLAUSE_37_AN_WITH_BAM << 4) 324 #define USE_CLAUSE_37_AN_WITH_BAM_LANE2 (USE_CLAUSE_37_AN_WITH_BAM << 8) 325 #define USE_CLAUSE_37_AN_WITH_BAM_LANE3 (USE_CLAUSE_37_AN_WITH_BAM << 12) 326 /*! Use clause-73 auto-negotiation with BAM. This constant is used with the function #wcmod_autoneg_control() */ 327 #define USE_CLAUSE_73_AN_WITH_BAM 0x8 328 #define USE_CLAUSE_73_AN_WITH_BAM_LANE0 (USE_CLAUSE_73_AN_WITH_BAM << 0) 329 #define USE_CLAUSE_73_AN_WITH_BAM_LANE1 (USE_CLAUSE_73_AN_WITH_BAM << 4) 330 #define USE_CLAUSE_73_AN_WITH_BAM_LANE2 (USE_CLAUSE_73_AN_WITH_BAM << 8) 331 #define USE_CLAUSE_73_AN_WITH_BAM_LANE3 (USE_CLAUSE_73_AN_WITH_BAM << 12) 332 /*! \def Max number of legal speed and interface combinations. */ 333 #define MAX_SPD_INTF_MODES 100 334 335 336 /* Indicate whether to power down TX on lane n */ 337 #define POWER_DOWN_TX0 0x1 338 #define POWER_DOWN_TX1 0x100 339 #define POWER_DOWN_TX2 0x10000 340 #define POWER_DOWN_TX3 0x1000000 341 342 /* Indicate whether to power down RX on lane n */ 343 #define POWER_DOWN_RX0 0x2 344 #define POWER_DOWN_RX1 0x200 345 #define POWER_DOWN_RX2 0x20000 346 #define POWER_DOWN_RX3 0x2000000 347 348 /* Indicate whether to power down TX on lane n */ 349 #define CHANGE_TX0_POWERED_STATE 0x80 350 #define CHANGE_TX1_POWERED_STATE 0x8000 351 #define CHANGE_TX2_POWERED_STATE 0x800000 352 #define CHANGE_TX3_POWERED_STATE 0x80000000 353 354 /* Indicate whether to power down RX on lane n */ 355 #define CHANGE_RX0_POWERED_STATE 0x40 356 #define CHANGE_RX1_POWERED_STATE 0x4000 357 #define CHANGE_RX2_POWERED_STATE 0x400000 358 #define CHANGE_RX3_POWERED_STATE 0x40000000 359 360 361 #define BYPASS_SCRAMBLER_64B_66B 0x1 362 #define SCRAMBLE_ENTIRE_64B_66B 0x2 363 #define SCRAMBLE_PAYLOAD_ONLY_64B_66B 0x4 364 365 #define BYPASS_DESCRAMBLER_64B_66B 0x8 366 #define DESCRAMBLE_ENTIRE_64B_66B 0x10 367 #define DESCRAMBLE_PAYLOAD_ONLY_64B_66B 0x20 368 369 #define SCRAMBLER_ON_8B_10B 0x40 370 #define SCRAMBLER_OFF_8B_10B 0x80 371 372 /* Values for the RX PF tier1 */ 373 #define RX_PF_VAL_MASK 0xF 374 #define CHANGE_RX_PF_VALUES 0x10 375 #define RX_THRESH_125_MV 0x20 376 #define RX_THRESH_150_MV 0x40 377 #define RX_THRESH_175_MV 0x80 378 #define RX_THRESH_200_MV 0x100 379 #define RX_M1_THRESH_ZERO_ON 0x200 380 #define RX_M1_THRESH_ZERO_OFF 0x400 381 #define RX_PF_HIZ_ON 0x800 382 #define RX_PF_HIZ_OFF 0x1000 383 #define CHANGE_RX_LOW_FREQ_PF_VALUES 0x2000 384 385 /* enable/disable uc control of rx params. */ 386 #define RX_UC_CONTROL 0x80000000 387 388 /*autoneg enable and done bit mask */ 389 #define AUTONEG_ENABLE_MASK 0x1 390 #define AUTONEG_DONE_MASK 0x8000 391 392 /* the cmd value for eyescan API */ 393 #define WC_UTIL_2D_LIVELINK_EYESCAN 0 394 #define WC_UTIL_2D_PRBS_EYESCAN 1 395 #define WC_UTIL_ENABLE_LIVELINK 2 396 #define WC_UTIL_DISABLE_LIVELINK 3 397 #define WC_UTIL_ENABLE_DEADLINK 4 398 #define WC_UTIL_DISABLE_DEADLINK 5 399 #define WC_UTIL_SET_VOFFSET 6 400 #define WC_UTIL_SET_HOFFSET 7 401 #define WC_UTIL_GET_MAX_VOFFSET 8 402 #define WC_UTIL_GET_MIN_VOFFSET 9 403 #define WC_UTIL_GET_MAX_LEFT_HOFFSET 10 404 #define WC_UTIL_GET_MAX_RIGHT_HOFFSET 11 405 #define WC_UTIL_START_LIVELINK 12 406 #define WC_UTIL_START_DEADLINK 13 407 #define WC_UTIL_STOP_LIVELINK 14 408 #define WC_UTIL_CLEAR_LIVELINK 15 409 #define WC_UTIL_READ_LIVELINK 16 410 #define WC_UTIL_READ_DEADLINK 17 411 #define WC_UTIL_GET_INIT_VOFFSET 18 412 413 /* Model values from the SerdesId0 register */ 414 #define MODEL_SERDES_CL73_COMBO_CORE 0 415 #define MODEL_XGXS_16G 1 /* This is Xenia */ 416 #define MODEL_HYPERCORE 2 417 #define MODEL_HYPERLITE 3 418 #define MODEL_PCIE_G2_PIPE 4 419 #define MODEL_1p25GBd_SERDES 5 420 #define MODEL_SATA2 6 421 #define MODEL_QSGMII 7 422 #define MODEL_XGXS10G 8 423 #define MODEL_WARPCORE 9 424 #define MODEL_WARPLITE 0xc 425 #define MODEL_ESM_SERDES 0xe 426 #define MODEL_QUADSGMII 0xf 427 #define MODEL_WARPCORE_C 0x10 /* strange but true. */ 428 #define MODEL_XGXS_CL73 0x1d 429 #define MODEL_SERDES_CL73 0x1e 430 431 /* Settings for Xenia */ 432 #define XGXSBLK0_XGXSCONTROL_MODE_10G_IndLane_XENIA 6 433 #define SERDESDIGITAL_MISC1_FORCE_PLL_MODE_AFE_div16_XENIA 0 434 #define SERDESDIGITAL_MISC1_FORCE_PLL_MODE_AFE_div40_XENIA 8 435 436 /*! \def Enable a feature. Keep the bit location flexible. */ 437 #define WCMOD_ENABLE 0x1 438 /*! \def Disable a feature. Keep the bit location flexible. */ 439 #define WCMOD_DISABLE 0x0 440 /*! \def enable the PLL seqeuncer without lock wait */ 441 #define WCMOD_PLL_ENABLE_NO_WAIT 0x2 442 443 #define DSC1B0_UC_CTRLr 0x820e 444 445 446 /*! \struct wcmod_int_st 447 448 This is an internal structure containing things useful only to WCMod. It 449 is not exposed to customer code. 450 451 */ 452 453 typedef struct { 454 /*! this bit is set if we are in asymmetric mode. (for Xenia only) */ 455 int asymmetric_mode; 456 } wcmod_int_st; 457 458 /*! \struct wcmod_st 459 460 This is the central Warpcore context storing information of a single warpcore. 461 It has multiple sections, each with a set of elements. 462 463 \li Address Context: Elements to uniquely access a warpcore 464 465 */ 466 467 typedef struct { 468 /*! The id of the chip -- this identifies which mutex to use -- the exact 469 * mapping of "id" to chip/warpcore #/etc. will differ for verification the 470 * SW stack or the testboard development environment */ 471 int id; 472 /* ===== BEGIN ===== WC port address section */ 473 /*! chip number of the chip where the warpcore resides, defined by MDK/SDK 474 * platforms. This information is not useful to verilog platforms and other 475 * customer specific software platforms. */ 476 int unit; 477 /*! port no. defined in MDK/SDK platforms. This information is not useful to 478 * verilog platforms and other customer specific software platforms. */ 479 int port; 480 /*! physical addr. of the warpcore as defined by MDK/SDK platforms. This 481 * information is not useful to verilog platforms and other customer specific 482 * software platforms. */ 483 int phy_ad; 484 /*! lanes to be accessed. Can simultaneously select multiple lanes. */ 485 wcmod_lane_select lane_select; 486 /*! port address strap value. This is used only in WC verif. env. to identify 487 * the warpcore to the station manager */ 488 int prt_ad; 489 /*! Current lane being processed can be 0, 1, 2 or 3. */ 490 int this_lane; 491 int num_of_lane; 492 /*! Temp. variable to manage reg. access when there are'nt multiple copies of 493 * registers. */ 494 int lane_num_ignore; 495 /*! Tier1 Features are controlled by adding values to this var. Currently we 496 * manage with 32 bits (int type). If more bits are needed to specify a 497 * feature,more feature control variables will be added or this will be 498 * turned into an array. In general we try to use at most 8 bits per lane. */ 499 int per_lane_control; 500 int per_lane_control_x; 501 int per_lane_control_1; 502 int per_lane_control_2; 503 int per_lane_control_3; 504 int per_lane_control_4; 505 int per_lane_control_5; 506 int per_lane_control_6; 507 int per_lane_control_7; 508 int per_lane_control_8; 509 /*! enable disable feature. Deprecated. No longer used. */ 510 int en_dis; 511 /*! not needed in verification platforms. Not needed in radian either. */ 512 int aer_ofs_strap; 513 /*! enables a second way of accessing lanes. Not supported. */ 514 int multiport_addr_en; 515 /*! Broadcast addr. ext. Currently hardcoded to 0x1ff. */ 516 int aer_bcst_ofs_strap; 517 /*! see doc. on wcmod_spd_intfc_set */ 518 wcmod_spd_intfc_set spd_intf; 519 /*! cl22 or cl45 or PCB */ 520 wcmod_mdio_type mdio_type; 521 /*! combo or independent */ 522 wcmod_port_type port_type; 523 /*! Oversampling rate. This is fixed in combo, but not in indep. */ 524 wcmod_os_type os_type; 525 /*! Lanes in dual XGXS? Info. is bit encoded. bit 1:lane 0/1 bit 2:lane 2/3 */ 526 int dual_type; 527 int dxgxs; 528 /*! Single copy registers cannot be modified repeatedly. Tier1 init function 529 * access these registers has to be aware to do this only once between 530 * resets, especially in independent mode when the same Tier1 is called for 531 * multiple lanes. This sticky bit, remembers if the single copy regs. were 532 * already modified. */ 533 int wc_touched; 534 /*! Lane swap contl variable. The positional values of the 8 nibbles indicate 535 * location of the logical lanes, like so. rx3_rx2_rx1_rx0_tx3_tx2_tx1_tx0. 536 * Default value 0x32103210 indicates no lanes swapped. */ 537 int lane_swap; 538 /*! Not set by user, but set by WCMod based on speed and interface. */ 539 wcmod_duplex_type duplex; 540 /*! Address of reg. to access */ 541 int accAddr; 542 /*! Data context. Contains data to write or data that is just read. Also 543 * contains revid after read_revid. */ 544 int accData; 545 /*! Various status of the link. Note check status of one link at a time. */ 546 int diag_type; 547 int info_type; 548 /*! Flavors of Warpcore (includes Xenia, quad_sgmii, B0/C0, revisions etc.) */ 549 wcmod_model_type model_type; 550 /*!Autoneg types. */ 551 wcmod_an_type an_type; 552 /*!autoneg parameter RF */ 553 int an_rf; 554 /*!autoneg parameter pause */ 555 int an_pause; 556 /*!autoneg parameter various speeds (bit encoded) */ 557 int an_tech_ability; 558 /*!autoneg parameter enable FEC */ 559 int an_fec; 560 int an_higig2; 561 int an_cl72; 562 int tx_pol; 563 int rx_pol; 564 int vco_freq; 565 int pll_divider; 566 int oversample_mode; 567 int asymmetric_mode; 568 int s100g_plus; 569 /*! Platform specific Information about the Warpcore. It usually contains 570 * platform driver specific information. Note that platform must create 571 * (allocate memory), initialize this variable and connect it to wcmod_st*/ 572 void *platform_info; 573 574 int verbosity; 575 int wcmod_sdk_ctrl_type; 576 /*! for when user wants to provide custom refclk. Will also work for standard 577 * values. The 10ths value of the frequency need not be entered. So 156.1 578 * becomes 156 579 */ 580 int refclk; 581 /*! pll div value is auto computed. But override is provided. */ 582 int live_link; 583 int ber; 584 int tol; 585 uint16 vga_frzval; 586 uint16 vga_frcfrz; 587 uint16 dfe_frzval; 588 uint16 dfe_frcfrz; 589 uint16 firmware_mode; 590 uint16 fiber_pref; 591 int eye_cmd; 592 int plldiv; 593 int (*read)(int, uint32, uint32, uint16*); /* HW read */ 594 int (*write)(int, uint32, uint32, uint16); /* HW write */ 595 void *arg; 596 597 } wcmod_st; 598 599 #endif /* _WCMOD_DEFINES_H_ */