tscmod_phyreg.h (3401B)
1 /*---------------------------------------------------------------------- 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * Broadcom Corporation 8 * Proprietary and Confidential information 9 * All rights reserved 10 * This source file is the property of Broadcom Corporation, and 11 * may not be copied or distributed in any isomorphic form without the 12 * prior written consent of Broadcom Corporation. 13 *---------------------------------------------------------------------- 14 * Description: Externization of all DPI functions needed by TSCMod. 15 *---------------------------------------------------------------------*/ 16 17 /*! 18 \file tscmod_phyreg.h Declares verilog interface functions. 19 This file contains declarations of functions that are necessary to 20 hook up TSCMod to various verilog platforms. The drivers of TSCMod are 21 hooked to verilog tasks as a first level interface to the actual drivers in the 22 verilog testbench. These 'C' functions and verilog tasks are attached via 23 a mechanism called 'DPI' (direct programming interface) supported by all 24 verilog simulators. Note that C platforms need no special attachments. 25 */ 26 27 #ifndef _TSCMOD_PHYREG_H_ 28 #define _TSCMOD_PHYREG_H_ 29 30 #include "tscmod_main.h" 31 #include "tscmod_defines.h" 32 33 #if defined (_MDK_TSCMOD_) 34 extern int cdk_xgs_miim_read(int u, uint32_t pa, uint32_t ra, uint32_t *val); 35 extern int cdk_xgs_miim_write(int u, uint32_t pa, uint32_t ra, uint32_t val); 36 #endif 37 38 #ifdef _DV_TRIDENT2 39 /* normally the externs are generated by irun/vcs -dpiheader. */ 40 /* Manually typing this in to reduce header files. */ 41 #ifdef CADENCE 42 /* svdpi.h to be conditional to cadence (or irun). vcs does not have this. */ 43 #include "svdpi.h" 44 #endif /* CADENCE */ 45 #include "svdpi.h" 46 47 extern void dv_reg_cl45_read (int ut,int pt,int pa,int ln,int ad,int *dt); 48 extern void dv_reg_cl22_read (int ut,int pt,int pa,int ln,int ad,int *dt); 49 50 extern void dv_reg_cl45_write (int ut,int pt,int pa,int ln,int ad,int dt); 51 extern void dv_reg_cl22_write (int ut,int pt,int pa,int ln,int ad,int dt); 52 53 extern void dv_reg_cl45_modify(int ut,int pt,int pa,int ln,int ad,int dt,int m); 54 extern void dv_reg_cl22_modify(int ut,int pt,int pa,int ln,int ad,int dt,int m); 55 56 extern void dv_wait (int delay); 57 58 extern void dv_slam_read_reg (int core, int addr, int *data); 59 extern void dv_slam_write_reg (int core, int addr, int data); 60 extern void dv_slam_modify_reg(int core, int addr, int data, int m); 61 62 #endif /* _DV_TRIDENT2 */ 63 64 extern int tscmod_reg_aer_read (uint32 u,tscmod_st* w,uint32 a,uint16 *d); 65 extern int tscmod_reg_aer_write (uint32 u,tscmod_st* w,uint32 a,uint16 d); 66 extern int tscmod_reg_aer_modify(uint32 u,tscmod_st* w,uint32 a,uint16 d,uint16 m); 67 68 extern int tscmod_cl22_read (tscmod_st* ws,uint32 addr,uint16 *data); 69 extern int tscmod_cl22_write (tscmod_st* ws,uint32 addr,uint16 data); 70 extern int tscmod_cl45_read (tscmod_st* ws,uint32 addr,uint16 *data); 71 extern int tscmod_cl45_write (tscmod_st* ws,uint32 addr,uint16 data); 72 extern void tscmod_timeout_init(soc_timeout_t *to, uint32 usec, int min_polls); 73 extern int tscmod_timeout_check(tscmod_st* ws,soc_timeout_t *to); 74 extern int tscmod_regbit_set_wait_check(tscmod_st* w,int r,int b,int bt,int to); 75 #endif /* _TSCMOD_PHYREG_H_ */