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tscmod_defines.h (6259B)


      1 /*----------------------------------------------------------------------
      2  * 
      3  * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file.
      4  * 
      5  * Copyright 2007-2019 Broadcom Inc. All rights reserved.
      6  *
      7  *  Broadcom Corporation
      8  *  Proprietary and Confidential information
      9  *  All rights reserved
     10  *  This source file is the property of Broadcom Corporation, and
     11  *  may not be copied or distributed in any isomorphic form without the
     12  *  prior written consent of Broadcom Corporation.
     13  *----------------------------------------------------------------------
     14  *  Description: define enumerators and tscmod_st
     15  *----------------------------------------------------------------------*/
     16 
     17 #ifndef _TSCMOD_DEFINES_H_
     18 #define _TSCMOD_DEFINES_H_
     19 
     20 #define  TSCMOD_AN_ENABLE_MASK   0x8000
     21 #define  TSCMOD_AN_DONE_MASK     0x1
     22 
     23 #include "tscmod_enum_defines.h"
     24 
     25 /*! The number of serdes blocks (not lanes) in the system (may be multiple
     26  * chips) -- this should be changed by the user as it determines the number of
     27  * mutexes */ 
     28 #define NUMBER_OF_LOCKS (2*3*18)
     29 
     30 /*! \struct tscmod_int_st
     31 
     32 This is an internal structure containing things useful only to TSCMod. It
     33 is not exposed to customer code.
     34 
     35 */
     36 
     37 typedef struct {
     38   /*! this bit is set if we are in asymmetric mode. (for Xenia only) */
     39   int asymmetric_mode;
     40 } tscmod_int_st;
     41 
     42 /*! \struct tscmod_st
     43 
     44 This is the central TSC context storing information of a single TSC.
     45 It has multiple sections, each with a set of elementtsc
     46 
     47 \li Address Context: Elements to uniquely access a TSC 
     48 
     49 */
     50 
     51 typedef struct {
     52   /*! chip id. This identifies which mutex to use. The exact
     53    * mapping of "id" to chip/tsc number/etc. will differ for verification, the
     54    * SW stack, or the testboard development environment */
     55   int id;
     56   /* ===== BEGIN ===== TSC port address section */
     57   /*! chip number of the chip where the TSC resides, defined by MDK/SDK
     58    * platforms. It is not user in verilog and customer software platforms. */
     59   int                 unit; 
     60   /*! Port no. defined in MDK/SDK platforms. It is not used in verilog and 
     61    * customer software platforms. */
     62   int                 port;
     63   /*! physical addr. of the TSC as defined by MDK/SDK platforms. This
     64    * is not used in verilog and customer software platforms. */
     65   int                 phy_ad; 
     66   /*! lanes to access. Can simultaneously select multiple lanes. */
     67   tscmod_lane_select   lane_select; 
     68   /*! Port address strap value. Used only in TSC verif. env. to identify
     69    * the TSC to the station manager */
     70   int                 prt_ad; 
     71   /*! Current lane being processed can be 0, 1, 2 or 3. */
     72   int this_lane;
     73   /*! May not need this. Legacy. Ignore lane number implications*/
     74   int lane_num_ignore;
     75   /*! Tier1 Features are controlled by adding values to this var. Currently we
     76    * manage with 32 bits (int type). If more bits are needed to specify a
     77    * feature,more feature control variables will be added or this will be
     78    * turned into an array. In general we try to use at most 8 bits per lane. */
     79   int                 per_lane_control; 
     80   /*! see doc. on tscmod_spd_intfc_type */
     81   tscmod_spd_intfc_type spd_intf; 
     82   /*! Serial Bus protocol or PCB */
     83   tscmod_regacc_type     regacc_type; 
     84   /*! combo or independent */
     85   tscmod_port_type     port_type; 
     86   /*! Oversampling rate. This is fixed in combo, but not in indep. */
     87   tscmod_os_type       os_type; 
     88   /*! Single copy registers cannot be modified repeatedly. Tier1 init function
     89    * access these registers has to do this only once between resets in
     90    * independent mode when the same Tier1 is called for multiple lanes. This
     91    * sticky bit, remembers if the single copy regs. were already modified. */
     92   int                 tsc_touched; 
     93   /*! Lane swap contl variable. The positional values of the 8 nibbles indicate
     94    * location of the logical lanes, like so. rx3_rx2_rx1_rx0_tx3_tx2_tx1_tx0.
     95    * Default value 0x32103210 indicates no lanes swapped. */
     96   int                 lane_swap; 
     97   /*! Not set by user, but set by TSCMod based on speed and interface. */
     98   tscmod_duplex_type   duplex; 
     99   /*! Address of reg. to access */
    100   int                 accAddr; 
    101   /*! Data context. Contains data to write or data that is just read. Also
    102    * contains revid after read_revid. */
    103   int                 accData; 
    104   /*! Various status of the link. Note check status of one link at a time. */
    105   int     diag_type;
    106   /*! Flavors of TSC */
    107   tscmod_model_type    model_type;
    108   /*! Autoneg types. */
    109   tscmod_an_type       an_type;
    110   int                  an_hg_vco ;
    111   /*! Autoneg parameter RF */
    112   int                 an_rf;
    113   /*! Autoneg parameter pause */
    114   int                 an_pause;
    115   /*! Autoneg parameter various speeds (bit encoded) */
    116   int                 an_tech_ability;
    117   int                 an_bam37_ability;
    118   /*! Autoneg parameter enable FEC */
    119   int                 an_fec;
    120   int                 an_higig2;
    121   int                 an_cl72;
    122   /*! Control information the driver prints. If set to zero, only warnings and
    123    * errors will be printed. If set to 1, msgs (developers discretion will be
    124    * printed) but not register transactions. If set to 2 transactions will be
    125    * printed (plus everything else).
    126    */
    127   int verbosity;
    128    /* last 4 bits are for TSC state information */
    129   int ctrl_type;
    130   int err_code ;
    131   int msg_code ;
    132   /*! for when user wants to provide custom refclk. Will also work for standard
    133    * values. The 10ths value of the frequency need not be entered. So 156.1
    134    * becomes 156
    135    */
    136   int refclk;
    137   /*! pll div value is auto computed. But override is provided. */
    138   int plldiv;
    139   /*! dxgxs is to indicate that the mode should make dual port bcst 
    140    *  dxgxs=1 for lane0-1 and dxgxs=2 for lane2-3 
    141    */
    142   int dxgxs ;
    143 
    144 #ifdef _SDK_TSCMOD_
    145   void *arg ;  /* check arch byte length */
    146 #endif
    147   int live_link;
    148   int ber;
    149   int tol;
    150   int eye_lane ;
    151   int time_upper_bound ;
    152 
    153   int vga_frzval;
    154   int vga_frcfrz;
    155   int dfe_frzval;
    156   int dfe_frcfrz;
    157   int linkup_bert_cnt[4] ; 
    158   int firmware_mode ; 
    159   int an_ctl  ;
    160   int iintf ; 
    161   int reg_sync ;
    162   int blk_adr ;
    163   int rxlos_restart_time;
    164   int rxlos_linkup_time;
    165 } tscmod_st;
    166 
    167 #endif  /*  _TSCMOD_DEFINES_H_ */