phynull.c (24341B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * File: null.c 8 * Purpose: Defines NULL PHY driver routines 9 */ 10 11 #include <sal/types.h> 12 #include <sal/core/thread.h> 13 14 #include <soc/drv.h> 15 #include <soc/debug.h> 16 #include <soc/error.h> 17 #include <soc/phyreg.h> 18 19 #include <soc/phy.h> 20 #include <soc/phy/phyctrl.h> 21 #include <soc/phy/drv.h> 22 23 #include "phynull.h" 24 #include "phyfege.h" 25 26 typedef struct phy_null_saved_data_s 27 { 28 int speed[SOC_MAX_NUM_PORTS]; 29 soc_port_ability_t null_phy_ability[SOC_MAX_NUM_PORTS]; 30 } phy_null_saved_data_t; 31 32 static phy_null_saved_data_t *saved_data[SOC_MAX_NUM_DEVICES]; 33 34 /* 35 * Functions: 36 * phy_null_XXX 37 * 38 * Purpose: 39 * Some dummy routines for null and no 40 * connection PHY drivers. 41 */ 42 43 int 44 _phy_null_port_ability_init(int unit, soc_port_t port, 45 soc_port_ability_t *ability) 46 { 47 48 int max_speed = 0; 49 50 #if defined(BCM_TOMAHAWK_SUPPORT) 51 if (SOC_IS_TOMAHAWKX(unit)) { 52 max_speed = SOC_INFO(unit).port_init_speed[port] ? 53 SOC_INFO(unit).port_init_speed[port] : 54 SOC_INFO(unit).port_speed_max[port]; 55 } else 56 #endif /* BCM_TOMAHAWK_SUPPORT */ 57 { 58 max_speed = SOC_INFO(unit).port_speed_max[port]; 59 } 60 61 if ( max_speed == 0) { 62 if (IS_GE_PORT(unit,port)) { 63 max_speed = 1000; 64 } else if (IS_FE_PORT(unit,port)) { 65 max_speed = 100; 66 } 67 } 68 69 switch (max_speed) { 70 case 127000: 71 ability->speed_full_duplex |= SOC_PA_SPEED_127GB; 72 /* fall through */ 73 case 120000: 74 ability->speed_full_duplex |= SOC_PA_SPEED_120GB; 75 /* fall through */ 76 case 106000: 77 ability->speed_full_duplex |= SOC_PA_SPEED_106GB; 78 /* fall through */ 79 case 100000: 80 ability->speed_full_duplex |= SOC_PA_SPEED_100GB; 81 /* fall through */ 82 case 53000: 83 ability->speed_full_duplex |= SOC_PA_SPEED_53GB; 84 /* fall through */ 85 case 50000: 86 ability->speed_full_duplex |= SOC_PA_SPEED_50GB; 87 /* fall through */ 88 case 42000: 89 ability->speed_full_duplex |= SOC_PA_SPEED_42GB; 90 /* fall through */ 91 case 40000: 92 ability->speed_full_duplex |= SOC_PA_SPEED_40GB; 93 /* fall through */ 94 case 32000: 95 ability->speed_full_duplex |= SOC_PA_SPEED_32GB; 96 /* fall through */ 97 case 30000: 98 ability->speed_full_duplex |= SOC_PA_SPEED_30GB; 99 /* fall through */ 100 case 27000: 101 ability->speed_full_duplex |= SOC_PA_SPEED_27GB; 102 /* fall through */ 103 case 25000: 104 ability->speed_full_duplex |= SOC_PA_SPEED_25GB; 105 /* fall through */ 106 case 24000: 107 ability->speed_full_duplex |= SOC_PA_SPEED_24GB; 108 /* fall through */ 109 case 21000: 110 ability->speed_full_duplex |= SOC_PA_SPEED_21GB; 111 /* fall through */ 112 case 20000: 113 ability->speed_full_duplex |= SOC_PA_SPEED_20GB; 114 /* fall through */ 115 case 16000: 116 ability->speed_full_duplex |= SOC_PA_SPEED_16GB; 117 /* fall through */ 118 case 15000: 119 ability->speed_full_duplex |= SOC_PA_SPEED_15GB; 120 /* fall through */ 121 case 13000: 122 ability->speed_full_duplex |= SOC_PA_SPEED_13GB; 123 /* fall through */ 124 case 12500: 125 ability->speed_full_duplex |= SOC_PA_SPEED_12P5GB; 126 /* fall through */ 127 case 12000: 128 ability->speed_full_duplex |= SOC_PA_SPEED_12GB; 129 /* fall through */ 130 case 11000: 131 ability->speed_full_duplex |= SOC_PA_SPEED_11GB; 132 /* fall through */ 133 case 10000: 134 ability->speed_full_duplex |= SOC_PA_SPEED_10GB; 135 /* fall through */ 136 case 6000: 137 ability->speed_full_duplex |= SOC_PA_SPEED_6000MB; 138 /* fall through */ 139 case 5000: 140 ability->speed_full_duplex |= SOC_PA_SPEED_5000MB; 141 /* fall through */ 142 case 3000: 143 ability->speed_full_duplex |= SOC_PA_SPEED_3000MB; 144 /* fall through */ 145 case 2500: 146 ability->speed_full_duplex |= SOC_PA_SPEED_2500MB; 147 /* fall through */ 148 case 1000: 149 ability->speed_full_duplex |= SOC_PA_SPEED_1000MB; 150 /* fall through */ 151 case 100: 152 ability->speed_full_duplex |= SOC_PA_SPEED_100MB; 153 /* fall through */ 154 case 10: 155 ability->speed_full_duplex |= SOC_PA_SPEED_10MB; 156 /* fall through */ 157 default: 158 break; 159 } 160 161 ability->speed_half_duplex = 162 SOC_PA_SPEED_10MB | SOC_PA_SPEED_100MB; 163 164 if (IS_HG_PORT(unit, port) || IS_XE_PORT(unit, port) || 165 IS_CE_PORT(unit, port)) { 166 ability->interface = SOC_PA_INTF_XGMII; 167 } else if (IS_GE_PORT(unit, port)) { 168 ability->interface = SOC_PA_INTF_MII | SOC_PA_INTF_GMII; 169 } else { 170 ability->interface = SOC_PA_INTF_MII; 171 } 172 173 return SOC_E_NONE; 174 } 175 176 int 177 phy_null_init(int unit, soc_port_t port) 178 { 179 if (unit < SOC_MAX_NUM_DEVICES) { 180 if (NULL == saved_data[unit]) { 181 saved_data[unit] = sal_alloc(sizeof(*saved_data[unit]), 182 "NULL PHY driver data"); 183 if (NULL == saved_data[unit]) { 184 return SOC_E_MEMORY; 185 } 186 sal_memset(saved_data[unit], 0, sizeof(*saved_data[unit])); 187 } 188 189 if (SOC_PORT_VALID(unit, port)) { 190 saved_data[unit]->speed[port] = 0; 191 _phy_null_port_ability_init(unit, port, 192 &(saved_data[unit]->null_phy_ability[port])); 193 } 194 } 195 196 return SOC_E_NONE; 197 } 198 199 int 200 phy_null_reset(int unit, soc_port_t port, void *user_arg) 201 { 202 COMPILER_REFERENCE(unit); 203 COMPILER_REFERENCE(port); 204 COMPILER_REFERENCE(user_arg); 205 206 return SOC_E_NONE; 207 } 208 209 int 210 phy_null_set(int unit, soc_port_t port, int parm) 211 { 212 COMPILER_REFERENCE(unit); 213 COMPILER_REFERENCE(port); 214 COMPILER_REFERENCE(parm); 215 216 return SOC_E_NONE; 217 } 218 219 int 220 phy_null_one_get(int unit, soc_port_t port, int *parm) 221 { 222 COMPILER_REFERENCE(unit); 223 COMPILER_REFERENCE(port); 224 225 *parm = 1; 226 227 return SOC_E_NONE; 228 } 229 230 int 231 phy_null_zero_get(int unit, soc_port_t port, int *parm) 232 { 233 COMPILER_REFERENCE(unit); 234 COMPILER_REFERENCE(port); 235 236 *parm = 0; 237 238 return SOC_E_NONE; 239 } 240 241 int 242 phy_null_link_get(int unit, soc_port_t port, int *up) 243 { 244 /* link is up if phy is enabled and down otherwise */ 245 return phy_null_enable_get(unit, port, up); 246 } 247 248 int 249 phy_null_enable_set(int unit, soc_port_t port, int enable) 250 { 251 if (enable) { 252 PHY_FLAGS_CLR(unit, port, PHY_FLAGS_DISABLE); 253 } else { 254 PHY_FLAGS_SET(unit, port, PHY_FLAGS_DISABLE); 255 } 256 return SOC_E_NONE; 257 } 258 259 int 260 phy_null_enable_get(int unit, soc_port_t port, int *enable) 261 { 262 *enable = !PHY_FLAGS_TST(unit, port, PHY_FLAGS_DISABLE); 263 return SOC_E_NONE; 264 } 265 266 int 267 phy_null_an_get(int unit, soc_port_t port, int *an, int *an_done) 268 { 269 COMPILER_REFERENCE(unit); 270 COMPILER_REFERENCE(port); 271 272 *an = 0; 273 *an_done = 0; 274 275 return SOC_E_NONE; 276 } 277 278 int 279 phy_null_mode_set(int unit, soc_port_t port, soc_port_mode_t mode) 280 { 281 COMPILER_REFERENCE(unit); 282 COMPILER_REFERENCE(port); 283 COMPILER_REFERENCE(mode); 284 285 return SOC_E_NONE; 286 } 287 288 int 289 phy_null_mode_get(int unit, soc_port_t port, soc_port_mode_t *mode) 290 { 291 COMPILER_REFERENCE(unit); 292 COMPILER_REFERENCE(port); 293 294 if (IS_HG_PORT(unit, port) || IS_XE_PORT(unit, port)) { 295 *mode = SOC_PM_10GB_FD | SOC_PM_XGMII; 296 } else if (IS_GE_PORT(unit, port)) { 297 *mode = SOC_PM_1000MB_FD | SOC_PM_GMII | 298 SOC_PM_100MB_FD | SOC_PM_100MB_HD | 299 SOC_PM_10MB_FD | SOC_PM_10MB_HD | SOC_PM_MII; 300 } else { 301 *mode = SOC_PM_100MB_FD | SOC_PM_100MB_HD | 302 SOC_PM_10MB_FD | SOC_PM_10MB_HD | SOC_PM_MII; 303 } 304 305 return SOC_E_NONE; 306 } 307 308 int 309 phy_null_ability_get(int unit, soc_port_t port, soc_port_ability_t *ability) 310 { 311 if (NULL != saved_data[unit]) { 312 *ability = saved_data[unit]->null_phy_ability[port]; 313 } else { 314 /* Only the NULL PHY should call this function. */ 315 return SOC_E_INTERNAL; 316 } 317 318 return SOC_E_NONE; 319 } 320 321 int 322 phy_null_interface_set(int unit, soc_port_t port, soc_port_if_t pif) 323 { 324 soc_phy_info_t *pi; 325 326 pi = &SOC_PHY_INFO(unit, port); 327 328 /* coverity[dead_error_condition:FALSE] */ 329 if (NULL == pi) { 330 /* coverity[dead_error_line] */ 331 return SOC_E_INIT; 332 } 333 334 if (pif == SOC_PORT_IF_TBI) { 335 pi->phy_flags |= PHY_FLAGS_10B; 336 } else { 337 pi->phy_flags &= ~PHY_FLAGS_10B; 338 } 339 340 return SOC_E_NONE; 341 } 342 343 int 344 phy_null_duplex_set(int unit, soc_port_t port, int duplex) 345 { 346 /* Draco Quickturn specific code. */ 347 if (SAL_BOOT_QUICKTURN && IS_GE_PORT(unit, port) && 348 !soc_feature(unit, soc_feature_no_qt_gport)) { 349 return phy_fe_ge_duplex_set(unit, port, duplex); 350 } 351 352 return SOC_E_NONE; 353 } 354 355 int 356 phy_null_duplex_get(int unit, soc_port_t port, int *duplex) 357 { 358 uint8 phy_addr; 359 uint16 mii_ctrl; 360 361 if (SAL_BOOT_QUICKTURN && IS_GE_PORT(unit, port) && 362 !soc_feature(unit, soc_feature_no_qt_gport)) { 363 phy_addr = PORT_TO_PHY_ADDR(unit, port); 364 /* Quickturn (may) have mii hooks for reconfiguring */ 365 SOC_IF_ERROR_RETURN( 366 soc_miim_read(unit, phy_addr, MII_CTRL_REG, &mii_ctrl)); 367 *duplex = (mii_ctrl & MII_CTRL_FD) ? 1 : 0; 368 return SOC_E_NONE; 369 } 370 371 /* Otherwise, just get speed from mac */ 372 *duplex = 1; 373 return SOC_E_NONE; 374 } 375 376 int 377 phy_null_speed_set(int unit, soc_port_t port, int speed) 378 { 379 uint8 phy_addr; 380 uint16 mii_ctrl; 381 382 /* Quickturn specific code. */ 383 if (SAL_BOOT_QUICKTURN && IS_GE_PORT(unit, port) && 384 !soc_feature(unit, soc_feature_no_qt_gport)) { 385 if (0 == speed) { 386 return SOC_E_NONE; 387 } 388 phy_addr = PORT_TO_PHY_ADDR(unit, port); 389 390 SOC_IF_ERROR_RETURN( 391 soc_miim_read(unit, phy_addr, MII_CTRL_REG, &mii_ctrl)); 392 mii_ctrl &= ~(MII_CTRL_SS_LSB | MII_CTRL_SS_MSB | (1 << 9)); 393 switch(speed) { 394 case 10: 395 mii_ctrl |= MII_CTRL_SS_10; 396 break; 397 case 100: 398 mii_ctrl |= MII_CTRL_SS_100; 399 break; 400 case 1000: 401 mii_ctrl |= MII_CTRL_SS_1000; 402 break; 403 case 2500: 404 /* Quickturn uses bit 9 to simulate 2.5Gbps mode */ 405 mii_ctrl |= MII_CTRL_SS_1000 | (1 << 9); 406 break; 407 default: 408 return(SOC_E_CONFIG); 409 } 410 SOC_IF_ERROR_RETURN( 411 soc_miim_write(unit, phy_addr, MII_CTRL_REG, mii_ctrl)); 412 } 413 414 if(unit < SOC_MAX_NUM_DEVICES && port < SOC_MAX_NUM_PORTS) { 415 if (NULL != saved_data[unit]) { 416 saved_data[unit]->speed[port] = speed; 417 } /* Else some other PHY is using this function */ 418 return SOC_E_NONE; 419 } else { 420 return SOC_E_PARAM; 421 } 422 423 } 424 425 int 426 phy_null_speed_get(int unit, soc_port_t port, int *speed) 427 { 428 #if defined(BCM_ESW_SUPPORT) 429 uint8 phy_addr; 430 uint16 mii_ctrl; 431 #endif 432 433 434 #ifdef BCM_ESW_SUPPORT 435 if(SOC_IS_ESW(unit)) { 436 if (SAL_BOOT_QUICKTURN && IS_GE_PORT(unit, port) && 437 !soc_feature(unit, soc_feature_no_qt_gport)) { 438 phy_addr = PORT_TO_PHY_ADDR(unit, port); 439 /* Quickturn (may) have mii hooks for reconfiguring */ 440 SOC_IF_ERROR_RETURN( 441 soc_miim_read(unit, phy_addr, MII_CTRL_REG, &mii_ctrl)); 442 switch(MII_CTRL_SS(mii_ctrl)) { 443 case MII_CTRL_SS_10: 444 *speed = 10; 445 break; 446 case MII_CTRL_SS_100: 447 *speed = 100; 448 break; 449 case MII_CTRL_SS_1000: 450 *speed = 1000; 451 break; 452 /* Quickturn uses bit 9 to simulate 2.5Gbps mode */ 453 case (MII_CTRL_SS_1000 | (1 << 9)): 454 *speed = 2500; 455 break; 456 default: 457 return SOC_E_UNAVAIL; 458 } 459 return SOC_E_NONE; 460 } 461 462 if (!SOC_IS_TOMAHAWKX(unit)) { 463 /* Otherwise, just get speed from mac */ 464 if (SOC_INFO(unit).port_speed_max[port] <= 10000) { 465 return SOC_E_UNAVAIL; 466 } /* Else MAC can't distinguish between speeds > 10G */ 467 } 468 } 469 #endif 470 471 if(unit < SOC_MAX_NUM_DEVICES && port < SOC_MAX_NUM_PORTS) { 472 if (NULL != saved_data[unit]) { 473 #ifdef BCM_ESW_SUPPORT 474 if(SOC_IS_ESW(unit)) { 475 if (saved_data[unit]->speed[port] == 0) { /* Not Set Yet */ 476 saved_data[unit]->speed[port] = 477 SOC_INFO(unit).port_init_speed[port] ? 478 SOC_INFO(unit).port_init_speed[port] : 479 SOC_INFO(unit).port_speed_max[port]; 480 } 481 } 482 #endif 483 *speed = saved_data[unit]->speed[port]; 484 } else { 485 *speed = 0; 486 } /* Else some other PHY is using this function */ 487 return SOC_E_NONE; 488 } else { 489 return SOC_E_PARAM; 490 } 491 } 492 493 int 494 phy_null_interface_get(int unit, soc_port_t port, soc_port_if_t *pif) 495 { 496 soc_phy_info_t *pi; 497 498 pi = &SOC_PHY_INFO(unit, port); 499 /* coverity[dead_error_condition:FALSE] */ 500 if (NULL == pi) { 501 /* coverity[dead_error_line] */ 502 return SOC_E_INIT; 503 } 504 505 if (pi->phy_flags & PHY_FLAGS_10B) { 506 *pif = SOC_PORT_IF_TBI; 507 } else if (IS_GE_PORT(unit, port)) { 508 *pif = SOC_PORT_IF_GMII; 509 } else if (IS_HG_PORT(unit, port) || IS_XE_PORT(unit, port)) { 510 *pif = SOC_PORT_IF_XGMII; 511 } else { 512 *pif = SOC_PORT_IF_MII; 513 } 514 515 return SOC_E_NONE; 516 } 517 518 519 520 int 521 phy_nocxn_interface_set(int unit, soc_port_t port, soc_port_if_t pif) 522 { 523 COMPILER_REFERENCE(unit); 524 COMPILER_REFERENCE(port); 525 COMPILER_REFERENCE(pif); 526 527 return SOC_E_NONE; 528 } 529 530 int 531 phy_nocxn_interface_get(int unit, soc_port_t port, soc_port_if_t *pif) 532 { 533 COMPILER_REFERENCE(unit); 534 COMPILER_REFERENCE(port); 535 536 *pif = SOC_PORT_IF_NOCXN; 537 538 return SOC_E_NONE; 539 } 540 541 /* 542 * Function: 543 * phy_null_mdix_set 544 * Description: 545 * Set the Auto-MDIX mode of a port/PHY 546 * Parameters: 547 * unit - Device number 548 * port - Port number 549 * mode - One of: 550 * BCM_PORT_MDIX_AUTO 551 * Enable auto-MDIX when autonegotiation is enabled 552 * BCM_PORT_MDIX_FORCE_AUTO 553 * Enable auto-MDIX always 554 * BCM_PORT_MDIX_NORMAL 555 * Disable auto-MDIX 556 * BCM_PORT_MDIX_XOVER 557 * Disable auto-MDIX, and swap cable pairs 558 * Return Value: 559 * BCM_E_UNAVAIL - feature unsupported by hardware 560 * BCM_E_XXX - other error 561 */ 562 int 563 phy_null_mdix_set(int unit, soc_port_t port, soc_port_mdix_t mode) 564 { 565 COMPILER_REFERENCE(unit); 566 COMPILER_REFERENCE(port); 567 568 if (mode == SOC_PORT_MDIX_NORMAL) { 569 return SOC_E_NONE; 570 } else { 571 return SOC_E_UNAVAIL; 572 } 573 } 574 575 /* 576 * Function: 577 * phy_null_mdix_get 578 * Description: 579 * Get the Auto-MDIX mode of a port/PHY 580 * Parameters: 581 * unit - Device number 582 * port - Port number 583 * mode - (Out) One of: 584 * BCM_PORT_MDIX_AUTO 585 * Enable auto-MDIX when autonegotiation is enabled 586 * BCM_PORT_MDIX_FORCE_AUTO 587 * Enable auto-MDIX always 588 * BCM_PORT_MDIX_NORMAL 589 * Disable auto-MDIX 590 * BCM_PORT_MDIX_XOVER 591 * Disable auto-MDIX, and swap cable pairs 592 * Return Value: 593 * BCM_E_UNAVAIL - feature unsupported by hardware 594 * BCM_E_XXX - other error 595 */ 596 int 597 phy_null_mdix_get(int unit, soc_port_t port, soc_port_mdix_t *mode) 598 { 599 COMPILER_REFERENCE(unit); 600 COMPILER_REFERENCE(port); 601 602 if (mode == NULL) { 603 return SOC_E_PARAM; 604 } 605 606 *mode = SOC_PORT_MDIX_NORMAL; 607 608 return SOC_E_NONE; 609 } 610 611 /* 612 * Function: 613 * phy_null_mdix_status_get 614 * Description: 615 * Get the current MDIX status on a port/PHY 616 * Parameters: 617 * unit - Device number 618 * port - Port number 619 * status - (OUT) One of: 620 * BCM_PORT_MDIX_STATUS_NORMAL 621 * Straight connection 622 * BCM_PORT_MDIX_STATUS_XOVER 623 * Crossover has been performed 624 * Return Value: 625 * BCM_E_UNAVAIL - feature unsupported by hardware 626 * BCM_E_XXX - other error 627 */ 628 int 629 phy_null_mdix_status_get(int unit, soc_port_t port, 630 soc_port_mdix_status_t *status) 631 { 632 COMPILER_REFERENCE(unit); 633 COMPILER_REFERENCE(port); 634 635 if (status == NULL) { 636 return SOC_E_PARAM; 637 } 638 639 *status = SOC_PORT_MDIX_STATUS_NORMAL; 640 641 return SOC_E_NONE; 642 } 643 644 /* 645 * Function: 646 * phy_null_medium_get 647 * Description: 648 * Get the currently chosen medium for the dual-medium PHY 649 * Parameters: 650 * unit -- Device number 651 * port -- Port number 652 * medium -- (Out) One of 653 * SOC_PORT_MEDIUM_NONE 654 * SOC_PORT_MEDIUM_COPPER 655 * SOC_PORT_MEDIUM_FIBER 656 * 657 * Return value: 658 * BCM_E_NONE 659 * BCM_E_PARAM 660 * BCM_E_UNAVAIL 661 */ 662 int 663 phy_null_medium_get(int unit, soc_port_t port, 664 soc_port_medium_t *medium) 665 { 666 int rv; 667 668 COMPILER_REFERENCE(unit); 669 COMPILER_REFERENCE(port); 670 671 if (medium != NULL) { 672 *medium = SOC_PORT_MEDIUM_NONE; 673 rv = SOC_E_NONE; 674 } else { 675 rv = SOC_E_PARAM; 676 } 677 678 return (rv); 679 } 680 681 /* 682 * Function: 683 * phy_null_control_set 684 * Description: 685 * Get phy control 686 * Parameters: 687 * unit -- Device number 688 * port -- Port number 689 * param 690 * 691 * Return value: 692 * BCM_E_NONE 693 * BCM_E_PARAM 694 * BCM_E_UNAVAIL 695 */ 696 int 697 phy_null_control_set(int unit, soc_port_t port, soc_phy_control_t phy_ctrl, uint32 param) 698 { 699 700 COMPILER_REFERENCE(unit); 701 COMPILER_REFERENCE(port); 702 COMPILER_REFERENCE(phy_ctrl); 703 COMPILER_REFERENCE(param); 704 705 return (SOC_E_NONE); 706 } 707 708 /* 709 * Function: 710 * phy_null_control_get 711 * Description: 712 * Get phy control 713 * Parameters: 714 * unit -- Device number 715 * port -- Port number 716 * param 717 * 718 * Return value: 719 * BCM_E_NONE 720 * BCM_E_PARAM 721 * BCM_E_UNAVAIL 722 */ 723 int 724 phy_null_control_get(int unit, soc_port_t port, soc_phy_control_t phy_ctrl, uint32 *param) 725 { 726 int rv; 727 728 COMPILER_REFERENCE(unit); 729 COMPILER_REFERENCE(port); 730 COMPILER_REFERENCE(phy_ctrl); 731 732 if (param != NULL) { 733 *param = 0; 734 rv = SOC_E_NONE; 735 } else { 736 rv = SOC_E_PARAM; 737 } 738 739 return (rv); 740 } 741 742 /* 743 * Function: 744 * phy_null_notify 745 * Description: 746 * Get a notification 747 * Parameters: 748 * unit -- Device number 749 * port -- Port number 750 * event -- event 751 * value -- value 752 * 753 * Return value: 754 * SOC_E_NONE 755 */ 756 int 757 phy_null_notify(int unit, soc_port_t port, 758 soc_phy_event_t event, uint32 value) 759 { 760 int rv = SOC_E_NONE; 761 762 COMPILER_REFERENCE(unit); 763 COMPILER_REFERENCE(port); 764 COMPILER_REFERENCE(event); 765 COMPILER_REFERENCE(value); 766 767 return (rv); 768 } 769 770 /* 771 * Variable: phy_null 772 * Purpose: Phy driver callouts for a null phy (e.g. quickturn) 773 * Notes: This is the driver for a direct connection without a phy. 774 */ 775 phy_driver_t phy_null = { 776 "Null PHY Driver", 777 phy_null_init, /* phy_init */ 778 phy_null_reset, /* phy_reset */ 779 phy_null_link_get, /* phy_link_get */ 780 phy_null_enable_set, /* phy_enable_set */ 781 phy_null_enable_get, /* phy_enable_get */ 782 phy_null_duplex_set, /* phy_duplex_set */ 783 phy_null_duplex_get, /* phy_duplex_get */ 784 phy_null_speed_set, /* phy_speed_set */ 785 phy_null_speed_get, /* phy_speed_get */ 786 phy_null_set, /* phy_master_set */ 787 phy_null_zero_get, /* phy_master_get */ 788 phy_null_set, /* phy_an_set */ 789 phy_null_an_get, /* phy_an_get */ 790 phy_null_mode_set, /* phy_adv_local_set */ 791 phy_null_mode_get, /* phy_adv_local_get */ 792 phy_null_mode_get, /* phy_adv_remote_get */ 793 phy_null_set, /* phy_lb_set */ 794 phy_null_zero_get, /* phy_lb_get */ 795 phy_null_interface_set, /* phy_interface_set */ 796 phy_null_interface_get, /* phy_interface_get */ 797 phy_null_mode_get, /* phy_ability */ 798 NULL, /* phy_linkup_evt */ 799 NULL, /* phy_linkdn_evt */ 800 phy_null_mdix_set, /* phy_mdix_set */ 801 phy_null_mdix_get, /* phy_mdix_get */ 802 phy_null_mdix_status_get, /* phy_mdix_status_get */ 803 NULL, /* phy_medium_config_set */ 804 NULL, /* phy_medium_config_get */ 805 phy_null_medium_get, /* phy_medium_get */ 806 NULL, /* phy_cable_diag */ 807 NULL, /* phy_link_change */ 808 phy_null_control_set, /* phy_control_set */ 809 phy_null_control_get, /* phy_control_get */ 810 NULL, /* phy_reg_read */ 811 NULL, /* phy_reg_write */ 812 NULL, /* phy_reg_modify */ 813 phy_null_notify, /* phy_notify */ 814 NULL, /* phy_probe */ 815 NULL, /* phy_ability_advert_set */ 816 phy_null_ability_get, /* phy_ability_advert_get */ 817 phy_null_ability_get, /* phy_ability_remote_get */ 818 phy_null_ability_get, /* phy_ability_local_get */ 819 NULL, /* phy_firmware_set */ 820 NULL, /* phy_timesync_config_set */ 821 NULL, /* phy_timesync_config_get */ 822 NULL, /* phy_timesync_control_set */ 823 NULL, /* phy_timesync_control_get */ 824 NULL /* phy_diag_ctrl */ 825 }; 826 827 /* 828 * Variable: phy_nocxn 829 * Purpose: Phy driver callouts for no connection 830 * Notes: This is the driver used when a port is 831 * de-initialized (eg, hotswap card is pulled.) 832 */ 833 phy_driver_t phy_nocxn = { 834 "No-connection PHY Driver", 835 phy_null_init, /* phy_init */ 836 phy_null_reset, /* phy_reset */ 837 phy_null_zero_get, /* phy_link_get */ 838 phy_null_enable_set, /* phy_enable_set */ 839 phy_null_enable_get, /* phy_enable_get */ 840 phy_null_set, /* phy_duplex_set */ 841 phy_null_one_get, /* phy_duplex_get */ 842 phy_null_set, /* phy_speed_set */ 843 phy_null_zero_get, /* phy_speed_get */ 844 phy_null_set, /* phy_master_set */ 845 phy_null_zero_get, /* phy_master_get */ 846 phy_null_set, /* phy_an_set */ 847 phy_null_an_get, /* phy_an_get */ 848 phy_null_mode_set, /* phy_adv_local_set */ 849 phy_null_mode_get, /* phy_adv_local_get */ 850 phy_null_mode_get, /* phy_adv_remote_get */ 851 phy_null_set, /* phy_lb_set */ 852 phy_null_zero_get, /* phy_lb_get */ 853 phy_nocxn_interface_set, /* phy_interface_set */ 854 phy_nocxn_interface_get, /* phy_interface_get */ 855 phy_null_mode_get, /* phy_ability */ 856 NULL, /* phy_linkup_evt */ 857 NULL, /* phy_linkdn_evt */ 858 phy_null_mdix_set, /* phy_mdix_set */ 859 phy_null_mdix_get, /* phy_mdix_get */ 860 phy_null_mdix_status_get, /* phy_mdix_status_get */ 861 NULL, /* phy_medium_config_set */ 862 NULL, /* phy_medium_config_get */ 863 phy_null_medium_get, /* phy_medium_get */ 864 NULL, /* phy_cable_diag */ 865 NULL /* phy_link_change */ 866 };