phy_xmac.c (17142B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * Xmac Driver (10G MAC) 8 */ 9 10 int phy_xmac_not_empty; 11 #if defined(INCLUDE_FCMAP) || defined(INCLUDE_MACSEC) 12 #include "phy_xmac.h" 13 #include <blmi_err.h> 14 #include "phy_mac_ctrl.h" 15 16 /*************************************************************** 17 * XMAC functions. 18 */ 19 /* 20 * Function: 21 * xmac_mac_init 22 * Purpose: 23 * Initialize the MAC 24 * Parameters: 25 * mmc - mac driver control 26 * dev_port - Port number 27 * pt 28 * Notes: 29 * The MAC will be put in Auto config mode at initilization 30 * MAX Frame Size = 0x3fff 31 * IPG = 12 32 * TX and RX are enabled 33 */ 34 int 35 phy_xmac_mac_init(phy_mac_ctrl_t *mmc, int dev_port) 36 { 37 uint64 rxctrl_reg; 38 uint64 txctrl_reg; 39 uint64 ms_ctrl_reg; 40 uint64 rx_lss_ctrl; 41 uint64 mac_ctrl; 42 int rv = BLMI_E_NONE; 43 buint32_t tmp_val[2]; 44 45 /* Put the mac in reset */ 46 BLMI_E_IF_ERROR_RETURN( 47 phy_xmac_mac_reset(mmc, dev_port, 1)); 48 49 /* Take mac out of reset */ 50 /* Disable Tx/Rx */ 51 BLMI_E_IF_ERROR_RETURN( 52 phy_xmac_mac_reset(mmc, dev_port, 0)); 53 54 /* Set MAX Frame length to 0x3fff */ 55 BLMI_E_IF_ERROR_RETURN( 56 phy_xmac_mac_max_frame_set(mmc, dev_port, 57 XMAC_MAC_DEFAULT_MAX_FRAME_SIZE)); 58 /* Set IPG to 12 */ 59 BLMI_E_IF_ERROR_RETURN( 60 phy_xmac_mac_update_ipg(mmc, dev_port, XMAC_MAC_DEFAULT_IPG)); 61 62 /* Enable Pause */ 63 BLMI_E_IF_ERROR_RETURN( 64 phy_xmac_mac_pause_set(mmc, dev_port, 1)); 65 66 /* CRC Strip for RX */ 67 BLMI_E_IF_ERROR_RETURN( 68 XMAC_READ_RXCTRL_REG(mmc, dev_port, &rxctrl_reg)); 69 XMAC_64_LO_SET(rxctrl_reg, 70 COMPILER_64_LO(rxctrl_reg) | (XMAC_RX_CTRL_CRCSTRIP_MASK)); 71 BLMI_E_IF_ERROR_RETURN( 72 XMAC_WRITE_RXCTRL_REG(mmc, dev_port, rxctrl_reg)); 73 74 /* TX CRC corrupt enable */ 75 BLMI_E_IF_ERROR_RETURN( 76 XMAC_READ_MAC_MACSEC_CTRL_REG(mmc, dev_port, &ms_ctrl_reg)); 77 XMAC_64_LO_SET(ms_ctrl_reg, 78 COMPILER_64_LO(ms_ctrl_reg) | XMAC_MACSEC_CTRL_TX_CRC_CORRUPT_MASK); 79 BLMI_E_IF_ERROR_RETURN( 80 XMAC_WRITE_MAC_MACSEC_CTRL_REG(mmc, dev_port, ms_ctrl_reg)); 81 82 /* Append CRC on transmit */ 83 BLMI_E_IF_ERROR_RETURN( 84 XMAC_READ_TXCTRL_REG(mmc, dev_port, &txctrl_reg)); 85 XMAC_64_LO_SET(txctrl_reg, 86 COMPILER_64_LO(txctrl_reg) | XMAC_TX_CTRL_CRCMODE_MASK); 87 BLMI_E_IF_ERROR_RETURN( 88 XMAC_WRITE_TXCTRL_REG(mmc, dev_port, txctrl_reg)); 89 90 /* Set PHY LSS (Local fault, remote fault termination disable) */ 91 BLMI_E_IF_ERROR_RETURN( 92 XMAC_READ_RX_LSS_CTRL_REG(mmc, dev_port, &rx_lss_ctrl)); 93 XMAC_64_LO_SET(rx_lss_ctrl, 94 COMPILER_64_LO(rx_lss_ctrl) | XMAC_RX_LSS_CTRL_DISABLE_MASK); 95 BLMI_E_IF_ERROR_RETURN( 96 XMAC_WRITE_RX_LSS_CTRL_REG( mmc, dev_port, rx_lss_ctrl)); 97 98 /* Disable Loopback */ 99 BLMI_E_IF_ERROR_RETURN( 100 XMAC_READ_MAC_CTRL_REG(mmc, dev_port, &mac_ctrl)); 101 102 XMAC_64_LO_SET(mac_ctrl, 103 COMPILER_64_LO(mac_ctrl) & ~(XMAC_MAC_CTRL_LB_LL_MASK | 104 XMAC_MAC_CTRL_LB_CL_MASK | 105 XMAC_MAC_CTRL_LB_LR_MASK | 106 XMAC_MAC_CTRL_LB_CR_MASK )); 107 BLMI_E_IF_ERROR_RETURN( 108 XMAC_WRITE_MAC_CTRL_REG(mmc, dev_port, mac_ctrl)); 109 110 /* Enable TX and RX */ 111 BLMI_E_IF_ERROR_RETURN( 112 phy_xmac_mac_enable_set(mmc, dev_port, 1)); 113 114 return BLMI_E_NONE; 115 } 116 117 /* 118 * Function: 119 * xmac_mac_fcmap_init 120 * Purpose: 121 * Initialize the MAC 122 * Parameters: 123 * mmc - mac driver control 124 * dev_port - Port number 125 * pt 126 * Notes: 127 * The MAC will be put in Auto config mode at initilization 128 * MAX Frame Size = 0x3fff 129 * IPG = 12 130 * TX and RX are enabled 131 */ 132 int 133 phy_xmac_mac_fcmap_init(phy_mac_ctrl_t *mmc, int dev_port) 134 { 135 uint64 rxctrl_reg; 136 uint64 txctrl_reg; 137 uint64 rx_lss_ctrl; 138 uint64 mac_ctrl; 139 uint64 pause_reg ; 140 int rv = BLMI_E_NONE; 141 buint32_t tmp_val[2]; 142 143 /* Put the mac in reset */ 144 BLMI_E_IF_ERROR_RETURN( 145 phy_xmac_mac_reset(mmc, dev_port, 1)); 146 147 /* Take mac out of reset */ 148 /* Disable Tx/Rx */ 149 BLMI_E_IF_ERROR_RETURN( 150 phy_xmac_mac_reset(mmc, dev_port, 0)); 151 152 /* Set MAX Frame length to 0x3fff */ 153 BLMI_E_IF_ERROR_RETURN( 154 phy_xmac_mac_max_frame_set(mmc, dev_port, 155 XMAC_MAC_DEFAULT_MAX_FRAME_SIZE)); 156 /* Set IPG to 12 */ 157 BLMI_E_IF_ERROR_RETURN( 158 phy_xmac_mac_update_ipg(mmc, dev_port, XMAC_MAC_DEFAULT_IPG)); 159 160 /* Enable Pause */ 161 BLMI_E_IF_ERROR_RETURN( 162 XMAC_READ_PAUSE_CTRL_REG(mmc, dev_port, &pause_reg)); 163 if (XMAC_IS_V2(mmc)) { 164 COMPILER_64_SET(pause_reg, 0x1f, 0xffe7c000); 165 } 166 else { 167 COMPILER_64_SET(pause_reg, 0, 0x7c000); 168 } 169 BLMI_E_IF_ERROR_RETURN( 170 XMAC_WRITE_PAUSE_CTRL_REG(mmc, dev_port, pause_reg)); 171 172 COMPILER_64_SET(rxctrl_reg, 0, 0); 173 BLMI_E_IF_ERROR_RETURN( 174 XMAC_WRITE_RXCTRL_REG(mmc, dev_port, rxctrl_reg)); 175 176 COMPILER_64_SET(txctrl_reg, 0x10, 0xc811); 177 BLMI_E_IF_ERROR_RETURN( 178 XMAC_WRITE_TXCTRL_REG(mmc, dev_port, txctrl_reg)); 179 180 /* Set PHY LSS (Local fault, remote fault termination disable) */ 181 BLMI_E_IF_ERROR_RETURN( 182 XMAC_READ_RX_LSS_CTRL_REG(mmc, dev_port, &rx_lss_ctrl)); 183 XMAC_64_LO_SET(rx_lss_ctrl, 184 COMPILER_64_LO(rx_lss_ctrl) | XMAC_RX_LSS_CTRL_DISABLE_MASK); 185 BLMI_E_IF_ERROR_RETURN( 186 XMAC_WRITE_RX_LSS_CTRL_REG( mmc, dev_port, rx_lss_ctrl)); 187 188 /* Disable Loopback */ 189 BLMI_E_IF_ERROR_RETURN( 190 XMAC_READ_MAC_CTRL_REG(mmc, dev_port, &mac_ctrl)); 191 192 XMAC_64_LO_SET(mac_ctrl, 193 COMPILER_64_LO(mac_ctrl) & ~(XMAC_MAC_CTRL_LB_LL_MASK | 194 XMAC_MAC_CTRL_LB_CL_MASK | 195 XMAC_MAC_CTRL_LB_LR_MASK | 196 XMAC_MAC_CTRL_LB_CR_MASK )); 197 BLMI_E_IF_ERROR_RETURN( 198 XMAC_WRITE_MAC_CTRL_REG(mmc, dev_port, mac_ctrl)); 199 200 /* Enable TX and RX */ 201 BLMI_E_IF_ERROR_RETURN( 202 phy_xmac_mac_enable_set(mmc, dev_port, 1)); 203 204 return BLMI_E_NONE; 205 } 206 207 int 208 phy_xmac_mac_readtx(phy_mac_ctrl_t *mmc, int dev_port) 209 { 210 uint64 txctrl_reg; 211 int rv = BLMI_E_NONE; 212 buint32_t tmp_val[2]; 213 214 /* Append CRC on transmit */ 215 BLMI_E_IF_ERROR_RETURN( 216 XMAC_READ_TXCTRL_REG(mmc, dev_port, &txctrl_reg)); 217 /* 218 BMF_SAL_PRINTF("READING tx ctrl = %x %x\n", 219 COMPILER_64_HI(txctrl_reg), 220 COMPILER_64_LO(txctrl_reg)); 221 */ 222 return BLMI_E_NONE; 223 } 224 225 226 227 /* 228 * Function: 229 * xmac_mac_reset 230 * Purpose: 231 * This function puts the XMAC in reset if reset is 1 else takes mac 232 * out of reset 233 * Parameters: 234 * mmc - mac driver control 235 * dev_port - Port number 236 * reset - Reset MAC 237 * 1 = Put in Reset 238 * 0 = Take out of reset 239 * Notes: 240 */ 241 int 242 phy_xmac_mac_reset(phy_mac_ctrl_t *mmc, int dev_port, int reset) 243 { 244 uint64 mac_ctrl; 245 buint32_t val; 246 int rv = BLMI_E_NONE; 247 buint32_t tmp_val[2]; 248 249 val = (reset) ? 1 : 0; 250 251 if (dev_port > 3) { 252 return BLMI_E_NONE; 253 } 254 BLMI_E_IF_ERROR_RETURN( 255 XMAC_READ_MAC_CTRL_REG(mmc, dev_port, &mac_ctrl)); 256 257 if (val) { 258 XMAC_64_LO_SET(mac_ctrl, 259 COMPILER_64_LO(mac_ctrl) | (XMAC_MAC_CTRL_RESET_MASK)); 260 } else { /* out of reset */ 261 XMAC_64_LO_SET(mac_ctrl, 262 COMPILER_64_LO(mac_ctrl) & ~(XMAC_MAC_CTRL_RESET_MASK | 263 XMAC_MAC_CTRL_TXEN_MASK | 264 XMAC_MAC_CTRL_RXEN_MASK)); 265 } 266 BLMI_E_IF_ERROR_RETURN( 267 XMAC_WRITE_MAC_CTRL_REG(mmc, dev_port, mac_ctrl)); 268 269 270 return BLMI_E_NONE; 271 } 272 273 274 /* 275 * Function: 276 * xmac_mac_enable_set 277 * Purpose: 278 * Enable/Disable XMAC 279 * Parameters: 280 * mmc - mac driver control 281 * dev_port - Port number 282 * enable - Enable flag 283 * 1 = Enable MAC 284 * 0 = Disable MAC 285 * Notes: 286 */ 287 int 288 phy_xmac_mac_enable_set(phy_mac_ctrl_t *mmc, int dev_port, int enable) 289 { 290 uint64 mac_ctrl; 291 buint32_t val; 292 int rv = BLMI_E_NONE; 293 buint32_t tmp_val[2]; 294 295 val = (enable) ? 1 : 0; 296 297 /* Enable TX and RX */ 298 BLMI_E_IF_ERROR_RETURN( 299 XMAC_READ_MAC_CTRL_REG(mmc, dev_port, &mac_ctrl)); 300 301 if (val) { 302 /* Enable TX and RX domains */ 303 XMAC_64_LO_SET(mac_ctrl, 304 COMPILER_64_LO(mac_ctrl) | (XMAC_MAC_CTRL_TXEN_MASK| 305 XMAC_MAC_CTRL_RXEN_MASK)); 306 } else { 307 /* Don't disable TX since it stops egress and hangs if CPU sends */ 308 XMAC_64_LO_SET(mac_ctrl, 309 COMPILER_64_LO(mac_ctrl) | (XMAC_MAC_CTRL_TXEN_MASK)); 310 XMAC_64_LO_SET(mac_ctrl, 311 COMPILER_64_LO(mac_ctrl) & ~(XMAC_MAC_CTRL_RXEN_MASK)); 312 } 313 BLMI_E_IF_ERROR_RETURN( 314 XMAC_WRITE_MAC_CTRL_REG(mmc, dev_port, mac_ctrl)); 315 return BLMI_E_NONE; 316 } 317 318 /* 319 * Function: 320 * xmac_mac_enable_get 321 * Purpose: 322 * Get the enable status of XMAC 323 * Parameters: 324 * mmc - mac driver control 325 * dev_port - Port number 326 * enable - (OUT)Enable flag 327 * 1 = Enable MAC 328 * 0 = Disable MAC 329 * Notes: 330 */ 331 int 332 phy_xmac_mac_enable_get(phy_mac_ctrl_t *mmc, int dev_port, int *enable) 333 { 334 uint64 mac_ctrl; 335 buint32_t val; 336 int rv = BLMI_E_NONE; 337 buint32_t tmp_val[2]; 338 339 BLMI_E_IF_ERROR_RETURN( 340 XMAC_READ_MAC_CTRL_REG(mmc, dev_port, &mac_ctrl)); 341 val = (COMPILER_64_LO(mac_ctrl) & 342 XMAC_MAC_CTRL_RXEN_MASK) >> XMAC_MAC_CTRL_RXEN_SHIFT; 343 344 *(enable) = (val) ? 1 : 0; 345 346 return BLMI_E_NONE; 347 } 348 349 350 /* 351 * Function: 352 * xmac_mac_update_ipg 353 * Purpose: 354 * Set IPG of the MAC 355 * Parameters: 356 * mmc - mac driver control 357 * dev_port - Port number 358 * ipg - IPG value 359 * Notes: 360 */ 361 int 362 phy_xmac_mac_update_ipg(phy_mac_ctrl_t *mmc, int dev_port, int ipg) 363 { 364 uint64 ipg_reg; 365 int rv = BLMI_E_NONE; 366 buint32_t tmp_val[2]; 367 368 if((ipg < 8) || (ipg > 64)) { 369 return BLMI_E_PARAM; 370 } 371 BLMI_E_IF_ERROR_RETURN( 372 XMAC_READ_TXCTRL_REG(mmc, dev_port, &ipg_reg)); 373 374 XMAC_64_LO_SET(ipg_reg, 375 COMPILER_64_LO(ipg_reg) & ~(XMAC_TX_CTRL_IPG_MASK)); 376 XMAC_64_LO_SET(ipg_reg, 377 COMPILER_64_LO(ipg_reg) | ((ipg&0x7f)<< XMAC_TX_CTRL_IPG_SHIFT)); 378 379 BLMI_E_IF_ERROR_RETURN( 380 XMAC_WRITE_TXCTRL_REG(mmc, dev_port, ipg_reg)); 381 382 return BLMI_E_NONE; 383 } 384 385 386 /* 387 * Function: 388 * xmac_mac_max_frame_set 389 * Purpose: 390 * Set Max frame of the MAC 391 * Parameters: 392 * mmc - mac driver control 393 * dev_port - Port number 394 * max_frame - Max frame value 395 * Notes: 396 */ 397 int 398 phy_xmac_mac_max_frame_set(phy_mac_ctrl_t *mmc, int dev_port, 399 buint32_t max_frame) 400 { 401 uint64 max_sz; 402 int rv = BLMI_E_NONE; 403 buint32_t tmp_val[2]; 404 405 /* 406 * Maximum Frame size shouldn;t be less 48 and cannot be greater than 407 * 0x3ffc 408 */ 409 if((max_frame < 48) || (max_frame > XMAC_MAC_DEFAULT_MAX_FRAME_SIZE)) { 410 return BLMI_E_PARAM; 411 } 412 413 COMPILER_64_SET(max_sz, 0, (max_frame & XMAC_RXMAXSZ_MAX_FRAME_SIZE_MASK)); 414 415 BLMI_E_IF_ERROR_RETURN( 416 XMAC_WRITE_RXMAXSZ_REG(mmc, dev_port, max_sz)); 417 418 return BLMI_E_NONE; 419 } 420 421 /* 422 * Function: 423 * xmac_mac_max_frame_get 424 * Purpose: 425 * Get Max frame of the MAC 426 * Parameters: 427 * mmc - mac driver control 428 * dev_port - Port number 429 * max_frame - (OUT) Max frame 430 * Notes: 431 */ 432 int 433 phy_xmac_mac_max_frame_get(phy_mac_ctrl_t *mmc, int dev_port, 434 buint32_t *max_frame) 435 { 436 uint64 frame_len; 437 int rv = BLMI_E_NONE; 438 buint32_t tmp_val[2]; 439 440 BLMI_E_IF_ERROR_RETURN( 441 XMAC_READ_RXMAXSZ_REG(mmc, dev_port, &frame_len)); 442 *max_frame = (COMPILER_64_LO(frame_len) & 443 XMAC_RXMAXSZ_MAX_FRAME_SIZE_MASK); 444 445 return BLMI_E_NONE; 446 } 447 448 449 /* 450 * Function: 451 * xmac_mac_pause_frame_fwd 452 * Purpose: 453 * Enable/Disable Pause Frame Forward 454 * Parameters: 455 * mmc - mac driver control 456 * dev_port - Port number 457 * pause_fwd - 1 - Forward Pause enable 458 * 0 - Consume Pause 459 * Notes: 460 */ 461 int 462 phy_xmac_mac_pause_frame_fwd(phy_mac_ctrl_t *mmc, int dev_port, 463 int pause_fwd) 464 { 465 uint64 rxctrl_reg; 466 int pass_mac_cntl; 467 int rv = BLMI_E_NONE; 468 buint32_t tmp_val[2]; 469 470 if(pause_fwd) { 471 pass_mac_cntl = 1; 472 } else { 473 pass_mac_cntl = 0; 474 } 475 476 BLMI_E_IF_ERROR_RETURN( 477 XMAC_READ_RXCTRL_REG(mmc, dev_port, &rxctrl_reg)); 478 479 XMAC_64_HI_SET(rxctrl_reg, 0); 480 XMAC_64_LO_SET(rxctrl_reg, 481 COMPILER_64_LO(rxctrl_reg) & ~(XMAC_RX_CTRL_PASS_MAC_CNTL_MASK)); 482 483 XMAC_64_LO_SET(rxctrl_reg, 484 COMPILER_64_LO(rxctrl_reg) | 485 (pass_mac_cntl << XMAC_RX_CTRL_PASS_MAC_CNTL_SHIFT)); 486 487 BLMI_E_IF_ERROR_RETURN( 488 XMAC_WRITE_RXCTRL_REG(mmc, dev_port, rxctrl_reg)); 489 490 return rv; 491 } 492 493 494 /* 495 * Function: 496 * xmac_mac_pause_set 497 * Purpose: 498 * Set pause of the MAC 499 * Parameters: 500 * mmc - mac driver control 501 * dev_port - Port number 502 * pause - 1 - Pause enable 503 * 0 - Pause disable 504 * Notes: 505 */ 506 int 507 phy_xmac_mac_pause_set(phy_mac_ctrl_t *mmc, int dev_port, int pause) 508 { 509 uint64 pause_reg ; 510 int tx_pause_en, rx_pause_en; 511 int rv = BLMI_E_NONE; 512 buint32_t tmp_val[2]; 513 514 if(pause == 1) { 515 tx_pause_en = 1; 516 rx_pause_en = 1; 517 } else { 518 tx_pause_en = 0; 519 rx_pause_en = 0; 520 } 521 522 BLMI_E_IF_ERROR_RETURN( 523 XMAC_READ_PAUSE_CTRL_REG(mmc, dev_port, &pause_reg)); 524 XMAC_64_HI_SET(pause_reg, 0); 525 XMAC_64_LO_SET(pause_reg, 526 COMPILER_64_LO(pause_reg) & ~(XMAC_TX_EN_PAUSE_MASK | 527 XMAC_RX_EN_PAUSE_MASK)); 528 XMAC_64_LO_SET(pause_reg, 529 COMPILER_64_LO(pause_reg) | 530 (tx_pause_en << XMAC_TX_EN_PAUSE_SHIFT)); 531 XMAC_64_LO_SET(pause_reg, 532 COMPILER_64_LO(pause_reg) | 533 (rx_pause_en << XMAC_RX_EN_PAUSE_SHIFT)); 534 BLMI_E_IF_ERROR_RETURN( 535 XMAC_WRITE_PAUSE_CTRL_REG(mmc, dev_port, pause_reg)); 536 537 return rv; 538 } 539 540 /* 541 * Function: 542 * xmac_mac_speed_set 543 * Purpose: 544 * Set Speed of the MAC 545 * Parameters: 546 * mmc - mac driver control 547 * dev_port - Port number 548 * speed - 10000 - 10Gbps 549 * 1000 - 1000Mbps 550 * 100 - 100Mbps 551 * 10 - 10Mbps 552 * Notes: 553 */ 554 int 555 phy_xmac_mac_speed_set(phy_mac_ctrl_t *mmc, int dev_port, int speed) 556 { 557 558 switch (speed) { 559 case 0: /* No change */ 560 case 10000: 561 break; 562 default: 563 return (BLMI_E_CONFIG); 564 } 565 566 return BLMI_E_NONE; 567 } 568 569 /* 570 * Function: 571 * xmac_mac_speed_get 572 * Purpose: 573 * Get Speed of the MAC 574 * Parameters: 575 * mmc - mac driver control 576 * dev_port - Port number 577 * speed - 10000 - 10Gbps 578 * Notes: 579 */ 580 int 581 phy_xmac_mac_speed_get(phy_mac_ctrl_t *mmc, int dev_port, int *speed) 582 { 583 *speed = 10000; 584 return BLMI_E_NONE; 585 } 586 587 588 /* 589 * Function: 590 * xmac_mac_duplex_set 591 * Purpose: 592 * Set Duplex of the MAC 593 * Parameters: 594 * mmc - mac driver control 595 * dev_port - Port number 596 * duplex - 1 - Full Duplex 597 * 0 - Half Duplex 598 * Notes: 599 */ 600 int 601 phy_xmac_mac_duplex_set(phy_mac_ctrl_t *mmc, int dev_port, int duplex) 602 { 603 /* XMAC always in full duplex mode */ 604 return BLMI_E_NONE; 605 } 606 607 /* 608 * Function: 609 * xmac_mac_duplex_get 610 * Purpose: 611 * Get Duplex setting of the MAC 612 * Parameters: 613 * mmc - mac driver control 614 * dev_port - Port number 615 * duplex - (OUT) 1 - Full Duplex 616 * 0 - Half Duplex 617 * Notes: 618 */ 619 int 620 phy_xmac_mac_duplex_get(phy_mac_ctrl_t *mmc, int dev_port, int *duplex) 621 { 622 /* XMAC always in full duplex mode */ 623 *duplex = 1; 624 return BLMI_E_NONE; 625 } 626 627 /* 628 * Function: 629 * xmac_mac_auto_cfg_set 630 * Purpose: 631 * Set Auto mode configuration. 632 * Parameters: 633 * mmc - mac driver control 634 * dev_port - Port number 635 * enable - 1 - Enable Auto mode 636 * 0 - Disable Auto Mode 637 * Notes: 638 */ 639 int 640 phy_xmac_mac_auto_cfg_set(phy_mac_ctrl_t *mmc, int dev_port, int enable) 641 { 642 /* No auto mode configuration in XMAC */ 643 return BLMI_E_NONE; 644 } 645 646 phy_mac_drv_t phy_xmac_drv = { 647 phy_xmac_mac_init, 648 phy_xmac_mac_reset, 649 NULL, 650 phy_xmac_mac_enable_set, 651 phy_xmac_mac_enable_get, 652 phy_xmac_mac_speed_set, 653 phy_xmac_mac_speed_get, 654 phy_xmac_mac_duplex_set, 655 phy_xmac_mac_duplex_get, 656 phy_xmac_mac_update_ipg, 657 phy_xmac_mac_max_frame_set, 658 phy_xmac_mac_max_frame_get, 659 phy_xmac_mac_pause_set, 660 NULL, 661 phy_xmac_mac_pause_frame_fwd, 662 }; 663 664 #endif /* defined(INCLUDE_FCMAP) || defined (INCLUDE_MACSEC) */