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phy_mac_ctrl.h (10998B)


      1 /*
      2  * 
      3  *
      4  * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file.
      5  * 
      6  * Copyright 2007-2019 Broadcom Inc. All rights reserved.
      7  */
      8 
      9 #ifndef PHY_MAC_CTRL_H
     10 #define PHY_MAC_CTRL_H
     11 
     12 #include <sal/types.h>
     13 #include <sal/core/spl.h>
     14 #include <sal/core/libc.h>
     15 #ifdef INCLUDE_PLP_IMACSEC
     16 #include "bcm_imacsec.h"
     17 #endif
     18 
     19 #if  !defined(INCLUDE_MACSEC)  &&  !defined(INCLUDE_FCMAP)
     20 
     21 typedef uint32   blmi_dev_addr_t;
     22 
     23 /*
     24  * MACSEC I/O operation type identifier.
     25  */
     26 typedef enum {
     27     BLMI_IO_REG_RD,   /* Register Read    */
     28     BLMI_IO_REG_WR,   /* Register Write   */
     29     BLMI_IO_TBL_RD,   /* Table Read       */
     30     BLMI_IO_TBL_WR    /* Table Write      */
     31 } blmi_io_op_t;
     32 
     33 typedef int (*blmi_dev_io_f)(  uint32 unit,      /* Switch unit  */
     34                                int port,         /* Switch port */
     35                                blmi_io_op_t op,  /* I/O operation   */
     36                                uint32 io_addr,   /* I/O address     */
     37                                int word_sz,      /* Word size       */
     38                                int num_entry,    /* Num entry       */
     39                                uint32 *data);    /* Data buffer     */
     40 
     41 typedef enum {
     42     BLMI_E_NONE        =  0,
     43     BLMI_E_INTERNAL    = -1,
     44     BLMI_E_MEMORY      = -2,
     45     BLMI_E_PARAM       = -3,
     46     BLMI_E_EMPTY       = -4,
     47     BLMI_E_FULL        = -5,
     48     BLMI_E_NOT_FOUND   = -6,
     49     BLMI_E_EXISTS      = -7,
     50     BLMI_E_TIMEOUT     = -8,
     51     BLMI_E_FAIL        = -9,
     52     BLMI_E_DISABLED    = -10,
     53     BLMI_E_BADID       = -11,
     54     BLMI_E_RESOURCE    = -12,
     55     BLMI_E_CONFIG      = -13,
     56     BLMI_E_UNAVAIL     = -14,
     57     BLMI_E_INIT        = -15,
     58     BLMI_E_PORT        = -16,
     59     BLMI_E_UNKNOWN     = -17
     60 } blmi_error_t;
     61 
     62 
     63 #else
     64 #include <blmi_io.h>
     65 #endif
     66 
     67 #if  !defined(INCLUDE_MACSEC)
     68 
     69 typedef enum {
     70     BMACSEC_E_NONE      =  0,
     71     BMACSEC_E_INTERNAL      = -1,
     72     BMACSEC_E_MEMORY        = -2,
     73     BMACSEC_E_PARAM     = -3,
     74     BMACSEC_E_EMPTY             = -4,
     75     BMACSEC_E_FULL      = -5,
     76     BMACSEC_E_NOT_FOUND     = -6,
     77     BMACSEC_E_EXISTS        = -7,
     78     BMACSEC_E_TIMEOUT       = -8,
     79     BMACSEC_E_FAIL      = -9,
     80     BMACSEC_E_DISABLED      = -10,
     81     BMACSEC_E_BADID     = -11,
     82     BMACSEC_E_RESOURCE      = -12,
     83     BMACSEC_E_CONFIG        = -13,
     84     BMACSEC_E_UNAVAIL       = -14,
     85     BMACSEC_E_INIT      = -15,
     86     BMACSEC_E_PORT      = -16,
     87     BMACSEC_E_UNKNOWN           = -17
     88 } bmacsec_error_t;
     89 #else
     90 #include <bmacsec_err.h>
     91 #endif
     92 #ifndef BMACSEC_E_UNAVAIL
     93 #define BMACSEC_E_UNAVAIL  BLMI_E_UNAVAIL
     94 #endif
     95 
     96 #ifndef BMACSEC_E_PARAM
     97 #define BMACSEC_E_PARAM    BLMI_E_PARAM
     98 #endif
     99 
    100 typedef enum {
    101     PHY_MAC_SD_LINE    = 0,
    102     PHY_MAC_SD_SWITCH  = 1
    103 } phy_mac_side_e;
    104 
    105 #define PHY_UNIMAC_V2_SIDE_MASK   (1 << PHY_UNIMAC_V2_SIDE_SHIFT)
    106 #define PHY_UNIMAC_V2_SIDE_SHIFT  (15)
    107 
    108 #define PHY_UNIMAC_V2_LINE_PORT(p)  (p)
    109 
    110 #define PHY_UNIMAC_V2_SWITCH_PORT(p)\
    111 ((p) |  (1 << PHY_UNIMAC_V2_SIDE_SHIFT))
    112 
    113 #define PHY_UNIMAC_V2_GET_SIDE(p)\
    114 (((p) & (PHY_UNIMAC_V2_SIDE_MASK)) >> PHY_UNIMAC_V2_SIDE_SHIFT)
    115 
    116 #define PHY_UNIMAC_V2_GET_PORT(p)\
    117 ((p) & ~(PHY_UNIMAC_V2_SIDE_MASK))
    118 #ifdef INCLUDE_PLP_IMACSEC
    119 #define IMACSEC_DES_PTR_GET(_pc)\
    120 ((bcm_plp_base_t_sec_phy_access_t *)(((char *)((_pc) + 1) + (_pc)->size) - sizeof(bcm_plp_base_t_sec_phy_access_t)))
    121 #endif
    122 struct phy_mac_ctrl_s;
    123 struct phy_mac_duplex_gateway_s;
    124 /*
    125  * MAC Driver Function prototypes
    126  */
    127 typedef int (*mac_init)(struct phy_mac_ctrl_s*, int);
    128 typedef int (*mac_reset)(struct phy_mac_ctrl_s*, int, int);
    129 typedef int (*mac_auto_cfg_set)(struct phy_mac_ctrl_s*, int, int);
    130 typedef int (*mac_enable_set)(struct phy_mac_ctrl_s*, int, int);
    131 typedef int (*mac_enable_get)(struct phy_mac_ctrl_s*, int, int *);
    132 typedef int (*mac_speed_set)(struct phy_mac_ctrl_s*, int, int);
    133 typedef int (*mac_speed_get)(struct phy_mac_ctrl_s*, int, int *);
    134 typedef int (*mac_duplex_set)(struct phy_mac_ctrl_s*, int, int);
    135 typedef int (*mac_duplex_get)(struct phy_mac_ctrl_s*, int, int *);
    136 typedef int (*mac_ipg_set)(struct phy_mac_ctrl_s*, int, int);
    137 typedef int (*mac_max_frame_set)(struct phy_mac_ctrl_s*, int, uint32);
    138 typedef int (*mac_max_frame_get)(struct phy_mac_ctrl_s*, int, uint32*);
    139 typedef int (*mac_pause_set)(struct phy_mac_ctrl_s*, int, int);
    140 typedef int (*mac_pause_get)(struct phy_mac_ctrl_s*, int, int*);
    141 typedef int (*mac_pause_frame_fwd_set)(struct phy_mac_ctrl_s*, int, int);
    142 typedef int (*mac_pause_frame_fwd_get)(struct phy_mac_ctrl_s*, int, int*);
    143 typedef int (*mac_duplex_gateway_set)(struct phy_mac_ctrl_s*,
    144                                       struct phy_mac_duplex_gateway_s*);
    145 typedef int (*mac_frame_len_check_enable)(struct phy_mac_ctrl_s*, int, int);
    146 
    147 typedef int (*mac_rx_enable_set)(struct phy_mac_ctrl_s*, int, int);
    148 typedef int (*mac_tx_enable_set)(struct phy_mac_ctrl_s*, int, int);
    149 typedef int (*mac_tx_datapath_flush)(struct phy_mac_ctrl_s*, int, int);
    150 
    151 typedef struct phy_mac_drv_s {
    152     mac_init                   f_mac_init;
    153     mac_reset                  f_mac_reset;
    154     mac_auto_cfg_set           f_mac_auto_config_set;
    155     mac_enable_set             f_mac_enable_set;
    156     mac_enable_get             f_mac_enable_get;
    157     mac_speed_set              f_mac_speed_set;
    158     mac_speed_get              f_mac_speed_get;
    159     mac_duplex_set             f_mac_duplex_set;
    160     mac_duplex_get             f_mac_duplex_get;
    161     mac_ipg_set                f_mac_ipg_set;
    162     mac_max_frame_set          f_mac_max_frame_set;
    163     mac_max_frame_get          f_mac_max_frame_get;
    164     mac_pause_set              f_mac_pause_set;
    165     mac_pause_get              f_mac_pause_get;
    166     mac_pause_frame_fwd_set    f_mac_pause_frame_fwd_set;
    167     mac_pause_frame_fwd_get    f_mac_pause_frame_fwd_get;
    168     mac_duplex_gateway_set     f_mac_duplex_gateway_set;
    169     mac_frame_len_check_enable f_mac_frame_len_check_enable;
    170     mac_rx_enable_set          f_mac_rx_enable_set;
    171     mac_tx_enable_set          f_mac_tx_enable_set;
    172     mac_tx_datapath_flush      f_mac_tx_datapath_flush;
    173 } phy_mac_drv_t;
    174 
    175 typedef struct phy_mac_ctrl_s {
    176     /* Device address for the MMI */
    177     blmi_dev_addr_t  dev_addr;
    178 
    179     /* MAC driver */
    180     phy_mac_drv_t   mac_drv;
    181 
    182     /* MAC IO handler for MMI */
    183     blmi_dev_io_f    devio_f;
    184 
    185     /* Config flag */
    186     uint32 flag;
    187 #define PHY_MAC_CTRL_FLAG_PHY_FIX_LATENCY_EN  (1<<0)
    188 #define PHY_MAC_CTRL_FLAG_XMAC_V2                (1<<1)
    189 #define PHY_MAC_CTRL_FLAG_UNIMAC_V2              (1<<2)
    190 
    191     /* Switch Unit */
    192     uint32 unit;
    193 
    194 } phy_mac_ctrl_t;
    195 typedef enum phy_mac_duplex_e {
    196     PHY_MAC_HALF_DUPLEX = 0,
    197     PHY_MAC_FULL_DUPLEX
    198 }phy_mac_duplex_t;
    199 typedef struct phy_mac_duplex_gateway_s {
    200     int  lport, sport;
    201     int  speed, duplex;
    202     int  ipg  , max_frame;
    203 } phy_mac_duplex_gateway_t;
    204 /*
    205  * Switch MAC speed and duplex policies
    206  */
    207 typedef enum phy_mac_policy_s {
    208     PHY_MAC_SWITCH_FIXED = 0,
    209     PHY_MAC_SWITCH_FOLLOWS_LINE,
    210     PHY_MAC_SWITCH_DUPLEX_GATEWAY
    211 }phy_mac_policy_t;
    212 #define BMACSEC_MAC_REG_FIELD_SET(_d, _v, _mask, _shift)    \
    213             do { (_d) &= ~(_mask);  (_d) |= ((_v) << (_shift)); } while(0)
    214 
    215 #define BMACSEC_MAC_DRV_FN(mmc,_mf)   (mmc)->mac_drv._mf
    216 
    217 #define _MAC_DRV_CALL(mmc, _mf, _ma)                             \
    218         (mmc == NULL ? BMACSEC_E_PARAM :                         \
    219          (BMACSEC_MAC_DRV_FN(mmc,_mf) == NULL ?                  \
    220          BMACSEC_E_UNAVAIL : BMACSEC_MAC_DRV_FN(mmc,_mf) _ma))
    221 
    222 #define BMACSEC_MAC_INIT(mmc, _p) \
    223         _MAC_DRV_CALL((mmc), f_mac_init, ((mmc), (_p)))
    224 #define BMACSEC_MAC_RESET(mmc, _p , _r) \
    225         _MAC_DRV_CALL((mmc), f_mac_reset, ((mmc), (_p), (_r)))
    226 #define BMACSEC_MAC_AUTO_CONFIG_SET(mmc, _p, _v) \
    227         _MAC_DRV_CALL((mmc), f_mac_auto_config_set, ((mmc), (_p), (_v)))
    228 
    229 #define BMACSEC_MAC_ENABLE_SET(mmc, _p, _e) \
    230         _MAC_DRV_CALL((mmc), f_mac_enable_set, ((mmc), (_p), (_e)))
    231 #define BMACSEC_MAC_ENABLE_GET(mmc, _p, _e) \
    232         _MAC_DRV_CALL((mmc), f_mac_enable_get, ((mmc), (_p), (_e)))
    233 
    234 #define BMACSEC_MAC_SPEED_SET(mmc, _p, _s) \
    235         _MAC_DRV_CALL((mmc), f_mac_speed_set, ((mmc), (_p), (_s)))
    236 
    237 #define BMACSEC_MAC_SPEED_GET(mmc, _p,_s) \
    238         _MAC_DRV_CALL((mmc), f_mac_speed_get, ((mmc), (_p), (_s)))
    239 
    240 #define BMACSEC_MAC_DUPLEX_SET(mmc, _p, _d) \
    241         _MAC_DRV_CALL((mmc), f_mac_duplex_set, ((mmc), (_p), (_d)))
    242 
    243 #define BMACSEC_MAC_DUPLEX_GET(mmc, _p,_d) \
    244         _MAC_DRV_CALL((mmc), f_mac_duplex_get, ((mmc), (_p), (_d)))
    245 
    246 #define BMACSEC_MAC_IPG_SET(mmc, _p, _ipg) \
    247         _MAC_DRV_CALL((mmc), f_mac_ipg_set, ((mmc), (_p), (_ipg)))
    248 
    249 #define BMACSEC_MAC_IPG_GET(mmc, _p) \
    250         _MAC_DRV_CALL((mmc), f_mac_ipg_get, ((mmc), (_p)))
    251 
    252 #define BMACSEC_MAC_MAX_FRAME_SET(mmc, _p, _max) \
    253         _MAC_DRV_CALL((mmc), f_mac_max_frame_set, ((mmc), (_p), (_max)))
    254 
    255 #define BMACSEC_MAC_MAX_FRAME_GET(mmc, _p,_max) \
    256         _MAC_DRV_CALL((mmc), f_mac_max_frame_get, ((mmc), (_p),(_max)))
    257 
    258 #define BMACSEC_MAC_PAUSE_SET(mmc, _p, _v) \
    259         _MAC_DRV_CALL((mmc), f_mac_pause_set, ((mmc), (_p), (_v)))
    260 
    261 #define BMACSEC_MAC_PAUSE_GET(mmc, _p,_v) \
    262         _MAC_DRV_CALL((mmc), f_mac_pause_get, ((mmc), (_p),(_v)))
    263 
    264 #define BMACSEC_MAC_PAUSE_FRAME_FWD_SET(mmc, _p, _v) \
    265         _MAC_DRV_CALL((mmc), f_mac_pause_frame_fwd_set, ((mmc), (_p), (_v)))
    266 #define BMACSEC_MAC_PAUSE_FRAME_FWD_GET(mmc, _p, _v) \
    267         _MAC_DRV_CALL((mmc), f_mac_pause_frame_fwd_get, ((mmc), (_p), (_v)))
    268 #define BMACSEC_MAC_DUPLEX_GATEWAY(mmc, _v) \
    269         _MAC_DRV_CALL((mmc), f_mac_duplex_gateway_set, ((mmc), (_v)))
    270 #define BMACSEC_MAC_FRAME_LEN_CHECK_ENABLE(mmc, _p, _e) \
    271         _MAC_DRV_CALL((mmc), f_mac_frame_len_check_enable, ((mmc), (_p), (_e)))
    272 #define BMACSEC_MAC_RX_ENABLE_SET(mmc, _p, _e) \
    273         _MAC_DRV_CALL((mmc), f_mac_rx_enable_set, ((mmc), (_p), (_e)))
    274 #define BMACSEC_MAC_TX_ENABLE_SET(mmc, _p, _e) \
    275         _MAC_DRV_CALL((mmc), f_mac_tx_enable_set, ((mmc), (_p), (_e)))
    276 #define BMACSEC_MAC_TX_DATAPATH_FLUSH(mmc, _p, _e)   \
    277         _MAC_DRV_CALL((mmc), f_mac_tx_datapath_flush, ((mmc), (_p), (_e)))
    278 
    279 /*
    280  * MAC driver types.
    281  */
    282 typedef enum {
    283     PHY_MAC_CORE_UNKNOWN    = 0,
    284     PHY_MAC_CORE_UNIMAC,
    285     PHY_MAC_CORE_BIGMAC,
    286     PHY_MAC_CORE_XMAC
    287 } phy_mactype_t;
    288 
    289 /*
    290  * Allocate mac control block and attach the MAC driver.
    291  */
    292 phy_mac_ctrl_t*
    293 phy_mac_driver_attach(blmi_dev_addr_t dev_addr,
    294                          phy_mactype_t mac_type,
    295                          blmi_dev_io_f mmi_cbf);
    296 
    297 int phy_mac_driver_detach(phy_mac_ctrl_t *mmc);
    298 
    299 void
    300 phy_mac_driver_config(phy_mac_ctrl_t *mmc,
    301                          phy_mactype_t  mac_type,
    302                          uint32 flag);
    303 
    304 void
    305 phy_mac_driver_unit_set(phy_mac_ctrl_t *mmc,
    306                          phy_mactype_t  mac_type,
    307                          uint32 unit);
    308 #ifdef INCLUDE_PLP_IMACSEC
    309 int
    310 phy_unimac_switch_side_set_params(int unit, soc_port_t port,
    311                           phy_mac_policy_t switch_side_policy,
    312                           int speed, int duplex, int pause_enable);
    313 #endif
    314 
    315 #endif /* PHY_MAC_CTRL_H */
    316