phy_mac_ctrl.c (6430B)
1 /* 2 * 3 * 4 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 5 * 6 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 7 */ 8 9 int phy_mac_not_empty; 10 #if defined(INCLUDE_FCMAP) || defined(INCLUDE_MACSEC) || defined(INCLUDE_PLP_IMACSEC) 11 #include <sal/types.h> 12 #include <sal/core/alloc.h> 13 #include <sal/core/spl.h> 14 #include <sal/core/libc.h> 15 16 #include "phy_mac_ctrl.h" 17 18 extern phy_mac_drv_t phy_unimac_drv; 19 #if 0 20 extern phy_mac_drv_t phy_bigmac_drv; 21 #endif 22 extern phy_mac_drv_t phy_xmac_drv; 23 24 /* 25 * Allocate mac control block and attach the MAC driver. 26 */ 27 phy_mac_ctrl_t* 28 phy_mac_driver_attach(blmi_dev_addr_t dev_addr, 29 phy_mactype_t mac_type, 30 blmi_dev_io_f mmi_cbf) 31 { 32 phy_mac_ctrl_t *mmc; 33 34 mmc = sal_alloc(sizeof(phy_mac_ctrl_t), 35 "bmac_driver"); 36 if (mmc == NULL) { 37 return NULL; 38 } 39 40 if (mac_type == PHY_MAC_CORE_UNIMAC) { 41 sal_memcpy(&mmc->mac_drv, &phy_unimac_drv, sizeof(phy_mac_drv_t)); 42 #if 0 43 } else if (mac_type == PHY_MAC_CORE_BIGMAC) { 44 sal_memcpy(&mmc->mac_drv, &phy_bigmac_drv, sizeof(phy_mac_drv_t)); 45 #endif 46 #if defined(INCLUDE_FCMAP) || defined(INCLUDE_MACSEC) 47 } else if (mac_type == PHY_MAC_CORE_XMAC) { 48 sal_memcpy(&mmc->mac_drv, &phy_xmac_drv, sizeof(phy_mac_drv_t)); 49 #endif 50 } else { 51 sal_free(mmc); 52 mmc = NULL; 53 } 54 55 if (mmc) { 56 mmc->devio_f = mmi_cbf; 57 mmc->dev_addr = dev_addr; 58 mmc->flag = 0; 59 mmc->unit = 0; 60 } 61 62 return mmc; 63 } 64 65 int phy_mac_driver_detach(phy_mac_ctrl_t *mmc) 66 { 67 sal_free(mmc); 68 return 0; 69 } 70 71 72 /* 73 * Set config flag for the mac driver init 74 */ 75 void 76 phy_mac_driver_config(phy_mac_ctrl_t *mmc, 77 phy_mactype_t mac_type, 78 uint32 flag) 79 { 80 if (mmc == NULL) { 81 return; 82 } 83 84 mmc->flag = flag; 85 return; 86 } 87 88 /* 89 * Set config flag for the mac driver init 90 */ 91 void 92 phy_mac_driver_unit_set(phy_mac_ctrl_t *mmc, 93 phy_mactype_t mac_type, 94 uint32 unit) 95 { 96 if (mmc == NULL) { 97 return; 98 } 99 100 mmc->unit = unit; 101 return; 102 } 103 #ifdef INCLUDE_PLP_IMACSEC 104 105 /* 106 * Frame Length 107 */ 108 #define PHY_UNIMAC_REG_DUPLEX_GATEWAY_MAX_FRAME_SIZE 0x0003fe4 109 110 111 /* DEFAULT IPG */ 112 #define PHY_UNIMAC_REG_DEFAULT_IPG 12 113 #define BMACSEC_E_SUCCESS(rv) ((rv) >= 0) 114 #define BMACSEC_E_FAILURE(rv) ((rv) < 0) 115 /* 116 * Function: 117 * phy_unimac_duplex_gateway_set 118 * Purpose: 119 * To set the Duplex Gateway mode for MACSEC PHY's line/switch side MAC. 120 * Parameters: 121 * phy_id - PHY's device address 122 * Returns: 123 */ 124 int 125 phy_unimac_duplex_gateway_set(phy_mac_ctrl_t *mac_ctrl, 126 int dev_port, int speed, int duplex) 127 { 128 int rv=0; 129 phy_mac_duplex_gateway_t dgw; 130 131 dgw.lport = PHY_UNIMAC_V2_LINE_PORT(dev_port); 132 dgw.sport = PHY_UNIMAC_V2_SWITCH_PORT(dev_port); 133 dgw.max_frame = PHY_UNIMAC_REG_DUPLEX_GATEWAY_MAX_FRAME_SIZE; 134 dgw.ipg = PHY_UNIMAC_REG_DEFAULT_IPG; 135 dgw.speed = speed; 136 dgw.duplex = duplex; 137 138 rv = BMACSEC_MAC_DUPLEX_GATEWAY(mac_ctrl, &dgw); 139 140 return rv; 141 } 142 143 /* 144 * Function: 145 * phy_unimac_switch_side_set_params 146 * Purpose: 147 * To set Switch side speed, duplex and pause parameters 148 * Parameters: 149 * phy_id - PHY's device address 150 * port_mode - Port in Copper or Fiber mode 151 * switch_side_policy - PHY_MAC_SWITCH_FIXED 152 * ( Switch side is in fixed mode, and the speed 153 * duplex and pause settings are provided by the 154 * caller ). 155 * - PHY_MAC_SWITCH_FOLLOWS_LINE 156 * ( Switch side follows line side operating 157 * parameters. Autoconfig mode ). 158 * - PHY_MAC_SWITCH_DUPLEX_GATEWAY 159 * ( half-duplex on Line-side MAC, and 160 * full-duplex on switch-side MAC ) 161 * speed - Speed to set 162 * 10 = 10Mbps 163 * 100 = 100Mbps 164 * 1000 = 1000Mbps 165 * duplex - Half Duplex = BMACSEC_HALF_DUPLEX 166 * - Full Duplex = BMACSEC_FULL_DUPLEX 167 * pause_enable - 1 = enables pause 168 * - 0 = disables pause. 169 * Returns: 170 */ 171 int 172 phy_unimac_switch_side_set_params(int unit, soc_port_t port, 173 phy_mac_policy_t switch_side_policy, 174 int speed, int duplex, int pause_enable) 175 { 176 int rv = BMACSEC_E_NONE; 177 phy_ctrl_t *pc; 178 soc_port_t port_s; 179 bcm_plp_base_t_sec_phy_access_t *phy_info; 180 EXT_PHY_INIT_CHECK(unit,port); 181 pc = EXT_PHY_SW_STATE(unit, port); 182 phy_info = IMACSEC_DES_PTR_GET(pc); 183 port_s =PHY_UNIMAC_V2_SWITCH_PORT(port); 184 185 switch ( switch_side_policy ) { 186 case PHY_MAC_SWITCH_FIXED : 187 /* Disable MAC Auto config */ 188 rv = BMACSEC_MAC_AUTO_CONFIG_SET(phy_info->unimac, port_s, 0); 189 if (!BMACSEC_E_SUCCESS(rv)) { 190 return BMACSEC_E_FAIL; 191 } 192 /* Set MAC Speed */ 193 rv = BMACSEC_MAC_SPEED_SET(phy_info->unimac, port_s, speed); 194 if (!BMACSEC_E_SUCCESS(rv)) { 195 return BMACSEC_E_FAIL; 196 } 197 /* Set MAC Duplex */ 198 rv = BMACSEC_MAC_DUPLEX_SET(phy_info->unimac, port_s, duplex); 199 if (!BMACSEC_E_SUCCESS(rv)) { 200 return BMACSEC_E_FAIL; 201 } 202 /* Set Pause settings */ 203 rv = BMACSEC_MAC_PAUSE_SET(phy_info->unimac, port_s, pause_enable); 204 if (!BMACSEC_E_SUCCESS(rv)) { 205 return BMACSEC_E_FAIL; 206 } 207 break; 208 209 case PHY_MAC_SWITCH_FOLLOWS_LINE : 210 /* Put Switch side MAC in auto config */ 211 rv = BMACSEC_MAC_AUTO_CONFIG_SET(phy_info->unimac, port_s, 1); 212 if (!BMACSEC_E_SUCCESS(rv)) { 213 return BMACSEC_E_FAIL; 214 } 215 break; 216 217 case PHY_MAC_SWITCH_DUPLEX_GATEWAY : 218 rv = phy_unimac_duplex_gateway_set(phy_info->unimac, 219 port, speed, duplex); 220 break; 221 222 default : 223 return BMACSEC_E_CONFIG; 224 } 225 226 return BMACSEC_E_NONE; 227 } 228 #endif 229 #endif /* defined(INCLUDE_FCMAP) || defined (INCLUDE_MACSEC) || defined(INCLUDE_PLP_IMACSEC) */