phy8806x_ctr.c (31370B)
1 /******************************************************************************* 2 * 3 * 4 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 5 * 6 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 7 */ 8 9 #include <shared/bsl.h> 10 #include <sal/core/libc.h> 11 #include <sal/types.h> 12 #include <soc/error.h> 13 #include <soc/drv.h> 14 #include <bcm/error.h> 15 #include <bcm/rx.h> 16 #include <bcm/field.h> 17 #include <bcm/udf.h> 18 #include <soc/phy/phyctrl.h> 19 20 #if defined(INCLUDE_PHY_8806X) 21 22 #include "phy8806x_funcs.h" 23 #include "phy8806x_ctr.h" 24 #include "../../../libs/phymod/chip/phy8806x/phy8806x_xmod_api.h" 25 26 extern bcm_rx_t ctr_rx_callback(int unit, bcm_pkt_t *info, void *cookie); 27 extern int inband_ctr_intercept(int unit); 28 extern uint8 * phy8806x_eth_ctr_get(phy_ctrl_t *pc); 29 extern void phy8806x_led_tx_set(phy_ctrl_t *pc, uint8 val); 30 extern void phy8806x_led_rx_set(phy_ctrl_t *pc, uint8 val); 31 #ifdef INCLUDE_FCMAP 32 extern int bcm_common_fcmap_private_data_set(int unit, bcm_port_t port, uint8 *data, int len); 33 #endif 34 extern int 35 phy_8806x_xmod_command(int unit, int port, int mode_opcode, uint32 arg[], int arg_size, uint32 result[], int result_size); 36 extern int phy_is_8806x(int unit, phy_ctrl_t *pc); 37 extern void format_uint64_decimal(char *buf, uint64 n, int comma); 38 39 typedef uint32 bcm_field_udf_t; 40 41 /* #define USE_UDF_RULE */ 42 43 #define MT2_CTR_PREV_OFF (256 * 8) 44 45 #if defined(COMPILER_HAS_LONGLONG) 46 /* Byte swap a 64 bit value */ 47 #define MT2SWAP64(val) \ 48 ((val) = ( \ 49 (((val) & 0x00000000000000ffULL) << 56) | \ 50 (((val) & 0x000000000000ff00ULL) << 40) | \ 51 (((val) & 0x0000000000ff0000ULL) << 24) | \ 52 (((val) & 0x00000000ff000000ULL) << 8) | \ 53 (((val) & 0x000000ff00000000ULL) >> 8) | \ 54 (((val) & 0x0000ff0000000000ULL) >> 24) | \ 55 (((val) & 0x00ff000000000000ULL) >> 40) | \ 56 (((val) & 0xff00000000000000ULL) >> 56) )) 57 #else 58 #define MT2SWAP64(val) \ 59 do { \ 60 u64_H(val) = ((u64_L(val) & 0x000000ff) << 24) | \ 61 ((u64_L(val) & 0x0000ff00) << 8) | \ 62 ((u64_L(val) & 0x00ff0000) >> 8) | \ 63 ((u64_L(val) & 0xff000000) >>24); \ 64 u64_L(val) = ((u64_H(val) & 0x000000ff) << 24) | \ 65 ((u64_H(val) & 0x0000ff00) << 8) | \ 66 ((u64_H(val) & 0x00ff0000) >> 8) | \ 67 ((u64_H(val) & 0xff000000) >>24); \ 68 } while (0) 69 #endif 70 71 int mt2_eth_ctr_save(phy_ctrl_t *pc, uint8 *sptr, int len) 72 { 73 int i, data_len; 74 uint32_t *dst32, *src32; 75 uint8 *dptr = phy8806x_eth_ctr_get(pc); 76 int tlv_cnt = (int)sptr[42]; 77 uint8 *pkt_data = (sptr + 44); /* 1st tlv */ 78 int tot_data_len = 0; 79 #ifdef BE_HOST 80 uint64_t *dptr64 = (uint64_t *) dptr; 81 uint64_t dat64; 82 #endif 83 mt2_eth_ctr_t *eth_ctr = (mt2_eth_ctr_t *)dptr; 84 uint64 prev_tpkt, prev_rpkt; 85 #ifdef INCLUDE_FCMAP 86 mt2_fc_ctr_t *fc_ctr = (mt2_fc_ctr_t *)dptr; 87 uint64 prev_fc_c2_txbyt, prev_fc_c3_txbyt, prev_fc_cf_txbyt; 88 uint64 prev_fc_c2_rxbyt, prev_fc_c3_rxbyt, prev_fc_cf_rxbyt; 89 #endif 90 uint8 tx_active,rx_active; 91 92 COMPILER_64_ZERO(prev_tpkt); 93 COMPILER_64_ZERO(prev_rpkt); 94 #ifdef INCLUDE_FCMAP 95 COMPILER_64_ZERO(prev_fc_c2_txbyt); 96 COMPILER_64_ZERO(prev_fc_c3_txbyt); 97 COMPILER_64_ZERO(prev_fc_cf_txbyt); 98 COMPILER_64_ZERO(prev_fc_c2_rxbyt); 99 COMPILER_64_ZERO(prev_fc_c3_rxbyt); 100 COMPILER_64_ZERO(prev_fc_cf_rxbyt); 101 #endif 102 103 #ifdef INCLUDE_FCMAP 104 if (pc->fcmap_enable){ 105 COMPILER_64_COPY(prev_fc_c2_txbyt, fc_ctr->fc_c2_txbyt); 106 COMPILER_64_COPY(prev_fc_c3_txbyt, fc_ctr->fc_c3_txbyt); 107 COMPILER_64_COPY(prev_fc_cf_txbyt, fc_ctr->fc_cf_txbyt); 108 COMPILER_64_COPY(prev_fc_c2_rxbyt, fc_ctr->fc_c2_rxbyt); 109 COMPILER_64_COPY(prev_fc_c3_rxbyt, fc_ctr->fc_c3_rxbyt); 110 COMPILER_64_COPY(prev_fc_cf_rxbyt, fc_ctr->fc_cf_rxbyt); 111 } else 112 #endif 113 { 114 COMPILER_64_COPY(prev_tpkt, eth_ctr->tpkt); 115 COMPILER_64_COPY(prev_rpkt, eth_ctr->rpkt); 116 } 117 118 for (i=0; i<tlv_cnt; i++) { 119 data_len = 0; 120 #ifdef INCLUDE_FCMAP 121 if ((pkt_data[0] == 0) && (pkt_data[1] == 1)) { /* fc mib */ 122 data_len = sizeof(mt2_fc_ctr_t); 123 /* Only Line side counters for now */ 124 } else 125 #endif 126 if ((pkt_data[0] == 0) && (pkt_data[1] == 3)) { /* eth mib */ 127 data_len = sizeof(mt2_eth_ctr_t) * 2; 128 /* Both Line & Sys side counters */ 129 } 130 pkt_data += 4; 131 132 dst32 = (uint32 *) dptr; 133 src32 = (uint32_t *) pkt_data; 134 for (i = 0; i < (data_len/4); i++) { 135 *dst32 = _shr_swap32(*src32); 136 dst32++; 137 src32++; 138 } 139 pkt_data += data_len; 140 tot_data_len += data_len; 141 dptr += data_len; 142 } 143 144 #if BE_HOST 145 for (i=0; i<(tot_data_len/8); i++) { 146 dat64 = *dptr64; 147 MT2SWAP64(dat64); 148 *dptr64 = dat64; 149 dptr64++; 150 } 151 #endif 152 153 /* Check Previous counter(s) and set flag */ 154 #ifdef INCLUDE_FCMAP 155 if (pc->fcmap_enable){ 156 tx_active = ( COMPILER_64_NE(prev_fc_c2_txbyt, fc_ctr->fc_c2_txbyt) || 157 COMPILER_64_NE(prev_fc_c3_txbyt, fc_ctr->fc_c3_txbyt) || 158 COMPILER_64_NE(prev_fc_cf_txbyt, fc_ctr->fc_cf_txbyt) ) 159 ? 1 : 0; 160 rx_active = ( COMPILER_64_NE(prev_fc_c2_rxbyt, fc_ctr->fc_c2_rxbyt) || 161 COMPILER_64_NE(prev_fc_c3_rxbyt, fc_ctr->fc_c3_rxbyt) || 162 COMPILER_64_NE(prev_fc_cf_rxbyt, fc_ctr->fc_cf_rxbyt) ) 163 ? 1 : 0; 164 } else 165 #endif 166 { 167 tx_active = COMPILER_64_NE(prev_tpkt, eth_ctr->tpkt) ? 1 : 0; 168 rx_active = COMPILER_64_NE(prev_rpkt, eth_ctr->rpkt) ? 1 : 0; 169 } 170 171 phy8806x_led_tx_set(pc, tx_active); 172 phy8806x_led_rx_set(pc, rx_active); 173 174 return SOC_E_NONE; 175 } 176 177 STATIC bcm_rx_t mt2_ctr_rx_callback(int unit, bcm_pkt_t *info, void *cookie) 178 { 179 uint8 *pkt_data; 180 int data_len; 181 phy_ctrl_t *pc; 182 #ifdef INCLUDE_FCMAP 183 int rv = 0; 184 #endif 185 186 pkt_data = BCM_PKT_DMAC(info); /* Pointer to Destination MAC */ 187 pkt_data += 12; 188 data_len = info->tot_len - 12; 189 190 if (BCM_PKT_TAG_PROTOCOL(info) == 0x8100) { 191 pkt_data += 4; 192 data_len -= 4; 193 } 194 195 if ((pkt_data[0] == 0x89) && (pkt_data[1] == 0x06) && (pkt_data[16] == 0xe4)) 196 { 197 pc = EXT_PHY_SW_STATE(info->rx_unit, info->rx_port); 198 if (pc == NULL) { 199 return BCM_RX_HANDLED; 200 } 201 mt2_eth_ctr_save(pc, pkt_data, data_len); 202 #ifdef INCLUDE_FCMAP 203 /* If Not Eth mibs, then also send it to fcmap driver to process */ 204 if (!((pkt_data[44] == 0) && (pkt_data[45] == 3))) { 205 pkt_data += 16 + 24; 206 data_len -= 16 + 24 + 4 + 4; /* 16 = FCoE, 24 = FC header, 4 = FC CRC, 4 = EOF + padding */ 207 /* cli_out("CTR packet from unit=%d port=%d pkt_len=%d tot_len=%d payload_len = %d\n", 208 info->rx_unit, info->rx_port, info->pkt_len, info->tot_len, data_len); 209 */ 210 if ((rv = bcm_common_fcmap_private_data_set(info->rx_unit, info->rx_port, pkt_data, data_len)) < 0) { 211 cli_out("u=%d p=%d call to bcm_common_fcmap_private_data_set() failed. rv = %d\n", 212 info->rx_unit, info->rx_port, rv); 213 } 214 } 215 #endif /* INCLUDE_FCMAP */ 216 return BCM_RX_HANDLED; 217 } 218 return BCM_RX_NOT_HANDLED; 219 } 220 221 222 STATIC int mt2_inband_ctr_intercept(int unit) 223 { 224 #ifndef USE_UDF_RULE 225 int qual_id; 226 bcm_field_qset_t qset; 227 bcm_field_group_t group; 228 bcm_field_entry_t entry; 229 bcm_field_action_t action; 230 bcm_field_data_qualifier_t data_qualifier; 231 bcm_field_data_packet_format_t packet_format; 232 uint8 data = 0xe4; 233 uint8 mask = 0xff; 234 int length = sizeof(data); 235 bcm_field_stat_t stat_entry = bcmFieldStatPackets; 236 int stat_id; 237 238 action = bcmFieldActionCopyToCpu; 239 BCM_FIELD_QSET_INIT(qset); 240 241 bcm_field_data_qualifier_t_init(&data_qualifier); 242 243 data_qualifier.offset_base = bcmFieldDataOffsetBaseFcoeHeader; 244 data_qualifier.offset = 14; 245 data_qualifier.length = 1; 246 247 BCM_IF_ERROR_RETURN( 248 bcm_field_data_qualifier_create(unit, &data_qualifier)); 249 qual_id = data_qualifier.qual_id; 250 251 252 bcm_field_data_packet_format_t_init(&packet_format); 253 254 packet_format.relative_offset = 0; 255 packet_format.l2 = BCM_FIELD_DATA_FORMAT_L2_ETH_II; 256 packet_format.vlan_tag = BCM_FIELD_DATA_FORMAT_VLAN_SINGLE_TAGGED; 257 packet_format.tunnel = BCM_FIELD_DATA_FORMAT_TUNNEL_NONE; 258 packet_format.fibre_chan_outer = BCM_FIELD_DATA_FORMAT_FIBRE_CHAN; 259 260 BCM_IF_ERROR_RETURN( 261 bcm_field_data_qualifier_packet_format_add(unit, qual_id, &packet_format)); 262 263 BCM_IF_ERROR_RETURN( 264 bcm_field_qset_data_qualifier_add(unit, &qset, qual_id)); 265 BCM_IF_ERROR_RETURN( 266 bcm_field_group_create(unit, qset, 1, &group)); 267 BCM_IF_ERROR_RETURN( 268 bcm_field_entry_create(unit, group, &entry)); 269 BCM_IF_ERROR_RETURN( 270 bcm_field_qualify_data(unit, entry, qual_id, &data, &mask, length)); 271 BCM_IF_ERROR_RETURN( 272 bcm_field_action_add(unit, entry, action, 0, 0)); 273 274 action = bcmFieldActionDrop; 275 BCM_IF_ERROR_RETURN( 276 bcm_field_action_add(unit, entry, action, 0, 0)); 277 BCM_IF_ERROR_RETURN( 278 bcm_field_stat_create(0, group, 1, &stat_entry, &stat_id)); 279 BCM_IF_ERROR_RETURN( 280 bcm_field_entry_stat_attach(0, entry, stat_id)); 281 cli_out("EID:%d STATID:%d\n", entry, stat_id); 282 BCM_IF_ERROR_RETURN( 283 bcm_field_entry_install(unit, entry)); 284 #else 285 int start_offset = 14; 286 int match_width = 1; 287 uint8 DATA[1]={0xe4}; 288 uint8 MASK[1]={0xff}; 289 bcm_udf_alloc_hints_t hints; 290 bcm_udf_t udf_info; 291 bcm_udf_id_t udf_id; 292 bcm_udf_pkt_format_info_t pkt_format; 293 bcm_udf_pkt_format_id_t pkt_format_id; 294 295 /* Allocate field group entry */ 296 bcm_field_qset_t qset; 297 bcm_field_group_t group; 298 bcm_field_entry_t entry; 299 int stat_id; 300 bcm_field_stat_t stat_arr[1]; 301 stat_arr[0] = bcmFieldStatPackets; 302 uint64 stat_value = 0; 303 304 /* Hints For UDF Allocation */ 305 bcm_udf_alloc_hints_t_init(&hints); 306 hints.flags |= BCM_UDF_CREATE_O_FIELD_INGRESS; 307 BCM_FIELD_QSET_INIT(hints.qset); 308 BCM_FIELD_QSET_ADD(hints.qset, bcmFieldQualifyStageIngress); 309 310 /* UDF Offset Allocation */ 311 bcm_udf_t_init(&udf_info); 312 udf_info.layer = bcmUdfLayerL3OuterHeader; 313 udf_info.start = (start_offset * 8); 314 udf_info.width = (match_width * 8); 315 316 317 BCM_IF_ERROR_RETURN( 318 bcm_udf_create(unit, &hints, &udf_info, &udf_id)); 319 320 /* UDF Packet Format */ 321 bcm_udf_pkt_format_info_t_init(&pkt_format); 322 323 pkt_format.l2 = BCM_PKT_FORMAT_L2_ETH_II; 324 pkt_format.vlan_tag = BCM_PKT_FORMAT_VLAN_TAG_SINGLE; 325 pkt_format.tunnel = BCM_PKT_FORMAT_TUNNEL_NONE; 326 pkt_format.fibre_chan_outer = BCM_PKT_FORMAT_FIBRE_CHAN; 327 328 BCM_IF_ERROR_RETURN( 329 bcm_udf_pkt_format_create(unit,BCM_UDF_PKT_FORMAT_CREATE_O_NONE,&pkt_format,&pkt_format_id)); 330 331 /* Adds packet format specification to the UDF object */ 332 BCM_IF_ERROR_RETURN( 333 bcm_udf_pkt_format_add(unit,udf_id,pkt_format_id)); 334 335 /* Configure data qualifier ID in the qset structure */ 336 BCM_FIELD_QSET_INIT(qset); 337 BCM_IF_ERROR_RETURN( 338 bcm_field_qset_id_multi_set(unit, bcmFieldQualifyUdf, 1, &udf_id, &qset)); 339 BCM_IF_ERROR_RETURN( 340 bcm_field_group_create_mode(unit, qset, 0, bcmFieldGroupModeAuto, &group)); 341 BCM_IF_ERROR_RETURN( 342 bcm_field_entry_create(unit, group, &entry)); 343 BCM_IF_ERROR_RETURN( 344 bcm_field_qualify_clear(unit, entry)); 345 BCM_IF_ERROR_RETURN( 346 bcm_field_qualify_udf(unit, entry, udf_id, match_width, DATA, MASK)); 347 BCM_IF_ERROR_RETURN( 348 bcm_field_action_add(unit, entry, bcmFieldActionCopyToCpu,0x0,0x0)); 349 BCM_IF_ERROR_RETURN( 350 bcm_field_stat_create(unit,group,1,stat_arr,&stat_id)); 351 352 BCM_IF_ERROR_RETURN( 353 bcm_field_entry_stat_attach(unit,entry,stat_id)); 354 BCM_IF_ERROR_RETURN( 355 bcm_field_entry_prio_set(unit,entry,BCM_FIELD_ENTRY_PRIO_HIGHEST)); 356 BCM_IF_ERROR_RETURN( 357 bcm_field_entry_install(unit,entry)); 358 359 cli_out("MT2 counters using UDF\n"); 360 361 BCM_IF_ERROR_RETURN( 362 bcm_field_stat_get(unit,stat_id,bcmFieldStatPackets,&stat_value)); 363 364 #endif 365 366 return BCM_E_NONE; 367 } 368 369 370 STATIC int mt2_ctr_rx_init(int unit) 371 { 372 int rv = SOC_E_NONE; 373 bcm_rx_cfg_t rx_cfg; 374 375 if ( !bcm_rx_active( unit ) ) { 376 /* Get current configuration */ 377 bcm_rx_cfg_init(unit); /* Re-init in case in bad state */ 378 bcm_rx_cfg_get(unit, &rx_cfg); 379 rx_cfg.global_pps = BCM_RX_RATE_NOLIMIT; 380 rx_cfg.chan_cfg[BCM_RX_CHAN_DFLT].rate_pps = BCM_RX_RATE_NOLIMIT; 381 rv = bcm_rx_start(unit, &rx_cfg); 382 if (BCM_E_NONE != rv) { 383 cli_out("mt2_ctr_rx_init:" "rx_start failed: %s\n", bcm_errmsg(rv)); 384 return rv; 385 } 386 } 387 388 /* Register handler */ 389 rv = bcm_rx_register(unit, "MT2 STAT Diag", mt2_ctr_rx_callback, 390 BCM_RX_PRIO_MAX, (void *)&unit, 391 BCM_RCO_F_ALL_COS); 392 393 if (BCM_E_NONE != rv) { 394 cli_out("ctr_rx_init:" 395 "rx_register failed: %s\n", bcm_errmsg(rv)); 396 return rv; 397 } 398 399 /* All FCoE based ctr packets go to cpu */ 400 cli_out("Mt2 Ctrs handled by CPU\n"); 401 if (mt2_inband_ctr_intercept(unit) != BCM_E_NONE) { 402 cli_out("Failed to add ctr interception rules....\n"); 403 return SOC_E_FAIL; 404 } 405 406 return SOC_E_NONE; 407 } 408 409 410 STATIC int mt2_ctr_rx_deinit(int unit) 411 { 412 int rv = SOC_E_NONE; 413 414 rv = bcm_rx_stop(unit, NULL); 415 if (BCM_E_NONE != rv) { 416 cli_out("mt2_ctr_rx_deinit:" "rx_stop failed: %s\n", bcm_errmsg(rv)); 417 return rv; 418 } 419 420 /* Unregister handler */ 421 if ((rv = bcm_rx_unregister(unit, mt2_ctr_rx_callback, BCM_RX_PRIO_MAX)) < 0) { 422 cli_out("mt2_ctr_rx_deinit: bcm_rx_unregister failed: %s\n", 423 bcm_errmsg(rv)); 424 return SOC_E_FAIL; 425 } 426 427 return SOC_E_NONE; 428 } 429 430 STATIC void mt2_ctr_validate_show(char *name, char *sfx, uint64 data, uint64 odata, uint32 flags) 431 { 432 uint64 diff; 433 char buf_val[32], buf_diff[32]; 434 435 if (COMPILER_64_IS_ZERO(data)) { 436 if (!(flags & MT2_CTR_ZERO)) { 437 return; 438 } 439 } else { 440 if (!(flags & MT2_CTR_NONZERO)) { 441 return; 442 } 443 } 444 445 diff = data; 446 COMPILER_64_SUB_64(diff, odata); 447 if (COMPILER_64_IS_ZERO(diff)) { 448 if (!(flags & MT2_CTR_SAME)) { 449 return; 450 } 451 } else { 452 if (!(flags & MT2_CTR_CHANGED)) { 453 return; 454 } 455 } 456 457 if (flags & MT2_CTR_HEX) { 458 cli_out("%s.%s = 0x%08x%08x (+0x%08x%08x)\n", name, sfx, COMPILER_64_HI(data), COMPILER_64_LO(data), COMPILER_64_HI(diff), COMPILER_64_LO(diff)); 459 } else { 460 format_uint64_decimal(buf_val, data, (int)','); 461 format_uint64_decimal(buf_diff, diff, (int)','); 462 cli_out("%s.%s = %s (+%s)\n", name, sfx, buf_val, buf_diff); 463 } 464 return; 465 } 466 467 STATIC int mt2_eth_ctr_show(mt2_eth_ctr_t *data, mt2_eth_ctr_t *odata, char *sfx, uint32 flags) 468 { 469 mt2_ctr_validate_show("R64", sfx, data->r64, odata->r64, flags); 470 mt2_ctr_validate_show("R127", sfx, data->r127, odata->r127, flags); 471 mt2_ctr_validate_show("R255", sfx, data->r255, odata->r255, flags); 472 mt2_ctr_validate_show("R511", sfx, data->r511, odata->r511, flags); 473 mt2_ctr_validate_show("R1023", sfx, data->r1023, odata->r1023, flags); 474 mt2_ctr_validate_show("R1518", sfx, data->r1518, odata->r1518, flags); 475 mt2_ctr_validate_show("RMGV", sfx, data->rmgv, odata->rmgv, flags); 476 mt2_ctr_validate_show("R2047", sfx, data->r2047, odata->r2047, flags); 477 mt2_ctr_validate_show("R4095", sfx, data->r4095, odata->r4095, flags); 478 mt2_ctr_validate_show("R9216", sfx, data->r9216, odata->r9216, flags); 479 mt2_ctr_validate_show("R16383", sfx, data->r16383, odata->r16383, flags); 480 mt2_ctr_validate_show("RPKT", sfx, data->rpkt, odata->rpkt, flags); 481 mt2_ctr_validate_show("RUCA", sfx, data->ruca, odata->ruca, flags); 482 mt2_ctr_validate_show("RMCA", sfx, data->rmca, odata->rmca, flags); 483 mt2_ctr_validate_show("RBCA", sfx, data->rbca, odata->rbca, flags); 484 mt2_ctr_validate_show("RFCS", sfx, data->rfcs, odata->rfcs, flags); 485 mt2_ctr_validate_show("RXCF", sfx, data->rxcf, odata->rxcf, flags); 486 mt2_ctr_validate_show("RXPF", sfx, data->rxpf, odata->rxpf, flags); 487 mt2_ctr_validate_show("RXPP", sfx, data->rxpp, odata->rxpp, flags); 488 mt2_ctr_validate_show("RXUO", sfx, data->rxuo, odata->rxuo, flags); 489 mt2_ctr_validate_show("RXUDA", sfx, data->rxuda, odata->rxuda, flags); 490 mt2_ctr_validate_show("RXWSA", sfx, data->rxwsa, odata->rxwsa, flags); 491 mt2_ctr_validate_show("RALN", sfx, data->raln, odata->raln, flags); 492 mt2_ctr_validate_show("RFLR", sfx, data->rflr, odata->rflr, flags); 493 mt2_ctr_validate_show("RERPKT", sfx, data->rerpkt, odata->rerpkt, flags); 494 mt2_ctr_validate_show("RFCR", sfx, data->rfcr, odata->rfcr, flags); 495 mt2_ctr_validate_show("ROVR", sfx, data->rovr, odata->rovr, flags); 496 mt2_ctr_validate_show("RJBR", sfx, data->rjbr, odata->rjbr, flags); 497 mt2_ctr_validate_show("RMTUE", sfx, data->rmtue, odata->rmtue, flags); 498 mt2_ctr_validate_show("RMCRC", sfx, data->rmcrc, odata->rmcrc, flags); 499 mt2_ctr_validate_show("RPRM", sfx, data->rprm, odata->rprm, flags); 500 mt2_ctr_validate_show("RVLN", sfx, data->rvln, odata->rvln, flags); 501 mt2_ctr_validate_show("RDVLN", sfx, data->rdvln, odata->rdvln, flags); 502 mt2_ctr_validate_show("RTRFU", sfx, data->rtrfu, odata->rtrfu, flags); 503 mt2_ctr_validate_show("RPOK", sfx, data->rpok, odata->rpok, flags); 504 mt2_ctr_validate_show("RPFCOFF0", sfx, data->rpfcoff0, odata->rpfcoff0, flags); 505 mt2_ctr_validate_show("RPFCOFF1", sfx, data->rpfcoff1, odata->rpfcoff1, flags); 506 mt2_ctr_validate_show("RPFCOFF2", sfx, data->rpfcoff2, odata->rpfcoff2, flags); 507 mt2_ctr_validate_show("RPFCOFF3", sfx, data->rpfcoff3, odata->rpfcoff3, flags); 508 mt2_ctr_validate_show("RPFCOFF4", sfx, data->rpfcoff4, odata->rpfcoff4, flags); 509 mt2_ctr_validate_show("RPFCOFF5", sfx, data->rpfcoff5, odata->rpfcoff5, flags); 510 mt2_ctr_validate_show("RPFCOFF6", sfx, data->rpfcoff6, odata->rpfcoff6, flags); 511 mt2_ctr_validate_show("RPFCOFF7", sfx, data->rpfcoff7, odata->rpfcoff7, flags); 512 mt2_ctr_validate_show("RPFC0", sfx, data->rpfc0, odata->rpfc0, flags); 513 mt2_ctr_validate_show("RPFC1", sfx, data->rpfc1, odata->rpfc1, flags); 514 mt2_ctr_validate_show("RPFC2", sfx, data->rpfc2, odata->rpfc2, flags); 515 mt2_ctr_validate_show("RPFC3", sfx, data->rpfc3, odata->rpfc3, flags); 516 mt2_ctr_validate_show("RPFC4", sfx, data->rpfc4, odata->rpfc4, flags); 517 mt2_ctr_validate_show("RPFC5", sfx, data->rpfc5, odata->rpfc5, flags); 518 mt2_ctr_validate_show("RPFC6", sfx, data->rpfc6, odata->rpfc6, flags); 519 mt2_ctr_validate_show("RPFC7", sfx, data->rpfc7, odata->rpfc7, flags); 520 mt2_ctr_validate_show("RSCHCRC", sfx, data->rschcrc, odata->rschcrc, flags); 521 mt2_ctr_validate_show("RUND", sfx, data->rund, odata->rund, flags); 522 mt2_ctr_validate_show("RFRG", sfx, data->rfrg, odata->rfrg, flags); 523 mt2_ctr_validate_show("RX_EEE_LPI_EVENT_COUNTER", sfx, data->rx_eee_lpi_event_counter, odata->rx_eee_lpi_event_counter, flags); 524 mt2_ctr_validate_show("RX_EEE_LPI_DURATION_COUNTER", sfx, data->rx_eee_lpi_duration_counter, odata->rx_eee_lpi_duration_counter, flags); 525 mt2_ctr_validate_show("RX_LLFC_PHY_COUNTER", sfx, data->rx_llfc_phy_counter, odata->rx_llfc_phy_counter, flags); 526 mt2_ctr_validate_show("RX_LLFC_LOG_COUNTER", sfx, data->rx_llfc_log_counter, odata->rx_llfc_log_counter, flags); 527 mt2_ctr_validate_show("RX_LLFC_CRC_COUNTER", sfx, data->rx_llfc_crc_counter, odata->rx_llfc_crc_counter, flags); 528 mt2_ctr_validate_show("RX_HCFC_COUNTER", sfx, data->rx_hcfc_counter, odata->rx_hcfc_counter, flags); 529 mt2_ctr_validate_show("RBYT", sfx, data->rbyt, odata->rbyt, flags); 530 mt2_ctr_validate_show("RRBYT", sfx, data->rrbyt, odata->rrbyt, flags); 531 mt2_ctr_validate_show("RRPKT", sfx, data->rrpkt, odata->rrpkt, flags); 532 mt2_ctr_validate_show("T64", sfx, data->t64, odata->t64, flags); 533 mt2_ctr_validate_show("T127", sfx, data->t127, odata->t127, flags); 534 mt2_ctr_validate_show("T255", sfx, data->t255, odata->t255, flags); 535 mt2_ctr_validate_show("T511", sfx, data->t511, odata->t511, flags); 536 mt2_ctr_validate_show("T1023", sfx, data->t1023, odata->t1023, flags); 537 mt2_ctr_validate_show("T1518", sfx, data->t1518, odata->t1518, flags); 538 mt2_ctr_validate_show("TMGV", sfx, data->tmgv, odata->tmgv, flags); 539 mt2_ctr_validate_show("T2047", sfx, data->t2047, odata->t2047, flags); 540 mt2_ctr_validate_show("T4095", sfx, data->t4095, odata->t4095, flags); 541 mt2_ctr_validate_show("T9216", sfx, data->t9216, odata->t9216, flags); 542 mt2_ctr_validate_show("T16383", sfx, data->t16383, odata->t16383, flags); 543 mt2_ctr_validate_show("TPOK", sfx, data->tpok, odata->tpok, flags); 544 mt2_ctr_validate_show("TPKT", sfx, data->tpkt, odata->tpkt, flags); 545 mt2_ctr_validate_show("TUCA", sfx, data->tuca, odata->tuca, flags); 546 mt2_ctr_validate_show("TMCA", sfx, data->tmca, odata->tmca, flags); 547 mt2_ctr_validate_show("TBCA", sfx, data->tbca, odata->tbca, flags); 548 mt2_ctr_validate_show("TXPF", sfx, data->txpf, odata->txpf, flags); 549 mt2_ctr_validate_show("TXPP", sfx, data->txpp, odata->txpp, flags); 550 mt2_ctr_validate_show("TJBR", sfx, data->tjbr, odata->tjbr, flags); 551 mt2_ctr_validate_show("TFCS", sfx, data->tfcs, odata->tfcs, flags); 552 mt2_ctr_validate_show("TXCF", sfx, data->txcf, odata->txcf, flags); 553 mt2_ctr_validate_show("TOVR", sfx, data->tovr, odata->tovr, flags); 554 mt2_ctr_validate_show("TDFR", sfx, data->tdfr, odata->tdfr, flags); 555 mt2_ctr_validate_show("TEDF", sfx, data->tedf, odata->tedf, flags); 556 mt2_ctr_validate_show("TSCL", sfx, data->tscl, odata->tscl, flags); 557 mt2_ctr_validate_show("TMCL", sfx, data->tmcl, odata->tmcl, flags); 558 mt2_ctr_validate_show("TLCL", sfx, data->tlcl, odata->tlcl, flags); 559 mt2_ctr_validate_show("TXCL", sfx, data->txcl, odata->txcl, flags); 560 mt2_ctr_validate_show("TFRG", sfx, data->tfrg, odata->tfrg, flags); 561 mt2_ctr_validate_show("TERR", sfx, data->terr, odata->terr, flags); 562 mt2_ctr_validate_show("TVLN", sfx, data->tvln, odata->tvln, flags); 563 mt2_ctr_validate_show("TDVLN", sfx, data->tdvln, odata->tdvln, flags); 564 mt2_ctr_validate_show("TRPKT", sfx, data->trpkt, odata->trpkt, flags); 565 mt2_ctr_validate_show("TUFL", sfx, data->tufl, odata->tufl, flags); 566 mt2_ctr_validate_show("TPFC0", sfx, data->tpfc0, odata->tpfc0, flags); 567 mt2_ctr_validate_show("TPFC1", sfx, data->tpfc1, odata->tpfc1, flags); 568 mt2_ctr_validate_show("TPFC2", sfx, data->tpfc2, odata->tpfc2, flags); 569 mt2_ctr_validate_show("TPFC3", sfx, data->tpfc3, odata->tpfc3, flags); 570 mt2_ctr_validate_show("TPFC4", sfx, data->tpfc4, odata->tpfc4, flags); 571 mt2_ctr_validate_show("TPFC5", sfx, data->tpfc5, odata->tpfc5, flags); 572 mt2_ctr_validate_show("TPFC6", sfx, data->tpfc6, odata->tpfc6, flags); 573 mt2_ctr_validate_show("TPFC7", sfx, data->tpfc7, odata->tpfc7, flags); 574 mt2_ctr_validate_show("TX_EEE_LPI_EVENT_COUNTER", sfx, data->tx_eee_lpi_event_counter, odata->tx_eee_lpi_event_counter, flags); 575 mt2_ctr_validate_show("TX_EEE_LPI_DURATION_COUNTER", sfx, data->tx_eee_lpi_duration_counter, odata->tx_eee_lpi_duration_counter, flags); 576 mt2_ctr_validate_show("TX_LLFC_LOG_COUNTER", sfx, data->tx_llfc_log_counter, odata->tx_llfc_log_counter, flags); 577 mt2_ctr_validate_show("TX_HCFC_COUNTER", sfx, data->tx_hcfc_counter, odata->tx_hcfc_counter, flags); 578 mt2_ctr_validate_show("TNCL", sfx, data->tncl, odata->tncl, flags); 579 mt2_ctr_validate_show("TBYT", sfx, data->tbyt, odata->tbyt, flags); 580 581 return SOC_E_NONE; 582 } 583 584 #ifdef INCLUDE_FCMAP 585 STATIC int mt2_fc_ctr_show(mt2_fc_ctr_t *data, mt2_fc_ctr_t *odata, char *sfx, uint32 flags) 586 { 587 mt2_ctr_validate_show("FC_C2_RXGOODFRAMES", sfx, data->fc_c2_rxgoodframes, odata->fc_c2_rxgoodframes, flags); 588 mt2_ctr_validate_show("FC_C2_RXINVALIDCRC", sfx, data->fc_c2_rxinvalidcrc, odata->fc_c2_rxinvalidcrc, flags); 589 mt2_ctr_validate_show("FC_C2_RXFRAMETOOLONG", sfx, data->fc_c2_rxframetoolong, odata->fc_c2_rxframetoolong, flags); 590 mt2_ctr_validate_show("FC_C3_RXGOODFRAMES", sfx, data->fc_c3_rxgoodframes, odata->fc_c3_rxgoodframes, flags); 591 mt2_ctr_validate_show("FC_C3_RXINVALIDCRC", sfx, data->fc_c3_rxinvalidcrc, odata->fc_c3_rxinvalidcrc, flags); 592 mt2_ctr_validate_show("FC_C3_RXFRAMETOOLONG", sfx, data->fc_c3_rxframetoolong, odata->fc_c3_rxframetoolong, flags); 593 mt2_ctr_validate_show("FC_CF_RXGOODFRAMES", sfx, data->fc_cf_rxgoodframes, odata->fc_cf_rxgoodframes, flags); 594 mt2_ctr_validate_show("FC_CF_RXINVALIDCRC", sfx, data->fc_cf_rxinvalidcrc, odata->fc_cf_rxinvalidcrc, flags); 595 mt2_ctr_validate_show("FC_CF_RXFRAMETOOLONG", sfx, data->fc_cf_rxframetoolong, odata->fc_cf_rxframetoolong, flags); 596 mt2_ctr_validate_show("FC_RXDELIMITERERR", sfx, data->fc_rxdelimitererr, odata->fc_rxdelimitererr, flags); 597 mt2_ctr_validate_show("FC_RXBBC0DROP", sfx, data->fc_rxbbc0drop, odata->fc_rxbbc0drop, flags); 598 mt2_ctr_validate_show("FC_RXBBCREDIT0", sfx, data->fc_rxbbcredit0, odata->fc_rxbbcredit0, flags); 599 mt2_ctr_validate_show("FC_RXLINKFAIL", sfx, data->fc_rxlinkfail, odata->fc_rxlinkfail, flags); 600 mt2_ctr_validate_show("FC_RXSYNCFAIL", sfx, data->fc_rxsyncfail, odata->fc_rxsyncfail, flags); 601 mt2_ctr_validate_show("FC_RXLOSSSIG", sfx, data->fc_rxlosssig, odata->fc_rxlosssig, flags); 602 mt2_ctr_validate_show("FC_RXPRIMSEQERR", sfx, data->fc_rxprimseqerr, odata->fc_rxprimseqerr, flags); 603 mt2_ctr_validate_show("FC_RXINVALIDSET", sfx, data->fc_rxinvalidset, odata->fc_rxinvalidset, flags); 604 mt2_ctr_validate_show("FC_RXLPICOUNT", sfx, data->fc_rxlpicount, odata->fc_rxlpicount, flags); 605 mt2_ctr_validate_show("FC_RXENCODEDISPARITY", sfx, data->fc_rxencodedisparity, odata->fc_rxencodedisparity, flags); 606 mt2_ctr_validate_show("FC_RXBADXWORD", sfx, data->fc_rxbadxword, odata->fc_rxbadxword, flags); 607 mt2_ctr_validate_show("FC_RX_C2_RUNTFRAMES", sfx, data->fc_rx_c2_runtframes, odata->fc_rx_c2_runtframes, flags); 608 mt2_ctr_validate_show("FC_RX_C3_RUNTFRAMES", sfx, data->fc_rx_c3_runtframes, odata->fc_rx_c3_runtframes, flags); 609 mt2_ctr_validate_show("FC_RX_CF_RUNTFRAMES", sfx, data->fc_rx_cf_runtframes, odata->fc_rx_cf_runtframes, flags); 610 mt2_ctr_validate_show("FC_C2_RXBYT", sfx, data->fc_c2_rxbyt, odata->fc_c2_rxbyt, flags); 611 mt2_ctr_validate_show("FC_C3_RXBYT", sfx, data->fc_c3_rxbyt, odata->fc_c3_rxbyt, flags); 612 mt2_ctr_validate_show("FC_CF_RXBYT", sfx, data->fc_cf_rxbyt, odata->fc_cf_rxbyt, flags); 613 mt2_ctr_validate_show("FC_TX_C2_FRAMES", sfx, data->fc_tx_c2_frames, odata->fc_tx_c2_frames, flags); 614 mt2_ctr_validate_show("FC_TX_C3_FRAMES", sfx, data->fc_tx_c3_frames, odata->fc_tx_c3_frames, flags); 615 mt2_ctr_validate_show("FC_TX_CF_FRAMES", sfx, data->fc_tx_cf_frames, odata->fc_tx_cf_frames, flags); 616 mt2_ctr_validate_show("FC_TX_C2_OVERSIZED_FRAMES", sfx, data->fc_tx_c2_oversized_frames, odata->fc_tx_c2_oversized_frames, flags); 617 mt2_ctr_validate_show("FC_TX_C3_OVERSIZED_FRAMES", sfx, data->fc_tx_c3_oversized_frames, odata->fc_tx_c3_oversized_frames, flags); 618 mt2_ctr_validate_show("FC_TX_CF_OVERSIZED_FRAMES", sfx, data->fc_tx_cf_oversized_frames, odata->fc_tx_cf_oversized_frames, flags); 619 mt2_ctr_validate_show("FC_TXBBCREDIT0", sfx, data->fc_txbbcredit0, odata->fc_txbbcredit0, flags); 620 mt2_ctr_validate_show("FC_C2_TXBYT", sfx, data->fc_c2_txbyt, odata->fc_c2_txbyt, flags); 621 mt2_ctr_validate_show("FC_C3_TXBYT", sfx, data->fc_c3_txbyt, odata->fc_c3_txbyt, flags); 622 mt2_ctr_validate_show("FC_CF_TXBYT", sfx, data->fc_cf_txbyt, odata->fc_cf_txbyt, flags); 623 624 return SOC_E_NONE; 625 } 626 #endif /* INCLUDE_FCMAP */ 627 628 int phy8806x_ctr_interval_set(phy_ctrl_t *pc, uint32_t val) 629 { 630 uint32_t xmodtxbuff[XMOD_BUFFER_MAX_LEN/4]; 631 uint8_t *buftxptr; 632 int xmodtxlen, rv; 633 634 /* write args to xmod buffer */ 635 buftxptr = (uint8_t *)xmodtxbuff; 636 cli_out("setting Interval to %d on port %d\n", val, pc->port); 637 638 #if BE_HOST 639 val = _shr_swap32(val); 640 #endif 641 WRITE_XMOD_ARG_BUFF(buftxptr, &val, sizeof(uint32_t)); 642 xmodtxlen = GET_XMOD_ETHERNET_CMD_IN_LEN(XMOD_DEV_CTR_INTERVAL_SET); 643 xmodtxlen = GET_XMOD_BUF_WORD_LEN(xmodtxlen); 644 645 /* call xmod */ 646 rv = phy_8806x_xmod_command(pc->unit, pc->port, XMOD_CMD_MODE_CORE(XMOD_DEV_CTR_INTERVAL_SET), 647 xmodtxbuff, xmodtxlen, NULL, 0); 648 649 return rv; 650 } 651 652 int 653 phy8806x_ctr_start(int unit) 654 { 655 if (mt2_ctr_rx_init(unit) != SOC_E_NONE) { 656 cli_out("MT2 Ctr Start Failed u=%d\n", unit); 657 return SOC_E_FAIL; 658 } else { 659 cli_out("MT2 Ctr Routine Started u=%d\n", unit); 660 return SOC_E_NONE; 661 } 662 } 663 664 int 665 phy8806x_ctr_stop(int unit) 666 { 667 if (mt2_ctr_rx_deinit(unit) != SOC_E_NONE) { 668 cli_out("MT2 Ctr Stop Failed u=%d\n", unit); 669 return SOC_E_FAIL; 670 } else { 671 cli_out("MT2 Ctr Routine Stopped u=%d\n", unit); 672 return SOC_E_NONE; 673 } 674 } 675 676 int 677 phy8806x_ctr_show(phy_ctrl_t *pc, uint32_t flags) 678 { 679 uint8 *datptr, *oldptr; 680 char suffix[32]; 681 uint32_t ctrflags = flags; 682 683 if (flags == 0) { 684 ctrflags = MT2_CTR_DEFAULT; 685 } 686 if (ctrflags & MT2_CTR_ALL) { 687 ctrflags = (MT2_CTR_SYS | MT2_CTR_LINE | MT2_CTR_CHANGED | MT2_CTR_SAME | MT2_CTR_ZERO | MT2_CTR_NONZERO); 688 } 689 if ((ctrflags & (MT2_CTR_SYS | MT2_CTR_LINE)) == 0) { 690 ctrflags |= (MT2_CTR_SYS | MT2_CTR_LINE); 691 } 692 if ((ctrflags & (MT2_CTR_ZERO | MT2_CTR_NONZERO)) == 0) { 693 ctrflags |= (MT2_CTR_ZERO | MT2_CTR_NONZERO); 694 } 695 if ((ctrflags & (MT2_CTR_CHANGED | MT2_CTR_SAME)) == 0) { 696 ctrflags |= MT2_CTR_CHANGED; 697 } 698 699 datptr = phy8806x_eth_ctr_get(pc); 700 oldptr = datptr + MT2_CTR_PREV_OFF; 701 702 if (ctrflags & MT2_CTR_LINE) { 703 sal_sprintf(suffix, "%s.Line",SOC_PORT_NAME(pc->unit, pc->port)); 704 #if defined(INCLUDE_FCMAP) 705 if (pc->fcmap_enable){ 706 mt2_fc_ctr_show((mt2_fc_ctr_t *)datptr, (mt2_fc_ctr_t *)oldptr, suffix, ctrflags); 707 sal_memcpy(oldptr, datptr, sizeof(mt2_fc_ctr_t)); 708 } else 709 #endif 710 { 711 mt2_eth_ctr_show((mt2_eth_ctr_t *)datptr, (mt2_eth_ctr_t *)oldptr, suffix, ctrflags); 712 sal_memcpy(oldptr, datptr, sizeof(mt2_eth_ctr_t)); 713 } 714 } 715 716 if (ctrflags & MT2_CTR_SYS) { 717 #if defined(INCLUDE_FCMAP) 718 if (pc->fcmap_enable){ 719 datptr += sizeof(mt2_fc_ctr_t); 720 oldptr += sizeof(mt2_fc_ctr_t); 721 cli_out("Sys Side Yet to implement FC Port...\n"); 722 } else 723 #endif 724 { 725 datptr += sizeof(mt2_eth_ctr_t); 726 oldptr += sizeof(mt2_eth_ctr_t); 727 sal_sprintf(suffix, "%s.Sys",SOC_PORT_NAME(pc->unit, pc->port)); 728 mt2_eth_ctr_show((mt2_eth_ctr_t *)datptr, (mt2_eth_ctr_t *)oldptr, suffix, ctrflags); 729 sal_memcpy(oldptr, datptr, sizeof(mt2_eth_ctr_t)); 730 } 731 } 732 733 return SOC_E_NONE; 734 } 735 736 #else 737 int _8806x_ctr_not_empty; 738 #endif /* INCLUDE_PHY_8806X */ 739