phy8806x_syms.h (5354B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * File: phy8806x_syms.h 8 */ 9 10 #ifndef _PHY8806X_SYMS_H_ 11 #define _PHY8806X_SYMS_H_ 12 13 #include <sal/types.h> 14 15 16 #define MT2_CONFIG_INCLUDE_CHIP_SYMBOLS 1 17 #define MT2_CONFIG_INCLUDE_FIELD_NAMES 1 18 #define MT2_CONFIG_INCLUDE_FIELD_INFO 1 19 #define MT2_CONFIG_INCLUDE_RESET_VALUES 1 20 #define MT2_CONFIG_INCLUDE_TEST_MASK 1 21 22 typedef struct mt2_sym_s { 23 uint32 addr; 24 #if MT2_CONFIG_INCLUDE_FIELD_INFO == 1 25 uint32* fields; 26 #endif 27 uint32 index; /* "size" for registers */ 28 uint32 flags; 29 uint32 blktypes; 30 uint32 block; 31 const char *name; 32 #if MT2_CONFIG_INCLUDE_RESET_VALUES == 1 33 uint32 rstval; 34 uint32 rstval_hi; 35 #endif 36 #if MT2_CONFIG_INCLUDE_TEST_MASK == 1 37 uint32 test_mask; 38 uint32 test_mask_hi; 39 #endif 40 } mt2_sym_t; 41 42 /* Flags */ 43 #define MT2_SYMBOL_FLAG_REGISTER 0x00000001 44 #define MT2_SYMBOL_FLAG_R64 0x00000002 45 #define MT2_SYMBOL_FLAG_PORT 0x00000004 46 #define MT2_SYMBOL_FLAG_SOFT_PORT 0x00000008 47 #define MT2_SYMBOL_FLAG_MEMORY 0x00000010 48 #define MT2_SYMBOL_FLAG_COUNTER 0x00000020 49 #define MT2_SYMBOL_FLAG_MEMMAPPED 0x00000040 50 #define MT2_SYMBOL_FLAG_NOTEST 0x00000080 51 #define MT2_SYMBOL_FLAG_READONLY 0x00000100 52 53 /* Size & Index.. Encodingt TBD */ 54 #define MT2_SYMBOL_INDEX_SIZE_ENCODE(x) (x) 55 #define MT2_SYMBOL_INDEX_MIN_ENCODE(x) (x << 8) 56 #define MT2_SYMBOL_INDEX_MAX_ENCODE(x) (x<<16) 57 58 #define MT2_SYMBOL_INDEX_SIZE_DECODE(x) (x & 0xff) 59 #define MT2_SYMBOL_INDEX_MIN_DECODE(x) ((x >> 8) & 0xff) 60 #define MT2_SYMBOL_INDEX_MAX_DECODE(x) (x >> 16) 61 62 #define CDK_SYMBOL_FIELD_FLAG_LAST (1 << 31) 63 #define CDK_SYMBOL_FIELD_ENCODE(x, y, z) ((x << 16) | (y << 8) | z) 64 65 extern const mt2_sym_t phy8806x_syms[]; 66 extern const uint32 phy8806x_syms_numels; 67 extern const char* phy8806x_fields[]; 68 69 70 /* forward definitions of the access functions */ 71 extern int mt2_xgsd_reg32_block_read(int unit, uint32 blkacc, int block, 72 uint32 offset, int idx, void *data); 73 extern int mt2_xgsd_reg32_block_write(int unit, uint32 blkacc, int block, 74 uint32 offset, int idx, void *data); 75 extern int mt2_xgsd_reg64_block_read(int unit, uint32 blkacc, int block, 76 uint32 offset, int idx, void *data); 77 extern int mt2_xgsd_reg64_block_write(int unit, uint32 blkacc, int block, 78 uint32 offset, int idx, void *data); 79 80 extern int mt2_xgsd_reg32_port_read(int unit, uint32 blkacc, int port, 81 uint32 offset, int idx, void *data); 82 extern int mt2_xgsd_reg32_port_write(int unit, uint32 blkacc, int port, 83 uint32 offset, int idx, void *data); 84 extern int mt2_xgsd_reg64_port_read(int unit, uint32 blkacc, int port, 85 uint32 offset, int idx, void *data); 86 extern int mt2_xgsd_reg64_port_write(int unit, uint32 blkacc, int port, 87 uint32 offset, int idx, void *data); 88 89 extern int mt2_xgsd_reg32_port_speed_read(int unit, uint32 blkacc, int port, 90 uint32 offset, int idx, int speed, 91 void *data); 92 extern int mt2_xgsd_reg32_port_speed_write(int unit, uint32 blkacc, int port, 93 uint32 offset, int idx, int speed, 94 void *data); 95 extern int mt2_xgsd_reg64_port_speed_read(int unit, uint32 blkacc, int port, 96 uint32 offset, int idx, int speed, 97 void *data); 98 extern int mt2_xgsd_reg64_port_speed_write(int unit, uint32 blkacc, int port, 99 uint32 offset, int idx, int speed, 100 void *data); 101 102 extern int mt2_xgsd_reg32_blocks_read(int unit, uint32 blkacc, int port, 103 uint32 offset, int idx, void *data); 104 extern int mt2_xgsd_reg32_blocks_write(int unit, uint32 blkacc, int port, 105 uint32 offset, int idx, void *data); 106 107 extern int mt2_xgsd_mem_blocks_read(int unit, uint32 blkacc, int port, 108 uint32 offset, int idx, void *entry_data, 109 int size); 110 extern int mt2_xgsd_mem_blocks_write(int unit, uint32 blkacc, int port, 111 uint32 offset, int idx, void *entry_data, 112 int size); 113 extern int mt2_xgsd_mem_read(int unit, uint32 block, uint32 addr, 114 uint32 idx, void *vptr, int size); 115 extern int mt2_xgsd_mem_write(int unit, uint32 block, uint32 addr, 116 uint32 idx, void *vptr, int size); 117 118 extern uint32 *mt2_field_get(const uint32 * entbuf, int sbit, int ebit, 119 uint32 * fbuf); 120 extern void mt2_field_set(uint32 * entbuf, int sbit, int ebit, 121 uint32 * fbuf); 122 extern uint32 mt2_field32_get(const uint32 * entbuf, int sbit, int ebit); 123 extern void mt2_field32_set(uint32 * entbuf, int sbit, int ebit, 124 uint32 fval); 125 126 extern int mt2_sbus_reg_read(int unit, uint16 phyaddr, int blknum, 127 mt2_sym_t *mt2_sym, uint32 * data); 128 extern int mt2_sbus_reg_write(int unit, uint16 phyaddr, int blknum, 129 mt2_sym_t *mt2_sym, uint32 * data); 130 extern int mt2_sbus_mem_read(int unit, uint16 phyaddr, int blknum, 131 mt2_sym_t *mt2_sym, int idx, uint32 * data); 132 extern int mt2_sbus_mem_write(int unit, uint16 phyaddr, int blknum, 133 mt2_sym_t *mt2_sym, int idx, uint32 * data); 134 extern int mt2_sbus_to_tsc_read(int unit, uint16 phyaddr, uint32 addr, 135 uint32 * data); 136 extern int mt2_sbus_to_tsc_write(int unit, uint16 phyaddr, uint32 addr, 137 uint32 * data); 138 extern int mt2_axi_read(int unit, uint16 phyaddr, uint32 regaddr, 139 uint32 * data); 140 extern int mt2_axi_write(int unit, uint16 phyaddr, uint32 regaddr, 141 uint32 * data); 142 143 #endif /* _PHY8806X_SYMS_H_ */ 144