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io_mmi1.h (1761B)

      1 /*
      2  * 
      3  * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file.
      4  * 
      5  * Copyright 2007-2019 Broadcom Inc. All rights reserved.
      6  */
      7 
      8 #ifndef BLMI_MMI1_H
      9 #define BLMI_MMI1_H
     10 
     11 
     12 /* MMI1 specific registers */
     13 #define BLMI_MMI1_REG_CFG                (0x00)
     14 #define BLMI_MMI1_REG_INTR               (0x01)
     15 #define BLMI_MMI1_ID1                    (0x02)
     16 #define BLMI_MMI1_ID2                    (0x03)
     17 #define BLMI_MMI1_REG_PORT_CMD           (0x04) 
     18     #define BLMI_MMI1_PORT_CMD_DOIT           (0x1)
     19     #define BLMI_MMI1_PORT_CMD_WRITE_EN       (0x2)
     20     #define BLMI_MMI1_PORT_CMD_MEM_EN         (0x4)
     21     #define BLMI_MMI1_PORT_CMD_RESET          (0x8000)
     22 
     23 #define BLMI_MMI1_REG_PORT_EXT_CMD       (0x05) 
     24     #define BLMI_MMI1_PORT_EXT_BURST_EN       (0x01)
     25     #define BLMI_MMI1_PORT_EXT_BURST_LEN(l)   (((l) & 0x1ff) << 1)
     26     #define BLMI_MMI1_PORT_EXT_BLK_INIT_EN       (1 << 11)
     27     #define BLMI_MMI1_PORT_EXT_BLK_COPY_EN       (1 << 12)
     28 
     29 #define BLMI_MMI1_REG_PORT_STATUS        (0x06) 
     30     #define BLMI_MMI1_PORT_STATUS_READY        (0x1)
     31     #define BLMI_MMI1_PORT_STATUS_ERROR        (0x7f8)
     32 
     33 #define BLMI_MMI1_REG_PORT_ADDR_LSB      (0x08) 
     34 #define BLMI_MMI1_REG_PORT_ADDR_MSB      (0x09) 
     35 #define BLMI_MMI1_REG_PORT_DATA_LSB      (0x0A) 
     36 #define BLMI_MMI1_REG_PORT_DATA_MSB      (0x0B)
     37 
     38 #define BLMI_MMI1_REG_PORT_SRC_ADDR_LSB      (0x0C) 
     39 #define BLMI_MMI1_REG_PORT_SRC_ADDR_MSB      (0x0D)
     40 #define BLMI_MMI1_REG_PORT_DST_ADDR_LSB      (0x0E) 
     41 #define BLMI_MMI1_REG_PORT_DST_ADDR_MSB      (0x0F)
     42 #define BLMI_MMI1_REG_PORT_FIFO_WR_PTR   (0x12) 
     43 #define BLMI_MMI1_REG_PORT_FIFO_RD_PTR   (0x13) 
     44 
     45 #define BLMI_MMI1_REG_QUAD_SEL           (0x1F) 
     46 
     47 #endif /* BLMI_MMI1_H */
     48