allformats_x.i (18771B)
1 /* 2 * DO NOT EDIT THIS FILE! 3 * This file is auto-generated from the registers file. 4 * Edits to this file will be lost when it is regenerated. 5 * 6 * 7 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 8 * 9 * Copyright 2007-2020 Broadcom Inc. All rights reserved. 10 * 11 * File: allformats_x.i 12 * Purpose: Independent format descriptions. 13 */ 14 15 #if defined(BCM_56524_B0) || defined(BCM_56624_A0) || \ 16 defined(BCM_56680_A0) || defined(BCM_56685_A0) || \ 17 defined(BCM_56685_B0) || defined(BCM_56840_A0) || \ 18 defined(BCM_56840_B0) 19 { /* SOC_FORMAT_INT_XGPORT_TO_EP_PORT_MODE_BUSfmt */ 20 /* format XGPORT_TO_EP_PORT_MODE_BUSfmt */ 21 /* nFields */ 1, 22 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUSfmt_fields, 23 /* bits */ 2, 24 /* flags */ 0, 25 }, 26 #endif /* chips */ 27 28 #if defined(BCM_56340_A0) 29 { /* SOC_FORMAT_INT_XGPORT_TO_EP_PORT_MODE_BUS_BCM56340_A0fmt */ 30 /* format XGPORT_TO_EP_PORT_MODE_BUSfmt */ 31 /* nFields */ 1, 32 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56640_A0fmt_fields, 33 /* bits */ 2, 34 /* flags */ 0, 35 }, 36 #endif /* chips */ 37 38 #if defined(BCM_56370_A0) 39 { /* SOC_FORMAT_INT_XGPORT_TO_EP_PORT_MODE_BUS_BCM56370_A0fmt */ 40 /* format XGPORT_TO_EP_PORT_MODE_BUSfmt */ 41 /* nFields */ 1, 42 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56960_A0fmt_fields, 43 /* bits */ 2, 44 /* flags */ 0, 45 }, 46 #endif /* chips */ 47 48 #if defined(BCM_56524_A0) 49 { /* SOC_FORMAT_INT_XGPORT_TO_EP_PORT_MODE_BUS_BCM56524_A0fmt */ 50 /* format XGPORT_TO_EP_PORT_MODE_BUSfmt */ 51 /* nFields */ 1, 52 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUSfmt_fields, 53 /* bits */ 2, 54 /* flags */ 0, 55 }, 56 #endif /* chips */ 57 58 #if defined(BCM_56560_A0) 59 { /* SOC_FORMAT_INT_XGPORT_TO_EP_PORT_MODE_BUS_BCM56560_A0fmt */ 60 /* format XGPORT_TO_EP_PORT_MODE_BUSfmt */ 61 /* nFields */ 1, 62 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56960_A0fmt_fields, 63 /* bits */ 2, 64 /* flags */ 0, 65 }, 66 #endif /* chips */ 67 68 #if defined(BCM_56560_B0) 69 { /* SOC_FORMAT_INT_XGPORT_TO_EP_PORT_MODE_BUS_BCM56560_B0fmt */ 70 /* format XGPORT_TO_EP_PORT_MODE_BUSfmt */ 71 /* nFields */ 1, 72 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56960_A0fmt_fields, 73 /* bits */ 2, 74 /* flags */ 0, 75 }, 76 #endif /* chips */ 77 78 #if defined(BCM_56624_B0) 79 { /* SOC_FORMAT_INT_XGPORT_TO_EP_PORT_MODE_BUS_BCM56624_B0fmt */ 80 /* format XGPORT_TO_EP_PORT_MODE_BUSfmt */ 81 /* nFields */ 1, 82 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56624_B0fmt_fields, 83 /* bits */ 3, 84 /* flags */ 0, 85 }, 86 #endif /* chips */ 87 88 #if defined(BCM_56634_A0) 89 { /* SOC_FORMAT_INT_XGPORT_TO_EP_PORT_MODE_BUS_BCM56634_A0fmt */ 90 /* format XGPORT_TO_EP_PORT_MODE_BUSfmt */ 91 /* nFields */ 1, 92 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUSfmt_fields, 93 /* bits */ 2, 94 /* flags */ 0, 95 }, 96 #endif /* chips */ 97 98 #if defined(BCM_56634_B0) 99 { /* SOC_FORMAT_INT_XGPORT_TO_EP_PORT_MODE_BUS_BCM56634_B0fmt */ 100 /* format XGPORT_TO_EP_PORT_MODE_BUSfmt */ 101 /* nFields */ 1, 102 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUSfmt_fields, 103 /* bits */ 2, 104 /* flags */ 0, 105 }, 106 #endif /* chips */ 107 108 #if defined(BCM_56640_A0) 109 { /* SOC_FORMAT_INT_XGPORT_TO_EP_PORT_MODE_BUS_BCM56640_A0fmt */ 110 /* format XGPORT_TO_EP_PORT_MODE_BUSfmt */ 111 /* nFields */ 1, 112 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56640_A0fmt_fields, 113 /* bits */ 2, 114 /* flags */ 0, 115 }, 116 #endif /* chips */ 117 118 #if defined(BCM_56670_A0) 119 { /* SOC_FORMAT_INT_XGPORT_TO_EP_PORT_MODE_BUS_BCM56670_A0fmt */ 120 /* format XGPORT_TO_EP_PORT_MODE_BUSfmt */ 121 /* nFields */ 1, 122 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56960_A0fmt_fields, 123 /* bits */ 2, 124 /* flags */ 0, 125 }, 126 #endif /* chips */ 127 128 #if defined(BCM_56670_B0) 129 { /* SOC_FORMAT_INT_XGPORT_TO_EP_PORT_MODE_BUS_BCM56670_B0fmt */ 130 /* format XGPORT_TO_EP_PORT_MODE_BUSfmt */ 131 /* nFields */ 1, 132 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56960_A0fmt_fields, 133 /* bits */ 2, 134 /* flags */ 0, 135 }, 136 #endif /* chips */ 137 138 #if defined(BCM_56680_B0) 139 { /* SOC_FORMAT_INT_XGPORT_TO_EP_PORT_MODE_BUS_BCM56680_B0fmt */ 140 /* format XGPORT_TO_EP_PORT_MODE_BUSfmt */ 141 /* nFields */ 1, 142 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56624_B0fmt_fields, 143 /* bits */ 3, 144 /* flags */ 0, 145 }, 146 #endif /* chips */ 147 148 #if defined(BCM_56770_A0) 149 { /* SOC_FORMAT_INT_XGPORT_TO_EP_PORT_MODE_BUS_BCM56770_A0fmt */ 150 /* format XGPORT_TO_EP_PORT_MODE_BUSfmt */ 151 /* nFields */ 1, 152 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56960_A0fmt_fields, 153 /* bits */ 2, 154 /* flags */ 0, 155 }, 156 #endif /* chips */ 157 158 #if defined(BCM_56850_A0) 159 { /* SOC_FORMAT_INT_XGPORT_TO_EP_PORT_MODE_BUS_BCM56850_A0fmt */ 160 /* format XGPORT_TO_EP_PORT_MODE_BUSfmt */ 161 /* nFields */ 1, 162 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56640_A0fmt_fields, 163 /* bits */ 2, 164 /* flags */ 0, 165 }, 166 #endif /* chips */ 167 168 #if defined(BCM_56860_A0) 169 { /* SOC_FORMAT_INT_XGPORT_TO_EP_PORT_MODE_BUS_BCM56860_A0fmt */ 170 /* format XGPORT_TO_EP_PORT_MODE_BUSfmt */ 171 /* nFields */ 1, 172 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56640_A0fmt_fields, 173 /* bits */ 2, 174 /* flags */ 0, 175 }, 176 #endif /* chips */ 177 178 #if defined(BCM_56870_A0) 179 { /* SOC_FORMAT_INT_XGPORT_TO_EP_PORT_MODE_BUS_BCM56870_A0fmt */ 180 /* format XGPORT_TO_EP_PORT_MODE_BUSfmt */ 181 /* nFields */ 1, 182 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56960_A0fmt_fields, 183 /* bits */ 2, 184 /* flags */ 0, 185 }, 186 #endif /* chips */ 187 188 #if defined(BCM_56960_A0) 189 { /* SOC_FORMAT_INT_XGPORT_TO_EP_PORT_MODE_BUS_BCM56960_A0fmt */ 190 /* format XGPORT_TO_EP_PORT_MODE_BUSfmt */ 191 /* nFields */ 1, 192 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56960_A0fmt_fields, 193 /* bits */ 2, 194 /* flags */ 0, 195 }, 196 #endif /* chips */ 197 198 #if defined(BCM_56965_A0) 199 { /* SOC_FORMAT_INT_XGPORT_TO_EP_PORT_MODE_BUS_BCM56965_A0fmt */ 200 /* format XGPORT_TO_EP_PORT_MODE_BUSfmt */ 201 /* nFields */ 1, 202 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56960_A0fmt_fields, 203 /* bits */ 2, 204 /* flags */ 0, 205 }, 206 #endif /* chips */ 207 208 #if defined(BCM_56970_A0) 209 { /* SOC_FORMAT_INT_XGPORT_TO_EP_PORT_MODE_BUS_BCM56970_A0fmt */ 210 /* format XGPORT_TO_EP_PORT_MODE_BUSfmt */ 211 /* nFields */ 1, 212 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56960_A0fmt_fields, 213 /* bits */ 2, 214 /* flags */ 0, 215 }, 216 #endif /* chips */ 217 218 #if defined(BCM_56980_A0) 219 { /* SOC_FORMAT_INT_XGPORT_TO_EP_PORT_MODE_BUS_BCM56980_A0fmt */ 220 /* format XGPORT_TO_EP_PORT_MODE_BUSfmt */ 221 /* nFields */ 1, 222 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56960_A0fmt_fields, 223 /* bits */ 2, 224 /* flags */ 0, 225 }, 226 #endif /* chips */ 227 228 #if defined(BCM_56980_B0) 229 { /* SOC_FORMAT_INT_XGPORT_TO_EP_PORT_MODE_BUS_BCM56980_B0fmt */ 230 /* format XGPORT_TO_EP_PORT_MODE_BUSfmt */ 231 /* nFields */ 1, 232 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56960_A0fmt_fields, 233 /* bits */ 2, 234 /* flags */ 0, 235 }, 236 #endif /* chips */ 237 238 #if defined(BCM_56624_A0) || defined(BCM_56624_B0) 239 { /* SOC_FORMAT_INT_XGPORT_TO_IP_CONTROL_WORDfmt */ 240 /* format XGPORT_TO_IP_CONTROL_WORDfmt */ 241 /* nFields */ 7, 242 /* *fields */ soc_XGPORT_TO_IP_CONTROL_WORDfmt_fields, 243 /* bits */ 17, 244 /* flags */ 0, 245 }, 246 #endif /* chips */ 247 248 #if defined(BCM_56524_A0) 249 { /* SOC_FORMAT_INT_XGPORT_TO_IP_CONTROL_WORD_BCM56524_A0fmt */ 250 /* format XGPORT_TO_IP_CONTROL_WORDfmt */ 251 /* nFields */ 10, 252 /* *fields */ soc_XGPORT_TO_IP_CONTROL_WORD_BCM56634_A0fmt_fields, 253 /* bits */ 32, 254 /* flags */ 0, 255 }, 256 #endif /* chips */ 257 258 #if defined(BCM_56524_B0) 259 { /* SOC_FORMAT_INT_XGPORT_TO_IP_CONTROL_WORD_BCM56524_B0fmt */ 260 /* format XGPORT_TO_IP_CONTROL_WORDfmt */ 261 /* nFields */ 10, 262 /* *fields */ soc_XGPORT_TO_IP_CONTROL_WORD_BCM56634_A0fmt_fields, 263 /* bits */ 32, 264 /* flags */ 0, 265 }, 266 #endif /* chips */ 267 268 #if defined(BCM_56634_A0) 269 { /* SOC_FORMAT_INT_XGPORT_TO_IP_CONTROL_WORD_BCM56634_A0fmt */ 270 /* format XGPORT_TO_IP_CONTROL_WORDfmt */ 271 /* nFields */ 10, 272 /* *fields */ soc_XGPORT_TO_IP_CONTROL_WORD_BCM56634_A0fmt_fields, 273 /* bits */ 32, 274 /* flags */ 0, 275 }, 276 #endif /* chips */ 277 278 #if defined(BCM_56634_B0) 279 { /* SOC_FORMAT_INT_XGPORT_TO_IP_CONTROL_WORD_BCM56634_B0fmt */ 280 /* format XGPORT_TO_IP_CONTROL_WORDfmt */ 281 /* nFields */ 10, 282 /* *fields */ soc_XGPORT_TO_IP_CONTROL_WORD_BCM56634_A0fmt_fields, 283 /* bits */ 32, 284 /* flags */ 0, 285 }, 286 #endif /* chips */ 287 288 #if defined(BCM_56680_A0) 289 { /* SOC_FORMAT_INT_XGPORT_TO_IP_CONTROL_WORD_BCM56680_A0fmt */ 290 /* format XGPORT_TO_IP_CONTROL_WORDfmt */ 291 /* nFields */ 7, 292 /* *fields */ soc_XGPORT_TO_IP_CONTROL_WORDfmt_fields, 293 /* bits */ 17, 294 /* flags */ 0, 295 }, 296 #endif /* chips */ 297 298 #if defined(BCM_56680_B0) 299 { /* SOC_FORMAT_INT_XGPORT_TO_IP_CONTROL_WORD_BCM56680_B0fmt */ 300 /* format XGPORT_TO_IP_CONTROL_WORDfmt */ 301 /* nFields */ 7, 302 /* *fields */ soc_XGPORT_TO_IP_CONTROL_WORDfmt_fields, 303 /* bits */ 17, 304 /* flags */ 0, 305 }, 306 #endif /* chips */ 307 308 #if defined(BCM_56685_A0) 309 { /* SOC_FORMAT_INT_XGPORT_TO_IP_CONTROL_WORD_BCM56685_A0fmt */ 310 /* format XGPORT_TO_IP_CONTROL_WORDfmt */ 311 /* nFields */ 10, 312 /* *fields */ soc_XGPORT_TO_IP_CONTROL_WORD_BCM56634_A0fmt_fields, 313 /* bits */ 32, 314 /* flags */ 0, 315 }, 316 #endif /* chips */ 317 318 #if defined(BCM_56685_B0) 319 { /* SOC_FORMAT_INT_XGPORT_TO_IP_CONTROL_WORD_BCM56685_B0fmt */ 320 /* format XGPORT_TO_IP_CONTROL_WORDfmt */ 321 /* nFields */ 10, 322 /* *fields */ soc_XGPORT_TO_IP_CONTROL_WORD_BCM56634_A0fmt_fields, 323 /* bits */ 32, 324 /* flags */ 0, 325 }, 326 #endif /* chips */ 327 328 #if defined(BCM_56624_A0) || defined(BCM_56624_B0) 329 { /* SOC_FORMAT_INT_XGPORT_TO_IP_CTRL_BUSfmt */ 330 /* format XGPORT_TO_IP_CTRL_BUSfmt */ 331 /* nFields */ 7, 332 /* *fields */ soc_XGPORT_TO_IP_CTRL_BUSfmt_fields, 333 /* bits */ 17, 334 /* flags */ 0, 335 }, 336 #endif /* chips */ 337 338 #if defined(BCM_56680_A0) 339 { /* SOC_FORMAT_INT_XGPORT_TO_IP_CTRL_BUS_BCM56680_A0fmt */ 340 /* format XGPORT_TO_IP_CTRL_BUSfmt */ 341 /* nFields */ 7, 342 /* *fields */ soc_XGPORT_TO_IP_CTRL_BUSfmt_fields, 343 /* bits */ 17, 344 /* flags */ 0, 345 }, 346 #endif /* chips */ 347 348 #if defined(BCM_56680_B0) 349 { /* SOC_FORMAT_INT_XGPORT_TO_IP_CTRL_BUS_BCM56680_B0fmt */ 350 /* format XGPORT_TO_IP_CTRL_BUSfmt */ 351 /* nFields */ 7, 352 /* *fields */ soc_XGPORT_TO_IP_CTRL_BUSfmt_fields, 353 /* bits */ 17, 354 /* flags */ 0, 355 }, 356 #endif /* chips */ 357 358 #if defined(BCM_56960_A0) || defined(BCM_56965_A0) 359 { /* SOC_FORMAT_INT_XPE_ENQ_TO_PQE_INFOfmt */ 360 /* format XPE_ENQ_TO_PQE_INFOfmt */ 361 /* nFields */ 6, 362 /* *fields */ soc_XPE_ENQ_TO_PQE_INFOfmt_fields, 363 /* bits */ 25, 364 /* flags */ 0, 365 }, 366 #endif /* chips */ 367 368 #if defined(BCM_56370_A0) 369 { /* SOC_FORMAT_INT_XPE_ENQ_TO_PQE_INFO_BCM56370_A0fmt */ 370 /* format XPE_ENQ_TO_PQE_INFOfmt */ 371 /* nFields */ 6, 372 /* *fields */ soc_XPE_ENQ_TO_PQE_INFO_BCM56370_A0fmt_fields, 373 /* bits */ 27, 374 /* flags */ 0, 375 }, 376 #endif /* chips */ 377 378 #if defined(BCM_56770_A0) 379 { /* SOC_FORMAT_INT_XPE_ENQ_TO_PQE_INFO_BCM56770_A0fmt */ 380 /* format XPE_ENQ_TO_PQE_INFOfmt */ 381 /* nFields */ 6, 382 /* *fields */ soc_XPE_ENQ_TO_PQE_INFO_BCM56870_A0fmt_fields, 383 /* bits */ 29, 384 /* flags */ 0, 385 }, 386 #endif /* chips */ 387 388 #if defined(BCM_56870_A0) 389 { /* SOC_FORMAT_INT_XPE_ENQ_TO_PQE_INFO_BCM56870_A0fmt */ 390 /* format XPE_ENQ_TO_PQE_INFOfmt */ 391 /* nFields */ 6, 392 /* *fields */ soc_XPE_ENQ_TO_PQE_INFO_BCM56870_A0fmt_fields, 393 /* bits */ 29, 394 /* flags */ 0, 395 }, 396 #endif /* chips */ 397 398 #if defined(BCM_56970_A0) 399 { /* SOC_FORMAT_INT_XPE_ENQ_TO_PQE_INFO_BCM56970_A0fmt */ 400 /* format XPE_ENQ_TO_PQE_INFOfmt */ 401 /* nFields */ 6, 402 /* *fields */ soc_XPE_ENQ_TO_PQE_INFO_BCM56970_A0fmt_fields, 403 /* bits */ 26, 404 /* flags */ 0, 405 }, 406 #endif /* chips */ 407 408 #if defined(BCM_56142_A0) 409 { /* SOC_FORMAT_INT_XPORT_XQHDR_S_RFfmt */ 410 /* format XPORT_XQHDR_S_RFfmt */ 411 /* nFields */ 1, 412 /* *fields */ soc_AGING_CTR_S_RF_BCM56142_A0fmt_fields, 413 /* bits */ 18, 414 /* flags */ 0, 415 }, 416 #endif /* chips */ 417 418 #if defined(BCM_56624_A0) || defined(BCM_56680_A0) 419 { /* SOC_FORMAT_INT_XPPORT_TO_IP_CONTROL_WORDfmt */ 420 /* format XPPORT_TO_IP_CONTROL_WORDfmt */ 421 /* nFields */ 7, 422 /* *fields */ soc_XGPORT_TO_IP_CONTROL_WORDfmt_fields, 423 /* bits */ 17, 424 /* flags */ 0, 425 }, 426 #endif /* chips */ 427 428 #if defined(BCM_56624_B0) 429 { /* SOC_FORMAT_INT_XPPORT_TO_IP_CONTROL_WORD_BCM56624_B0fmt */ 430 /* format XPPORT_TO_IP_CONTROL_WORDfmt */ 431 /* nFields */ 7, 432 /* *fields */ soc_XGPORT_TO_IP_CONTROL_WORDfmt_fields, 433 /* bits */ 17, 434 /* flags */ 0, 435 }, 436 #endif /* chips */ 437 438 #if defined(BCM_56680_B0) 439 { /* SOC_FORMAT_INT_XPPORT_TO_IP_CONTROL_WORD_BCM56680_B0fmt */ 440 /* format XPPORT_TO_IP_CONTROL_WORDfmt */ 441 /* nFields */ 7, 442 /* *fields */ soc_XGPORT_TO_IP_CONTROL_WORDfmt_fields, 443 /* bits */ 17, 444 /* flags */ 0, 445 }, 446 #endif /* chips */ 447 448 #if defined(BCM_56142_A0) 449 { /* SOC_FORMAT_INT_XQFREE_S_RFfmt */ 450 /* format XQFREE_S_RFfmt */ 451 /* nFields */ 1, 452 /* *fields */ soc_XQFREE_S_RFfmt_fields, 453 /* bits */ 9, 454 /* flags */ 0, 455 }, 456 #endif /* chips */ 457 458 #if defined(BCM_56142_A0) 459 { /* SOC_FORMAT_INT_XQNEXT_S_RFfmt */ 460 /* format XQNEXT_S_RFfmt */ 461 /* nFields */ 1, 462 /* *fields */ soc_AGING_CTR_S_RF_BCM56142_A0fmt_fields, 463 /* bits */ 18, 464 /* flags */ 0, 465 }, 466 #endif /* chips */ 467 468 #if defined(BCM_56440_A0) 469 { /* SOC_FORMAT_INT_XQPORT_TO_EP_PORT_MODE_BUSfmt */ 470 /* format XQPORT_TO_EP_PORT_MODE_BUSfmt */ 471 /* nFields */ 1, 472 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUSfmt_fields, 473 /* bits */ 2, 474 /* flags */ 0, 475 }, 476 #endif /* chips */ 477 478 #if defined(BCM_56260_A0) 479 { /* SOC_FORMAT_INT_XQPORT_TO_EP_PORT_MODE_BUS_BCM56260_A0fmt */ 480 /* format XQPORT_TO_EP_PORT_MODE_BUSfmt */ 481 /* nFields */ 1, 482 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56960_A0fmt_fields, 483 /* bits */ 2, 484 /* flags */ 0, 485 }, 486 #endif /* chips */ 487 488 #if defined(BCM_56260_B0) 489 { /* SOC_FORMAT_INT_XQPORT_TO_EP_PORT_MODE_BUS_BCM56260_B0fmt */ 490 /* format XQPORT_TO_EP_PORT_MODE_BUSfmt */ 491 /* nFields */ 1, 492 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56960_A0fmt_fields, 493 /* bits */ 2, 494 /* flags */ 0, 495 }, 496 #endif /* chips */ 497 498 #if defined(BCM_56270_A0) 499 { /* SOC_FORMAT_INT_XQPORT_TO_EP_PORT_MODE_BUS_BCM56270_A0fmt */ 500 /* format XQPORT_TO_EP_PORT_MODE_BUSfmt */ 501 /* nFields */ 1, 502 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56960_A0fmt_fields, 503 /* bits */ 2, 504 /* flags */ 0, 505 }, 506 #endif /* chips */ 507 508 #if defined(BCM_56440_B0) 509 { /* SOC_FORMAT_INT_XQPORT_TO_EP_PORT_MODE_BUS_BCM56440_B0fmt */ 510 /* format XQPORT_TO_EP_PORT_MODE_BUSfmt */ 511 /* nFields */ 1, 512 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUSfmt_fields, 513 /* bits */ 2, 514 /* flags */ 0, 515 }, 516 #endif /* chips */ 517 518 #if defined(BCM_56450_A0) 519 { /* SOC_FORMAT_INT_XQPORT_TO_EP_PORT_MODE_BUS_BCM56450_A0fmt */ 520 /* format XQPORT_TO_EP_PORT_MODE_BUSfmt */ 521 /* nFields */ 1, 522 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56640_A0fmt_fields, 523 /* bits */ 2, 524 /* flags */ 0, 525 }, 526 #endif /* chips */ 527 528 #if defined(BCM_56450_B0) 529 { /* SOC_FORMAT_INT_XQPORT_TO_EP_PORT_MODE_BUS_BCM56450_B0fmt */ 530 /* format XQPORT_TO_EP_PORT_MODE_BUSfmt */ 531 /* nFields */ 1, 532 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56640_A0fmt_fields, 533 /* bits */ 2, 534 /* flags */ 0, 535 }, 536 #endif /* chips */ 537 538 #if defined(BCM_56450_B1) 539 { /* SOC_FORMAT_INT_XQPORT_TO_EP_PORT_MODE_BUS_BCM56450_B1fmt */ 540 /* format XQPORT_TO_EP_PORT_MODE_BUSfmt */ 541 /* nFields */ 1, 542 /* *fields */ soc_XGPORT_TO_EP_PORT_MODE_BUS_BCM56640_A0fmt_fields, 543 /* bits */ 2, 544 /* flags */ 0, 545 }, 546 #endif /* chips */ 547