allformats_w.i (29664B)
1 /* 2 * DO NOT EDIT THIS FILE! 3 * This file is auto-generated from the registers file. 4 * Edits to this file will be lost when it is regenerated. 5 * 6 * 7 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 8 * 9 * Copyright 2007-2020 Broadcom Inc. All rights reserved. 10 * 11 * File: allformats_w.i 12 * Purpose: Independent format descriptions. 13 */ 14 15 #if defined(BCM_56524_B0) || defined(BCM_56634_A0) || \ 16 defined(BCM_56634_B0) 17 { /* SOC_FORMAT_INT_WAMU_CNTX_TBfmt */ 18 /* format WAMU_CNTX_TBfmt */ 19 /* nFields */ 11, 20 /* *fields */ soc_WAMU_CNTX_TBfmt_fields, 21 /* bits */ 513, 22 /* flags */ 0, 23 }, 24 #endif /* chips */ 25 26 #if defined(BCM_56340_A0) 27 { /* SOC_FORMAT_INT_WAMU_CNTX_TB_BCM56340_A0fmt */ 28 /* format WAMU_CNTX_TBfmt */ 29 /* nFields */ 11, 30 /* *fields */ soc_WAMU_CNTX_TB_BCM56640_A0fmt_fields, 31 /* bits */ 1025, 32 /* flags */ 0, 33 }, 34 #endif /* chips */ 35 36 #if defined(BCM_56524_A0) 37 { /* SOC_FORMAT_INT_WAMU_CNTX_TB_BCM56524_A0fmt */ 38 /* format WAMU_CNTX_TBfmt */ 39 /* nFields */ 11, 40 /* *fields */ soc_WAMU_CNTX_TBfmt_fields, 41 /* bits */ 513, 42 /* flags */ 0, 43 }, 44 #endif /* chips */ 45 46 #if defined(BCM_56640_A0) 47 { /* SOC_FORMAT_INT_WAMU_CNTX_TB_BCM56640_A0fmt */ 48 /* format WAMU_CNTX_TBfmt */ 49 /* nFields */ 11, 50 /* *fields */ soc_WAMU_CNTX_TB_BCM56640_A0fmt_fields, 51 /* bits */ 1025, 52 /* flags */ 0, 53 }, 54 #endif /* chips */ 55 56 #if defined(BCM_56685_A0) 57 { /* SOC_FORMAT_INT_WAMU_CNTX_TB_BCM56685_A0fmt */ 58 /* format WAMU_CNTX_TBfmt */ 59 /* nFields */ 11, 60 /* *fields */ soc_WAMU_CNTX_TBfmt_fields, 61 /* bits */ 513, 62 /* flags */ 0, 63 }, 64 #endif /* chips */ 65 66 #if defined(BCM_56685_B0) 67 { /* SOC_FORMAT_INT_WAMU_CNTX_TB_BCM56685_B0fmt */ 68 /* format WAMU_CNTX_TBfmt */ 69 /* nFields */ 11, 70 /* *fields */ soc_WAMU_CNTX_TBfmt_fields, 71 /* bits */ 513, 72 /* flags */ 0, 73 }, 74 #endif /* chips */ 75 76 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 77 { /* SOC_FORMAT_INT_WAMU_PURGEfmt */ 78 /* format WAMU_PURGEfmt */ 79 /* nFields */ 2, 80 /* *fields */ soc_WAMU_PURGEfmt_fields, 81 /* bits */ 17, 82 /* flags */ 0, 83 }, 84 #endif /* chips */ 85 86 #if defined(BCM_56440_A0) || defined(BCM_56440_B0) || \ 87 defined(BCM_56524_B0) || defined(BCM_56634_A0) || \ 88 defined(BCM_56634_B0) || defined(BCM_56685_A0) || \ 89 defined(BCM_56685_B0) || defined(BCM_56840_A0) || \ 90 defined(BCM_56840_B0) 91 { /* SOC_FORMAT_INT_WAMU_S_RFfmt */ 92 /* format WAMU_S_RFfmt */ 93 /* nFields */ 1, 94 /* *fields */ soc_WAMU_S_RFfmt_fields, 95 /* bits */ 24, 96 /* flags */ 0, 97 }, 98 #endif /* chips */ 99 100 #if defined(BCM_56260_A0) 101 { /* SOC_FORMAT_INT_WAMU_S_RF_BCM56260_A0fmt */ 102 /* format WAMU_S_RFfmt */ 103 /* nFields */ 1, 104 /* *fields */ soc_WAMU_S_RF_BCM56260_A0fmt_fields, 105 /* bits */ 24, 106 /* flags */ 0, 107 }, 108 #endif /* chips */ 109 110 #if defined(BCM_56260_B0) 111 { /* SOC_FORMAT_INT_WAMU_S_RF_BCM56260_B0fmt */ 112 /* format WAMU_S_RFfmt */ 113 /* nFields */ 1, 114 /* *fields */ soc_WAMU_S_RF_BCM56260_A0fmt_fields, 115 /* bits */ 24, 116 /* flags */ 0, 117 }, 118 #endif /* chips */ 119 120 #if defined(BCM_56270_A0) 121 { /* SOC_FORMAT_INT_WAMU_S_RF_BCM56270_A0fmt */ 122 /* format WAMU_S_RFfmt */ 123 /* nFields */ 1, 124 /* *fields */ soc_WAMU_S_RF_BCM56260_A0fmt_fields, 125 /* bits */ 24, 126 /* flags */ 0, 127 }, 128 #endif /* chips */ 129 130 #if defined(BCM_56340_A0) 131 { /* SOC_FORMAT_INT_WAMU_S_RF_BCM56340_A0fmt */ 132 /* format WAMU_S_RFfmt */ 133 /* nFields */ 2, 134 /* *fields */ soc_WAMU_S_RF_BCM56640_A0fmt_fields, 135 /* bits */ 32, 136 /* flags */ 0, 137 }, 138 #endif /* chips */ 139 140 #if defined(BCM_56450_A0) 141 { /* SOC_FORMAT_INT_WAMU_S_RF_BCM56450_A0fmt */ 142 /* format WAMU_S_RFfmt */ 143 /* nFields */ 1, 144 /* *fields */ soc_WAMU_S_RF_BCM56450_A0fmt_fields, 145 /* bits */ 24, 146 /* flags */ 0, 147 }, 148 #endif /* chips */ 149 150 #if defined(BCM_56450_B0) 151 { /* SOC_FORMAT_INT_WAMU_S_RF_BCM56450_B0fmt */ 152 /* format WAMU_S_RFfmt */ 153 /* nFields */ 1, 154 /* *fields */ soc_WAMU_S_RF_BCM56450_A0fmt_fields, 155 /* bits */ 24, 156 /* flags */ 0, 157 }, 158 #endif /* chips */ 159 160 #if defined(BCM_56450_B1) 161 { /* SOC_FORMAT_INT_WAMU_S_RF_BCM56450_B1fmt */ 162 /* format WAMU_S_RFfmt */ 163 /* nFields */ 1, 164 /* *fields */ soc_WAMU_S_RF_BCM56450_A0fmt_fields, 165 /* bits */ 24, 166 /* flags */ 0, 167 }, 168 #endif /* chips */ 169 170 #if defined(BCM_56524_A0) 171 { /* SOC_FORMAT_INT_WAMU_S_RF_BCM56524_A0fmt */ 172 /* format WAMU_S_RFfmt */ 173 /* nFields */ 1, 174 /* *fields */ soc_WAMU_S_RFfmt_fields, 175 /* bits */ 24, 176 /* flags */ 0, 177 }, 178 #endif /* chips */ 179 180 #if defined(BCM_56640_A0) 181 { /* SOC_FORMAT_INT_WAMU_S_RF_BCM56640_A0fmt */ 182 /* format WAMU_S_RFfmt */ 183 /* nFields */ 2, 184 /* *fields */ soc_WAMU_S_RF_BCM56640_A0fmt_fields, 185 /* bits */ 32, 186 /* flags */ 0, 187 }, 188 #endif /* chips */ 189 190 #if defined(BCM_56524_B0) || defined(BCM_56634_A0) || \ 191 defined(BCM_56634_B0) || defined(BCM_56685_A0) 192 { /* SOC_FORMAT_INT_WAMU_TO_TOQ_INFOfmt */ 193 /* format WAMU_TO_TOQ_INFOfmt */ 194 /* nFields */ 15, 195 /* *fields */ soc_WAMU_TO_TOQ_INFOfmt_fields, 196 /* bits */ 79, 197 /* flags */ 0, 198 }, 199 #endif /* chips */ 200 201 #if defined(BCM_56340_A0) 202 { /* SOC_FORMAT_INT_WAMU_TO_TOQ_INFO_BCM56340_A0fmt */ 203 /* format WAMU_TO_TOQ_INFOfmt */ 204 /* nFields */ 7, 205 /* *fields */ soc_WAMU_TO_TOQ_INFO_BCM56640_A0fmt_fields, 206 /* bits */ 39, 207 /* flags */ 0, 208 }, 209 #endif /* chips */ 210 211 #if defined(BCM_56524_A0) 212 { /* SOC_FORMAT_INT_WAMU_TO_TOQ_INFO_BCM56524_A0fmt */ 213 /* format WAMU_TO_TOQ_INFOfmt */ 214 /* nFields */ 15, 215 /* *fields */ soc_WAMU_TO_TOQ_INFOfmt_fields, 216 /* bits */ 79, 217 /* flags */ 0, 218 }, 219 #endif /* chips */ 220 221 #if defined(BCM_56640_A0) 222 { /* SOC_FORMAT_INT_WAMU_TO_TOQ_INFO_BCM56640_A0fmt */ 223 /* format WAMU_TO_TOQ_INFOfmt */ 224 /* nFields */ 7, 225 /* *fields */ soc_WAMU_TO_TOQ_INFO_BCM56640_A0fmt_fields, 226 /* bits */ 39, 227 /* flags */ 0, 228 }, 229 #endif /* chips */ 230 231 #if defined(BCM_56685_B0) 232 { /* SOC_FORMAT_INT_WAMU_TO_TOQ_INFO_BCM56685_B0fmt */ 233 /* format WAMU_TO_TOQ_INFOfmt */ 234 /* nFields */ 15, 235 /* *fields */ soc_WAMU_TO_TOQ_INFOfmt_fields, 236 /* bits */ 79, 237 /* flags */ 0, 238 }, 239 #endif /* chips */ 240 241 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 242 defined(BCM_56870_A0) 243 { /* SOC_FORMAT_INT_WESP_HDRfmt */ 244 /* format WESP_HDRfmt */ 245 /* nFields */ 7, 246 /* *fields */ soc_WESP_HDRfmt_fields, 247 /* bits */ 32, 248 /* flags */ 0, 249 }, 250 #endif /* chips */ 251 252 #if defined(BCM_56524_B0) || defined(BCM_56624_A0) || \ 253 defined(BCM_56624_B0) || defined(BCM_56634_A0) || \ 254 defined(BCM_56634_B0) || defined(BCM_56680_A0) || \ 255 defined(BCM_56685_A0) 256 { /* SOC_FORMAT_INT_WRED_CELL_THD_0_FIELDSfmt */ 257 /* format WRED_CELL_THD_0_FIELDSfmt */ 258 /* nFields */ 8, 259 /* *fields */ soc_WRED_CELL_THD_0_FIELDSfmt_fields, 260 /* bits */ 62, 261 /* flags */ 0, 262 }, 263 #endif /* chips */ 264 265 #if defined(BCM_56334_A0) 266 { /* SOC_FORMAT_INT_WRED_CELL_THD_0_FIELDS_BCM56334_A0fmt */ 267 /* format WRED_CELL_THD_0_FIELDSfmt */ 268 /* nFields */ 8, 269 /* *fields */ soc_WRED_CELL_THD_0_FIELDS_BCM56820_A0fmt_fields, 270 /* bits */ 58, 271 /* flags */ 0, 272 }, 273 #endif /* chips */ 274 275 #if defined(BCM_56334_B0) 276 { /* SOC_FORMAT_INT_WRED_CELL_THD_0_FIELDS_BCM56334_B0fmt */ 277 /* format WRED_CELL_THD_0_FIELDSfmt */ 278 /* nFields */ 8, 279 /* *fields */ soc_WRED_CELL_THD_0_FIELDS_BCM56820_A0fmt_fields, 280 /* bits */ 58, 281 /* flags */ 0, 282 }, 283 #endif /* chips */ 284 285 #if defined(BCM_56524_A0) 286 { /* SOC_FORMAT_INT_WRED_CELL_THD_0_FIELDS_BCM56524_A0fmt */ 287 /* format WRED_CELL_THD_0_FIELDSfmt */ 288 /* nFields */ 8, 289 /* *fields */ soc_WRED_CELL_THD_0_FIELDSfmt_fields, 290 /* bits */ 62, 291 /* flags */ 0, 292 }, 293 #endif /* chips */ 294 295 #if defined(BCM_56680_B0) 296 { /* SOC_FORMAT_INT_WRED_CELL_THD_0_FIELDS_BCM56680_B0fmt */ 297 /* format WRED_CELL_THD_0_FIELDSfmt */ 298 /* nFields */ 8, 299 /* *fields */ soc_WRED_CELL_THD_0_FIELDSfmt_fields, 300 /* bits */ 62, 301 /* flags */ 0, 302 }, 303 #endif /* chips */ 304 305 #if defined(BCM_56685_B0) 306 { /* SOC_FORMAT_INT_WRED_CELL_THD_0_FIELDS_BCM56685_B0fmt */ 307 /* format WRED_CELL_THD_0_FIELDSfmt */ 308 /* nFields */ 8, 309 /* *fields */ soc_WRED_CELL_THD_0_FIELDSfmt_fields, 310 /* bits */ 62, 311 /* flags */ 0, 312 }, 313 #endif /* chips */ 314 315 #if defined(BCM_56725_A0) 316 { /* SOC_FORMAT_INT_WRED_CELL_THD_0_FIELDS_BCM56725_A0fmt */ 317 /* format WRED_CELL_THD_0_FIELDSfmt */ 318 /* nFields */ 8, 319 /* *fields */ soc_WRED_CELL_THD_0_FIELDS_BCM56820_A0fmt_fields, 320 /* bits */ 58, 321 /* flags */ 0, 322 }, 323 #endif /* chips */ 324 325 #if defined(BCM_56820_A0) 326 { /* SOC_FORMAT_INT_WRED_CELL_THD_0_FIELDS_BCM56820_A0fmt */ 327 /* format WRED_CELL_THD_0_FIELDSfmt */ 328 /* nFields */ 8, 329 /* *fields */ soc_WRED_CELL_THD_0_FIELDS_BCM56820_A0fmt_fields, 330 /* bits */ 58, 331 /* flags */ 0, 332 }, 333 #endif /* chips */ 334 335 #if defined(BCM_88732_A0) 336 { /* SOC_FORMAT_INT_WRED_CELL_THD_0_FIELDS_BCM88732_A0fmt */ 337 /* format WRED_CELL_THD_0_FIELDSfmt */ 338 /* nFields */ 13, 339 /* *fields */ soc_WRED_CELL_THD_0_FIELDS_BCM88732_A0fmt_fields, 340 /* bits */ 76, 341 /* flags */ 0, 342 }, 343 #endif /* chips */ 344 345 #if defined(BCM_56524_A0) || defined(BCM_56524_B0) || \ 346 defined(BCM_56624_A0) || defined(BCM_56624_B0) || \ 347 defined(BCM_56680_A0) || defined(BCM_56680_B0) || \ 348 defined(BCM_56685_A0) || defined(BCM_56685_B0) 349 { /* SOC_FORMAT_INT_WRED_CELL_THD_1_FIELDSfmt */ 350 /* format WRED_CELL_THD_1_FIELDSfmt */ 351 /* nFields */ 8, 352 /* *fields */ soc_WRED_CELL_THD_1_FIELDSfmt_fields, 353 /* bits */ 62, 354 /* flags */ 0, 355 }, 356 #endif /* chips */ 357 358 #if defined(BCM_56334_A0) 359 { /* SOC_FORMAT_INT_WRED_CELL_THD_1_FIELDS_BCM56334_A0fmt */ 360 /* format WRED_CELL_THD_1_FIELDSfmt */ 361 /* nFields */ 8, 362 /* *fields */ soc_WRED_CELL_THD_1_FIELDS_BCM56820_A0fmt_fields, 363 /* bits */ 58, 364 /* flags */ 0, 365 }, 366 #endif /* chips */ 367 368 #if defined(BCM_56334_B0) 369 { /* SOC_FORMAT_INT_WRED_CELL_THD_1_FIELDS_BCM56334_B0fmt */ 370 /* format WRED_CELL_THD_1_FIELDSfmt */ 371 /* nFields */ 8, 372 /* *fields */ soc_WRED_CELL_THD_1_FIELDS_BCM56820_A0fmt_fields, 373 /* bits */ 58, 374 /* flags */ 0, 375 }, 376 #endif /* chips */ 377 378 #if defined(BCM_56634_A0) 379 { /* SOC_FORMAT_INT_WRED_CELL_THD_1_FIELDS_BCM56634_A0fmt */ 380 /* format WRED_CELL_THD_1_FIELDSfmt */ 381 /* nFields */ 8, 382 /* *fields */ soc_WRED_CELL_THD_1_FIELDSfmt_fields, 383 /* bits */ 62, 384 /* flags */ 0, 385 }, 386 #endif /* chips */ 387 388 #if defined(BCM_56634_B0) 389 { /* SOC_FORMAT_INT_WRED_CELL_THD_1_FIELDS_BCM56634_B0fmt */ 390 /* format WRED_CELL_THD_1_FIELDSfmt */ 391 /* nFields */ 8, 392 /* *fields */ soc_WRED_CELL_THD_1_FIELDSfmt_fields, 393 /* bits */ 62, 394 /* flags */ 0, 395 }, 396 #endif /* chips */ 397 398 #if defined(BCM_56725_A0) 399 { /* SOC_FORMAT_INT_WRED_CELL_THD_1_FIELDS_BCM56725_A0fmt */ 400 /* format WRED_CELL_THD_1_FIELDSfmt */ 401 /* nFields */ 8, 402 /* *fields */ soc_WRED_CELL_THD_1_FIELDS_BCM56820_A0fmt_fields, 403 /* bits */ 58, 404 /* flags */ 0, 405 }, 406 #endif /* chips */ 407 408 #if defined(BCM_56820_A0) 409 { /* SOC_FORMAT_INT_WRED_CELL_THD_1_FIELDS_BCM56820_A0fmt */ 410 /* format WRED_CELL_THD_1_FIELDSfmt */ 411 /* nFields */ 8, 412 /* *fields */ soc_WRED_CELL_THD_1_FIELDS_BCM56820_A0fmt_fields, 413 /* bits */ 58, 414 /* flags */ 0, 415 }, 416 #endif /* chips */ 417 418 #if defined(BCM_88732_A0) 419 { /* SOC_FORMAT_INT_WRED_CELL_THD_1_FIELDS_BCM88732_A0fmt */ 420 /* format WRED_CELL_THD_1_FIELDSfmt */ 421 /* nFields */ 13, 422 /* *fields */ soc_WRED_CELL_THD_1_FIELDS_BCM88732_A0fmt_fields, 423 /* bits */ 76, 424 /* flags */ 0, 425 }, 426 #endif /* chips */ 427 428 #if defined(BCM_56624_A0) || defined(BCM_56624_B0) 429 { /* SOC_FORMAT_INT_WRED_CFG_CELL_FIELDSfmt */ 430 /* format WRED_CFG_CELL_FIELDSfmt */ 431 /* nFields */ 12, 432 /* *fields */ soc_WRED_CFG_CELL_FIELDSfmt_fields, 433 /* bits */ 54, 434 /* flags */ 0, 435 }, 436 #endif /* chips */ 437 438 #if defined(BCM_56334_A0) 439 { /* SOC_FORMAT_INT_WRED_CFG_CELL_FIELDS_BCM56334_A0fmt */ 440 /* format WRED_CFG_CELL_FIELDSfmt */ 441 /* nFields */ 12, 442 /* *fields */ soc_WRED_CFG_CELL_FIELDSfmt_fields, 443 /* bits */ 54, 444 /* flags */ 0, 445 }, 446 #endif /* chips */ 447 448 #if defined(BCM_56334_B0) 449 { /* SOC_FORMAT_INT_WRED_CFG_CELL_FIELDS_BCM56334_B0fmt */ 450 /* format WRED_CFG_CELL_FIELDSfmt */ 451 /* nFields */ 12, 452 /* *fields */ soc_WRED_CFG_CELL_FIELDSfmt_fields, 453 /* bits */ 54, 454 /* flags */ 0, 455 }, 456 #endif /* chips */ 457 458 #if defined(BCM_56524_A0) 459 { /* SOC_FORMAT_INT_WRED_CFG_CELL_FIELDS_BCM56524_A0fmt */ 460 /* format WRED_CFG_CELL_FIELDSfmt */ 461 /* nFields */ 12, 462 /* *fields */ soc_WRED_CFG_CELL_FIELDSfmt_fields, 463 /* bits */ 54, 464 /* flags */ 0, 465 }, 466 #endif /* chips */ 467 468 #if defined(BCM_56524_B0) 469 { /* SOC_FORMAT_INT_WRED_CFG_CELL_FIELDS_BCM56524_B0fmt */ 470 /* format WRED_CFG_CELL_FIELDSfmt */ 471 /* nFields */ 12, 472 /* *fields */ soc_WRED_CFG_CELL_FIELDSfmt_fields, 473 /* bits */ 54, 474 /* flags */ 0, 475 }, 476 #endif /* chips */ 477 478 #if defined(BCM_56634_A0) 479 { /* SOC_FORMAT_INT_WRED_CFG_CELL_FIELDS_BCM56634_A0fmt */ 480 /* format WRED_CFG_CELL_FIELDSfmt */ 481 /* nFields */ 12, 482 /* *fields */ soc_WRED_CFG_CELL_FIELDSfmt_fields, 483 /* bits */ 54, 484 /* flags */ 0, 485 }, 486 #endif /* chips */ 487 488 #if defined(BCM_56634_B0) 489 { /* SOC_FORMAT_INT_WRED_CFG_CELL_FIELDS_BCM56634_B0fmt */ 490 /* format WRED_CFG_CELL_FIELDSfmt */ 491 /* nFields */ 12, 492 /* *fields */ soc_WRED_CFG_CELL_FIELDSfmt_fields, 493 /* bits */ 54, 494 /* flags */ 0, 495 }, 496 #endif /* chips */ 497 498 #if defined(BCM_56680_A0) 499 { /* SOC_FORMAT_INT_WRED_CFG_CELL_FIELDS_BCM56680_A0fmt */ 500 /* format WRED_CFG_CELL_FIELDSfmt */ 501 /* nFields */ 12, 502 /* *fields */ soc_WRED_CFG_CELL_FIELDSfmt_fields, 503 /* bits */ 54, 504 /* flags */ 0, 505 }, 506 #endif /* chips */ 507 508 #if defined(BCM_56680_B0) 509 { /* SOC_FORMAT_INT_WRED_CFG_CELL_FIELDS_BCM56680_B0fmt */ 510 /* format WRED_CFG_CELL_FIELDSfmt */ 511 /* nFields */ 12, 512 /* *fields */ soc_WRED_CFG_CELL_FIELDSfmt_fields, 513 /* bits */ 54, 514 /* flags */ 0, 515 }, 516 #endif /* chips */ 517 518 #if defined(BCM_56685_A0) 519 { /* SOC_FORMAT_INT_WRED_CFG_CELL_FIELDS_BCM56685_A0fmt */ 520 /* format WRED_CFG_CELL_FIELDSfmt */ 521 /* nFields */ 12, 522 /* *fields */ soc_WRED_CFG_CELL_FIELDSfmt_fields, 523 /* bits */ 54, 524 /* flags */ 0, 525 }, 526 #endif /* chips */ 527 528 #if defined(BCM_56685_B0) 529 { /* SOC_FORMAT_INT_WRED_CFG_CELL_FIELDS_BCM56685_B0fmt */ 530 /* format WRED_CFG_CELL_FIELDSfmt */ 531 /* nFields */ 12, 532 /* *fields */ soc_WRED_CFG_CELL_FIELDSfmt_fields, 533 /* bits */ 54, 534 /* flags */ 0, 535 }, 536 #endif /* chips */ 537 538 #if defined(BCM_56725_A0) 539 { /* SOC_FORMAT_INT_WRED_CFG_CELL_FIELDS_BCM56725_A0fmt */ 540 /* format WRED_CFG_CELL_FIELDSfmt */ 541 /* nFields */ 12, 542 /* *fields */ soc_WRED_CFG_CELL_FIELDS_BCM56820_A0fmt_fields, 543 /* bits */ 54, 544 /* flags */ 0, 545 }, 546 #endif /* chips */ 547 548 #if defined(BCM_56820_A0) 549 { /* SOC_FORMAT_INT_WRED_CFG_CELL_FIELDS_BCM56820_A0fmt */ 550 /* format WRED_CFG_CELL_FIELDSfmt */ 551 /* nFields */ 12, 552 /* *fields */ soc_WRED_CFG_CELL_FIELDS_BCM56820_A0fmt_fields, 553 /* bits */ 54, 554 /* flags */ 0, 555 }, 556 #endif /* chips */ 557 558 #if defined(BCM_88732_A0) 559 { /* SOC_FORMAT_INT_WRED_CFG_CELL_FIELDS_BCM88732_A0fmt */ 560 /* format WRED_CFG_CELL_FIELDSfmt */ 561 /* nFields */ 16, 562 /* *fields */ soc_WRED_CFG_CELL_FIELDS_BCM88732_A0fmt_fields, 563 /* bits */ 63, 564 /* flags */ 0, 565 }, 566 #endif /* chips */ 567 568 #if defined(BCM_56624_A0) || defined(BCM_56624_B0) 569 { /* SOC_FORMAT_INT_WRED_CFG_PACKET_FIELDSfmt */ 570 /* format WRED_CFG_PACKET_FIELDSfmt */ 571 /* nFields */ 12, 572 /* *fields */ soc_WRED_CFG_PACKET_FIELDSfmt_fields, 573 /* bits */ 54, 574 /* flags */ 0, 575 }, 576 #endif /* chips */ 577 578 #if defined(BCM_56334_A0) 579 { /* SOC_FORMAT_INT_WRED_CFG_PACKET_FIELDS_BCM56334_A0fmt */ 580 /* format WRED_CFG_PACKET_FIELDSfmt */ 581 /* nFields */ 12, 582 /* *fields */ soc_WRED_CFG_PACKET_FIELDSfmt_fields, 583 /* bits */ 54, 584 /* flags */ 0, 585 }, 586 #endif /* chips */ 587 588 #if defined(BCM_56334_B0) 589 { /* SOC_FORMAT_INT_WRED_CFG_PACKET_FIELDS_BCM56334_B0fmt */ 590 /* format WRED_CFG_PACKET_FIELDSfmt */ 591 /* nFields */ 12, 592 /* *fields */ soc_WRED_CFG_PACKET_FIELDSfmt_fields, 593 /* bits */ 54, 594 /* flags */ 0, 595 }, 596 #endif /* chips */ 597 598 #if defined(BCM_56524_A0) 599 { /* SOC_FORMAT_INT_WRED_CFG_PACKET_FIELDS_BCM56524_A0fmt */ 600 /* format WRED_CFG_PACKET_FIELDSfmt */ 601 /* nFields */ 12, 602 /* *fields */ soc_WRED_CFG_PACKET_FIELDSfmt_fields, 603 /* bits */ 54, 604 /* flags */ 0, 605 }, 606 #endif /* chips */ 607 608 #if defined(BCM_56524_B0) 609 { /* SOC_FORMAT_INT_WRED_CFG_PACKET_FIELDS_BCM56524_B0fmt */ 610 /* format WRED_CFG_PACKET_FIELDSfmt */ 611 /* nFields */ 12, 612 /* *fields */ soc_WRED_CFG_PACKET_FIELDSfmt_fields, 613 /* bits */ 54, 614 /* flags */ 0, 615 }, 616 #endif /* chips */ 617 618 #if defined(BCM_56634_A0) 619 { /* SOC_FORMAT_INT_WRED_CFG_PACKET_FIELDS_BCM56634_A0fmt */ 620 /* format WRED_CFG_PACKET_FIELDSfmt */ 621 /* nFields */ 12, 622 /* *fields */ soc_WRED_CFG_PACKET_FIELDSfmt_fields, 623 /* bits */ 54, 624 /* flags */ 0, 625 }, 626 #endif /* chips */ 627 628 #if defined(BCM_56634_B0) 629 { /* SOC_FORMAT_INT_WRED_CFG_PACKET_FIELDS_BCM56634_B0fmt */ 630 /* format WRED_CFG_PACKET_FIELDSfmt */ 631 /* nFields */ 12, 632 /* *fields */ soc_WRED_CFG_PACKET_FIELDSfmt_fields, 633 /* bits */ 54, 634 /* flags */ 0, 635 }, 636 #endif /* chips */ 637 638 #if defined(BCM_56680_A0) 639 { /* SOC_FORMAT_INT_WRED_CFG_PACKET_FIELDS_BCM56680_A0fmt */ 640 /* format WRED_CFG_PACKET_FIELDSfmt */ 641 /* nFields */ 12, 642 /* *fields */ soc_WRED_CFG_PACKET_FIELDSfmt_fields, 643 /* bits */ 54, 644 /* flags */ 0, 645 }, 646 #endif /* chips */ 647 648 #if defined(BCM_56680_B0) 649 { /* SOC_FORMAT_INT_WRED_CFG_PACKET_FIELDS_BCM56680_B0fmt */ 650 /* format WRED_CFG_PACKET_FIELDSfmt */ 651 /* nFields */ 12, 652 /* *fields */ soc_WRED_CFG_PACKET_FIELDSfmt_fields, 653 /* bits */ 54, 654 /* flags */ 0, 655 }, 656 #endif /* chips */ 657 658 #if defined(BCM_56685_A0) 659 { /* SOC_FORMAT_INT_WRED_CFG_PACKET_FIELDS_BCM56685_A0fmt */ 660 /* format WRED_CFG_PACKET_FIELDSfmt */ 661 /* nFields */ 12, 662 /* *fields */ soc_WRED_CFG_PACKET_FIELDSfmt_fields, 663 /* bits */ 54, 664 /* flags */ 0, 665 }, 666 #endif /* chips */ 667 668 #if defined(BCM_56685_B0) 669 { /* SOC_FORMAT_INT_WRED_CFG_PACKET_FIELDS_BCM56685_B0fmt */ 670 /* format WRED_CFG_PACKET_FIELDSfmt */ 671 /* nFields */ 12, 672 /* *fields */ soc_WRED_CFG_PACKET_FIELDSfmt_fields, 673 /* bits */ 54, 674 /* flags */ 0, 675 }, 676 #endif /* chips */ 677 678 #if defined(BCM_56725_A0) || defined(BCM_56820_A0) || \ 679 defined(BCM_88732_A0) 680 { /* SOC_FORMAT_INT_WRED_CFG_S_RFfmt */ 681 /* format WRED_CFG_S_RFfmt */ 682 /* nFields */ 1, 683 /* *fields */ soc_WRED_CFG_S_RFfmt_fields, 684 /* bits */ 8, 685 /* flags */ 0, 686 }, 687 #endif /* chips */ 688 689 #if defined(BCM_56524_B0) || defined(BCM_56624_A0) || \ 690 defined(BCM_56624_B0) || defined(BCM_56634_A0) || \ 691 defined(BCM_56634_B0) || defined(BCM_56680_A0) || \ 692 defined(BCM_56685_A0) || defined(BCM_56685_B0) 693 { /* SOC_FORMAT_INT_WRED_PACKET_THD_0_FIELDSfmt */ 694 /* format WRED_PACKET_THD_0_FIELDSfmt */ 695 /* nFields */ 8, 696 /* *fields */ soc_WRED_PACKET_THD_0_FIELDSfmt_fields, 697 /* bits */ 58, 698 /* flags */ 0, 699 }, 700 #endif /* chips */ 701 702 #if defined(BCM_56334_A0) 703 { /* SOC_FORMAT_INT_WRED_PACKET_THD_0_FIELDS_BCM56334_A0fmt */ 704 /* format WRED_PACKET_THD_0_FIELDSfmt */ 705 /* nFields */ 8, 706 /* *fields */ soc_WRED_PACKET_THD_0_FIELDS_BCM56334_A0fmt_fields, 707 /* bits */ 54, 708 /* flags */ 0, 709 }, 710 #endif /* chips */ 711 712 #if defined(BCM_56334_B0) 713 { /* SOC_FORMAT_INT_WRED_PACKET_THD_0_FIELDS_BCM56334_B0fmt */ 714 /* format WRED_PACKET_THD_0_FIELDSfmt */ 715 /* nFields */ 8, 716 /* *fields */ soc_WRED_PACKET_THD_0_FIELDS_BCM56334_A0fmt_fields, 717 /* bits */ 54, 718 /* flags */ 0, 719 }, 720 #endif /* chips */ 721 722 #if defined(BCM_56524_A0) 723 { /* SOC_FORMAT_INT_WRED_PACKET_THD_0_FIELDS_BCM56524_A0fmt */ 724 /* format WRED_PACKET_THD_0_FIELDSfmt */ 725 /* nFields */ 8, 726 /* *fields */ soc_WRED_PACKET_THD_0_FIELDSfmt_fields, 727 /* bits */ 58, 728 /* flags */ 0, 729 }, 730 #endif /* chips */ 731 732 #if defined(BCM_56680_B0) 733 { /* SOC_FORMAT_INT_WRED_PACKET_THD_0_FIELDS_BCM56680_B0fmt */ 734 /* format WRED_PACKET_THD_0_FIELDSfmt */ 735 /* nFields */ 8, 736 /* *fields */ soc_WRED_PACKET_THD_0_FIELDSfmt_fields, 737 /* bits */ 58, 738 /* flags */ 0, 739 }, 740 #endif /* chips */ 741 742 #if defined(BCM_56524_B0) || defined(BCM_56624_A0) || \ 743 defined(BCM_56624_B0) || defined(BCM_56680_A0) || \ 744 defined(BCM_56680_B0) || defined(BCM_56685_A0) || \ 745 defined(BCM_56685_B0) 746 { /* SOC_FORMAT_INT_WRED_PACKET_THD_1_FIELDSfmt */ 747 /* format WRED_PACKET_THD_1_FIELDSfmt */ 748 /* nFields */ 8, 749 /* *fields */ soc_WRED_PACKET_THD_1_FIELDSfmt_fields, 750 /* bits */ 58, 751 /* flags */ 0, 752 }, 753 #endif /* chips */ 754 755 #if defined(BCM_56334_A0) 756 { /* SOC_FORMAT_INT_WRED_PACKET_THD_1_FIELDS_BCM56334_A0fmt */ 757 /* format WRED_PACKET_THD_1_FIELDSfmt */ 758 /* nFields */ 8, 759 /* *fields */ soc_WRED_PACKET_THD_1_FIELDS_BCM56334_A0fmt_fields, 760 /* bits */ 54, 761 /* flags */ 0, 762 }, 763 #endif /* chips */ 764 765 #if defined(BCM_56334_B0) 766 { /* SOC_FORMAT_INT_WRED_PACKET_THD_1_FIELDS_BCM56334_B0fmt */ 767 /* format WRED_PACKET_THD_1_FIELDSfmt */ 768 /* nFields */ 8, 769 /* *fields */ soc_WRED_PACKET_THD_1_FIELDS_BCM56334_A0fmt_fields, 770 /* bits */ 54, 771 /* flags */ 0, 772 }, 773 #endif /* chips */ 774 775 #if defined(BCM_56524_A0) 776 { /* SOC_FORMAT_INT_WRED_PACKET_THD_1_FIELDS_BCM56524_A0fmt */ 777 /* format WRED_PACKET_THD_1_FIELDSfmt */ 778 /* nFields */ 8, 779 /* *fields */ soc_WRED_PACKET_THD_1_FIELDSfmt_fields, 780 /* bits */ 58, 781 /* flags */ 0, 782 }, 783 #endif /* chips */ 784 785 #if defined(BCM_56634_A0) 786 { /* SOC_FORMAT_INT_WRED_PACKET_THD_1_FIELDS_BCM56634_A0fmt */ 787 /* format WRED_PACKET_THD_1_FIELDSfmt */ 788 /* nFields */ 8, 789 /* *fields */ soc_WRED_PACKET_THD_1_FIELDSfmt_fields, 790 /* bits */ 58, 791 /* flags */ 0, 792 }, 793 #endif /* chips */ 794 795 #if defined(BCM_56634_B0) 796 { /* SOC_FORMAT_INT_WRED_PACKET_THD_1_FIELDS_BCM56634_B0fmt */ 797 /* format WRED_PACKET_THD_1_FIELDSfmt */ 798 /* nFields */ 8, 799 /* *fields */ soc_WRED_PACKET_THD_1_FIELDSfmt_fields, 800 /* bits */ 58, 801 /* flags */ 0, 802 }, 803 #endif /* chips */ 804 805 #if defined(BCM_56524_A0) || defined(BCM_56524_B0) || \ 806 defined(BCM_56634_A0) || defined(BCM_56634_B0) || \ 807 defined(BCM_56685_A0) || defined(BCM_56685_B0) 808 { /* SOC_FORMAT_INT_WRED_S_RFfmt */ 809 /* format WRED_S_RFfmt */ 810 /* nFields */ 1, 811 /* *fields */ soc_WRED_S_RFfmt_fields, 812 /* bits */ 9, 813 /* flags */ 0, 814 }, 815 #endif /* chips */ 816 817 #if defined(BCM_56725_A0) || defined(BCM_56820_A0) || \ 818 defined(BCM_88732_A0) 819 { /* SOC_FORMAT_INT_WRED_THD_S_RFfmt */ 820 /* format WRED_THD_S_RFfmt */ 821 /* nFields */ 1, 822 /* *fields */ soc_WRED_THD_S_RFfmt_fields, 823 /* bits */ 8, 824 /* flags */ 0, 825 }, 826 #endif /* chips */ 827 828 #if defined(BCM_56440_A0) || defined(BCM_56440_B0) 829 { /* SOC_FORMAT_INT_WRED_TO_DEQ_STATUS_INFOfmt */ 830 /* format WRED_TO_DEQ_STATUS_INFOfmt */ 831 /* nFields */ 6, 832 /* *fields */ soc_WRED_TO_DEQ_STATUS_INFOfmt_fields, 833 /* bits */ 6, 834 /* flags */ 0, 835 }, 836 #endif /* chips */ 837 838 #if defined(BCM_56260_A0) 839 { /* SOC_FORMAT_INT_WRED_TO_DEQ_STATUS_INFO_BCM56260_A0fmt */ 840 /* format WRED_TO_DEQ_STATUS_INFOfmt */ 841 /* nFields */ 6, 842 /* *fields */ soc_WRED_TO_DEQ_STATUS_INFO_BCM56260_A0fmt_fields, 843 /* bits */ 6, 844 /* flags */ 0, 845 }, 846 #endif /* chips */ 847 848 #if defined(BCM_56260_B0) 849 { /* SOC_FORMAT_INT_WRED_TO_DEQ_STATUS_INFO_BCM56260_B0fmt */ 850 /* format WRED_TO_DEQ_STATUS_INFOfmt */ 851 /* nFields */ 6, 852 /* *fields */ soc_WRED_TO_DEQ_STATUS_INFO_BCM56260_A0fmt_fields, 853 /* bits */ 6, 854 /* flags */ 0, 855 }, 856 #endif /* chips */ 857 858 #if defined(BCM_56270_A0) 859 { /* SOC_FORMAT_INT_WRED_TO_DEQ_STATUS_INFO_BCM56270_A0fmt */ 860 /* format WRED_TO_DEQ_STATUS_INFOfmt */ 861 /* nFields */ 6, 862 /* *fields */ soc_WRED_TO_DEQ_STATUS_INFO_BCM56260_A0fmt_fields, 863 /* bits */ 6, 864 /* flags */ 0, 865 }, 866 #endif /* chips */ 867 868 #if defined(BCM_56450_A0) 869 { /* SOC_FORMAT_INT_WRED_TO_DEQ_STATUS_INFO_BCM56450_A0fmt */ 870 /* format WRED_TO_DEQ_STATUS_INFOfmt */ 871 /* nFields */ 6, 872 /* *fields */ soc_WRED_TO_DEQ_STATUS_INFO_BCM56450_A0fmt_fields, 873 /* bits */ 6, 874 /* flags */ 0, 875 }, 876 #endif /* chips */ 877 878 #if defined(BCM_56450_B0) 879 { /* SOC_FORMAT_INT_WRED_TO_DEQ_STATUS_INFO_BCM56450_B0fmt */ 880 /* format WRED_TO_DEQ_STATUS_INFOfmt */ 881 /* nFields */ 6, 882 /* *fields */ soc_WRED_TO_DEQ_STATUS_INFO_BCM56450_A0fmt_fields, 883 /* bits */ 6, 884 /* flags */ 0, 885 }, 886 #endif /* chips */ 887 888 #if defined(BCM_56450_B1) 889 { /* SOC_FORMAT_INT_WRED_TO_DEQ_STATUS_INFO_BCM56450_B1fmt */ 890 /* format WRED_TO_DEQ_STATUS_INFOfmt */ 891 /* nFields */ 6, 892 /* *fields */ soc_WRED_TO_DEQ_STATUS_INFO_BCM56450_A0fmt_fields, 893 /* bits */ 6, 894 /* flags */ 0, 895 }, 896 #endif /* chips */ 897