allformats_t.i (315786B)
1 /* 2 * DO NOT EDIT THIS FILE! 3 * This file is auto-generated from the registers file. 4 * Edits to this file will be lost when it is regenerated. 5 * 6 * 7 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 8 * 9 * Copyright 2007-2020 Broadcom Inc. All rights reserved. 10 * 11 * File: allformats_t.i 12 * Purpose: Independent format descriptions. 13 */ 14 15 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 16 defined(BCM_56870_A0) 17 { /* SOC_FORMAT_INT_TABLE_MANAGEMENT_ACTION_SETfmt */ 18 /* format TABLE_MANAGEMENT_ACTION_SETfmt */ 19 /* nFields */ 2, 20 /* *fields */ soc_TABLE_MANAGEMENT_ACTION_SETfmt_fields, 21 /* bits */ 2, 22 /* flags */ 0, 23 }, 24 #endif /* chips */ 25 26 #if defined(BCM_53570_B0) 27 { /* SOC_FORMAT_INT_TAF_GATE_STATUSfmt */ 28 /* format TAF_GATE_STATUSfmt */ 29 /* nFields */ 4, 30 /* *fields */ soc_TAF_GATE_STATUSfmt_fields, 31 /* bits */ 8, 32 /* flags */ 0, 33 }, 34 #endif /* chips */ 35 36 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 37 defined(BCM_56870_A0) 38 { /* SOC_FORMAT_INT_TAG_ACTIONfmt */ 39 /* format TAG_ACTIONfmt */ 40 /* nFields */ 1, 41 /* *fields */ soc_TAG_ACTIONfmt_fields, 42 /* bits */ 2, 43 /* flags */ 0, 44 }, 45 #endif /* chips */ 46 47 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 48 defined(BCM_56870_A0) 49 { /* SOC_FORMAT_INT_TAG_ACTION_PROFILE_ACTION_SETfmt */ 50 /* format TAG_ACTION_PROFILE_ACTION_SETfmt */ 51 /* nFields */ 2, 52 /* *fields */ soc_TAG_ACTION_PROFILE_ACTION_SETfmt_fields, 53 /* bits */ 9, 54 /* flags */ 0, 55 }, 56 #endif /* chips */ 57 58 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 59 defined(BCM_56870_A0) 60 { /* SOC_FORMAT_INT_TAG_ACTION_SETfmt */ 61 /* format TAG_ACTION_SETfmt */ 62 /* nFields */ 1, 63 /* *fields */ soc_TAG_ACTION_SETfmt_fields, 64 /* bits */ 7, 65 /* flags */ 0, 66 }, 67 #endif /* chips */ 68 69 #if defined(BCM_56820_A0) 70 { /* SOC_FORMAT_INT_TAP_CNTRL_MOTPfmt */ 71 /* format TAP_CNTRL_MOTPfmt */ 72 /* nFields */ 2, 73 /* *fields */ soc_TAP_CNTRL_MOTPfmt_fields, 74 /* bits */ 4, 75 /* flags */ 0, 76 }, 77 #endif /* chips */ 78 79 #if defined(BCM_56725_A0) 80 { /* SOC_FORMAT_INT_TAP_CNTRL_MOTP_BCM56725_A0fmt */ 81 /* format TAP_CNTRL_MOTPfmt */ 82 /* nFields */ 2, 83 /* *fields */ soc_TAP_CNTRL_MOTPfmt_fields, 84 /* bits */ 4, 85 /* flags */ 0, 86 }, 87 #endif /* chips */ 88 89 #if defined(BCM_88732_A0) 90 { /* SOC_FORMAT_INT_TAP_CNTRL_MOTP_BCM88732_A0fmt */ 91 /* format TAP_CNTRL_MOTPfmt */ 92 /* nFields */ 2, 93 /* *fields */ soc_TAP_CNTRL_MOTPfmt_fields, 94 /* bits */ 4, 95 /* flags */ 0, 96 }, 97 #endif /* chips */ 98 99 #if defined(BCM_56820_A0) 100 { /* SOC_FORMAT_INT_TAP_STATUS_MOTPfmt */ 101 /* format TAP_STATUS_MOTPfmt */ 102 /* nFields */ 5, 103 /* *fields */ soc_TAP_STATUS_MOTPfmt_fields, 104 /* bits */ 16, 105 /* flags */ 0, 106 }, 107 #endif /* chips */ 108 109 #if defined(BCM_56725_A0) 110 { /* SOC_FORMAT_INT_TAP_STATUS_MOTP_BCM56725_A0fmt */ 111 /* format TAP_STATUS_MOTPfmt */ 112 /* nFields */ 5, 113 /* *fields */ soc_TAP_STATUS_MOTPfmt_fields, 114 /* bits */ 16, 115 /* flags */ 0, 116 }, 117 #endif /* chips */ 118 119 #if defined(BCM_88732_A0) 120 { /* SOC_FORMAT_INT_TAP_STATUS_MOTP_BCM88732_A0fmt */ 121 /* format TAP_STATUS_MOTPfmt */ 122 /* nFields */ 5, 123 /* *fields */ soc_TAP_STATUS_MOTPfmt_fields, 124 /* bits */ 16, 125 /* flags */ 0, 126 }, 127 #endif /* chips */ 128 129 #if defined(BCM_56440_A0) 130 { /* SOC_FORMAT_INT_TCACHE_LMGR_STATEfmt */ 131 /* format TCACHE_LMGR_STATEfmt */ 132 /* nFields */ 3, 133 /* *fields */ soc_TCACHE_LMGR_STATEfmt_fields, 134 /* bits */ 19, 135 /* flags */ 0, 136 }, 137 #endif /* chips */ 138 139 #if defined(BCM_56260_A0) 140 { /* SOC_FORMAT_INT_TCACHE_LMGR_STATE_BCM56260_A0fmt */ 141 /* format TCACHE_LMGR_STATEfmt */ 142 /* nFields */ 3, 143 /* *fields */ soc_TCACHE_LMGR_STATE_BCM56260_A0fmt_fields, 144 /* bits */ 17, 145 /* flags */ 0, 146 }, 147 #endif /* chips */ 148 149 #if defined(BCM_56260_B0) 150 { /* SOC_FORMAT_INT_TCACHE_LMGR_STATE_BCM56260_B0fmt */ 151 /* format TCACHE_LMGR_STATEfmt */ 152 /* nFields */ 3, 153 /* *fields */ soc_TCACHE_LMGR_STATE_BCM56260_A0fmt_fields, 154 /* bits */ 17, 155 /* flags */ 0, 156 }, 157 #endif /* chips */ 158 159 #if defined(BCM_56270_A0) 160 { /* SOC_FORMAT_INT_TCACHE_LMGR_STATE_BCM56270_A0fmt */ 161 /* format TCACHE_LMGR_STATEfmt */ 162 /* nFields */ 3, 163 /* *fields */ soc_TCACHE_LMGR_STATE_BCM56270_A0fmt_fields, 164 /* bits */ 16, 165 /* flags */ 0, 166 }, 167 #endif /* chips */ 168 169 #if defined(BCM_56440_B0) 170 { /* SOC_FORMAT_INT_TCACHE_LMGR_STATE_BCM56440_B0fmt */ 171 /* format TCACHE_LMGR_STATEfmt */ 172 /* nFields */ 3, 173 /* *fields */ soc_TCACHE_LMGR_STATEfmt_fields, 174 /* bits */ 19, 175 /* flags */ 0, 176 }, 177 #endif /* chips */ 178 179 #if defined(BCM_56450_A0) 180 { /* SOC_FORMAT_INT_TCACHE_LMGR_STATE_BCM56450_A0fmt */ 181 /* format TCACHE_LMGR_STATEfmt */ 182 /* nFields */ 3, 183 /* *fields */ soc_TCACHE_LMGR_STATE_BCM56450_A0fmt_fields, 184 /* bits */ 19, 185 /* flags */ 0, 186 }, 187 #endif /* chips */ 188 189 #if defined(BCM_56450_B0) 190 { /* SOC_FORMAT_INT_TCACHE_LMGR_STATE_BCM56450_B0fmt */ 191 /* format TCACHE_LMGR_STATEfmt */ 192 /* nFields */ 3, 193 /* *fields */ soc_TCACHE_LMGR_STATE_BCM56450_A0fmt_fields, 194 /* bits */ 19, 195 /* flags */ 0, 196 }, 197 #endif /* chips */ 198 199 #if defined(BCM_56450_B1) 200 { /* SOC_FORMAT_INT_TCACHE_LMGR_STATE_BCM56450_B1fmt */ 201 /* format TCACHE_LMGR_STATEfmt */ 202 /* nFields */ 3, 203 /* *fields */ soc_TCACHE_LMGR_STATE_BCM56450_A0fmt_fields, 204 /* bits */ 19, 205 /* flags */ 0, 206 }, 207 #endif /* chips */ 208 209 #if defined(BCM_56640_A0) 210 { /* SOC_FORMAT_INT_TCAM_RSP_CTB_WR_CMPfmt */ 211 /* format TCAM_RSP_CTB_WR_CMPfmt */ 212 /* nFields */ 16, 213 /* *fields */ soc_TCAM_RSP_CTB_WR_CMPfmt_fields, 214 /* bits */ 128, 215 /* flags */ 0, 216 }, 217 #endif /* chips */ 218 219 #if defined(BCM_56150_A0) || defined(BCM_56340_A0) || \ 220 defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 221 defined(BCM_56450_B1) || defined(BCM_56640_A0) || \ 222 defined(BCM_56850_A0) || defined(BCM_56860_A0) 223 { /* SOC_FORMAT_INT_TCP_ACKfmt */ 224 /* format TCP_ACKfmt */ 225 /* nFields */ 1, 226 /* *fields */ soc_TCP_ACKfmt_fields, 227 /* bits */ 5, 228 /* flags */ 0, 229 }, 230 #endif /* chips */ 231 232 #if defined(BCM_53400_A0) 233 { /* SOC_FORMAT_INT_TCP_ACK_BCM53400_A0fmt */ 234 /* format TCP_ACKfmt */ 235 /* nFields */ 1, 236 /* *fields */ soc_TCP_ACK_BCM53400_A0fmt_fields, 237 /* bits */ 5, 238 /* flags */ 0, 239 }, 240 #endif /* chips */ 241 242 #if defined(BCM_53540_A0) 243 { /* SOC_FORMAT_INT_TCP_ACK_BCM53540_A0fmt */ 244 /* format TCP_ACKfmt */ 245 /* nFields */ 1, 246 /* *fields */ soc_TCP_ACK_BCM53400_A0fmt_fields, 247 /* bits */ 5, 248 /* flags */ 0, 249 }, 250 #endif /* chips */ 251 252 #if defined(BCM_53570_A0) 253 { /* SOC_FORMAT_INT_TCP_ACK_BCM53570_A0fmt */ 254 /* format TCP_ACKfmt */ 255 /* nFields */ 1, 256 /* *fields */ soc_TCP_ACK_BCM53400_A0fmt_fields, 257 /* bits */ 5, 258 /* flags */ 0, 259 }, 260 #endif /* chips */ 261 262 #if defined(BCM_53570_B0) 263 { /* SOC_FORMAT_INT_TCP_ACK_BCM53570_B0fmt */ 264 /* format TCP_ACKfmt */ 265 /* nFields */ 1, 266 /* *fields */ soc_TCP_ACK_BCM53400_A0fmt_fields, 267 /* bits */ 5, 268 /* flags */ 0, 269 }, 270 #endif /* chips */ 271 272 #if defined(BCM_56160_A0) 273 { /* SOC_FORMAT_INT_TCP_ACK_BCM56160_A0fmt */ 274 /* format TCP_ACKfmt */ 275 /* nFields */ 1, 276 /* *fields */ soc_TCP_ACK_BCM53400_A0fmt_fields, 277 /* bits */ 5, 278 /* flags */ 0, 279 }, 280 #endif /* chips */ 281 282 #if defined(BCM_56260_A0) 283 { /* SOC_FORMAT_INT_TCP_ACK_BCM56260_A0fmt */ 284 /* format TCP_ACKfmt */ 285 /* nFields */ 1, 286 /* *fields */ soc_TCP_ACK_BCM53400_A0fmt_fields, 287 /* bits */ 5, 288 /* flags */ 0, 289 }, 290 #endif /* chips */ 291 292 #if defined(BCM_56260_B0) 293 { /* SOC_FORMAT_INT_TCP_ACK_BCM56260_B0fmt */ 294 /* format TCP_ACKfmt */ 295 /* nFields */ 1, 296 /* *fields */ soc_TCP_ACK_BCM53400_A0fmt_fields, 297 /* bits */ 5, 298 /* flags */ 0, 299 }, 300 #endif /* chips */ 301 302 #if defined(BCM_56270_A0) 303 { /* SOC_FORMAT_INT_TCP_ACK_BCM56270_A0fmt */ 304 /* format TCP_ACKfmt */ 305 /* nFields */ 1, 306 /* *fields */ soc_TCP_ACK_BCM53400_A0fmt_fields, 307 /* bits */ 5, 308 /* flags */ 0, 309 }, 310 #endif /* chips */ 311 312 #if defined(BCM_56370_A0) 313 { /* SOC_FORMAT_INT_TCP_ACK_BCM56370_A0fmt */ 314 /* format TCP_ACKfmt */ 315 /* nFields */ 1, 316 /* *fields */ soc_TCP_ACK_BCM53400_A0fmt_fields, 317 /* bits */ 5, 318 /* flags */ 0, 319 }, 320 #endif /* chips */ 321 322 #if defined(BCM_56560_A0) 323 { /* SOC_FORMAT_INT_TCP_ACK_BCM56560_A0fmt */ 324 /* format TCP_ACKfmt */ 325 /* nFields */ 1, 326 /* *fields */ soc_TCP_ACK_BCM53400_A0fmt_fields, 327 /* bits */ 5, 328 /* flags */ 0, 329 }, 330 #endif /* chips */ 331 332 #if defined(BCM_56560_B0) 333 { /* SOC_FORMAT_INT_TCP_ACK_BCM56560_B0fmt */ 334 /* format TCP_ACKfmt */ 335 /* nFields */ 1, 336 /* *fields */ soc_TCP_ACK_BCM53400_A0fmt_fields, 337 /* bits */ 5, 338 /* flags */ 0, 339 }, 340 #endif /* chips */ 341 342 #if defined(BCM_56670_A0) 343 { /* SOC_FORMAT_INT_TCP_ACK_BCM56670_A0fmt */ 344 /* format TCP_ACKfmt */ 345 /* nFields */ 1, 346 /* *fields */ soc_TCP_ACK_BCM53400_A0fmt_fields, 347 /* bits */ 5, 348 /* flags */ 0, 349 }, 350 #endif /* chips */ 351 352 #if defined(BCM_56670_B0) 353 { /* SOC_FORMAT_INT_TCP_ACK_BCM56670_B0fmt */ 354 /* format TCP_ACKfmt */ 355 /* nFields */ 1, 356 /* *fields */ soc_TCP_ACK_BCM53400_A0fmt_fields, 357 /* bits */ 5, 358 /* flags */ 0, 359 }, 360 #endif /* chips */ 361 362 #if defined(BCM_56770_A0) 363 { /* SOC_FORMAT_INT_TCP_ACK_BCM56770_A0fmt */ 364 /* format TCP_ACKfmt */ 365 /* nFields */ 1, 366 /* *fields */ soc_TCP_ACK_BCM53400_A0fmt_fields, 367 /* bits */ 5, 368 /* flags */ 0, 369 }, 370 #endif /* chips */ 371 372 #if defined(BCM_56870_A0) 373 { /* SOC_FORMAT_INT_TCP_ACK_BCM56870_A0fmt */ 374 /* format TCP_ACKfmt */ 375 /* nFields */ 1, 376 /* *fields */ soc_TCP_ACK_BCM53400_A0fmt_fields, 377 /* bits */ 5, 378 /* flags */ 0, 379 }, 380 #endif /* chips */ 381 382 #if defined(BCM_56960_A0) 383 { /* SOC_FORMAT_INT_TCP_ACK_BCM56960_A0fmt */ 384 /* format TCP_ACKfmt */ 385 /* nFields */ 1, 386 /* *fields */ soc_TCP_ACK_BCM53400_A0fmt_fields, 387 /* bits */ 5, 388 /* flags */ 0, 389 }, 390 #endif /* chips */ 391 392 #if defined(BCM_56965_A0) 393 { /* SOC_FORMAT_INT_TCP_ACK_BCM56965_A0fmt */ 394 /* format TCP_ACKfmt */ 395 /* nFields */ 1, 396 /* *fields */ soc_TCP_ACK_BCM53400_A0fmt_fields, 397 /* bits */ 5, 398 /* flags */ 0, 399 }, 400 #endif /* chips */ 401 402 #if defined(BCM_56970_A0) 403 { /* SOC_FORMAT_INT_TCP_ACK_BCM56970_A0fmt */ 404 /* format TCP_ACKfmt */ 405 /* nFields */ 1, 406 /* *fields */ soc_TCP_ACK_BCM53400_A0fmt_fields, 407 /* bits */ 5, 408 /* flags */ 0, 409 }, 410 #endif /* chips */ 411 412 #if defined(BCM_56980_A0) 413 { /* SOC_FORMAT_INT_TCP_ACK_BCM56980_A0fmt */ 414 /* format TCP_ACKfmt */ 415 /* nFields */ 1, 416 /* *fields */ soc_TCP_ACK_BCM53400_A0fmt_fields, 417 /* bits */ 5, 418 /* flags */ 0, 419 }, 420 #endif /* chips */ 421 422 #if defined(BCM_56980_B0) 423 { /* SOC_FORMAT_INT_TCP_ACK_BCM56980_B0fmt */ 424 /* format TCP_ACKfmt */ 425 /* nFields */ 1, 426 /* *fields */ soc_TCP_ACK_BCM53400_A0fmt_fields, 427 /* bits */ 5, 428 /* flags */ 0, 429 }, 430 #endif /* chips */ 431 432 #if defined(BCM_56150_A0) || defined(BCM_56340_A0) || \ 433 defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 434 defined(BCM_56450_B1) || defined(BCM_56640_A0) || \ 435 defined(BCM_56850_A0) || defined(BCM_56860_A0) 436 { /* SOC_FORMAT_INT_TCP_FINfmt */ 437 /* format TCP_FINfmt */ 438 /* nFields */ 1, 439 /* *fields */ soc_TCP_FINfmt_fields, 440 /* bits */ 1, 441 /* flags */ 0, 442 }, 443 #endif /* chips */ 444 445 #if defined(BCM_53400_A0) 446 { /* SOC_FORMAT_INT_TCP_FIN_BCM53400_A0fmt */ 447 /* format TCP_FINfmt */ 448 /* nFields */ 1, 449 /* *fields */ soc_TCP_FIN_BCM53400_A0fmt_fields, 450 /* bits */ 1, 451 /* flags */ 0, 452 }, 453 #endif /* chips */ 454 455 #if defined(BCM_53540_A0) 456 { /* SOC_FORMAT_INT_TCP_FIN_BCM53540_A0fmt */ 457 /* format TCP_FINfmt */ 458 /* nFields */ 1, 459 /* *fields */ soc_TCP_FIN_BCM53400_A0fmt_fields, 460 /* bits */ 1, 461 /* flags */ 0, 462 }, 463 #endif /* chips */ 464 465 #if defined(BCM_53570_A0) 466 { /* SOC_FORMAT_INT_TCP_FIN_BCM53570_A0fmt */ 467 /* format TCP_FINfmt */ 468 /* nFields */ 1, 469 /* *fields */ soc_TCP_FIN_BCM53400_A0fmt_fields, 470 /* bits */ 1, 471 /* flags */ 0, 472 }, 473 #endif /* chips */ 474 475 #if defined(BCM_53570_B0) 476 { /* SOC_FORMAT_INT_TCP_FIN_BCM53570_B0fmt */ 477 /* format TCP_FINfmt */ 478 /* nFields */ 1, 479 /* *fields */ soc_TCP_FIN_BCM53400_A0fmt_fields, 480 /* bits */ 1, 481 /* flags */ 0, 482 }, 483 #endif /* chips */ 484 485 #if defined(BCM_56160_A0) 486 { /* SOC_FORMAT_INT_TCP_FIN_BCM56160_A0fmt */ 487 /* format TCP_FINfmt */ 488 /* nFields */ 1, 489 /* *fields */ soc_TCP_FIN_BCM53400_A0fmt_fields, 490 /* bits */ 1, 491 /* flags */ 0, 492 }, 493 #endif /* chips */ 494 495 #if defined(BCM_56260_A0) 496 { /* SOC_FORMAT_INT_TCP_FIN_BCM56260_A0fmt */ 497 /* format TCP_FINfmt */ 498 /* nFields */ 1, 499 /* *fields */ soc_TCP_FIN_BCM53400_A0fmt_fields, 500 /* bits */ 1, 501 /* flags */ 0, 502 }, 503 #endif /* chips */ 504 505 #if defined(BCM_56260_B0) 506 { /* SOC_FORMAT_INT_TCP_FIN_BCM56260_B0fmt */ 507 /* format TCP_FINfmt */ 508 /* nFields */ 1, 509 /* *fields */ soc_TCP_FIN_BCM53400_A0fmt_fields, 510 /* bits */ 1, 511 /* flags */ 0, 512 }, 513 #endif /* chips */ 514 515 #if defined(BCM_56270_A0) 516 { /* SOC_FORMAT_INT_TCP_FIN_BCM56270_A0fmt */ 517 /* format TCP_FINfmt */ 518 /* nFields */ 1, 519 /* *fields */ soc_TCP_FIN_BCM53400_A0fmt_fields, 520 /* bits */ 1, 521 /* flags */ 0, 522 }, 523 #endif /* chips */ 524 525 #if defined(BCM_56370_A0) 526 { /* SOC_FORMAT_INT_TCP_FIN_BCM56370_A0fmt */ 527 /* format TCP_FINfmt */ 528 /* nFields */ 1, 529 /* *fields */ soc_TCP_FIN_BCM53400_A0fmt_fields, 530 /* bits */ 1, 531 /* flags */ 0, 532 }, 533 #endif /* chips */ 534 535 #if defined(BCM_56560_A0) 536 { /* SOC_FORMAT_INT_TCP_FIN_BCM56560_A0fmt */ 537 /* format TCP_FINfmt */ 538 /* nFields */ 1, 539 /* *fields */ soc_TCP_FIN_BCM53400_A0fmt_fields, 540 /* bits */ 1, 541 /* flags */ 0, 542 }, 543 #endif /* chips */ 544 545 #if defined(BCM_56560_B0) 546 { /* SOC_FORMAT_INT_TCP_FIN_BCM56560_B0fmt */ 547 /* format TCP_FINfmt */ 548 /* nFields */ 1, 549 /* *fields */ soc_TCP_FIN_BCM53400_A0fmt_fields, 550 /* bits */ 1, 551 /* flags */ 0, 552 }, 553 #endif /* chips */ 554 555 #if defined(BCM_56670_A0) 556 { /* SOC_FORMAT_INT_TCP_FIN_BCM56670_A0fmt */ 557 /* format TCP_FINfmt */ 558 /* nFields */ 1, 559 /* *fields */ soc_TCP_FIN_BCM53400_A0fmt_fields, 560 /* bits */ 1, 561 /* flags */ 0, 562 }, 563 #endif /* chips */ 564 565 #if defined(BCM_56670_B0) 566 { /* SOC_FORMAT_INT_TCP_FIN_BCM56670_B0fmt */ 567 /* format TCP_FINfmt */ 568 /* nFields */ 1, 569 /* *fields */ soc_TCP_FIN_BCM53400_A0fmt_fields, 570 /* bits */ 1, 571 /* flags */ 0, 572 }, 573 #endif /* chips */ 574 575 #if defined(BCM_56770_A0) 576 { /* SOC_FORMAT_INT_TCP_FIN_BCM56770_A0fmt */ 577 /* format TCP_FINfmt */ 578 /* nFields */ 1, 579 /* *fields */ soc_TCP_FIN_BCM53400_A0fmt_fields, 580 /* bits */ 1, 581 /* flags */ 0, 582 }, 583 #endif /* chips */ 584 585 #if defined(BCM_56870_A0) 586 { /* SOC_FORMAT_INT_TCP_FIN_BCM56870_A0fmt */ 587 /* format TCP_FINfmt */ 588 /* nFields */ 1, 589 /* *fields */ soc_TCP_FIN_BCM53400_A0fmt_fields, 590 /* bits */ 1, 591 /* flags */ 0, 592 }, 593 #endif /* chips */ 594 595 #if defined(BCM_56960_A0) 596 { /* SOC_FORMAT_INT_TCP_FIN_BCM56960_A0fmt */ 597 /* format TCP_FINfmt */ 598 /* nFields */ 1, 599 /* *fields */ soc_TCP_FIN_BCM53400_A0fmt_fields, 600 /* bits */ 1, 601 /* flags */ 0, 602 }, 603 #endif /* chips */ 604 605 #if defined(BCM_56965_A0) 606 { /* SOC_FORMAT_INT_TCP_FIN_BCM56965_A0fmt */ 607 /* format TCP_FINfmt */ 608 /* nFields */ 1, 609 /* *fields */ soc_TCP_FIN_BCM53400_A0fmt_fields, 610 /* bits */ 1, 611 /* flags */ 0, 612 }, 613 #endif /* chips */ 614 615 #if defined(BCM_56970_A0) 616 { /* SOC_FORMAT_INT_TCP_FIN_BCM56970_A0fmt */ 617 /* format TCP_FINfmt */ 618 /* nFields */ 1, 619 /* *fields */ soc_TCP_FIN_BCM53400_A0fmt_fields, 620 /* bits */ 1, 621 /* flags */ 0, 622 }, 623 #endif /* chips */ 624 625 #if defined(BCM_56980_A0) 626 { /* SOC_FORMAT_INT_TCP_FIN_BCM56980_A0fmt */ 627 /* format TCP_FINfmt */ 628 /* nFields */ 1, 629 /* *fields */ soc_TCP_FIN_BCM53400_A0fmt_fields, 630 /* bits */ 1, 631 /* flags */ 0, 632 }, 633 #endif /* chips */ 634 635 #if defined(BCM_56980_B0) 636 { /* SOC_FORMAT_INT_TCP_FIN_BCM56980_B0fmt */ 637 /* format TCP_FINfmt */ 638 /* nFields */ 1, 639 /* *fields */ soc_TCP_FIN_BCM53400_A0fmt_fields, 640 /* bits */ 1, 641 /* flags */ 0, 642 }, 643 #endif /* chips */ 644 645 #if defined(BCM_56150_A0) || defined(BCM_56340_A0) || \ 646 defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 647 defined(BCM_56450_B1) || defined(BCM_56640_A0) || \ 648 defined(BCM_56850_A0) || defined(BCM_56860_A0) 649 { /* SOC_FORMAT_INT_TCP_FLAGSfmt */ 650 /* format TCP_FLAGSfmt */ 651 /* nFields */ 1, 652 /* *fields */ soc_TCP_FLAGSfmt_fields, 653 /* bits */ 6, 654 /* flags */ 0, 655 }, 656 #endif /* chips */ 657 658 #if defined(BCM_53400_A0) 659 { /* SOC_FORMAT_INT_TCP_FLAGS_BCM53400_A0fmt */ 660 /* format TCP_FLAGSfmt */ 661 /* nFields */ 1, 662 /* *fields */ soc_TCP_FLAGS_BCM53400_A0fmt_fields, 663 /* bits */ 6, 664 /* flags */ 0, 665 }, 666 #endif /* chips */ 667 668 #if defined(BCM_53540_A0) 669 { /* SOC_FORMAT_INT_TCP_FLAGS_BCM53540_A0fmt */ 670 /* format TCP_FLAGSfmt */ 671 /* nFields */ 1, 672 /* *fields */ soc_TCP_FLAGS_BCM53400_A0fmt_fields, 673 /* bits */ 6, 674 /* flags */ 0, 675 }, 676 #endif /* chips */ 677 678 #if defined(BCM_53570_A0) 679 { /* SOC_FORMAT_INT_TCP_FLAGS_BCM53570_A0fmt */ 680 /* format TCP_FLAGSfmt */ 681 /* nFields */ 1, 682 /* *fields */ soc_TCP_FLAGS_BCM53400_A0fmt_fields, 683 /* bits */ 6, 684 /* flags */ 0, 685 }, 686 #endif /* chips */ 687 688 #if defined(BCM_53570_B0) 689 { /* SOC_FORMAT_INT_TCP_FLAGS_BCM53570_B0fmt */ 690 /* format TCP_FLAGSfmt */ 691 /* nFields */ 1, 692 /* *fields */ soc_TCP_FLAGS_BCM53400_A0fmt_fields, 693 /* bits */ 6, 694 /* flags */ 0, 695 }, 696 #endif /* chips */ 697 698 #if defined(BCM_56160_A0) 699 { /* SOC_FORMAT_INT_TCP_FLAGS_BCM56160_A0fmt */ 700 /* format TCP_FLAGSfmt */ 701 /* nFields */ 1, 702 /* *fields */ soc_TCP_FLAGS_BCM53400_A0fmt_fields, 703 /* bits */ 6, 704 /* flags */ 0, 705 }, 706 #endif /* chips */ 707 708 #if defined(BCM_56260_A0) 709 { /* SOC_FORMAT_INT_TCP_FLAGS_BCM56260_A0fmt */ 710 /* format TCP_FLAGSfmt */ 711 /* nFields */ 1, 712 /* *fields */ soc_TCP_FLAGS_BCM53400_A0fmt_fields, 713 /* bits */ 6, 714 /* flags */ 0, 715 }, 716 #endif /* chips */ 717 718 #if defined(BCM_56260_B0) 719 { /* SOC_FORMAT_INT_TCP_FLAGS_BCM56260_B0fmt */ 720 /* format TCP_FLAGSfmt */ 721 /* nFields */ 1, 722 /* *fields */ soc_TCP_FLAGS_BCM53400_A0fmt_fields, 723 /* bits */ 6, 724 /* flags */ 0, 725 }, 726 #endif /* chips */ 727 728 #if defined(BCM_56270_A0) 729 { /* SOC_FORMAT_INT_TCP_FLAGS_BCM56270_A0fmt */ 730 /* format TCP_FLAGSfmt */ 731 /* nFields */ 1, 732 /* *fields */ soc_TCP_FLAGS_BCM53400_A0fmt_fields, 733 /* bits */ 6, 734 /* flags */ 0, 735 }, 736 #endif /* chips */ 737 738 #if defined(BCM_56370_A0) 739 { /* SOC_FORMAT_INT_TCP_FLAGS_BCM56370_A0fmt */ 740 /* format TCP_FLAGSfmt */ 741 /* nFields */ 1, 742 /* *fields */ soc_TCP_FLAGS_BCM56870_A0fmt_fields, 743 /* bits */ 12, 744 /* flags */ 0, 745 }, 746 #endif /* chips */ 747 748 #if defined(BCM_56560_A0) 749 { /* SOC_FORMAT_INT_TCP_FLAGS_BCM56560_A0fmt */ 750 /* format TCP_FLAGSfmt */ 751 /* nFields */ 1, 752 /* *fields */ soc_TCP_FLAGS_BCM53400_A0fmt_fields, 753 /* bits */ 6, 754 /* flags */ 0, 755 }, 756 #endif /* chips */ 757 758 #if defined(BCM_56560_B0) 759 { /* SOC_FORMAT_INT_TCP_FLAGS_BCM56560_B0fmt */ 760 /* format TCP_FLAGSfmt */ 761 /* nFields */ 1, 762 /* *fields */ soc_TCP_FLAGS_BCM53400_A0fmt_fields, 763 /* bits */ 6, 764 /* flags */ 0, 765 }, 766 #endif /* chips */ 767 768 #if defined(BCM_56670_A0) 769 { /* SOC_FORMAT_INT_TCP_FLAGS_BCM56670_A0fmt */ 770 /* format TCP_FLAGSfmt */ 771 /* nFields */ 1, 772 /* *fields */ soc_TCP_FLAGS_BCM53400_A0fmt_fields, 773 /* bits */ 6, 774 /* flags */ 0, 775 }, 776 #endif /* chips */ 777 778 #if defined(BCM_56670_B0) 779 { /* SOC_FORMAT_INT_TCP_FLAGS_BCM56670_B0fmt */ 780 /* format TCP_FLAGSfmt */ 781 /* nFields */ 1, 782 /* *fields */ soc_TCP_FLAGS_BCM53400_A0fmt_fields, 783 /* bits */ 6, 784 /* flags */ 0, 785 }, 786 #endif /* chips */ 787 788 #if defined(BCM_56770_A0) 789 { /* SOC_FORMAT_INT_TCP_FLAGS_BCM56770_A0fmt */ 790 /* format TCP_FLAGSfmt */ 791 /* nFields */ 1, 792 /* *fields */ soc_TCP_FLAGS_BCM56770_A0fmt_fields, 793 /* bits */ 8, 794 /* flags */ 0, 795 }, 796 #endif /* chips */ 797 798 #if defined(BCM_56870_A0) 799 { /* SOC_FORMAT_INT_TCP_FLAGS_BCM56870_A0fmt */ 800 /* format TCP_FLAGSfmt */ 801 /* nFields */ 1, 802 /* *fields */ soc_TCP_FLAGS_BCM56870_A0fmt_fields, 803 /* bits */ 12, 804 /* flags */ 0, 805 }, 806 #endif /* chips */ 807 808 #if defined(BCM_56960_A0) 809 { /* SOC_FORMAT_INT_TCP_FLAGS_BCM56960_A0fmt */ 810 /* format TCP_FLAGSfmt */ 811 /* nFields */ 1, 812 /* *fields */ soc_TCP_FLAGS_BCM53400_A0fmt_fields, 813 /* bits */ 6, 814 /* flags */ 0, 815 }, 816 #endif /* chips */ 817 818 #if defined(BCM_56965_A0) 819 { /* SOC_FORMAT_INT_TCP_FLAGS_BCM56965_A0fmt */ 820 /* format TCP_FLAGSfmt */ 821 /* nFields */ 1, 822 /* *fields */ soc_TCP_FLAGS_BCM53400_A0fmt_fields, 823 /* bits */ 6, 824 /* flags */ 0, 825 }, 826 #endif /* chips */ 827 828 #if defined(BCM_56970_A0) 829 { /* SOC_FORMAT_INT_TCP_FLAGS_BCM56970_A0fmt */ 830 /* format TCP_FLAGSfmt */ 831 /* nFields */ 1, 832 /* *fields */ soc_TCP_FLAGS_BCM53400_A0fmt_fields, 833 /* bits */ 6, 834 /* flags */ 0, 835 }, 836 #endif /* chips */ 837 838 #if defined(BCM_56980_A0) 839 { /* SOC_FORMAT_INT_TCP_FLAGS_BCM56980_A0fmt */ 840 /* format TCP_FLAGSfmt */ 841 /* nFields */ 1, 842 /* *fields */ soc_TCP_FLAGS_BCM53400_A0fmt_fields, 843 /* bits */ 6, 844 /* flags */ 0, 845 }, 846 #endif /* chips */ 847 848 #if defined(BCM_56980_B0) 849 { /* SOC_FORMAT_INT_TCP_FLAGS_BCM56980_B0fmt */ 850 /* format TCP_FLAGSfmt */ 851 /* nFields */ 1, 852 /* *fields */ soc_TCP_FLAGS_BCM53400_A0fmt_fields, 853 /* bits */ 6, 854 /* flags */ 0, 855 }, 856 #endif /* chips */ 857 858 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 859 defined(BCM_56870_A0) 860 { /* SOC_FORMAT_INT_TCP_HDRfmt */ 861 /* format TCP_HDRfmt */ 862 /* nFields */ 2, 863 /* *fields */ soc_TCP_HDRfmt_fields, 864 /* bits */ 32, 865 /* flags */ 0, 866 }, 867 #endif /* chips */ 868 869 #if defined(BCM_56150_A0) || defined(BCM_56340_A0) || \ 870 defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 871 defined(BCM_56450_B1) || defined(BCM_56640_A0) || \ 872 defined(BCM_56850_A0) || defined(BCM_56860_A0) 873 { /* SOC_FORMAT_INT_TCP_PSHfmt */ 874 /* format TCP_PSHfmt */ 875 /* nFields */ 1, 876 /* *fields */ soc_TCP_PSHfmt_fields, 877 /* bits */ 4, 878 /* flags */ 0, 879 }, 880 #endif /* chips */ 881 882 #if defined(BCM_53400_A0) 883 { /* SOC_FORMAT_INT_TCP_PSH_BCM53400_A0fmt */ 884 /* format TCP_PSHfmt */ 885 /* nFields */ 1, 886 /* *fields */ soc_TCP_PSH_BCM53400_A0fmt_fields, 887 /* bits */ 4, 888 /* flags */ 0, 889 }, 890 #endif /* chips */ 891 892 #if defined(BCM_53540_A0) 893 { /* SOC_FORMAT_INT_TCP_PSH_BCM53540_A0fmt */ 894 /* format TCP_PSHfmt */ 895 /* nFields */ 1, 896 /* *fields */ soc_TCP_PSH_BCM53400_A0fmt_fields, 897 /* bits */ 4, 898 /* flags */ 0, 899 }, 900 #endif /* chips */ 901 902 #if defined(BCM_53570_A0) 903 { /* SOC_FORMAT_INT_TCP_PSH_BCM53570_A0fmt */ 904 /* format TCP_PSHfmt */ 905 /* nFields */ 1, 906 /* *fields */ soc_TCP_PSH_BCM53400_A0fmt_fields, 907 /* bits */ 4, 908 /* flags */ 0, 909 }, 910 #endif /* chips */ 911 912 #if defined(BCM_53570_B0) 913 { /* SOC_FORMAT_INT_TCP_PSH_BCM53570_B0fmt */ 914 /* format TCP_PSHfmt */ 915 /* nFields */ 1, 916 /* *fields */ soc_TCP_PSH_BCM53400_A0fmt_fields, 917 /* bits */ 4, 918 /* flags */ 0, 919 }, 920 #endif /* chips */ 921 922 #if defined(BCM_56160_A0) 923 { /* SOC_FORMAT_INT_TCP_PSH_BCM56160_A0fmt */ 924 /* format TCP_PSHfmt */ 925 /* nFields */ 1, 926 /* *fields */ soc_TCP_PSH_BCM53400_A0fmt_fields, 927 /* bits */ 4, 928 /* flags */ 0, 929 }, 930 #endif /* chips */ 931 932 #if defined(BCM_56260_A0) 933 { /* SOC_FORMAT_INT_TCP_PSH_BCM56260_A0fmt */ 934 /* format TCP_PSHfmt */ 935 /* nFields */ 1, 936 /* *fields */ soc_TCP_PSH_BCM53400_A0fmt_fields, 937 /* bits */ 4, 938 /* flags */ 0, 939 }, 940 #endif /* chips */ 941 942 #if defined(BCM_56260_B0) 943 { /* SOC_FORMAT_INT_TCP_PSH_BCM56260_B0fmt */ 944 /* format TCP_PSHfmt */ 945 /* nFields */ 1, 946 /* *fields */ soc_TCP_PSH_BCM53400_A0fmt_fields, 947 /* bits */ 4, 948 /* flags */ 0, 949 }, 950 #endif /* chips */ 951 952 #if defined(BCM_56270_A0) 953 { /* SOC_FORMAT_INT_TCP_PSH_BCM56270_A0fmt */ 954 /* format TCP_PSHfmt */ 955 /* nFields */ 1, 956 /* *fields */ soc_TCP_PSH_BCM53400_A0fmt_fields, 957 /* bits */ 4, 958 /* flags */ 0, 959 }, 960 #endif /* chips */ 961 962 #if defined(BCM_56370_A0) 963 { /* SOC_FORMAT_INT_TCP_PSH_BCM56370_A0fmt */ 964 /* format TCP_PSHfmt */ 965 /* nFields */ 1, 966 /* *fields */ soc_TCP_PSH_BCM53400_A0fmt_fields, 967 /* bits */ 4, 968 /* flags */ 0, 969 }, 970 #endif /* chips */ 971 972 #if defined(BCM_56560_A0) 973 { /* SOC_FORMAT_INT_TCP_PSH_BCM56560_A0fmt */ 974 /* format TCP_PSHfmt */ 975 /* nFields */ 1, 976 /* *fields */ soc_TCP_PSH_BCM53400_A0fmt_fields, 977 /* bits */ 4, 978 /* flags */ 0, 979 }, 980 #endif /* chips */ 981 982 #if defined(BCM_56560_B0) 983 { /* SOC_FORMAT_INT_TCP_PSH_BCM56560_B0fmt */ 984 /* format TCP_PSHfmt */ 985 /* nFields */ 1, 986 /* *fields */ soc_TCP_PSH_BCM53400_A0fmt_fields, 987 /* bits */ 4, 988 /* flags */ 0, 989 }, 990 #endif /* chips */ 991 992 #if defined(BCM_56670_A0) 993 { /* SOC_FORMAT_INT_TCP_PSH_BCM56670_A0fmt */ 994 /* format TCP_PSHfmt */ 995 /* nFields */ 1, 996 /* *fields */ soc_TCP_PSH_BCM53400_A0fmt_fields, 997 /* bits */ 4, 998 /* flags */ 0, 999 }, 1000 #endif /* chips */ 1001 1002 #if defined(BCM_56670_B0) 1003 { /* SOC_FORMAT_INT_TCP_PSH_BCM56670_B0fmt */ 1004 /* format TCP_PSHfmt */ 1005 /* nFields */ 1, 1006 /* *fields */ soc_TCP_PSH_BCM53400_A0fmt_fields, 1007 /* bits */ 4, 1008 /* flags */ 0, 1009 }, 1010 #endif /* chips */ 1011 1012 #if defined(BCM_56770_A0) 1013 { /* SOC_FORMAT_INT_TCP_PSH_BCM56770_A0fmt */ 1014 /* format TCP_PSHfmt */ 1015 /* nFields */ 1, 1016 /* *fields */ soc_TCP_PSH_BCM53400_A0fmt_fields, 1017 /* bits */ 4, 1018 /* flags */ 0, 1019 }, 1020 #endif /* chips */ 1021 1022 #if defined(BCM_56870_A0) 1023 { /* SOC_FORMAT_INT_TCP_PSH_BCM56870_A0fmt */ 1024 /* format TCP_PSHfmt */ 1025 /* nFields */ 1, 1026 /* *fields */ soc_TCP_PSH_BCM53400_A0fmt_fields, 1027 /* bits */ 4, 1028 /* flags */ 0, 1029 }, 1030 #endif /* chips */ 1031 1032 #if defined(BCM_56960_A0) 1033 { /* SOC_FORMAT_INT_TCP_PSH_BCM56960_A0fmt */ 1034 /* format TCP_PSHfmt */ 1035 /* nFields */ 1, 1036 /* *fields */ soc_TCP_PSH_BCM53400_A0fmt_fields, 1037 /* bits */ 4, 1038 /* flags */ 0, 1039 }, 1040 #endif /* chips */ 1041 1042 #if defined(BCM_56965_A0) 1043 { /* SOC_FORMAT_INT_TCP_PSH_BCM56965_A0fmt */ 1044 /* format TCP_PSHfmt */ 1045 /* nFields */ 1, 1046 /* *fields */ soc_TCP_PSH_BCM53400_A0fmt_fields, 1047 /* bits */ 4, 1048 /* flags */ 0, 1049 }, 1050 #endif /* chips */ 1051 1052 #if defined(BCM_56970_A0) 1053 { /* SOC_FORMAT_INT_TCP_PSH_BCM56970_A0fmt */ 1054 /* format TCP_PSHfmt */ 1055 /* nFields */ 1, 1056 /* *fields */ soc_TCP_PSH_BCM53400_A0fmt_fields, 1057 /* bits */ 4, 1058 /* flags */ 0, 1059 }, 1060 #endif /* chips */ 1061 1062 #if defined(BCM_56980_A0) 1063 { /* SOC_FORMAT_INT_TCP_PSH_BCM56980_A0fmt */ 1064 /* format TCP_PSHfmt */ 1065 /* nFields */ 1, 1066 /* *fields */ soc_TCP_PSH_BCM53400_A0fmt_fields, 1067 /* bits */ 4, 1068 /* flags */ 0, 1069 }, 1070 #endif /* chips */ 1071 1072 #if defined(BCM_56980_B0) 1073 { /* SOC_FORMAT_INT_TCP_PSH_BCM56980_B0fmt */ 1074 /* format TCP_PSHfmt */ 1075 /* nFields */ 1, 1076 /* *fields */ soc_TCP_PSH_BCM53400_A0fmt_fields, 1077 /* bits */ 4, 1078 /* flags */ 0, 1079 }, 1080 #endif /* chips */ 1081 1082 #if defined(BCM_56150_A0) || defined(BCM_56340_A0) || \ 1083 defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 1084 defined(BCM_56450_B1) || defined(BCM_56640_A0) || \ 1085 defined(BCM_56850_A0) || defined(BCM_56860_A0) 1086 { /* SOC_FORMAT_INT_TCP_RSTfmt */ 1087 /* format TCP_RSTfmt */ 1088 /* nFields */ 1, 1089 /* *fields */ soc_TCP_RSTfmt_fields, 1090 /* bits */ 3, 1091 /* flags */ 0, 1092 }, 1093 #endif /* chips */ 1094 1095 #if defined(BCM_53400_A0) 1096 { /* SOC_FORMAT_INT_TCP_RST_BCM53400_A0fmt */ 1097 /* format TCP_RSTfmt */ 1098 /* nFields */ 1, 1099 /* *fields */ soc_TCP_RST_BCM53400_A0fmt_fields, 1100 /* bits */ 3, 1101 /* flags */ 0, 1102 }, 1103 #endif /* chips */ 1104 1105 #if defined(BCM_53540_A0) 1106 { /* SOC_FORMAT_INT_TCP_RST_BCM53540_A0fmt */ 1107 /* format TCP_RSTfmt */ 1108 /* nFields */ 1, 1109 /* *fields */ soc_TCP_RST_BCM53400_A0fmt_fields, 1110 /* bits */ 3, 1111 /* flags */ 0, 1112 }, 1113 #endif /* chips */ 1114 1115 #if defined(BCM_53570_A0) 1116 { /* SOC_FORMAT_INT_TCP_RST_BCM53570_A0fmt */ 1117 /* format TCP_RSTfmt */ 1118 /* nFields */ 1, 1119 /* *fields */ soc_TCP_RST_BCM53400_A0fmt_fields, 1120 /* bits */ 3, 1121 /* flags */ 0, 1122 }, 1123 #endif /* chips */ 1124 1125 #if defined(BCM_53570_B0) 1126 { /* SOC_FORMAT_INT_TCP_RST_BCM53570_B0fmt */ 1127 /* format TCP_RSTfmt */ 1128 /* nFields */ 1, 1129 /* *fields */ soc_TCP_RST_BCM53400_A0fmt_fields, 1130 /* bits */ 3, 1131 /* flags */ 0, 1132 }, 1133 #endif /* chips */ 1134 1135 #if defined(BCM_56160_A0) 1136 { /* SOC_FORMAT_INT_TCP_RST_BCM56160_A0fmt */ 1137 /* format TCP_RSTfmt */ 1138 /* nFields */ 1, 1139 /* *fields */ soc_TCP_RST_BCM53400_A0fmt_fields, 1140 /* bits */ 3, 1141 /* flags */ 0, 1142 }, 1143 #endif /* chips */ 1144 1145 #if defined(BCM_56260_A0) 1146 { /* SOC_FORMAT_INT_TCP_RST_BCM56260_A0fmt */ 1147 /* format TCP_RSTfmt */ 1148 /* nFields */ 1, 1149 /* *fields */ soc_TCP_RST_BCM53400_A0fmt_fields, 1150 /* bits */ 3, 1151 /* flags */ 0, 1152 }, 1153 #endif /* chips */ 1154 1155 #if defined(BCM_56260_B0) 1156 { /* SOC_FORMAT_INT_TCP_RST_BCM56260_B0fmt */ 1157 /* format TCP_RSTfmt */ 1158 /* nFields */ 1, 1159 /* *fields */ soc_TCP_RST_BCM53400_A0fmt_fields, 1160 /* bits */ 3, 1161 /* flags */ 0, 1162 }, 1163 #endif /* chips */ 1164 1165 #if defined(BCM_56270_A0) 1166 { /* SOC_FORMAT_INT_TCP_RST_BCM56270_A0fmt */ 1167 /* format TCP_RSTfmt */ 1168 /* nFields */ 1, 1169 /* *fields */ soc_TCP_RST_BCM53400_A0fmt_fields, 1170 /* bits */ 3, 1171 /* flags */ 0, 1172 }, 1173 #endif /* chips */ 1174 1175 #if defined(BCM_56370_A0) 1176 { /* SOC_FORMAT_INT_TCP_RST_BCM56370_A0fmt */ 1177 /* format TCP_RSTfmt */ 1178 /* nFields */ 1, 1179 /* *fields */ soc_TCP_RST_BCM53400_A0fmt_fields, 1180 /* bits */ 3, 1181 /* flags */ 0, 1182 }, 1183 #endif /* chips */ 1184 1185 #if defined(BCM_56560_A0) 1186 { /* SOC_FORMAT_INT_TCP_RST_BCM56560_A0fmt */ 1187 /* format TCP_RSTfmt */ 1188 /* nFields */ 1, 1189 /* *fields */ soc_TCP_RST_BCM53400_A0fmt_fields, 1190 /* bits */ 3, 1191 /* flags */ 0, 1192 }, 1193 #endif /* chips */ 1194 1195 #if defined(BCM_56560_B0) 1196 { /* SOC_FORMAT_INT_TCP_RST_BCM56560_B0fmt */ 1197 /* format TCP_RSTfmt */ 1198 /* nFields */ 1, 1199 /* *fields */ soc_TCP_RST_BCM53400_A0fmt_fields, 1200 /* bits */ 3, 1201 /* flags */ 0, 1202 }, 1203 #endif /* chips */ 1204 1205 #if defined(BCM_56670_A0) 1206 { /* SOC_FORMAT_INT_TCP_RST_BCM56670_A0fmt */ 1207 /* format TCP_RSTfmt */ 1208 /* nFields */ 1, 1209 /* *fields */ soc_TCP_RST_BCM53400_A0fmt_fields, 1210 /* bits */ 3, 1211 /* flags */ 0, 1212 }, 1213 #endif /* chips */ 1214 1215 #if defined(BCM_56670_B0) 1216 { /* SOC_FORMAT_INT_TCP_RST_BCM56670_B0fmt */ 1217 /* format TCP_RSTfmt */ 1218 /* nFields */ 1, 1219 /* *fields */ soc_TCP_RST_BCM53400_A0fmt_fields, 1220 /* bits */ 3, 1221 /* flags */ 0, 1222 }, 1223 #endif /* chips */ 1224 1225 #if defined(BCM_56770_A0) 1226 { /* SOC_FORMAT_INT_TCP_RST_BCM56770_A0fmt */ 1227 /* format TCP_RSTfmt */ 1228 /* nFields */ 1, 1229 /* *fields */ soc_TCP_RST_BCM53400_A0fmt_fields, 1230 /* bits */ 3, 1231 /* flags */ 0, 1232 }, 1233 #endif /* chips */ 1234 1235 #if defined(BCM_56870_A0) 1236 { /* SOC_FORMAT_INT_TCP_RST_BCM56870_A0fmt */ 1237 /* format TCP_RSTfmt */ 1238 /* nFields */ 1, 1239 /* *fields */ soc_TCP_RST_BCM53400_A0fmt_fields, 1240 /* bits */ 3, 1241 /* flags */ 0, 1242 }, 1243 #endif /* chips */ 1244 1245 #if defined(BCM_56960_A0) 1246 { /* SOC_FORMAT_INT_TCP_RST_BCM56960_A0fmt */ 1247 /* format TCP_RSTfmt */ 1248 /* nFields */ 1, 1249 /* *fields */ soc_TCP_RST_BCM53400_A0fmt_fields, 1250 /* bits */ 3, 1251 /* flags */ 0, 1252 }, 1253 #endif /* chips */ 1254 1255 #if defined(BCM_56965_A0) 1256 { /* SOC_FORMAT_INT_TCP_RST_BCM56965_A0fmt */ 1257 /* format TCP_RSTfmt */ 1258 /* nFields */ 1, 1259 /* *fields */ soc_TCP_RST_BCM53400_A0fmt_fields, 1260 /* bits */ 3, 1261 /* flags */ 0, 1262 }, 1263 #endif /* chips */ 1264 1265 #if defined(BCM_56970_A0) 1266 { /* SOC_FORMAT_INT_TCP_RST_BCM56970_A0fmt */ 1267 /* format TCP_RSTfmt */ 1268 /* nFields */ 1, 1269 /* *fields */ soc_TCP_RST_BCM53400_A0fmt_fields, 1270 /* bits */ 3, 1271 /* flags */ 0, 1272 }, 1273 #endif /* chips */ 1274 1275 #if defined(BCM_56980_A0) 1276 { /* SOC_FORMAT_INT_TCP_RST_BCM56980_A0fmt */ 1277 /* format TCP_RSTfmt */ 1278 /* nFields */ 1, 1279 /* *fields */ soc_TCP_RST_BCM53400_A0fmt_fields, 1280 /* bits */ 3, 1281 /* flags */ 0, 1282 }, 1283 #endif /* chips */ 1284 1285 #if defined(BCM_56980_B0) 1286 { /* SOC_FORMAT_INT_TCP_RST_BCM56980_B0fmt */ 1287 /* format TCP_RSTfmt */ 1288 /* nFields */ 1, 1289 /* *fields */ soc_TCP_RST_BCM53400_A0fmt_fields, 1290 /* bits */ 3, 1291 /* flags */ 0, 1292 }, 1293 #endif /* chips */ 1294 1295 #if defined(BCM_56150_A0) || defined(BCM_56340_A0) || \ 1296 defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 1297 defined(BCM_56450_B1) || defined(BCM_56640_A0) || \ 1298 defined(BCM_56850_A0) || defined(BCM_56860_A0) 1299 { /* SOC_FORMAT_INT_TCP_SYNfmt */ 1300 /* format TCP_SYNfmt */ 1301 /* nFields */ 1, 1302 /* *fields */ soc_TCP_SYNfmt_fields, 1303 /* bits */ 2, 1304 /* flags */ 0, 1305 }, 1306 #endif /* chips */ 1307 1308 #if defined(BCM_53400_A0) 1309 { /* SOC_FORMAT_INT_TCP_SYN_BCM53400_A0fmt */ 1310 /* format TCP_SYNfmt */ 1311 /* nFields */ 1, 1312 /* *fields */ soc_TCP_SYN_BCM53400_A0fmt_fields, 1313 /* bits */ 2, 1314 /* flags */ 0, 1315 }, 1316 #endif /* chips */ 1317 1318 #if defined(BCM_53540_A0) 1319 { /* SOC_FORMAT_INT_TCP_SYN_BCM53540_A0fmt */ 1320 /* format TCP_SYNfmt */ 1321 /* nFields */ 1, 1322 /* *fields */ soc_TCP_SYN_BCM53400_A0fmt_fields, 1323 /* bits */ 2, 1324 /* flags */ 0, 1325 }, 1326 #endif /* chips */ 1327 1328 #if defined(BCM_53570_A0) 1329 { /* SOC_FORMAT_INT_TCP_SYN_BCM53570_A0fmt */ 1330 /* format TCP_SYNfmt */ 1331 /* nFields */ 1, 1332 /* *fields */ soc_TCP_SYN_BCM53400_A0fmt_fields, 1333 /* bits */ 2, 1334 /* flags */ 0, 1335 }, 1336 #endif /* chips */ 1337 1338 #if defined(BCM_53570_B0) 1339 { /* SOC_FORMAT_INT_TCP_SYN_BCM53570_B0fmt */ 1340 /* format TCP_SYNfmt */ 1341 /* nFields */ 1, 1342 /* *fields */ soc_TCP_SYN_BCM53400_A0fmt_fields, 1343 /* bits */ 2, 1344 /* flags */ 0, 1345 }, 1346 #endif /* chips */ 1347 1348 #if defined(BCM_56160_A0) 1349 { /* SOC_FORMAT_INT_TCP_SYN_BCM56160_A0fmt */ 1350 /* format TCP_SYNfmt */ 1351 /* nFields */ 1, 1352 /* *fields */ soc_TCP_SYN_BCM53400_A0fmt_fields, 1353 /* bits */ 2, 1354 /* flags */ 0, 1355 }, 1356 #endif /* chips */ 1357 1358 #if defined(BCM_56260_A0) 1359 { /* SOC_FORMAT_INT_TCP_SYN_BCM56260_A0fmt */ 1360 /* format TCP_SYNfmt */ 1361 /* nFields */ 1, 1362 /* *fields */ soc_TCP_SYN_BCM53400_A0fmt_fields, 1363 /* bits */ 2, 1364 /* flags */ 0, 1365 }, 1366 #endif /* chips */ 1367 1368 #if defined(BCM_56260_B0) 1369 { /* SOC_FORMAT_INT_TCP_SYN_BCM56260_B0fmt */ 1370 /* format TCP_SYNfmt */ 1371 /* nFields */ 1, 1372 /* *fields */ soc_TCP_SYN_BCM53400_A0fmt_fields, 1373 /* bits */ 2, 1374 /* flags */ 0, 1375 }, 1376 #endif /* chips */ 1377 1378 #if defined(BCM_56270_A0) 1379 { /* SOC_FORMAT_INT_TCP_SYN_BCM56270_A0fmt */ 1380 /* format TCP_SYNfmt */ 1381 /* nFields */ 1, 1382 /* *fields */ soc_TCP_SYN_BCM53400_A0fmt_fields, 1383 /* bits */ 2, 1384 /* flags */ 0, 1385 }, 1386 #endif /* chips */ 1387 1388 #if defined(BCM_56370_A0) 1389 { /* SOC_FORMAT_INT_TCP_SYN_BCM56370_A0fmt */ 1390 /* format TCP_SYNfmt */ 1391 /* nFields */ 1, 1392 /* *fields */ soc_TCP_SYN_BCM53400_A0fmt_fields, 1393 /* bits */ 2, 1394 /* flags */ 0, 1395 }, 1396 #endif /* chips */ 1397 1398 #if defined(BCM_56560_A0) 1399 { /* SOC_FORMAT_INT_TCP_SYN_BCM56560_A0fmt */ 1400 /* format TCP_SYNfmt */ 1401 /* nFields */ 1, 1402 /* *fields */ soc_TCP_SYN_BCM53400_A0fmt_fields, 1403 /* bits */ 2, 1404 /* flags */ 0, 1405 }, 1406 #endif /* chips */ 1407 1408 #if defined(BCM_56560_B0) 1409 { /* SOC_FORMAT_INT_TCP_SYN_BCM56560_B0fmt */ 1410 /* format TCP_SYNfmt */ 1411 /* nFields */ 1, 1412 /* *fields */ soc_TCP_SYN_BCM53400_A0fmt_fields, 1413 /* bits */ 2, 1414 /* flags */ 0, 1415 }, 1416 #endif /* chips */ 1417 1418 #if defined(BCM_56670_A0) 1419 { /* SOC_FORMAT_INT_TCP_SYN_BCM56670_A0fmt */ 1420 /* format TCP_SYNfmt */ 1421 /* nFields */ 1, 1422 /* *fields */ soc_TCP_SYN_BCM53400_A0fmt_fields, 1423 /* bits */ 2, 1424 /* flags */ 0, 1425 }, 1426 #endif /* chips */ 1427 1428 #if defined(BCM_56670_B0) 1429 { /* SOC_FORMAT_INT_TCP_SYN_BCM56670_B0fmt */ 1430 /* format TCP_SYNfmt */ 1431 /* nFields */ 1, 1432 /* *fields */ soc_TCP_SYN_BCM53400_A0fmt_fields, 1433 /* bits */ 2, 1434 /* flags */ 0, 1435 }, 1436 #endif /* chips */ 1437 1438 #if defined(BCM_56770_A0) 1439 { /* SOC_FORMAT_INT_TCP_SYN_BCM56770_A0fmt */ 1440 /* format TCP_SYNfmt */ 1441 /* nFields */ 1, 1442 /* *fields */ soc_TCP_SYN_BCM53400_A0fmt_fields, 1443 /* bits */ 2, 1444 /* flags */ 0, 1445 }, 1446 #endif /* chips */ 1447 1448 #if defined(BCM_56870_A0) 1449 { /* SOC_FORMAT_INT_TCP_SYN_BCM56870_A0fmt */ 1450 /* format TCP_SYNfmt */ 1451 /* nFields */ 1, 1452 /* *fields */ soc_TCP_SYN_BCM53400_A0fmt_fields, 1453 /* bits */ 2, 1454 /* flags */ 0, 1455 }, 1456 #endif /* chips */ 1457 1458 #if defined(BCM_56960_A0) 1459 { /* SOC_FORMAT_INT_TCP_SYN_BCM56960_A0fmt */ 1460 /* format TCP_SYNfmt */ 1461 /* nFields */ 1, 1462 /* *fields */ soc_TCP_SYN_BCM53400_A0fmt_fields, 1463 /* bits */ 2, 1464 /* flags */ 0, 1465 }, 1466 #endif /* chips */ 1467 1468 #if defined(BCM_56965_A0) 1469 { /* SOC_FORMAT_INT_TCP_SYN_BCM56965_A0fmt */ 1470 /* format TCP_SYNfmt */ 1471 /* nFields */ 1, 1472 /* *fields */ soc_TCP_SYN_BCM53400_A0fmt_fields, 1473 /* bits */ 2, 1474 /* flags */ 0, 1475 }, 1476 #endif /* chips */ 1477 1478 #if defined(BCM_56970_A0) 1479 { /* SOC_FORMAT_INT_TCP_SYN_BCM56970_A0fmt */ 1480 /* format TCP_SYNfmt */ 1481 /* nFields */ 1, 1482 /* *fields */ soc_TCP_SYN_BCM53400_A0fmt_fields, 1483 /* bits */ 2, 1484 /* flags */ 0, 1485 }, 1486 #endif /* chips */ 1487 1488 #if defined(BCM_56980_A0) 1489 { /* SOC_FORMAT_INT_TCP_SYN_BCM56980_A0fmt */ 1490 /* format TCP_SYNfmt */ 1491 /* nFields */ 1, 1492 /* *fields */ soc_TCP_SYN_BCM53400_A0fmt_fields, 1493 /* bits */ 2, 1494 /* flags */ 0, 1495 }, 1496 #endif /* chips */ 1497 1498 #if defined(BCM_56980_B0) 1499 { /* SOC_FORMAT_INT_TCP_SYN_BCM56980_B0fmt */ 1500 /* format TCP_SYNfmt */ 1501 /* nFields */ 1, 1502 /* *fields */ soc_TCP_SYN_BCM53400_A0fmt_fields, 1503 /* bits */ 2, 1504 /* flags */ 0, 1505 }, 1506 #endif /* chips */ 1507 1508 #if defined(BCM_56370_A0) || defined(BCM_56870_A0) 1509 { /* SOC_FORMAT_INT_TCP_UDP_SCTPfmt */ 1510 /* format TCP_UDP_SCTPfmt */ 1511 /* nFields */ 3, 1512 /* *fields */ soc_TCP_UDP_SCTPfmt_fields, 1513 /* bits */ 44, 1514 /* flags */ 0, 1515 }, 1516 #endif /* chips */ 1517 1518 #if defined(BCM_56770_A0) 1519 { /* SOC_FORMAT_INT_TCP_UDP_SCTP_BCM56770_A0fmt */ 1520 /* format TCP_UDP_SCTPfmt */ 1521 /* nFields */ 3, 1522 /* *fields */ soc_TCP_UDP_SCTP_BCM56770_A0fmt_fields, 1523 /* bits */ 44, 1524 /* flags */ 0, 1525 }, 1526 #endif /* chips */ 1527 1528 #if defined(BCM_56150_A0) || defined(BCM_56340_A0) || \ 1529 defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 1530 defined(BCM_56450_B1) || defined(BCM_56640_A0) || \ 1531 defined(BCM_56850_A0) || defined(BCM_56860_A0) 1532 { /* SOC_FORMAT_INT_TCP_URGfmt */ 1533 /* format TCP_URGfmt */ 1534 /* nFields */ 1, 1535 /* *fields */ soc_TCP_URGfmt_fields, 1536 /* bits */ 6, 1537 /* flags */ 0, 1538 }, 1539 #endif /* chips */ 1540 1541 #if defined(BCM_53400_A0) 1542 { /* SOC_FORMAT_INT_TCP_URG_BCM53400_A0fmt */ 1543 /* format TCP_URGfmt */ 1544 /* nFields */ 1, 1545 /* *fields */ soc_TCP_URG_BCM53400_A0fmt_fields, 1546 /* bits */ 6, 1547 /* flags */ 0, 1548 }, 1549 #endif /* chips */ 1550 1551 #if defined(BCM_53540_A0) 1552 { /* SOC_FORMAT_INT_TCP_URG_BCM53540_A0fmt */ 1553 /* format TCP_URGfmt */ 1554 /* nFields */ 1, 1555 /* *fields */ soc_TCP_URG_BCM53400_A0fmt_fields, 1556 /* bits */ 6, 1557 /* flags */ 0, 1558 }, 1559 #endif /* chips */ 1560 1561 #if defined(BCM_53570_A0) 1562 { /* SOC_FORMAT_INT_TCP_URG_BCM53570_A0fmt */ 1563 /* format TCP_URGfmt */ 1564 /* nFields */ 1, 1565 /* *fields */ soc_TCP_URG_BCM53400_A0fmt_fields, 1566 /* bits */ 6, 1567 /* flags */ 0, 1568 }, 1569 #endif /* chips */ 1570 1571 #if defined(BCM_53570_B0) 1572 { /* SOC_FORMAT_INT_TCP_URG_BCM53570_B0fmt */ 1573 /* format TCP_URGfmt */ 1574 /* nFields */ 1, 1575 /* *fields */ soc_TCP_URG_BCM53400_A0fmt_fields, 1576 /* bits */ 6, 1577 /* flags */ 0, 1578 }, 1579 #endif /* chips */ 1580 1581 #if defined(BCM_56160_A0) 1582 { /* SOC_FORMAT_INT_TCP_URG_BCM56160_A0fmt */ 1583 /* format TCP_URGfmt */ 1584 /* nFields */ 1, 1585 /* *fields */ soc_TCP_URG_BCM53400_A0fmt_fields, 1586 /* bits */ 6, 1587 /* flags */ 0, 1588 }, 1589 #endif /* chips */ 1590 1591 #if defined(BCM_56260_A0) 1592 { /* SOC_FORMAT_INT_TCP_URG_BCM56260_A0fmt */ 1593 /* format TCP_URGfmt */ 1594 /* nFields */ 1, 1595 /* *fields */ soc_TCP_URG_BCM53400_A0fmt_fields, 1596 /* bits */ 6, 1597 /* flags */ 0, 1598 }, 1599 #endif /* chips */ 1600 1601 #if defined(BCM_56260_B0) 1602 { /* SOC_FORMAT_INT_TCP_URG_BCM56260_B0fmt */ 1603 /* format TCP_URGfmt */ 1604 /* nFields */ 1, 1605 /* *fields */ soc_TCP_URG_BCM53400_A0fmt_fields, 1606 /* bits */ 6, 1607 /* flags */ 0, 1608 }, 1609 #endif /* chips */ 1610 1611 #if defined(BCM_56270_A0) 1612 { /* SOC_FORMAT_INT_TCP_URG_BCM56270_A0fmt */ 1613 /* format TCP_URGfmt */ 1614 /* nFields */ 1, 1615 /* *fields */ soc_TCP_URG_BCM53400_A0fmt_fields, 1616 /* bits */ 6, 1617 /* flags */ 0, 1618 }, 1619 #endif /* chips */ 1620 1621 #if defined(BCM_56370_A0) 1622 { /* SOC_FORMAT_INT_TCP_URG_BCM56370_A0fmt */ 1623 /* format TCP_URGfmt */ 1624 /* nFields */ 1, 1625 /* *fields */ soc_TCP_URG_BCM53400_A0fmt_fields, 1626 /* bits */ 6, 1627 /* flags */ 0, 1628 }, 1629 #endif /* chips */ 1630 1631 #if defined(BCM_56560_A0) 1632 { /* SOC_FORMAT_INT_TCP_URG_BCM56560_A0fmt */ 1633 /* format TCP_URGfmt */ 1634 /* nFields */ 1, 1635 /* *fields */ soc_TCP_URG_BCM53400_A0fmt_fields, 1636 /* bits */ 6, 1637 /* flags */ 0, 1638 }, 1639 #endif /* chips */ 1640 1641 #if defined(BCM_56560_B0) 1642 { /* SOC_FORMAT_INT_TCP_URG_BCM56560_B0fmt */ 1643 /* format TCP_URGfmt */ 1644 /* nFields */ 1, 1645 /* *fields */ soc_TCP_URG_BCM53400_A0fmt_fields, 1646 /* bits */ 6, 1647 /* flags */ 0, 1648 }, 1649 #endif /* chips */ 1650 1651 #if defined(BCM_56670_A0) 1652 { /* SOC_FORMAT_INT_TCP_URG_BCM56670_A0fmt */ 1653 /* format TCP_URGfmt */ 1654 /* nFields */ 1, 1655 /* *fields */ soc_TCP_URG_BCM53400_A0fmt_fields, 1656 /* bits */ 6, 1657 /* flags */ 0, 1658 }, 1659 #endif /* chips */ 1660 1661 #if defined(BCM_56670_B0) 1662 { /* SOC_FORMAT_INT_TCP_URG_BCM56670_B0fmt */ 1663 /* format TCP_URGfmt */ 1664 /* nFields */ 1, 1665 /* *fields */ soc_TCP_URG_BCM53400_A0fmt_fields, 1666 /* bits */ 6, 1667 /* flags */ 0, 1668 }, 1669 #endif /* chips */ 1670 1671 #if defined(BCM_56770_A0) 1672 { /* SOC_FORMAT_INT_TCP_URG_BCM56770_A0fmt */ 1673 /* format TCP_URGfmt */ 1674 /* nFields */ 1, 1675 /* *fields */ soc_TCP_URG_BCM53400_A0fmt_fields, 1676 /* bits */ 6, 1677 /* flags */ 0, 1678 }, 1679 #endif /* chips */ 1680 1681 #if defined(BCM_56870_A0) 1682 { /* SOC_FORMAT_INT_TCP_URG_BCM56870_A0fmt */ 1683 /* format TCP_URGfmt */ 1684 /* nFields */ 1, 1685 /* *fields */ soc_TCP_URG_BCM53400_A0fmt_fields, 1686 /* bits */ 6, 1687 /* flags */ 0, 1688 }, 1689 #endif /* chips */ 1690 1691 #if defined(BCM_56960_A0) 1692 { /* SOC_FORMAT_INT_TCP_URG_BCM56960_A0fmt */ 1693 /* format TCP_URGfmt */ 1694 /* nFields */ 1, 1695 /* *fields */ soc_TCP_URG_BCM53400_A0fmt_fields, 1696 /* bits */ 6, 1697 /* flags */ 0, 1698 }, 1699 #endif /* chips */ 1700 1701 #if defined(BCM_56965_A0) 1702 { /* SOC_FORMAT_INT_TCP_URG_BCM56965_A0fmt */ 1703 /* format TCP_URGfmt */ 1704 /* nFields */ 1, 1705 /* *fields */ soc_TCP_URG_BCM53400_A0fmt_fields, 1706 /* bits */ 6, 1707 /* flags */ 0, 1708 }, 1709 #endif /* chips */ 1710 1711 #if defined(BCM_56970_A0) 1712 { /* SOC_FORMAT_INT_TCP_URG_BCM56970_A0fmt */ 1713 /* format TCP_URGfmt */ 1714 /* nFields */ 1, 1715 /* *fields */ soc_TCP_URG_BCM53400_A0fmt_fields, 1716 /* bits */ 6, 1717 /* flags */ 0, 1718 }, 1719 #endif /* chips */ 1720 1721 #if defined(BCM_56980_A0) 1722 { /* SOC_FORMAT_INT_TCP_URG_BCM56980_A0fmt */ 1723 /* format TCP_URGfmt */ 1724 /* nFields */ 1, 1725 /* *fields */ soc_TCP_URG_BCM53400_A0fmt_fields, 1726 /* bits */ 6, 1727 /* flags */ 0, 1728 }, 1729 #endif /* chips */ 1730 1731 #if defined(BCM_56980_B0) 1732 { /* SOC_FORMAT_INT_TCP_URG_BCM56980_B0fmt */ 1733 /* format TCP_URGfmt */ 1734 /* nFields */ 1, 1735 /* *fields */ soc_TCP_URG_BCM53400_A0fmt_fields, 1736 /* bits */ 6, 1737 /* flags */ 0, 1738 }, 1739 #endif /* chips */ 1740 1741 #if defined(BCM_56504_A0) 1742 { /* SOC_FORMAT_INT_TDBGC_TRIGGERSfmt */ 1743 /* format TDBGC_TRIGGERSfmt */ 1744 /* nFields */ 21, 1745 /* *fields */ soc_TDBGC_TRIGGERSfmt_fields, 1746 /* bits */ 21, 1747 /* flags */ 0, 1748 }, 1749 #endif /* chips */ 1750 1751 #if defined(BCM_53314_A0) 1752 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM53314_A0fmt */ 1753 /* format TDBGC_TRIGGERSfmt */ 1754 /* nFields */ 21, 1755 /* *fields */ soc_TDBGC_TRIGGERSfmt_fields, 1756 /* bits */ 21, 1757 /* flags */ 0, 1758 }, 1759 #endif /* chips */ 1760 1761 #if defined(BCM_53324_A0) 1762 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM53324_A0fmt */ 1763 /* format TDBGC_TRIGGERSfmt */ 1764 /* nFields */ 21, 1765 /* *fields */ soc_TDBGC_TRIGGERSfmt_fields, 1766 /* bits */ 21, 1767 /* flags */ 0, 1768 }, 1769 #endif /* chips */ 1770 1771 #if defined(BCM_53400_A0) 1772 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM53400_A0fmt */ 1773 /* format TDBGC_TRIGGERSfmt */ 1774 /* nFields */ 32, 1775 /* *fields */ soc_TDBGC_TRIGGERS_BCM53400_A0fmt_fields, 1776 /* bits */ 32, 1777 /* flags */ 0, 1778 }, 1779 #endif /* chips */ 1780 1781 #if defined(BCM_53540_A0) 1782 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM53540_A0fmt */ 1783 /* format TDBGC_TRIGGERSfmt */ 1784 /* nFields */ 32, 1785 /* *fields */ soc_TDBGC_TRIGGERS_BCM53400_A0fmt_fields, 1786 /* bits */ 32, 1787 /* flags */ 0, 1788 }, 1789 #endif /* chips */ 1790 1791 #if defined(BCM_53570_A0) 1792 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM53570_A0fmt */ 1793 /* format TDBGC_TRIGGERSfmt */ 1794 /* nFields */ 32, 1795 /* *fields */ soc_TDBGC_TRIGGERS_BCM53400_A0fmt_fields, 1796 /* bits */ 32, 1797 /* flags */ 0, 1798 }, 1799 #endif /* chips */ 1800 1801 #if defined(BCM_53570_B0) 1802 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM53570_B0fmt */ 1803 /* format TDBGC_TRIGGERSfmt */ 1804 /* nFields */ 32, 1805 /* *fields */ soc_TDBGC_TRIGGERS_BCM53400_A0fmt_fields, 1806 /* bits */ 32, 1807 /* flags */ 0, 1808 }, 1809 #endif /* chips */ 1810 1811 #if defined(BCM_56142_A0) 1812 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56142_A0fmt */ 1813 /* format TDBGC_TRIGGERSfmt */ 1814 /* nFields */ 30, 1815 /* *fields */ soc_TDBGC_TRIGGERS_BCM56624_A0fmt_fields, 1816 /* bits */ 30, 1817 /* flags */ 0, 1818 }, 1819 #endif /* chips */ 1820 1821 #if defined(BCM_56150_A0) 1822 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56150_A0fmt */ 1823 /* format TDBGC_TRIGGERSfmt */ 1824 /* nFields */ 30, 1825 /* *fields */ soc_TDBGC_TRIGGERS_BCM56150_A0fmt_fields, 1826 /* bits */ 30, 1827 /* flags */ 0, 1828 }, 1829 #endif /* chips */ 1830 1831 #if defined(BCM_56160_A0) 1832 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56160_A0fmt */ 1833 /* format TDBGC_TRIGGERSfmt */ 1834 /* nFields */ 32, 1835 /* *fields */ soc_TDBGC_TRIGGERS_BCM53400_A0fmt_fields, 1836 /* bits */ 32, 1837 /* flags */ 0, 1838 }, 1839 #endif /* chips */ 1840 1841 #if defined(BCM_56224_A0) 1842 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56224_A0fmt */ 1843 /* format TDBGC_TRIGGERSfmt */ 1844 /* nFields */ 21, 1845 /* *fields */ soc_TDBGC_TRIGGERSfmt_fields, 1846 /* bits */ 21, 1847 /* flags */ 0, 1848 }, 1849 #endif /* chips */ 1850 1851 #if defined(BCM_56224_B0) 1852 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56224_B0fmt */ 1853 /* format TDBGC_TRIGGERSfmt */ 1854 /* nFields */ 21, 1855 /* *fields */ soc_TDBGC_TRIGGERSfmt_fields, 1856 /* bits */ 21, 1857 /* flags */ 0, 1858 }, 1859 #endif /* chips */ 1860 1861 #if defined(BCM_56260_A0) 1862 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56260_A0fmt */ 1863 /* format TDBGC_TRIGGERSfmt */ 1864 /* nFields */ 34, 1865 /* *fields */ soc_TDBGC_TRIGGERS_BCM56260_A0fmt_fields, 1866 /* bits */ 34, 1867 /* flags */ 0, 1868 }, 1869 #endif /* chips */ 1870 1871 #if defined(BCM_56260_B0) 1872 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56260_B0fmt */ 1873 /* format TDBGC_TRIGGERSfmt */ 1874 /* nFields */ 34, 1875 /* *fields */ soc_TDBGC_TRIGGERS_BCM56260_A0fmt_fields, 1876 /* bits */ 34, 1877 /* flags */ 0, 1878 }, 1879 #endif /* chips */ 1880 1881 #if defined(BCM_56270_A0) 1882 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56270_A0fmt */ 1883 /* format TDBGC_TRIGGERSfmt */ 1884 /* nFields */ 34, 1885 /* *fields */ soc_TDBGC_TRIGGERS_BCM56260_A0fmt_fields, 1886 /* bits */ 34, 1887 /* flags */ 0, 1888 }, 1889 #endif /* chips */ 1890 1891 #if defined(BCM_56314_A0) 1892 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56314_A0fmt */ 1893 /* format TDBGC_TRIGGERSfmt */ 1894 /* nFields */ 23, 1895 /* *fields */ soc_TDBGC_TRIGGERS_BCM56504_B0fmt_fields, 1896 /* bits */ 23, 1897 /* flags */ 0, 1898 }, 1899 #endif /* chips */ 1900 1901 #if defined(BCM_56334_A0) 1902 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56334_A0fmt */ 1903 /* format TDBGC_TRIGGERSfmt */ 1904 /* nFields */ 30, 1905 /* *fields */ soc_TDBGC_TRIGGERS_BCM56624_A0fmt_fields, 1906 /* bits */ 30, 1907 /* flags */ 0, 1908 }, 1909 #endif /* chips */ 1910 1911 #if defined(BCM_56334_B0) 1912 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56334_B0fmt */ 1913 /* format TDBGC_TRIGGERSfmt */ 1914 /* nFields */ 30, 1915 /* *fields */ soc_TDBGC_TRIGGERS_BCM56624_A0fmt_fields, 1916 /* bits */ 30, 1917 /* flags */ 0, 1918 }, 1919 #endif /* chips */ 1920 1921 #if defined(BCM_56340_A0) 1922 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56340_A0fmt */ 1923 /* format TDBGC_TRIGGERSfmt */ 1924 /* nFields */ 34, 1925 /* *fields */ soc_TDBGC_TRIGGERS_BCM56640_A0fmt_fields, 1926 /* bits */ 34, 1927 /* flags */ 0, 1928 }, 1929 #endif /* chips */ 1930 1931 #if defined(BCM_56370_A0) 1932 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56370_A0fmt */ 1933 /* format TDBGC_TRIGGERSfmt */ 1934 /* nFields */ 2, 1935 /* *fields */ soc_TDBGC_TRIGGERS_BCM56870_A0fmt_fields, 1936 /* bits */ 55, 1937 /* flags */ 0, 1938 }, 1939 #endif /* chips */ 1940 1941 #if defined(BCM_56440_A0) 1942 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56440_A0fmt */ 1943 /* format TDBGC_TRIGGERSfmt */ 1944 /* nFields */ 31, 1945 /* *fields */ soc_TDBGC_TRIGGERS_BCM56840_A0fmt_fields, 1946 /* bits */ 31, 1947 /* flags */ 0, 1948 }, 1949 #endif /* chips */ 1950 1951 #if defined(BCM_56440_B0) 1952 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56440_B0fmt */ 1953 /* format TDBGC_TRIGGERSfmt */ 1954 /* nFields */ 31, 1955 /* *fields */ soc_TDBGC_TRIGGERS_BCM56840_A0fmt_fields, 1956 /* bits */ 31, 1957 /* flags */ 0, 1958 }, 1959 #endif /* chips */ 1960 1961 #if defined(BCM_56450_A0) 1962 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56450_A0fmt */ 1963 /* format TDBGC_TRIGGERSfmt */ 1964 /* nFields */ 33, 1965 /* *fields */ soc_TDBGC_TRIGGERS_BCM56450_A0fmt_fields, 1966 /* bits */ 33, 1967 /* flags */ 0, 1968 }, 1969 #endif /* chips */ 1970 1971 #if defined(BCM_56450_B0) 1972 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56450_B0fmt */ 1973 /* format TDBGC_TRIGGERSfmt */ 1974 /* nFields */ 33, 1975 /* *fields */ soc_TDBGC_TRIGGERS_BCM56450_A0fmt_fields, 1976 /* bits */ 33, 1977 /* flags */ 0, 1978 }, 1979 #endif /* chips */ 1980 1981 #if defined(BCM_56450_B1) 1982 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56450_B1fmt */ 1983 /* format TDBGC_TRIGGERSfmt */ 1984 /* nFields */ 33, 1985 /* *fields */ soc_TDBGC_TRIGGERS_BCM56450_A0fmt_fields, 1986 /* bits */ 33, 1987 /* flags */ 0, 1988 }, 1989 #endif /* chips */ 1990 1991 #if defined(BCM_56504_B0) 1992 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56504_B0fmt */ 1993 /* format TDBGC_TRIGGERSfmt */ 1994 /* nFields */ 23, 1995 /* *fields */ soc_TDBGC_TRIGGERS_BCM56504_B0fmt_fields, 1996 /* bits */ 23, 1997 /* flags */ 0, 1998 }, 1999 #endif /* chips */ 2000 2001 #if defined(BCM_56514_A0) 2002 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56514_A0fmt */ 2003 /* format TDBGC_TRIGGERSfmt */ 2004 /* nFields */ 23, 2005 /* *fields */ soc_TDBGC_TRIGGERS_BCM56504_B0fmt_fields, 2006 /* bits */ 23, 2007 /* flags */ 0, 2008 }, 2009 #endif /* chips */ 2010 2011 #if defined(BCM_56524_A0) 2012 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56524_A0fmt */ 2013 /* format TDBGC_TRIGGERSfmt */ 2014 /* nFields */ 32, 2015 /* *fields */ soc_TDBGC_TRIGGERS_BCM56634_A0fmt_fields, 2016 /* bits */ 32, 2017 /* flags */ 0, 2018 }, 2019 #endif /* chips */ 2020 2021 #if defined(BCM_56524_B0) 2022 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56524_B0fmt */ 2023 /* format TDBGC_TRIGGERSfmt */ 2024 /* nFields */ 32, 2025 /* *fields */ soc_TDBGC_TRIGGERS_BCM56634_A0fmt_fields, 2026 /* bits */ 32, 2027 /* flags */ 0, 2028 }, 2029 #endif /* chips */ 2030 2031 #if defined(BCM_56560_A0) 2032 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56560_A0fmt */ 2033 /* format TDBGC_TRIGGERSfmt */ 2034 /* nFields */ 39, 2035 /* *fields */ soc_TDBGC_TRIGGERS_BCM56560_A0fmt_fields, 2036 /* bits */ 39, 2037 /* flags */ 0, 2038 }, 2039 #endif /* chips */ 2040 2041 #if defined(BCM_56560_B0) 2042 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56560_B0fmt */ 2043 /* format TDBGC_TRIGGERSfmt */ 2044 /* nFields */ 39, 2045 /* *fields */ soc_TDBGC_TRIGGERS_BCM56560_A0fmt_fields, 2046 /* bits */ 39, 2047 /* flags */ 0, 2048 }, 2049 #endif /* chips */ 2050 2051 #if defined(BCM_56624_A0) 2052 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56624_A0fmt */ 2053 /* format TDBGC_TRIGGERSfmt */ 2054 /* nFields */ 30, 2055 /* *fields */ soc_TDBGC_TRIGGERS_BCM56624_A0fmt_fields, 2056 /* bits */ 30, 2057 /* flags */ 0, 2058 }, 2059 #endif /* chips */ 2060 2061 #if defined(BCM_56624_B0) 2062 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56624_B0fmt */ 2063 /* format TDBGC_TRIGGERSfmt */ 2064 /* nFields */ 30, 2065 /* *fields */ soc_TDBGC_TRIGGERS_BCM56624_A0fmt_fields, 2066 /* bits */ 30, 2067 /* flags */ 0, 2068 }, 2069 #endif /* chips */ 2070 2071 #if defined(BCM_56634_A0) 2072 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56634_A0fmt */ 2073 /* format TDBGC_TRIGGERSfmt */ 2074 /* nFields */ 32, 2075 /* *fields */ soc_TDBGC_TRIGGERS_BCM56634_A0fmt_fields, 2076 /* bits */ 32, 2077 /* flags */ 0, 2078 }, 2079 #endif /* chips */ 2080 2081 #if defined(BCM_56634_B0) 2082 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56634_B0fmt */ 2083 /* format TDBGC_TRIGGERSfmt */ 2084 /* nFields */ 32, 2085 /* *fields */ soc_TDBGC_TRIGGERS_BCM56634_A0fmt_fields, 2086 /* bits */ 32, 2087 /* flags */ 0, 2088 }, 2089 #endif /* chips */ 2090 2091 #if defined(BCM_56640_A0) 2092 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56640_A0fmt */ 2093 /* format TDBGC_TRIGGERSfmt */ 2094 /* nFields */ 34, 2095 /* *fields */ soc_TDBGC_TRIGGERS_BCM56640_A0fmt_fields, 2096 /* bits */ 34, 2097 /* flags */ 0, 2098 }, 2099 #endif /* chips */ 2100 2101 #if defined(BCM_56670_A0) 2102 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56670_A0fmt */ 2103 /* format TDBGC_TRIGGERSfmt */ 2104 /* nFields */ 39, 2105 /* *fields */ soc_TDBGC_TRIGGERS_BCM56560_A0fmt_fields, 2106 /* bits */ 39, 2107 /* flags */ 0, 2108 }, 2109 #endif /* chips */ 2110 2111 #if defined(BCM_56670_B0) 2112 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56670_B0fmt */ 2113 /* format TDBGC_TRIGGERSfmt */ 2114 /* nFields */ 39, 2115 /* *fields */ soc_TDBGC_TRIGGERS_BCM56560_A0fmt_fields, 2116 /* bits */ 39, 2117 /* flags */ 0, 2118 }, 2119 #endif /* chips */ 2120 2121 #if defined(BCM_56680_A0) 2122 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56680_A0fmt */ 2123 /* format TDBGC_TRIGGERSfmt */ 2124 /* nFields */ 30, 2125 /* *fields */ soc_TDBGC_TRIGGERS_BCM56624_A0fmt_fields, 2126 /* bits */ 30, 2127 /* flags */ 0, 2128 }, 2129 #endif /* chips */ 2130 2131 #if defined(BCM_56680_B0) 2132 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56680_B0fmt */ 2133 /* format TDBGC_TRIGGERSfmt */ 2134 /* nFields */ 30, 2135 /* *fields */ soc_TDBGC_TRIGGERS_BCM56624_A0fmt_fields, 2136 /* bits */ 30, 2137 /* flags */ 0, 2138 }, 2139 #endif /* chips */ 2140 2141 #if defined(BCM_56685_A0) 2142 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56685_A0fmt */ 2143 /* format TDBGC_TRIGGERSfmt */ 2144 /* nFields */ 32, 2145 /* *fields */ soc_TDBGC_TRIGGERS_BCM56634_A0fmt_fields, 2146 /* bits */ 32, 2147 /* flags */ 0, 2148 }, 2149 #endif /* chips */ 2150 2151 #if defined(BCM_56685_B0) 2152 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56685_B0fmt */ 2153 /* format TDBGC_TRIGGERSfmt */ 2154 /* nFields */ 32, 2155 /* *fields */ soc_TDBGC_TRIGGERS_BCM56634_A0fmt_fields, 2156 /* bits */ 32, 2157 /* flags */ 0, 2158 }, 2159 #endif /* chips */ 2160 2161 #if defined(BCM_56725_A0) 2162 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56725_A0fmt */ 2163 /* format TDBGC_TRIGGERSfmt */ 2164 /* nFields */ 30, 2165 /* *fields */ soc_TDBGC_TRIGGERS_BCM56624_A0fmt_fields, 2166 /* bits */ 30, 2167 /* flags */ 0, 2168 }, 2169 #endif /* chips */ 2170 2171 #if defined(BCM_56770_A0) 2172 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56770_A0fmt */ 2173 /* format TDBGC_TRIGGERSfmt */ 2174 /* nFields */ 2, 2175 /* *fields */ soc_TDBGC_TRIGGERS_BCM56870_A0fmt_fields, 2176 /* bits */ 55, 2177 /* flags */ 0, 2178 }, 2179 #endif /* chips */ 2180 2181 #if defined(BCM_56800_A0) 2182 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56800_A0fmt */ 2183 /* format TDBGC_TRIGGERSfmt */ 2184 /* nFields */ 28, 2185 /* *fields */ soc_TDBGC_TRIGGERS_BCM56800_A0fmt_fields, 2186 /* bits */ 28, 2187 /* flags */ 0, 2188 }, 2189 #endif /* chips */ 2190 2191 #if defined(BCM_56820_A0) 2192 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56820_A0fmt */ 2193 /* format TDBGC_TRIGGERSfmt */ 2194 /* nFields */ 30, 2195 /* *fields */ soc_TDBGC_TRIGGERS_BCM56624_A0fmt_fields, 2196 /* bits */ 30, 2197 /* flags */ 0, 2198 }, 2199 #endif /* chips */ 2200 2201 #if defined(BCM_56840_A0) 2202 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56840_A0fmt */ 2203 /* format TDBGC_TRIGGERSfmt */ 2204 /* nFields */ 31, 2205 /* *fields */ soc_TDBGC_TRIGGERS_BCM56840_A0fmt_fields, 2206 /* bits */ 31, 2207 /* flags */ 0, 2208 }, 2209 #endif /* chips */ 2210 2211 #if defined(BCM_56840_B0) 2212 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56840_B0fmt */ 2213 /* format TDBGC_TRIGGERSfmt */ 2214 /* nFields */ 31, 2215 /* *fields */ soc_TDBGC_TRIGGERS_BCM56840_A0fmt_fields, 2216 /* bits */ 31, 2217 /* flags */ 0, 2218 }, 2219 #endif /* chips */ 2220 2221 #if defined(BCM_56850_A0) 2222 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56850_A0fmt */ 2223 /* format TDBGC_TRIGGERSfmt */ 2224 /* nFields */ 37, 2225 /* *fields */ soc_TDBGC_TRIGGERS_BCM56850_A0fmt_fields, 2226 /* bits */ 37, 2227 /* flags */ 0, 2228 }, 2229 #endif /* chips */ 2230 2231 #if defined(BCM_56860_A0) 2232 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56860_A0fmt */ 2233 /* format TDBGC_TRIGGERSfmt */ 2234 /* nFields */ 38, 2235 /* *fields */ soc_TDBGC_TRIGGERS_BCM56860_A0fmt_fields, 2236 /* bits */ 38, 2237 /* flags */ 0, 2238 }, 2239 #endif /* chips */ 2240 2241 #if defined(BCM_56870_A0) 2242 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56870_A0fmt */ 2243 /* format TDBGC_TRIGGERSfmt */ 2244 /* nFields */ 2, 2245 /* *fields */ soc_TDBGC_TRIGGERS_BCM56870_A0fmt_fields, 2246 /* bits */ 55, 2247 /* flags */ 0, 2248 }, 2249 #endif /* chips */ 2250 2251 #if defined(BCM_56960_A0) 2252 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56960_A0fmt */ 2253 /* format TDBGC_TRIGGERSfmt */ 2254 /* nFields */ 33, 2255 /* *fields */ soc_TDBGC_TRIGGERS_BCM56960_A0fmt_fields, 2256 /* bits */ 33, 2257 /* flags */ 0, 2258 }, 2259 #endif /* chips */ 2260 2261 #if defined(BCM_56965_A0) 2262 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56965_A0fmt */ 2263 /* format TDBGC_TRIGGERSfmt */ 2264 /* nFields */ 33, 2265 /* *fields */ soc_TDBGC_TRIGGERS_BCM56960_A0fmt_fields, 2266 /* bits */ 33, 2267 /* flags */ 0, 2268 }, 2269 #endif /* chips */ 2270 2271 #if defined(BCM_56970_A0) 2272 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56970_A0fmt */ 2273 /* format TDBGC_TRIGGERSfmt */ 2274 /* nFields */ 33, 2275 /* *fields */ soc_TDBGC_TRIGGERS_BCM56960_A0fmt_fields, 2276 /* bits */ 33, 2277 /* flags */ 0, 2278 }, 2279 #endif /* chips */ 2280 2281 #if defined(BCM_56980_A0) 2282 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56980_A0fmt */ 2283 /* format TDBGC_TRIGGERSfmt */ 2284 /* nFields */ 33, 2285 /* *fields */ soc_TDBGC_TRIGGERS_BCM56980_A0fmt_fields, 2286 /* bits */ 33, 2287 /* flags */ 0, 2288 }, 2289 #endif /* chips */ 2290 2291 #if defined(BCM_56980_B0) 2292 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM56980_B0fmt */ 2293 /* format TDBGC_TRIGGERSfmt */ 2294 /* nFields */ 33, 2295 /* *fields */ soc_TDBGC_TRIGGERS_BCM56980_A0fmt_fields, 2296 /* bits */ 33, 2297 /* flags */ 0, 2298 }, 2299 #endif /* chips */ 2300 2301 #if defined(BCM_88732_A0) 2302 { /* SOC_FORMAT_INT_TDBGC_TRIGGERS_BCM88732_A0fmt */ 2303 /* format TDBGC_TRIGGERSfmt */ 2304 /* nFields */ 18, 2305 /* *fields */ soc_TDBGC_TRIGGERS_BCM88732_A0fmt_fields, 2306 /* bits */ 30, 2307 /* flags */ 0, 2308 }, 2309 #endif /* chips */ 2310 2311 #if defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 2312 defined(BCM_56450_B1) 2313 { /* SOC_FORMAT_INT_THDIEMA_THDI_PORT_PG_BSTfmt */ 2314 /* format THDIEMA_THDI_PORT_PG_BSTfmt */ 2315 /* nFields */ 7, 2316 /* *fields */ soc_THDIEMA_THDI_PORT_PG_BSTfmt_fields, 2317 /* bits */ 37, 2318 /* flags */ 0, 2319 }, 2320 #endif /* chips */ 2321 2322 #if defined(BCM_56260_A0) 2323 { /* SOC_FORMAT_INT_THDIEMA_THDI_PORT_PG_BST_BCM56260_A0fmt */ 2324 /* format THDIEMA_THDI_PORT_PG_BSTfmt */ 2325 /* nFields */ 7, 2326 /* *fields */ soc_THDIEMA_THDI_PORT_PG_BST_BCM56260_A0fmt_fields, 2327 /* bits */ 37, 2328 /* flags */ 0, 2329 }, 2330 #endif /* chips */ 2331 2332 #if defined(BCM_56260_B0) 2333 { /* SOC_FORMAT_INT_THDIEMA_THDI_PORT_PG_BST_BCM56260_B0fmt */ 2334 /* format THDIEMA_THDI_PORT_PG_BSTfmt */ 2335 /* nFields */ 7, 2336 /* *fields */ soc_THDIEMA_THDI_PORT_PG_BST_BCM56260_A0fmt_fields, 2337 /* bits */ 37, 2338 /* flags */ 0, 2339 }, 2340 #endif /* chips */ 2341 2342 #if defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 2343 defined(BCM_56450_B1) 2344 { /* SOC_FORMAT_INT_THDIEMA_THDI_PORT_SP_BSTfmt */ 2345 /* format THDIEMA_THDI_PORT_SP_BSTfmt */ 2346 /* nFields */ 4, 2347 /* *fields */ soc_THDIEMA_THDI_PORT_SP_BSTfmt_fields, 2348 /* bits */ 19, 2349 /* flags */ 0, 2350 }, 2351 #endif /* chips */ 2352 2353 #if defined(BCM_56260_A0) 2354 { /* SOC_FORMAT_INT_THDIEMA_THDI_PORT_SP_BST_BCM56260_A0fmt */ 2355 /* format THDIEMA_THDI_PORT_SP_BSTfmt */ 2356 /* nFields */ 4, 2357 /* *fields */ soc_THDIEMA_THDI_PORT_SP_BST_BCM56260_A0fmt_fields, 2358 /* bits */ 19, 2359 /* flags */ 0, 2360 }, 2361 #endif /* chips */ 2362 2363 #if defined(BCM_56260_B0) 2364 { /* SOC_FORMAT_INT_THDIEMA_THDI_PORT_SP_BST_BCM56260_B0fmt */ 2365 /* format THDIEMA_THDI_PORT_SP_BSTfmt */ 2366 /* nFields */ 4, 2367 /* *fields */ soc_THDIEMA_THDI_PORT_SP_BST_BCM56260_A0fmt_fields, 2368 /* bits */ 19, 2369 /* flags */ 0, 2370 }, 2371 #endif /* chips */ 2372 2373 #if defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 2374 defined(BCM_56450_B1) 2375 { /* SOC_FORMAT_INT_THDIEXT_THDI_PORT_PG_BSTfmt */ 2376 /* format THDIEXT_THDI_PORT_PG_BSTfmt */ 2377 /* nFields */ 7, 2378 /* *fields */ soc_THDIEXT_THDI_PORT_PG_BSTfmt_fields, 2379 /* bits */ 37, 2380 /* flags */ 0, 2381 }, 2382 #endif /* chips */ 2383 2384 #if defined(BCM_56260_A0) 2385 { /* SOC_FORMAT_INT_THDIEXT_THDI_PORT_PG_BST_BCM56260_A0fmt */ 2386 /* format THDIEXT_THDI_PORT_PG_BSTfmt */ 2387 /* nFields */ 7, 2388 /* *fields */ soc_THDIEXT_THDI_PORT_PG_BST_BCM56260_A0fmt_fields, 2389 /* bits */ 37, 2390 /* flags */ 0, 2391 }, 2392 #endif /* chips */ 2393 2394 #if defined(BCM_56260_B0) 2395 { /* SOC_FORMAT_INT_THDIEXT_THDI_PORT_PG_BST_BCM56260_B0fmt */ 2396 /* format THDIEXT_THDI_PORT_PG_BSTfmt */ 2397 /* nFields */ 7, 2398 /* *fields */ soc_THDIEXT_THDI_PORT_PG_BST_BCM56260_A0fmt_fields, 2399 /* bits */ 37, 2400 /* flags */ 0, 2401 }, 2402 #endif /* chips */ 2403 2404 #if defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 2405 defined(BCM_56450_B1) 2406 { /* SOC_FORMAT_INT_THDIEXT_THDI_PORT_SP_BSTfmt */ 2407 /* format THDIEXT_THDI_PORT_SP_BSTfmt */ 2408 /* nFields */ 4, 2409 /* *fields */ soc_THDIEXT_THDI_PORT_SP_BSTfmt_fields, 2410 /* bits */ 19, 2411 /* flags */ 0, 2412 }, 2413 #endif /* chips */ 2414 2415 #if defined(BCM_56260_A0) 2416 { /* SOC_FORMAT_INT_THDIEXT_THDI_PORT_SP_BST_BCM56260_A0fmt */ 2417 /* format THDIEXT_THDI_PORT_SP_BSTfmt */ 2418 /* nFields */ 4, 2419 /* *fields */ soc_THDIEXT_THDI_PORT_SP_BST_BCM56260_A0fmt_fields, 2420 /* bits */ 19, 2421 /* flags */ 0, 2422 }, 2423 #endif /* chips */ 2424 2425 #if defined(BCM_56260_B0) 2426 { /* SOC_FORMAT_INT_THDIEXT_THDI_PORT_SP_BST_BCM56260_B0fmt */ 2427 /* format THDIEXT_THDI_PORT_SP_BSTfmt */ 2428 /* nFields */ 4, 2429 /* *fields */ soc_THDIEXT_THDI_PORT_SP_BST_BCM56260_A0fmt_fields, 2430 /* bits */ 19, 2431 /* flags */ 0, 2432 }, 2433 #endif /* chips */ 2434 2435 #if defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 2436 defined(BCM_56450_B1) 2437 { /* SOC_FORMAT_INT_THDIQEN_THDI_PORT_PG_BSTfmt */ 2438 /* format THDIQEN_THDI_PORT_PG_BSTfmt */ 2439 /* nFields */ 7, 2440 /* *fields */ soc_THDIQEN_THDI_PORT_PG_BSTfmt_fields, 2441 /* bits */ 37, 2442 /* flags */ 0, 2443 }, 2444 #endif /* chips */ 2445 2446 #if defined(BCM_56260_A0) 2447 { /* SOC_FORMAT_INT_THDIQEN_THDI_PORT_PG_BST_BCM56260_A0fmt */ 2448 /* format THDIQEN_THDI_PORT_PG_BSTfmt */ 2449 /* nFields */ 7, 2450 /* *fields */ soc_THDIQEN_THDI_PORT_PG_BST_BCM56260_A0fmt_fields, 2451 /* bits */ 37, 2452 /* flags */ 0, 2453 }, 2454 #endif /* chips */ 2455 2456 #if defined(BCM_56260_B0) 2457 { /* SOC_FORMAT_INT_THDIQEN_THDI_PORT_PG_BST_BCM56260_B0fmt */ 2458 /* format THDIQEN_THDI_PORT_PG_BSTfmt */ 2459 /* nFields */ 7, 2460 /* *fields */ soc_THDIQEN_THDI_PORT_PG_BST_BCM56260_A0fmt_fields, 2461 /* bits */ 37, 2462 /* flags */ 0, 2463 }, 2464 #endif /* chips */ 2465 2466 #if defined(BCM_56270_A0) 2467 { /* SOC_FORMAT_INT_THDIQEN_THDI_PORT_PG_BST_BCM56270_A0fmt */ 2468 /* format THDIQEN_THDI_PORT_PG_BSTfmt */ 2469 /* nFields */ 7, 2470 /* *fields */ soc_THDIQEN_THDI_PORT_PG_BST_BCM56260_A0fmt_fields, 2471 /* bits */ 37, 2472 /* flags */ 0, 2473 }, 2474 #endif /* chips */ 2475 2476 #if defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 2477 defined(BCM_56450_B1) 2478 { /* SOC_FORMAT_INT_THDIQEN_THDI_PORT_SP_BSTfmt */ 2479 /* format THDIQEN_THDI_PORT_SP_BSTfmt */ 2480 /* nFields */ 4, 2481 /* *fields */ soc_THDIQEN_THDI_PORT_SP_BSTfmt_fields, 2482 /* bits */ 19, 2483 /* flags */ 0, 2484 }, 2485 #endif /* chips */ 2486 2487 #if defined(BCM_56260_A0) 2488 { /* SOC_FORMAT_INT_THDIQEN_THDI_PORT_SP_BST_BCM56260_A0fmt */ 2489 /* format THDIQEN_THDI_PORT_SP_BSTfmt */ 2490 /* nFields */ 4, 2491 /* *fields */ soc_THDIQEN_THDI_PORT_SP_BST_BCM56260_A0fmt_fields, 2492 /* bits */ 19, 2493 /* flags */ 0, 2494 }, 2495 #endif /* chips */ 2496 2497 #if defined(BCM_56260_B0) 2498 { /* SOC_FORMAT_INT_THDIQEN_THDI_PORT_SP_BST_BCM56260_B0fmt */ 2499 /* format THDIQEN_THDI_PORT_SP_BSTfmt */ 2500 /* nFields */ 4, 2501 /* *fields */ soc_THDIQEN_THDI_PORT_SP_BST_BCM56260_A0fmt_fields, 2502 /* bits */ 19, 2503 /* flags */ 0, 2504 }, 2505 #endif /* chips */ 2506 2507 #if defined(BCM_56270_A0) 2508 { /* SOC_FORMAT_INT_THDIQEN_THDI_PORT_SP_BST_BCM56270_A0fmt */ 2509 /* format THDIQEN_THDI_PORT_SP_BSTfmt */ 2510 /* nFields */ 4, 2511 /* *fields */ soc_THDIQEN_THDI_PORT_SP_BST_BCM56260_A0fmt_fields, 2512 /* bits */ 19, 2513 /* flags */ 0, 2514 }, 2515 #endif /* chips */ 2516 2517 #if defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 2518 defined(BCM_56450_B1) 2519 { /* SOC_FORMAT_INT_THDIRQE_THDI_PORT_PG_BSTfmt */ 2520 /* format THDIRQE_THDI_PORT_PG_BSTfmt */ 2521 /* nFields */ 7, 2522 /* *fields */ soc_THDIRQE_THDI_PORT_PG_BSTfmt_fields, 2523 /* bits */ 37, 2524 /* flags */ 0, 2525 }, 2526 #endif /* chips */ 2527 2528 #if defined(BCM_56260_A0) 2529 { /* SOC_FORMAT_INT_THDIRQE_THDI_PORT_PG_BST_BCM56260_A0fmt */ 2530 /* format THDIRQE_THDI_PORT_PG_BSTfmt */ 2531 /* nFields */ 7, 2532 /* *fields */ soc_THDIRQE_THDI_PORT_PG_BST_BCM56260_A0fmt_fields, 2533 /* bits */ 37, 2534 /* flags */ 0, 2535 }, 2536 #endif /* chips */ 2537 2538 #if defined(BCM_56260_B0) 2539 { /* SOC_FORMAT_INT_THDIRQE_THDI_PORT_PG_BST_BCM56260_B0fmt */ 2540 /* format THDIRQE_THDI_PORT_PG_BSTfmt */ 2541 /* nFields */ 7, 2542 /* *fields */ soc_THDIRQE_THDI_PORT_PG_BST_BCM56260_A0fmt_fields, 2543 /* bits */ 37, 2544 /* flags */ 0, 2545 }, 2546 #endif /* chips */ 2547 2548 #if defined(BCM_56270_A0) 2549 { /* SOC_FORMAT_INT_THDIRQE_THDI_PORT_PG_BST_BCM56270_A0fmt */ 2550 /* format THDIRQE_THDI_PORT_PG_BSTfmt */ 2551 /* nFields */ 7, 2552 /* *fields */ soc_THDIRQE_THDI_PORT_PG_BST_BCM56260_A0fmt_fields, 2553 /* bits */ 37, 2554 /* flags */ 0, 2555 }, 2556 #endif /* chips */ 2557 2558 #if defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 2559 defined(BCM_56450_B1) 2560 { /* SOC_FORMAT_INT_THDIRQE_THDI_PORT_SP_BSTfmt */ 2561 /* format THDIRQE_THDI_PORT_SP_BSTfmt */ 2562 /* nFields */ 4, 2563 /* *fields */ soc_THDIRQE_THDI_PORT_SP_BSTfmt_fields, 2564 /* bits */ 19, 2565 /* flags */ 0, 2566 }, 2567 #endif /* chips */ 2568 2569 #if defined(BCM_56260_A0) 2570 { /* SOC_FORMAT_INT_THDIRQE_THDI_PORT_SP_BST_BCM56260_A0fmt */ 2571 /* format THDIRQE_THDI_PORT_SP_BSTfmt */ 2572 /* nFields */ 4, 2573 /* *fields */ soc_THDIRQE_THDI_PORT_SP_BST_BCM56260_A0fmt_fields, 2574 /* bits */ 19, 2575 /* flags */ 0, 2576 }, 2577 #endif /* chips */ 2578 2579 #if defined(BCM_56260_B0) 2580 { /* SOC_FORMAT_INT_THDIRQE_THDI_PORT_SP_BST_BCM56260_B0fmt */ 2581 /* format THDIRQE_THDI_PORT_SP_BSTfmt */ 2582 /* nFields */ 4, 2583 /* *fields */ soc_THDIRQE_THDI_PORT_SP_BST_BCM56260_A0fmt_fields, 2584 /* bits */ 19, 2585 /* flags */ 0, 2586 }, 2587 #endif /* chips */ 2588 2589 #if defined(BCM_56270_A0) 2590 { /* SOC_FORMAT_INT_THDIRQE_THDI_PORT_SP_BST_BCM56270_A0fmt */ 2591 /* format THDIRQE_THDI_PORT_SP_BSTfmt */ 2592 /* nFields */ 4, 2593 /* *fields */ soc_THDIRQE_THDI_PORT_SP_BST_BCM56260_A0fmt_fields, 2594 /* bits */ 19, 2595 /* flags */ 0, 2596 }, 2597 #endif /* chips */ 2598 2599 #if defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 2600 defined(BCM_56450_B1) 2601 { /* SOC_FORMAT_INT_THDI_PORT_PG_BSTfmt */ 2602 /* format THDI_PORT_PG_BSTfmt */ 2603 /* nFields */ 7, 2604 /* *fields */ soc_THDI_PORT_PG_BSTfmt_fields, 2605 /* bits */ 37, 2606 /* flags */ 0, 2607 }, 2608 #endif /* chips */ 2609 2610 #if defined(BCM_56260_A0) 2611 { /* SOC_FORMAT_INT_THDI_PORT_PG_BST_BCM56260_A0fmt */ 2612 /* format THDI_PORT_PG_BSTfmt */ 2613 /* nFields */ 7, 2614 /* *fields */ soc_THDI_PORT_PG_BST_BCM56260_A0fmt_fields, 2615 /* bits */ 37, 2616 /* flags */ 0, 2617 }, 2618 #endif /* chips */ 2619 2620 #if defined(BCM_56260_B0) 2621 { /* SOC_FORMAT_INT_THDI_PORT_PG_BST_BCM56260_B0fmt */ 2622 /* format THDI_PORT_PG_BSTfmt */ 2623 /* nFields */ 7, 2624 /* *fields */ soc_THDI_PORT_PG_BST_BCM56260_A0fmt_fields, 2625 /* bits */ 37, 2626 /* flags */ 0, 2627 }, 2628 #endif /* chips */ 2629 2630 #if defined(BCM_56270_A0) 2631 { /* SOC_FORMAT_INT_THDI_PORT_PG_BST_BCM56270_A0fmt */ 2632 /* format THDI_PORT_PG_BSTfmt */ 2633 /* nFields */ 7, 2634 /* *fields */ soc_THDI_PORT_PG_BST_BCM56260_A0fmt_fields, 2635 /* bits */ 37, 2636 /* flags */ 0, 2637 }, 2638 #endif /* chips */ 2639 2640 #if defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 2641 defined(BCM_56450_B1) 2642 { /* SOC_FORMAT_INT_THDI_PORT_SP_BSTfmt */ 2643 /* format THDI_PORT_SP_BSTfmt */ 2644 /* nFields */ 4, 2645 /* *fields */ soc_THDI_PORT_SP_BSTfmt_fields, 2646 /* bits */ 19, 2647 /* flags */ 0, 2648 }, 2649 #endif /* chips */ 2650 2651 #if defined(BCM_56260_A0) 2652 { /* SOC_FORMAT_INT_THDI_PORT_SP_BST_BCM56260_A0fmt */ 2653 /* format THDI_PORT_SP_BSTfmt */ 2654 /* nFields */ 4, 2655 /* *fields */ soc_THDI_PORT_SP_BST_BCM56260_A0fmt_fields, 2656 /* bits */ 19, 2657 /* flags */ 0, 2658 }, 2659 #endif /* chips */ 2660 2661 #if defined(BCM_56260_B0) 2662 { /* SOC_FORMAT_INT_THDI_PORT_SP_BST_BCM56260_B0fmt */ 2663 /* format THDI_PORT_SP_BSTfmt */ 2664 /* nFields */ 4, 2665 /* *fields */ soc_THDI_PORT_SP_BST_BCM56260_A0fmt_fields, 2666 /* bits */ 19, 2667 /* flags */ 0, 2668 }, 2669 #endif /* chips */ 2670 2671 #if defined(BCM_56270_A0) 2672 { /* SOC_FORMAT_INT_THDI_PORT_SP_BST_BCM56270_A0fmt */ 2673 /* format THDI_PORT_SP_BSTfmt */ 2674 /* nFields */ 4, 2675 /* *fields */ soc_THDI_PORT_SP_BST_BCM56260_A0fmt_fields, 2676 /* bits */ 19, 2677 /* flags */ 0, 2678 }, 2679 #endif /* chips */ 2680 2681 #if defined(BCM_56440_A0) || defined(BCM_56440_B0) 2682 { /* SOC_FORMAT_INT_THDI_TO_CFG_INFOfmt */ 2683 /* format THDI_TO_CFG_INFOfmt */ 2684 /* nFields */ 5, 2685 /* *fields */ soc_THDI_TO_CFG_INFOfmt_fields, 2686 /* bits */ 15, 2687 /* flags */ 0, 2688 }, 2689 #endif /* chips */ 2690 2691 #if defined(BCM_56260_A0) 2692 { /* SOC_FORMAT_INT_THDI_TO_CFG_INFO_BCM56260_A0fmt */ 2693 /* format THDI_TO_CFG_INFOfmt */ 2694 /* nFields */ 5, 2695 /* *fields */ soc_THDI_TO_CFG_INFO_BCM56260_A0fmt_fields, 2696 /* bits */ 15, 2697 /* flags */ 0, 2698 }, 2699 #endif /* chips */ 2700 2701 #if defined(BCM_56260_B0) 2702 { /* SOC_FORMAT_INT_THDI_TO_CFG_INFO_BCM56260_B0fmt */ 2703 /* format THDI_TO_CFG_INFOfmt */ 2704 /* nFields */ 5, 2705 /* *fields */ soc_THDI_TO_CFG_INFO_BCM56260_A0fmt_fields, 2706 /* bits */ 15, 2707 /* flags */ 0, 2708 }, 2709 #endif /* chips */ 2710 2711 #if defined(BCM_56270_A0) 2712 { /* SOC_FORMAT_INT_THDI_TO_CFG_INFO_BCM56270_A0fmt */ 2713 /* format THDI_TO_CFG_INFOfmt */ 2714 /* nFields */ 5, 2715 /* *fields */ soc_THDI_TO_CFG_INFO_BCM56260_A0fmt_fields, 2716 /* bits */ 15, 2717 /* flags */ 0, 2718 }, 2719 #endif /* chips */ 2720 2721 #if defined(BCM_56450_A0) 2722 { /* SOC_FORMAT_INT_THDI_TO_CFG_INFO_BCM56450_A0fmt */ 2723 /* format THDI_TO_CFG_INFOfmt */ 2724 /* nFields */ 5, 2725 /* *fields */ soc_THDI_TO_CFG_INFO_BCM56450_A0fmt_fields, 2726 /* bits */ 15, 2727 /* flags */ 0, 2728 }, 2729 #endif /* chips */ 2730 2731 #if defined(BCM_56450_B0) 2732 { /* SOC_FORMAT_INT_THDI_TO_CFG_INFO_BCM56450_B0fmt */ 2733 /* format THDI_TO_CFG_INFOfmt */ 2734 /* nFields */ 5, 2735 /* *fields */ soc_THDI_TO_CFG_INFO_BCM56450_A0fmt_fields, 2736 /* bits */ 15, 2737 /* flags */ 0, 2738 }, 2739 #endif /* chips */ 2740 2741 #if defined(BCM_56450_B1) 2742 { /* SOC_FORMAT_INT_THDI_TO_CFG_INFO_BCM56450_B1fmt */ 2743 /* format THDI_TO_CFG_INFOfmt */ 2744 /* nFields */ 5, 2745 /* *fields */ soc_THDI_TO_CFG_INFO_BCM56450_A0fmt_fields, 2746 /* bits */ 15, 2747 /* flags */ 0, 2748 }, 2749 #endif /* chips */ 2750 2751 #if defined(BCM_56440_A0) || defined(BCM_56440_B0) || \ 2752 defined(BCM_56840_A0) || defined(BCM_56840_B0) 2753 { /* SOC_FORMAT_INT_THDI_TO_OOBFC_INFOfmt */ 2754 /* format THDI_TO_OOBFC_INFOfmt */ 2755 /* nFields */ 2, 2756 /* *fields */ soc_THDI_TO_OOBFC_INFOfmt_fields, 2757 /* bits */ 16, 2758 /* flags */ 0, 2759 }, 2760 #endif /* chips */ 2761 2762 #if defined(BCM_56260_A0) 2763 { /* SOC_FORMAT_INT_THDI_TO_OOBFC_INFO_BCM56260_A0fmt */ 2764 /* format THDI_TO_OOBFC_INFOfmt */ 2765 /* nFields */ 2, 2766 /* *fields */ soc_THDI_TO_OOBFC_INFO_BCM56960_A0fmt_fields, 2767 /* bits */ 16, 2768 /* flags */ 0, 2769 }, 2770 #endif /* chips */ 2771 2772 #if defined(BCM_56260_B0) 2773 { /* SOC_FORMAT_INT_THDI_TO_OOBFC_INFO_BCM56260_B0fmt */ 2774 /* format THDI_TO_OOBFC_INFOfmt */ 2775 /* nFields */ 2, 2776 /* *fields */ soc_THDI_TO_OOBFC_INFO_BCM56960_A0fmt_fields, 2777 /* bits */ 16, 2778 /* flags */ 0, 2779 }, 2780 #endif /* chips */ 2781 2782 #if defined(BCM_56270_A0) 2783 { /* SOC_FORMAT_INT_THDI_TO_OOBFC_INFO_BCM56270_A0fmt */ 2784 /* format THDI_TO_OOBFC_INFOfmt */ 2785 /* nFields */ 2, 2786 /* *fields */ soc_THDI_TO_OOBFC_INFO_BCM56960_A0fmt_fields, 2787 /* bits */ 16, 2788 /* flags */ 0, 2789 }, 2790 #endif /* chips */ 2791 2792 #if defined(BCM_56340_A0) 2793 { /* SOC_FORMAT_INT_THDI_TO_OOBFC_INFO_BCM56340_A0fmt */ 2794 /* format THDI_TO_OOBFC_INFOfmt */ 2795 /* nFields */ 2, 2796 /* *fields */ soc_THDI_TO_OOBFC_INFO_BCM56640_A0fmt_fields, 2797 /* bits */ 16, 2798 /* flags */ 0, 2799 }, 2800 #endif /* chips */ 2801 2802 #if defined(BCM_56370_A0) 2803 { /* SOC_FORMAT_INT_THDI_TO_OOBFC_INFO_BCM56370_A0fmt */ 2804 /* format THDI_TO_OOBFC_INFOfmt */ 2805 /* nFields */ 2, 2806 /* *fields */ soc_THDI_TO_OOBFC_INFO_BCM56960_A0fmt_fields, 2807 /* bits */ 16, 2808 /* flags */ 0, 2809 }, 2810 #endif /* chips */ 2811 2812 #if defined(BCM_56450_A0) 2813 { /* SOC_FORMAT_INT_THDI_TO_OOBFC_INFO_BCM56450_A0fmt */ 2814 /* format THDI_TO_OOBFC_INFOfmt */ 2815 /* nFields */ 2, 2816 /* *fields */ soc_THDI_TO_OOBFC_INFO_BCM56640_A0fmt_fields, 2817 /* bits */ 16, 2818 /* flags */ 0, 2819 }, 2820 #endif /* chips */ 2821 2822 #if defined(BCM_56450_B0) 2823 { /* SOC_FORMAT_INT_THDI_TO_OOBFC_INFO_BCM56450_B0fmt */ 2824 /* format THDI_TO_OOBFC_INFOfmt */ 2825 /* nFields */ 2, 2826 /* *fields */ soc_THDI_TO_OOBFC_INFO_BCM56640_A0fmt_fields, 2827 /* bits */ 16, 2828 /* flags */ 0, 2829 }, 2830 #endif /* chips */ 2831 2832 #if defined(BCM_56450_B1) 2833 { /* SOC_FORMAT_INT_THDI_TO_OOBFC_INFO_BCM56450_B1fmt */ 2834 /* format THDI_TO_OOBFC_INFOfmt */ 2835 /* nFields */ 2, 2836 /* *fields */ soc_THDI_TO_OOBFC_INFO_BCM56640_A0fmt_fields, 2837 /* bits */ 16, 2838 /* flags */ 0, 2839 }, 2840 #endif /* chips */ 2841 2842 #if defined(BCM_56560_A0) 2843 { /* SOC_FORMAT_INT_THDI_TO_OOBFC_INFO_BCM56560_A0fmt */ 2844 /* format THDI_TO_OOBFC_INFOfmt */ 2845 /* nFields */ 2, 2846 /* *fields */ soc_THDI_TO_OOBFC_INFO_BCM56960_A0fmt_fields, 2847 /* bits */ 16, 2848 /* flags */ 0, 2849 }, 2850 #endif /* chips */ 2851 2852 #if defined(BCM_56560_B0) 2853 { /* SOC_FORMAT_INT_THDI_TO_OOBFC_INFO_BCM56560_B0fmt */ 2854 /* format THDI_TO_OOBFC_INFOfmt */ 2855 /* nFields */ 2, 2856 /* *fields */ soc_THDI_TO_OOBFC_INFO_BCM56960_A0fmt_fields, 2857 /* bits */ 16, 2858 /* flags */ 0, 2859 }, 2860 #endif /* chips */ 2861 2862 #if defined(BCM_56640_A0) 2863 { /* SOC_FORMAT_INT_THDI_TO_OOBFC_INFO_BCM56640_A0fmt */ 2864 /* format THDI_TO_OOBFC_INFOfmt */ 2865 /* nFields */ 2, 2866 /* *fields */ soc_THDI_TO_OOBFC_INFO_BCM56640_A0fmt_fields, 2867 /* bits */ 16, 2868 /* flags */ 0, 2869 }, 2870 #endif /* chips */ 2871 2872 #if defined(BCM_56670_A0) 2873 { /* SOC_FORMAT_INT_THDI_TO_OOBFC_INFO_BCM56670_A0fmt */ 2874 /* format THDI_TO_OOBFC_INFOfmt */ 2875 /* nFields */ 2, 2876 /* *fields */ soc_THDI_TO_OOBFC_INFO_BCM56960_A0fmt_fields, 2877 /* bits */ 16, 2878 /* flags */ 0, 2879 }, 2880 #endif /* chips */ 2881 2882 #if defined(BCM_56670_B0) 2883 { /* SOC_FORMAT_INT_THDI_TO_OOBFC_INFO_BCM56670_B0fmt */ 2884 /* format THDI_TO_OOBFC_INFOfmt */ 2885 /* nFields */ 2, 2886 /* *fields */ soc_THDI_TO_OOBFC_INFO_BCM56960_A0fmt_fields, 2887 /* bits */ 16, 2888 /* flags */ 0, 2889 }, 2890 #endif /* chips */ 2891 2892 #if defined(BCM_56770_A0) 2893 { /* SOC_FORMAT_INT_THDI_TO_OOBFC_INFO_BCM56770_A0fmt */ 2894 /* format THDI_TO_OOBFC_INFOfmt */ 2895 /* nFields */ 2, 2896 /* *fields */ soc_THDI_TO_OOBFC_INFO_BCM56960_A0fmt_fields, 2897 /* bits */ 16, 2898 /* flags */ 0, 2899 }, 2900 #endif /* chips */ 2901 2902 #if defined(BCM_56850_A0) 2903 { /* SOC_FORMAT_INT_THDI_TO_OOBFC_INFO_BCM56850_A0fmt */ 2904 /* format THDI_TO_OOBFC_INFOfmt */ 2905 /* nFields */ 2, 2906 /* *fields */ soc_THDI_TO_OOBFC_INFO_BCM56640_A0fmt_fields, 2907 /* bits */ 16, 2908 /* flags */ 0, 2909 }, 2910 #endif /* chips */ 2911 2912 #if defined(BCM_56860_A0) 2913 { /* SOC_FORMAT_INT_THDI_TO_OOBFC_INFO_BCM56860_A0fmt */ 2914 /* format THDI_TO_OOBFC_INFOfmt */ 2915 /* nFields */ 2, 2916 /* *fields */ soc_THDI_TO_OOBFC_INFO_BCM56640_A0fmt_fields, 2917 /* bits */ 16, 2918 /* flags */ 0, 2919 }, 2920 #endif /* chips */ 2921 2922 #if defined(BCM_56870_A0) 2923 { /* SOC_FORMAT_INT_THDI_TO_OOBFC_INFO_BCM56870_A0fmt */ 2924 /* format THDI_TO_OOBFC_INFOfmt */ 2925 /* nFields */ 2, 2926 /* *fields */ soc_THDI_TO_OOBFC_INFO_BCM56960_A0fmt_fields, 2927 /* bits */ 16, 2928 /* flags */ 0, 2929 }, 2930 #endif /* chips */ 2931 2932 #if defined(BCM_56960_A0) 2933 { /* SOC_FORMAT_INT_THDI_TO_OOBFC_INFO_BCM56960_A0fmt */ 2934 /* format THDI_TO_OOBFC_INFOfmt */ 2935 /* nFields */ 2, 2936 /* *fields */ soc_THDI_TO_OOBFC_INFO_BCM56960_A0fmt_fields, 2937 /* bits */ 16, 2938 /* flags */ 0, 2939 }, 2940 #endif /* chips */ 2941 2942 #if defined(BCM_56965_A0) 2943 { /* SOC_FORMAT_INT_THDI_TO_OOBFC_INFO_BCM56965_A0fmt */ 2944 /* format THDI_TO_OOBFC_INFOfmt */ 2945 /* nFields */ 2, 2946 /* *fields */ soc_THDI_TO_OOBFC_INFO_BCM56960_A0fmt_fields, 2947 /* bits */ 16, 2948 /* flags */ 0, 2949 }, 2950 #endif /* chips */ 2951 2952 #if defined(BCM_56970_A0) 2953 { /* SOC_FORMAT_INT_THDI_TO_OOBFC_INFO_BCM56970_A0fmt */ 2954 /* format THDI_TO_OOBFC_INFOfmt */ 2955 /* nFields */ 2, 2956 /* *fields */ soc_THDI_TO_OOBFC_INFO_BCM56960_A0fmt_fields, 2957 /* bits */ 16, 2958 /* flags */ 0, 2959 }, 2960 #endif /* chips */ 2961 2962 #if defined(BCM_56524_A0) || defined(BCM_56634_A0) || \ 2963 defined(BCM_56634_B0) 2964 { /* SOC_FORMAT_INT_THDI_TO_REDIRECT_INFOfmt */ 2965 /* format THDI_TO_REDIRECT_INFOfmt */ 2966 /* nFields */ 1, 2967 /* *fields */ soc_THDI_TO_REDIRECT_INFOfmt_fields, 2968 /* bits */ 2, 2969 /* flags */ 0, 2970 }, 2971 #endif /* chips */ 2972 2973 #if defined(BCM_56524_B0) 2974 { /* SOC_FORMAT_INT_THDI_TO_REDIRECT_INFO_BCM56524_B0fmt */ 2975 /* format THDI_TO_REDIRECT_INFOfmt */ 2976 /* nFields */ 1, 2977 /* *fields */ soc_THDI_TO_REDIRECT_INFOfmt_fields, 2978 /* bits */ 2, 2979 /* flags */ 0, 2980 }, 2981 #endif /* chips */ 2982 2983 #if defined(BCM_56685_A0) 2984 { /* SOC_FORMAT_INT_THDI_TO_REDIRECT_INFO_BCM56685_A0fmt */ 2985 /* format THDI_TO_REDIRECT_INFOfmt */ 2986 /* nFields */ 1, 2987 /* *fields */ soc_THDI_TO_REDIRECT_INFOfmt_fields, 2988 /* bits */ 2, 2989 /* flags */ 0, 2990 }, 2991 #endif /* chips */ 2992 2993 #if defined(BCM_56685_B0) 2994 { /* SOC_FORMAT_INT_THDI_TO_REDIRECT_INFO_BCM56685_B0fmt */ 2995 /* format THDI_TO_REDIRECT_INFOfmt */ 2996 /* nFields */ 1, 2997 /* *fields */ soc_THDI_TO_REDIRECT_INFOfmt_fields, 2998 /* bits */ 2, 2999 /* flags */ 0, 3000 }, 3001 #endif /* chips */ 3002 3003 #if defined(BCM_56524_A0) || defined(BCM_56634_A0) || \ 3004 defined(BCM_56634_B0) 3005 { /* SOC_FORMAT_INT_THDI_TO_WAMUfmt */ 3006 /* format THDI_TO_WAMUfmt */ 3007 /* nFields */ 1, 3008 /* *fields */ soc_THDI_TO_WAMUfmt_fields, 3009 /* bits */ 16, 3010 /* flags */ 0, 3011 }, 3012 #endif /* chips */ 3013 3014 #if defined(BCM_56524_B0) 3015 { /* SOC_FORMAT_INT_THDI_TO_WAMU_BCM56524_B0fmt */ 3016 /* format THDI_TO_WAMUfmt */ 3017 /* nFields */ 1, 3018 /* *fields */ soc_THDI_TO_WAMUfmt_fields, 3019 /* bits */ 16, 3020 /* flags */ 0, 3021 }, 3022 #endif /* chips */ 3023 3024 #if defined(BCM_56685_A0) 3025 { /* SOC_FORMAT_INT_THDI_TO_WAMU_BCM56685_A0fmt */ 3026 /* format THDI_TO_WAMUfmt */ 3027 /* nFields */ 1, 3028 /* *fields */ soc_THDI_TO_WAMUfmt_fields, 3029 /* bits */ 16, 3030 /* flags */ 0, 3031 }, 3032 #endif /* chips */ 3033 3034 #if defined(BCM_56685_B0) 3035 { /* SOC_FORMAT_INT_THDI_TO_WAMU_BCM56685_B0fmt */ 3036 /* format THDI_TO_WAMUfmt */ 3037 /* nFields */ 1, 3038 /* *fields */ soc_THDI_TO_WAMUfmt_fields, 3039 /* bits */ 16, 3040 /* flags */ 0, 3041 }, 3042 #endif /* chips */ 3043 3044 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 3045 { /* SOC_FORMAT_INT_THDM_STAGE_SIGfmt */ 3046 /* format THDM_STAGE_SIGfmt */ 3047 /* nFields */ 14, 3048 /* *fields */ soc_THDM_STAGE_SIGfmt_fields, 3049 /* bits */ 61, 3050 /* flags */ 0, 3051 }, 3052 #endif /* chips */ 3053 3054 #if defined(BCM_56370_A0) 3055 { /* SOC_FORMAT_INT_THDM_STAGE_SIG_BCM56370_A0fmt */ 3056 /* format THDM_STAGE_SIGfmt */ 3057 /* nFields */ 15, 3058 /* *fields */ soc_THDM_STAGE_SIG_BCM56370_A0fmt_fields, 3059 /* bits */ 62, 3060 /* flags */ 0, 3061 }, 3062 #endif /* chips */ 3063 3064 #if defined(BCM_56560_A0) 3065 { /* SOC_FORMAT_INT_THDM_STAGE_SIG_BCM56560_A0fmt */ 3066 /* format THDM_STAGE_SIGfmt */ 3067 /* nFields */ 14, 3068 /* *fields */ soc_THDM_STAGE_SIG_BCM56560_A0fmt_fields, 3069 /* bits */ 65, 3070 /* flags */ 0, 3071 }, 3072 #endif /* chips */ 3073 3074 #if defined(BCM_56560_B0) 3075 { /* SOC_FORMAT_INT_THDM_STAGE_SIG_BCM56560_B0fmt */ 3076 /* format THDM_STAGE_SIGfmt */ 3077 /* nFields */ 14, 3078 /* *fields */ soc_THDM_STAGE_SIG_BCM56560_A0fmt_fields, 3079 /* bits */ 65, 3080 /* flags */ 0, 3081 }, 3082 #endif /* chips */ 3083 3084 #if defined(BCM_56670_A0) 3085 { /* SOC_FORMAT_INT_THDM_STAGE_SIG_BCM56670_A0fmt */ 3086 /* format THDM_STAGE_SIGfmt */ 3087 /* nFields */ 14, 3088 /* *fields */ soc_THDM_STAGE_SIG_BCM56670_A0fmt_fields, 3089 /* bits */ 59, 3090 /* flags */ 0, 3091 }, 3092 #endif /* chips */ 3093 3094 #if defined(BCM_56670_B0) 3095 { /* SOC_FORMAT_INT_THDM_STAGE_SIG_BCM56670_B0fmt */ 3096 /* format THDM_STAGE_SIGfmt */ 3097 /* nFields */ 14, 3098 /* *fields */ soc_THDM_STAGE_SIG_BCM56670_A0fmt_fields, 3099 /* bits */ 59, 3100 /* flags */ 0, 3101 }, 3102 #endif /* chips */ 3103 3104 #if defined(BCM_56770_A0) 3105 { /* SOC_FORMAT_INT_THDM_STAGE_SIG_BCM56770_A0fmt */ 3106 /* format THDM_STAGE_SIGfmt */ 3107 /* nFields */ 15, 3108 /* *fields */ soc_THDM_STAGE_SIG_BCM56870_A0fmt_fields, 3109 /* bits */ 64, 3110 /* flags */ 0, 3111 }, 3112 #endif /* chips */ 3113 3114 #if defined(BCM_56870_A0) 3115 { /* SOC_FORMAT_INT_THDM_STAGE_SIG_BCM56870_A0fmt */ 3116 /* format THDM_STAGE_SIGfmt */ 3117 /* nFields */ 15, 3118 /* *fields */ soc_THDM_STAGE_SIG_BCM56870_A0fmt_fields, 3119 /* bits */ 64, 3120 /* flags */ 0, 3121 }, 3122 #endif /* chips */ 3123 3124 #if defined(BCM_56960_A0) 3125 { /* SOC_FORMAT_INT_THDM_STAGE_SIG_BCM56960_A0fmt */ 3126 /* format THDM_STAGE_SIGfmt */ 3127 /* nFields */ 15, 3128 /* *fields */ soc_THDM_STAGE_SIG_BCM56960_A0fmt_fields, 3129 /* bits */ 58, 3130 /* flags */ 0, 3131 }, 3132 #endif /* chips */ 3133 3134 #if defined(BCM_56965_A0) 3135 { /* SOC_FORMAT_INT_THDM_STAGE_SIG_BCM56965_A0fmt */ 3136 /* format THDM_STAGE_SIGfmt */ 3137 /* nFields */ 15, 3138 /* *fields */ soc_THDM_STAGE_SIG_BCM56960_A0fmt_fields, 3139 /* bits */ 58, 3140 /* flags */ 0, 3141 }, 3142 #endif /* chips */ 3143 3144 #if defined(BCM_56970_A0) 3145 { /* SOC_FORMAT_INT_THDM_STAGE_SIG_BCM56970_A0fmt */ 3146 /* format THDM_STAGE_SIGfmt */ 3147 /* nFields */ 15, 3148 /* *fields */ soc_THDM_STAGE_SIG_BCM56970_A0fmt_fields, 3149 /* bits */ 59, 3150 /* flags */ 0, 3151 }, 3152 #endif /* chips */ 3153 3154 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 3155 { /* SOC_FORMAT_INT_THDM_THDU_PIPE_SIGfmt */ 3156 /* format THDM_THDU_PIPE_SIGfmt */ 3157 /* nFields */ 7, 3158 /* *fields */ soc_THDM_THDU_PIPE_SIGfmt_fields, 3159 /* bits */ 22, 3160 /* flags */ 0, 3161 }, 3162 #endif /* chips */ 3163 3164 #if defined(BCM_56560_A0) 3165 { /* SOC_FORMAT_INT_THDM_THDU_PIPE_SIG_BCM56560_A0fmt */ 3166 /* format THDM_THDU_PIPE_SIGfmt */ 3167 /* nFields */ 7, 3168 /* *fields */ soc_THDM_THDU_PIPE_SIG_BCM56960_A0fmt_fields, 3169 /* bits */ 22, 3170 /* flags */ 0, 3171 }, 3172 #endif /* chips */ 3173 3174 #if defined(BCM_56560_B0) 3175 { /* SOC_FORMAT_INT_THDM_THDU_PIPE_SIG_BCM56560_B0fmt */ 3176 /* format THDM_THDU_PIPE_SIGfmt */ 3177 /* nFields */ 7, 3178 /* *fields */ soc_THDM_THDU_PIPE_SIG_BCM56960_A0fmt_fields, 3179 /* bits */ 22, 3180 /* flags */ 0, 3181 }, 3182 #endif /* chips */ 3183 3184 #if defined(BCM_56670_A0) 3185 { /* SOC_FORMAT_INT_THDM_THDU_PIPE_SIG_BCM56670_A0fmt */ 3186 /* format THDM_THDU_PIPE_SIGfmt */ 3187 /* nFields */ 7, 3188 /* *fields */ soc_THDM_THDU_PIPE_SIG_BCM56960_A0fmt_fields, 3189 /* bits */ 22, 3190 /* flags */ 0, 3191 }, 3192 #endif /* chips */ 3193 3194 #if defined(BCM_56670_B0) 3195 { /* SOC_FORMAT_INT_THDM_THDU_PIPE_SIG_BCM56670_B0fmt */ 3196 /* format THDM_THDU_PIPE_SIGfmt */ 3197 /* nFields */ 7, 3198 /* *fields */ soc_THDM_THDU_PIPE_SIG_BCM56960_A0fmt_fields, 3199 /* bits */ 22, 3200 /* flags */ 0, 3201 }, 3202 #endif /* chips */ 3203 3204 #if defined(BCM_56960_A0) 3205 { /* SOC_FORMAT_INT_THDM_THDU_PIPE_SIG_BCM56960_A0fmt */ 3206 /* format THDM_THDU_PIPE_SIGfmt */ 3207 /* nFields */ 7, 3208 /* *fields */ soc_THDM_THDU_PIPE_SIG_BCM56960_A0fmt_fields, 3209 /* bits */ 22, 3210 /* flags */ 0, 3211 }, 3212 #endif /* chips */ 3213 3214 #if defined(BCM_56965_A0) 3215 { /* SOC_FORMAT_INT_THDM_THDU_PIPE_SIG_BCM56965_A0fmt */ 3216 /* format THDM_THDU_PIPE_SIGfmt */ 3217 /* nFields */ 7, 3218 /* *fields */ soc_THDM_THDU_PIPE_SIG_BCM56960_A0fmt_fields, 3219 /* bits */ 22, 3220 /* flags */ 0, 3221 }, 3222 #endif /* chips */ 3223 3224 #if defined(BCM_56970_A0) 3225 { /* SOC_FORMAT_INT_THDM_THDU_PIPE_SIG_BCM56970_A0fmt */ 3226 /* format THDM_THDU_PIPE_SIGfmt */ 3227 /* nFields */ 7, 3228 /* *fields */ soc_THDM_THDU_PIPE_SIG_BCM56960_A0fmt_fields, 3229 /* bits */ 22, 3230 /* flags */ 0, 3231 }, 3232 #endif /* chips */ 3233 3234 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 3235 { /* SOC_FORMAT_INT_THDM_THDU_SP_PIPE_SIGfmt */ 3236 /* format THDM_THDU_SP_PIPE_SIGfmt */ 3237 /* nFields */ 6, 3238 /* *fields */ soc_THDM_THDU_SP_PIPE_SIGfmt_fields, 3239 /* bits */ 22, 3240 /* flags */ 0, 3241 }, 3242 #endif /* chips */ 3243 3244 #if defined(BCM_56370_A0) 3245 { /* SOC_FORMAT_INT_THDM_THDU_SP_PIPE_SIG_BCM56370_A0fmt */ 3246 /* format THDM_THDU_SP_PIPE_SIGfmt */ 3247 /* nFields */ 6, 3248 /* *fields */ soc_THDM_THDU_SP_PIPE_SIG_BCM56870_A0fmt_fields, 3249 /* bits */ 24, 3250 /* flags */ 0, 3251 }, 3252 #endif /* chips */ 3253 3254 #if defined(BCM_56560_A0) 3255 { /* SOC_FORMAT_INT_THDM_THDU_SP_PIPE_SIG_BCM56560_A0fmt */ 3256 /* format THDM_THDU_SP_PIPE_SIGfmt */ 3257 /* nFields */ 6, 3258 /* *fields */ soc_THDM_THDU_SP_PIPE_SIG_BCM56960_A0fmt_fields, 3259 /* bits */ 22, 3260 /* flags */ 0, 3261 }, 3262 #endif /* chips */ 3263 3264 #if defined(BCM_56560_B0) 3265 { /* SOC_FORMAT_INT_THDM_THDU_SP_PIPE_SIG_BCM56560_B0fmt */ 3266 /* format THDM_THDU_SP_PIPE_SIGfmt */ 3267 /* nFields */ 6, 3268 /* *fields */ soc_THDM_THDU_SP_PIPE_SIG_BCM56960_A0fmt_fields, 3269 /* bits */ 22, 3270 /* flags */ 0, 3271 }, 3272 #endif /* chips */ 3273 3274 #if defined(BCM_56670_A0) 3275 { /* SOC_FORMAT_INT_THDM_THDU_SP_PIPE_SIG_BCM56670_A0fmt */ 3276 /* format THDM_THDU_SP_PIPE_SIGfmt */ 3277 /* nFields */ 6, 3278 /* *fields */ soc_THDM_THDU_SP_PIPE_SIG_BCM56960_A0fmt_fields, 3279 /* bits */ 22, 3280 /* flags */ 0, 3281 }, 3282 #endif /* chips */ 3283 3284 #if defined(BCM_56670_B0) 3285 { /* SOC_FORMAT_INT_THDM_THDU_SP_PIPE_SIG_BCM56670_B0fmt */ 3286 /* format THDM_THDU_SP_PIPE_SIGfmt */ 3287 /* nFields */ 6, 3288 /* *fields */ soc_THDM_THDU_SP_PIPE_SIG_BCM56960_A0fmt_fields, 3289 /* bits */ 22, 3290 /* flags */ 0, 3291 }, 3292 #endif /* chips */ 3293 3294 #if defined(BCM_56770_A0) 3295 { /* SOC_FORMAT_INT_THDM_THDU_SP_PIPE_SIG_BCM56770_A0fmt */ 3296 /* format THDM_THDU_SP_PIPE_SIGfmt */ 3297 /* nFields */ 6, 3298 /* *fields */ soc_THDM_THDU_SP_PIPE_SIG_BCM56870_A0fmt_fields, 3299 /* bits */ 24, 3300 /* flags */ 0, 3301 }, 3302 #endif /* chips */ 3303 3304 #if defined(BCM_56870_A0) 3305 { /* SOC_FORMAT_INT_THDM_THDU_SP_PIPE_SIG_BCM56870_A0fmt */ 3306 /* format THDM_THDU_SP_PIPE_SIGfmt */ 3307 /* nFields */ 6, 3308 /* *fields */ soc_THDM_THDU_SP_PIPE_SIG_BCM56870_A0fmt_fields, 3309 /* bits */ 24, 3310 /* flags */ 0, 3311 }, 3312 #endif /* chips */ 3313 3314 #if defined(BCM_56960_A0) 3315 { /* SOC_FORMAT_INT_THDM_THDU_SP_PIPE_SIG_BCM56960_A0fmt */ 3316 /* format THDM_THDU_SP_PIPE_SIGfmt */ 3317 /* nFields */ 6, 3318 /* *fields */ soc_THDM_THDU_SP_PIPE_SIG_BCM56960_A0fmt_fields, 3319 /* bits */ 22, 3320 /* flags */ 0, 3321 }, 3322 #endif /* chips */ 3323 3324 #if defined(BCM_56965_A0) 3325 { /* SOC_FORMAT_INT_THDM_THDU_SP_PIPE_SIG_BCM56965_A0fmt */ 3326 /* format THDM_THDU_SP_PIPE_SIGfmt */ 3327 /* nFields */ 6, 3328 /* *fields */ soc_THDM_THDU_SP_PIPE_SIG_BCM56960_A0fmt_fields, 3329 /* bits */ 22, 3330 /* flags */ 0, 3331 }, 3332 #endif /* chips */ 3333 3334 #if defined(BCM_56970_A0) 3335 { /* SOC_FORMAT_INT_THDM_THDU_SP_PIPE_SIG_BCM56970_A0fmt */ 3336 /* format THDM_THDU_SP_PIPE_SIGfmt */ 3337 /* nFields */ 6, 3338 /* *fields */ soc_THDM_THDU_SP_PIPE_SIG_BCM56960_A0fmt_fields, 3339 /* bits */ 22, 3340 /* flags */ 0, 3341 }, 3342 #endif /* chips */ 3343 3344 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 3345 { /* SOC_FORMAT_INT_THDM_TO_RQEfmt */ 3346 /* format THDM_TO_RQEfmt */ 3347 /* nFields */ 5, 3348 /* *fields */ soc_THDM_TO_RQEfmt_fields, 3349 /* bits */ 8, 3350 /* flags */ 0, 3351 }, 3352 #endif /* chips */ 3353 3354 #if defined(BCM_56370_A0) 3355 { /* SOC_FORMAT_INT_THDM_TO_RQE_BCM56370_A0fmt */ 3356 /* format THDM_TO_RQEfmt */ 3357 /* nFields */ 4, 3358 /* *fields */ soc_THDM_TO_RQE_BCM56970_A0fmt_fields, 3359 /* bits */ 7, 3360 /* flags */ 0, 3361 }, 3362 #endif /* chips */ 3363 3364 #if defined(BCM_56560_A0) 3365 { /* SOC_FORMAT_INT_THDM_TO_RQE_BCM56560_A0fmt */ 3366 /* format THDM_TO_RQEfmt */ 3367 /* nFields */ 5, 3368 /* *fields */ soc_THDM_TO_RQE_BCM56960_A0fmt_fields, 3369 /* bits */ 8, 3370 /* flags */ 0, 3371 }, 3372 #endif /* chips */ 3373 3374 #if defined(BCM_56560_B0) 3375 { /* SOC_FORMAT_INT_THDM_TO_RQE_BCM56560_B0fmt */ 3376 /* format THDM_TO_RQEfmt */ 3377 /* nFields */ 5, 3378 /* *fields */ soc_THDM_TO_RQE_BCM56960_A0fmt_fields, 3379 /* bits */ 8, 3380 /* flags */ 0, 3381 }, 3382 #endif /* chips */ 3383 3384 #if defined(BCM_56670_A0) 3385 { /* SOC_FORMAT_INT_THDM_TO_RQE_BCM56670_A0fmt */ 3386 /* format THDM_TO_RQEfmt */ 3387 /* nFields */ 5, 3388 /* *fields */ soc_THDM_TO_RQE_BCM56960_A0fmt_fields, 3389 /* bits */ 8, 3390 /* flags */ 0, 3391 }, 3392 #endif /* chips */ 3393 3394 #if defined(BCM_56670_B0) 3395 { /* SOC_FORMAT_INT_THDM_TO_RQE_BCM56670_B0fmt */ 3396 /* format THDM_TO_RQEfmt */ 3397 /* nFields */ 5, 3398 /* *fields */ soc_THDM_TO_RQE_BCM56960_A0fmt_fields, 3399 /* bits */ 8, 3400 /* flags */ 0, 3401 }, 3402 #endif /* chips */ 3403 3404 #if defined(BCM_56770_A0) 3405 { /* SOC_FORMAT_INT_THDM_TO_RQE_BCM56770_A0fmt */ 3406 /* format THDM_TO_RQEfmt */ 3407 /* nFields */ 4, 3408 /* *fields */ soc_THDM_TO_RQE_BCM56970_A0fmt_fields, 3409 /* bits */ 7, 3410 /* flags */ 0, 3411 }, 3412 #endif /* chips */ 3413 3414 #if defined(BCM_56870_A0) 3415 { /* SOC_FORMAT_INT_THDM_TO_RQE_BCM56870_A0fmt */ 3416 /* format THDM_TO_RQEfmt */ 3417 /* nFields */ 4, 3418 /* *fields */ soc_THDM_TO_RQE_BCM56970_A0fmt_fields, 3419 /* bits */ 7, 3420 /* flags */ 0, 3421 }, 3422 #endif /* chips */ 3423 3424 #if defined(BCM_56960_A0) 3425 { /* SOC_FORMAT_INT_THDM_TO_RQE_BCM56960_A0fmt */ 3426 /* format THDM_TO_RQEfmt */ 3427 /* nFields */ 5, 3428 /* *fields */ soc_THDM_TO_RQE_BCM56960_A0fmt_fields, 3429 /* bits */ 8, 3430 /* flags */ 0, 3431 }, 3432 #endif /* chips */ 3433 3434 #if defined(BCM_56965_A0) 3435 { /* SOC_FORMAT_INT_THDM_TO_RQE_BCM56965_A0fmt */ 3436 /* format THDM_TO_RQEfmt */ 3437 /* nFields */ 5, 3438 /* *fields */ soc_THDM_TO_RQE_BCM56960_A0fmt_fields, 3439 /* bits */ 8, 3440 /* flags */ 0, 3441 }, 3442 #endif /* chips */ 3443 3444 #if defined(BCM_56970_A0) 3445 { /* SOC_FORMAT_INT_THDM_TO_RQE_BCM56970_A0fmt */ 3446 /* format THDM_TO_RQEfmt */ 3447 /* nFields */ 4, 3448 /* *fields */ soc_THDM_TO_RQE_BCM56970_A0fmt_fields, 3449 /* bits */ 7, 3450 /* flags */ 0, 3451 }, 3452 #endif /* chips */ 3453 3454 #if defined(BCM_56840_A0) || defined(BCM_56840_B0) 3455 { /* SOC_FORMAT_INT_THDO_MIRROR_INFOfmt */ 3456 /* format THDO_MIRROR_INFOfmt */ 3457 /* nFields */ 13, 3458 /* *fields */ soc_THDO_MIRROR_INFOfmt_fields, 3459 /* bits */ 36, 3460 /* flags */ 0, 3461 }, 3462 #endif /* chips */ 3463 3464 #if defined(BCM_56340_A0) 3465 { /* SOC_FORMAT_INT_THDO_MIRROR_INFO_BCM56340_A0fmt */ 3466 /* format THDO_MIRROR_INFOfmt */ 3467 /* nFields */ 13, 3468 /* *fields */ soc_THDO_MIRROR_INFO_BCM56640_A0fmt_fields, 3469 /* bits */ 32, 3470 /* flags */ 0, 3471 }, 3472 #endif /* chips */ 3473 3474 #if defined(BCM_56640_A0) 3475 { /* SOC_FORMAT_INT_THDO_MIRROR_INFO_BCM56640_A0fmt */ 3476 /* format THDO_MIRROR_INFOfmt */ 3477 /* nFields */ 13, 3478 /* *fields */ soc_THDO_MIRROR_INFO_BCM56640_A0fmt_fields, 3479 /* bits */ 32, 3480 /* flags */ 0, 3481 }, 3482 #endif /* chips */ 3483 3484 #if defined(BCM_56440_A0) || defined(BCM_56440_B0) 3485 { /* SOC_FORMAT_INT_THDO_OPN_INFL_CNT_INFOfmt */ 3486 /* format THDO_OPN_INFL_CNT_INFOfmt */ 3487 /* nFields */ 21, 3488 /* *fields */ soc_THDO_OPN_INFL_CNT_INFOfmt_fields, 3489 /* bits */ 128, 3490 /* flags */ 0, 3491 }, 3492 #endif /* chips */ 3493 3494 #if defined(BCM_56260_A0) 3495 { /* SOC_FORMAT_INT_THDO_OPN_INFL_CNT_INFO_BCM56260_A0fmt */ 3496 /* format THDO_OPN_INFL_CNT_INFOfmt */ 3497 /* nFields */ 19, 3498 /* *fields */ soc_THDO_OPN_INFL_CNT_INFO_BCM56260_A0fmt_fields, 3499 /* bits */ 111, 3500 /* flags */ 0, 3501 }, 3502 #endif /* chips */ 3503 3504 #if defined(BCM_56260_B0) 3505 { /* SOC_FORMAT_INT_THDO_OPN_INFL_CNT_INFO_BCM56260_B0fmt */ 3506 /* format THDO_OPN_INFL_CNT_INFOfmt */ 3507 /* nFields */ 19, 3508 /* *fields */ soc_THDO_OPN_INFL_CNT_INFO_BCM56260_A0fmt_fields, 3509 /* bits */ 111, 3510 /* flags */ 0, 3511 }, 3512 #endif /* chips */ 3513 3514 #if defined(BCM_56270_A0) 3515 { /* SOC_FORMAT_INT_THDO_OPN_INFL_CNT_INFO_BCM56270_A0fmt */ 3516 /* format THDO_OPN_INFL_CNT_INFOfmt */ 3517 /* nFields */ 19, 3518 /* *fields */ soc_THDO_OPN_INFL_CNT_INFO_BCM56260_A0fmt_fields, 3519 /* bits */ 111, 3520 /* flags */ 0, 3521 }, 3522 #endif /* chips */ 3523 3524 #if defined(BCM_56450_A0) 3525 { /* SOC_FORMAT_INT_THDO_OPN_INFL_CNT_INFO_BCM56450_A0fmt */ 3526 /* format THDO_OPN_INFL_CNT_INFOfmt */ 3527 /* nFields */ 23, 3528 /* *fields */ soc_THDO_OPN_INFL_CNT_INFO_BCM56450_A0fmt_fields, 3529 /* bits */ 129, 3530 /* flags */ 0, 3531 }, 3532 #endif /* chips */ 3533 3534 #if defined(BCM_56450_B0) 3535 { /* SOC_FORMAT_INT_THDO_OPN_INFL_CNT_INFO_BCM56450_B0fmt */ 3536 /* format THDO_OPN_INFL_CNT_INFOfmt */ 3537 /* nFields */ 23, 3538 /* *fields */ soc_THDO_OPN_INFL_CNT_INFO_BCM56450_A0fmt_fields, 3539 /* bits */ 129, 3540 /* flags */ 0, 3541 }, 3542 #endif /* chips */ 3543 3544 #if defined(BCM_56450_B1) 3545 { /* SOC_FORMAT_INT_THDO_OPN_INFL_CNT_INFO_BCM56450_B1fmt */ 3546 /* format THDO_OPN_INFL_CNT_INFOfmt */ 3547 /* nFields */ 23, 3548 /* *fields */ soc_THDO_OPN_INFL_CNT_INFO_BCM56450_A0fmt_fields, 3549 /* bits */ 129, 3550 /* flags */ 0, 3551 }, 3552 #endif /* chips */ 3553 3554 #if defined(BCM_56440_A0) || defined(BCM_56440_B0) 3555 { /* SOC_FORMAT_INT_THDO_QUEUE_INFL_CNT_INFOfmt */ 3556 /* format THDO_QUEUE_INFL_CNT_INFOfmt */ 3557 /* nFields */ 27, 3558 /* *fields */ soc_THDO_QUEUE_INFL_CNT_INFOfmt_fields, 3559 /* bits */ 235, 3560 /* flags */ 0, 3561 }, 3562 #endif /* chips */ 3563 3564 #if defined(BCM_56260_A0) 3565 { /* SOC_FORMAT_INT_THDO_QUEUE_INFL_CNT_INFO_BCM56260_A0fmt */ 3566 /* format THDO_QUEUE_INFL_CNT_INFOfmt */ 3567 /* nFields */ 29, 3568 /* *fields */ soc_THDO_QUEUE_INFL_CNT_INFO_BCM56260_A0fmt_fields, 3569 /* bits */ 212, 3570 /* flags */ 0, 3571 }, 3572 #endif /* chips */ 3573 3574 #if defined(BCM_56260_B0) 3575 { /* SOC_FORMAT_INT_THDO_QUEUE_INFL_CNT_INFO_BCM56260_B0fmt */ 3576 /* format THDO_QUEUE_INFL_CNT_INFOfmt */ 3577 /* nFields */ 29, 3578 /* *fields */ soc_THDO_QUEUE_INFL_CNT_INFO_BCM56260_A0fmt_fields, 3579 /* bits */ 212, 3580 /* flags */ 0, 3581 }, 3582 #endif /* chips */ 3583 3584 #if defined(BCM_56270_A0) 3585 { /* SOC_FORMAT_INT_THDO_QUEUE_INFL_CNT_INFO_BCM56270_A0fmt */ 3586 /* format THDO_QUEUE_INFL_CNT_INFOfmt */ 3587 /* nFields */ 29, 3588 /* *fields */ soc_THDO_QUEUE_INFL_CNT_INFO_BCM56260_A0fmt_fields, 3589 /* bits */ 212, 3590 /* flags */ 0, 3591 }, 3592 #endif /* chips */ 3593 3594 #if defined(BCM_56450_A0) 3595 { /* SOC_FORMAT_INT_THDO_QUEUE_INFL_CNT_INFO_BCM56450_A0fmt */ 3596 /* format THDO_QUEUE_INFL_CNT_INFOfmt */ 3597 /* nFields */ 29, 3598 /* *fields */ soc_THDO_QUEUE_INFL_CNT_INFO_BCM56450_A0fmt_fields, 3599 /* bits */ 236, 3600 /* flags */ 0, 3601 }, 3602 #endif /* chips */ 3603 3604 #if defined(BCM_56450_B0) 3605 { /* SOC_FORMAT_INT_THDO_QUEUE_INFL_CNT_INFO_BCM56450_B0fmt */ 3606 /* format THDO_QUEUE_INFL_CNT_INFOfmt */ 3607 /* nFields */ 29, 3608 /* *fields */ soc_THDO_QUEUE_INFL_CNT_INFO_BCM56450_A0fmt_fields, 3609 /* bits */ 236, 3610 /* flags */ 0, 3611 }, 3612 #endif /* chips */ 3613 3614 #if defined(BCM_56450_B1) 3615 { /* SOC_FORMAT_INT_THDO_QUEUE_INFL_CNT_INFO_BCM56450_B1fmt */ 3616 /* format THDO_QUEUE_INFL_CNT_INFOfmt */ 3617 /* nFields */ 29, 3618 /* *fields */ soc_THDO_QUEUE_INFL_CNT_INFO_BCM56450_A0fmt_fields, 3619 /* bits */ 236, 3620 /* flags */ 0, 3621 }, 3622 #endif /* chips */ 3623 3624 #if defined(BCM_56440_A0) 3625 { /* SOC_FORMAT_INT_THDO_TO_CTR_ENQ_INFOfmt */ 3626 /* format THDO_TO_CTR_ENQ_INFOfmt */ 3627 /* nFields */ 7, 3628 /* *fields */ soc_THDO_TO_CTR_ENQ_INFOfmt_fields, 3629 /* bits */ 49, 3630 /* flags */ 0, 3631 }, 3632 #endif /* chips */ 3633 3634 #if defined(BCM_56260_A0) 3635 { /* SOC_FORMAT_INT_THDO_TO_CTR_ENQ_INFO_BCM56260_A0fmt */ 3636 /* format THDO_TO_CTR_ENQ_INFOfmt */ 3637 /* nFields */ 7, 3638 /* *fields */ soc_THDO_TO_CTR_ENQ_INFO_BCM56260_A0fmt_fields, 3639 /* bits */ 45, 3640 /* flags */ 0, 3641 }, 3642 #endif /* chips */ 3643 3644 #if defined(BCM_56260_B0) 3645 { /* SOC_FORMAT_INT_THDO_TO_CTR_ENQ_INFO_BCM56260_B0fmt */ 3646 /* format THDO_TO_CTR_ENQ_INFOfmt */ 3647 /* nFields */ 7, 3648 /* *fields */ soc_THDO_TO_CTR_ENQ_INFO_BCM56260_A0fmt_fields, 3649 /* bits */ 45, 3650 /* flags */ 0, 3651 }, 3652 #endif /* chips */ 3653 3654 #if defined(BCM_56270_A0) 3655 { /* SOC_FORMAT_INT_THDO_TO_CTR_ENQ_INFO_BCM56270_A0fmt */ 3656 /* format THDO_TO_CTR_ENQ_INFOfmt */ 3657 /* nFields */ 7, 3658 /* *fields */ soc_THDO_TO_CTR_ENQ_INFO_BCM56270_A0fmt_fields, 3659 /* bits */ 43, 3660 /* flags */ 0, 3661 }, 3662 #endif /* chips */ 3663 3664 #if defined(BCM_56440_B0) 3665 { /* SOC_FORMAT_INT_THDO_TO_CTR_ENQ_INFO_BCM56440_B0fmt */ 3666 /* format THDO_TO_CTR_ENQ_INFOfmt */ 3667 /* nFields */ 7, 3668 /* *fields */ soc_THDO_TO_CTR_ENQ_INFOfmt_fields, 3669 /* bits */ 49, 3670 /* flags */ 0, 3671 }, 3672 #endif /* chips */ 3673 3674 #if defined(BCM_56450_A0) 3675 { /* SOC_FORMAT_INT_THDO_TO_CTR_ENQ_INFO_BCM56450_A0fmt */ 3676 /* format THDO_TO_CTR_ENQ_INFOfmt */ 3677 /* nFields */ 7, 3678 /* *fields */ soc_THDO_TO_CTR_ENQ_INFO_BCM56450_A0fmt_fields, 3679 /* bits */ 49, 3680 /* flags */ 0, 3681 }, 3682 #endif /* chips */ 3683 3684 #if defined(BCM_56450_B0) 3685 { /* SOC_FORMAT_INT_THDO_TO_CTR_ENQ_INFO_BCM56450_B0fmt */ 3686 /* format THDO_TO_CTR_ENQ_INFOfmt */ 3687 /* nFields */ 7, 3688 /* *fields */ soc_THDO_TO_CTR_ENQ_INFO_BCM56450_A0fmt_fields, 3689 /* bits */ 49, 3690 /* flags */ 0, 3691 }, 3692 #endif /* chips */ 3693 3694 #if defined(BCM_56450_B1) 3695 { /* SOC_FORMAT_INT_THDO_TO_CTR_ENQ_INFO_BCM56450_B1fmt */ 3696 /* format THDO_TO_CTR_ENQ_INFOfmt */ 3697 /* nFields */ 7, 3698 /* *fields */ soc_THDO_TO_CTR_ENQ_INFO_BCM56450_A0fmt_fields, 3699 /* bits */ 49, 3700 /* flags */ 0, 3701 }, 3702 #endif /* chips */ 3703 3704 #if defined(BCM_56840_A0) || defined(BCM_56840_B0) 3705 { /* SOC_FORMAT_INT_THDO_TO_INTFO_OOBFCfmt */ 3706 /* format THDO_TO_INTFO_OOBFCfmt */ 3707 /* nFields */ 4, 3708 /* *fields */ soc_THDO_TO_INTFO_OOBFCfmt_fields, 3709 /* bits */ 8, 3710 /* flags */ 0, 3711 }, 3712 #endif /* chips */ 3713 3714 #if defined(BCM_56260_A0) 3715 { /* SOC_FORMAT_INT_THDO_TO_INTFO_OOBFC_BCM56260_A0fmt */ 3716 /* format THDO_TO_INTFO_OOBFCfmt */ 3717 /* nFields */ 1, 3718 /* *fields */ soc_THDO_TO_INTFO_OOBFC_BCM56260_A0fmt_fields, 3719 /* bits */ 2, 3720 /* flags */ 0, 3721 }, 3722 #endif /* chips */ 3723 3724 #if defined(BCM_56260_B0) 3725 { /* SOC_FORMAT_INT_THDO_TO_INTFO_OOBFC_BCM56260_B0fmt */ 3726 /* format THDO_TO_INTFO_OOBFCfmt */ 3727 /* nFields */ 1, 3728 /* *fields */ soc_THDO_TO_INTFO_OOBFC_BCM56260_A0fmt_fields, 3729 /* bits */ 2, 3730 /* flags */ 0, 3731 }, 3732 #endif /* chips */ 3733 3734 #if defined(BCM_56270_A0) 3735 { /* SOC_FORMAT_INT_THDO_TO_INTFO_OOBFC_BCM56270_A0fmt */ 3736 /* format THDO_TO_INTFO_OOBFCfmt */ 3737 /* nFields */ 1, 3738 /* *fields */ soc_THDO_TO_INTFO_OOBFC_BCM56260_A0fmt_fields, 3739 /* bits */ 2, 3740 /* flags */ 0, 3741 }, 3742 #endif /* chips */ 3743 3744 #if defined(BCM_56340_A0) 3745 { /* SOC_FORMAT_INT_THDO_TO_INTFO_OOBFC_BCM56340_A0fmt */ 3746 /* format THDO_TO_INTFO_OOBFCfmt */ 3747 /* nFields */ 4, 3748 /* *fields */ soc_THDO_TO_INTFO_OOBFC_BCM56640_A0fmt_fields, 3749 /* bits */ 8, 3750 /* flags */ 0, 3751 }, 3752 #endif /* chips */ 3753 3754 #if defined(BCM_56370_A0) 3755 { /* SOC_FORMAT_INT_THDO_TO_INTFO_OOBFC_BCM56370_A0fmt */ 3756 /* format THDO_TO_INTFO_OOBFCfmt */ 3757 /* nFields */ 4, 3758 /* *fields */ soc_THDO_TO_INTFO_OOBFC_BCM56960_A0fmt_fields, 3759 /* bits */ 8, 3760 /* flags */ 0, 3761 }, 3762 #endif /* chips */ 3763 3764 #if defined(BCM_56440_A0) 3765 { /* SOC_FORMAT_INT_THDO_TO_INTFO_OOBFC_BCM56440_A0fmt */ 3766 /* format THDO_TO_INTFO_OOBFCfmt */ 3767 /* nFields */ 1, 3768 /* *fields */ soc_THDO_TO_INTFO_OOBFC_BCM56440_A0fmt_fields, 3769 /* bits */ 2, 3770 /* flags */ 0, 3771 }, 3772 #endif /* chips */ 3773 3774 #if defined(BCM_56440_B0) 3775 { /* SOC_FORMAT_INT_THDO_TO_INTFO_OOBFC_BCM56440_B0fmt */ 3776 /* format THDO_TO_INTFO_OOBFCfmt */ 3777 /* nFields */ 1, 3778 /* *fields */ soc_THDO_TO_INTFO_OOBFC_BCM56440_A0fmt_fields, 3779 /* bits */ 2, 3780 /* flags */ 0, 3781 }, 3782 #endif /* chips */ 3783 3784 #if defined(BCM_56450_A0) 3785 { /* SOC_FORMAT_INT_THDO_TO_INTFO_OOBFC_BCM56450_A0fmt */ 3786 /* format THDO_TO_INTFO_OOBFCfmt */ 3787 /* nFields */ 1, 3788 /* *fields */ soc_THDO_TO_INTFO_OOBFC_BCM56450_A0fmt_fields, 3789 /* bits */ 2, 3790 /* flags */ 0, 3791 }, 3792 #endif /* chips */ 3793 3794 #if defined(BCM_56450_B0) 3795 { /* SOC_FORMAT_INT_THDO_TO_INTFO_OOBFC_BCM56450_B0fmt */ 3796 /* format THDO_TO_INTFO_OOBFCfmt */ 3797 /* nFields */ 1, 3798 /* *fields */ soc_THDO_TO_INTFO_OOBFC_BCM56450_A0fmt_fields, 3799 /* bits */ 2, 3800 /* flags */ 0, 3801 }, 3802 #endif /* chips */ 3803 3804 #if defined(BCM_56450_B1) 3805 { /* SOC_FORMAT_INT_THDO_TO_INTFO_OOBFC_BCM56450_B1fmt */ 3806 /* format THDO_TO_INTFO_OOBFCfmt */ 3807 /* nFields */ 1, 3808 /* *fields */ soc_THDO_TO_INTFO_OOBFC_BCM56450_A0fmt_fields, 3809 /* bits */ 2, 3810 /* flags */ 0, 3811 }, 3812 #endif /* chips */ 3813 3814 #if defined(BCM_56560_A0) 3815 { /* SOC_FORMAT_INT_THDO_TO_INTFO_OOBFC_BCM56560_A0fmt */ 3816 /* format THDO_TO_INTFO_OOBFCfmt */ 3817 /* nFields */ 4, 3818 /* *fields */ soc_THDO_TO_INTFO_OOBFC_BCM56960_A0fmt_fields, 3819 /* bits */ 8, 3820 /* flags */ 0, 3821 }, 3822 #endif /* chips */ 3823 3824 #if defined(BCM_56560_B0) 3825 { /* SOC_FORMAT_INT_THDO_TO_INTFO_OOBFC_BCM56560_B0fmt */ 3826 /* format THDO_TO_INTFO_OOBFCfmt */ 3827 /* nFields */ 4, 3828 /* *fields */ soc_THDO_TO_INTFO_OOBFC_BCM56960_A0fmt_fields, 3829 /* bits */ 8, 3830 /* flags */ 0, 3831 }, 3832 #endif /* chips */ 3833 3834 #if defined(BCM_56640_A0) 3835 { /* SOC_FORMAT_INT_THDO_TO_INTFO_OOBFC_BCM56640_A0fmt */ 3836 /* format THDO_TO_INTFO_OOBFCfmt */ 3837 /* nFields */ 4, 3838 /* *fields */ soc_THDO_TO_INTFO_OOBFC_BCM56640_A0fmt_fields, 3839 /* bits */ 8, 3840 /* flags */ 0, 3841 }, 3842 #endif /* chips */ 3843 3844 #if defined(BCM_56670_A0) 3845 { /* SOC_FORMAT_INT_THDO_TO_INTFO_OOBFC_BCM56670_A0fmt */ 3846 /* format THDO_TO_INTFO_OOBFCfmt */ 3847 /* nFields */ 4, 3848 /* *fields */ soc_THDO_TO_INTFO_OOBFC_BCM56960_A0fmt_fields, 3849 /* bits */ 8, 3850 /* flags */ 0, 3851 }, 3852 #endif /* chips */ 3853 3854 #if defined(BCM_56670_B0) 3855 { /* SOC_FORMAT_INT_THDO_TO_INTFO_OOBFC_BCM56670_B0fmt */ 3856 /* format THDO_TO_INTFO_OOBFCfmt */ 3857 /* nFields */ 4, 3858 /* *fields */ soc_THDO_TO_INTFO_OOBFC_BCM56960_A0fmt_fields, 3859 /* bits */ 8, 3860 /* flags */ 0, 3861 }, 3862 #endif /* chips */ 3863 3864 #if defined(BCM_56770_A0) 3865 { /* SOC_FORMAT_INT_THDO_TO_INTFO_OOBFC_BCM56770_A0fmt */ 3866 /* format THDO_TO_INTFO_OOBFCfmt */ 3867 /* nFields */ 4, 3868 /* *fields */ soc_THDO_TO_INTFO_OOBFC_BCM56960_A0fmt_fields, 3869 /* bits */ 8, 3870 /* flags */ 0, 3871 }, 3872 #endif /* chips */ 3873 3874 #if defined(BCM_56850_A0) 3875 { /* SOC_FORMAT_INT_THDO_TO_INTFO_OOBFC_BCM56850_A0fmt */ 3876 /* format THDO_TO_INTFO_OOBFCfmt */ 3877 /* nFields */ 4, 3878 /* *fields */ soc_THDO_TO_INTFO_OOBFC_BCM56640_A0fmt_fields, 3879 /* bits */ 8, 3880 /* flags */ 0, 3881 }, 3882 #endif /* chips */ 3883 3884 #if defined(BCM_56860_A0) 3885 { /* SOC_FORMAT_INT_THDO_TO_INTFO_OOBFC_BCM56860_A0fmt */ 3886 /* format THDO_TO_INTFO_OOBFCfmt */ 3887 /* nFields */ 4, 3888 /* *fields */ soc_THDO_TO_INTFO_OOBFC_BCM56640_A0fmt_fields, 3889 /* bits */ 8, 3890 /* flags */ 0, 3891 }, 3892 #endif /* chips */ 3893 3894 #if defined(BCM_56870_A0) 3895 { /* SOC_FORMAT_INT_THDO_TO_INTFO_OOBFC_BCM56870_A0fmt */ 3896 /* format THDO_TO_INTFO_OOBFCfmt */ 3897 /* nFields */ 4, 3898 /* *fields */ soc_THDO_TO_INTFO_OOBFC_BCM56960_A0fmt_fields, 3899 /* bits */ 8, 3900 /* flags */ 0, 3901 }, 3902 #endif /* chips */ 3903 3904 #if defined(BCM_56960_A0) 3905 { /* SOC_FORMAT_INT_THDO_TO_INTFO_OOBFC_BCM56960_A0fmt */ 3906 /* format THDO_TO_INTFO_OOBFCfmt */ 3907 /* nFields */ 4, 3908 /* *fields */ soc_THDO_TO_INTFO_OOBFC_BCM56960_A0fmt_fields, 3909 /* bits */ 8, 3910 /* flags */ 0, 3911 }, 3912 #endif /* chips */ 3913 3914 #if defined(BCM_56965_A0) 3915 { /* SOC_FORMAT_INT_THDO_TO_INTFO_OOBFC_BCM56965_A0fmt */ 3916 /* format THDO_TO_INTFO_OOBFCfmt */ 3917 /* nFields */ 4, 3918 /* *fields */ soc_THDO_TO_INTFO_OOBFC_BCM56960_A0fmt_fields, 3919 /* bits */ 8, 3920 /* flags */ 0, 3921 }, 3922 #endif /* chips */ 3923 3924 #if defined(BCM_56970_A0) 3925 { /* SOC_FORMAT_INT_THDO_TO_INTFO_OOBFC_BCM56970_A0fmt */ 3926 /* format THDO_TO_INTFO_OOBFCfmt */ 3927 /* nFields */ 4, 3928 /* *fields */ soc_THDO_TO_INTFO_OOBFC_BCM56960_A0fmt_fields, 3929 /* bits */ 8, 3930 /* flags */ 0, 3931 }, 3932 #endif /* chips */ 3933 3934 #if defined(BCM_56524_A0) || defined(BCM_56634_A0) || \ 3935 defined(BCM_56634_B0) 3936 { /* SOC_FORMAT_INT_THDO_TO_REDIRECT_INFOfmt */ 3937 /* format THDO_TO_REDIRECT_INFOfmt */ 3938 /* nFields */ 1, 3939 /* *fields */ soc_THDO_TO_REDIRECT_INFOfmt_fields, 3940 /* bits */ 8, 3941 /* flags */ 0, 3942 }, 3943 #endif /* chips */ 3944 3945 #if defined(BCM_56524_B0) 3946 { /* SOC_FORMAT_INT_THDO_TO_REDIRECT_INFO_BCM56524_B0fmt */ 3947 /* format THDO_TO_REDIRECT_INFOfmt */ 3948 /* nFields */ 1, 3949 /* *fields */ soc_THDO_TO_REDIRECT_INFOfmt_fields, 3950 /* bits */ 8, 3951 /* flags */ 0, 3952 }, 3953 #endif /* chips */ 3954 3955 #if defined(BCM_56685_A0) 3956 { /* SOC_FORMAT_INT_THDO_TO_REDIRECT_INFO_BCM56685_A0fmt */ 3957 /* format THDO_TO_REDIRECT_INFOfmt */ 3958 /* nFields */ 1, 3959 /* *fields */ soc_THDO_TO_REDIRECT_INFOfmt_fields, 3960 /* bits */ 8, 3961 /* flags */ 0, 3962 }, 3963 #endif /* chips */ 3964 3965 #if defined(BCM_56685_B0) 3966 { /* SOC_FORMAT_INT_THDO_TO_REDIRECT_INFO_BCM56685_B0fmt */ 3967 /* format THDO_TO_REDIRECT_INFOfmt */ 3968 /* nFields */ 1, 3969 /* *fields */ soc_THDO_TO_REDIRECT_INFOfmt_fields, 3970 /* bits */ 8, 3971 /* flags */ 0, 3972 }, 3973 #endif /* chips */ 3974 3975 #if defined(BCM_56440_A0) || defined(BCM_56440_B0) 3976 { /* SOC_FORMAT_INT_THDO_TO_RQE_INFOfmt */ 3977 /* format THDO_TO_RQE_INFOfmt */ 3978 /* nFields */ 4, 3979 /* *fields */ soc_THDO_TO_RQE_INFOfmt_fields, 3980 /* bits */ 16, 3981 /* flags */ 0, 3982 }, 3983 #endif /* chips */ 3984 3985 #if defined(BCM_56260_A0) 3986 { /* SOC_FORMAT_INT_THDO_TO_RQE_INFO_BCM56260_A0fmt */ 3987 /* format THDO_TO_RQE_INFOfmt */ 3988 /* nFields */ 4, 3989 /* *fields */ soc_THDO_TO_RQE_INFO_BCM56260_A0fmt_fields, 3990 /* bits */ 4, 3991 /* flags */ 0, 3992 }, 3993 #endif /* chips */ 3994 3995 #if defined(BCM_56260_B0) 3996 { /* SOC_FORMAT_INT_THDO_TO_RQE_INFO_BCM56260_B0fmt */ 3997 /* format THDO_TO_RQE_INFOfmt */ 3998 /* nFields */ 4, 3999 /* *fields */ soc_THDO_TO_RQE_INFO_BCM56260_A0fmt_fields, 4000 /* bits */ 4, 4001 /* flags */ 0, 4002 }, 4003 #endif /* chips */ 4004 4005 #if defined(BCM_56270_A0) 4006 { /* SOC_FORMAT_INT_THDO_TO_RQE_INFO_BCM56270_A0fmt */ 4007 /* format THDO_TO_RQE_INFOfmt */ 4008 /* nFields */ 3, 4009 /* *fields */ soc_THDO_TO_RQE_INFO_BCM56270_A0fmt_fields, 4010 /* bits */ 3, 4011 /* flags */ 0, 4012 }, 4013 #endif /* chips */ 4014 4015 #if defined(BCM_56450_A0) 4016 { /* SOC_FORMAT_INT_THDO_TO_RQE_INFO_BCM56450_A0fmt */ 4017 /* format THDO_TO_RQE_INFOfmt */ 4018 /* nFields */ 4, 4019 /* *fields */ soc_THDO_TO_RQE_INFO_BCM56450_A0fmt_fields, 4020 /* bits */ 16, 4021 /* flags */ 0, 4022 }, 4023 #endif /* chips */ 4024 4025 #if defined(BCM_56450_B0) 4026 { /* SOC_FORMAT_INT_THDO_TO_RQE_INFO_BCM56450_B0fmt */ 4027 /* format THDO_TO_RQE_INFOfmt */ 4028 /* nFields */ 4, 4029 /* *fields */ soc_THDO_TO_RQE_INFO_BCM56450_A0fmt_fields, 4030 /* bits */ 16, 4031 /* flags */ 0, 4032 }, 4033 #endif /* chips */ 4034 4035 #if defined(BCM_56450_B1) 4036 { /* SOC_FORMAT_INT_THDO_TO_RQE_INFO_BCM56450_B1fmt */ 4037 /* format THDO_TO_RQE_INFOfmt */ 4038 /* nFields */ 4, 4039 /* *fields */ soc_THDO_TO_RQE_INFO_BCM56450_A0fmt_fields, 4040 /* bits */ 16, 4041 /* flags */ 0, 4042 }, 4043 #endif /* chips */ 4044 4045 #if defined(BCM_56634_A0) 4046 { /* SOC_FORMAT_INT_THDO_TO_WAMUfmt */ 4047 /* format THDO_TO_WAMUfmt */ 4048 /* nFields */ 1, 4049 /* *fields */ soc_THDO_TO_REDIRECT_INFOfmt_fields, 4050 /* bits */ 8, 4051 /* flags */ 0, 4052 }, 4053 #endif /* chips */ 4054 4055 #if defined(BCM_56524_A0) 4056 { /* SOC_FORMAT_INT_THDO_TO_WAMU_BCM56524_A0fmt */ 4057 /* format THDO_TO_WAMUfmt */ 4058 /* nFields */ 1, 4059 /* *fields */ soc_THDO_TO_REDIRECT_INFOfmt_fields, 4060 /* bits */ 8, 4061 /* flags */ 0, 4062 }, 4063 #endif /* chips */ 4064 4065 #if defined(BCM_56524_B0) 4066 { /* SOC_FORMAT_INT_THDO_TO_WAMU_BCM56524_B0fmt */ 4067 /* format THDO_TO_WAMUfmt */ 4068 /* nFields */ 1, 4069 /* *fields */ soc_THDO_TO_REDIRECT_INFOfmt_fields, 4070 /* bits */ 8, 4071 /* flags */ 0, 4072 }, 4073 #endif /* chips */ 4074 4075 #if defined(BCM_56634_B0) 4076 { /* SOC_FORMAT_INT_THDO_TO_WAMU_BCM56634_B0fmt */ 4077 /* format THDO_TO_WAMUfmt */ 4078 /* nFields */ 1, 4079 /* *fields */ soc_THDO_TO_REDIRECT_INFOfmt_fields, 4080 /* bits */ 8, 4081 /* flags */ 0, 4082 }, 4083 #endif /* chips */ 4084 4085 #if defined(BCM_56685_A0) 4086 { /* SOC_FORMAT_INT_THDO_TO_WAMU_BCM56685_A0fmt */ 4087 /* format THDO_TO_WAMUfmt */ 4088 /* nFields */ 1, 4089 /* *fields */ soc_THDO_TO_REDIRECT_INFOfmt_fields, 4090 /* bits */ 8, 4091 /* flags */ 0, 4092 }, 4093 #endif /* chips */ 4094 4095 #if defined(BCM_56685_B0) 4096 { /* SOC_FORMAT_INT_THDO_TO_WAMU_BCM56685_B0fmt */ 4097 /* format THDO_TO_WAMUfmt */ 4098 /* nFields */ 1, 4099 /* *fields */ soc_THDO_TO_REDIRECT_INFOfmt_fields, 4100 /* bits */ 8, 4101 /* flags */ 0, 4102 }, 4103 #endif /* chips */ 4104 4105 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 4106 { /* SOC_FORMAT_INT_THDU_TO_THDM_DEQfmt */ 4107 /* format THDU_TO_THDM_DEQfmt */ 4108 /* nFields */ 4, 4109 /* *fields */ soc_THDU_TO_THDM_DEQfmt_fields, 4110 /* bits */ 11, 4111 /* flags */ 0, 4112 }, 4113 #endif /* chips */ 4114 4115 #if defined(BCM_56370_A0) 4116 { /* SOC_FORMAT_INT_THDU_TO_THDM_DEQ_BCM56370_A0fmt */ 4117 /* format THDU_TO_THDM_DEQfmt */ 4118 /* nFields */ 4, 4119 /* *fields */ soc_THDU_TO_THDM_DEQ_BCM56560_A0fmt_fields, 4120 /* bits */ 11, 4121 /* flags */ 0, 4122 }, 4123 #endif /* chips */ 4124 4125 #if defined(BCM_56560_A0) 4126 { /* SOC_FORMAT_INT_THDU_TO_THDM_DEQ_BCM56560_A0fmt */ 4127 /* format THDU_TO_THDM_DEQfmt */ 4128 /* nFields */ 4, 4129 /* *fields */ soc_THDU_TO_THDM_DEQ_BCM56560_A0fmt_fields, 4130 /* bits */ 11, 4131 /* flags */ 0, 4132 }, 4133 #endif /* chips */ 4134 4135 #if defined(BCM_56560_B0) 4136 { /* SOC_FORMAT_INT_THDU_TO_THDM_DEQ_BCM56560_B0fmt */ 4137 /* format THDU_TO_THDM_DEQfmt */ 4138 /* nFields */ 4, 4139 /* *fields */ soc_THDU_TO_THDM_DEQ_BCM56560_A0fmt_fields, 4140 /* bits */ 11, 4141 /* flags */ 0, 4142 }, 4143 #endif /* chips */ 4144 4145 #if defined(BCM_56670_A0) 4146 { /* SOC_FORMAT_INT_THDU_TO_THDM_DEQ_BCM56670_A0fmt */ 4147 /* format THDU_TO_THDM_DEQfmt */ 4148 /* nFields */ 4, 4149 /* *fields */ soc_THDU_TO_THDM_DEQ_BCM56560_A0fmt_fields, 4150 /* bits */ 11, 4151 /* flags */ 0, 4152 }, 4153 #endif /* chips */ 4154 4155 #if defined(BCM_56670_B0) 4156 { /* SOC_FORMAT_INT_THDU_TO_THDM_DEQ_BCM56670_B0fmt */ 4157 /* format THDU_TO_THDM_DEQfmt */ 4158 /* nFields */ 4, 4159 /* *fields */ soc_THDU_TO_THDM_DEQ_BCM56560_A0fmt_fields, 4160 /* bits */ 11, 4161 /* flags */ 0, 4162 }, 4163 #endif /* chips */ 4164 4165 #if defined(BCM_56770_A0) 4166 { /* SOC_FORMAT_INT_THDU_TO_THDM_DEQ_BCM56770_A0fmt */ 4167 /* format THDU_TO_THDM_DEQfmt */ 4168 /* nFields */ 4, 4169 /* *fields */ soc_THDU_TO_THDM_DEQ_BCM56870_A0fmt_fields, 4170 /* bits */ 12, 4171 /* flags */ 0, 4172 }, 4173 #endif /* chips */ 4174 4175 #if defined(BCM_56870_A0) 4176 { /* SOC_FORMAT_INT_THDU_TO_THDM_DEQ_BCM56870_A0fmt */ 4177 /* format THDU_TO_THDM_DEQfmt */ 4178 /* nFields */ 4, 4179 /* *fields */ soc_THDU_TO_THDM_DEQ_BCM56870_A0fmt_fields, 4180 /* bits */ 12, 4181 /* flags */ 0, 4182 }, 4183 #endif /* chips */ 4184 4185 #if defined(BCM_56960_A0) 4186 { /* SOC_FORMAT_INT_THDU_TO_THDM_DEQ_BCM56960_A0fmt */ 4187 /* format THDU_TO_THDM_DEQfmt */ 4188 /* nFields */ 3, 4189 /* *fields */ soc_THDU_TO_THDM_DEQ_BCM56960_A0fmt_fields, 4190 /* bits */ 4, 4191 /* flags */ 0, 4192 }, 4193 #endif /* chips */ 4194 4195 #if defined(BCM_56965_A0) 4196 { /* SOC_FORMAT_INT_THDU_TO_THDM_DEQ_BCM56965_A0fmt */ 4197 /* format THDU_TO_THDM_DEQfmt */ 4198 /* nFields */ 3, 4199 /* *fields */ soc_THDU_TO_THDM_DEQ_BCM56960_A0fmt_fields, 4200 /* bits */ 4, 4201 /* flags */ 0, 4202 }, 4203 #endif /* chips */ 4204 4205 #if defined(BCM_56970_A0) 4206 { /* SOC_FORMAT_INT_THDU_TO_THDM_DEQ_BCM56970_A0fmt */ 4207 /* format THDU_TO_THDM_DEQfmt */ 4208 /* nFields */ 4, 4209 /* *fields */ soc_THDU_TO_THDM_DEQ_BCM56560_A0fmt_fields, 4210 /* bits */ 11, 4211 /* flags */ 0, 4212 }, 4213 #endif /* chips */ 4214 4215 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 4216 { /* SOC_FORMAT_INT_THDU_TO_THDM_ENQfmt */ 4217 /* format THDU_TO_THDM_ENQfmt */ 4218 /* nFields */ 4, 4219 /* *fields */ soc_THDU_TO_THDM_ENQfmt_fields, 4220 /* bits */ 19, 4221 /* flags */ 0, 4222 }, 4223 #endif /* chips */ 4224 4225 #if defined(BCM_56370_A0) 4226 { /* SOC_FORMAT_INT_THDU_TO_THDM_ENQ_BCM56370_A0fmt */ 4227 /* format THDU_TO_THDM_ENQfmt */ 4228 /* nFields */ 4, 4229 /* *fields */ soc_THDU_TO_THDM_ENQ_BCM56560_A0fmt_fields, 4230 /* bits */ 19, 4231 /* flags */ 0, 4232 }, 4233 #endif /* chips */ 4234 4235 #if defined(BCM_56560_A0) 4236 { /* SOC_FORMAT_INT_THDU_TO_THDM_ENQ_BCM56560_A0fmt */ 4237 /* format THDU_TO_THDM_ENQfmt */ 4238 /* nFields */ 4, 4239 /* *fields */ soc_THDU_TO_THDM_ENQ_BCM56560_A0fmt_fields, 4240 /* bits */ 19, 4241 /* flags */ 0, 4242 }, 4243 #endif /* chips */ 4244 4245 #if defined(BCM_56560_B0) 4246 { /* SOC_FORMAT_INT_THDU_TO_THDM_ENQ_BCM56560_B0fmt */ 4247 /* format THDU_TO_THDM_ENQfmt */ 4248 /* nFields */ 4, 4249 /* *fields */ soc_THDU_TO_THDM_ENQ_BCM56560_A0fmt_fields, 4250 /* bits */ 19, 4251 /* flags */ 0, 4252 }, 4253 #endif /* chips */ 4254 4255 #if defined(BCM_56670_A0) 4256 { /* SOC_FORMAT_INT_THDU_TO_THDM_ENQ_BCM56670_A0fmt */ 4257 /* format THDU_TO_THDM_ENQfmt */ 4258 /* nFields */ 4, 4259 /* *fields */ soc_THDU_TO_THDM_ENQ_BCM56560_A0fmt_fields, 4260 /* bits */ 19, 4261 /* flags */ 0, 4262 }, 4263 #endif /* chips */ 4264 4265 #if defined(BCM_56670_B0) 4266 { /* SOC_FORMAT_INT_THDU_TO_THDM_ENQ_BCM56670_B0fmt */ 4267 /* format THDU_TO_THDM_ENQfmt */ 4268 /* nFields */ 4, 4269 /* *fields */ soc_THDU_TO_THDM_ENQ_BCM56560_A0fmt_fields, 4270 /* bits */ 19, 4271 /* flags */ 0, 4272 }, 4273 #endif /* chips */ 4274 4275 #if defined(BCM_56770_A0) 4276 { /* SOC_FORMAT_INT_THDU_TO_THDM_ENQ_BCM56770_A0fmt */ 4277 /* format THDU_TO_THDM_ENQfmt */ 4278 /* nFields */ 4, 4279 /* *fields */ soc_THDU_TO_THDM_ENQ_BCM56870_A0fmt_fields, 4280 /* bits */ 20, 4281 /* flags */ 0, 4282 }, 4283 #endif /* chips */ 4284 4285 #if defined(BCM_56870_A0) 4286 { /* SOC_FORMAT_INT_THDU_TO_THDM_ENQ_BCM56870_A0fmt */ 4287 /* format THDU_TO_THDM_ENQfmt */ 4288 /* nFields */ 4, 4289 /* *fields */ soc_THDU_TO_THDM_ENQ_BCM56870_A0fmt_fields, 4290 /* bits */ 20, 4291 /* flags */ 0, 4292 }, 4293 #endif /* chips */ 4294 4295 #if defined(BCM_56960_A0) 4296 { /* SOC_FORMAT_INT_THDU_TO_THDM_ENQ_BCM56960_A0fmt */ 4297 /* format THDU_TO_THDM_ENQfmt */ 4298 /* nFields */ 3, 4299 /* *fields */ soc_THDU_TO_THDM_ENQ_BCM56960_A0fmt_fields, 4300 /* bits */ 12, 4301 /* flags */ 0, 4302 }, 4303 #endif /* chips */ 4304 4305 #if defined(BCM_56965_A0) 4306 { /* SOC_FORMAT_INT_THDU_TO_THDM_ENQ_BCM56965_A0fmt */ 4307 /* format THDU_TO_THDM_ENQfmt */ 4308 /* nFields */ 3, 4309 /* *fields */ soc_THDU_TO_THDM_ENQ_BCM56960_A0fmt_fields, 4310 /* bits */ 12, 4311 /* flags */ 0, 4312 }, 4313 #endif /* chips */ 4314 4315 #if defined(BCM_56970_A0) 4316 { /* SOC_FORMAT_INT_THDU_TO_THDM_ENQ_BCM56970_A0fmt */ 4317 /* format THDU_TO_THDM_ENQfmt */ 4318 /* nFields */ 4, 4319 /* *fields */ soc_THDU_TO_THDM_ENQ_BCM56560_A0fmt_fields, 4320 /* bits */ 19, 4321 /* flags */ 0, 4322 }, 4323 #endif /* chips */ 4324 4325 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 4326 defined(BCM_56870_A0) 4327 { /* SOC_FORMAT_INT_TIMESTAMP_RECORDfmt */ 4328 /* format TIMESTAMP_RECORDfmt */ 4329 /* nFields */ 5, 4330 /* *fields */ soc_TIMESTAMP_RECORDfmt_fields, 4331 /* bits */ 112, 4332 /* flags */ 0, 4333 }, 4334 #endif /* chips */ 4335 4336 #if defined(BCM_56980_A0) || defined(BCM_56980_B0) 4337 { /* SOC_FORMAT_INT_TOQ_CELL_DESCRIPTOR_INFOfmt */ 4338 /* format TOQ_CELL_DESCRIPTOR_INFOfmt */ 4339 /* nFields */ 2, 4340 /* *fields */ soc_TOQ_CELL_DESCRIPTOR_INFOfmt_fields, 4341 /* bits */ 31, 4342 /* flags */ 0, 4343 }, 4344 #endif /* chips */ 4345 4346 #if defined(BCM_56524_A0) || defined(BCM_56624_A0) || \ 4347 defined(BCM_56624_B0) || defined(BCM_56634_A0) || \ 4348 defined(BCM_56634_B0) || defined(BCM_56680_A0) || \ 4349 defined(BCM_56680_B0) 4350 { /* SOC_FORMAT_INT_TOQ_CFG_CONFIGfmt */ 4351 /* format TOQ_CFG_CONFIGfmt */ 4352 /* nFields */ 3, 4353 /* *fields */ soc_TOQ_CFG_CONFIGfmt_fields, 4354 /* bits */ 4, 4355 /* flags */ 0, 4356 }, 4357 #endif /* chips */ 4358 4359 #if defined(BCM_56334_A0) 4360 { /* SOC_FORMAT_INT_TOQ_CFG_CONFIG_BCM56334_A0fmt */ 4361 /* format TOQ_CFG_CONFIGfmt */ 4362 /* nFields */ 3, 4363 /* *fields */ soc_TOQ_CFG_CONFIGfmt_fields, 4364 /* bits */ 4, 4365 /* flags */ 0, 4366 }, 4367 #endif /* chips */ 4368 4369 #if defined(BCM_56334_B0) 4370 { /* SOC_FORMAT_INT_TOQ_CFG_CONFIG_BCM56334_B0fmt */ 4371 /* format TOQ_CFG_CONFIGfmt */ 4372 /* nFields */ 3, 4373 /* *fields */ soc_TOQ_CFG_CONFIGfmt_fields, 4374 /* bits */ 4, 4375 /* flags */ 0, 4376 }, 4377 #endif /* chips */ 4378 4379 #if defined(BCM_56524_B0) 4380 { /* SOC_FORMAT_INT_TOQ_CFG_CONFIG_BCM56524_B0fmt */ 4381 /* format TOQ_CFG_CONFIGfmt */ 4382 /* nFields */ 3, 4383 /* *fields */ soc_TOQ_CFG_CONFIGfmt_fields, 4384 /* bits */ 4, 4385 /* flags */ 0, 4386 }, 4387 #endif /* chips */ 4388 4389 #if defined(BCM_56685_A0) 4390 { /* SOC_FORMAT_INT_TOQ_CFG_CONFIG_BCM56685_A0fmt */ 4391 /* format TOQ_CFG_CONFIGfmt */ 4392 /* nFields */ 3, 4393 /* *fields */ soc_TOQ_CFG_CONFIGfmt_fields, 4394 /* bits */ 4, 4395 /* flags */ 0, 4396 }, 4397 #endif /* chips */ 4398 4399 #if defined(BCM_56685_B0) 4400 { /* SOC_FORMAT_INT_TOQ_CFG_CONFIG_BCM56685_B0fmt */ 4401 /* format TOQ_CFG_CONFIGfmt */ 4402 /* nFields */ 3, 4403 /* *fields */ soc_TOQ_CFG_CONFIGfmt_fields, 4404 /* bits */ 4, 4405 /* flags */ 0, 4406 }, 4407 #endif /* chips */ 4408 4409 #if defined(BCM_56980_A0) || defined(BCM_56980_B0) 4410 { /* SOC_FORMAT_INT_TOQ_COMMON_DEQ_CTRLfmt */ 4411 /* format TOQ_COMMON_DEQ_CTRLfmt */ 4412 /* nFields */ 14, 4413 /* *fields */ soc_TOQ_COMMON_DEQ_CTRLfmt_fields, 4414 /* bits */ 260, 4415 /* flags */ 0, 4416 }, 4417 #endif /* chips */ 4418 4419 #if defined(BCM_56800_A0) 4420 { /* SOC_FORMAT_INT_TOQ_COS_Q_INFOfmt */ 4421 /* format TOQ_COS_Q_INFOfmt */ 4422 /* nFields */ 24, 4423 /* *fields */ soc_TOQ_COS_Q_INFOfmt_fields, 4424 /* bits */ 78, 4425 /* flags */ 0, 4426 }, 4427 #endif /* chips */ 4428 4429 #if defined(BCM_56334_A0) 4430 { /* SOC_FORMAT_INT_TOQ_COS_Q_INFO_BCM56334_A0fmt */ 4431 /* format TOQ_COS_Q_INFOfmt */ 4432 /* nFields */ 27, 4433 /* *fields */ soc_TOQ_COS_Q_INFO_BCM56334_A0fmt_fields, 4434 /* bits */ 85, 4435 /* flags */ 0, 4436 }, 4437 #endif /* chips */ 4438 4439 #if defined(BCM_56334_B0) 4440 { /* SOC_FORMAT_INT_TOQ_COS_Q_INFO_BCM56334_B0fmt */ 4441 /* format TOQ_COS_Q_INFOfmt */ 4442 /* nFields */ 27, 4443 /* *fields */ soc_TOQ_COS_Q_INFO_BCM56334_A0fmt_fields, 4444 /* bits */ 85, 4445 /* flags */ 0, 4446 }, 4447 #endif /* chips */ 4448 4449 #if defined(BCM_56524_A0) 4450 { /* SOC_FORMAT_INT_TOQ_COS_Q_INFO_BCM56524_A0fmt */ 4451 /* format TOQ_COS_Q_INFOfmt */ 4452 /* nFields */ 29, 4453 /* *fields */ soc_TOQ_COS_Q_INFO_BCM56634_A0fmt_fields, 4454 /* bits */ 91, 4455 /* flags */ 0, 4456 }, 4457 #endif /* chips */ 4458 4459 #if defined(BCM_56524_B0) 4460 { /* SOC_FORMAT_INT_TOQ_COS_Q_INFO_BCM56524_B0fmt */ 4461 /* format TOQ_COS_Q_INFOfmt */ 4462 /* nFields */ 29, 4463 /* *fields */ soc_TOQ_COS_Q_INFO_BCM56634_A0fmt_fields, 4464 /* bits */ 91, 4465 /* flags */ 0, 4466 }, 4467 #endif /* chips */ 4468 4469 #if defined(BCM_56624_A0) 4470 { /* SOC_FORMAT_INT_TOQ_COS_Q_INFO_BCM56624_A0fmt */ 4471 /* format TOQ_COS_Q_INFOfmt */ 4472 /* nFields */ 27, 4473 /* *fields */ soc_TOQ_COS_Q_INFO_BCM56624_A0fmt_fields, 4474 /* bits */ 89, 4475 /* flags */ 0, 4476 }, 4477 #endif /* chips */ 4478 4479 #if defined(BCM_56624_B0) 4480 { /* SOC_FORMAT_INT_TOQ_COS_Q_INFO_BCM56624_B0fmt */ 4481 /* format TOQ_COS_Q_INFOfmt */ 4482 /* nFields */ 27, 4483 /* *fields */ soc_TOQ_COS_Q_INFO_BCM56624_A0fmt_fields, 4484 /* bits */ 89, 4485 /* flags */ 0, 4486 }, 4487 #endif /* chips */ 4488 4489 #if defined(BCM_56634_A0) 4490 { /* SOC_FORMAT_INT_TOQ_COS_Q_INFO_BCM56634_A0fmt */ 4491 /* format TOQ_COS_Q_INFOfmt */ 4492 /* nFields */ 29, 4493 /* *fields */ soc_TOQ_COS_Q_INFO_BCM56634_A0fmt_fields, 4494 /* bits */ 91, 4495 /* flags */ 0, 4496 }, 4497 #endif /* chips */ 4498 4499 #if defined(BCM_56634_B0) 4500 { /* SOC_FORMAT_INT_TOQ_COS_Q_INFO_BCM56634_B0fmt */ 4501 /* format TOQ_COS_Q_INFOfmt */ 4502 /* nFields */ 29, 4503 /* *fields */ soc_TOQ_COS_Q_INFO_BCM56634_A0fmt_fields, 4504 /* bits */ 91, 4505 /* flags */ 0, 4506 }, 4507 #endif /* chips */ 4508 4509 #if defined(BCM_56680_A0) 4510 { /* SOC_FORMAT_INT_TOQ_COS_Q_INFO_BCM56680_A0fmt */ 4511 /* format TOQ_COS_Q_INFOfmt */ 4512 /* nFields */ 27, 4513 /* *fields */ soc_TOQ_COS_Q_INFO_BCM56624_A0fmt_fields, 4514 /* bits */ 89, 4515 /* flags */ 0, 4516 }, 4517 #endif /* chips */ 4518 4519 #if defined(BCM_56680_B0) 4520 { /* SOC_FORMAT_INT_TOQ_COS_Q_INFO_BCM56680_B0fmt */ 4521 /* format TOQ_COS_Q_INFOfmt */ 4522 /* nFields */ 27, 4523 /* *fields */ soc_TOQ_COS_Q_INFO_BCM56624_A0fmt_fields, 4524 /* bits */ 89, 4525 /* flags */ 0, 4526 }, 4527 #endif /* chips */ 4528 4529 #if defined(BCM_56685_A0) 4530 { /* SOC_FORMAT_INT_TOQ_COS_Q_INFO_BCM56685_A0fmt */ 4531 /* format TOQ_COS_Q_INFOfmt */ 4532 /* nFields */ 29, 4533 /* *fields */ soc_TOQ_COS_Q_INFO_BCM56634_A0fmt_fields, 4534 /* bits */ 91, 4535 /* flags */ 0, 4536 }, 4537 #endif /* chips */ 4538 4539 #if defined(BCM_56685_B0) 4540 { /* SOC_FORMAT_INT_TOQ_COS_Q_INFO_BCM56685_B0fmt */ 4541 /* format TOQ_COS_Q_INFOfmt */ 4542 /* nFields */ 29, 4543 /* *fields */ soc_TOQ_COS_Q_INFO_BCM56634_A0fmt_fields, 4544 /* bits */ 91, 4545 /* flags */ 0, 4546 }, 4547 #endif /* chips */ 4548 4549 #if defined(BCM_56725_A0) 4550 { /* SOC_FORMAT_INT_TOQ_COS_Q_INFO_BCM56725_A0fmt */ 4551 /* format TOQ_COS_Q_INFOfmt */ 4552 /* nFields */ 28, 4553 /* *fields */ soc_TOQ_COS_Q_INFO_BCM56820_A0fmt_fields, 4554 /* bits */ 90, 4555 /* flags */ 0, 4556 }, 4557 #endif /* chips */ 4558 4559 #if defined(BCM_56820_A0) 4560 { /* SOC_FORMAT_INT_TOQ_COS_Q_INFO_BCM56820_A0fmt */ 4561 /* format TOQ_COS_Q_INFOfmt */ 4562 /* nFields */ 28, 4563 /* *fields */ soc_TOQ_COS_Q_INFO_BCM56820_A0fmt_fields, 4564 /* bits */ 90, 4565 /* flags */ 0, 4566 }, 4567 #endif /* chips */ 4568 4569 #if defined(BCM_88732_A0) 4570 { /* SOC_FORMAT_INT_TOQ_COS_Q_INFO_BCM88732_A0fmt */ 4571 /* format TOQ_COS_Q_INFOfmt */ 4572 /* nFields */ 9, 4573 /* *fields */ soc_TOQ_COS_Q_INFO_BCM88732_A0fmt_fields, 4574 /* bits */ 42, 4575 /* flags */ 0, 4576 }, 4577 #endif /* chips */ 4578 4579 #if defined(BCM_56725_A0) || defined(BCM_56820_A0) 4580 { /* SOC_FORMAT_INT_TOQ_CPU_PORT_COSQ_INFOfmt */ 4581 /* format TOQ_CPU_PORT_COSQ_INFOfmt */ 4582 /* nFields */ 34, 4583 /* *fields */ soc_TOQ_CPU_PORT_COSQ_INFOfmt_fields, 4584 /* bits */ 2949, 4585 /* flags */ 0, 4586 }, 4587 #endif /* chips */ 4588 4589 #if defined(BCM_56725_A0) || defined(BCM_56820_A0) 4590 { /* SOC_FORMAT_INT_TOQ_CPU_PORT_COSQ_PKT_RD_PTRfmt */ 4591 /* format TOQ_CPU_PORT_COSQ_PKT_RD_PTRfmt */ 4592 /* nFields */ 32, 4593 /* *fields */ soc_TOQ_CPU_PORT_COSQ_PKT_RD_PTRfmt_fields, 4594 /* bits */ 2806, 4595 /* flags */ 0, 4596 }, 4597 #endif /* chips */ 4598 4599 #if defined(BCM_56725_A0) || defined(BCM_56820_A0) 4600 { /* SOC_FORMAT_INT_TOQ_CPU_PORT_COSQ_STATEfmt */ 4601 /* format TOQ_CPU_PORT_COSQ_STATEfmt */ 4602 /* nFields */ 32, 4603 /* *fields */ soc_TOQ_CPU_PORT_COSQ_STATEfmt_fields, 4604 /* bits */ 2792, 4605 /* flags */ 0, 4606 }, 4607 #endif /* chips */ 4608 4609 #if defined(BCM_56980_A0) || defined(BCM_56980_B0) 4610 { /* SOC_FORMAT_INT_TOQ_CQEBN_CACHE_ENTRYfmt */ 4611 /* format TOQ_CQEBN_CACHE_ENTRYfmt */ 4612 /* nFields */ 3, 4613 /* *fields */ soc_TOQ_CQEBN_CACHE_ENTRYfmt_fields, 4614 /* bits */ 37, 4615 /* flags */ 0, 4616 }, 4617 #endif /* chips */ 4618 4619 #if defined(BCM_56670_A0) || defined(BCM_56670_B0) 4620 { /* SOC_FORMAT_INT_TOQ_DATA_OUT_INFOfmt */ 4621 /* format TOQ_DATA_OUT_INFOfmt */ 4622 /* nFields */ 14, 4623 /* *fields */ soc_TOQ_DATA_OUT_INFOfmt_fields, 4624 /* bits */ 57, 4625 /* flags */ 0, 4626 }, 4627 #endif /* chips */ 4628 4629 #if defined(BCM_56980_A0) || defined(BCM_56980_B0) 4630 { /* SOC_FORMAT_INT_TOQ_EXEC_DEQ_CTRLfmt */ 4631 /* format TOQ_EXEC_DEQ_CTRLfmt */ 4632 /* nFields */ 10, 4633 /* *fields */ soc_TOQ_EXEC_DEQ_CTRLfmt_fields, 4634 /* bits */ 33, 4635 /* flags */ 0, 4636 }, 4637 #endif /* chips */ 4638 4639 #if defined(BCM_56980_A0) || defined(BCM_56980_B0) 4640 { /* SOC_FORMAT_INT_TOQ_EXEC_ENQ_CTRLfmt */ 4641 /* format TOQ_EXEC_ENQ_CTRLfmt */ 4642 /* nFields */ 9, 4643 /* *fields */ soc_TOQ_EXEC_ENQ_CTRLfmt_fields, 4644 /* bits */ 26, 4645 /* flags */ 0, 4646 }, 4647 #endif /* chips */ 4648 4649 #if defined(BCM_56440_A0) 4650 { /* SOC_FORMAT_INT_TOQ_MCFIFO_CHANNELfmt */ 4651 /* format TOQ_MCFIFO_CHANNELfmt */ 4652 /* nFields */ 4, 4653 /* *fields */ soc_TOQ_MCFIFO_CHANNELfmt_fields, 4654 /* bits */ 53, 4655 /* flags */ 0, 4656 }, 4657 #endif /* chips */ 4658 4659 #if defined(BCM_56440_B0) 4660 { /* SOC_FORMAT_INT_TOQ_MCFIFO_CHANNEL_BCM56440_B0fmt */ 4661 /* format TOQ_MCFIFO_CHANNELfmt */ 4662 /* nFields */ 4, 4663 /* *fields */ soc_TOQ_MCFIFO_CHANNELfmt_fields, 4664 /* bits */ 53, 4665 /* flags */ 0, 4666 }, 4667 #endif /* chips */ 4668 4669 #if defined(BCM_56440_A0) 4670 { /* SOC_FORMAT_INT_TOQ_MCFIFO_ENTRYfmt */ 4671 /* format TOQ_MCFIFO_ENTRYfmt */ 4672 /* nFields */ 8, 4673 /* *fields */ soc_TOQ_MCFIFO_ENTRYfmt_fields, 4674 /* bits */ 424, 4675 /* flags */ 0, 4676 }, 4677 #endif /* chips */ 4678 4679 #if defined(BCM_56440_B0) 4680 { /* SOC_FORMAT_INT_TOQ_MCFIFO_ENTRY_BCM56440_B0fmt */ 4681 /* format TOQ_MCFIFO_ENTRYfmt */ 4682 /* nFields */ 8, 4683 /* *fields */ soc_TOQ_MCFIFO_ENTRYfmt_fields, 4684 /* bits */ 424, 4685 /* flags */ 0, 4686 }, 4687 #endif /* chips */ 4688 4689 #if defined(BCM_56800_A0) 4690 { /* SOC_FORMAT_INT_TOQ_NEW_1CELL_INFOfmt */ 4691 /* format TOQ_NEW_1CELL_INFOfmt */ 4692 /* nFields */ 11, 4693 /* *fields */ soc_TOQ_NEW_1CELL_INFOfmt_fields, 4694 /* bits */ 28, 4695 /* flags */ 0, 4696 }, 4697 #endif /* chips */ 4698 4699 #if defined(BCM_56334_A0) 4700 { /* SOC_FORMAT_INT_TOQ_NEW_1CELL_INFO_BCM56334_A0fmt */ 4701 /* format TOQ_NEW_1CELL_INFOfmt */ 4702 /* nFields */ 14, 4703 /* *fields */ soc_TOQ_NEW_1CELL_INFO_BCM56334_A0fmt_fields, 4704 /* bits */ 29, 4705 /* flags */ 0, 4706 }, 4707 #endif /* chips */ 4708 4709 #if defined(BCM_56334_B0) 4710 { /* SOC_FORMAT_INT_TOQ_NEW_1CELL_INFO_BCM56334_B0fmt */ 4711 /* format TOQ_NEW_1CELL_INFOfmt */ 4712 /* nFields */ 14, 4713 /* *fields */ soc_TOQ_NEW_1CELL_INFO_BCM56334_A0fmt_fields, 4714 /* bits */ 29, 4715 /* flags */ 0, 4716 }, 4717 #endif /* chips */ 4718 4719 #if defined(BCM_56524_A0) 4720 { /* SOC_FORMAT_INT_TOQ_NEW_1CELL_INFO_BCM56524_A0fmt */ 4721 /* format TOQ_NEW_1CELL_INFOfmt */ 4722 /* nFields */ 14, 4723 /* *fields */ soc_TOQ_NEW_1CELL_INFO_BCM56624_A0fmt_fields, 4724 /* bits */ 30, 4725 /* flags */ 0, 4726 }, 4727 #endif /* chips */ 4728 4729 #if defined(BCM_56524_B0) 4730 { /* SOC_FORMAT_INT_TOQ_NEW_1CELL_INFO_BCM56524_B0fmt */ 4731 /* format TOQ_NEW_1CELL_INFOfmt */ 4732 /* nFields */ 14, 4733 /* *fields */ soc_TOQ_NEW_1CELL_INFO_BCM56624_A0fmt_fields, 4734 /* bits */ 30, 4735 /* flags */ 0, 4736 }, 4737 #endif /* chips */ 4738 4739 #if defined(BCM_56624_A0) 4740 { /* SOC_FORMAT_INT_TOQ_NEW_1CELL_INFO_BCM56624_A0fmt */ 4741 /* format TOQ_NEW_1CELL_INFOfmt */ 4742 /* nFields */ 14, 4743 /* *fields */ soc_TOQ_NEW_1CELL_INFO_BCM56624_A0fmt_fields, 4744 /* bits */ 30, 4745 /* flags */ 0, 4746 }, 4747 #endif /* chips */ 4748 4749 #if defined(BCM_56624_B0) 4750 { /* SOC_FORMAT_INT_TOQ_NEW_1CELL_INFO_BCM56624_B0fmt */ 4751 /* format TOQ_NEW_1CELL_INFOfmt */ 4752 /* nFields */ 14, 4753 /* *fields */ soc_TOQ_NEW_1CELL_INFO_BCM56624_A0fmt_fields, 4754 /* bits */ 30, 4755 /* flags */ 0, 4756 }, 4757 #endif /* chips */ 4758 4759 #if defined(BCM_56634_A0) 4760 { /* SOC_FORMAT_INT_TOQ_NEW_1CELL_INFO_BCM56634_A0fmt */ 4761 /* format TOQ_NEW_1CELL_INFOfmt */ 4762 /* nFields */ 14, 4763 /* *fields */ soc_TOQ_NEW_1CELL_INFO_BCM56624_A0fmt_fields, 4764 /* bits */ 30, 4765 /* flags */ 0, 4766 }, 4767 #endif /* chips */ 4768 4769 #if defined(BCM_56634_B0) 4770 { /* SOC_FORMAT_INT_TOQ_NEW_1CELL_INFO_BCM56634_B0fmt */ 4771 /* format TOQ_NEW_1CELL_INFOfmt */ 4772 /* nFields */ 14, 4773 /* *fields */ soc_TOQ_NEW_1CELL_INFO_BCM56624_A0fmt_fields, 4774 /* bits */ 30, 4775 /* flags */ 0, 4776 }, 4777 #endif /* chips */ 4778 4779 #if defined(BCM_56680_A0) 4780 { /* SOC_FORMAT_INT_TOQ_NEW_1CELL_INFO_BCM56680_A0fmt */ 4781 /* format TOQ_NEW_1CELL_INFOfmt */ 4782 /* nFields */ 14, 4783 /* *fields */ soc_TOQ_NEW_1CELL_INFO_BCM56624_A0fmt_fields, 4784 /* bits */ 30, 4785 /* flags */ 0, 4786 }, 4787 #endif /* chips */ 4788 4789 #if defined(BCM_56680_B0) 4790 { /* SOC_FORMAT_INT_TOQ_NEW_1CELL_INFO_BCM56680_B0fmt */ 4791 /* format TOQ_NEW_1CELL_INFOfmt */ 4792 /* nFields */ 14, 4793 /* *fields */ soc_TOQ_NEW_1CELL_INFO_BCM56624_A0fmt_fields, 4794 /* bits */ 30, 4795 /* flags */ 0, 4796 }, 4797 #endif /* chips */ 4798 4799 #if defined(BCM_56685_A0) 4800 { /* SOC_FORMAT_INT_TOQ_NEW_1CELL_INFO_BCM56685_A0fmt */ 4801 /* format TOQ_NEW_1CELL_INFOfmt */ 4802 /* nFields */ 14, 4803 /* *fields */ soc_TOQ_NEW_1CELL_INFO_BCM56624_A0fmt_fields, 4804 /* bits */ 30, 4805 /* flags */ 0, 4806 }, 4807 #endif /* chips */ 4808 4809 #if defined(BCM_56685_B0) 4810 { /* SOC_FORMAT_INT_TOQ_NEW_1CELL_INFO_BCM56685_B0fmt */ 4811 /* format TOQ_NEW_1CELL_INFOfmt */ 4812 /* nFields */ 14, 4813 /* *fields */ soc_TOQ_NEW_1CELL_INFO_BCM56624_A0fmt_fields, 4814 /* bits */ 30, 4815 /* flags */ 0, 4816 }, 4817 #endif /* chips */ 4818 4819 #if defined(BCM_56725_A0) 4820 { /* SOC_FORMAT_INT_TOQ_NEW_1CELL_INFO_BCM56725_A0fmt */ 4821 /* format TOQ_NEW_1CELL_INFOfmt */ 4822 /* nFields */ 15, 4823 /* *fields */ soc_TOQ_NEW_1CELL_INFO_BCM56820_A0fmt_fields, 4824 /* bits */ 33, 4825 /* flags */ 0, 4826 }, 4827 #endif /* chips */ 4828 4829 #if defined(BCM_56820_A0) 4830 { /* SOC_FORMAT_INT_TOQ_NEW_1CELL_INFO_BCM56820_A0fmt */ 4831 /* format TOQ_NEW_1CELL_INFOfmt */ 4832 /* nFields */ 15, 4833 /* *fields */ soc_TOQ_NEW_1CELL_INFO_BCM56820_A0fmt_fields, 4834 /* bits */ 33, 4835 /* flags */ 0, 4836 }, 4837 #endif /* chips */ 4838 4839 #if defined(BCM_56800_A0) 4840 { /* SOC_FORMAT_INT_TOQ_NEW_CELL_INFOfmt */ 4841 /* format TOQ_NEW_CELL_INFOfmt */ 4842 /* nFields */ 5, 4843 /* *fields */ soc_TOQ_NEW_CELL_INFOfmt_fields, 4844 /* bits */ 25, 4845 /* flags */ 0, 4846 }, 4847 #endif /* chips */ 4848 4849 #if defined(BCM_56334_A0) 4850 { /* SOC_FORMAT_INT_TOQ_NEW_CELL_INFO_BCM56334_A0fmt */ 4851 /* format TOQ_NEW_CELL_INFOfmt */ 4852 /* nFields */ 4, 4853 /* *fields */ soc_TOQ_NEW_CELL_INFO_BCM56820_A0fmt_fields, 4854 /* bits */ 17, 4855 /* flags */ 0, 4856 }, 4857 #endif /* chips */ 4858 4859 #if defined(BCM_56334_B0) 4860 { /* SOC_FORMAT_INT_TOQ_NEW_CELL_INFO_BCM56334_B0fmt */ 4861 /* format TOQ_NEW_CELL_INFOfmt */ 4862 /* nFields */ 4, 4863 /* *fields */ soc_TOQ_NEW_CELL_INFO_BCM56820_A0fmt_fields, 4864 /* bits */ 17, 4865 /* flags */ 0, 4866 }, 4867 #endif /* chips */ 4868 4869 #if defined(BCM_56524_A0) 4870 { /* SOC_FORMAT_INT_TOQ_NEW_CELL_INFO_BCM56524_A0fmt */ 4871 /* format TOQ_NEW_CELL_INFOfmt */ 4872 /* nFields */ 4, 4873 /* *fields */ soc_TOQ_NEW_CELL_INFO_BCM56624_A0fmt_fields, 4874 /* bits */ 18, 4875 /* flags */ 0, 4876 }, 4877 #endif /* chips */ 4878 4879 #if defined(BCM_56524_B0) 4880 { /* SOC_FORMAT_INT_TOQ_NEW_CELL_INFO_BCM56524_B0fmt */ 4881 /* format TOQ_NEW_CELL_INFOfmt */ 4882 /* nFields */ 4, 4883 /* *fields */ soc_TOQ_NEW_CELL_INFO_BCM56624_A0fmt_fields, 4884 /* bits */ 18, 4885 /* flags */ 0, 4886 }, 4887 #endif /* chips */ 4888 4889 #if defined(BCM_56624_A0) 4890 { /* SOC_FORMAT_INT_TOQ_NEW_CELL_INFO_BCM56624_A0fmt */ 4891 /* format TOQ_NEW_CELL_INFOfmt */ 4892 /* nFields */ 4, 4893 /* *fields */ soc_TOQ_NEW_CELL_INFO_BCM56624_A0fmt_fields, 4894 /* bits */ 18, 4895 /* flags */ 0, 4896 }, 4897 #endif /* chips */ 4898 4899 #if defined(BCM_56624_B0) 4900 { /* SOC_FORMAT_INT_TOQ_NEW_CELL_INFO_BCM56624_B0fmt */ 4901 /* format TOQ_NEW_CELL_INFOfmt */ 4902 /* nFields */ 4, 4903 /* *fields */ soc_TOQ_NEW_CELL_INFO_BCM56624_A0fmt_fields, 4904 /* bits */ 18, 4905 /* flags */ 0, 4906 }, 4907 #endif /* chips */ 4908 4909 #if defined(BCM_56634_A0) 4910 { /* SOC_FORMAT_INT_TOQ_NEW_CELL_INFO_BCM56634_A0fmt */ 4911 /* format TOQ_NEW_CELL_INFOfmt */ 4912 /* nFields */ 4, 4913 /* *fields */ soc_TOQ_NEW_CELL_INFO_BCM56624_A0fmt_fields, 4914 /* bits */ 18, 4915 /* flags */ 0, 4916 }, 4917 #endif /* chips */ 4918 4919 #if defined(BCM_56634_B0) 4920 { /* SOC_FORMAT_INT_TOQ_NEW_CELL_INFO_BCM56634_B0fmt */ 4921 /* format TOQ_NEW_CELL_INFOfmt */ 4922 /* nFields */ 4, 4923 /* *fields */ soc_TOQ_NEW_CELL_INFO_BCM56624_A0fmt_fields, 4924 /* bits */ 18, 4925 /* flags */ 0, 4926 }, 4927 #endif /* chips */ 4928 4929 #if defined(BCM_56680_A0) 4930 { /* SOC_FORMAT_INT_TOQ_NEW_CELL_INFO_BCM56680_A0fmt */ 4931 /* format TOQ_NEW_CELL_INFOfmt */ 4932 /* nFields */ 4, 4933 /* *fields */ soc_TOQ_NEW_CELL_INFO_BCM56624_A0fmt_fields, 4934 /* bits */ 18, 4935 /* flags */ 0, 4936 }, 4937 #endif /* chips */ 4938 4939 #if defined(BCM_56680_B0) 4940 { /* SOC_FORMAT_INT_TOQ_NEW_CELL_INFO_BCM56680_B0fmt */ 4941 /* format TOQ_NEW_CELL_INFOfmt */ 4942 /* nFields */ 4, 4943 /* *fields */ soc_TOQ_NEW_CELL_INFO_BCM56624_A0fmt_fields, 4944 /* bits */ 18, 4945 /* flags */ 0, 4946 }, 4947 #endif /* chips */ 4948 4949 #if defined(BCM_56685_A0) 4950 { /* SOC_FORMAT_INT_TOQ_NEW_CELL_INFO_BCM56685_A0fmt */ 4951 /* format TOQ_NEW_CELL_INFOfmt */ 4952 /* nFields */ 4, 4953 /* *fields */ soc_TOQ_NEW_CELL_INFO_BCM56624_A0fmt_fields, 4954 /* bits */ 18, 4955 /* flags */ 0, 4956 }, 4957 #endif /* chips */ 4958 4959 #if defined(BCM_56685_B0) 4960 { /* SOC_FORMAT_INT_TOQ_NEW_CELL_INFO_BCM56685_B0fmt */ 4961 /* format TOQ_NEW_CELL_INFOfmt */ 4962 /* nFields */ 4, 4963 /* *fields */ soc_TOQ_NEW_CELL_INFO_BCM56624_A0fmt_fields, 4964 /* bits */ 18, 4965 /* flags */ 0, 4966 }, 4967 #endif /* chips */ 4968 4969 #if defined(BCM_56725_A0) 4970 { /* SOC_FORMAT_INT_TOQ_NEW_CELL_INFO_BCM56725_A0fmt */ 4971 /* format TOQ_NEW_CELL_INFOfmt */ 4972 /* nFields */ 4, 4973 /* *fields */ soc_TOQ_NEW_CELL_INFO_BCM56820_A0fmt_fields, 4974 /* bits */ 17, 4975 /* flags */ 0, 4976 }, 4977 #endif /* chips */ 4978 4979 #if defined(BCM_56820_A0) 4980 { /* SOC_FORMAT_INT_TOQ_NEW_CELL_INFO_BCM56820_A0fmt */ 4981 /* format TOQ_NEW_CELL_INFOfmt */ 4982 /* nFields */ 4, 4983 /* *fields */ soc_TOQ_NEW_CELL_INFO_BCM56820_A0fmt_fields, 4984 /* bits */ 17, 4985 /* flags */ 0, 4986 }, 4987 #endif /* chips */ 4988 4989 #if defined(BCM_88732_A0) 4990 { /* SOC_FORMAT_INT_TOQ_NEW_CELL_INFO_BCM88732_A0fmt */ 4991 /* format TOQ_NEW_CELL_INFOfmt */ 4992 /* nFields */ 3, 4993 /* *fields */ soc_TOQ_NEW_CELL_INFO_BCM88732_A0fmt_fields, 4994 /* bits */ 19, 4995 /* flags */ 0, 4996 }, 4997 #endif /* chips */ 4998 4999 #if defined(BCM_56624_A0) || defined(BCM_56634_A0) || \ 5000 defined(BCM_56634_B0) 5001 { /* SOC_FORMAT_INT_TOQ_NEW_PGQ_INFOfmt */ 5002 /* format TOQ_NEW_PGQ_INFOfmt */ 5003 /* nFields */ 4, 5004 /* *fields */ soc_TOQ_NEW_PGQ_INFOfmt_fields, 5005 /* bits */ 36, 5006 /* flags */ 0, 5007 }, 5008 #endif /* chips */ 5009 5010 #if defined(BCM_56334_A0) 5011 { /* SOC_FORMAT_INT_TOQ_NEW_PGQ_INFO_BCM56334_A0fmt */ 5012 /* format TOQ_NEW_PGQ_INFOfmt */ 5013 /* nFields */ 4, 5014 /* *fields */ soc_TOQ_NEW_PGQ_INFO_BCM56334_A0fmt_fields, 5015 /* bits */ 34, 5016 /* flags */ 0, 5017 }, 5018 #endif /* chips */ 5019 5020 #if defined(BCM_56334_B0) 5021 { /* SOC_FORMAT_INT_TOQ_NEW_PGQ_INFO_BCM56334_B0fmt */ 5022 /* format TOQ_NEW_PGQ_INFOfmt */ 5023 /* nFields */ 4, 5024 /* *fields */ soc_TOQ_NEW_PGQ_INFO_BCM56334_A0fmt_fields, 5025 /* bits */ 34, 5026 /* flags */ 0, 5027 }, 5028 #endif /* chips */ 5029 5030 #if defined(BCM_56524_A0) 5031 { /* SOC_FORMAT_INT_TOQ_NEW_PGQ_INFO_BCM56524_A0fmt */ 5032 /* format TOQ_NEW_PGQ_INFOfmt */ 5033 /* nFields */ 4, 5034 /* *fields */ soc_TOQ_NEW_PGQ_INFOfmt_fields, 5035 /* bits */ 36, 5036 /* flags */ 0, 5037 }, 5038 #endif /* chips */ 5039 5040 #if defined(BCM_56524_B0) 5041 { /* SOC_FORMAT_INT_TOQ_NEW_PGQ_INFO_BCM56524_B0fmt */ 5042 /* format TOQ_NEW_PGQ_INFOfmt */ 5043 /* nFields */ 4, 5044 /* *fields */ soc_TOQ_NEW_PGQ_INFOfmt_fields, 5045 /* bits */ 36, 5046 /* flags */ 0, 5047 }, 5048 #endif /* chips */ 5049 5050 #if defined(BCM_56624_B0) 5051 { /* SOC_FORMAT_INT_TOQ_NEW_PGQ_INFO_BCM56624_B0fmt */ 5052 /* format TOQ_NEW_PGQ_INFOfmt */ 5053 /* nFields */ 4, 5054 /* *fields */ soc_TOQ_NEW_PGQ_INFOfmt_fields, 5055 /* bits */ 36, 5056 /* flags */ 0, 5057 }, 5058 #endif /* chips */ 5059 5060 #if defined(BCM_56680_A0) 5061 { /* SOC_FORMAT_INT_TOQ_NEW_PGQ_INFO_BCM56680_A0fmt */ 5062 /* format TOQ_NEW_PGQ_INFOfmt */ 5063 /* nFields */ 4, 5064 /* *fields */ soc_TOQ_NEW_PGQ_INFOfmt_fields, 5065 /* bits */ 36, 5066 /* flags */ 0, 5067 }, 5068 #endif /* chips */ 5069 5070 #if defined(BCM_56680_B0) 5071 { /* SOC_FORMAT_INT_TOQ_NEW_PGQ_INFO_BCM56680_B0fmt */ 5072 /* format TOQ_NEW_PGQ_INFOfmt */ 5073 /* nFields */ 4, 5074 /* *fields */ soc_TOQ_NEW_PGQ_INFOfmt_fields, 5075 /* bits */ 36, 5076 /* flags */ 0, 5077 }, 5078 #endif /* chips */ 5079 5080 #if defined(BCM_56685_A0) 5081 { /* SOC_FORMAT_INT_TOQ_NEW_PGQ_INFO_BCM56685_A0fmt */ 5082 /* format TOQ_NEW_PGQ_INFOfmt */ 5083 /* nFields */ 4, 5084 /* *fields */ soc_TOQ_NEW_PGQ_INFOfmt_fields, 5085 /* bits */ 36, 5086 /* flags */ 0, 5087 }, 5088 #endif /* chips */ 5089 5090 #if defined(BCM_56685_B0) 5091 { /* SOC_FORMAT_INT_TOQ_NEW_PGQ_INFO_BCM56685_B0fmt */ 5092 /* format TOQ_NEW_PGQ_INFOfmt */ 5093 /* nFields */ 4, 5094 /* *fields */ soc_TOQ_NEW_PGQ_INFOfmt_fields, 5095 /* bits */ 36, 5096 /* flags */ 0, 5097 }, 5098 #endif /* chips */ 5099 5100 #if defined(BCM_56800_A0) 5101 { /* SOC_FORMAT_INT_TOQ_NEW_PKTHDR1_INFOfmt */ 5102 /* format TOQ_NEW_PKTHDR1_INFOfmt */ 5103 /* nFields */ 9, 5104 /* *fields */ soc_TOQ_NEW_PKTHDR1_INFOfmt_fields, 5105 /* bits */ 74, 5106 /* flags */ 0, 5107 }, 5108 #endif /* chips */ 5109 5110 #if defined(BCM_56334_A0) 5111 { /* SOC_FORMAT_INT_TOQ_NEW_PKTHDR1_INFO_BCM56334_A0fmt */ 5112 /* format TOQ_NEW_PKTHDR1_INFOfmt */ 5113 /* nFields */ 10, 5114 /* *fields */ soc_TOQ_NEW_PKTHDR1_INFO_BCM56334_A0fmt_fields, 5115 /* bits */ 103, 5116 /* flags */ 0, 5117 }, 5118 #endif /* chips */ 5119 5120 #if defined(BCM_56334_B0) 5121 { /* SOC_FORMAT_INT_TOQ_NEW_PKTHDR1_INFO_BCM56334_B0fmt */ 5122 /* format TOQ_NEW_PKTHDR1_INFOfmt */ 5123 /* nFields */ 10, 5124 /* *fields */ soc_TOQ_NEW_PKTHDR1_INFO_BCM56334_A0fmt_fields, 5125 /* bits */ 103, 5126 /* flags */ 0, 5127 }, 5128 #endif /* chips */ 5129 5130 #if defined(BCM_56524_A0) 5131 { /* SOC_FORMAT_INT_TOQ_NEW_PKTHDR1_INFO_BCM56524_A0fmt */ 5132 /* format TOQ_NEW_PKTHDR1_INFOfmt */ 5133 /* nFields */ 10, 5134 /* *fields */ soc_TOQ_NEW_PKTHDR1_INFO_BCM56634_A0fmt_fields, 5135 /* bits */ 154, 5136 /* flags */ 0, 5137 }, 5138 #endif /* chips */ 5139 5140 #if defined(BCM_56524_B0) 5141 { /* SOC_FORMAT_INT_TOQ_NEW_PKTHDR1_INFO_BCM56524_B0fmt */ 5142 /* format TOQ_NEW_PKTHDR1_INFOfmt */ 5143 /* nFields */ 10, 5144 /* *fields */ soc_TOQ_NEW_PKTHDR1_INFO_BCM56634_A0fmt_fields, 5145 /* bits */ 154, 5146 /* flags */ 0, 5147 }, 5148 #endif /* chips */ 5149 5150 #if defined(BCM_56624_A0) 5151 { /* SOC_FORMAT_INT_TOQ_NEW_PKTHDR1_INFO_BCM56624_A0fmt */ 5152 /* format TOQ_NEW_PKTHDR1_INFOfmt */ 5153 /* nFields */ 10, 5154 /* *fields */ soc_TOQ_NEW_PKTHDR1_INFO_BCM56624_A0fmt_fields, 5155 /* bits */ 152, 5156 /* flags */ 0, 5157 }, 5158 #endif /* chips */ 5159 5160 #if defined(BCM_56624_B0) 5161 { /* SOC_FORMAT_INT_TOQ_NEW_PKTHDR1_INFO_BCM56624_B0fmt */ 5162 /* format TOQ_NEW_PKTHDR1_INFOfmt */ 5163 /* nFields */ 10, 5164 /* *fields */ soc_TOQ_NEW_PKTHDR1_INFO_BCM56624_A0fmt_fields, 5165 /* bits */ 152, 5166 /* flags */ 0, 5167 }, 5168 #endif /* chips */ 5169 5170 #if defined(BCM_56634_A0) 5171 { /* SOC_FORMAT_INT_TOQ_NEW_PKTHDR1_INFO_BCM56634_A0fmt */ 5172 /* format TOQ_NEW_PKTHDR1_INFOfmt */ 5173 /* nFields */ 10, 5174 /* *fields */ soc_TOQ_NEW_PKTHDR1_INFO_BCM56634_A0fmt_fields, 5175 /* bits */ 154, 5176 /* flags */ 0, 5177 }, 5178 #endif /* chips */ 5179 5180 #if defined(BCM_56634_B0) 5181 { /* SOC_FORMAT_INT_TOQ_NEW_PKTHDR1_INFO_BCM56634_B0fmt */ 5182 /* format TOQ_NEW_PKTHDR1_INFOfmt */ 5183 /* nFields */ 10, 5184 /* *fields */ soc_TOQ_NEW_PKTHDR1_INFO_BCM56634_A0fmt_fields, 5185 /* bits */ 154, 5186 /* flags */ 0, 5187 }, 5188 #endif /* chips */ 5189 5190 #if defined(BCM_56680_A0) 5191 { /* SOC_FORMAT_INT_TOQ_NEW_PKTHDR1_INFO_BCM56680_A0fmt */ 5192 /* format TOQ_NEW_PKTHDR1_INFOfmt */ 5193 /* nFields */ 10, 5194 /* *fields */ soc_TOQ_NEW_PKTHDR1_INFO_BCM56624_A0fmt_fields, 5195 /* bits */ 152, 5196 /* flags */ 0, 5197 }, 5198 #endif /* chips */ 5199 5200 #if defined(BCM_56680_B0) 5201 { /* SOC_FORMAT_INT_TOQ_NEW_PKTHDR1_INFO_BCM56680_B0fmt */ 5202 /* format TOQ_NEW_PKTHDR1_INFOfmt */ 5203 /* nFields */ 10, 5204 /* *fields */ soc_TOQ_NEW_PKTHDR1_INFO_BCM56624_A0fmt_fields, 5205 /* bits */ 152, 5206 /* flags */ 0, 5207 }, 5208 #endif /* chips */ 5209 5210 #if defined(BCM_56685_A0) 5211 { /* SOC_FORMAT_INT_TOQ_NEW_PKTHDR1_INFO_BCM56685_A0fmt */ 5212 /* format TOQ_NEW_PKTHDR1_INFOfmt */ 5213 /* nFields */ 10, 5214 /* *fields */ soc_TOQ_NEW_PKTHDR1_INFO_BCM56634_A0fmt_fields, 5215 /* bits */ 154, 5216 /* flags */ 0, 5217 }, 5218 #endif /* chips */ 5219 5220 #if defined(BCM_56685_B0) 5221 { /* SOC_FORMAT_INT_TOQ_NEW_PKTHDR1_INFO_BCM56685_B0fmt */ 5222 /* format TOQ_NEW_PKTHDR1_INFOfmt */ 5223 /* nFields */ 10, 5224 /* *fields */ soc_TOQ_NEW_PKTHDR1_INFO_BCM56634_A0fmt_fields, 5225 /* bits */ 154, 5226 /* flags */ 0, 5227 }, 5228 #endif /* chips */ 5229 5230 #if defined(BCM_56725_A0) 5231 { /* SOC_FORMAT_INT_TOQ_NEW_PKTHDR1_INFO_BCM56725_A0fmt */ 5232 /* format TOQ_NEW_PKTHDR1_INFOfmt */ 5233 /* nFields */ 11, 5234 /* *fields */ soc_TOQ_NEW_PKTHDR1_INFO_BCM56820_A0fmt_fields, 5235 /* bits */ 101, 5236 /* flags */ 0, 5237 }, 5238 #endif /* chips */ 5239 5240 #if defined(BCM_56820_A0) 5241 { /* SOC_FORMAT_INT_TOQ_NEW_PKTHDR1_INFO_BCM56820_A0fmt */ 5242 /* format TOQ_NEW_PKTHDR1_INFOfmt */ 5243 /* nFields */ 11, 5244 /* *fields */ soc_TOQ_NEW_PKTHDR1_INFO_BCM56820_A0fmt_fields, 5245 /* bits */ 101, 5246 /* flags */ 0, 5247 }, 5248 #endif /* chips */ 5249 5250 #if defined(BCM_88732_A0) 5251 { /* SOC_FORMAT_INT_TOQ_NEW_PKTHDR1_INFO_BCM88732_A0fmt */ 5252 /* format TOQ_NEW_PKTHDR1_INFOfmt */ 5253 /* nFields */ 4, 5254 /* *fields */ soc_TOQ_NEW_PKTHDR1_INFO_BCM88732_A0fmt_fields, 5255 /* bits */ 12, 5256 /* flags */ 0, 5257 }, 5258 #endif /* chips */ 5259 5260 #if defined(BCM_56800_A0) 5261 { /* SOC_FORMAT_INT_TOQ_NEW_SAVED_INFOfmt */ 5262 /* format TOQ_NEW_SAVED_INFOfmt */ 5263 /* nFields */ 8, 5264 /* *fields */ soc_TOQ_NEW_SAVED_INFOfmt_fields, 5265 /* bits */ 38, 5266 /* flags */ 0, 5267 }, 5268 #endif /* chips */ 5269 5270 #if defined(BCM_56334_A0) 5271 { /* SOC_FORMAT_INT_TOQ_NEW_SAVED_INFO_BCM56334_A0fmt */ 5272 /* format TOQ_NEW_SAVED_INFOfmt */ 5273 /* nFields */ 13, 5274 /* *fields */ soc_TOQ_NEW_SAVED_INFO_BCM56334_A0fmt_fields, 5275 /* bits */ 64, 5276 /* flags */ 0, 5277 }, 5278 #endif /* chips */ 5279 5280 #if defined(BCM_56334_B0) 5281 { /* SOC_FORMAT_INT_TOQ_NEW_SAVED_INFO_BCM56334_B0fmt */ 5282 /* format TOQ_NEW_SAVED_INFOfmt */ 5283 /* nFields */ 13, 5284 /* *fields */ soc_TOQ_NEW_SAVED_INFO_BCM56334_A0fmt_fields, 5285 /* bits */ 64, 5286 /* flags */ 0, 5287 }, 5288 #endif /* chips */ 5289 5290 #if defined(BCM_56524_A0) 5291 { /* SOC_FORMAT_INT_TOQ_NEW_SAVED_INFO_BCM56524_A0fmt */ 5292 /* format TOQ_NEW_SAVED_INFOfmt */ 5293 /* nFields */ 15, 5294 /* *fields */ soc_TOQ_NEW_SAVED_INFO_BCM56634_A0fmt_fields, 5295 /* bits */ 70, 5296 /* flags */ 0, 5297 }, 5298 #endif /* chips */ 5299 5300 #if defined(BCM_56524_B0) 5301 { /* SOC_FORMAT_INT_TOQ_NEW_SAVED_INFO_BCM56524_B0fmt */ 5302 /* format TOQ_NEW_SAVED_INFOfmt */ 5303 /* nFields */ 15, 5304 /* *fields */ soc_TOQ_NEW_SAVED_INFO_BCM56634_A0fmt_fields, 5305 /* bits */ 70, 5306 /* flags */ 0, 5307 }, 5308 #endif /* chips */ 5309 5310 #if defined(BCM_56624_A0) 5311 { /* SOC_FORMAT_INT_TOQ_NEW_SAVED_INFO_BCM56624_A0fmt */ 5312 /* format TOQ_NEW_SAVED_INFOfmt */ 5313 /* nFields */ 13, 5314 /* *fields */ soc_TOQ_NEW_SAVED_INFO_BCM56624_A0fmt_fields, 5315 /* bits */ 68, 5316 /* flags */ 0, 5317 }, 5318 #endif /* chips */ 5319 5320 #if defined(BCM_56624_B0) 5321 { /* SOC_FORMAT_INT_TOQ_NEW_SAVED_INFO_BCM56624_B0fmt */ 5322 /* format TOQ_NEW_SAVED_INFOfmt */ 5323 /* nFields */ 13, 5324 /* *fields */ soc_TOQ_NEW_SAVED_INFO_BCM56624_A0fmt_fields, 5325 /* bits */ 68, 5326 /* flags */ 0, 5327 }, 5328 #endif /* chips */ 5329 5330 #if defined(BCM_56634_A0) 5331 { /* SOC_FORMAT_INT_TOQ_NEW_SAVED_INFO_BCM56634_A0fmt */ 5332 /* format TOQ_NEW_SAVED_INFOfmt */ 5333 /* nFields */ 15, 5334 /* *fields */ soc_TOQ_NEW_SAVED_INFO_BCM56634_A0fmt_fields, 5335 /* bits */ 70, 5336 /* flags */ 0, 5337 }, 5338 #endif /* chips */ 5339 5340 #if defined(BCM_56634_B0) 5341 { /* SOC_FORMAT_INT_TOQ_NEW_SAVED_INFO_BCM56634_B0fmt */ 5342 /* format TOQ_NEW_SAVED_INFOfmt */ 5343 /* nFields */ 15, 5344 /* *fields */ soc_TOQ_NEW_SAVED_INFO_BCM56634_A0fmt_fields, 5345 /* bits */ 70, 5346 /* flags */ 0, 5347 }, 5348 #endif /* chips */ 5349 5350 #if defined(BCM_56680_A0) 5351 { /* SOC_FORMAT_INT_TOQ_NEW_SAVED_INFO_BCM56680_A0fmt */ 5352 /* format TOQ_NEW_SAVED_INFOfmt */ 5353 /* nFields */ 13, 5354 /* *fields */ soc_TOQ_NEW_SAVED_INFO_BCM56624_A0fmt_fields, 5355 /* bits */ 68, 5356 /* flags */ 0, 5357 }, 5358 #endif /* chips */ 5359 5360 #if defined(BCM_56680_B0) 5361 { /* SOC_FORMAT_INT_TOQ_NEW_SAVED_INFO_BCM56680_B0fmt */ 5362 /* format TOQ_NEW_SAVED_INFOfmt */ 5363 /* nFields */ 13, 5364 /* *fields */ soc_TOQ_NEW_SAVED_INFO_BCM56624_A0fmt_fields, 5365 /* bits */ 68, 5366 /* flags */ 0, 5367 }, 5368 #endif /* chips */ 5369 5370 #if defined(BCM_56685_A0) 5371 { /* SOC_FORMAT_INT_TOQ_NEW_SAVED_INFO_BCM56685_A0fmt */ 5372 /* format TOQ_NEW_SAVED_INFOfmt */ 5373 /* nFields */ 15, 5374 /* *fields */ soc_TOQ_NEW_SAVED_INFO_BCM56634_A0fmt_fields, 5375 /* bits */ 70, 5376 /* flags */ 0, 5377 }, 5378 #endif /* chips */ 5379 5380 #if defined(BCM_56685_B0) 5381 { /* SOC_FORMAT_INT_TOQ_NEW_SAVED_INFO_BCM56685_B0fmt */ 5382 /* format TOQ_NEW_SAVED_INFOfmt */ 5383 /* nFields */ 15, 5384 /* *fields */ soc_TOQ_NEW_SAVED_INFO_BCM56634_A0fmt_fields, 5385 /* bits */ 70, 5386 /* flags */ 0, 5387 }, 5388 #endif /* chips */ 5389 5390 #if defined(BCM_56725_A0) 5391 { /* SOC_FORMAT_INT_TOQ_NEW_SAVED_INFO_BCM56725_A0fmt */ 5392 /* format TOQ_NEW_SAVED_INFOfmt */ 5393 /* nFields */ 10, 5394 /* *fields */ soc_TOQ_NEW_SAVED_INFO_BCM56820_A0fmt_fields, 5395 /* bits */ 41, 5396 /* flags */ 0, 5397 }, 5398 #endif /* chips */ 5399 5400 #if defined(BCM_56820_A0) 5401 { /* SOC_FORMAT_INT_TOQ_NEW_SAVED_INFO_BCM56820_A0fmt */ 5402 /* format TOQ_NEW_SAVED_INFOfmt */ 5403 /* nFields */ 10, 5404 /* *fields */ soc_TOQ_NEW_SAVED_INFO_BCM56820_A0fmt_fields, 5405 /* bits */ 41, 5406 /* flags */ 0, 5407 }, 5408 #endif /* chips */ 5409 5410 #if defined(BCM_88732_A0) 5411 { /* SOC_FORMAT_INT_TOQ_NEW_SAVED_INFO_BCM88732_A0fmt */ 5412 /* format TOQ_NEW_SAVED_INFOfmt */ 5413 /* nFields */ 2, 5414 /* *fields */ soc_TOQ_NEW_SAVED_INFO_BCM88732_A0fmt_fields, 5415 /* bits */ 18, 5416 /* flags */ 0, 5417 }, 5418 #endif /* chips */ 5419 5420 #if defined(BCM_56800_A0) 5421 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ2_INFOfmt */ 5422 /* format TOQ_NEW_TOQ2_INFOfmt */ 5423 /* nFields */ 5, 5424 /* *fields */ soc_TOQ_NEW_TOQ2_INFOfmt_fields, 5425 /* bits */ 15, 5426 /* flags */ 0, 5427 }, 5428 #endif /* chips */ 5429 5430 #if defined(BCM_56334_A0) 5431 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ2_INFO_BCM56334_A0fmt */ 5432 /* format TOQ_NEW_TOQ2_INFOfmt */ 5433 /* nFields */ 5, 5434 /* *fields */ soc_TOQ_NEW_TOQ2_INFO_BCM56820_A0fmt_fields, 5435 /* bits */ 16, 5436 /* flags */ 0, 5437 }, 5438 #endif /* chips */ 5439 5440 #if defined(BCM_56334_B0) 5441 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ2_INFO_BCM56334_B0fmt */ 5442 /* format TOQ_NEW_TOQ2_INFOfmt */ 5443 /* nFields */ 5, 5444 /* *fields */ soc_TOQ_NEW_TOQ2_INFO_BCM56820_A0fmt_fields, 5445 /* bits */ 16, 5446 /* flags */ 0, 5447 }, 5448 #endif /* chips */ 5449 5450 #if defined(BCM_56524_A0) 5451 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ2_INFO_BCM56524_A0fmt */ 5452 /* format TOQ_NEW_TOQ2_INFOfmt */ 5453 /* nFields */ 5, 5454 /* *fields */ soc_TOQ_NEW_TOQ2_INFO_BCM56624_A0fmt_fields, 5455 /* bits */ 17, 5456 /* flags */ 0, 5457 }, 5458 #endif /* chips */ 5459 5460 #if defined(BCM_56524_B0) 5461 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ2_INFO_BCM56524_B0fmt */ 5462 /* format TOQ_NEW_TOQ2_INFOfmt */ 5463 /* nFields */ 5, 5464 /* *fields */ soc_TOQ_NEW_TOQ2_INFO_BCM56624_A0fmt_fields, 5465 /* bits */ 17, 5466 /* flags */ 0, 5467 }, 5468 #endif /* chips */ 5469 5470 #if defined(BCM_56624_A0) 5471 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ2_INFO_BCM56624_A0fmt */ 5472 /* format TOQ_NEW_TOQ2_INFOfmt */ 5473 /* nFields */ 5, 5474 /* *fields */ soc_TOQ_NEW_TOQ2_INFO_BCM56624_A0fmt_fields, 5475 /* bits */ 17, 5476 /* flags */ 0, 5477 }, 5478 #endif /* chips */ 5479 5480 #if defined(BCM_56624_B0) 5481 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ2_INFO_BCM56624_B0fmt */ 5482 /* format TOQ_NEW_TOQ2_INFOfmt */ 5483 /* nFields */ 5, 5484 /* *fields */ soc_TOQ_NEW_TOQ2_INFO_BCM56624_A0fmt_fields, 5485 /* bits */ 17, 5486 /* flags */ 0, 5487 }, 5488 #endif /* chips */ 5489 5490 #if defined(BCM_56634_A0) 5491 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ2_INFO_BCM56634_A0fmt */ 5492 /* format TOQ_NEW_TOQ2_INFOfmt */ 5493 /* nFields */ 5, 5494 /* *fields */ soc_TOQ_NEW_TOQ2_INFO_BCM56624_A0fmt_fields, 5495 /* bits */ 17, 5496 /* flags */ 0, 5497 }, 5498 #endif /* chips */ 5499 5500 #if defined(BCM_56634_B0) 5501 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ2_INFO_BCM56634_B0fmt */ 5502 /* format TOQ_NEW_TOQ2_INFOfmt */ 5503 /* nFields */ 5, 5504 /* *fields */ soc_TOQ_NEW_TOQ2_INFO_BCM56624_A0fmt_fields, 5505 /* bits */ 17, 5506 /* flags */ 0, 5507 }, 5508 #endif /* chips */ 5509 5510 #if defined(BCM_56680_A0) 5511 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ2_INFO_BCM56680_A0fmt */ 5512 /* format TOQ_NEW_TOQ2_INFOfmt */ 5513 /* nFields */ 5, 5514 /* *fields */ soc_TOQ_NEW_TOQ2_INFO_BCM56624_A0fmt_fields, 5515 /* bits */ 17, 5516 /* flags */ 0, 5517 }, 5518 #endif /* chips */ 5519 5520 #if defined(BCM_56680_B0) 5521 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ2_INFO_BCM56680_B0fmt */ 5522 /* format TOQ_NEW_TOQ2_INFOfmt */ 5523 /* nFields */ 5, 5524 /* *fields */ soc_TOQ_NEW_TOQ2_INFO_BCM56624_A0fmt_fields, 5525 /* bits */ 17, 5526 /* flags */ 0, 5527 }, 5528 #endif /* chips */ 5529 5530 #if defined(BCM_56685_A0) 5531 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ2_INFO_BCM56685_A0fmt */ 5532 /* format TOQ_NEW_TOQ2_INFOfmt */ 5533 /* nFields */ 5, 5534 /* *fields */ soc_TOQ_NEW_TOQ2_INFO_BCM56624_A0fmt_fields, 5535 /* bits */ 17, 5536 /* flags */ 0, 5537 }, 5538 #endif /* chips */ 5539 5540 #if defined(BCM_56685_B0) 5541 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ2_INFO_BCM56685_B0fmt */ 5542 /* format TOQ_NEW_TOQ2_INFOfmt */ 5543 /* nFields */ 5, 5544 /* *fields */ soc_TOQ_NEW_TOQ2_INFO_BCM56624_A0fmt_fields, 5545 /* bits */ 17, 5546 /* flags */ 0, 5547 }, 5548 #endif /* chips */ 5549 5550 #if defined(BCM_56725_A0) 5551 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ2_INFO_BCM56725_A0fmt */ 5552 /* format TOQ_NEW_TOQ2_INFOfmt */ 5553 /* nFields */ 5, 5554 /* *fields */ soc_TOQ_NEW_TOQ2_INFO_BCM56820_A0fmt_fields, 5555 /* bits */ 16, 5556 /* flags */ 0, 5557 }, 5558 #endif /* chips */ 5559 5560 #if defined(BCM_56820_A0) 5561 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ2_INFO_BCM56820_A0fmt */ 5562 /* format TOQ_NEW_TOQ2_INFOfmt */ 5563 /* nFields */ 5, 5564 /* *fields */ soc_TOQ_NEW_TOQ2_INFO_BCM56820_A0fmt_fields, 5565 /* bits */ 16, 5566 /* flags */ 0, 5567 }, 5568 #endif /* chips */ 5569 5570 #if defined(BCM_56800_A0) 5571 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ_INFOfmt */ 5572 /* format TOQ_NEW_TOQ_INFOfmt */ 5573 /* nFields */ 18, 5574 /* *fields */ soc_TOQ_NEW_TOQ_INFOfmt_fields, 5575 /* bits */ 64, 5576 /* flags */ 0, 5577 }, 5578 #endif /* chips */ 5579 5580 #if defined(BCM_56334_A0) 5581 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ_INFO_BCM56334_A0fmt */ 5582 /* format TOQ_NEW_TOQ_INFOfmt */ 5583 /* nFields */ 22, 5584 /* *fields */ soc_TOQ_NEW_TOQ_INFO_BCM56334_A0fmt_fields, 5585 /* bits */ 79, 5586 /* flags */ 0, 5587 }, 5588 #endif /* chips */ 5589 5590 #if defined(BCM_56334_B0) 5591 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ_INFO_BCM56334_B0fmt */ 5592 /* format TOQ_NEW_TOQ_INFOfmt */ 5593 /* nFields */ 22, 5594 /* *fields */ soc_TOQ_NEW_TOQ_INFO_BCM56334_A0fmt_fields, 5595 /* bits */ 79, 5596 /* flags */ 0, 5597 }, 5598 #endif /* chips */ 5599 5600 #if defined(BCM_56524_A0) 5601 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ_INFO_BCM56524_A0fmt */ 5602 /* format TOQ_NEW_TOQ_INFOfmt */ 5603 /* nFields */ 24, 5604 /* *fields */ soc_TOQ_NEW_TOQ_INFO_BCM56634_A0fmt_fields, 5605 /* bits */ 85, 5606 /* flags */ 0, 5607 }, 5608 #endif /* chips */ 5609 5610 #if defined(BCM_56524_B0) 5611 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ_INFO_BCM56524_B0fmt */ 5612 /* format TOQ_NEW_TOQ_INFOfmt */ 5613 /* nFields */ 24, 5614 /* *fields */ soc_TOQ_NEW_TOQ_INFO_BCM56634_A0fmt_fields, 5615 /* bits */ 85, 5616 /* flags */ 0, 5617 }, 5618 #endif /* chips */ 5619 5620 #if defined(BCM_56624_A0) 5621 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ_INFO_BCM56624_A0fmt */ 5622 /* format TOQ_NEW_TOQ_INFOfmt */ 5623 /* nFields */ 22, 5624 /* *fields */ soc_TOQ_NEW_TOQ_INFO_BCM56624_A0fmt_fields, 5625 /* bits */ 83, 5626 /* flags */ 0, 5627 }, 5628 #endif /* chips */ 5629 5630 #if defined(BCM_56624_B0) 5631 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ_INFO_BCM56624_B0fmt */ 5632 /* format TOQ_NEW_TOQ_INFOfmt */ 5633 /* nFields */ 22, 5634 /* *fields */ soc_TOQ_NEW_TOQ_INFO_BCM56624_A0fmt_fields, 5635 /* bits */ 83, 5636 /* flags */ 0, 5637 }, 5638 #endif /* chips */ 5639 5640 #if defined(BCM_56634_A0) 5641 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ_INFO_BCM56634_A0fmt */ 5642 /* format TOQ_NEW_TOQ_INFOfmt */ 5643 /* nFields */ 24, 5644 /* *fields */ soc_TOQ_NEW_TOQ_INFO_BCM56634_A0fmt_fields, 5645 /* bits */ 85, 5646 /* flags */ 0, 5647 }, 5648 #endif /* chips */ 5649 5650 #if defined(BCM_56634_B0) 5651 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ_INFO_BCM56634_B0fmt */ 5652 /* format TOQ_NEW_TOQ_INFOfmt */ 5653 /* nFields */ 24, 5654 /* *fields */ soc_TOQ_NEW_TOQ_INFO_BCM56634_A0fmt_fields, 5655 /* bits */ 85, 5656 /* flags */ 0, 5657 }, 5658 #endif /* chips */ 5659 5660 #if defined(BCM_56680_A0) 5661 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ_INFO_BCM56680_A0fmt */ 5662 /* format TOQ_NEW_TOQ_INFOfmt */ 5663 /* nFields */ 22, 5664 /* *fields */ soc_TOQ_NEW_TOQ_INFO_BCM56624_A0fmt_fields, 5665 /* bits */ 83, 5666 /* flags */ 0, 5667 }, 5668 #endif /* chips */ 5669 5670 #if defined(BCM_56680_B0) 5671 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ_INFO_BCM56680_B0fmt */ 5672 /* format TOQ_NEW_TOQ_INFOfmt */ 5673 /* nFields */ 22, 5674 /* *fields */ soc_TOQ_NEW_TOQ_INFO_BCM56624_A0fmt_fields, 5675 /* bits */ 83, 5676 /* flags */ 0, 5677 }, 5678 #endif /* chips */ 5679 5680 #if defined(BCM_56685_A0) 5681 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ_INFO_BCM56685_A0fmt */ 5682 /* format TOQ_NEW_TOQ_INFOfmt */ 5683 /* nFields */ 24, 5684 /* *fields */ soc_TOQ_NEW_TOQ_INFO_BCM56634_A0fmt_fields, 5685 /* bits */ 85, 5686 /* flags */ 0, 5687 }, 5688 #endif /* chips */ 5689 5690 #if defined(BCM_56685_B0) 5691 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ_INFO_BCM56685_B0fmt */ 5692 /* format TOQ_NEW_TOQ_INFOfmt */ 5693 /* nFields */ 24, 5694 /* *fields */ soc_TOQ_NEW_TOQ_INFO_BCM56634_A0fmt_fields, 5695 /* bits */ 85, 5696 /* flags */ 0, 5697 }, 5698 #endif /* chips */ 5699 5700 #if defined(BCM_56725_A0) 5701 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ_INFO_BCM56725_A0fmt */ 5702 /* format TOQ_NEW_TOQ_INFOfmt */ 5703 /* nFields */ 22, 5704 /* *fields */ soc_TOQ_NEW_TOQ_INFO_BCM56820_A0fmt_fields, 5705 /* bits */ 70, 5706 /* flags */ 0, 5707 }, 5708 #endif /* chips */ 5709 5710 #if defined(BCM_56820_A0) 5711 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ_INFO_BCM56820_A0fmt */ 5712 /* format TOQ_NEW_TOQ_INFOfmt */ 5713 /* nFields */ 22, 5714 /* *fields */ soc_TOQ_NEW_TOQ_INFO_BCM56820_A0fmt_fields, 5715 /* bits */ 70, 5716 /* flags */ 0, 5717 }, 5718 #endif /* chips */ 5719 5720 #if defined(BCM_88732_A0) 5721 { /* SOC_FORMAT_INT_TOQ_NEW_TOQ_INFO_BCM88732_A0fmt */ 5722 /* format TOQ_NEW_TOQ_INFOfmt */ 5723 /* nFields */ 2, 5724 /* *fields */ soc_TOQ_NEW_TOQ_INFO_BCM88732_A0fmt_fields, 5725 /* bits */ 18, 5726 /* flags */ 0, 5727 }, 5728 #endif /* chips */ 5729 5730 #if defined(BCM_56800_A0) 5731 { /* SOC_FORMAT_INT_TOQ_PKTHDR1_INFOfmt */ 5732 /* format TOQ_PKTHDR1_INFOfmt */ 5733 /* nFields */ 6, 5734 /* *fields */ soc_TOQ_PKTHDR1_INFOfmt_fields, 5735 /* bits */ 47, 5736 /* flags */ 0, 5737 }, 5738 #endif /* chips */ 5739 5740 #if defined(BCM_56334_A0) 5741 { /* SOC_FORMAT_INT_TOQ_PKTHDR1_INFO_BCM56334_A0fmt */ 5742 /* format TOQ_PKTHDR1_INFOfmt */ 5743 /* nFields */ 9, 5744 /* *fields */ soc_TOQ_PKTHDR1_INFO_BCM56334_A0fmt_fields, 5745 /* bits */ 112, 5746 /* flags */ 0, 5747 }, 5748 #endif /* chips */ 5749 5750 #if defined(BCM_56334_B0) 5751 { /* SOC_FORMAT_INT_TOQ_PKTHDR1_INFO_BCM56334_B0fmt */ 5752 /* format TOQ_PKTHDR1_INFOfmt */ 5753 /* nFields */ 9, 5754 /* *fields */ soc_TOQ_PKTHDR1_INFO_BCM56334_A0fmt_fields, 5755 /* bits */ 112, 5756 /* flags */ 0, 5757 }, 5758 #endif /* chips */ 5759 5760 #if defined(BCM_56524_A0) 5761 { /* SOC_FORMAT_INT_TOQ_PKTHDR1_INFO_BCM56524_A0fmt */ 5762 /* format TOQ_PKTHDR1_INFOfmt */ 5763 /* nFields */ 10, 5764 /* *fields */ soc_TOQ_PKTHDR1_INFO_BCM56634_A0fmt_fields, 5765 /* bits */ 162, 5766 /* flags */ 0, 5767 }, 5768 #endif /* chips */ 5769 5770 #if defined(BCM_56524_B0) 5771 { /* SOC_FORMAT_INT_TOQ_PKTHDR1_INFO_BCM56524_B0fmt */ 5772 /* format TOQ_PKTHDR1_INFOfmt */ 5773 /* nFields */ 10, 5774 /* *fields */ soc_TOQ_PKTHDR1_INFO_BCM56634_A0fmt_fields, 5775 /* bits */ 162, 5776 /* flags */ 0, 5777 }, 5778 #endif /* chips */ 5779 5780 #if defined(BCM_56624_A0) 5781 { /* SOC_FORMAT_INT_TOQ_PKTHDR1_INFO_BCM56624_A0fmt */ 5782 /* format TOQ_PKTHDR1_INFOfmt */ 5783 /* nFields */ 8, 5784 /* *fields */ soc_TOQ_PKTHDR1_INFO_BCM56624_A0fmt_fields, 5785 /* bits */ 159, 5786 /* flags */ 0, 5787 }, 5788 #endif /* chips */ 5789 5790 #if defined(BCM_56624_B0) 5791 { /* SOC_FORMAT_INT_TOQ_PKTHDR1_INFO_BCM56624_B0fmt */ 5792 /* format TOQ_PKTHDR1_INFOfmt */ 5793 /* nFields */ 8, 5794 /* *fields */ soc_TOQ_PKTHDR1_INFO_BCM56624_A0fmt_fields, 5795 /* bits */ 159, 5796 /* flags */ 0, 5797 }, 5798 #endif /* chips */ 5799 5800 #if defined(BCM_56634_A0) 5801 { /* SOC_FORMAT_INT_TOQ_PKTHDR1_INFO_BCM56634_A0fmt */ 5802 /* format TOQ_PKTHDR1_INFOfmt */ 5803 /* nFields */ 10, 5804 /* *fields */ soc_TOQ_PKTHDR1_INFO_BCM56634_A0fmt_fields, 5805 /* bits */ 162, 5806 /* flags */ 0, 5807 }, 5808 #endif /* chips */ 5809 5810 #if defined(BCM_56634_B0) 5811 { /* SOC_FORMAT_INT_TOQ_PKTHDR1_INFO_BCM56634_B0fmt */ 5812 /* format TOQ_PKTHDR1_INFOfmt */ 5813 /* nFields */ 10, 5814 /* *fields */ soc_TOQ_PKTHDR1_INFO_BCM56634_A0fmt_fields, 5815 /* bits */ 162, 5816 /* flags */ 0, 5817 }, 5818 #endif /* chips */ 5819 5820 #if defined(BCM_56680_A0) 5821 { /* SOC_FORMAT_INT_TOQ_PKTHDR1_INFO_BCM56680_A0fmt */ 5822 /* format TOQ_PKTHDR1_INFOfmt */ 5823 /* nFields */ 8, 5824 /* *fields */ soc_TOQ_PKTHDR1_INFO_BCM56624_A0fmt_fields, 5825 /* bits */ 159, 5826 /* flags */ 0, 5827 }, 5828 #endif /* chips */ 5829 5830 #if defined(BCM_56680_B0) 5831 { /* SOC_FORMAT_INT_TOQ_PKTHDR1_INFO_BCM56680_B0fmt */ 5832 /* format TOQ_PKTHDR1_INFOfmt */ 5833 /* nFields */ 8, 5834 /* *fields */ soc_TOQ_PKTHDR1_INFO_BCM56624_A0fmt_fields, 5835 /* bits */ 159, 5836 /* flags */ 0, 5837 }, 5838 #endif /* chips */ 5839 5840 #if defined(BCM_56685_A0) 5841 { /* SOC_FORMAT_INT_TOQ_PKTHDR1_INFO_BCM56685_A0fmt */ 5842 /* format TOQ_PKTHDR1_INFOfmt */ 5843 /* nFields */ 10, 5844 /* *fields */ soc_TOQ_PKTHDR1_INFO_BCM56634_A0fmt_fields, 5845 /* bits */ 162, 5846 /* flags */ 0, 5847 }, 5848 #endif /* chips */ 5849 5850 #if defined(BCM_56685_B0) 5851 { /* SOC_FORMAT_INT_TOQ_PKTHDR1_INFO_BCM56685_B0fmt */ 5852 /* format TOQ_PKTHDR1_INFOfmt */ 5853 /* nFields */ 10, 5854 /* *fields */ soc_TOQ_PKTHDR1_INFO_BCM56634_A0fmt_fields, 5855 /* bits */ 162, 5856 /* flags */ 0, 5857 }, 5858 #endif /* chips */ 5859 5860 #if defined(BCM_56725_A0) 5861 { /* SOC_FORMAT_INT_TOQ_PKTHDR1_INFO_BCM56725_A0fmt */ 5862 /* format TOQ_PKTHDR1_INFOfmt */ 5863 /* nFields */ 8, 5864 /* *fields */ soc_TOQ_PKTHDR1_INFO_BCM56820_A0fmt_fields, 5865 /* bits */ 68, 5866 /* flags */ 0, 5867 }, 5868 #endif /* chips */ 5869 5870 #if defined(BCM_56820_A0) 5871 { /* SOC_FORMAT_INT_TOQ_PKTHDR1_INFO_BCM56820_A0fmt */ 5872 /* format TOQ_PKTHDR1_INFOfmt */ 5873 /* nFields */ 8, 5874 /* *fields */ soc_TOQ_PKTHDR1_INFO_BCM56820_A0fmt_fields, 5875 /* bits */ 68, 5876 /* flags */ 0, 5877 }, 5878 #endif /* chips */ 5879 5880 #if defined(BCM_56800_A0) 5881 { /* SOC_FORMAT_INT_TOQ_PORT_COSQ_INFOfmt */ 5882 /* format TOQ_PORT_COSQ_INFOfmt */ 5883 /* nFields */ 13, 5884 /* *fields */ soc_TOQ_PORT_COSQ_INFOfmt_fields, 5885 /* bits */ 849, 5886 /* flags */ 0, 5887 }, 5888 #endif /* chips */ 5889 5890 #if defined(BCM_56725_A0) 5891 { /* SOC_FORMAT_INT_TOQ_PORT_COSQ_INFO_BCM56725_A0fmt */ 5892 /* format TOQ_PORT_COSQ_INFOfmt */ 5893 /* nFields */ 12, 5894 /* *fields */ soc_TOQ_PORT_COSQ_INFO_BCM56820_A0fmt_fields, 5895 /* bits */ 969, 5896 /* flags */ 0, 5897 }, 5898 #endif /* chips */ 5899 5900 #if defined(BCM_56820_A0) 5901 { /* SOC_FORMAT_INT_TOQ_PORT_COSQ_INFO_BCM56820_A0fmt */ 5902 /* format TOQ_PORT_COSQ_INFOfmt */ 5903 /* nFields */ 12, 5904 /* *fields */ soc_TOQ_PORT_COSQ_INFO_BCM56820_A0fmt_fields, 5905 /* bits */ 969, 5906 /* flags */ 0, 5907 }, 5908 #endif /* chips */ 5909 5910 #if defined(BCM_88732_A0) 5911 { /* SOC_FORMAT_INT_TOQ_PORT_COSQ_INFO_BCM88732_A0fmt */ 5912 /* format TOQ_PORT_COSQ_INFOfmt */ 5913 /* nFields */ 12, 5914 /* *fields */ soc_TOQ_PORT_COSQ_INFO_BCM88732_A0fmt_fields, 5915 /* bits */ 455, 5916 /* flags */ 0, 5917 }, 5918 #endif /* chips */ 5919 5920 #if defined(BCM_56725_A0) || defined(BCM_56820_A0) 5921 { /* SOC_FORMAT_INT_TOQ_PORT_COSQ_PKT_RD_PTRfmt */ 5922 /* format TOQ_PORT_COSQ_PKT_RD_PTRfmt */ 5923 /* nFields */ 10, 5924 /* *fields */ soc_TOQ_PORT_COSQ_PKT_RD_PTRfmt_fields, 5925 /* bits */ 826, 5926 /* flags */ 0, 5927 }, 5928 #endif /* chips */ 5929 5930 #if defined(BCM_88732_A0) 5931 { /* SOC_FORMAT_INT_TOQ_PORT_COSQ_PKT_RD_PTR_BCM88732_A0fmt */ 5932 /* format TOQ_PORT_COSQ_PKT_RD_PTRfmt */ 5933 /* nFields */ 10, 5934 /* *fields */ soc_TOQ_PORT_COSQ_PKT_RD_PTR_BCM88732_A0fmt_fields, 5935 /* bits */ 397, 5936 /* flags */ 0, 5937 }, 5938 #endif /* chips */ 5939 5940 #if defined(BCM_56800_A0) 5941 { /* SOC_FORMAT_INT_TOQ_PORT_COSQ_STATEfmt */ 5942 /* format TOQ_PORT_COSQ_STATEfmt */ 5943 /* nFields */ 10, 5944 /* *fields */ soc_TOQ_PORT_COSQ_STATEfmt_fields, 5945 /* bits */ 704, 5946 /* flags */ 0, 5947 }, 5948 #endif /* chips */ 5949 5950 #if defined(BCM_56725_A0) 5951 { /* SOC_FORMAT_INT_TOQ_PORT_COSQ_STATE_BCM56725_A0fmt */ 5952 /* format TOQ_PORT_COSQ_STATEfmt */ 5953 /* nFields */ 10, 5954 /* *fields */ soc_TOQ_PORT_COSQ_STATE_BCM56820_A0fmt_fields, 5955 /* bits */ 812, 5956 /* flags */ 0, 5957 }, 5958 #endif /* chips */ 5959 5960 #if defined(BCM_56820_A0) 5961 { /* SOC_FORMAT_INT_TOQ_PORT_COSQ_STATE_BCM56820_A0fmt */ 5962 /* format TOQ_PORT_COSQ_STATEfmt */ 5963 /* nFields */ 10, 5964 /* *fields */ soc_TOQ_PORT_COSQ_STATE_BCM56820_A0fmt_fields, 5965 /* bits */ 812, 5966 /* flags */ 0, 5967 }, 5968 #endif /* chips */ 5969 5970 #if defined(BCM_88732_A0) 5971 { /* SOC_FORMAT_INT_TOQ_PORT_COSQ_STATE_BCM88732_A0fmt */ 5972 /* format TOQ_PORT_COSQ_STATEfmt */ 5973 /* nFields */ 10, 5974 /* *fields */ soc_TOQ_PORT_COSQ_STATE_BCM88732_A0fmt_fields, 5975 /* bits */ 380, 5976 /* flags */ 0, 5977 }, 5978 #endif /* chips */ 5979 5980 #if defined(BCM_56624_A0) || defined(BCM_56680_A0) || \ 5981 defined(BCM_56680_B0) 5982 { /* SOC_FORMAT_INT_TOQ_PORT_SEL_COSQ_INFOfmt */ 5983 /* format TOQ_PORT_SEL_COSQ_INFOfmt */ 5984 /* nFields */ 3, 5985 /* *fields */ soc_TOQ_PORT_SEL_COSQ_INFOfmt_fields, 5986 /* bits */ 172, 5987 /* flags */ 0, 5988 }, 5989 #endif /* chips */ 5990 5991 #if defined(BCM_56334_A0) 5992 { /* SOC_FORMAT_INT_TOQ_PORT_SEL_COSQ_INFO_BCM56334_A0fmt */ 5993 /* format TOQ_PORT_SEL_COSQ_INFOfmt */ 5994 /* nFields */ 3, 5995 /* *fields */ soc_TOQ_PORT_SEL_COSQ_INFO_BCM56334_A0fmt_fields, 5996 /* bits */ 163, 5997 /* flags */ 0, 5998 }, 5999 #endif /* chips */ 6000 6001 #if defined(BCM_56334_B0) 6002 { /* SOC_FORMAT_INT_TOQ_PORT_SEL_COSQ_INFO_BCM56334_B0fmt */ 6003 /* format TOQ_PORT_SEL_COSQ_INFOfmt */ 6004 /* nFields */ 3, 6005 /* *fields */ soc_TOQ_PORT_SEL_COSQ_INFO_BCM56334_A0fmt_fields, 6006 /* bits */ 163, 6007 /* flags */ 0, 6008 }, 6009 #endif /* chips */ 6010 6011 #if defined(BCM_56524_A0) 6012 { /* SOC_FORMAT_INT_TOQ_PORT_SEL_COSQ_INFO_BCM56524_A0fmt */ 6013 /* format TOQ_PORT_SEL_COSQ_INFOfmt */ 6014 /* nFields */ 3, 6015 /* *fields */ soc_TOQ_PORT_SEL_COSQ_INFO_BCM56634_A0fmt_fields, 6016 /* bits */ 176, 6017 /* flags */ 0, 6018 }, 6019 #endif /* chips */ 6020 6021 #if defined(BCM_56524_B0) 6022 { /* SOC_FORMAT_INT_TOQ_PORT_SEL_COSQ_INFO_BCM56524_B0fmt */ 6023 /* format TOQ_PORT_SEL_COSQ_INFOfmt */ 6024 /* nFields */ 3, 6025 /* *fields */ soc_TOQ_PORT_SEL_COSQ_INFO_BCM56634_A0fmt_fields, 6026 /* bits */ 176, 6027 /* flags */ 0, 6028 }, 6029 #endif /* chips */ 6030 6031 #if defined(BCM_56624_B0) 6032 { /* SOC_FORMAT_INT_TOQ_PORT_SEL_COSQ_INFO_BCM56624_B0fmt */ 6033 /* format TOQ_PORT_SEL_COSQ_INFOfmt */ 6034 /* nFields */ 3, 6035 /* *fields */ soc_TOQ_PORT_SEL_COSQ_INFOfmt_fields, 6036 /* bits */ 172, 6037 /* flags */ 0, 6038 }, 6039 #endif /* chips */ 6040 6041 #if defined(BCM_56634_A0) 6042 { /* SOC_FORMAT_INT_TOQ_PORT_SEL_COSQ_INFO_BCM56634_A0fmt */ 6043 /* format TOQ_PORT_SEL_COSQ_INFOfmt */ 6044 /* nFields */ 3, 6045 /* *fields */ soc_TOQ_PORT_SEL_COSQ_INFO_BCM56634_A0fmt_fields, 6046 /* bits */ 176, 6047 /* flags */ 0, 6048 }, 6049 #endif /* chips */ 6050 6051 #if defined(BCM_56634_B0) 6052 { /* SOC_FORMAT_INT_TOQ_PORT_SEL_COSQ_INFO_BCM56634_B0fmt */ 6053 /* format TOQ_PORT_SEL_COSQ_INFOfmt */ 6054 /* nFields */ 3, 6055 /* *fields */ soc_TOQ_PORT_SEL_COSQ_INFO_BCM56634_A0fmt_fields, 6056 /* bits */ 176, 6057 /* flags */ 0, 6058 }, 6059 #endif /* chips */ 6060 6061 #if defined(BCM_56685_A0) 6062 { /* SOC_FORMAT_INT_TOQ_PORT_SEL_COSQ_INFO_BCM56685_A0fmt */ 6063 /* format TOQ_PORT_SEL_COSQ_INFOfmt */ 6064 /* nFields */ 3, 6065 /* *fields */ soc_TOQ_PORT_SEL_COSQ_INFO_BCM56634_A0fmt_fields, 6066 /* bits */ 176, 6067 /* flags */ 0, 6068 }, 6069 #endif /* chips */ 6070 6071 #if defined(BCM_56685_B0) 6072 { /* SOC_FORMAT_INT_TOQ_PORT_SEL_COSQ_INFO_BCM56685_B0fmt */ 6073 /* format TOQ_PORT_SEL_COSQ_INFOfmt */ 6074 /* nFields */ 3, 6075 /* *fields */ soc_TOQ_PORT_SEL_COSQ_INFO_BCM56634_A0fmt_fields, 6076 /* bits */ 176, 6077 /* flags */ 0, 6078 }, 6079 #endif /* chips */ 6080 6081 #if defined(BCM_56440_A0) 6082 { /* SOC_FORMAT_INT_TOQ_PSTAGE0_INFOfmt */ 6083 /* format TOQ_PSTAGE0_INFOfmt */ 6084 /* nFields */ 18, 6085 /* *fields */ soc_TOQ_PSTAGE0_INFOfmt_fields, 6086 /* bits */ 61, 6087 /* flags */ 0, 6088 }, 6089 #endif /* chips */ 6090 6091 #if defined(BCM_56260_A0) 6092 { /* SOC_FORMAT_INT_TOQ_PSTAGE0_INFO_BCM56260_A0fmt */ 6093 /* format TOQ_PSTAGE0_INFOfmt */ 6094 /* nFields */ 32, 6095 /* *fields */ soc_TOQ_PSTAGE0_INFO_BCM56260_A0fmt_fields, 6096 /* bits */ 77, 6097 /* flags */ 0, 6098 }, 6099 #endif /* chips */ 6100 6101 #if defined(BCM_56260_B0) 6102 { /* SOC_FORMAT_INT_TOQ_PSTAGE0_INFO_BCM56260_B0fmt */ 6103 /* format TOQ_PSTAGE0_INFOfmt */ 6104 /* nFields */ 32, 6105 /* *fields */ soc_TOQ_PSTAGE0_INFO_BCM56260_A0fmt_fields, 6106 /* bits */ 77, 6107 /* flags */ 0, 6108 }, 6109 #endif /* chips */ 6110 6111 #if defined(BCM_56270_A0) 6112 { /* SOC_FORMAT_INT_TOQ_PSTAGE0_INFO_BCM56270_A0fmt */ 6113 /* format TOQ_PSTAGE0_INFOfmt */ 6114 /* nFields */ 26, 6115 /* *fields */ soc_TOQ_PSTAGE0_INFO_BCM56270_A0fmt_fields, 6116 /* bits */ 65, 6117 /* flags */ 0, 6118 }, 6119 #endif /* chips */ 6120 6121 #if defined(BCM_56440_B0) 6122 { /* SOC_FORMAT_INT_TOQ_PSTAGE0_INFO_BCM56440_B0fmt */ 6123 /* format TOQ_PSTAGE0_INFOfmt */ 6124 /* nFields */ 18, 6125 /* *fields */ soc_TOQ_PSTAGE0_INFOfmt_fields, 6126 /* bits */ 61, 6127 /* flags */ 0, 6128 }, 6129 #endif /* chips */ 6130 6131 #if defined(BCM_56450_A0) 6132 { /* SOC_FORMAT_INT_TOQ_PSTAGE0_INFO_BCM56450_A0fmt */ 6133 /* format TOQ_PSTAGE0_INFOfmt */ 6134 /* nFields */ 32, 6135 /* *fields */ soc_TOQ_PSTAGE0_INFO_BCM56450_A0fmt_fields, 6136 /* bits */ 82, 6137 /* flags */ 0, 6138 }, 6139 #endif /* chips */ 6140 6141 #if defined(BCM_56450_B0) 6142 { /* SOC_FORMAT_INT_TOQ_PSTAGE0_INFO_BCM56450_B0fmt */ 6143 /* format TOQ_PSTAGE0_INFOfmt */ 6144 /* nFields */ 32, 6145 /* *fields */ soc_TOQ_PSTAGE0_INFO_BCM56450_A0fmt_fields, 6146 /* bits */ 82, 6147 /* flags */ 0, 6148 }, 6149 #endif /* chips */ 6150 6151 #if defined(BCM_56450_B1) 6152 { /* SOC_FORMAT_INT_TOQ_PSTAGE0_INFO_BCM56450_B1fmt */ 6153 /* format TOQ_PSTAGE0_INFOfmt */ 6154 /* nFields */ 32, 6155 /* *fields */ soc_TOQ_PSTAGE0_INFO_BCM56450_A0fmt_fields, 6156 /* bits */ 82, 6157 /* flags */ 0, 6158 }, 6159 #endif /* chips */ 6160 6161 #if defined(BCM_56440_A0) 6162 { /* SOC_FORMAT_INT_TOQ_PSTAGE1_DEQ_INFOfmt */ 6163 /* format TOQ_PSTAGE1_DEQ_INFOfmt */ 6164 /* nFields */ 8, 6165 /* *fields */ soc_TOQ_PSTAGE1_DEQ_INFOfmt_fields, 6166 /* bits */ 100, 6167 /* flags */ 0, 6168 }, 6169 #endif /* chips */ 6170 6171 #if defined(BCM_56260_A0) 6172 { /* SOC_FORMAT_INT_TOQ_PSTAGE1_DEQ_INFO_BCM56260_A0fmt */ 6173 /* format TOQ_PSTAGE1_DEQ_INFOfmt */ 6174 /* nFields */ 10, 6175 /* *fields */ soc_TOQ_PSTAGE1_DEQ_INFO_BCM56260_A0fmt_fields, 6176 /* bits */ 92, 6177 /* flags */ 0, 6178 }, 6179 #endif /* chips */ 6180 6181 #if defined(BCM_56260_B0) 6182 { /* SOC_FORMAT_INT_TOQ_PSTAGE1_DEQ_INFO_BCM56260_B0fmt */ 6183 /* format TOQ_PSTAGE1_DEQ_INFOfmt */ 6184 /* nFields */ 10, 6185 /* *fields */ soc_TOQ_PSTAGE1_DEQ_INFO_BCM56260_A0fmt_fields, 6186 /* bits */ 92, 6187 /* flags */ 0, 6188 }, 6189 #endif /* chips */ 6190 6191 #if defined(BCM_56270_A0) 6192 { /* SOC_FORMAT_INT_TOQ_PSTAGE1_DEQ_INFO_BCM56270_A0fmt */ 6193 /* format TOQ_PSTAGE1_DEQ_INFOfmt */ 6194 /* nFields */ 9, 6195 /* *fields */ soc_TOQ_PSTAGE1_DEQ_INFO_BCM56270_A0fmt_fields, 6196 /* bits */ 82, 6197 /* flags */ 0, 6198 }, 6199 #endif /* chips */ 6200 6201 #if defined(BCM_56440_B0) 6202 { /* SOC_FORMAT_INT_TOQ_PSTAGE1_DEQ_INFO_BCM56440_B0fmt */ 6203 /* format TOQ_PSTAGE1_DEQ_INFOfmt */ 6204 /* nFields */ 8, 6205 /* *fields */ soc_TOQ_PSTAGE1_DEQ_INFOfmt_fields, 6206 /* bits */ 100, 6207 /* flags */ 0, 6208 }, 6209 #endif /* chips */ 6210 6211 #if defined(BCM_56450_A0) 6212 { /* SOC_FORMAT_INT_TOQ_PSTAGE1_DEQ_INFO_BCM56450_A0fmt */ 6213 /* format TOQ_PSTAGE1_DEQ_INFOfmt */ 6214 /* nFields */ 9, 6215 /* *fields */ soc_TOQ_PSTAGE1_DEQ_INFO_BCM56450_A0fmt_fields, 6216 /* bits */ 104, 6217 /* flags */ 0, 6218 }, 6219 #endif /* chips */ 6220 6221 #if defined(BCM_56450_B0) 6222 { /* SOC_FORMAT_INT_TOQ_PSTAGE1_DEQ_INFO_BCM56450_B0fmt */ 6223 /* format TOQ_PSTAGE1_DEQ_INFOfmt */ 6224 /* nFields */ 9, 6225 /* *fields */ soc_TOQ_PSTAGE1_DEQ_INFO_BCM56450_A0fmt_fields, 6226 /* bits */ 104, 6227 /* flags */ 0, 6228 }, 6229 #endif /* chips */ 6230 6231 #if defined(BCM_56450_B1) 6232 { /* SOC_FORMAT_INT_TOQ_PSTAGE1_DEQ_INFO_BCM56450_B1fmt */ 6233 /* format TOQ_PSTAGE1_DEQ_INFOfmt */ 6234 /* nFields */ 9, 6235 /* *fields */ soc_TOQ_PSTAGE1_DEQ_INFO_BCM56450_A0fmt_fields, 6236 /* bits */ 104, 6237 /* flags */ 0, 6238 }, 6239 #endif /* chips */ 6240 6241 #if defined(BCM_56440_A0) 6242 { /* SOC_FORMAT_INT_TOQ_PSTAGE1_ENQ_INFOfmt */ 6243 /* format TOQ_PSTAGE1_ENQ_INFOfmt */ 6244 /* nFields */ 7, 6245 /* *fields */ soc_TOQ_PSTAGE1_ENQ_INFOfmt_fields, 6246 /* bits */ 100, 6247 /* flags */ 0, 6248 }, 6249 #endif /* chips */ 6250 6251 #if defined(BCM_56260_A0) 6252 { /* SOC_FORMAT_INT_TOQ_PSTAGE1_ENQ_INFO_BCM56260_A0fmt */ 6253 /* format TOQ_PSTAGE1_ENQ_INFOfmt */ 6254 /* nFields */ 25, 6255 /* *fields */ soc_TOQ_PSTAGE1_ENQ_INFO_BCM56260_A0fmt_fields, 6256 /* bits */ 92, 6257 /* flags */ 0, 6258 }, 6259 #endif /* chips */ 6260 6261 #if defined(BCM_56260_B0) 6262 { /* SOC_FORMAT_INT_TOQ_PSTAGE1_ENQ_INFO_BCM56260_B0fmt */ 6263 /* format TOQ_PSTAGE1_ENQ_INFOfmt */ 6264 /* nFields */ 25, 6265 /* *fields */ soc_TOQ_PSTAGE1_ENQ_INFO_BCM56260_A0fmt_fields, 6266 /* bits */ 92, 6267 /* flags */ 0, 6268 }, 6269 #endif /* chips */ 6270 6271 #if defined(BCM_56270_A0) 6272 { /* SOC_FORMAT_INT_TOQ_PSTAGE1_ENQ_INFO_BCM56270_A0fmt */ 6273 /* format TOQ_PSTAGE1_ENQ_INFOfmt */ 6274 /* nFields */ 17, 6275 /* *fields */ soc_TOQ_PSTAGE1_ENQ_INFO_BCM56270_A0fmt_fields, 6276 /* bits */ 82, 6277 /* flags */ 0, 6278 }, 6279 #endif /* chips */ 6280 6281 #if defined(BCM_56440_B0) 6282 { /* SOC_FORMAT_INT_TOQ_PSTAGE1_ENQ_INFO_BCM56440_B0fmt */ 6283 /* format TOQ_PSTAGE1_ENQ_INFOfmt */ 6284 /* nFields */ 7, 6285 /* *fields */ soc_TOQ_PSTAGE1_ENQ_INFOfmt_fields, 6286 /* bits */ 100, 6287 /* flags */ 0, 6288 }, 6289 #endif /* chips */ 6290 6291 #if defined(BCM_56450_A0) 6292 { /* SOC_FORMAT_INT_TOQ_PSTAGE1_ENQ_INFO_BCM56450_A0fmt */ 6293 /* format TOQ_PSTAGE1_ENQ_INFOfmt */ 6294 /* nFields */ 26, 6295 /* *fields */ soc_TOQ_PSTAGE1_ENQ_INFO_BCM56450_A0fmt_fields, 6296 /* bits */ 104, 6297 /* flags */ 0, 6298 }, 6299 #endif /* chips */ 6300 6301 #if defined(BCM_56450_B0) 6302 { /* SOC_FORMAT_INT_TOQ_PSTAGE1_ENQ_INFO_BCM56450_B0fmt */ 6303 /* format TOQ_PSTAGE1_ENQ_INFOfmt */ 6304 /* nFields */ 26, 6305 /* *fields */ soc_TOQ_PSTAGE1_ENQ_INFO_BCM56450_A0fmt_fields, 6306 /* bits */ 104, 6307 /* flags */ 0, 6308 }, 6309 #endif /* chips */ 6310 6311 #if defined(BCM_56450_B1) 6312 { /* SOC_FORMAT_INT_TOQ_PSTAGE1_ENQ_INFO_BCM56450_B1fmt */ 6313 /* format TOQ_PSTAGE1_ENQ_INFOfmt */ 6314 /* nFields */ 26, 6315 /* *fields */ soc_TOQ_PSTAGE1_ENQ_INFO_BCM56450_A0fmt_fields, 6316 /* bits */ 104, 6317 /* flags */ 0, 6318 }, 6319 #endif /* chips */ 6320 6321 #if defined(BCM_56800_A0) 6322 { /* SOC_FORMAT_INT_TOQ_PURGE_Q_INFOfmt */ 6323 /* format TOQ_PURGE_Q_INFOfmt */ 6324 /* nFields */ 14, 6325 /* *fields */ soc_TOQ_PURGE_Q_INFOfmt_fields, 6326 /* bits */ 76, 6327 /* flags */ 0, 6328 }, 6329 #endif /* chips */ 6330 6331 #if defined(BCM_56334_A0) 6332 { /* SOC_FORMAT_INT_TOQ_PURGE_Q_INFO_BCM56334_A0fmt */ 6333 /* format TOQ_PURGE_Q_INFOfmt */ 6334 /* nFields */ 12, 6335 /* *fields */ soc_TOQ_PURGE_Q_INFO_BCM56334_A0fmt_fields, 6336 /* bits */ 86, 6337 /* flags */ 0, 6338 }, 6339 #endif /* chips */ 6340 6341 #if defined(BCM_56334_B0) 6342 { /* SOC_FORMAT_INT_TOQ_PURGE_Q_INFO_BCM56334_B0fmt */ 6343 /* format TOQ_PURGE_Q_INFOfmt */ 6344 /* nFields */ 12, 6345 /* *fields */ soc_TOQ_PURGE_Q_INFO_BCM56334_A0fmt_fields, 6346 /* bits */ 86, 6347 /* flags */ 0, 6348 }, 6349 #endif /* chips */ 6350 6351 #if defined(BCM_56524_A0) 6352 { /* SOC_FORMAT_INT_TOQ_PURGE_Q_INFO_BCM56524_A0fmt */ 6353 /* format TOQ_PURGE_Q_INFOfmt */ 6354 /* nFields */ 12, 6355 /* *fields */ soc_TOQ_PURGE_Q_INFO_BCM56624_A0fmt_fields, 6356 /* bits */ 91, 6357 /* flags */ 0, 6358 }, 6359 #endif /* chips */ 6360 6361 #if defined(BCM_56524_B0) 6362 { /* SOC_FORMAT_INT_TOQ_PURGE_Q_INFO_BCM56524_B0fmt */ 6363 /* format TOQ_PURGE_Q_INFOfmt */ 6364 /* nFields */ 12, 6365 /* *fields */ soc_TOQ_PURGE_Q_INFO_BCM56624_A0fmt_fields, 6366 /* bits */ 91, 6367 /* flags */ 0, 6368 }, 6369 #endif /* chips */ 6370 6371 #if defined(BCM_56624_A0) 6372 { /* SOC_FORMAT_INT_TOQ_PURGE_Q_INFO_BCM56624_A0fmt */ 6373 /* format TOQ_PURGE_Q_INFOfmt */ 6374 /* nFields */ 12, 6375 /* *fields */ soc_TOQ_PURGE_Q_INFO_BCM56624_A0fmt_fields, 6376 /* bits */ 91, 6377 /* flags */ 0, 6378 }, 6379 #endif /* chips */ 6380 6381 #if defined(BCM_56624_B0) 6382 { /* SOC_FORMAT_INT_TOQ_PURGE_Q_INFO_BCM56624_B0fmt */ 6383 /* format TOQ_PURGE_Q_INFOfmt */ 6384 /* nFields */ 12, 6385 /* *fields */ soc_TOQ_PURGE_Q_INFO_BCM56624_A0fmt_fields, 6386 /* bits */ 91, 6387 /* flags */ 0, 6388 }, 6389 #endif /* chips */ 6390 6391 #if defined(BCM_56634_A0) 6392 { /* SOC_FORMAT_INT_TOQ_PURGE_Q_INFO_BCM56634_A0fmt */ 6393 /* format TOQ_PURGE_Q_INFOfmt */ 6394 /* nFields */ 12, 6395 /* *fields */ soc_TOQ_PURGE_Q_INFO_BCM56624_A0fmt_fields, 6396 /* bits */ 91, 6397 /* flags */ 0, 6398 }, 6399 #endif /* chips */ 6400 6401 #if defined(BCM_56634_B0) 6402 { /* SOC_FORMAT_INT_TOQ_PURGE_Q_INFO_BCM56634_B0fmt */ 6403 /* format TOQ_PURGE_Q_INFOfmt */ 6404 /* nFields */ 12, 6405 /* *fields */ soc_TOQ_PURGE_Q_INFO_BCM56624_A0fmt_fields, 6406 /* bits */ 91, 6407 /* flags */ 0, 6408 }, 6409 #endif /* chips */ 6410 6411 #if defined(BCM_56680_A0) 6412 { /* SOC_FORMAT_INT_TOQ_PURGE_Q_INFO_BCM56680_A0fmt */ 6413 /* format TOQ_PURGE_Q_INFOfmt */ 6414 /* nFields */ 12, 6415 /* *fields */ soc_TOQ_PURGE_Q_INFO_BCM56624_A0fmt_fields, 6416 /* bits */ 91, 6417 /* flags */ 0, 6418 }, 6419 #endif /* chips */ 6420 6421 #if defined(BCM_56680_B0) 6422 { /* SOC_FORMAT_INT_TOQ_PURGE_Q_INFO_BCM56680_B0fmt */ 6423 /* format TOQ_PURGE_Q_INFOfmt */ 6424 /* nFields */ 12, 6425 /* *fields */ soc_TOQ_PURGE_Q_INFO_BCM56624_A0fmt_fields, 6426 /* bits */ 91, 6427 /* flags */ 0, 6428 }, 6429 #endif /* chips */ 6430 6431 #if defined(BCM_56685_A0) 6432 { /* SOC_FORMAT_INT_TOQ_PURGE_Q_INFO_BCM56685_A0fmt */ 6433 /* format TOQ_PURGE_Q_INFOfmt */ 6434 /* nFields */ 12, 6435 /* *fields */ soc_TOQ_PURGE_Q_INFO_BCM56624_A0fmt_fields, 6436 /* bits */ 91, 6437 /* flags */ 0, 6438 }, 6439 #endif /* chips */ 6440 6441 #if defined(BCM_56685_B0) 6442 { /* SOC_FORMAT_INT_TOQ_PURGE_Q_INFO_BCM56685_B0fmt */ 6443 /* format TOQ_PURGE_Q_INFOfmt */ 6444 /* nFields */ 12, 6445 /* *fields */ soc_TOQ_PURGE_Q_INFO_BCM56624_A0fmt_fields, 6446 /* bits */ 91, 6447 /* flags */ 0, 6448 }, 6449 #endif /* chips */ 6450 6451 #if defined(BCM_56725_A0) 6452 { /* SOC_FORMAT_INT_TOQ_PURGE_Q_INFO_BCM56725_A0fmt */ 6453 /* format TOQ_PURGE_Q_INFOfmt */ 6454 /* nFields */ 13, 6455 /* *fields */ soc_TOQ_PURGE_Q_INFO_BCM56820_A0fmt_fields, 6456 /* bits */ 82, 6457 /* flags */ 0, 6458 }, 6459 #endif /* chips */ 6460 6461 #if defined(BCM_56820_A0) 6462 { /* SOC_FORMAT_INT_TOQ_PURGE_Q_INFO_BCM56820_A0fmt */ 6463 /* format TOQ_PURGE_Q_INFOfmt */ 6464 /* nFields */ 13, 6465 /* *fields */ soc_TOQ_PURGE_Q_INFO_BCM56820_A0fmt_fields, 6466 /* bits */ 82, 6467 /* flags */ 0, 6468 }, 6469 #endif /* chips */ 6470 6471 #if defined(BCM_88732_A0) 6472 { /* SOC_FORMAT_INT_TOQ_PURGE_Q_INFO_BCM88732_A0fmt */ 6473 /* format TOQ_PURGE_Q_INFOfmt */ 6474 /* nFields */ 10, 6475 /* *fields */ soc_TOQ_PURGE_Q_INFO_BCM88732_A0fmt_fields, 6476 /* bits */ 75, 6477 /* flags */ 0, 6478 }, 6479 #endif /* chips */ 6480 6481 #if defined(BCM_56800_A0) 6482 { /* SOC_FORMAT_INT_TOQ_REPPKT_INFOfmt */ 6483 /* format TOQ_REPPKT_INFOfmt */ 6484 /* nFields */ 11, 6485 /* *fields */ soc_TOQ_REPPKT_INFOfmt_fields, 6486 /* bits */ 36, 6487 /* flags */ 0, 6488 }, 6489 #endif /* chips */ 6490 6491 #if defined(BCM_56334_A0) 6492 { /* SOC_FORMAT_INT_TOQ_REPPKT_INFO_BCM56334_A0fmt */ 6493 /* format TOQ_REPPKT_INFOfmt */ 6494 /* nFields */ 13, 6495 /* *fields */ soc_TOQ_REPPKT_INFO_BCM56334_A0fmt_fields, 6496 /* bits */ 40, 6497 /* flags */ 0, 6498 }, 6499 #endif /* chips */ 6500 6501 #if defined(BCM_56334_B0) 6502 { /* SOC_FORMAT_INT_TOQ_REPPKT_INFO_BCM56334_B0fmt */ 6503 /* format TOQ_REPPKT_INFOfmt */ 6504 /* nFields */ 13, 6505 /* *fields */ soc_TOQ_REPPKT_INFO_BCM56334_A0fmt_fields, 6506 /* bits */ 40, 6507 /* flags */ 0, 6508 }, 6509 #endif /* chips */ 6510 6511 #if defined(BCM_56524_A0) 6512 { /* SOC_FORMAT_INT_TOQ_REPPKT_INFO_BCM56524_A0fmt */ 6513 /* format TOQ_REPPKT_INFOfmt */ 6514 /* nFields */ 13, 6515 /* *fields */ soc_TOQ_REPPKT_INFO_BCM56624_A0fmt_fields, 6516 /* bits */ 42, 6517 /* flags */ 0, 6518 }, 6519 #endif /* chips */ 6520 6521 #if defined(BCM_56524_B0) 6522 { /* SOC_FORMAT_INT_TOQ_REPPKT_INFO_BCM56524_B0fmt */ 6523 /* format TOQ_REPPKT_INFOfmt */ 6524 /* nFields */ 13, 6525 /* *fields */ soc_TOQ_REPPKT_INFO_BCM56624_A0fmt_fields, 6526 /* bits */ 42, 6527 /* flags */ 0, 6528 }, 6529 #endif /* chips */ 6530 6531 #if defined(BCM_56624_A0) 6532 { /* SOC_FORMAT_INT_TOQ_REPPKT_INFO_BCM56624_A0fmt */ 6533 /* format TOQ_REPPKT_INFOfmt */ 6534 /* nFields */ 13, 6535 /* *fields */ soc_TOQ_REPPKT_INFO_BCM56624_A0fmt_fields, 6536 /* bits */ 42, 6537 /* flags */ 0, 6538 }, 6539 #endif /* chips */ 6540 6541 #if defined(BCM_56624_B0) 6542 { /* SOC_FORMAT_INT_TOQ_REPPKT_INFO_BCM56624_B0fmt */ 6543 /* format TOQ_REPPKT_INFOfmt */ 6544 /* nFields */ 13, 6545 /* *fields */ soc_TOQ_REPPKT_INFO_BCM56624_A0fmt_fields, 6546 /* bits */ 42, 6547 /* flags */ 0, 6548 }, 6549 #endif /* chips */ 6550 6551 #if defined(BCM_56634_A0) 6552 { /* SOC_FORMAT_INT_TOQ_REPPKT_INFO_BCM56634_A0fmt */ 6553 /* format TOQ_REPPKT_INFOfmt */ 6554 /* nFields */ 13, 6555 /* *fields */ soc_TOQ_REPPKT_INFO_BCM56624_A0fmt_fields, 6556 /* bits */ 42, 6557 /* flags */ 0, 6558 }, 6559 #endif /* chips */ 6560 6561 #if defined(BCM_56634_B0) 6562 { /* SOC_FORMAT_INT_TOQ_REPPKT_INFO_BCM56634_B0fmt */ 6563 /* format TOQ_REPPKT_INFOfmt */ 6564 /* nFields */ 13, 6565 /* *fields */ soc_TOQ_REPPKT_INFO_BCM56624_A0fmt_fields, 6566 /* bits */ 42, 6567 /* flags */ 0, 6568 }, 6569 #endif /* chips */ 6570 6571 #if defined(BCM_56680_A0) 6572 { /* SOC_FORMAT_INT_TOQ_REPPKT_INFO_BCM56680_A0fmt */ 6573 /* format TOQ_REPPKT_INFOfmt */ 6574 /* nFields */ 13, 6575 /* *fields */ soc_TOQ_REPPKT_INFO_BCM56624_A0fmt_fields, 6576 /* bits */ 42, 6577 /* flags */ 0, 6578 }, 6579 #endif /* chips */ 6580 6581 #if defined(BCM_56680_B0) 6582 { /* SOC_FORMAT_INT_TOQ_REPPKT_INFO_BCM56680_B0fmt */ 6583 /* format TOQ_REPPKT_INFOfmt */ 6584 /* nFields */ 13, 6585 /* *fields */ soc_TOQ_REPPKT_INFO_BCM56624_A0fmt_fields, 6586 /* bits */ 42, 6587 /* flags */ 0, 6588 }, 6589 #endif /* chips */ 6590 6591 #if defined(BCM_56685_A0) 6592 { /* SOC_FORMAT_INT_TOQ_REPPKT_INFO_BCM56685_A0fmt */ 6593 /* format TOQ_REPPKT_INFOfmt */ 6594 /* nFields */ 13, 6595 /* *fields */ soc_TOQ_REPPKT_INFO_BCM56624_A0fmt_fields, 6596 /* bits */ 42, 6597 /* flags */ 0, 6598 }, 6599 #endif /* chips */ 6600 6601 #if defined(BCM_56685_B0) 6602 { /* SOC_FORMAT_INT_TOQ_REPPKT_INFO_BCM56685_B0fmt */ 6603 /* format TOQ_REPPKT_INFOfmt */ 6604 /* nFields */ 13, 6605 /* *fields */ soc_TOQ_REPPKT_INFO_BCM56624_A0fmt_fields, 6606 /* bits */ 42, 6607 /* flags */ 0, 6608 }, 6609 #endif /* chips */ 6610 6611 #if defined(BCM_56725_A0) 6612 { /* SOC_FORMAT_INT_TOQ_REPPKT_INFO_BCM56725_A0fmt */ 6613 /* format TOQ_REPPKT_INFOfmt */ 6614 /* nFields */ 13, 6615 /* *fields */ soc_TOQ_REPPKT_INFO_BCM56820_A0fmt_fields, 6616 /* bits */ 40, 6617 /* flags */ 0, 6618 }, 6619 #endif /* chips */ 6620 6621 #if defined(BCM_56820_A0) 6622 { /* SOC_FORMAT_INT_TOQ_REPPKT_INFO_BCM56820_A0fmt */ 6623 /* format TOQ_REPPKT_INFOfmt */ 6624 /* nFields */ 13, 6625 /* *fields */ soc_TOQ_REPPKT_INFO_BCM56820_A0fmt_fields, 6626 /* bits */ 40, 6627 /* flags */ 0, 6628 }, 6629 #endif /* chips */ 6630 6631 #if defined(BCM_56440_A0) 6632 { /* SOC_FORMAT_INT_TOQ_RQE_CHANNEL_INFOfmt */ 6633 /* format TOQ_RQE_CHANNEL_INFOfmt */ 6634 /* nFields */ 14, 6635 /* *fields */ soc_TOQ_RQE_CHANNEL_INFOfmt_fields, 6636 /* bits */ 59, 6637 /* flags */ 0, 6638 }, 6639 #endif /* chips */ 6640 6641 #if defined(BCM_56440_B0) 6642 { /* SOC_FORMAT_INT_TOQ_RQE_CHANNEL_INFO_BCM56440_B0fmt */ 6643 /* format TOQ_RQE_CHANNEL_INFOfmt */ 6644 /* nFields */ 14, 6645 /* *fields */ soc_TOQ_RQE_CHANNEL_INFOfmt_fields, 6646 /* bits */ 59, 6647 /* flags */ 0, 6648 }, 6649 #endif /* chips */ 6650 6651 #if defined(BCM_56440_A0) 6652 { /* SOC_FORMAT_INT_TOQ_RQE_FIFOfmt */ 6653 /* format TOQ_RQE_FIFOfmt */ 6654 /* nFields */ 17, 6655 /* *fields */ soc_TOQ_RQE_FIFOfmt_fields, 6656 /* bits */ 448, 6657 /* flags */ 0, 6658 }, 6659 #endif /* chips */ 6660 6661 #if defined(BCM_56440_B0) 6662 { /* SOC_FORMAT_INT_TOQ_RQE_FIFO_BCM56440_B0fmt */ 6663 /* format TOQ_RQE_FIFOfmt */ 6664 /* nFields */ 17, 6665 /* *fields */ soc_TOQ_RQE_FIFOfmt_fields, 6666 /* bits */ 448, 6667 /* flags */ 0, 6668 }, 6669 #endif /* chips */ 6670 6671 #if defined(BCM_56440_A0) 6672 { /* SOC_FORMAT_INT_TOQ_RQE_FIFO_MEM_DATAfmt */ 6673 /* format TOQ_RQE_FIFO_MEM_DATAfmt */ 6674 /* nFields */ 5, 6675 /* *fields */ soc_TOQ_RQE_FIFO_MEM_DATAfmt_fields, 6676 /* bits */ 120, 6677 /* flags */ 0, 6678 }, 6679 #endif /* chips */ 6680 6681 #if defined(BCM_56440_B0) 6682 { /* SOC_FORMAT_INT_TOQ_RQE_FIFO_MEM_DATA_BCM56440_B0fmt */ 6683 /* format TOQ_RQE_FIFO_MEM_DATAfmt */ 6684 /* nFields */ 5, 6685 /* *fields */ soc_TOQ_RQE_FIFO_MEM_DATAfmt_fields, 6686 /* bits */ 120, 6687 /* flags */ 0, 6688 }, 6689 #endif /* chips */ 6690 6691 #if defined(BCM_56524_B0) || defined(BCM_56624_A0) || \ 6692 defined(BCM_56624_B0) || defined(BCM_56634_A0) || \ 6693 defined(BCM_56680_B0) || defined(BCM_56685_A0) || \ 6694 defined(BCM_56725_A0) || defined(BCM_56800_A0) || \ 6695 defined(BCM_56820_A0) 6696 { /* SOC_FORMAT_INT_TOQ_SHARE_Q_INFOfmt */ 6697 /* format TOQ_SHARE_Q_INFOfmt */ 6698 /* nFields */ 5, 6699 /* *fields */ soc_TOQ_SHARE_Q_INFOfmt_fields, 6700 /* bits */ 32, 6701 /* flags */ 0, 6702 }, 6703 #endif /* chips */ 6704 6705 #if defined(BCM_56334_A0) 6706 { /* SOC_FORMAT_INT_TOQ_SHARE_Q_INFO_BCM56334_A0fmt */ 6707 /* format TOQ_SHARE_Q_INFOfmt */ 6708 /* nFields */ 5, 6709 /* *fields */ soc_TOQ_SHARE_Q_INFO_BCM56334_A0fmt_fields, 6710 /* bits */ 30, 6711 /* flags */ 0, 6712 }, 6713 #endif /* chips */ 6714 6715 #if defined(BCM_56334_B0) 6716 { /* SOC_FORMAT_INT_TOQ_SHARE_Q_INFO_BCM56334_B0fmt */ 6717 /* format TOQ_SHARE_Q_INFOfmt */ 6718 /* nFields */ 5, 6719 /* *fields */ soc_TOQ_SHARE_Q_INFO_BCM56334_A0fmt_fields, 6720 /* bits */ 30, 6721 /* flags */ 0, 6722 }, 6723 #endif /* chips */ 6724 6725 #if defined(BCM_56524_A0) 6726 { /* SOC_FORMAT_INT_TOQ_SHARE_Q_INFO_BCM56524_A0fmt */ 6727 /* format TOQ_SHARE_Q_INFOfmt */ 6728 /* nFields */ 5, 6729 /* *fields */ soc_TOQ_SHARE_Q_INFOfmt_fields, 6730 /* bits */ 32, 6731 /* flags */ 0, 6732 }, 6733 #endif /* chips */ 6734 6735 #if defined(BCM_56634_B0) 6736 { /* SOC_FORMAT_INT_TOQ_SHARE_Q_INFO_BCM56634_B0fmt */ 6737 /* format TOQ_SHARE_Q_INFOfmt */ 6738 /* nFields */ 5, 6739 /* *fields */ soc_TOQ_SHARE_Q_INFOfmt_fields, 6740 /* bits */ 32, 6741 /* flags */ 0, 6742 }, 6743 #endif /* chips */ 6744 6745 #if defined(BCM_56680_A0) 6746 { /* SOC_FORMAT_INT_TOQ_SHARE_Q_INFO_BCM56680_A0fmt */ 6747 /* format TOQ_SHARE_Q_INFOfmt */ 6748 /* nFields */ 5, 6749 /* *fields */ soc_TOQ_SHARE_Q_INFOfmt_fields, 6750 /* bits */ 32, 6751 /* flags */ 0, 6752 }, 6753 #endif /* chips */ 6754 6755 #if defined(BCM_56685_B0) 6756 { /* SOC_FORMAT_INT_TOQ_SHARE_Q_INFO_BCM56685_B0fmt */ 6757 /* format TOQ_SHARE_Q_INFOfmt */ 6758 /* nFields */ 5, 6759 /* *fields */ soc_TOQ_SHARE_Q_INFOfmt_fields, 6760 /* bits */ 32, 6761 /* flags */ 0, 6762 }, 6763 #endif /* chips */ 6764 6765 #if defined(BCM_88732_A0) 6766 { /* SOC_FORMAT_INT_TOQ_SHARE_Q_INFO_BCM88732_A0fmt */ 6767 /* format TOQ_SHARE_Q_INFOfmt */ 6768 /* nFields */ 5, 6769 /* *fields */ soc_TOQ_SHARE_Q_INFO_BCM88732_A0fmt_fields, 6770 /* bits */ 38, 6771 /* flags */ 0, 6772 }, 6773 #endif /* chips */ 6774 6775 #if defined(BCM_56440_A0) || defined(BCM_56524_B0) || \ 6776 defined(BCM_56624_A0) || defined(BCM_56624_B0) || \ 6777 defined(BCM_56634_A0) || defined(BCM_56680_B0) || \ 6778 defined(BCM_56685_A0) || defined(BCM_56840_A0) || \ 6779 defined(BCM_56840_B0) 6780 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1fmt */ 6781 /* format TOQ_SV2_PKTHDR1fmt */ 6782 /* nFields */ 8, 6783 /* *fields */ soc_TOQ_SV2_PKTHDR1fmt_fields, 6784 /* bits */ 24, 6785 /* flags */ 0, 6786 }, 6787 #endif /* chips */ 6788 6789 #if defined(BCM_56260_A0) 6790 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56260_A0fmt */ 6791 /* format TOQ_SV2_PKTHDR1fmt */ 6792 /* nFields */ 8, 6793 /* *fields */ soc_TOQ_SV2_PKTHDR1_BCM56960_A0fmt_fields, 6794 /* bits */ 24, 6795 /* flags */ 0, 6796 }, 6797 #endif /* chips */ 6798 6799 #if defined(BCM_56260_B0) 6800 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56260_B0fmt */ 6801 /* format TOQ_SV2_PKTHDR1fmt */ 6802 /* nFields */ 8, 6803 /* *fields */ soc_TOQ_SV2_PKTHDR1_BCM56960_A0fmt_fields, 6804 /* bits */ 24, 6805 /* flags */ 0, 6806 }, 6807 #endif /* chips */ 6808 6809 #if defined(BCM_56270_A0) 6810 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56270_A0fmt */ 6811 /* format TOQ_SV2_PKTHDR1fmt */ 6812 /* nFields */ 8, 6813 /* *fields */ soc_TOQ_SV2_PKTHDR1_BCM56960_A0fmt_fields, 6814 /* bits */ 24, 6815 /* flags */ 0, 6816 }, 6817 #endif /* chips */ 6818 6819 #if defined(BCM_56334_A0) 6820 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56334_A0fmt */ 6821 /* format TOQ_SV2_PKTHDR1fmt */ 6822 /* nFields */ 8, 6823 /* *fields */ soc_TOQ_SV2_PKTHDR1_BCM56334_A0fmt_fields, 6824 /* bits */ 23, 6825 /* flags */ 0, 6826 }, 6827 #endif /* chips */ 6828 6829 #if defined(BCM_56334_B0) 6830 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56334_B0fmt */ 6831 /* format TOQ_SV2_PKTHDR1fmt */ 6832 /* nFields */ 8, 6833 /* *fields */ soc_TOQ_SV2_PKTHDR1_BCM56334_A0fmt_fields, 6834 /* bits */ 23, 6835 /* flags */ 0, 6836 }, 6837 #endif /* chips */ 6838 6839 #if defined(BCM_56340_A0) 6840 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56340_A0fmt */ 6841 /* format TOQ_SV2_PKTHDR1fmt */ 6842 /* nFields */ 8, 6843 /* *fields */ soc_TOQ_SV2_PKTHDR1_BCM56640_A0fmt_fields, 6844 /* bits */ 24, 6845 /* flags */ 0, 6846 }, 6847 #endif /* chips */ 6848 6849 #if defined(BCM_56440_B0) 6850 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56440_B0fmt */ 6851 /* format TOQ_SV2_PKTHDR1fmt */ 6852 /* nFields */ 8, 6853 /* *fields */ soc_TOQ_SV2_PKTHDR1fmt_fields, 6854 /* bits */ 24, 6855 /* flags */ 0, 6856 }, 6857 #endif /* chips */ 6858 6859 #if defined(BCM_56450_A0) 6860 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56450_A0fmt */ 6861 /* format TOQ_SV2_PKTHDR1fmt */ 6862 /* nFields */ 8, 6863 /* *fields */ soc_TOQ_SV2_PKTHDR1_BCM56640_A0fmt_fields, 6864 /* bits */ 24, 6865 /* flags */ 0, 6866 }, 6867 #endif /* chips */ 6868 6869 #if defined(BCM_56450_B0) 6870 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56450_B0fmt */ 6871 /* format TOQ_SV2_PKTHDR1fmt */ 6872 /* nFields */ 8, 6873 /* *fields */ soc_TOQ_SV2_PKTHDR1_BCM56640_A0fmt_fields, 6874 /* bits */ 24, 6875 /* flags */ 0, 6876 }, 6877 #endif /* chips */ 6878 6879 #if defined(BCM_56450_B1) 6880 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56450_B1fmt */ 6881 /* format TOQ_SV2_PKTHDR1fmt */ 6882 /* nFields */ 8, 6883 /* *fields */ soc_TOQ_SV2_PKTHDR1_BCM56640_A0fmt_fields, 6884 /* bits */ 24, 6885 /* flags */ 0, 6886 }, 6887 #endif /* chips */ 6888 6889 #if defined(BCM_56524_A0) 6890 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56524_A0fmt */ 6891 /* format TOQ_SV2_PKTHDR1fmt */ 6892 /* nFields */ 8, 6893 /* *fields */ soc_TOQ_SV2_PKTHDR1fmt_fields, 6894 /* bits */ 24, 6895 /* flags */ 0, 6896 }, 6897 #endif /* chips */ 6898 6899 #if defined(BCM_56560_A0) 6900 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56560_A0fmt */ 6901 /* format TOQ_SV2_PKTHDR1fmt */ 6902 /* nFields */ 8, 6903 /* *fields */ soc_TOQ_SV2_PKTHDR1_BCM56960_A0fmt_fields, 6904 /* bits */ 24, 6905 /* flags */ 0, 6906 }, 6907 #endif /* chips */ 6908 6909 #if defined(BCM_56560_B0) 6910 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56560_B0fmt */ 6911 /* format TOQ_SV2_PKTHDR1fmt */ 6912 /* nFields */ 8, 6913 /* *fields */ soc_TOQ_SV2_PKTHDR1_BCM56960_A0fmt_fields, 6914 /* bits */ 24, 6915 /* flags */ 0, 6916 }, 6917 #endif /* chips */ 6918 6919 #if defined(BCM_56634_B0) 6920 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56634_B0fmt */ 6921 /* format TOQ_SV2_PKTHDR1fmt */ 6922 /* nFields */ 8, 6923 /* *fields */ soc_TOQ_SV2_PKTHDR1fmt_fields, 6924 /* bits */ 24, 6925 /* flags */ 0, 6926 }, 6927 #endif /* chips */ 6928 6929 #if defined(BCM_56640_A0) 6930 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56640_A0fmt */ 6931 /* format TOQ_SV2_PKTHDR1fmt */ 6932 /* nFields */ 8, 6933 /* *fields */ soc_TOQ_SV2_PKTHDR1_BCM56640_A0fmt_fields, 6934 /* bits */ 24, 6935 /* flags */ 0, 6936 }, 6937 #endif /* chips */ 6938 6939 #if defined(BCM_56670_A0) 6940 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56670_A0fmt */ 6941 /* format TOQ_SV2_PKTHDR1fmt */ 6942 /* nFields */ 8, 6943 /* *fields */ soc_TOQ_SV2_PKTHDR1_BCM56960_A0fmt_fields, 6944 /* bits */ 24, 6945 /* flags */ 0, 6946 }, 6947 #endif /* chips */ 6948 6949 #if defined(BCM_56670_B0) 6950 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56670_B0fmt */ 6951 /* format TOQ_SV2_PKTHDR1fmt */ 6952 /* nFields */ 8, 6953 /* *fields */ soc_TOQ_SV2_PKTHDR1_BCM56960_A0fmt_fields, 6954 /* bits */ 24, 6955 /* flags */ 0, 6956 }, 6957 #endif /* chips */ 6958 6959 #if defined(BCM_56680_A0) 6960 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56680_A0fmt */ 6961 /* format TOQ_SV2_PKTHDR1fmt */ 6962 /* nFields */ 8, 6963 /* *fields */ soc_TOQ_SV2_PKTHDR1fmt_fields, 6964 /* bits */ 24, 6965 /* flags */ 0, 6966 }, 6967 #endif /* chips */ 6968 6969 #if defined(BCM_56685_B0) 6970 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56685_B0fmt */ 6971 /* format TOQ_SV2_PKTHDR1fmt */ 6972 /* nFields */ 8, 6973 /* *fields */ soc_TOQ_SV2_PKTHDR1fmt_fields, 6974 /* bits */ 24, 6975 /* flags */ 0, 6976 }, 6977 #endif /* chips */ 6978 6979 #if defined(BCM_56850_A0) 6980 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56850_A0fmt */ 6981 /* format TOQ_SV2_PKTHDR1fmt */ 6982 /* nFields */ 8, 6983 /* *fields */ soc_TOQ_SV2_PKTHDR1_BCM56640_A0fmt_fields, 6984 /* bits */ 24, 6985 /* flags */ 0, 6986 }, 6987 #endif /* chips */ 6988 6989 #if defined(BCM_56860_A0) 6990 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56860_A0fmt */ 6991 /* format TOQ_SV2_PKTHDR1fmt */ 6992 /* nFields */ 8, 6993 /* *fields */ soc_TOQ_SV2_PKTHDR1_BCM56640_A0fmt_fields, 6994 /* bits */ 24, 6995 /* flags */ 0, 6996 }, 6997 #endif /* chips */ 6998 6999 #if defined(BCM_56960_A0) 7000 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56960_A0fmt */ 7001 /* format TOQ_SV2_PKTHDR1fmt */ 7002 /* nFields */ 8, 7003 /* *fields */ soc_TOQ_SV2_PKTHDR1_BCM56960_A0fmt_fields, 7004 /* bits */ 24, 7005 /* flags */ 0, 7006 }, 7007 #endif /* chips */ 7008 7009 #if defined(BCM_56965_A0) 7010 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56965_A0fmt */ 7011 /* format TOQ_SV2_PKTHDR1fmt */ 7012 /* nFields */ 8, 7013 /* *fields */ soc_TOQ_SV2_PKTHDR1_BCM56960_A0fmt_fields, 7014 /* bits */ 24, 7015 /* flags */ 0, 7016 }, 7017 #endif /* chips */ 7018 7019 #if defined(BCM_56970_A0) 7020 { /* SOC_FORMAT_INT_TOQ_SV2_PKTHDR1_BCM56970_A0fmt */ 7021 /* format TOQ_SV2_PKTHDR1fmt */ 7022 /* nFields */ 8, 7023 /* *fields */ soc_TOQ_SV2_PKTHDR1_BCM56960_A0fmt_fields, 7024 /* bits */ 24, 7025 /* flags */ 0, 7026 }, 7027 #endif /* chips */ 7028 7029 #if defined(BCM_56440_A0) 7030 { /* SOC_FORMAT_INT_TOQ_TCACHE_STATUS_INFO_0fmt */ 7031 /* format TOQ_TCACHE_STATUS_INFO_0fmt */ 7032 /* nFields */ 7, 7033 /* *fields */ soc_TOQ_TCACHE_STATUS_INFO_0fmt_fields, 7034 /* bits */ 77, 7035 /* flags */ 0, 7036 }, 7037 #endif /* chips */ 7038 7039 #if defined(BCM_56260_A0) 7040 { /* SOC_FORMAT_INT_TOQ_TCACHE_STATUS_INFO_0_BCM56260_A0fmt */ 7041 /* format TOQ_TCACHE_STATUS_INFO_0fmt */ 7042 /* nFields */ 19, 7043 /* *fields */ soc_TOQ_TCACHE_STATUS_INFO_0_BCM56260_A0fmt_fields, 7044 /* bits */ 81, 7045 /* flags */ 0, 7046 }, 7047 #endif /* chips */ 7048 7049 #if defined(BCM_56260_B0) 7050 { /* SOC_FORMAT_INT_TOQ_TCACHE_STATUS_INFO_0_BCM56260_B0fmt */ 7051 /* format TOQ_TCACHE_STATUS_INFO_0fmt */ 7052 /* nFields */ 19, 7053 /* *fields */ soc_TOQ_TCACHE_STATUS_INFO_0_BCM56260_A0fmt_fields, 7054 /* bits */ 81, 7055 /* flags */ 0, 7056 }, 7057 #endif /* chips */ 7058 7059 #if defined(BCM_56270_A0) 7060 { /* SOC_FORMAT_INT_TOQ_TCACHE_STATUS_INFO_0_BCM56270_A0fmt */ 7061 /* format TOQ_TCACHE_STATUS_INFO_0fmt */ 7062 /* nFields */ 11, 7063 /* *fields */ soc_TOQ_TCACHE_STATUS_INFO_0_BCM56270_A0fmt_fields, 7064 /* bits */ 57, 7065 /* flags */ 0, 7066 }, 7067 #endif /* chips */ 7068 7069 #if defined(BCM_56440_B0) 7070 { /* SOC_FORMAT_INT_TOQ_TCACHE_STATUS_INFO_0_BCM56440_B0fmt */ 7071 /* format TOQ_TCACHE_STATUS_INFO_0fmt */ 7072 /* nFields */ 7, 7073 /* *fields */ soc_TOQ_TCACHE_STATUS_INFO_0fmt_fields, 7074 /* bits */ 77, 7075 /* flags */ 0, 7076 }, 7077 #endif /* chips */ 7078 7079 #if defined(BCM_56450_A0) 7080 { /* SOC_FORMAT_INT_TOQ_TCACHE_STATUS_INFO_0_BCM56450_A0fmt */ 7081 /* format TOQ_TCACHE_STATUS_INFO_0fmt */ 7082 /* nFields */ 18, 7083 /* *fields */ soc_TOQ_TCACHE_STATUS_INFO_0_BCM56450_A0fmt_fields, 7084 /* bits */ 93, 7085 /* flags */ 0, 7086 }, 7087 #endif /* chips */ 7088 7089 #if defined(BCM_56450_B0) 7090 { /* SOC_FORMAT_INT_TOQ_TCACHE_STATUS_INFO_0_BCM56450_B0fmt */ 7091 /* format TOQ_TCACHE_STATUS_INFO_0fmt */ 7092 /* nFields */ 18, 7093 /* *fields */ soc_TOQ_TCACHE_STATUS_INFO_0_BCM56450_A0fmt_fields, 7094 /* bits */ 93, 7095 /* flags */ 0, 7096 }, 7097 #endif /* chips */ 7098 7099 #if defined(BCM_56450_B1) 7100 { /* SOC_FORMAT_INT_TOQ_TCACHE_STATUS_INFO_0_BCM56450_B1fmt */ 7101 /* format TOQ_TCACHE_STATUS_INFO_0fmt */ 7102 /* nFields */ 18, 7103 /* *fields */ soc_TOQ_TCACHE_STATUS_INFO_0_BCM56450_A0fmt_fields, 7104 /* bits */ 93, 7105 /* flags */ 0, 7106 }, 7107 #endif /* chips */ 7108 7109 #if defined(BCM_56980_A0) || defined(BCM_56980_B0) 7110 { /* SOC_FORMAT_INT_TOQ_TCT_EB_STATEfmt */ 7111 /* format TOQ_TCT_EB_STATEfmt */ 7112 /* nFields */ 5, 7113 /* *fields */ soc_TOQ_TCT_EB_STATEfmt_fields, 7114 /* bits */ 43, 7115 /* flags */ 0, 7116 }, 7117 #endif /* chips */ 7118 7119 #if defined(BCM_56800_A0) 7120 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFOfmt */ 7121 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7122 /* nFields */ 15, 7123 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFOfmt_fields, 7124 /* bits */ 70, 7125 /* flags */ 0, 7126 }, 7127 #endif /* chips */ 7128 7129 #if defined(BCM_56260_A0) 7130 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56260_A0fmt */ 7131 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7132 /* nFields */ 26, 7133 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56260_A0fmt_fields, 7134 /* bits */ 112, 7135 /* flags */ 0, 7136 }, 7137 #endif /* chips */ 7138 7139 #if defined(BCM_56260_B0) 7140 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56260_B0fmt */ 7141 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7142 /* nFields */ 26, 7143 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56260_A0fmt_fields, 7144 /* bits */ 112, 7145 /* flags */ 0, 7146 }, 7147 #endif /* chips */ 7148 7149 #if defined(BCM_56270_A0) 7150 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56270_A0fmt */ 7151 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7152 /* nFields */ 20, 7153 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56270_A0fmt_fields, 7154 /* bits */ 90, 7155 /* flags */ 0, 7156 }, 7157 #endif /* chips */ 7158 7159 #if defined(BCM_56334_A0) 7160 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56334_A0fmt */ 7161 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7162 /* nFields */ 13, 7163 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56334_A0fmt_fields, 7164 /* bits */ 106, 7165 /* flags */ 0, 7166 }, 7167 #endif /* chips */ 7168 7169 #if defined(BCM_56334_B0) 7170 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56334_B0fmt */ 7171 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7172 /* nFields */ 13, 7173 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56334_A0fmt_fields, 7174 /* bits */ 106, 7175 /* flags */ 0, 7176 }, 7177 #endif /* chips */ 7178 7179 #if defined(BCM_56340_A0) 7180 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56340_A0fmt */ 7181 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7182 /* nFields */ 13, 7183 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56640_A0fmt_fields, 7184 /* bits */ 67, 7185 /* flags */ 0, 7186 }, 7187 #endif /* chips */ 7188 7189 #if defined(BCM_56440_A0) 7190 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56440_A0fmt */ 7191 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7192 /* nFields */ 15, 7193 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56440_A0fmt_fields, 7194 /* bits */ 74, 7195 /* flags */ 0, 7196 }, 7197 #endif /* chips */ 7198 7199 #if defined(BCM_56440_B0) 7200 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56440_B0fmt */ 7201 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7202 /* nFields */ 15, 7203 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56440_A0fmt_fields, 7204 /* bits */ 74, 7205 /* flags */ 0, 7206 }, 7207 #endif /* chips */ 7208 7209 #if defined(BCM_56450_A0) 7210 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56450_A0fmt */ 7211 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7212 /* nFields */ 30, 7213 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56450_A0fmt_fields, 7214 /* bits */ 119, 7215 /* flags */ 0, 7216 }, 7217 #endif /* chips */ 7218 7219 #if defined(BCM_56450_B0) 7220 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56450_B0fmt */ 7221 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7222 /* nFields */ 30, 7223 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56450_A0fmt_fields, 7224 /* bits */ 119, 7225 /* flags */ 0, 7226 }, 7227 #endif /* chips */ 7228 7229 #if defined(BCM_56450_B1) 7230 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56450_B1fmt */ 7231 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7232 /* nFields */ 30, 7233 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56450_A0fmt_fields, 7234 /* bits */ 119, 7235 /* flags */ 0, 7236 }, 7237 #endif /* chips */ 7238 7239 #if defined(BCM_56524_A0) 7240 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56524_A0fmt */ 7241 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7242 /* nFields */ 13, 7243 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56624_A0fmt_fields, 7244 /* bits */ 109, 7245 /* flags */ 0, 7246 }, 7247 #endif /* chips */ 7248 7249 #if defined(BCM_56524_B0) 7250 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56524_B0fmt */ 7251 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7252 /* nFields */ 13, 7253 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56624_A0fmt_fields, 7254 /* bits */ 109, 7255 /* flags */ 0, 7256 }, 7257 #endif /* chips */ 7258 7259 #if defined(BCM_56560_A0) 7260 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56560_A0fmt */ 7261 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7262 /* nFields */ 17, 7263 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56560_A0fmt_fields, 7264 /* bits */ 90, 7265 /* flags */ 0, 7266 }, 7267 #endif /* chips */ 7268 7269 #if defined(BCM_56560_B0) 7270 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56560_B0fmt */ 7271 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7272 /* nFields */ 17, 7273 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56560_A0fmt_fields, 7274 /* bits */ 90, 7275 /* flags */ 0, 7276 }, 7277 #endif /* chips */ 7278 7279 #if defined(BCM_56624_A0) 7280 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56624_A0fmt */ 7281 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7282 /* nFields */ 13, 7283 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56624_A0fmt_fields, 7284 /* bits */ 109, 7285 /* flags */ 0, 7286 }, 7287 #endif /* chips */ 7288 7289 #if defined(BCM_56624_B0) 7290 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56624_B0fmt */ 7291 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7292 /* nFields */ 13, 7293 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56624_A0fmt_fields, 7294 /* bits */ 109, 7295 /* flags */ 0, 7296 }, 7297 #endif /* chips */ 7298 7299 #if defined(BCM_56634_A0) 7300 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56634_A0fmt */ 7301 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7302 /* nFields */ 13, 7303 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56624_A0fmt_fields, 7304 /* bits */ 109, 7305 /* flags */ 0, 7306 }, 7307 #endif /* chips */ 7308 7309 #if defined(BCM_56634_B0) 7310 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56634_B0fmt */ 7311 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7312 /* nFields */ 13, 7313 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56624_A0fmt_fields, 7314 /* bits */ 109, 7315 /* flags */ 0, 7316 }, 7317 #endif /* chips */ 7318 7319 #if defined(BCM_56640_A0) 7320 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56640_A0fmt */ 7321 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7322 /* nFields */ 13, 7323 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56640_A0fmt_fields, 7324 /* bits */ 67, 7325 /* flags */ 0, 7326 }, 7327 #endif /* chips */ 7328 7329 #if defined(BCM_56670_A0) 7330 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56670_A0fmt */ 7331 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7332 /* nFields */ 18, 7333 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56670_A0fmt_fields, 7334 /* bits */ 82, 7335 /* flags */ 0, 7336 }, 7337 #endif /* chips */ 7338 7339 #if defined(BCM_56670_B0) 7340 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56670_B0fmt */ 7341 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7342 /* nFields */ 18, 7343 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56670_A0fmt_fields, 7344 /* bits */ 82, 7345 /* flags */ 0, 7346 }, 7347 #endif /* chips */ 7348 7349 #if defined(BCM_56680_A0) 7350 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56680_A0fmt */ 7351 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7352 /* nFields */ 13, 7353 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56624_A0fmt_fields, 7354 /* bits */ 109, 7355 /* flags */ 0, 7356 }, 7357 #endif /* chips */ 7358 7359 #if defined(BCM_56680_B0) 7360 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56680_B0fmt */ 7361 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7362 /* nFields */ 13, 7363 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56624_A0fmt_fields, 7364 /* bits */ 109, 7365 /* flags */ 0, 7366 }, 7367 #endif /* chips */ 7368 7369 #if defined(BCM_56685_A0) 7370 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56685_A0fmt */ 7371 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7372 /* nFields */ 13, 7373 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56624_A0fmt_fields, 7374 /* bits */ 109, 7375 /* flags */ 0, 7376 }, 7377 #endif /* chips */ 7378 7379 #if defined(BCM_56685_B0) 7380 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56685_B0fmt */ 7381 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7382 /* nFields */ 13, 7383 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56624_A0fmt_fields, 7384 /* bits */ 109, 7385 /* flags */ 0, 7386 }, 7387 #endif /* chips */ 7388 7389 #if defined(BCM_56725_A0) 7390 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56725_A0fmt */ 7391 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7392 /* nFields */ 12, 7393 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56820_A0fmt_fields, 7394 /* bits */ 55, 7395 /* flags */ 0, 7396 }, 7397 #endif /* chips */ 7398 7399 #if defined(BCM_56820_A0) 7400 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56820_A0fmt */ 7401 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7402 /* nFields */ 12, 7403 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56820_A0fmt_fields, 7404 /* bits */ 55, 7405 /* flags */ 0, 7406 }, 7407 #endif /* chips */ 7408 7409 #if defined(BCM_56840_A0) 7410 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56840_A0fmt */ 7411 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7412 /* nFields */ 12, 7413 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56840_A0fmt_fields, 7414 /* bits */ 45, 7415 /* flags */ 0, 7416 }, 7417 #endif /* chips */ 7418 7419 #if defined(BCM_56840_B0) 7420 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56840_B0fmt */ 7421 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7422 /* nFields */ 12, 7423 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56840_A0fmt_fields, 7424 /* bits */ 45, 7425 /* flags */ 0, 7426 }, 7427 #endif /* chips */ 7428 7429 #if defined(BCM_56850_A0) 7430 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56850_A0fmt */ 7431 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7432 /* nFields */ 16, 7433 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56850_A0fmt_fields, 7434 /* bits */ 73, 7435 /* flags */ 0, 7436 }, 7437 #endif /* chips */ 7438 7439 #if defined(BCM_56860_A0) 7440 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM56860_A0fmt */ 7441 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7442 /* nFields */ 16, 7443 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM56850_A0fmt_fields, 7444 /* bits */ 73, 7445 /* flags */ 0, 7446 }, 7447 #endif /* chips */ 7448 7449 #if defined(BCM_88732_A0) 7450 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_CELL_INFO_BCM88732_A0fmt */ 7451 /* format TOQ_TO_DEQ_CELL_INFOfmt */ 7452 /* nFields */ 11, 7453 /* *fields */ soc_TOQ_TO_DEQ_CELL_INFO_BCM88732_A0fmt_fields, 7454 /* bits */ 57, 7455 /* flags */ 0, 7456 }, 7457 #endif /* chips */ 7458 7459 #if defined(BCM_56524_B0) || defined(BCM_56634_A0) || \ 7460 defined(BCM_56685_A0) || defined(BCM_56685_B0) 7461 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_RDE_INFOfmt */ 7462 /* format TOQ_TO_DEQ_RDE_INFOfmt */ 7463 /* nFields */ 3, 7464 /* *fields */ soc_TOQ_TO_DEQ_RDE_INFOfmt_fields, 7465 /* bits */ 12, 7466 /* flags */ 0, 7467 }, 7468 #endif /* chips */ 7469 7470 #if defined(BCM_56340_A0) 7471 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_RDE_INFO_BCM56340_A0fmt */ 7472 /* format TOQ_TO_DEQ_RDE_INFOfmt */ 7473 /* nFields */ 2, 7474 /* *fields */ soc_TOQ_TO_DEQ_RDE_INFO_BCM56640_A0fmt_fields, 7475 /* bits */ 11, 7476 /* flags */ 0, 7477 }, 7478 #endif /* chips */ 7479 7480 #if defined(BCM_56524_A0) 7481 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_RDE_INFO_BCM56524_A0fmt */ 7482 /* format TOQ_TO_DEQ_RDE_INFOfmt */ 7483 /* nFields */ 3, 7484 /* *fields */ soc_TOQ_TO_DEQ_RDE_INFOfmt_fields, 7485 /* bits */ 12, 7486 /* flags */ 0, 7487 }, 7488 #endif /* chips */ 7489 7490 #if defined(BCM_56634_B0) 7491 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_RDE_INFO_BCM56634_B0fmt */ 7492 /* format TOQ_TO_DEQ_RDE_INFOfmt */ 7493 /* nFields */ 3, 7494 /* *fields */ soc_TOQ_TO_DEQ_RDE_INFOfmt_fields, 7495 /* bits */ 12, 7496 /* flags */ 0, 7497 }, 7498 #endif /* chips */ 7499 7500 #if defined(BCM_56640_A0) 7501 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_RDE_INFO_BCM56640_A0fmt */ 7502 /* format TOQ_TO_DEQ_RDE_INFOfmt */ 7503 /* nFields */ 2, 7504 /* *fields */ soc_TOQ_TO_DEQ_RDE_INFO_BCM56640_A0fmt_fields, 7505 /* bits */ 11, 7506 /* flags */ 0, 7507 }, 7508 #endif /* chips */ 7509 7510 #if defined(BCM_56800_A0) 7511 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFOfmt */ 7512 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7513 /* nFields */ 9, 7514 /* *fields */ soc_TOQ_TO_DEQ_REP_INFOfmt_fields, 7515 /* bits */ 20, 7516 /* flags */ 0, 7517 }, 7518 #endif /* chips */ 7519 7520 #if defined(BCM_56260_A0) 7521 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56260_A0fmt */ 7522 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7523 /* nFields */ 7, 7524 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56260_A0fmt_fields, 7525 /* bits */ 21, 7526 /* flags */ 0, 7527 }, 7528 #endif /* chips */ 7529 7530 #if defined(BCM_56260_B0) 7531 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56260_B0fmt */ 7532 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7533 /* nFields */ 7, 7534 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56260_A0fmt_fields, 7535 /* bits */ 21, 7536 /* flags */ 0, 7537 }, 7538 #endif /* chips */ 7539 7540 #if defined(BCM_56270_A0) 7541 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56270_A0fmt */ 7542 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7543 /* nFields */ 7, 7544 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56260_A0fmt_fields, 7545 /* bits */ 21, 7546 /* flags */ 0, 7547 }, 7548 #endif /* chips */ 7549 7550 #if defined(BCM_56334_A0) 7551 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56334_A0fmt */ 7552 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7553 /* nFields */ 11, 7554 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56624_A0fmt_fields, 7555 /* bits */ 24, 7556 /* flags */ 0, 7557 }, 7558 #endif /* chips */ 7559 7560 #if defined(BCM_56334_B0) 7561 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56334_B0fmt */ 7562 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7563 /* nFields */ 11, 7564 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56624_A0fmt_fields, 7565 /* bits */ 24, 7566 /* flags */ 0, 7567 }, 7568 #endif /* chips */ 7569 7570 #if defined(BCM_56340_A0) 7571 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56340_A0fmt */ 7572 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7573 /* nFields */ 11, 7574 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56640_A0fmt_fields, 7575 /* bits */ 26, 7576 /* flags */ 0, 7577 }, 7578 #endif /* chips */ 7579 7580 #if defined(BCM_56440_A0) 7581 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56440_A0fmt */ 7582 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7583 /* nFields */ 7, 7584 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56440_A0fmt_fields, 7585 /* bits */ 20, 7586 /* flags */ 0, 7587 }, 7588 #endif /* chips */ 7589 7590 #if defined(BCM_56440_B0) 7591 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56440_B0fmt */ 7592 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7593 /* nFields */ 7, 7594 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56440_A0fmt_fields, 7595 /* bits */ 20, 7596 /* flags */ 0, 7597 }, 7598 #endif /* chips */ 7599 7600 #if defined(BCM_56450_A0) 7601 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56450_A0fmt */ 7602 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7603 /* nFields */ 7, 7604 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56450_A0fmt_fields, 7605 /* bits */ 21, 7606 /* flags */ 0, 7607 }, 7608 #endif /* chips */ 7609 7610 #if defined(BCM_56450_B0) 7611 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56450_B0fmt */ 7612 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7613 /* nFields */ 7, 7614 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56450_A0fmt_fields, 7615 /* bits */ 21, 7616 /* flags */ 0, 7617 }, 7618 #endif /* chips */ 7619 7620 #if defined(BCM_56450_B1) 7621 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56450_B1fmt */ 7622 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7623 /* nFields */ 7, 7624 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56450_A0fmt_fields, 7625 /* bits */ 21, 7626 /* flags */ 0, 7627 }, 7628 #endif /* chips */ 7629 7630 #if defined(BCM_56524_A0) 7631 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56524_A0fmt */ 7632 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7633 /* nFields */ 11, 7634 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56634_A0fmt_fields, 7635 /* bits */ 25, 7636 /* flags */ 0, 7637 }, 7638 #endif /* chips */ 7639 7640 #if defined(BCM_56524_B0) 7641 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56524_B0fmt */ 7642 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7643 /* nFields */ 11, 7644 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56634_A0fmt_fields, 7645 /* bits */ 25, 7646 /* flags */ 0, 7647 }, 7648 #endif /* chips */ 7649 7650 #if defined(BCM_56560_A0) 7651 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56560_A0fmt */ 7652 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7653 /* nFields */ 12, 7654 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56560_A0fmt_fields, 7655 /* bits */ 27, 7656 /* flags */ 0, 7657 }, 7658 #endif /* chips */ 7659 7660 #if defined(BCM_56560_B0) 7661 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56560_B0fmt */ 7662 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7663 /* nFields */ 12, 7664 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56560_A0fmt_fields, 7665 /* bits */ 27, 7666 /* flags */ 0, 7667 }, 7668 #endif /* chips */ 7669 7670 #if defined(BCM_56624_A0) 7671 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56624_A0fmt */ 7672 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7673 /* nFields */ 11, 7674 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56624_A0fmt_fields, 7675 /* bits */ 24, 7676 /* flags */ 0, 7677 }, 7678 #endif /* chips */ 7679 7680 #if defined(BCM_56624_B0) 7681 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56624_B0fmt */ 7682 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7683 /* nFields */ 11, 7684 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56624_A0fmt_fields, 7685 /* bits */ 24, 7686 /* flags */ 0, 7687 }, 7688 #endif /* chips */ 7689 7690 #if defined(BCM_56634_A0) 7691 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56634_A0fmt */ 7692 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7693 /* nFields */ 11, 7694 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56634_A0fmt_fields, 7695 /* bits */ 25, 7696 /* flags */ 0, 7697 }, 7698 #endif /* chips */ 7699 7700 #if defined(BCM_56634_B0) 7701 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56634_B0fmt */ 7702 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7703 /* nFields */ 11, 7704 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56634_A0fmt_fields, 7705 /* bits */ 25, 7706 /* flags */ 0, 7707 }, 7708 #endif /* chips */ 7709 7710 #if defined(BCM_56640_A0) 7711 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56640_A0fmt */ 7712 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7713 /* nFields */ 11, 7714 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56640_A0fmt_fields, 7715 /* bits */ 26, 7716 /* flags */ 0, 7717 }, 7718 #endif /* chips */ 7719 7720 #if defined(BCM_56670_A0) 7721 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56670_A0fmt */ 7722 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7723 /* nFields */ 12, 7724 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56670_A0fmt_fields, 7725 /* bits */ 25, 7726 /* flags */ 0, 7727 }, 7728 #endif /* chips */ 7729 7730 #if defined(BCM_56670_B0) 7731 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56670_B0fmt */ 7732 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7733 /* nFields */ 12, 7734 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56670_A0fmt_fields, 7735 /* bits */ 25, 7736 /* flags */ 0, 7737 }, 7738 #endif /* chips */ 7739 7740 #if defined(BCM_56680_A0) 7741 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56680_A0fmt */ 7742 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7743 /* nFields */ 11, 7744 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56624_A0fmt_fields, 7745 /* bits */ 24, 7746 /* flags */ 0, 7747 }, 7748 #endif /* chips */ 7749 7750 #if defined(BCM_56680_B0) 7751 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56680_B0fmt */ 7752 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7753 /* nFields */ 11, 7754 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56624_A0fmt_fields, 7755 /* bits */ 24, 7756 /* flags */ 0, 7757 }, 7758 #endif /* chips */ 7759 7760 #if defined(BCM_56685_A0) 7761 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56685_A0fmt */ 7762 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7763 /* nFields */ 11, 7764 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56634_A0fmt_fields, 7765 /* bits */ 25, 7766 /* flags */ 0, 7767 }, 7768 #endif /* chips */ 7769 7770 #if defined(BCM_56685_B0) 7771 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56685_B0fmt */ 7772 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7773 /* nFields */ 11, 7774 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56634_A0fmt_fields, 7775 /* bits */ 25, 7776 /* flags */ 0, 7777 }, 7778 #endif /* chips */ 7779 7780 #if defined(BCM_56725_A0) 7781 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56725_A0fmt */ 7782 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7783 /* nFields */ 11, 7784 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56820_A0fmt_fields, 7785 /* bits */ 22, 7786 /* flags */ 0, 7787 }, 7788 #endif /* chips */ 7789 7790 #if defined(BCM_56820_A0) 7791 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56820_A0fmt */ 7792 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7793 /* nFields */ 11, 7794 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56820_A0fmt_fields, 7795 /* bits */ 22, 7796 /* flags */ 0, 7797 }, 7798 #endif /* chips */ 7799 7800 #if defined(BCM_56840_A0) 7801 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56840_A0fmt */ 7802 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7803 /* nFields */ 10, 7804 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56840_A0fmt_fields, 7805 /* bits */ 23, 7806 /* flags */ 0, 7807 }, 7808 #endif /* chips */ 7809 7810 #if defined(BCM_56840_B0) 7811 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56840_B0fmt */ 7812 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7813 /* nFields */ 10, 7814 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56840_B0fmt_fields, 7815 /* bits */ 24, 7816 /* flags */ 0, 7817 }, 7818 #endif /* chips */ 7819 7820 #if defined(BCM_56850_A0) 7821 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56850_A0fmt */ 7822 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7823 /* nFields */ 11, 7824 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56850_A0fmt_fields, 7825 /* bits */ 26, 7826 /* flags */ 0, 7827 }, 7828 #endif /* chips */ 7829 7830 #if defined(BCM_56860_A0) 7831 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_REP_INFO_BCM56860_A0fmt */ 7832 /* format TOQ_TO_DEQ_REP_INFOfmt */ 7833 /* nFields */ 12, 7834 /* *fields */ soc_TOQ_TO_DEQ_REP_INFO_BCM56860_A0fmt_fields, 7835 /* bits */ 27, 7836 /* flags */ 0, 7837 }, 7838 #endif /* chips */ 7839 7840 #if defined(BCM_56524_B0) || defined(BCM_56634_A0) || \ 7841 defined(BCM_56634_B0) || defined(BCM_56685_A0) || \ 7842 defined(BCM_56685_B0) 7843 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_WLP_INFOfmt */ 7844 /* format TOQ_TO_DEQ_WLP_INFOfmt */ 7845 /* nFields */ 3, 7846 /* *fields */ soc_TOQ_TO_DEQ_WLP_INFOfmt_fields, 7847 /* bits */ 3, 7848 /* flags */ 0, 7849 }, 7850 #endif /* chips */ 7851 7852 #if defined(BCM_56340_A0) 7853 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_WLP_INFO_BCM56340_A0fmt */ 7854 /* format TOQ_TO_DEQ_WLP_INFOfmt */ 7855 /* nFields */ 4, 7856 /* *fields */ soc_TOQ_TO_DEQ_WLP_INFO_BCM56640_A0fmt_fields, 7857 /* bits */ 4, 7858 /* flags */ 0, 7859 }, 7860 #endif /* chips */ 7861 7862 #if defined(BCM_56524_A0) 7863 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_WLP_INFO_BCM56524_A0fmt */ 7864 /* format TOQ_TO_DEQ_WLP_INFOfmt */ 7865 /* nFields */ 3, 7866 /* *fields */ soc_TOQ_TO_DEQ_WLP_INFOfmt_fields, 7867 /* bits */ 3, 7868 /* flags */ 0, 7869 }, 7870 #endif /* chips */ 7871 7872 #if defined(BCM_56640_A0) 7873 { /* SOC_FORMAT_INT_TOQ_TO_DEQ_WLP_INFO_BCM56640_A0fmt */ 7874 /* format TOQ_TO_DEQ_WLP_INFOfmt */ 7875 /* nFields */ 4, 7876 /* *fields */ soc_TOQ_TO_DEQ_WLP_INFO_BCM56640_A0fmt_fields, 7877 /* bits */ 4, 7878 /* flags */ 0, 7879 }, 7880 #endif /* chips */ 7881 7882 #if defined(BCM_56960_A0) || defined(BCM_56965_A0) 7883 { /* SOC_FORMAT_INT_TOQ_TO_DQS_CELL_INFOfmt */ 7884 /* format TOQ_TO_DQS_CELL_INFOfmt */ 7885 /* nFields */ 12, 7886 /* *fields */ soc_TOQ_TO_DQS_CELL_INFOfmt_fields, 7887 /* bits */ 44, 7888 /* flags */ 0, 7889 }, 7890 #endif /* chips */ 7891 7892 #if defined(BCM_56370_A0) 7893 { /* SOC_FORMAT_INT_TOQ_TO_DQS_CELL_INFO_BCM56370_A0fmt */ 7894 /* format TOQ_TO_DQS_CELL_INFOfmt */ 7895 /* nFields */ 14, 7896 /* *fields */ soc_TOQ_TO_DQS_CELL_INFO_BCM56370_A0fmt_fields, 7897 /* bits */ 55, 7898 /* flags */ 0, 7899 }, 7900 #endif /* chips */ 7901 7902 #if defined(BCM_56770_A0) 7903 { /* SOC_FORMAT_INT_TOQ_TO_DQS_CELL_INFO_BCM56770_A0fmt */ 7904 /* format TOQ_TO_DQS_CELL_INFOfmt */ 7905 /* nFields */ 12, 7906 /* *fields */ soc_TOQ_TO_DQS_CELL_INFO_BCM56870_A0fmt_fields, 7907 /* bits */ 49, 7908 /* flags */ 0, 7909 }, 7910 #endif /* chips */ 7911 7912 #if defined(BCM_56870_A0) 7913 { /* SOC_FORMAT_INT_TOQ_TO_DQS_CELL_INFO_BCM56870_A0fmt */ 7914 /* format TOQ_TO_DQS_CELL_INFOfmt */ 7915 /* nFields */ 12, 7916 /* *fields */ soc_TOQ_TO_DQS_CELL_INFO_BCM56870_A0fmt_fields, 7917 /* bits */ 49, 7918 /* flags */ 0, 7919 }, 7920 #endif /* chips */ 7921 7922 #if defined(BCM_56970_A0) 7923 { /* SOC_FORMAT_INT_TOQ_TO_DQS_CELL_INFO_BCM56970_A0fmt */ 7924 /* format TOQ_TO_DQS_CELL_INFOfmt */ 7925 /* nFields */ 12, 7926 /* *fields */ soc_TOQ_TO_DQS_CELL_INFO_BCM56970_A0fmt_fields, 7927 /* bits */ 45, 7928 /* flags */ 0, 7929 }, 7930 #endif /* chips */ 7931 7932 #if defined(BCM_56370_A0) || defined(BCM_56960_A0) || \ 7933 defined(BCM_56965_A0) || defined(BCM_56970_A0) 7934 { /* SOC_FORMAT_INT_TOQ_TO_DQS_REP_INFOfmt */ 7935 /* format TOQ_TO_DQS_REP_INFOfmt */ 7936 /* nFields */ 13, 7937 /* *fields */ soc_TOQ_TO_DQS_REP_INFOfmt_fields, 7938 /* bits */ 27, 7939 /* flags */ 0, 7940 }, 7941 #endif /* chips */ 7942 7943 #if defined(BCM_56770_A0) 7944 { /* SOC_FORMAT_INT_TOQ_TO_DQS_REP_INFO_BCM56770_A0fmt */ 7945 /* format TOQ_TO_DQS_REP_INFOfmt */ 7946 /* nFields */ 13, 7947 /* *fields */ soc_TOQ_TO_DQS_REP_INFO_BCM56870_A0fmt_fields, 7948 /* bits */ 27, 7949 /* flags */ 0, 7950 }, 7951 #endif /* chips */ 7952 7953 #if defined(BCM_56870_A0) 7954 { /* SOC_FORMAT_INT_TOQ_TO_DQS_REP_INFO_BCM56870_A0fmt */ 7955 /* format TOQ_TO_DQS_REP_INFOfmt */ 7956 /* nFields */ 13, 7957 /* *fields */ soc_TOQ_TO_DQS_REP_INFO_BCM56870_A0fmt_fields, 7958 /* bits */ 27, 7959 /* flags */ 0, 7960 }, 7961 #endif /* chips */ 7962 7963 #if defined(BCM_56524_B0) || defined(BCM_56634_A0) || \ 7964 defined(BCM_56634_B0) || defined(BCM_56685_A0) || \ 7965 defined(BCM_56685_B0) 7966 { /* SOC_FORMAT_INT_TOQ_TO_RDEfmt */ 7967 /* format TOQ_TO_RDEfmt */ 7968 /* nFields */ 1, 7969 /* *fields */ soc_TOQ_TO_RDEfmt_fields, 7970 /* bits */ 8, 7971 /* flags */ 0, 7972 }, 7973 #endif /* chips */ 7974 7975 #if defined(BCM_56524_A0) 7976 { /* SOC_FORMAT_INT_TOQ_TO_RDE_BCM56524_A0fmt */ 7977 /* format TOQ_TO_RDEfmt */ 7978 /* nFields */ 1, 7979 /* *fields */ soc_TOQ_TO_RDEfmt_fields, 7980 /* bits */ 8, 7981 /* flags */ 0, 7982 }, 7983 #endif /* chips */ 7984 7985 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 7986 { /* SOC_FORMAT_INT_TOQ_TO_THDMfmt */ 7987 /* format TOQ_TO_THDMfmt */ 7988 /* nFields */ 3, 7989 /* *fields */ soc_TOQ_TO_THDMfmt_fields, 7990 /* bits */ 19, 7991 /* flags */ 0, 7992 }, 7993 #endif /* chips */ 7994 7995 #if defined(BCM_56370_A0) 7996 { /* SOC_FORMAT_INT_TOQ_TO_THDM_BCM56370_A0fmt */ 7997 /* format TOQ_TO_THDMfmt */ 7998 /* nFields */ 3, 7999 /* *fields */ soc_TOQ_TO_THDM_BCM56960_A0fmt_fields, 8000 /* bits */ 19, 8001 /* flags */ 0, 8002 }, 8003 #endif /* chips */ 8004 8005 #if defined(BCM_56560_A0) 8006 { /* SOC_FORMAT_INT_TOQ_TO_THDM_BCM56560_A0fmt */ 8007 /* format TOQ_TO_THDMfmt */ 8008 /* nFields */ 3, 8009 /* *fields */ soc_TOQ_TO_THDM_BCM56560_A0fmt_fields, 8010 /* bits */ 23, 8011 /* flags */ 0, 8012 }, 8013 #endif /* chips */ 8014 8015 #if defined(BCM_56560_B0) 8016 { /* SOC_FORMAT_INT_TOQ_TO_THDM_BCM56560_B0fmt */ 8017 /* format TOQ_TO_THDMfmt */ 8018 /* nFields */ 3, 8019 /* *fields */ soc_TOQ_TO_THDM_BCM56560_A0fmt_fields, 8020 /* bits */ 23, 8021 /* flags */ 0, 8022 }, 8023 #endif /* chips */ 8024 8025 #if defined(BCM_56670_A0) 8026 { /* SOC_FORMAT_INT_TOQ_TO_THDM_BCM56670_A0fmt */ 8027 /* format TOQ_TO_THDMfmt */ 8028 /* nFields */ 3, 8029 /* *fields */ soc_TOQ_TO_THDM_BCM56560_A0fmt_fields, 8030 /* bits */ 23, 8031 /* flags */ 0, 8032 }, 8033 #endif /* chips */ 8034 8035 #if defined(BCM_56670_B0) 8036 { /* SOC_FORMAT_INT_TOQ_TO_THDM_BCM56670_B0fmt */ 8037 /* format TOQ_TO_THDMfmt */ 8038 /* nFields */ 3, 8039 /* *fields */ soc_TOQ_TO_THDM_BCM56560_A0fmt_fields, 8040 /* bits */ 23, 8041 /* flags */ 0, 8042 }, 8043 #endif /* chips */ 8044 8045 #if defined(BCM_56770_A0) 8046 { /* SOC_FORMAT_INT_TOQ_TO_THDM_BCM56770_A0fmt */ 8047 /* format TOQ_TO_THDMfmt */ 8048 /* nFields */ 3, 8049 /* *fields */ soc_TOQ_TO_THDM_BCM56870_A0fmt_fields, 8050 /* bits */ 18, 8051 /* flags */ 0, 8052 }, 8053 #endif /* chips */ 8054 8055 #if defined(BCM_56870_A0) 8056 { /* SOC_FORMAT_INT_TOQ_TO_THDM_BCM56870_A0fmt */ 8057 /* format TOQ_TO_THDMfmt */ 8058 /* nFields */ 3, 8059 /* *fields */ soc_TOQ_TO_THDM_BCM56870_A0fmt_fields, 8060 /* bits */ 18, 8061 /* flags */ 0, 8062 }, 8063 #endif /* chips */ 8064 8065 #if defined(BCM_56960_A0) 8066 { /* SOC_FORMAT_INT_TOQ_TO_THDM_BCM56960_A0fmt */ 8067 /* format TOQ_TO_THDMfmt */ 8068 /* nFields */ 3, 8069 /* *fields */ soc_TOQ_TO_THDM_BCM56960_A0fmt_fields, 8070 /* bits */ 19, 8071 /* flags */ 0, 8072 }, 8073 #endif /* chips */ 8074 8075 #if defined(BCM_56965_A0) 8076 { /* SOC_FORMAT_INT_TOQ_TO_THDM_BCM56965_A0fmt */ 8077 /* format TOQ_TO_THDMfmt */ 8078 /* nFields */ 3, 8079 /* *fields */ soc_TOQ_TO_THDM_BCM56960_A0fmt_fields, 8080 /* bits */ 19, 8081 /* flags */ 0, 8082 }, 8083 #endif /* chips */ 8084 8085 #if defined(BCM_56970_A0) 8086 { /* SOC_FORMAT_INT_TOQ_TO_THDM_BCM56970_A0fmt */ 8087 /* format TOQ_TO_THDMfmt */ 8088 /* nFields */ 3, 8089 /* *fields */ soc_TOQ_TO_THDM_BCM56970_A0fmt_fields, 8090 /* bits */ 16, 8091 /* flags */ 0, 8092 }, 8093 #endif /* chips */ 8094 8095 #if defined(BCM_56634_A0) || defined(BCM_56634_B0) 8096 { /* SOC_FORMAT_INT_TOQ_WLP_SAVED_INFOfmt */ 8097 /* format TOQ_WLP_SAVED_INFOfmt */ 8098 /* nFields */ 6, 8099 /* *fields */ soc_TOQ_WLP_SAVED_INFOfmt_fields, 8100 /* bits */ 38, 8101 /* flags */ 0, 8102 }, 8103 #endif /* chips */ 8104 8105 #if defined(BCM_56524_A0) 8106 { /* SOC_FORMAT_INT_TOQ_WLP_SAVED_INFO_BCM56524_A0fmt */ 8107 /* format TOQ_WLP_SAVED_INFOfmt */ 8108 /* nFields */ 6, 8109 /* *fields */ soc_TOQ_WLP_SAVED_INFOfmt_fields, 8110 /* bits */ 38, 8111 /* flags */ 0, 8112 }, 8113 #endif /* chips */ 8114 8115 #if defined(BCM_56524_B0) 8116 { /* SOC_FORMAT_INT_TOQ_WLP_SAVED_INFO_BCM56524_B0fmt */ 8117 /* format TOQ_WLP_SAVED_INFOfmt */ 8118 /* nFields */ 6, 8119 /* *fields */ soc_TOQ_WLP_SAVED_INFOfmt_fields, 8120 /* bits */ 38, 8121 /* flags */ 0, 8122 }, 8123 #endif /* chips */ 8124 8125 #if defined(BCM_56685_A0) 8126 { /* SOC_FORMAT_INT_TOQ_WLP_SAVED_INFO_BCM56685_A0fmt */ 8127 /* format TOQ_WLP_SAVED_INFOfmt */ 8128 /* nFields */ 6, 8129 /* *fields */ soc_TOQ_WLP_SAVED_INFOfmt_fields, 8130 /* bits */ 38, 8131 /* flags */ 0, 8132 }, 8133 #endif /* chips */ 8134 8135 #if defined(BCM_56685_B0) 8136 { /* SOC_FORMAT_INT_TOQ_WLP_SAVED_INFO_BCM56685_B0fmt */ 8137 /* format TOQ_WLP_SAVED_INFOfmt */ 8138 /* nFields */ 6, 8139 /* *fields */ soc_TOQ_WLP_SAVED_INFOfmt_fields, 8140 /* bits */ 38, 8141 /* flags */ 0, 8142 }, 8143 #endif /* chips */ 8144 8145 #if defined(BCM_56150_A0) || defined(BCM_56340_A0) || \ 8146 defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 8147 defined(BCM_56450_B1) || defined(BCM_56640_A0) || \ 8148 defined(BCM_56850_A0) || defined(BCM_56860_A0) 8149 { /* SOC_FORMAT_INT_TRILLfmt */ 8150 /* format TRILLfmt */ 8151 /* nFields */ 1, 8152 /* *fields */ soc_TRILLfmt_fields, 8153 /* bits */ 5, 8154 /* flags */ 0, 8155 }, 8156 #endif /* chips */ 8157 8158 #if defined(BCM_53400_A0) 8159 { /* SOC_FORMAT_INT_TRILL_BCM53400_A0fmt */ 8160 /* format TRILLfmt */ 8161 /* nFields */ 1, 8162 /* *fields */ soc_MMU_TO_IP_HOL_STATUS_EXT16_BCM53400_A0fmt_fields, 8163 /* bits */ 5, 8164 /* flags */ 0, 8165 }, 8166 #endif /* chips */ 8167 8168 #if defined(BCM_53540_A0) 8169 { /* SOC_FORMAT_INT_TRILL_BCM53540_A0fmt */ 8170 /* format TRILLfmt */ 8171 /* nFields */ 1, 8172 /* *fields */ soc_MMU_TO_IP_HOL_STATUS_EXT16_BCM53400_A0fmt_fields, 8173 /* bits */ 5, 8174 /* flags */ 0, 8175 }, 8176 #endif /* chips */ 8177 8178 #if defined(BCM_53570_A0) 8179 { /* SOC_FORMAT_INT_TRILL_BCM53570_A0fmt */ 8180 /* format TRILLfmt */ 8181 /* nFields */ 1, 8182 /* *fields */ soc_MMU_TO_IP_HOL_STATUS_EXT16_BCM53400_A0fmt_fields, 8183 /* bits */ 5, 8184 /* flags */ 0, 8185 }, 8186 #endif /* chips */ 8187 8188 #if defined(BCM_53570_B0) 8189 { /* SOC_FORMAT_INT_TRILL_BCM53570_B0fmt */ 8190 /* format TRILLfmt */ 8191 /* nFields */ 1, 8192 /* *fields */ soc_MMU_TO_IP_HOL_STATUS_EXT16_BCM53400_A0fmt_fields, 8193 /* bits */ 5, 8194 /* flags */ 0, 8195 }, 8196 #endif /* chips */ 8197 8198 #if defined(BCM_56160_A0) 8199 { /* SOC_FORMAT_INT_TRILL_BCM56160_A0fmt */ 8200 /* format TRILLfmt */ 8201 /* nFields */ 1, 8202 /* *fields */ soc_MMU_TO_IP_HOL_STATUS_EXT16_BCM53400_A0fmt_fields, 8203 /* bits */ 5, 8204 /* flags */ 0, 8205 }, 8206 #endif /* chips */ 8207 8208 #if defined(BCM_56260_A0) 8209 { /* SOC_FORMAT_INT_TRILL_BCM56260_A0fmt */ 8210 /* format TRILLfmt */ 8211 /* nFields */ 1, 8212 /* *fields */ soc_MMU_TO_IP_HOL_STATUS_EXT16_BCM53400_A0fmt_fields, 8213 /* bits */ 5, 8214 /* flags */ 0, 8215 }, 8216 #endif /* chips */ 8217 8218 #if defined(BCM_56260_B0) 8219 { /* SOC_FORMAT_INT_TRILL_BCM56260_B0fmt */ 8220 /* format TRILLfmt */ 8221 /* nFields */ 1, 8222 /* *fields */ soc_MMU_TO_IP_HOL_STATUS_EXT16_BCM53400_A0fmt_fields, 8223 /* bits */ 5, 8224 /* flags */ 0, 8225 }, 8226 #endif /* chips */ 8227 8228 #if defined(BCM_56270_A0) 8229 { /* SOC_FORMAT_INT_TRILL_BCM56270_A0fmt */ 8230 /* format TRILLfmt */ 8231 /* nFields */ 1, 8232 /* *fields */ soc_MMU_TO_IP_HOL_STATUS_EXT16_BCM53400_A0fmt_fields, 8233 /* bits */ 5, 8234 /* flags */ 0, 8235 }, 8236 #endif /* chips */ 8237 8238 #if defined(BCM_56560_A0) 8239 { /* SOC_FORMAT_INT_TRILL_BCM56560_A0fmt */ 8240 /* format TRILLfmt */ 8241 /* nFields */ 1, 8242 /* *fields */ soc_MMU_TO_IP_HOL_STATUS_EXT16_BCM53400_A0fmt_fields, 8243 /* bits */ 5, 8244 /* flags */ 0, 8245 }, 8246 #endif /* chips */ 8247 8248 #if defined(BCM_56560_B0) 8249 { /* SOC_FORMAT_INT_TRILL_BCM56560_B0fmt */ 8250 /* format TRILLfmt */ 8251 /* nFields */ 1, 8252 /* *fields */ soc_MMU_TO_IP_HOL_STATUS_EXT16_BCM53400_A0fmt_fields, 8253 /* bits */ 5, 8254 /* flags */ 0, 8255 }, 8256 #endif /* chips */ 8257 8258 #if defined(BCM_56670_A0) 8259 { /* SOC_FORMAT_INT_TRILL_BCM56670_A0fmt */ 8260 /* format TRILLfmt */ 8261 /* nFields */ 1, 8262 /* *fields */ soc_MMU_TO_IP_HOL_STATUS_EXT16_BCM53400_A0fmt_fields, 8263 /* bits */ 5, 8264 /* flags */ 0, 8265 }, 8266 #endif /* chips */ 8267 8268 #if defined(BCM_56670_B0) 8269 { /* SOC_FORMAT_INT_TRILL_BCM56670_B0fmt */ 8270 /* format TRILLfmt */ 8271 /* nFields */ 1, 8272 /* *fields */ soc_MMU_TO_IP_HOL_STATUS_EXT16_BCM53400_A0fmt_fields, 8273 /* bits */ 5, 8274 /* flags */ 0, 8275 }, 8276 #endif /* chips */ 8277 8278 #if defined(BCM_56960_A0) 8279 { /* SOC_FORMAT_INT_TRILL_BCM56960_A0fmt */ 8280 /* format TRILLfmt */ 8281 /* nFields */ 1, 8282 /* *fields */ soc_MMU_TO_IP_HOL_STATUS_EXT16_BCM53400_A0fmt_fields, 8283 /* bits */ 5, 8284 /* flags */ 0, 8285 }, 8286 #endif /* chips */ 8287 8288 #if defined(BCM_56965_A0) 8289 { /* SOC_FORMAT_INT_TRILL_BCM56965_A0fmt */ 8290 /* format TRILLfmt */ 8291 /* nFields */ 1, 8292 /* *fields */ soc_MMU_TO_IP_HOL_STATUS_EXT16_BCM53400_A0fmt_fields, 8293 /* bits */ 5, 8294 /* flags */ 0, 8295 }, 8296 #endif /* chips */ 8297 8298 #if defined(BCM_56970_A0) 8299 { /* SOC_FORMAT_INT_TRILL_BCM56970_A0fmt */ 8300 /* format TRILLfmt */ 8301 /* nFields */ 1, 8302 /* *fields */ soc_MMU_TO_IP_HOL_STATUS_EXT16_BCM53400_A0fmt_fields, 8303 /* bits */ 5, 8304 /* flags */ 0, 8305 }, 8306 #endif /* chips */ 8307 8308 #if defined(BCM_56980_A0) 8309 { /* SOC_FORMAT_INT_TRILL_BCM56980_A0fmt */ 8310 /* format TRILLfmt */ 8311 /* nFields */ 1, 8312 /* *fields */ soc_MMU_TO_IP_HOL_STATUS_EXT16_BCM53400_A0fmt_fields, 8313 /* bits */ 5, 8314 /* flags */ 0, 8315 }, 8316 #endif /* chips */ 8317 8318 #if defined(BCM_56980_B0) 8319 { /* SOC_FORMAT_INT_TRILL_BCM56980_B0fmt */ 8320 /* format TRILLfmt */ 8321 /* nFields */ 1, 8322 /* *fields */ soc_MMU_TO_IP_HOL_STATUS_EXT16_BCM53400_A0fmt_fields, 8323 /* bits */ 5, 8324 /* flags */ 0, 8325 }, 8326 #endif /* chips */ 8327 8328 #if defined(BCM_56840_A0) 8329 { /* SOC_FORMAT_INT_TRILL_CPU_OPCODE_ENCODINGfmt */ 8330 /* format TRILL_CPU_OPCODE_ENCODINGfmt */ 8331 /* nFields */ 1, 8332 /* *fields */ soc_NIV_CPU_OPCODE_ENCODINGfmt_fields, 8333 /* bits */ 3, 8334 /* flags */ 0, 8335 }, 8336 #endif /* chips */ 8337 8338 #if defined(BCM_56260_A0) 8339 { /* SOC_FORMAT_INT_TRILL_CPU_OPCODE_ENCODING_BCM56260_A0fmt */ 8340 /* format TRILL_CPU_OPCODE_ENCODINGfmt */ 8341 /* nFields */ 1, 8342 /* *fields */ soc_NIV_CPU_OPCODE_ENCODING_BCM53400_A0fmt_fields, 8343 /* bits */ 3, 8344 /* flags */ 0, 8345 }, 8346 #endif /* chips */ 8347 8348 #if defined(BCM_56260_B0) 8349 { /* SOC_FORMAT_INT_TRILL_CPU_OPCODE_ENCODING_BCM56260_B0fmt */ 8350 /* format TRILL_CPU_OPCODE_ENCODINGfmt */ 8351 /* nFields */ 1, 8352 /* *fields */ soc_NIV_CPU_OPCODE_ENCODING_BCM53400_A0fmt_fields, 8353 /* bits */ 3, 8354 /* flags */ 0, 8355 }, 8356 #endif /* chips */ 8357 8358 #if defined(BCM_56270_A0) 8359 { /* SOC_FORMAT_INT_TRILL_CPU_OPCODE_ENCODING_BCM56270_A0fmt */ 8360 /* format TRILL_CPU_OPCODE_ENCODINGfmt */ 8361 /* nFields */ 1, 8362 /* *fields */ soc_NIV_CPU_OPCODE_ENCODING_BCM53400_A0fmt_fields, 8363 /* bits */ 3, 8364 /* flags */ 0, 8365 }, 8366 #endif /* chips */ 8367 8368 #if defined(BCM_56440_A0) 8369 { /* SOC_FORMAT_INT_TRILL_CPU_OPCODE_ENCODING_BCM56440_A0fmt */ 8370 /* format TRILL_CPU_OPCODE_ENCODINGfmt */ 8371 /* nFields */ 1, 8372 /* *fields */ soc_NIV_CPU_OPCODE_ENCODINGfmt_fields, 8373 /* bits */ 3, 8374 /* flags */ 0, 8375 }, 8376 #endif /* chips */ 8377 8378 #if defined(BCM_56440_B0) 8379 { /* SOC_FORMAT_INT_TRILL_CPU_OPCODE_ENCODING_BCM56440_B0fmt */ 8380 /* format TRILL_CPU_OPCODE_ENCODINGfmt */ 8381 /* nFields */ 1, 8382 /* *fields */ soc_NIV_CPU_OPCODE_ENCODINGfmt_fields, 8383 /* bits */ 3, 8384 /* flags */ 0, 8385 }, 8386 #endif /* chips */ 8387 8388 #if defined(BCM_56450_A0) 8389 { /* SOC_FORMAT_INT_TRILL_CPU_OPCODE_ENCODING_BCM56450_A0fmt */ 8390 /* format TRILL_CPU_OPCODE_ENCODINGfmt */ 8391 /* nFields */ 1, 8392 /* *fields */ soc_EH_SEG_SEL_ENCODINGfmt_fields, 8393 /* bits */ 3, 8394 /* flags */ 0, 8395 }, 8396 #endif /* chips */ 8397 8398 #if defined(BCM_56450_B0) 8399 { /* SOC_FORMAT_INT_TRILL_CPU_OPCODE_ENCODING_BCM56450_B0fmt */ 8400 /* format TRILL_CPU_OPCODE_ENCODINGfmt */ 8401 /* nFields */ 1, 8402 /* *fields */ soc_EH_SEG_SEL_ENCODINGfmt_fields, 8403 /* bits */ 3, 8404 /* flags */ 0, 8405 }, 8406 #endif /* chips */ 8407 8408 #if defined(BCM_56450_B1) 8409 { /* SOC_FORMAT_INT_TRILL_CPU_OPCODE_ENCODING_BCM56450_B1fmt */ 8410 /* format TRILL_CPU_OPCODE_ENCODINGfmt */ 8411 /* nFields */ 1, 8412 /* *fields */ soc_EH_SEG_SEL_ENCODINGfmt_fields, 8413 /* bits */ 3, 8414 /* flags */ 0, 8415 }, 8416 #endif /* chips */ 8417 8418 #if defined(BCM_56560_A0) 8419 { /* SOC_FORMAT_INT_TRILL_CPU_OPCODE_ENCODING_BCM56560_A0fmt */ 8420 /* format TRILL_CPU_OPCODE_ENCODINGfmt */ 8421 /* nFields */ 1, 8422 /* *fields */ soc_NIV_CPU_OPCODE_ENCODING_BCM53400_A0fmt_fields, 8423 /* bits */ 3, 8424 /* flags */ 0, 8425 }, 8426 #endif /* chips */ 8427 8428 #if defined(BCM_56560_B0) 8429 { /* SOC_FORMAT_INT_TRILL_CPU_OPCODE_ENCODING_BCM56560_B0fmt */ 8430 /* format TRILL_CPU_OPCODE_ENCODINGfmt */ 8431 /* nFields */ 1, 8432 /* *fields */ soc_NIV_CPU_OPCODE_ENCODING_BCM53400_A0fmt_fields, 8433 /* bits */ 3, 8434 /* flags */ 0, 8435 }, 8436 #endif /* chips */ 8437 8438 #if defined(BCM_56670_A0) 8439 { /* SOC_FORMAT_INT_TRILL_CPU_OPCODE_ENCODING_BCM56670_A0fmt */ 8440 /* format TRILL_CPU_OPCODE_ENCODINGfmt */ 8441 /* nFields */ 1, 8442 /* *fields */ soc_NIV_CPU_OPCODE_ENCODING_BCM53400_A0fmt_fields, 8443 /* bits */ 3, 8444 /* flags */ 0, 8445 }, 8446 #endif /* chips */ 8447 8448 #if defined(BCM_56670_B0) 8449 { /* SOC_FORMAT_INT_TRILL_CPU_OPCODE_ENCODING_BCM56670_B0fmt */ 8450 /* format TRILL_CPU_OPCODE_ENCODINGfmt */ 8451 /* nFields */ 1, 8452 /* *fields */ soc_NIV_CPU_OPCODE_ENCODING_BCM53400_A0fmt_fields, 8453 /* bits */ 3, 8454 /* flags */ 0, 8455 }, 8456 #endif /* chips */ 8457 8458 #if defined(BCM_56840_B0) 8459 { /* SOC_FORMAT_INT_TRILL_CPU_OPCODE_ENCODING_BCM56840_B0fmt */ 8460 /* format TRILL_CPU_OPCODE_ENCODINGfmt */ 8461 /* nFields */ 1, 8462 /* *fields */ soc_NIV_CPU_OPCODE_ENCODINGfmt_fields, 8463 /* bits */ 3, 8464 /* flags */ 0, 8465 }, 8466 #endif /* chips */ 8467 8468 #if defined(BCM_56850_A0) 8469 { /* SOC_FORMAT_INT_TRILL_CPU_OPCODE_ENCODING_BCM56850_A0fmt */ 8470 /* format TRILL_CPU_OPCODE_ENCODINGfmt */ 8471 /* nFields */ 1, 8472 /* *fields */ soc_EH_SEG_SEL_ENCODINGfmt_fields, 8473 /* bits */ 3, 8474 /* flags */ 0, 8475 }, 8476 #endif /* chips */ 8477 8478 #if defined(BCM_56860_A0) 8479 { /* SOC_FORMAT_INT_TRILL_CPU_OPCODE_ENCODING_BCM56860_A0fmt */ 8480 /* format TRILL_CPU_OPCODE_ENCODINGfmt */ 8481 /* nFields */ 1, 8482 /* *fields */ soc_EH_SEG_SEL_ENCODINGfmt_fields, 8483 /* bits */ 3, 8484 /* flags */ 0, 8485 }, 8486 #endif /* chips */ 8487 8488 #if defined(BCM_56960_A0) 8489 { /* SOC_FORMAT_INT_TRILL_CPU_OPCODE_ENCODING_BCM56960_A0fmt */ 8490 /* format TRILL_CPU_OPCODE_ENCODINGfmt */ 8491 /* nFields */ 1, 8492 /* *fields */ soc_NIV_CPU_OPCODE_ENCODING_BCM53400_A0fmt_fields, 8493 /* bits */ 3, 8494 /* flags */ 0, 8495 }, 8496 #endif /* chips */ 8497 8498 #if defined(BCM_56965_A0) 8499 { /* SOC_FORMAT_INT_TRILL_CPU_OPCODE_ENCODING_BCM56965_A0fmt */ 8500 /* format TRILL_CPU_OPCODE_ENCODINGfmt */ 8501 /* nFields */ 1, 8502 /* *fields */ soc_NIV_CPU_OPCODE_ENCODING_BCM53400_A0fmt_fields, 8503 /* bits */ 3, 8504 /* flags */ 0, 8505 }, 8506 #endif /* chips */ 8507 8508 #if defined(BCM_56970_A0) 8509 { /* SOC_FORMAT_INT_TRILL_CPU_OPCODE_ENCODING_BCM56970_A0fmt */ 8510 /* format TRILL_CPU_OPCODE_ENCODINGfmt */ 8511 /* nFields */ 1, 8512 /* *fields */ soc_NIV_CPU_OPCODE_ENCODING_BCM53400_A0fmt_fields, 8513 /* bits */ 3, 8514 /* flags */ 0, 8515 }, 8516 #endif /* chips */ 8517 8518 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 8519 defined(BCM_56870_A0) 8520 { /* SOC_FORMAT_INT_TRILL_HDRfmt */ 8521 /* format TRILL_HDRfmt */ 8522 /* nFields */ 7, 8523 /* *fields */ soc_TRILL_HDRfmt_fields, 8524 /* bits */ 48, 8525 /* flags */ 0, 8526 }, 8527 #endif /* chips */ 8528 8529 #if defined(BCM_56960_A0) || defined(BCM_56965_A0) 8530 { /* SOC_FORMAT_INT_TRUNK_GROUP_RRLB_CNT_COV_DEFSfmt */ 8531 /* format TRUNK_GROUP_RRLB_CNT_COV_DEFSfmt */ 8532 /* nFields */ 6, 8533 /* *fields */ soc_TRUNK_GROUP_RRLB_CNT_COV_DEFSfmt_fields, 8534 /* bits */ 15, 8535 /* flags */ 0, 8536 }, 8537 #endif /* chips */ 8538 8539 #if defined(BCM_56370_A0) 8540 { /* SOC_FORMAT_INT_TRUNK_GROUP_RRLB_CNT_COV_DEFS_BCM56370_A0fmt */ 8541 /* format TRUNK_GROUP_RRLB_CNT_COV_DEFSfmt */ 8542 /* nFields */ 6, 8543 /* *fields */ soc_EGR_PERQ_XMT_COUNTERS_COV_DEFS_BCM56960_A0fmt_fields, 8544 /* bits */ 17, 8545 /* flags */ 0, 8546 }, 8547 #endif /* chips */ 8548 8549 #if defined(BCM_56770_A0) 8550 { /* SOC_FORMAT_INT_TRUNK_GROUP_RRLB_CNT_COV_DEFS_BCM56770_A0fmt */ 8551 /* format TRUNK_GROUP_RRLB_CNT_COV_DEFSfmt */ 8552 /* nFields */ 6, 8553 /* *fields */ soc_EGR_PERQ_XMT_COUNTERS_COV_DEFS_BCM56960_A0fmt_fields, 8554 /* bits */ 17, 8555 /* flags */ 0, 8556 }, 8557 #endif /* chips */ 8558 8559 #if defined(BCM_56870_A0) 8560 { /* SOC_FORMAT_INT_TRUNK_GROUP_RRLB_CNT_COV_DEFS_BCM56870_A0fmt */ 8561 /* format TRUNK_GROUP_RRLB_CNT_COV_DEFSfmt */ 8562 /* nFields */ 6, 8563 /* *fields */ soc_EGR_PERQ_XMT_COUNTERS_COV_DEFS_BCM56960_A0fmt_fields, 8564 /* bits */ 17, 8565 /* flags */ 0, 8566 }, 8567 #endif /* chips */ 8568 8569 #if defined(BCM_56970_A0) 8570 { /* SOC_FORMAT_INT_TRUNK_GROUP_RRLB_CNT_COV_DEFS_BCM56970_A0fmt */ 8571 /* format TRUNK_GROUP_RRLB_CNT_COV_DEFSfmt */ 8572 /* nFields */ 6, 8573 /* *fields */ soc_EFP_COUNTER_TABLE_COV_DEFS_BCM56960_A0fmt_fields, 8574 /* bits */ 16, 8575 /* flags */ 0, 8576 }, 8577 #endif /* chips */ 8578 8579 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 8580 defined(BCM_56870_A0) 8581 { /* SOC_FORMAT_INT_TTL_Bfmt */ 8582 /* format TTL_Bfmt */ 8583 /* nFields */ 1, 8584 /* *fields */ soc_TTL_Bfmt_fields, 8585 /* bits */ 1, 8586 /* flags */ 0, 8587 }, 8588 #endif /* chips */ 8589 8590 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 8591 defined(BCM_56870_A0) 8592 { /* SOC_FORMAT_INT_TTL_B_ACTION_SETfmt */ 8593 /* format TTL_B_ACTION_SETfmt */ 8594 /* nFields */ 6, 8595 /* *fields */ soc_TTL_B_ACTION_SETfmt_fields, 8596 /* bits */ 12, 8597 /* flags */ 0, 8598 }, 8599 #endif /* chips */ 8600 8601 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 8602 defined(BCM_56870_A0) 8603 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_1_FIXED_KEY_TABLE_ATTRS_INDEXfmt */ 8604 /* format TUNNEL_ADAPT_1_FIXED_KEY_TABLE_ATTRS_INDEXfmt */ 8605 /* nFields */ 5, 8606 /* *fields */ soc_TUNNEL_ADAPT_1_FIXED_KEY_TABLE_ATTRS_INDEXfmt_fields, 8607 /* bits */ 9, 8608 /* flags */ 0, 8609 }, 8610 #endif /* chips */ 8611 8612 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 8613 defined(BCM_56870_A0) 8614 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_1_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 8615 /* format TUNNEL_ADAPT_1_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 8616 /* nFields */ 7, 8617 /* *fields */ soc_TUNNEL_ADAPT_1_FLEX_KEY_GEN_IN_CONTROL_BUSfmt_fields, 8618 /* bits */ 120, 8619 /* flags */ 0, 8620 }, 8621 #endif /* chips */ 8622 8623 #if defined(BCM_56870_A0) 8624 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_1_FLEX_KEY_GEN_OUT_BUSfmt */ 8625 /* format TUNNEL_ADAPT_1_FLEX_KEY_GEN_OUT_BUSfmt */ 8626 /* nFields */ 8, 8627 /* *fields */ soc_EGR_ADAPT_1_FLEX_KEY_GEN_OUT_BUSfmt_fields, 8628 /* bits */ 256, 8629 /* flags */ 0, 8630 }, 8631 #endif /* chips */ 8632 8633 #if defined(BCM_56370_A0) 8634 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_1_FLEX_KEY_GEN_OUT_BUS_BCM56370_A0fmt */ 8635 /* format TUNNEL_ADAPT_1_FLEX_KEY_GEN_OUT_BUSfmt */ 8636 /* nFields */ 8, 8637 /* *fields */ soc_EGR_ADAPT_1_FLEX_KEY_GEN_OUT_BUSfmt_fields, 8638 /* bits */ 256, 8639 /* flags */ 0, 8640 }, 8641 #endif /* chips */ 8642 8643 #if defined(BCM_56770_A0) 8644 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_1_FLEX_KEY_GEN_OUT_BUS_BCM56770_A0fmt */ 8645 /* format TUNNEL_ADAPT_1_FLEX_KEY_GEN_OUT_BUSfmt */ 8646 /* nFields */ 8, 8647 /* *fields */ soc_EGR_ADAPT_1_FLEX_KEY_GEN_OUT_BUSfmt_fields, 8648 /* bits */ 256, 8649 /* flags */ 0, 8650 }, 8651 #endif /* chips */ 8652 8653 #if defined(BCM_56870_A0) 8654 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_1_PDD_OUT_BUSfmt */ 8655 /* format TUNNEL_ADAPT_1_PDD_OUT_BUSfmt */ 8656 /* nFields */ 112, 8657 /* *fields */ soc_TUNNEL_ADAPT_1_PDD_OUT_BUSfmt_fields, 8658 /* bits */ 418, 8659 /* flags */ 0, 8660 }, 8661 #endif /* chips */ 8662 8663 #if defined(BCM_56370_A0) 8664 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_1_PDD_OUT_BUS_BCM56370_A0fmt */ 8665 /* format TUNNEL_ADAPT_1_PDD_OUT_BUSfmt */ 8666 /* nFields */ 113, 8667 /* *fields */ soc_TUNNEL_ADAPT_1_PDD_OUT_BUS_BCM56370_A0fmt_fields, 8668 /* bits */ 423, 8669 /* flags */ 0, 8670 }, 8671 #endif /* chips */ 8672 8673 #if defined(BCM_56770_A0) 8674 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_1_PDD_OUT_BUS_BCM56770_A0fmt */ 8675 /* format TUNNEL_ADAPT_1_PDD_OUT_BUSfmt */ 8676 /* nFields */ 113, 8677 /* *fields */ soc_TUNNEL_ADAPT_1_PDD_OUT_BUS_BCM56770_A0fmt_fields, 8678 /* bits */ 426, 8679 /* flags */ 0, 8680 }, 8681 #endif /* chips */ 8682 8683 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 8684 defined(BCM_56870_A0) 8685 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_2_FIXED_KEY_TABLE_ATTRS_INDEXfmt */ 8686 /* format TUNNEL_ADAPT_2_FIXED_KEY_TABLE_ATTRS_INDEXfmt */ 8687 /* nFields */ 3, 8688 /* *fields */ soc_TUNNEL_ADAPT_2_FIXED_KEY_TABLE_ATTRS_INDEXfmt_fields, 8689 /* bits */ 9, 8690 /* flags */ 0, 8691 }, 8692 #endif /* chips */ 8693 8694 #if defined(BCM_56870_A0) 8695 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_2_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 8696 /* format TUNNEL_ADAPT_2_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 8697 /* nFields */ 7, 8698 /* *fields */ soc_TUNNEL_ADAPT_1_FLEX_KEY_GEN_IN_CONTROL_BUSfmt_fields, 8699 /* bits */ 120, 8700 /* flags */ 0, 8701 }, 8702 #endif /* chips */ 8703 8704 #if defined(BCM_56370_A0) 8705 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_2_FLEX_KEY_GEN_IN_CONTROL_BUS_BCM56370_A0fmt */ 8706 /* format TUNNEL_ADAPT_2_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 8707 /* nFields */ 7, 8708 /* *fields */ soc_TUNNEL_ADAPT_1_FLEX_KEY_GEN_IN_CONTROL_BUSfmt_fields, 8709 /* bits */ 120, 8710 /* flags */ 0, 8711 }, 8712 #endif /* chips */ 8713 8714 #if defined(BCM_56770_A0) 8715 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_2_FLEX_KEY_GEN_IN_CONTROL_BUS_BCM56770_A0fmt */ 8716 /* format TUNNEL_ADAPT_2_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 8717 /* nFields */ 7, 8718 /* *fields */ soc_TUNNEL_ADAPT_1_FLEX_KEY_GEN_IN_CONTROL_BUSfmt_fields, 8719 /* bits */ 120, 8720 /* flags */ 0, 8721 }, 8722 #endif /* chips */ 8723 8724 #if defined(BCM_56870_A0) 8725 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_2_FLEX_KEY_GEN_OUT_BUSfmt */ 8726 /* format TUNNEL_ADAPT_2_FLEX_KEY_GEN_OUT_BUSfmt */ 8727 /* nFields */ 8, 8728 /* *fields */ soc_EGR_ADAPT_1_FLEX_KEY_GEN_OUT_BUSfmt_fields, 8729 /* bits */ 256, 8730 /* flags */ 0, 8731 }, 8732 #endif /* chips */ 8733 8734 #if defined(BCM_56370_A0) 8735 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_2_FLEX_KEY_GEN_OUT_BUS_BCM56370_A0fmt */ 8736 /* format TUNNEL_ADAPT_2_FLEX_KEY_GEN_OUT_BUSfmt */ 8737 /* nFields */ 8, 8738 /* *fields */ soc_EGR_ADAPT_1_FLEX_KEY_GEN_OUT_BUSfmt_fields, 8739 /* bits */ 256, 8740 /* flags */ 0, 8741 }, 8742 #endif /* chips */ 8743 8744 #if defined(BCM_56770_A0) 8745 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_2_FLEX_KEY_GEN_OUT_BUS_BCM56770_A0fmt */ 8746 /* format TUNNEL_ADAPT_2_FLEX_KEY_GEN_OUT_BUSfmt */ 8747 /* nFields */ 8, 8748 /* *fields */ soc_EGR_ADAPT_1_FLEX_KEY_GEN_OUT_BUSfmt_fields, 8749 /* bits */ 256, 8750 /* flags */ 0, 8751 }, 8752 #endif /* chips */ 8753 8754 #if defined(BCM_56870_A0) 8755 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_2_PDD_OUT_BUSfmt */ 8756 /* format TUNNEL_ADAPT_2_PDD_OUT_BUSfmt */ 8757 /* nFields */ 108, 8758 /* *fields */ soc_TUNNEL_ADAPT_2_PDD_OUT_BUSfmt_fields, 8759 /* bits */ 300, 8760 /* flags */ 0, 8761 }, 8762 #endif /* chips */ 8763 8764 #if defined(BCM_56370_A0) 8765 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_2_PDD_OUT_BUS_BCM56370_A0fmt */ 8766 /* format TUNNEL_ADAPT_2_PDD_OUT_BUSfmt */ 8767 /* nFields */ 109, 8768 /* *fields */ soc_TUNNEL_ADAPT_2_PDD_OUT_BUS_BCM56370_A0fmt_fields, 8769 /* bits */ 305, 8770 /* flags */ 0, 8771 }, 8772 #endif /* chips */ 8773 8774 #if defined(BCM_56770_A0) 8775 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_2_PDD_OUT_BUS_BCM56770_A0fmt */ 8776 /* format TUNNEL_ADAPT_2_PDD_OUT_BUSfmt */ 8777 /* nFields */ 109, 8778 /* *fields */ soc_TUNNEL_ADAPT_2_PDD_OUT_BUS_BCM56770_A0fmt_fields, 8779 /* bits */ 308, 8780 /* flags */ 0, 8781 }, 8782 #endif /* chips */ 8783 8784 #if defined(BCM_56870_A0) 8785 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_3_FIXED_KEY_TABLE_ATTRS_INDEXfmt */ 8786 /* format TUNNEL_ADAPT_3_FIXED_KEY_TABLE_ATTRS_INDEXfmt */ 8787 /* nFields */ 3, 8788 /* *fields */ soc_TUNNEL_ADAPT_2_FIXED_KEY_TABLE_ATTRS_INDEXfmt_fields, 8789 /* bits */ 9, 8790 /* flags */ 0, 8791 }, 8792 #endif /* chips */ 8793 8794 #if defined(BCM_56370_A0) 8795 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_3_FIXED_KEY_TABLE_ATTRS_INDEX_BCM56370_A0fmt */ 8796 /* format TUNNEL_ADAPT_3_FIXED_KEY_TABLE_ATTRS_INDEXfmt */ 8797 /* nFields */ 3, 8798 /* *fields */ soc_TUNNEL_ADAPT_2_FIXED_KEY_TABLE_ATTRS_INDEXfmt_fields, 8799 /* bits */ 9, 8800 /* flags */ 0, 8801 }, 8802 #endif /* chips */ 8803 8804 #if defined(BCM_56770_A0) 8805 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_3_FIXED_KEY_TABLE_ATTRS_INDEX_BCM56770_A0fmt */ 8806 /* format TUNNEL_ADAPT_3_FIXED_KEY_TABLE_ATTRS_INDEXfmt */ 8807 /* nFields */ 3, 8808 /* *fields */ soc_TUNNEL_ADAPT_2_FIXED_KEY_TABLE_ATTRS_INDEXfmt_fields, 8809 /* bits */ 9, 8810 /* flags */ 0, 8811 }, 8812 #endif /* chips */ 8813 8814 #if defined(BCM_56870_A0) 8815 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_3_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 8816 /* format TUNNEL_ADAPT_3_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 8817 /* nFields */ 7, 8818 /* *fields */ soc_TUNNEL_ADAPT_1_FLEX_KEY_GEN_IN_CONTROL_BUSfmt_fields, 8819 /* bits */ 120, 8820 /* flags */ 0, 8821 }, 8822 #endif /* chips */ 8823 8824 #if defined(BCM_56370_A0) 8825 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_3_FLEX_KEY_GEN_IN_CONTROL_BUS_BCM56370_A0fmt */ 8826 /* format TUNNEL_ADAPT_3_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 8827 /* nFields */ 7, 8828 /* *fields */ soc_TUNNEL_ADAPT_1_FLEX_KEY_GEN_IN_CONTROL_BUSfmt_fields, 8829 /* bits */ 120, 8830 /* flags */ 0, 8831 }, 8832 #endif /* chips */ 8833 8834 #if defined(BCM_56770_A0) 8835 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_3_FLEX_KEY_GEN_IN_CONTROL_BUS_BCM56770_A0fmt */ 8836 /* format TUNNEL_ADAPT_3_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 8837 /* nFields */ 7, 8838 /* *fields */ soc_TUNNEL_ADAPT_1_FLEX_KEY_GEN_IN_CONTROL_BUSfmt_fields, 8839 /* bits */ 120, 8840 /* flags */ 0, 8841 }, 8842 #endif /* chips */ 8843 8844 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 8845 defined(BCM_56870_A0) 8846 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_3_FLEX_KEY_GEN_OUT_BUSfmt */ 8847 /* format TUNNEL_ADAPT_3_FLEX_KEY_GEN_OUT_BUSfmt */ 8848 /* nFields */ 4, 8849 /* *fields */ soc_TUNNEL_ADAPT_3_FLEX_KEY_GEN_OUT_BUSfmt_fields, 8850 /* bits */ 384, 8851 /* flags */ 0, 8852 }, 8853 #endif /* chips */ 8854 8855 #if defined(BCM_56870_A0) 8856 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_3_PDD_OUT_BUSfmt */ 8857 /* format TUNNEL_ADAPT_3_PDD_OUT_BUSfmt */ 8858 /* nFields */ 108, 8859 /* *fields */ soc_TUNNEL_ADAPT_3_PDD_OUT_BUSfmt_fields, 8860 /* bits */ 439, 8861 /* flags */ 0, 8862 }, 8863 #endif /* chips */ 8864 8865 #if defined(BCM_56370_A0) 8866 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_3_PDD_OUT_BUS_BCM56370_A0fmt */ 8867 /* format TUNNEL_ADAPT_3_PDD_OUT_BUSfmt */ 8868 /* nFields */ 109, 8869 /* *fields */ soc_TUNNEL_ADAPT_3_PDD_OUT_BUS_BCM56370_A0fmt_fields, 8870 /* bits */ 384, 8871 /* flags */ 0, 8872 }, 8873 #endif /* chips */ 8874 8875 #if defined(BCM_56770_A0) 8876 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_3_PDD_OUT_BUS_BCM56770_A0fmt */ 8877 /* format TUNNEL_ADAPT_3_PDD_OUT_BUSfmt */ 8878 /* nFields */ 109, 8879 /* *fields */ soc_TUNNEL_ADAPT_3_PDD_OUT_BUS_BCM56770_A0fmt_fields, 8880 /* bits */ 447, 8881 /* flags */ 0, 8882 }, 8883 #endif /* chips */ 8884 8885 #if defined(BCM_56870_A0) 8886 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_4_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 8887 /* format TUNNEL_ADAPT_4_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 8888 /* nFields */ 9, 8889 /* *fields */ soc_TUNNEL_ADAPT_4_FLEX_KEY_GEN_IN_CONTROL_BUSfmt_fields, 8890 /* bits */ 120, 8891 /* flags */ 0, 8892 }, 8893 #endif /* chips */ 8894 8895 #if defined(BCM_56370_A0) 8896 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_4_FLEX_KEY_GEN_IN_CONTROL_BUS_BCM56370_A0fmt */ 8897 /* format TUNNEL_ADAPT_4_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 8898 /* nFields */ 10, 8899 /* *fields */ soc_TUNNEL_ADAPT_4_FLEX_KEY_GEN_IN_CONTROL_BUS_BCM56370_A0fmt_fields, 8900 /* bits */ 120, 8901 /* flags */ 0, 8902 }, 8903 #endif /* chips */ 8904 8905 #if defined(BCM_56770_A0) 8906 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_4_FLEX_KEY_GEN_IN_CONTROL_BUS_BCM56770_A0fmt */ 8907 /* format TUNNEL_ADAPT_4_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 8908 /* nFields */ 10, 8909 /* *fields */ soc_TUNNEL_ADAPT_4_FLEX_KEY_GEN_IN_CONTROL_BUS_BCM56770_A0fmt_fields, 8910 /* bits */ 120, 8911 /* flags */ 0, 8912 }, 8913 #endif /* chips */ 8914 8915 #if defined(BCM_56870_A0) 8916 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_4_FLEX_KEY_GEN_OUT_BUSfmt */ 8917 /* format TUNNEL_ADAPT_4_FLEX_KEY_GEN_OUT_BUSfmt */ 8918 /* nFields */ 8, 8919 /* *fields */ soc_EGR_ADAPT_1_FLEX_KEY_GEN_OUT_BUSfmt_fields, 8920 /* bits */ 256, 8921 /* flags */ 0, 8922 }, 8923 #endif /* chips */ 8924 8925 #if defined(BCM_56370_A0) 8926 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_4_FLEX_KEY_GEN_OUT_BUS_BCM56370_A0fmt */ 8927 /* format TUNNEL_ADAPT_4_FLEX_KEY_GEN_OUT_BUSfmt */ 8928 /* nFields */ 8, 8929 /* *fields */ soc_EGR_ADAPT_1_FLEX_KEY_GEN_OUT_BUSfmt_fields, 8930 /* bits */ 256, 8931 /* flags */ 0, 8932 }, 8933 #endif /* chips */ 8934 8935 #if defined(BCM_56770_A0) 8936 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_4_FLEX_KEY_GEN_OUT_BUS_BCM56770_A0fmt */ 8937 /* format TUNNEL_ADAPT_4_FLEX_KEY_GEN_OUT_BUSfmt */ 8938 /* nFields */ 8, 8939 /* *fields */ soc_EGR_ADAPT_1_FLEX_KEY_GEN_OUT_BUSfmt_fields, 8940 /* bits */ 256, 8941 /* flags */ 0, 8942 }, 8943 #endif /* chips */ 8944 8945 #if defined(BCM_56870_A0) 8946 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_4_PDD_OUT_BUSfmt */ 8947 /* format TUNNEL_ADAPT_4_PDD_OUT_BUSfmt */ 8948 /* nFields */ 105, 8949 /* *fields */ soc_TUNNEL_ADAPT_4_PDD_OUT_BUSfmt_fields, 8950 /* bits */ 303, 8951 /* flags */ 0, 8952 }, 8953 #endif /* chips */ 8954 8955 #if defined(BCM_56370_A0) 8956 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_4_PDD_OUT_BUS_BCM56370_A0fmt */ 8957 /* format TUNNEL_ADAPT_4_PDD_OUT_BUSfmt */ 8958 /* nFields */ 107, 8959 /* *fields */ soc_TUNNEL_ADAPT_4_PDD_OUT_BUS_BCM56370_A0fmt_fields, 8960 /* bits */ 326, 8961 /* flags */ 0, 8962 }, 8963 #endif /* chips */ 8964 8965 #if defined(BCM_56770_A0) 8966 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_4_PDD_OUT_BUS_BCM56770_A0fmt */ 8967 /* format TUNNEL_ADAPT_4_PDD_OUT_BUSfmt */ 8968 /* nFields */ 107, 8969 /* *fields */ soc_TUNNEL_ADAPT_4_PDD_OUT_BUS_BCM56770_A0fmt_fields, 8970 /* bits */ 329, 8971 /* flags */ 0, 8972 }, 8973 #endif /* chips */ 8974 8975 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 8976 defined(BCM_56870_A0) 8977 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_ATTRIBUTES_ACTION_SETfmt */ 8978 /* format TUNNEL_ADAPT_ATTRIBUTES_ACTION_SETfmt */ 8979 /* nFields */ 2, 8980 /* *fields */ soc_TUNNEL_ADAPT_ATTRIBUTES_ACTION_SETfmt_fields, 8981 /* bits */ 2, 8982 /* flags */ 0, 8983 }, 8984 #endif /* chips */ 8985 8986 #if defined(BCM_56870_A0) 8987 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_FLEX_KEY_GEN_IN_BUSfmt */ 8988 /* format TUNNEL_ADAPT_FLEX_KEY_GEN_IN_BUSfmt */ 8989 /* nFields */ 2, 8990 /* *fields */ soc_TUNNEL_ADAPT_FLEX_KEY_GEN_IN_BUSfmt_fields, 8991 /* bits */ 1328, 8992 /* flags */ 0, 8993 }, 8994 #endif /* chips */ 8995 8996 #if defined(BCM_56370_A0) 8997 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_FLEX_KEY_GEN_IN_BUS_BCM56370_A0fmt */ 8998 /* format TUNNEL_ADAPT_FLEX_KEY_GEN_IN_BUSfmt */ 8999 /* nFields */ 2, 9000 /* *fields */ soc_TUNNEL_ADAPT_FLEX_KEY_GEN_IN_BUS_BCM56370_A0fmt_fields, 9001 /* bits */ 1408, 9002 /* flags */ 0, 9003 }, 9004 #endif /* chips */ 9005 9006 #if defined(BCM_56770_A0) 9007 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_FLEX_KEY_GEN_IN_BUS_BCM56770_A0fmt */ 9008 /* format TUNNEL_ADAPT_FLEX_KEY_GEN_IN_BUSfmt */ 9009 /* nFields */ 2, 9010 /* *fields */ soc_TUNNEL_ADAPT_FLEX_KEY_GEN_IN_BUS_BCM56370_A0fmt_fields, 9011 /* bits */ 1408, 9012 /* flags */ 0, 9013 }, 9014 #endif /* chips */ 9015 9016 #if defined(BCM_56870_A0) 9017 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_KEYGEN_OBJECT_BUSfmt */ 9018 /* format TUNNEL_ADAPT_KEYGEN_OBJECT_BUSfmt */ 9019 /* nFields */ 33, 9020 /* *fields */ soc_TUNNEL_ADAPT_KEYGEN_OBJECT_BUSfmt_fields, 9021 /* bits */ 304, 9022 /* flags */ 0, 9023 }, 9024 #endif /* chips */ 9025 9026 #if defined(BCM_56370_A0) 9027 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_KEYGEN_OBJECT_BUS_BCM56370_A0fmt */ 9028 /* format TUNNEL_ADAPT_KEYGEN_OBJECT_BUSfmt */ 9029 /* nFields */ 40, 9030 /* *fields */ soc_TUNNEL_ADAPT_KEYGEN_OBJECT_BUS_BCM56370_A0fmt_fields, 9031 /* bits */ 384, 9032 /* flags */ 0, 9033 }, 9034 #endif /* chips */ 9035 9036 #if defined(BCM_56770_A0) 9037 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_KEYGEN_OBJECT_BUS_BCM56770_A0fmt */ 9038 /* format TUNNEL_ADAPT_KEYGEN_OBJECT_BUSfmt */ 9039 /* nFields */ 38, 9040 /* *fields */ soc_TUNNEL_ADAPT_KEYGEN_OBJECT_BUS_BCM56770_A0fmt_fields, 9041 /* bits */ 384, 9042 /* flags */ 0, 9043 }, 9044 #endif /* chips */ 9045 9046 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 9047 defined(BCM_56870_A0) 9048 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_MISC_ACTION_SETfmt */ 9049 /* format TUNNEL_ADAPT_MISC_ACTION_SETfmt */ 9050 /* nFields */ 3, 9051 /* *fields */ soc_TUNNEL_ADAPT_MISC_ACTION_SETfmt_fields, 9052 /* bits */ 6, 9053 /* flags */ 0, 9054 }, 9055 #endif /* chips */ 9056 9057 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 9058 defined(BCM_56870_A0) 9059 { /* SOC_FORMAT_INT_TUNNEL_ADAPT_PHB_CTRL_ID_FORMATfmt */ 9060 /* format TUNNEL_ADAPT_PHB_CTRL_ID_FORMATfmt */ 9061 /* nFields */ 3, 9062 /* *fields */ soc_TUNNEL_ADAPT_PHB_CTRL_ID_FORMATfmt_fields, 9063 /* bits */ 4, 9064 /* flags */ 0, 9065 }, 9066 #endif /* chips */ 9067 9068 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 9069 defined(BCM_56870_A0) 9070 { /* SOC_FORMAT_INT_TUNNEL_PROC_DROP_VECTORfmt */ 9071 /* format TUNNEL_PROC_DROP_VECTORfmt */ 9072 /* nFields */ 15, 9073 /* *fields */ soc_TUNNEL_PROC_DROP_VECTORfmt_fields, 9074 /* bits */ 16, 9075 /* flags */ 0, 9076 }, 9077 #endif /* chips */ 9078 9079 #if defined(BCM_56980_A0) 9080 { /* SOC_FORMAT_INT_TUNNEL_PROC_DROP_VECTOR_BCM56980_A0fmt */ 9081 /* format TUNNEL_PROC_DROP_VECTORfmt */ 9082 /* nFields */ 7, 9083 /* *fields */ soc_TUNNEL_PROC_DROP_VECTOR_BCM56980_A0fmt_fields, 9084 /* bits */ 8, 9085 /* flags */ 0, 9086 }, 9087 #endif /* chips */ 9088 9089 #if defined(BCM_56980_B0) 9090 { /* SOC_FORMAT_INT_TUNNEL_PROC_DROP_VECTOR_BCM56980_B0fmt */ 9091 /* format TUNNEL_PROC_DROP_VECTORfmt */ 9092 /* nFields */ 7, 9093 /* *fields */ soc_TUNNEL_PROC_DROP_VECTOR_BCM56980_A0fmt_fields, 9094 /* bits */ 8, 9095 /* flags */ 0, 9096 }, 9097 #endif /* chips */ 9098 9099 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 9100 defined(BCM_56870_A0) 9101 { /* SOC_FORMAT_INT_TUNNEL_PTR_ACTION_SETfmt */ 9102 /* format TUNNEL_PTR_ACTION_SETfmt */ 9103 /* nFields */ 5, 9104 /* *fields */ soc_TUNNEL_PTR_ACTION_SETfmt_fields, 9105 /* bits */ 14, 9106 /* flags */ 0, 9107 }, 9108 #endif /* chips */ 9109 9110 #if defined(BCM_56870_A0) 9111 { /* SOC_FORMAT_INT_TUNNEL_TERM_ACTION_SETfmt */ 9112 /* format TUNNEL_TERM_ACTION_SETfmt */ 9113 /* nFields */ 9, 9114 /* *fields */ soc_TUNNEL_TERM_ACTION_SETfmt_fields, 9115 /* bits */ 13, 9116 /* flags */ 0, 9117 }, 9118 #endif /* chips */ 9119 9120 #if defined(BCM_56370_A0) 9121 { /* SOC_FORMAT_INT_TUNNEL_TERM_ACTION_SET_BCM56370_A0fmt */ 9122 /* format TUNNEL_TERM_ACTION_SETfmt */ 9123 /* nFields */ 9, 9124 /* *fields */ soc_TUNNEL_TERM_ACTION_SET_BCM56370_A0fmt_fields, 9125 /* bits */ 13, 9126 /* flags */ 0, 9127 }, 9128 #endif /* chips */ 9129 9130 #if defined(BCM_56770_A0) 9131 { /* SOC_FORMAT_INT_TUNNEL_TERM_ACTION_SET_BCM56770_A0fmt */ 9132 /* format TUNNEL_TERM_ACTION_SETfmt */ 9133 /* nFields */ 9, 9134 /* *fields */ soc_TUNNEL_TERM_ACTION_SET_BCM56370_A0fmt_fields, 9135 /* bits */ 13, 9136 /* flags */ 0, 9137 }, 9138 #endif /* chips */ 9139 9140 #if defined(BCM_56840_A0) 9141 { /* SOC_FORMAT_INT_TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9142 /* format TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9143 /* nFields */ 1, 9144 /* *fields */ soc_FP_RESOLUTIONfmt_fields, 9145 /* bits */ 4, 9146 /* flags */ 0, 9147 }, 9148 #endif /* chips */ 9149 9150 #if defined(BCM_56260_A0) 9151 { /* SOC_FORMAT_INT_TUNNEL_TYPE_LOOPBACK_TYPE_BCM56260_A0fmt */ 9152 /* format TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9153 /* nFields */ 1, 9154 /* *fields */ soc_L3_TYPE_BCM56260_A0fmt_fields, 9155 /* bits */ 4, 9156 /* flags */ 0, 9157 }, 9158 #endif /* chips */ 9159 9160 #if defined(BCM_56260_B0) 9161 { /* SOC_FORMAT_INT_TUNNEL_TYPE_LOOPBACK_TYPE_BCM56260_B0fmt */ 9162 /* format TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9163 /* nFields */ 1, 9164 /* *fields */ soc_L3_TYPE_BCM56260_A0fmt_fields, 9165 /* bits */ 4, 9166 /* flags */ 0, 9167 }, 9168 #endif /* chips */ 9169 9170 #if defined(BCM_56270_A0) 9171 { /* SOC_FORMAT_INT_TUNNEL_TYPE_LOOPBACK_TYPE_BCM56270_A0fmt */ 9172 /* format TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9173 /* nFields */ 1, 9174 /* *fields */ soc_L3_TYPE_BCM56260_A0fmt_fields, 9175 /* bits */ 4, 9176 /* flags */ 0, 9177 }, 9178 #endif /* chips */ 9179 9180 #if defined(BCM_56340_A0) 9181 { /* SOC_FORMAT_INT_TUNNEL_TYPE_LOOPBACK_TYPE_BCM56340_A0fmt */ 9182 /* format TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9183 /* nFields */ 1, 9184 /* *fields */ soc_TUNNEL_TYPE_LOOPBACK_TYPEfmt_fields, 9185 /* bits */ 5, 9186 /* flags */ 0, 9187 }, 9188 #endif /* chips */ 9189 9190 #if defined(BCM_56440_A0) 9191 { /* SOC_FORMAT_INT_TUNNEL_TYPE_LOOPBACK_TYPE_BCM56440_A0fmt */ 9192 /* format TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9193 /* nFields */ 1, 9194 /* *fields */ soc_FP_RESOLUTIONfmt_fields, 9195 /* bits */ 4, 9196 /* flags */ 0, 9197 }, 9198 #endif /* chips */ 9199 9200 #if defined(BCM_56440_B0) 9201 { /* SOC_FORMAT_INT_TUNNEL_TYPE_LOOPBACK_TYPE_BCM56440_B0fmt */ 9202 /* format TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9203 /* nFields */ 1, 9204 /* *fields */ soc_FP_RESOLUTIONfmt_fields, 9205 /* bits */ 4, 9206 /* flags */ 0, 9207 }, 9208 #endif /* chips */ 9209 9210 #if defined(BCM_56450_A0) 9211 { /* SOC_FORMAT_INT_TUNNEL_TYPE_LOOPBACK_TYPE_BCM56450_A0fmt */ 9212 /* format TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9213 /* nFields */ 1, 9214 /* *fields */ soc_L3_TYPEfmt_fields, 9215 /* bits */ 4, 9216 /* flags */ 0, 9217 }, 9218 #endif /* chips */ 9219 9220 #if defined(BCM_56450_B0) 9221 { /* SOC_FORMAT_INT_TUNNEL_TYPE_LOOPBACK_TYPE_BCM56450_B0fmt */ 9222 /* format TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9223 /* nFields */ 1, 9224 /* *fields */ soc_L3_TYPEfmt_fields, 9225 /* bits */ 4, 9226 /* flags */ 0, 9227 }, 9228 #endif /* chips */ 9229 9230 #if defined(BCM_56450_B1) 9231 { /* SOC_FORMAT_INT_TUNNEL_TYPE_LOOPBACK_TYPE_BCM56450_B1fmt */ 9232 /* format TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9233 /* nFields */ 1, 9234 /* *fields */ soc_L3_TYPEfmt_fields, 9235 /* bits */ 4, 9236 /* flags */ 0, 9237 }, 9238 #endif /* chips */ 9239 9240 #if defined(BCM_56560_A0) 9241 { /* SOC_FORMAT_INT_TUNNEL_TYPE_LOOPBACK_TYPE_BCM56560_A0fmt */ 9242 /* format TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9243 /* nFields */ 1, 9244 /* *fields */ soc_FP_RESOLUTION_BCM53400_A0fmt_fields, 9245 /* bits */ 5, 9246 /* flags */ 0, 9247 }, 9248 #endif /* chips */ 9249 9250 #if defined(BCM_56560_B0) 9251 { /* SOC_FORMAT_INT_TUNNEL_TYPE_LOOPBACK_TYPE_BCM56560_B0fmt */ 9252 /* format TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9253 /* nFields */ 1, 9254 /* *fields */ soc_FP_RESOLUTION_BCM53400_A0fmt_fields, 9255 /* bits */ 5, 9256 /* flags */ 0, 9257 }, 9258 #endif /* chips */ 9259 9260 #if defined(BCM_56640_A0) 9261 { /* SOC_FORMAT_INT_TUNNEL_TYPE_LOOPBACK_TYPE_BCM56640_A0fmt */ 9262 /* format TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9263 /* nFields */ 1, 9264 /* *fields */ soc_TUNNEL_TYPE_LOOPBACK_TYPEfmt_fields, 9265 /* bits */ 5, 9266 /* flags */ 0, 9267 }, 9268 #endif /* chips */ 9269 9270 #if defined(BCM_56670_A0) 9271 { /* SOC_FORMAT_INT_TUNNEL_TYPE_LOOPBACK_TYPE_BCM56670_A0fmt */ 9272 /* format TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9273 /* nFields */ 1, 9274 /* *fields */ soc_FP_RESOLUTION_BCM53400_A0fmt_fields, 9275 /* bits */ 5, 9276 /* flags */ 0, 9277 }, 9278 #endif /* chips */ 9279 9280 #if defined(BCM_56670_B0) 9281 { /* SOC_FORMAT_INT_TUNNEL_TYPE_LOOPBACK_TYPE_BCM56670_B0fmt */ 9282 /* format TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9283 /* nFields */ 1, 9284 /* *fields */ soc_FP_RESOLUTION_BCM53400_A0fmt_fields, 9285 /* bits */ 5, 9286 /* flags */ 0, 9287 }, 9288 #endif /* chips */ 9289 9290 #if defined(BCM_56840_B0) 9291 { /* SOC_FORMAT_INT_TUNNEL_TYPE_LOOPBACK_TYPE_BCM56840_B0fmt */ 9292 /* format TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9293 /* nFields */ 1, 9294 /* *fields */ soc_FP_RESOLUTIONfmt_fields, 9295 /* bits */ 4, 9296 /* flags */ 0, 9297 }, 9298 #endif /* chips */ 9299 9300 #if defined(BCM_56850_A0) 9301 { /* SOC_FORMAT_INT_TUNNEL_TYPE_LOOPBACK_TYPE_BCM56850_A0fmt */ 9302 /* format TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9303 /* nFields */ 1, 9304 /* *fields */ soc_TUNNEL_TYPE_LOOPBACK_TYPEfmt_fields, 9305 /* bits */ 5, 9306 /* flags */ 0, 9307 }, 9308 #endif /* chips */ 9309 9310 #if defined(BCM_56860_A0) 9311 { /* SOC_FORMAT_INT_TUNNEL_TYPE_LOOPBACK_TYPE_BCM56860_A0fmt */ 9312 /* format TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9313 /* nFields */ 1, 9314 /* *fields */ soc_TUNNEL_TYPE_LOOPBACK_TYPEfmt_fields, 9315 /* bits */ 5, 9316 /* flags */ 0, 9317 }, 9318 #endif /* chips */ 9319 9320 #if defined(BCM_56960_A0) 9321 { /* SOC_FORMAT_INT_TUNNEL_TYPE_LOOPBACK_TYPE_BCM56960_A0fmt */ 9322 /* format TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9323 /* nFields */ 1, 9324 /* *fields */ soc_FP_RESOLUTION_BCM53400_A0fmt_fields, 9325 /* bits */ 5, 9326 /* flags */ 0, 9327 }, 9328 #endif /* chips */ 9329 9330 #if defined(BCM_56965_A0) 9331 { /* SOC_FORMAT_INT_TUNNEL_TYPE_LOOPBACK_TYPE_BCM56965_A0fmt */ 9332 /* format TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9333 /* nFields */ 1, 9334 /* *fields */ soc_FP_RESOLUTION_BCM53400_A0fmt_fields, 9335 /* bits */ 5, 9336 /* flags */ 0, 9337 }, 9338 #endif /* chips */ 9339 9340 #if defined(BCM_56970_A0) 9341 { /* SOC_FORMAT_INT_TUNNEL_TYPE_LOOPBACK_TYPE_BCM56970_A0fmt */ 9342 /* format TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9343 /* nFields */ 1, 9344 /* *fields */ soc_FP_RESOLUTION_BCM53400_A0fmt_fields, 9345 /* bits */ 5, 9346 /* flags */ 0, 9347 }, 9348 #endif /* chips */ 9349 9350 #if defined(BCM_56980_A0) 9351 { /* SOC_FORMAT_INT_TUNNEL_TYPE_LOOPBACK_TYPE_BCM56980_A0fmt */ 9352 /* format TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9353 /* nFields */ 1, 9354 /* *fields */ soc_L3_TYPE_BCM56260_A0fmt_fields, 9355 /* bits */ 4, 9356 /* flags */ 0, 9357 }, 9358 #endif /* chips */ 9359 9360 #if defined(BCM_56980_B0) 9361 { /* SOC_FORMAT_INT_TUNNEL_TYPE_LOOPBACK_TYPE_BCM56980_B0fmt */ 9362 /* format TUNNEL_TYPE_LOOPBACK_TYPEfmt */ 9363 /* nFields */ 1, 9364 /* *fields */ soc_L3_TYPE_BCM56260_A0fmt_fields, 9365 /* bits */ 4, 9366 /* flags */ 0, 9367 }, 9368 #endif /* chips */ 9369 9370 #if defined(BCM_56640_A0) 9371 { /* SOC_FORMAT_INT_TXDP_S0_BUSfmt */ 9372 /* format TXDP_S0_BUSfmt */ 9373 /* nFields */ 36, 9374 /* *fields */ soc_TXDP_S0_BUSfmt_fields, 9375 /* bits */ 1770, 9376 /* flags */ 0, 9377 }, 9378 #endif /* chips */ 9379 9380 #if defined(BCM_56640_A0) 9381 { /* SOC_FORMAT_INT_TXDP_S2_BUSfmt */ 9382 /* format TXDP_S2_BUSfmt */ 9383 /* nFields */ 36, 9384 /* *fields */ soc_TXDP_S2_BUSfmt_fields, 9385 /* bits */ 1812, 9386 /* flags */ 0, 9387 }, 9388 #endif /* chips */ 9389 9390 #if defined(BCM_56640_A0) 9391 { /* SOC_FORMAT_INT_TXDP_S2_CW_FMTfmt */ 9392 /* format TXDP_S2_CW_FMTfmt */ 9393 /* nFields */ 14, 9394 /* *fields */ soc_TXDP_S2_CW_FMTfmt_fields, 9395 /* bits */ 41, 9396 /* flags */ 0, 9397 }, 9398 #endif /* chips */ 9399 9400 #if defined(BCM_56640_A0) 9401 { /* SOC_FORMAT_INT_TXDP_S3_BUSfmt */ 9402 /* format TXDP_S3_BUSfmt */ 9403 /* nFields */ 2, 9404 /* *fields */ soc_TXDP_S3_BUSfmt_fields, 9405 /* bits */ 2016, 9406 /* flags */ 0, 9407 }, 9408 #endif /* chips */ 9409 9410 #if defined(BCM_56640_A0) 9411 { /* SOC_FORMAT_INT_TXDP_S3_CW_BUSfmt */ 9412 /* format TXDP_S3_CW_BUSfmt */ 9413 /* nFields */ 13, 9414 /* *fields */ soc_TXDP_S3_CW_BUSfmt_fields, 9415 /* bits */ 480, 9416 /* flags */ 0, 9417 }, 9418 #endif /* chips */ 9419 9420 #if defined(BCM_56640_A0) 9421 { /* SOC_FORMAT_INT_TXDP_S3_CW_FMTfmt */ 9422 /* format TXDP_S3_CW_FMTfmt */ 9423 /* nFields */ 15, 9424 /* *fields */ soc_TXDP_S3_CW_FMTfmt_fields, 9425 /* bits */ 40, 9426 /* flags */ 0, 9427 }, 9428 #endif /* chips */ 9429 9430 #if defined(BCM_56640_A0) 9431 { /* SOC_FORMAT_INT_TXDP_S3_DW_BUSfmt */ 9432 /* format TXDP_S3_DW_BUSfmt */ 9433 /* nFields */ 25, 9434 /* *fields */ soc_TXDP_S3_DW_BUSfmt_fields, 9435 /* bits */ 1536, 9436 /* flags */ 0, 9437 }, 9438 #endif /* chips */ 9439 9440 #if defined(BCM_56640_A0) 9441 { /* SOC_FORMAT_INT_TXDP_S4_BUSfmt */ 9442 /* format TXDP_S4_BUSfmt */ 9443 /* nFields */ 14, 9444 /* *fields */ soc_TXDP_S4_BUSfmt_fields, 9445 /* bits */ 672, 9446 /* flags */ 0, 9447 }, 9448 #endif /* chips */ 9449 9450 #if defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 9451 defined(BCM_56450_B1) 9452 { /* SOC_FORMAT_INT_TXLP_ALGN_TO_BUFFER_CTRLfmt */ 9453 /* format TXLP_ALGN_TO_BUFFER_CTRLfmt */ 9454 /* nFields */ 6, 9455 /* *fields */ soc_TXLP_ALGN_TO_BUFFER_CTRLfmt_fields, 9456 /* bits */ 24, 9457 /* flags */ 0, 9458 }, 9459 #endif /* chips */ 9460 9461 #if defined(BCM_56260_A0) 9462 { /* SOC_FORMAT_INT_TXLP_ALGN_TO_BUFFER_CTRL_BCM56260_A0fmt */ 9463 /* format TXLP_ALGN_TO_BUFFER_CTRLfmt */ 9464 /* nFields */ 6, 9465 /* *fields */ soc_TXLP_ALGN_TO_BUFFER_CTRL_BCM56260_A0fmt_fields, 9466 /* bits */ 24, 9467 /* flags */ 0, 9468 }, 9469 #endif /* chips */ 9470 9471 #if defined(BCM_56260_B0) 9472 { /* SOC_FORMAT_INT_TXLP_ALGN_TO_BUFFER_CTRL_BCM56260_B0fmt */ 9473 /* format TXLP_ALGN_TO_BUFFER_CTRLfmt */ 9474 /* nFields */ 6, 9475 /* *fields */ soc_TXLP_ALGN_TO_BUFFER_CTRL_BCM56260_A0fmt_fields, 9476 /* bits */ 24, 9477 /* flags */ 0, 9478 }, 9479 #endif /* chips */ 9480 9481 #if defined(BCM_56270_A0) 9482 { /* SOC_FORMAT_INT_TXLP_ALGN_TO_BUFFER_CTRL_BCM56270_A0fmt */ 9483 /* format TXLP_ALGN_TO_BUFFER_CTRLfmt */ 9484 /* nFields */ 6, 9485 /* *fields */ soc_TXLP_ALGN_TO_BUFFER_CTRL_BCM56260_A0fmt_fields, 9486 /* bits */ 24, 9487 /* flags */ 0, 9488 }, 9489 #endif /* chips */ 9490 9491 #if defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 9492 defined(BCM_56450_B1) 9493 { /* SOC_FORMAT_INT_TXLP_ALGN_TO_BUFFER_PASSTHRU_CTRLfmt */ 9494 /* format TXLP_ALGN_TO_BUFFER_PASSTHRU_CTRLfmt */ 9495 /* nFields */ 6, 9496 /* *fields */ soc_TXLP_ALGN_TO_BUFFER_PASSTHRU_CTRLfmt_fields, 9497 /* bits */ 13, 9498 /* flags */ 0, 9499 }, 9500 #endif /* chips */ 9501 9502 #if defined(BCM_56260_A0) 9503 { /* SOC_FORMAT_INT_TXLP_ALGN_TO_BUFFER_PASSTHRU_CTRL_BCM56260_A0fmt */ 9504 /* format TXLP_ALGN_TO_BUFFER_PASSTHRU_CTRLfmt */ 9505 /* nFields */ 6, 9506 /* *fields */ soc_TXLP_ALGN_TO_BUFFER_PASSTHRU_CTRL_BCM56260_A0fmt_fields, 9507 /* bits */ 13, 9508 /* flags */ 0, 9509 }, 9510 #endif /* chips */ 9511 9512 #if defined(BCM_56260_B0) 9513 { /* SOC_FORMAT_INT_TXLP_ALGN_TO_BUFFER_PASSTHRU_CTRL_BCM56260_B0fmt */ 9514 /* format TXLP_ALGN_TO_BUFFER_PASSTHRU_CTRLfmt */ 9515 /* nFields */ 6, 9516 /* *fields */ soc_TXLP_ALGN_TO_BUFFER_PASSTHRU_CTRL_BCM56260_A0fmt_fields, 9517 /* bits */ 13, 9518 /* flags */ 0, 9519 }, 9520 #endif /* chips */ 9521 9522 #if defined(BCM_56270_A0) 9523 { /* SOC_FORMAT_INT_TXLP_ALGN_TO_BUFFER_PASSTHRU_CTRL_BCM56270_A0fmt */ 9524 /* format TXLP_ALGN_TO_BUFFER_PASSTHRU_CTRLfmt */ 9525 /* nFields */ 6, 9526 /* *fields */ soc_TXLP_ALGN_TO_BUFFER_PASSTHRU_CTRL_BCM56260_A0fmt_fields, 9527 /* bits */ 13, 9528 /* flags */ 0, 9529 }, 9530 #endif /* chips */ 9531 9532 #if defined(BCM_56450_A0) 9533 { /* SOC_FORMAT_INT_TXLP_BUFFER_TO_PORT_CTRLfmt */ 9534 /* format TXLP_BUFFER_TO_PORT_CTRLfmt */ 9535 /* nFields */ 11, 9536 /* *fields */ soc_EDATABUF_BUFFER_TO_XQPORT_CTRL_BCM56450_A0fmt_fields, 9537 /* bits */ 25, 9538 /* flags */ 0, 9539 }, 9540 #endif /* chips */ 9541 9542 #if defined(BCM_56260_A0) 9543 { /* SOC_FORMAT_INT_TXLP_BUFFER_TO_PORT_CTRL_BCM56260_A0fmt */ 9544 /* format TXLP_BUFFER_TO_PORT_CTRLfmt */ 9545 /* nFields */ 11, 9546 /* *fields */ soc_EDATABUF_BUFFER_TO_XQPORT_CTRL_BCM56260_A0fmt_fields, 9547 /* bits */ 25, 9548 /* flags */ 0, 9549 }, 9550 #endif /* chips */ 9551 9552 #if defined(BCM_56260_B0) 9553 { /* SOC_FORMAT_INT_TXLP_BUFFER_TO_PORT_CTRL_BCM56260_B0fmt */ 9554 /* format TXLP_BUFFER_TO_PORT_CTRLfmt */ 9555 /* nFields */ 11, 9556 /* *fields */ soc_EDATABUF_BUFFER_TO_XQPORT_CTRL_BCM56260_A0fmt_fields, 9557 /* bits */ 25, 9558 /* flags */ 0, 9559 }, 9560 #endif /* chips */ 9561 9562 #if defined(BCM_56270_A0) 9563 { /* SOC_FORMAT_INT_TXLP_BUFFER_TO_PORT_CTRL_BCM56270_A0fmt */ 9564 /* format TXLP_BUFFER_TO_PORT_CTRLfmt */ 9565 /* nFields */ 11, 9566 /* *fields */ soc_EDATABUF_BUFFER_TO_XQPORT_CTRL_BCM56260_A0fmt_fields, 9567 /* bits */ 25, 9568 /* flags */ 0, 9569 }, 9570 #endif /* chips */ 9571 9572 #if defined(BCM_56450_B0) 9573 { /* SOC_FORMAT_INT_TXLP_BUFFER_TO_PORT_CTRL_BCM56450_B0fmt */ 9574 /* format TXLP_BUFFER_TO_PORT_CTRLfmt */ 9575 /* nFields */ 11, 9576 /* *fields */ soc_EDATABUF_BUFFER_TO_XQPORT_CTRL_BCM56450_A0fmt_fields, 9577 /* bits */ 25, 9578 /* flags */ 0, 9579 }, 9580 #endif /* chips */ 9581 9582 #if defined(BCM_56450_B1) 9583 { /* SOC_FORMAT_INT_TXLP_BUFFER_TO_PORT_CTRL_BCM56450_B1fmt */ 9584 /* format TXLP_BUFFER_TO_PORT_CTRLfmt */ 9585 /* nFields */ 11, 9586 /* *fields */ soc_EDATABUF_BUFFER_TO_XQPORT_CTRL_BCM56450_A0fmt_fields, 9587 /* bits */ 25, 9588 /* flags */ 0, 9589 }, 9590 #endif /* chips */ 9591 9592 #if defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 9593 defined(BCM_56450_B1) 9594 { /* SOC_FORMAT_INT_TXLP_TO_EDB_BUSfmt */ 9595 /* format TXLP_TO_EDB_BUSfmt */ 9596 /* nFields */ 8, 9597 /* *fields */ soc_TXLP_TO_EDB_BUSfmt_fields, 9598 /* bits */ 30, 9599 /* flags */ 0, 9600 }, 9601 #endif /* chips */ 9602 9603 #if defined(BCM_56260_A0) 9604 { /* SOC_FORMAT_INT_TXLP_TO_EDB_BUS_BCM56260_A0fmt */ 9605 /* format TXLP_TO_EDB_BUSfmt */ 9606 /* nFields */ 8, 9607 /* *fields */ soc_TXLP_TO_EDB_BUS_BCM56260_A0fmt_fields, 9608 /* bits */ 30, 9609 /* flags */ 0, 9610 }, 9611 #endif /* chips */ 9612 9613 #if defined(BCM_56260_B0) 9614 { /* SOC_FORMAT_INT_TXLP_TO_EDB_BUS_BCM56260_B0fmt */ 9615 /* format TXLP_TO_EDB_BUSfmt */ 9616 /* nFields */ 8, 9617 /* *fields */ soc_TXLP_TO_EDB_BUS_BCM56260_A0fmt_fields, 9618 /* bits */ 30, 9619 /* flags */ 0, 9620 }, 9621 #endif /* chips */ 9622 9623 #if defined(BCM_56270_A0) 9624 { /* SOC_FORMAT_INT_TXLP_TO_EDB_BUS_BCM56270_A0fmt */ 9625 /* format TXLP_TO_EDB_BUSfmt */ 9626 /* nFields */ 8, 9627 /* *fields */ soc_TXLP_TO_EDB_BUS_BCM56260_A0fmt_fields, 9628 /* bits */ 30, 9629 /* flags */ 0, 9630 }, 9631 #endif /* chips */ 9632 9633 #if defined(BCM_56450_A0) 9634 { /* SOC_FORMAT_INT_TXLP_TO_PORT_CTRL_BUSfmt */ 9635 /* format TXLP_TO_PORT_CTRL_BUSfmt */ 9636 /* nFields */ 11, 9637 /* *fields */ soc_EP_TO_XQPORT_CTRL_BUS_BCM56450_A0fmt_fields, 9638 /* bits */ 24, 9639 /* flags */ 0, 9640 }, 9641 #endif /* chips */ 9642 9643 #if defined(BCM_56260_A0) 9644 { /* SOC_FORMAT_INT_TXLP_TO_PORT_CTRL_BUS_BCM56260_A0fmt */ 9645 /* format TXLP_TO_PORT_CTRL_BUSfmt */ 9646 /* nFields */ 11, 9647 /* *fields */ soc_EP_TO_XQPORT_CTRL_BUS_BCM56260_A0fmt_fields, 9648 /* bits */ 24, 9649 /* flags */ 0, 9650 }, 9651 #endif /* chips */ 9652 9653 #if defined(BCM_56260_B0) 9654 { /* SOC_FORMAT_INT_TXLP_TO_PORT_CTRL_BUS_BCM56260_B0fmt */ 9655 /* format TXLP_TO_PORT_CTRL_BUSfmt */ 9656 /* nFields */ 11, 9657 /* *fields */ soc_EP_TO_XQPORT_CTRL_BUS_BCM56260_A0fmt_fields, 9658 /* bits */ 24, 9659 /* flags */ 0, 9660 }, 9661 #endif /* chips */ 9662 9663 #if defined(BCM_56270_A0) 9664 { /* SOC_FORMAT_INT_TXLP_TO_PORT_CTRL_BUS_BCM56270_A0fmt */ 9665 /* format TXLP_TO_PORT_CTRL_BUSfmt */ 9666 /* nFields */ 11, 9667 /* *fields */ soc_EP_TO_XQPORT_CTRL_BUS_BCM56260_A0fmt_fields, 9668 /* bits */ 24, 9669 /* flags */ 0, 9670 }, 9671 #endif /* chips */ 9672 9673 #if defined(BCM_56450_B0) 9674 { /* SOC_FORMAT_INT_TXLP_TO_PORT_CTRL_BUS_BCM56450_B0fmt */ 9675 /* format TXLP_TO_PORT_CTRL_BUSfmt */ 9676 /* nFields */ 11, 9677 /* *fields */ soc_EP_TO_XQPORT_CTRL_BUS_BCM56450_A0fmt_fields, 9678 /* bits */ 24, 9679 /* flags */ 0, 9680 }, 9681 #endif /* chips */ 9682 9683 #if defined(BCM_56450_B1) 9684 { /* SOC_FORMAT_INT_TXLP_TO_PORT_CTRL_BUS_BCM56450_B1fmt */ 9685 /* format TXLP_TO_PORT_CTRL_BUSfmt */ 9686 /* nFields */ 11, 9687 /* *fields */ soc_EP_TO_XQPORT_CTRL_BUS_BCM56450_A0fmt_fields, 9688 /* bits */ 24, 9689 /* flags */ 0, 9690 }, 9691 #endif /* chips */ 9692 9693 #if defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 9694 defined(BCM_56450_B1) 9695 { /* SOC_FORMAT_INT_TXLP_TRIGGERSfmt */ 9696 /* format TXLP_TRIGGERSfmt */ 9697 /* nFields */ 10, 9698 /* *fields */ soc_TXLP_TRIGGERSfmt_fields, 9699 /* bits */ 32, 9700 /* flags */ 0, 9701 }, 9702 #endif /* chips */ 9703 9704 #if defined(BCM_56260_A0) 9705 { /* SOC_FORMAT_INT_TXLP_TRIGGERS_BCM56260_A0fmt */ 9706 /* format TXLP_TRIGGERSfmt */ 9707 /* nFields */ 10, 9708 /* *fields */ soc_TXLP_TRIGGERS_BCM56260_A0fmt_fields, 9709 /* bits */ 32, 9710 /* flags */ 0, 9711 }, 9712 #endif /* chips */ 9713 9714 #if defined(BCM_56260_B0) 9715 { /* SOC_FORMAT_INT_TXLP_TRIGGERS_BCM56260_B0fmt */ 9716 /* format TXLP_TRIGGERSfmt */ 9717 /* nFields */ 10, 9718 /* *fields */ soc_TXLP_TRIGGERS_BCM56260_A0fmt_fields, 9719 /* bits */ 32, 9720 /* flags */ 0, 9721 }, 9722 #endif /* chips */ 9723 9724 #if defined(BCM_56270_A0) 9725 { /* SOC_FORMAT_INT_TXLP_TRIGGERS_BCM56270_A0fmt */ 9726 /* format TXLP_TRIGGERSfmt */ 9727 /* nFields */ 10, 9728 /* *fields */ soc_TXLP_TRIGGERS_BCM56260_A0fmt_fields, 9729 /* bits */ 32, 9730 /* flags */ 0, 9731 }, 9732 #endif /* chips */ 9733