allformats_s.i - openbcm - Git mirror of https://github.com/Broadcom-Network-Switching-Software/OpenBCM

allformats_s.i (278313B)
      1 /*
      2  * DO NOT EDIT THIS FILE!
      3  * This file is auto-generated from the registers file.
      4  * Edits to this file will be lost when it is regenerated.
      5  *
      6  * 
      7  * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file.
      8  * 
      9  * Copyright 2007-2020 Broadcom Inc. All rights reserved.
     10  *
     11  * File:        allformats_s.i
     12  * Purpose:     Independent format descriptions.
     13  */
     14 
     15 #if defined(BCM_56314_A0) || defined(BCM_56504_A0) || \
     16     defined(BCM_56504_B0) || defined(BCM_56800_A0)
     17     { /* SOC_FORMAT_INT_S0fmt */ 
     18         /* format            S0fmt */
     19         /* nFields     */ 6,
     20         /* *fields     */ soc_S0fmt_fields,
     21         /* bits        */ 32,
     22         /* flags       */ 0,
     23     },
     24 #endif /* chips */
     25 
     26 #if defined(BCM_53314_A0)
     27     { /* SOC_FORMAT_INT_S0_BCM53314_A0fmt */ 
     28         /* format            S0fmt */
     29         /* nFields     */ 7,
     30         /* *fields     */ soc_S0_BCM56514_A0fmt_fields,
     31         /* bits        */ 32,
     32         /* flags       */ 0,
     33     },
     34 #endif /* chips */
     35 
     36 #if defined(BCM_53324_A0)
     37     { /* SOC_FORMAT_INT_S0_BCM53324_A0fmt */ 
     38         /* format            S0fmt */
     39         /* nFields     */ 7,
     40         /* *fields     */ soc_S0_BCM56514_A0fmt_fields,
     41         /* bits        */ 32,
     42         /* flags       */ 0,
     43     },
     44 #endif /* chips */
     45 
     46 #if defined(BCM_53400_A0)
     47     { /* SOC_FORMAT_INT_S0_BCM53400_A0fmt */ 
     48         /* format            S0fmt */
     49         /* nFields     */ 9,
     50         /* *fields     */ soc_S0_BCM53400_A0fmt_fields,
     51         /* bits        */ 32,
     52         /* flags       */ 0,
     53     },
     54 #endif /* chips */
     55 
     56 #if defined(BCM_53540_A0)
     57     { /* SOC_FORMAT_INT_S0_BCM53540_A0fmt */ 
     58         /* format            S0fmt */
     59         /* nFields     */ 9,
     60         /* *fields     */ soc_S0_BCM53400_A0fmt_fields,
     61         /* bits        */ 32,
     62         /* flags       */ 0,
     63     },
     64 #endif /* chips */
     65 
     66 #if defined(BCM_53570_A0)
     67     { /* SOC_FORMAT_INT_S0_BCM53570_A0fmt */ 
     68         /* format            S0fmt */
     69         /* nFields     */ 9,
     70         /* *fields     */ soc_S0_BCM53400_A0fmt_fields,
     71         /* bits        */ 32,
     72         /* flags       */ 0,
     73     },
     74 #endif /* chips */
     75 
     76 #if defined(BCM_53570_B0)
     77     { /* SOC_FORMAT_INT_S0_BCM53570_B0fmt */ 
     78         /* format            S0fmt */
     79         /* nFields     */ 9,
     80         /* *fields     */ soc_S0_BCM53400_A0fmt_fields,
     81         /* bits        */ 32,
     82         /* flags       */ 0,
     83     },
     84 #endif /* chips */
     85 
     86 #if defined(BCM_56142_A0)
     87     { /* SOC_FORMAT_INT_S0_BCM56142_A0fmt */ 
     88         /* format            S0fmt */
     89         /* nFields     */ 8,
     90         /* *fields     */ soc_S0_BCM56624_A0fmt_fields,
     91         /* bits        */ 32,
     92         /* flags       */ 0,
     93     },
     94 #endif /* chips */
     95 
     96 #if defined(BCM_56150_A0)
     97     { /* SOC_FORMAT_INT_S0_BCM56150_A0fmt */ 
     98         /* format            S0fmt */
     99         /* nFields     */ 8,
    100         /* *fields     */ soc_S0_BCM56640_A0fmt_fields,
    101         /* bits        */ 32,
    102         /* flags       */ 0,
    103     },
    104 #endif /* chips */
    105 
    106 #if defined(BCM_56160_A0)
    107     { /* SOC_FORMAT_INT_S0_BCM56160_A0fmt */ 
    108         /* format            S0fmt */
    109         /* nFields     */ 9,
    110         /* *fields     */ soc_S0_BCM53400_A0fmt_fields,
    111         /* bits        */ 32,
    112         /* flags       */ 0,
    113     },
    114 #endif /* chips */
    115 
    116 #if defined(BCM_56224_A0)
    117     { /* SOC_FORMAT_INT_S0_BCM56224_A0fmt */ 
    118         /* format            S0fmt */
    119         /* nFields     */ 7,
    120         /* *fields     */ soc_S0_BCM56514_A0fmt_fields,
    121         /* bits        */ 32,
    122         /* flags       */ 0,
    123     },
    124 #endif /* chips */
    125 
    126 #if defined(BCM_56224_B0)
    127     { /* SOC_FORMAT_INT_S0_BCM56224_B0fmt */ 
    128         /* format            S0fmt */
    129         /* nFields     */ 7,
    130         /* *fields     */ soc_S0_BCM56514_A0fmt_fields,
    131         /* bits        */ 32,
    132         /* flags       */ 0,
    133     },
    134 #endif /* chips */
    135 
    136 #if defined(BCM_56260_A0)
    137     { /* SOC_FORMAT_INT_S0_BCM56260_A0fmt */ 
    138         /* format            S0fmt */
    139         /* nFields     */ 8,
    140         /* *fields     */ soc_S0_BCM56260_A0fmt_fields,
    141         /* bits        */ 32,
    142         /* flags       */ 0,
    143     },
    144 #endif /* chips */
    145 
    146 #if defined(BCM_56260_B0)
    147     { /* SOC_FORMAT_INT_S0_BCM56260_B0fmt */ 
    148         /* format            S0fmt */
    149         /* nFields     */ 8,
    150         /* *fields     */ soc_S0_BCM56260_A0fmt_fields,
    151         /* bits        */ 32,
    152         /* flags       */ 0,
    153     },
    154 #endif /* chips */
    155 
    156 #if defined(BCM_56270_A0)
    157     { /* SOC_FORMAT_INT_S0_BCM56270_A0fmt */ 
    158         /* format            S0fmt */
    159         /* nFields     */ 8,
    160         /* *fields     */ soc_S0_BCM56260_A0fmt_fields,
    161         /* bits        */ 32,
    162         /* flags       */ 0,
    163     },
    164 #endif /* chips */
    165 
    166 #if defined(BCM_56334_A0)
    167     { /* SOC_FORMAT_INT_S0_BCM56334_A0fmt */ 
    168         /* format            S0fmt */
    169         /* nFields     */ 8,
    170         /* *fields     */ soc_S0_BCM56624_A0fmt_fields,
    171         /* bits        */ 32,
    172         /* flags       */ 0,
    173     },
    174 #endif /* chips */
    175 
    176 #if defined(BCM_56334_B0)
    177     { /* SOC_FORMAT_INT_S0_BCM56334_B0fmt */ 
    178         /* format            S0fmt */
    179         /* nFields     */ 8,
    180         /* *fields     */ soc_S0_BCM56624_A0fmt_fields,
    181         /* bits        */ 32,
    182         /* flags       */ 0,
    183     },
    184 #endif /* chips */
    185 
    186 #if defined(BCM_56340_A0)
    187     { /* SOC_FORMAT_INT_S0_BCM56340_A0fmt */ 
    188         /* format            S0fmt */
    189         /* nFields     */ 8,
    190         /* *fields     */ soc_S0_BCM56640_A0fmt_fields,
    191         /* bits        */ 32,
    192         /* flags       */ 0,
    193     },
    194 #endif /* chips */
    195 
    196 #if defined(BCM_56370_A0)
    197     { /* SOC_FORMAT_INT_S0_BCM56370_A0fmt */ 
    198         /* format            S0fmt */
    199         /* nFields     */ 9,
    200         /* *fields     */ soc_S0_BCM53400_A0fmt_fields,
    201         /* bits        */ 32,
    202         /* flags       */ 0,
    203     },
    204 #endif /* chips */
    205 
    206 #if defined(BCM_56440_A0)
    207     { /* SOC_FORMAT_INT_S0_BCM56440_A0fmt */ 
    208         /* format            S0fmt */
    209         /* nFields     */ 8,
    210         /* *fields     */ soc_S0_BCM56624_A0fmt_fields,
    211         /* bits        */ 32,
    212         /* flags       */ 0,
    213     },
    214 #endif /* chips */
    215 
    216 #if defined(BCM_56440_B0)
    217     { /* SOC_FORMAT_INT_S0_BCM56440_B0fmt */ 
    218         /* format            S0fmt */
    219         /* nFields     */ 8,
    220         /* *fields     */ soc_S0_BCM56624_A0fmt_fields,
    221         /* bits        */ 32,
    222         /* flags       */ 0,
    223     },
    224 #endif /* chips */
    225 
    226 #if defined(BCM_56450_A0)
    227     { /* SOC_FORMAT_INT_S0_BCM56450_A0fmt */ 
    228         /* format            S0fmt */
    229         /* nFields     */ 8,
    230         /* *fields     */ soc_S0_BCM56640_A0fmt_fields,
    231         /* bits        */ 32,
    232         /* flags       */ 0,
    233     },
    234 #endif /* chips */
    235 
    236 #if defined(BCM_56450_B0)
    237     { /* SOC_FORMAT_INT_S0_BCM56450_B0fmt */ 
    238         /* format            S0fmt */
    239         /* nFields     */ 8,
    240         /* *fields     */ soc_S0_BCM56640_A0fmt_fields,
    241         /* bits        */ 32,
    242         /* flags       */ 0,
    243     },
    244 #endif /* chips */
    245 
    246 #if defined(BCM_56450_B1)
    247     { /* SOC_FORMAT_INT_S0_BCM56450_B1fmt */ 
    248         /* format            S0fmt */
    249         /* nFields     */ 8,
    250         /* *fields     */ soc_S0_BCM56640_A0fmt_fields,
    251         /* bits        */ 32,
    252         /* flags       */ 0,
    253     },
    254 #endif /* chips */
    255 
    256 #if defined(BCM_56514_A0)
    257     { /* SOC_FORMAT_INT_S0_BCM56514_A0fmt */ 
    258         /* format            S0fmt */
    259         /* nFields     */ 7,
    260         /* *fields     */ soc_S0_BCM56514_A0fmt_fields,
    261         /* bits        */ 32,
    262         /* flags       */ 0,
    263     },
    264 #endif /* chips */
    265 
    266 #if defined(BCM_56524_A0)
    267     { /* SOC_FORMAT_INT_S0_BCM56524_A0fmt */ 
    268         /* format            S0fmt */
    269         /* nFields     */ 8,
    270         /* *fields     */ soc_S0_BCM56624_A0fmt_fields,
    271         /* bits        */ 32,
    272         /* flags       */ 0,
    273     },
    274 #endif /* chips */
    275 
    276 #if defined(BCM_56524_B0)
    277     { /* SOC_FORMAT_INT_S0_BCM56524_B0fmt */ 
    278         /* format            S0fmt */
    279         /* nFields     */ 8,
    280         /* *fields     */ soc_S0_BCM56624_A0fmt_fields,
    281         /* bits        */ 32,
    282         /* flags       */ 0,
    283     },
    284 #endif /* chips */
    285 
    286 #if defined(BCM_56560_A0)
    287     { /* SOC_FORMAT_INT_S0_BCM56560_A0fmt */ 
    288         /* format            S0fmt */
    289         /* nFields     */ 9,
    290         /* *fields     */ soc_S0_BCM53400_A0fmt_fields,
    291         /* bits        */ 32,
    292         /* flags       */ 0,
    293     },
    294 #endif /* chips */
    295 
    296 #if defined(BCM_56560_B0)
    297     { /* SOC_FORMAT_INT_S0_BCM56560_B0fmt */ 
    298         /* format            S0fmt */
    299         /* nFields     */ 9,
    300         /* *fields     */ soc_S0_BCM53400_A0fmt_fields,
    301         /* bits        */ 32,
    302         /* flags       */ 0,
    303     },
    304 #endif /* chips */
    305 
    306 #if defined(BCM_56624_A0)
    307     { /* SOC_FORMAT_INT_S0_BCM56624_A0fmt */ 
    308         /* format            S0fmt */
    309         /* nFields     */ 8,
    310         /* *fields     */ soc_S0_BCM56624_A0fmt_fields,
    311         /* bits        */ 32,
    312         /* flags       */ 0,
    313     },
    314 #endif /* chips */
    315 
    316 #if defined(BCM_56624_B0)
    317     { /* SOC_FORMAT_INT_S0_BCM56624_B0fmt */ 
    318         /* format            S0fmt */
    319         /* nFields     */ 8,
    320         /* *fields     */ soc_S0_BCM56624_A0fmt_fields,
    321         /* bits        */ 32,
    322         /* flags       */ 0,
    323     },
    324 #endif /* chips */
    325 
    326 #if defined(BCM_56634_A0)
    327     { /* SOC_FORMAT_INT_S0_BCM56634_A0fmt */ 
    328         /* format            S0fmt */
    329         /* nFields     */ 8,
    330         /* *fields     */ soc_S0_BCM56624_A0fmt_fields,
    331         /* bits        */ 32,
    332         /* flags       */ 0,
    333     },
    334 #endif /* chips */
    335 
    336 #if defined(BCM_56634_B0)
    337     { /* SOC_FORMAT_INT_S0_BCM56634_B0fmt */ 
    338         /* format            S0fmt */
    339         /* nFields     */ 8,
    340         /* *fields     */ soc_S0_BCM56624_A0fmt_fields,
    341         /* bits        */ 32,
    342         /* flags       */ 0,
    343     },
    344 #endif /* chips */
    345 
    346 #if defined(BCM_56640_A0)
    347     { /* SOC_FORMAT_INT_S0_BCM56640_A0fmt */ 
    348         /* format            S0fmt */
    349         /* nFields     */ 8,
    350         /* *fields     */ soc_S0_BCM56640_A0fmt_fields,
    351         /* bits        */ 32,
    352         /* flags       */ 0,
    353     },
    354 #endif /* chips */
    355 
    356 #if defined(BCM_56670_A0)
    357     { /* SOC_FORMAT_INT_S0_BCM56670_A0fmt */ 
    358         /* format            S0fmt */
    359         /* nFields     */ 9,
    360         /* *fields     */ soc_S0_BCM53400_A0fmt_fields,
    361         /* bits        */ 32,
    362         /* flags       */ 0,
    363     },
    364 #endif /* chips */
    365 
    366 #if defined(BCM_56670_B0)
    367     { /* SOC_FORMAT_INT_S0_BCM56670_B0fmt */ 
    368         /* format            S0fmt */
    369         /* nFields     */ 9,
    370         /* *fields     */ soc_S0_BCM53400_A0fmt_fields,
    371         /* bits        */ 32,
    372         /* flags       */ 0,
    373     },
    374 #endif /* chips */
    375 
    376 #if defined(BCM_56680_A0)
    377     { /* SOC_FORMAT_INT_S0_BCM56680_A0fmt */ 
    378         /* format            S0fmt */
    379         /* nFields     */ 8,
    380         /* *fields     */ soc_S0_BCM56624_A0fmt_fields,
    381         /* bits        */ 32,
    382         /* flags       */ 0,
    383     },
    384 #endif /* chips */
    385 
    386 #if defined(BCM_56680_B0)
    387     { /* SOC_FORMAT_INT_S0_BCM56680_B0fmt */ 
    388         /* format            S0fmt */
    389         /* nFields     */ 8,
    390         /* *fields     */ soc_S0_BCM56624_A0fmt_fields,
    391         /* bits        */ 32,
    392         /* flags       */ 0,
    393     },
    394 #endif /* chips */
    395 
    396 #if defined(BCM_56685_A0)
    397     { /* SOC_FORMAT_INT_S0_BCM56685_A0fmt */ 
    398         /* format            S0fmt */
    399         /* nFields     */ 8,
    400         /* *fields     */ soc_S0_BCM56624_A0fmt_fields,
    401         /* bits        */ 32,
    402         /* flags       */ 0,
    403     },
    404 #endif /* chips */
    405 
    406 #if defined(BCM_56685_B0)
    407     { /* SOC_FORMAT_INT_S0_BCM56685_B0fmt */ 
    408         /* format            S0fmt */
    409         /* nFields     */ 8,
    410         /* *fields     */ soc_S0_BCM56624_A0fmt_fields,
    411         /* bits        */ 32,
    412         /* flags       */ 0,
    413     },
    414 #endif /* chips */
    415 
    416 #if defined(BCM_56725_A0)
    417     { /* SOC_FORMAT_INT_S0_BCM56725_A0fmt */ 
    418         /* format            S0fmt */
    419         /* nFields     */ 8,
    420         /* *fields     */ soc_S0_BCM56624_A0fmt_fields,
    421         /* bits        */ 32,
    422         /* flags       */ 0,
    423     },
    424 #endif /* chips */
    425 
    426 #if defined(BCM_56770_A0)
    427     { /* SOC_FORMAT_INT_S0_BCM56770_A0fmt */ 
    428         /* format            S0fmt */
    429         /* nFields     */ 9,
    430         /* *fields     */ soc_S0_BCM53400_A0fmt_fields,
    431         /* bits        */ 32,
    432         /* flags       */ 0,
    433     },
    434 #endif /* chips */
    435 
    436 #if defined(BCM_56820_A0)
    437     { /* SOC_FORMAT_INT_S0_BCM56820_A0fmt */ 
    438         /* format            S0fmt */
    439         /* nFields     */ 8,
    440         /* *fields     */ soc_S0_BCM56624_A0fmt_fields,
    441         /* bits        */ 32,
    442         /* flags       */ 0,
    443     },
    444 #endif /* chips */
    445 
    446 #if defined(BCM_56840_A0)
    447     { /* SOC_FORMAT_INT_S0_BCM56840_A0fmt */ 
    448         /* format            S0fmt */
    449         /* nFields     */ 8,
    450         /* *fields     */ soc_S0_BCM56624_A0fmt_fields,
    451         /* bits        */ 32,
    452         /* flags       */ 0,
    453     },
    454 #endif /* chips */
    455 
    456 #if defined(BCM_56840_B0)
    457     { /* SOC_FORMAT_INT_S0_BCM56840_B0fmt */ 
    458         /* format            S0fmt */
    459         /* nFields     */ 8,
    460         /* *fields     */ soc_S0_BCM56624_A0fmt_fields,
    461         /* bits        */ 32,
    462         /* flags       */ 0,
    463     },
    464 #endif /* chips */
    465 
    466 #if defined(BCM_56850_A0)
    467     { /* SOC_FORMAT_INT_S0_BCM56850_A0fmt */ 
    468         /* format            S0fmt */
    469         /* nFields     */ 9,
    470         /* *fields     */ soc_S0_BCM56850_A0fmt_fields,
    471         /* bits        */ 32,
    472         /* flags       */ 0,
    473     },
    474 #endif /* chips */
    475 
    476 #if defined(BCM_56860_A0)
    477     { /* SOC_FORMAT_INT_S0_BCM56860_A0fmt */ 
    478         /* format            S0fmt */
    479         /* nFields     */ 10,
    480         /* *fields     */ soc_S0_BCM56860_A0fmt_fields,
    481         /* bits        */ 32,
    482         /* flags       */ 0,
    483     },
    484 #endif /* chips */
    485 
    486 #if defined(BCM_56870_A0)
    487     { /* SOC_FORMAT_INT_S0_BCM56870_A0fmt */ 
    488         /* format            S0fmt */
    489         /* nFields     */ 9,
    490         /* *fields     */ soc_S0_BCM53400_A0fmt_fields,
    491         /* bits        */ 32,
    492         /* flags       */ 0,
    493     },
    494 #endif /* chips */
    495 
    496 #if defined(BCM_56960_A0)
    497     { /* SOC_FORMAT_INT_S0_BCM56960_A0fmt */ 
    498         /* format            S0fmt */
    499         /* nFields     */ 9,
    500         /* *fields     */ soc_S0_BCM53400_A0fmt_fields,
    501         /* bits        */ 32,
    502         /* flags       */ 0,
    503     },
    504 #endif /* chips */
    505 
    506 #if defined(BCM_56965_A0)
    507     { /* SOC_FORMAT_INT_S0_BCM56965_A0fmt */ 
    508         /* format            S0fmt */
    509         /* nFields     */ 9,
    510         /* *fields     */ soc_S0_BCM53400_A0fmt_fields,
    511         /* bits        */ 32,
    512         /* flags       */ 0,
    513     },
    514 #endif /* chips */
    515 
    516 #if defined(BCM_56970_A0)
    517     { /* SOC_FORMAT_INT_S0_BCM56970_A0fmt */ 
    518         /* format            S0fmt */
    519         /* nFields     */ 9,
    520         /* *fields     */ soc_S0_BCM53400_A0fmt_fields,
    521         /* bits        */ 32,
    522         /* flags       */ 0,
    523     },
    524 #endif /* chips */
    525 
    526 #if defined(BCM_56980_A0)
    527     { /* SOC_FORMAT_INT_S0_BCM56980_A0fmt */ 
    528         /* format            S0fmt */
    529         /* nFields     */ 9,
    530         /* *fields     */ soc_S0_BCM53400_A0fmt_fields,
    531         /* bits        */ 32,
    532         /* flags       */ 0,
    533     },
    534 #endif /* chips */
    535 
    536 #if defined(BCM_56980_B0)
    537     { /* SOC_FORMAT_INT_S0_BCM56980_B0fmt */ 
    538         /* format            S0fmt */
    539         /* nFields     */ 9,
    540         /* *fields     */ soc_S0_BCM53400_A0fmt_fields,
    541         /* bits        */ 32,
    542         /* flags       */ 0,
    543     },
    544 #endif /* chips */
    545 
    546 #if defined(BCM_88732_A0)
    547     { /* SOC_FORMAT_INT_S0_BCM88732_A0fmt */ 
    548         /* format            S0fmt */
    549         /* nFields     */ 9,
    550         /* *fields     */ soc_S0_BCM88732_A0fmt_fields,
    551         /* bits        */ 32,
    552         /* flags       */ 0,
    553     },
    554 #endif /* chips */
    555 
    556 #if defined(BCM_56150_A0) || defined(BCM_56340_A0) || \
    557     defined(BCM_56450_A0) || defined(BCM_56450_B0) || \
    558     defined(BCM_56450_B1) || defined(BCM_56640_A0) || \
    559     defined(BCM_56850_A0) || defined(BCM_56860_A0)
    560     { /* SOC_FORMAT_INT_SBUSDMA_ERROR_VECfmt */ 
    561         /* format            SBUSDMA_ERROR_VECfmt */
    562         /* nFields     */ 9,
    563         /* *fields     */ soc_SBUSDMA_ERROR_VECfmt_fields,
    564         /* bits        */ 9,
    565         /* flags       */ 0,
    566     },
    567 #endif /* chips */
    568 
    569 #if defined(BCM_53400_A0)
    570     { /* SOC_FORMAT_INT_SBUSDMA_ERROR_VEC_BCM53400_A0fmt */ 
    571         /* format            SBUSDMA_ERROR_VECfmt */
    572         /* nFields     */ 9,
    573         /* *fields     */ soc_SBUSDMA_ERROR_VEC_BCM53400_A0fmt_fields,
    574         /* bits        */ 9,
    575         /* flags       */ 0,
    576     },
    577 #endif /* chips */
    578 
    579 #if defined(BCM_53540_A0)
    580     { /* SOC_FORMAT_INT_SBUSDMA_ERROR_VEC_BCM53540_A0fmt */ 
    581         /* format            SBUSDMA_ERROR_VECfmt */
    582         /* nFields     */ 9,
    583         /* *fields     */ soc_SBUSDMA_ERROR_VEC_BCM53400_A0fmt_fields,
    584         /* bits        */ 9,
    585         /* flags       */ 0,
    586     },
    587 #endif /* chips */
    588 
    589 #if defined(BCM_53570_A0)
    590     { /* SOC_FORMAT_INT_SBUSDMA_ERROR_VEC_BCM53570_A0fmt */ 
    591         /* format            SBUSDMA_ERROR_VECfmt */
    592         /* nFields     */ 9,
    593         /* *fields     */ soc_SBUSDMA_ERROR_VEC_BCM53400_A0fmt_fields,
    594         /* bits        */ 9,
    595         /* flags       */ 0,
    596     },
    597 #endif /* chips */
    598 
    599 #if defined(BCM_53570_B0)
    600     { /* SOC_FORMAT_INT_SBUSDMA_ERROR_VEC_BCM53570_B0fmt */ 
    601         /* format            SBUSDMA_ERROR_VECfmt */
    602         /* nFields     */ 9,
    603         /* *fields     */ soc_SBUSDMA_ERROR_VEC_BCM53400_A0fmt_fields,
    604         /* bits        */ 9,
    605         /* flags       */ 0,
    606     },
    607 #endif /* chips */
    608 
    609 #if defined(BCM_56160_A0)
    610     { /* SOC_FORMAT_INT_SBUSDMA_ERROR_VEC_BCM56160_A0fmt */ 
    611         /* format            SBUSDMA_ERROR_VECfmt */
    612         /* nFields     */ 9,
    613         /* *fields     */ soc_SBUSDMA_ERROR_VEC_BCM53400_A0fmt_fields,
    614         /* bits        */ 9,
    615         /* flags       */ 0,
    616     },
    617 #endif /* chips */
    618 
    619 #if defined(BCM_56260_A0)
    620     { /* SOC_FORMAT_INT_SBUSDMA_ERROR_VEC_BCM56260_A0fmt */ 
    621         /* format            SBUSDMA_ERROR_VECfmt */
    622         /* nFields     */ 9,
    623         /* *fields     */ soc_SBUSDMA_ERROR_VEC_BCM53400_A0fmt_fields,
    624         /* bits        */ 9,
    625         /* flags       */ 0,
    626     },
    627 #endif /* chips */
    628 
    629 #if defined(BCM_56260_B0)
    630     { /* SOC_FORMAT_INT_SBUSDMA_ERROR_VEC_BCM56260_B0fmt */ 
    631         /* format            SBUSDMA_ERROR_VECfmt */
    632         /* nFields     */ 9,
    633         /* *fields     */ soc_SBUSDMA_ERROR_VEC_BCM53400_A0fmt_fields,
    634         /* bits        */ 9,
    635         /* flags       */ 0,
    636     },
    637 #endif /* chips */
    638 
    639 #if defined(BCM_56270_A0)
    640     { /* SOC_FORMAT_INT_SBUSDMA_ERROR_VEC_BCM56270_A0fmt */ 
    641         /* format            SBUSDMA_ERROR_VECfmt */
    642         /* nFields     */ 9,
    643         /* *fields     */ soc_SBUSDMA_ERROR_VEC_BCM53400_A0fmt_fields,
    644         /* bits        */ 9,
    645         /* flags       */ 0,
    646     },
    647 #endif /* chips */
    648 
    649 #if defined(BCM_56370_A0)
    650     { /* SOC_FORMAT_INT_SBUSDMA_ERROR_VEC_BCM56370_A0fmt */ 
    651         /* format            SBUSDMA_ERROR_VECfmt */
    652         /* nFields     */ 9,
    653         /* *fields     */ soc_SBUSDMA_ERROR_VEC_BCM53400_A0fmt_fields,
    654         /* bits        */ 9,
    655         /* flags       */ 0,
    656     },
    657 #endif /* chips */
    658 
    659 #if defined(BCM_56560_A0)
    660     { /* SOC_FORMAT_INT_SBUSDMA_ERROR_VEC_BCM56560_A0fmt */ 
    661         /* format            SBUSDMA_ERROR_VECfmt */
    662         /* nFields     */ 9,
    663         /* *fields     */ soc_SBUSDMA_ERROR_VEC_BCM53400_A0fmt_fields,
    664         /* bits        */ 9,
    665         /* flags       */ 0,
    666     },
    667 #endif /* chips */
    668 
    669 #if defined(BCM_56560_B0)
    670     { /* SOC_FORMAT_INT_SBUSDMA_ERROR_VEC_BCM56560_B0fmt */ 
    671         /* format            SBUSDMA_ERROR_VECfmt */
    672         /* nFields     */ 9,
    673         /* *fields     */ soc_SBUSDMA_ERROR_VEC_BCM53400_A0fmt_fields,
    674         /* bits        */ 9,
    675         /* flags       */ 0,
    676     },
    677 #endif /* chips */
    678 
    679 #if defined(BCM_56670_A0)
    680     { /* SOC_FORMAT_INT_SBUSDMA_ERROR_VEC_BCM56670_A0fmt */ 
    681         /* format            SBUSDMA_ERROR_VECfmt */
    682         /* nFields     */ 9,
    683         /* *fields     */ soc_SBUSDMA_ERROR_VEC_BCM53400_A0fmt_fields,
    684         /* bits        */ 9,
    685         /* flags       */ 0,
    686     },
    687 #endif /* chips */
    688 
    689 #if defined(BCM_56670_B0)
    690     { /* SOC_FORMAT_INT_SBUSDMA_ERROR_VEC_BCM56670_B0fmt */ 
    691         /* format            SBUSDMA_ERROR_VECfmt */
    692         /* nFields     */ 9,
    693         /* *fields     */ soc_SBUSDMA_ERROR_VEC_BCM53400_A0fmt_fields,
    694         /* bits        */ 9,
    695         /* flags       */ 0,
    696     },
    697 #endif /* chips */
    698 
    699 #if defined(BCM_56770_A0)
    700     { /* SOC_FORMAT_INT_SBUSDMA_ERROR_VEC_BCM56770_A0fmt */ 
    701         /* format            SBUSDMA_ERROR_VECfmt */
    702         /* nFields     */ 9,
    703         /* *fields     */ soc_SBUSDMA_ERROR_VEC_BCM53400_A0fmt_fields,
    704         /* bits        */ 9,
    705         /* flags       */ 0,
    706     },
    707 #endif /* chips */
    708 
    709 #if defined(BCM_56870_A0)
    710     { /* SOC_FORMAT_INT_SBUSDMA_ERROR_VEC_BCM56870_A0fmt */ 
    711         /* format            SBUSDMA_ERROR_VECfmt */
    712         /* nFields     */ 9,
    713         /* *fields     */ soc_SBUSDMA_ERROR_VEC_BCM53400_A0fmt_fields,
    714         /* bits        */ 9,
    715         /* flags       */ 0,
    716     },
    717 #endif /* chips */
    718 
    719 #if defined(BCM_56960_A0)
    720     { /* SOC_FORMAT_INT_SBUSDMA_ERROR_VEC_BCM56960_A0fmt */ 
    721         /* format            SBUSDMA_ERROR_VECfmt */
    722         /* nFields     */ 9,
    723         /* *fields     */ soc_SBUSDMA_ERROR_VEC_BCM53400_A0fmt_fields,
    724         /* bits        */ 9,
    725         /* flags       */ 0,
    726     },
    727 #endif /* chips */
    728 
    729 #if defined(BCM_56965_A0)
    730     { /* SOC_FORMAT_INT_SBUSDMA_ERROR_VEC_BCM56965_A0fmt */ 
    731         /* format            SBUSDMA_ERROR_VECfmt */
    732         /* nFields     */ 9,
    733         /* *fields     */ soc_SBUSDMA_ERROR_VEC_BCM53400_A0fmt_fields,
    734         /* bits        */ 9,
    735         /* flags       */ 0,
    736     },
    737 #endif /* chips */
    738 
    739 #if defined(BCM_56970_A0)
    740     { /* SOC_FORMAT_INT_SBUSDMA_ERROR_VEC_BCM56970_A0fmt */ 
    741         /* format            SBUSDMA_ERROR_VECfmt */
    742         /* nFields     */ 9,
    743         /* *fields     */ soc_SBUSDMA_ERROR_VEC_BCM53400_A0fmt_fields,
    744         /* bits        */ 9,
    745         /* flags       */ 0,
    746     },
    747 #endif /* chips */
    748 
    749 #if defined(BCM_56980_A0)
    750     { /* SOC_FORMAT_INT_SBUSDMA_ERROR_VEC_BCM56980_A0fmt */ 
    751         /* format            SBUSDMA_ERROR_VECfmt */
    752         /* nFields     */ 9,
    753         /* *fields     */ soc_SBUSDMA_ERROR_VEC_BCM53400_A0fmt_fields,
    754         /* bits        */ 9,
    755         /* flags       */ 0,
    756     },
    757 #endif /* chips */
    758 
    759 #if defined(BCM_56980_B0)
    760     { /* SOC_FORMAT_INT_SBUSDMA_ERROR_VEC_BCM56980_B0fmt */ 
    761         /* format            SBUSDMA_ERROR_VECfmt */
    762         /* nFields     */ 9,
    763         /* *fields     */ soc_SBUSDMA_ERROR_VEC_BCM53400_A0fmt_fields,
    764         /* bits        */ 9,
    765         /* flags       */ 0,
    766     },
    767 #endif /* chips */
    768 
    769 #if defined(BCM_56980_A0) || defined(BCM_56980_B0)
    770     { /* SOC_FORMAT_INT_SBUS_TCAM_LOOKUP_RSP_WORDfmt */ 
    771         /* format            SBUS_TCAM_LOOKUP_RSP_WORDfmt */
    772         /* nFields     */ 4,
    773         /* *fields     */ soc_SBUS_TCAM_LOOKUP_RSP_WORDfmt_fields,
    774         /* bits        */ 32,
    775         /* flags       */ 0,
    776     },
    777 #endif /* chips */
    778 
    779 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \
    780     defined(BCM_56870_A0)
    781     { /* SOC_FORMAT_INT_SD_TAG_ACTION_SETfmt */ 
    782         /* format            SD_TAG_ACTION_SETfmt */
    783         /* nFields     */ 10,
    784         /* *fields     */ soc_SD_TAG_ACTION_SETfmt_fields,
    785         /* bits        */ 26,
    786         /* flags       */ 0,
    787     },
    788 #endif /* chips */
    789 
    790 #if defined(BCM_56860_A0)
    791     { /* SOC_FORMAT_INT_SD_TAG_DATA_FORMATfmt */ 
    792         /* format            SD_TAG_DATA_FORMATfmt */
    793         /* nFields     */ 9,
    794         /* *fields     */ soc_SD_TAG_DATA_FORMATfmt_fields,
    795         /* bits        */ 25,
    796         /* flags       */ 0,
    797     },
    798 #endif /* chips */
    799 
    800 #if defined(BCM_56560_A0)
    801     { /* SOC_FORMAT_INT_SD_TAG_DATA_FORMAT_BCM56560_A0fmt */ 
    802         /* format            SD_TAG_DATA_FORMATfmt */
    803         /* nFields     */ 9,
    804         /* *fields     */ soc_SD_TAG_DATA_FORMAT_BCM56560_A0fmt_fields,
    805         /* bits        */ 25,
    806         /* flags       */ 0,
    807     },
    808 #endif /* chips */
    809 
    810 #if defined(BCM_56560_B0)
    811     { /* SOC_FORMAT_INT_SD_TAG_DATA_FORMAT_BCM56560_B0fmt */ 
    812         /* format            SD_TAG_DATA_FORMATfmt */
    813         /* nFields     */ 9,
    814         /* *fields     */ soc_SD_TAG_DATA_FORMAT_BCM56560_A0fmt_fields,
    815         /* bits        */ 25,
    816         /* flags       */ 0,
    817     },
    818 #endif /* chips */
    819 
    820 #if defined(BCM_56670_A0)
    821     { /* SOC_FORMAT_INT_SD_TAG_DATA_FORMAT_BCM56670_A0fmt */ 
    822         /* format            SD_TAG_DATA_FORMATfmt */
    823         /* nFields     */ 9,
    824         /* *fields     */ soc_SD_TAG_DATA_FORMAT_BCM56560_A0fmt_fields,
    825         /* bits        */ 25,
    826         /* flags       */ 0,
    827     },
    828 #endif /* chips */
    829 
    830 #if defined(BCM_56670_B0)
    831     { /* SOC_FORMAT_INT_SD_TAG_DATA_FORMAT_BCM56670_B0fmt */ 
    832         /* format            SD_TAG_DATA_FORMATfmt */
    833         /* nFields     */ 9,
    834         /* *fields     */ soc_SD_TAG_DATA_FORMAT_BCM56560_A0fmt_fields,
    835         /* bits        */ 25,
    836         /* flags       */ 0,
    837     },
    838 #endif /* chips */
    839 
    840 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \
    841     defined(BCM_56870_A0)
    842     { /* SOC_FORMAT_INT_SD_TAG_DATA_FORMAT_DOUBLEfmt */ 
    843         /* format            SD_TAG_DATA_FORMAT_DOUBLEfmt */
    844         /* nFields     */ 9,
    845         /* *fields     */ soc_SD_TAG_DATA_FORMAT_DOUBLEfmt_fields,
    846         /* bits        */ 25,
    847         /* flags       */ 0,
    848     },
    849 #endif /* chips */
    850 
    851 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \
    852     defined(BCM_56870_A0)
    853     { /* SOC_FORMAT_INT_SEQUENCE_NUMBER_ACTION_SETfmt */ 
    854         /* format            SEQUENCE_NUMBER_ACTION_SETfmt */
    855         /* nFields     */ 2,
    856         /* *fields     */ soc_SEQUENCE_NUMBER_ACTION_SETfmt_fields,
    857         /* bits        */ 17,
    858         /* flags       */ 0,
    859     },
    860 #endif /* chips */
    861 
    862 #if defined(BCM_56340_A0) || defined(BCM_56640_A0)
    863     { /* SOC_FORMAT_INT_SER_STATUS_BUSfmt */ 
    864         /* format            SER_STATUS_BUSfmt */
    865         /* nFields     */ 16,
    866         /* *fields     */ soc_SER_STATUS_BUSfmt_fields,
    867         /* bits        */ 50,
    868         /* flags       */ 0,
    869     },
    870 #endif /* chips */
    871 
    872 #if defined(BCM_53400_A0)
    873     { /* SOC_FORMAT_INT_SER_STATUS_BUS_BCM53400_A0fmt */ 
    874         /* format            SER_STATUS_BUSfmt */
    875         /* nFields     */ 15,
    876         /* *fields     */ soc_SER_STATUS_BUS_BCM53400_A0fmt_fields,
    877         /* bits        */ 50,
    878         /* flags       */ 0,
    879     },
    880 #endif /* chips */
    881 
    882 #if defined(BCM_53540_A0)
    883     { /* SOC_FORMAT_INT_SER_STATUS_BUS_BCM53540_A0fmt */ 
    884         /* format            SER_STATUS_BUSfmt */
    885         /* nFields     */ 15,
    886         /* *fields     */ soc_SER_STATUS_BUS_BCM53400_A0fmt_fields,
    887         /* bits        */ 50,
    888         /* flags       */ 0,
    889     },
    890 #endif /* chips */
    891 
    892 #if defined(BCM_53570_A0)
    893     { /* SOC_FORMAT_INT_SER_STATUS_BUS_BCM53570_A0fmt */ 
    894         /* format            SER_STATUS_BUSfmt */
    895         /* nFields     */ 15,
    896         /* *fields     */ soc_SER_STATUS_BUS_BCM53400_A0fmt_fields,
    897         /* bits        */ 50,
    898         /* flags       */ 0,
    899     },
    900 #endif /* chips */
    901 
    902 #if defined(BCM_53570_B0)
    903     { /* SOC_FORMAT_INT_SER_STATUS_BUS_BCM53570_B0fmt */ 
    904         /* format            SER_STATUS_BUSfmt */
    905         /* nFields     */ 15,
    906         /* *fields     */ soc_SER_STATUS_BUS_BCM53400_A0fmt_fields,
    907         /* bits        */ 50,
    908         /* flags       */ 0,
    909     },
    910 #endif /* chips */
    911 
    912 #if defined(BCM_56150_A0)
    913     { /* SOC_FORMAT_INT_SER_STATUS_BUS_BCM56150_A0fmt */ 
    914         /* format            SER_STATUS_BUSfmt */
    915         /* nFields     */ 15,
    916         /* *fields     */ soc_SER_STATUS_BUS_BCM56850_A0fmt_fields,
    917         /* bits        */ 50,
    918         /* flags       */ 0,
    919     },
    920 #endif /* chips */
    921 
    922 #if defined(BCM_56160_A0)
    923     { /* SOC_FORMAT_INT_SER_STATUS_BUS_BCM56160_A0fmt */ 
    924         /* format            SER_STATUS_BUSfmt */
    925         /* nFields     */ 15,
    926         /* *fields     */ soc_SER_STATUS_BUS_BCM53400_A0fmt_fields,
    927         /* bits        */ 50,
    928         /* flags       */ 0,
    929     },
    930 #endif /* chips */
    931 
    932 #if defined(BCM_56260_A0)
    933     { /* SOC_FORMAT_INT_SER_STATUS_BUS_BCM56260_A0fmt */ 
    934         /* format            SER_STATUS_BUSfmt */
    935         /* nFields     */ 15,
    936         /* *fields     */ soc_SER_STATUS_BUS_BCM53400_A0fmt_fields,
    937         /* bits        */ 50,
    938         /* flags       */ 0,
    939     },
    940 #endif /* chips */
    941 
    942 #if defined(BCM_56260_B0)
    943     { /* SOC_FORMAT_INT_SER_STATUS_BUS_BCM56260_B0fmt */ 
    944         /* format            SER_STATUS_BUSfmt */
    945         /* nFields     */ 15,
    946         /* *fields     */ soc_SER_STATUS_BUS_BCM53400_A0fmt_fields,
    947         /* bits        */ 50,
    948         /* flags       */ 0,
    949     },
    950 #endif /* chips */
    951 
    952 #if defined(BCM_56270_A0)
    953     { /* SOC_FORMAT_INT_SER_STATUS_BUS_BCM56270_A0fmt */ 
    954         /* format            SER_STATUS_BUSfmt */
    955         /* nFields     */ 15,
    956         /* *fields     */ soc_SER_STATUS_BUS_BCM53400_A0fmt_fields,
    957         /* bits        */ 50,
    958         /* flags       */ 0,
    959     },
    960 #endif /* chips */
    961 
    962 #if defined(BCM_56370_A0)
    963     { /* SOC_FORMAT_INT_SER_STATUS_BUS_BCM56370_A0fmt */ 
    964         /* format            SER_STATUS_BUSfmt */
    965         /* nFields     */ 16,
    966         /* *fields     */ soc_SER_STATUS_BUS_BCM56870_A0fmt_fields,
    967         /* bits        */ 50,
    968         /* flags       */ 0,
    969     },
    970 #endif /* chips */
    971 
    972 #if defined(BCM_56560_A0)
    973     { /* SOC_FORMAT_INT_SER_STATUS_BUS_BCM56560_A0fmt */ 
    974         /* format            SER_STATUS_BUSfmt */
    975         /* nFields     */ 15,
    976         /* *fields     */ soc_SER_STATUS_BUS_BCM53400_A0fmt_fields,
    977         /* bits        */ 50,
    978         /* flags       */ 0,
    979     },
    980 #endif /* chips */
    981 
    982 #if defined(BCM_56560_B0)
    983     { /* SOC_FORMAT_INT_SER_STATUS_BUS_BCM56560_B0fmt */ 
    984         /* format            SER_STATUS_BUSfmt */
    985         /* nFields     */ 15,
    986         /* *fields     */ soc_SER_STATUS_BUS_BCM53400_A0fmt_fields,
    987         /* bits        */ 50,
    988         /* flags       */ 0,
    989     },
    990 #endif /* chips */
    991 
    992 #if defined(BCM_56670_A0)
    993     { /* SOC_FORMAT_INT_SER_STATUS_BUS_BCM56670_A0fmt */ 
    994         /* format            SER_STATUS_BUSfmt */
    995         /* nFields     */ 16,
    996         /* *fields     */ soc_SER_STATUS_BUS_BCM56670_A0fmt_fields,
    997         /* bits        */ 50,
    998         /* flags       */ 0,
    999     },
   1000 #endif /* chips */
   1001 
   1002 #if defined(BCM_56670_B0)
   1003     { /* SOC_FORMAT_INT_SER_STATUS_BUS_BCM56670_B0fmt */ 
   1004         /* format            SER_STATUS_BUSfmt */
   1005         /* nFields     */ 16,
   1006         /* *fields     */ soc_SER_STATUS_BUS_BCM56670_A0fmt_fields,
   1007         /* bits        */ 50,
   1008         /* flags       */ 0,
   1009     },
   1010 #endif /* chips */
   1011 
   1012 #if defined(BCM_56770_A0)
   1013     { /* SOC_FORMAT_INT_SER_STATUS_BUS_BCM56770_A0fmt */ 
   1014         /* format            SER_STATUS_BUSfmt */
   1015         /* nFields     */ 16,
   1016         /* *fields     */ soc_SER_STATUS_BUS_BCM56870_A0fmt_fields,
   1017         /* bits        */ 50,
   1018         /* flags       */ 0,
   1019     },
   1020 #endif /* chips */
   1021 
   1022 #if defined(BCM_56850_A0)
   1023     { /* SOC_FORMAT_INT_SER_STATUS_BUS_BCM56850_A0fmt */ 
   1024         /* format            SER_STATUS_BUSfmt */
   1025         /* nFields     */ 15,
   1026         /* *fields     */ soc_SER_STATUS_BUS_BCM56850_A0fmt_fields,
   1027         /* bits        */ 50,
   1028         /* flags       */ 0,
   1029     },
   1030 #endif /* chips */
   1031 
   1032 #if defined(BCM_56860_A0)
   1033     { /* SOC_FORMAT_INT_SER_STATUS_BUS_BCM56860_A0fmt */ 
   1034         /* format            SER_STATUS_BUSfmt */
   1035         /* nFields     */ 15,
   1036         /* *fields     */ soc_SER_STATUS_BUS_BCM56850_A0fmt_fields,
   1037         /* bits        */ 50,
   1038         /* flags       */ 0,
   1039     },
   1040 #endif /* chips */
   1041 
   1042 #if defined(BCM_56870_A0)
   1043     { /* SOC_FORMAT_INT_SER_STATUS_BUS_BCM56870_A0fmt */ 
   1044         /* format            SER_STATUS_BUSfmt */
   1045         /* nFields     */ 16,
   1046         /* *fields     */ soc_SER_STATUS_BUS_BCM56870_A0fmt_fields,
   1047         /* bits        */ 50,
   1048         /* flags       */ 0,
   1049     },
   1050 #endif /* chips */
   1051 
   1052 #if defined(BCM_56960_A0)
   1053     { /* SOC_FORMAT_INT_SER_STATUS_BUS_BCM56960_A0fmt */ 
   1054         /* format            SER_STATUS_BUSfmt */
   1055         /* nFields     */ 15,
   1056         /* *fields     */ soc_SER_STATUS_BUS_BCM53400_A0fmt_fields,
   1057         /* bits        */ 50,
   1058         /* flags       */ 0,
   1059     },
   1060 #endif /* chips */
   1061 
   1062 #if defined(BCM_56965_A0)
   1063     { /* SOC_FORMAT_INT_SER_STATUS_BUS_BCM56965_A0fmt */ 
   1064         /* format            SER_STATUS_BUSfmt */
   1065         /* nFields     */ 15,
   1066         /* *fields     */ soc_SER_STATUS_BUS_BCM53400_A0fmt_fields,
   1067         /* bits        */ 50,
   1068         /* flags       */ 0,
   1069     },
   1070 #endif /* chips */
   1071 
   1072 #if defined(BCM_56970_A0)
   1073     { /* SOC_FORMAT_INT_SER_STATUS_BUS_BCM56970_A0fmt */ 
   1074         /* format            SER_STATUS_BUSfmt */
   1075         /* nFields     */ 15,
   1076         /* *fields     */ soc_SER_STATUS_BUS_BCM53400_A0fmt_fields,
   1077         /* bits        */ 50,
   1078         /* flags       */ 0,
   1079     },
   1080 #endif /* chips */
   1081 
   1082 #if defined(BCM_56980_A0)
   1083     { /* SOC_FORMAT_INT_SER_STATUS_BUS_BCM56980_A0fmt */ 
   1084         /* format            SER_STATUS_BUSfmt */
   1085         /* nFields     */ 16,
   1086         /* *fields     */ soc_SER_STATUS_BUS_BCM56870_A0fmt_fields,
   1087         /* bits        */ 50,
   1088         /* flags       */ 0,
   1089     },
   1090 #endif /* chips */
   1091 
   1092 #if defined(BCM_56980_B0)
   1093     { /* SOC_FORMAT_INT_SER_STATUS_BUS_BCM56980_B0fmt */ 
   1094         /* format            SER_STATUS_BUSfmt */
   1095         /* nFields     */ 16,
   1096         /* *fields     */ soc_SER_STATUS_BUS_BCM56870_A0fmt_fields,
   1097         /* bits        */ 50,
   1098         /* flags       */ 0,
   1099     },
   1100 #endif /* chips */
   1101 
   1102 #if defined(BCM_56960_A0)
   1103     { /* SOC_FORMAT_INT_SFLOW_ING_DATA_SOURCE_COV_DEFSfmt */ 
   1104         /* format            SFLOW_ING_DATA_SOURCE_COV_DEFSfmt */
   1105         /* nFields     */ 6,
   1106         /* *fields     */ soc_ISC_HG_STATS_COV_DEFS_BCM53400_A0fmt_fields,
   1107         /* bits        */ 11,
   1108         /* flags       */ 0,
   1109     },
   1110 #endif /* chips */
   1111 
   1112 #if defined(BCM_56370_A0)
   1113     { /* SOC_FORMAT_INT_SFLOW_ING_DATA_SOURCE_COV_DEFS_BCM56370_A0fmt */ 
   1114         /* format            SFLOW_ING_DATA_SOURCE_COV_DEFSfmt */
   1115         /* nFields     */ 6,
   1116         /* *fields     */ soc_EGR_FCOE_DELIMITER_ERROR_FRAMES_TABLE_COV_DEFS_BCM56960_A0fmt_fields,
   1117         /* bits        */ 13,
   1118         /* flags       */ 0,
   1119     },
   1120 #endif /* chips */
   1121 
   1122 #if defined(BCM_56770_A0)
   1123     { /* SOC_FORMAT_INT_SFLOW_ING_DATA_SOURCE_COV_DEFS_BCM56770_A0fmt */ 
   1124         /* format            SFLOW_ING_DATA_SOURCE_COV_DEFSfmt */
   1125         /* nFields     */ 6,
   1126         /* *fields     */ soc_EGR_FCOE_DELIMITER_ERROR_FRAMES_TABLE_COV_DEFS_BCM56960_A0fmt_fields,
   1127         /* bits        */ 13,
   1128         /* flags       */ 0,
   1129     },
   1130 #endif /* chips */
   1131 
   1132 #if defined(BCM_56870_A0)
   1133     { /* SOC_FORMAT_INT_SFLOW_ING_DATA_SOURCE_COV_DEFS_BCM56870_A0fmt */ 
   1134         /* format            SFLOW_ING_DATA_SOURCE_COV_DEFSfmt */
   1135         /* nFields     */ 6,
   1136         /* *fields     */ soc_EGR_FCOE_DELIMITER_ERROR_FRAMES_TABLE_COV_DEFS_BCM56960_A0fmt_fields,
   1137         /* bits        */ 13,
   1138         /* flags       */ 0,
   1139     },
   1140 #endif /* chips */
   1141 
   1142 #if defined(BCM_56965_A0)
   1143     { /* SOC_FORMAT_INT_SFLOW_ING_DATA_SOURCE_COV_DEFS_BCM56965_A0fmt */ 
   1144         /* format            SFLOW_ING_DATA_SOURCE_COV_DEFSfmt */
   1145         /* nFields     */ 6,
   1146         /* *fields     */ soc_ISC_HG_STATS_COV_DEFS_BCM53400_A0fmt_fields,
   1147         /* bits        */ 11,
   1148         /* flags       */ 0,
   1149     },
   1150 #endif /* chips */
   1151 
   1152 #if defined(BCM_56970_A0)
   1153     { /* SOC_FORMAT_INT_SFLOW_ING_DATA_SOURCE_COV_DEFS_BCM56970_A0fmt */ 
   1154         /* format            SFLOW_ING_DATA_SOURCE_COV_DEFSfmt */
   1155         /* nFields     */ 6,
   1156         /* *fields     */ soc_ISC_HG_STATS_COV_DEFS_BCM53400_A0fmt_fields,
   1157         /* bits        */ 11,
   1158         /* flags       */ 0,
   1159     },
   1160 #endif /* chips */
   1161 
   1162 #if defined(BCM_56980_A0)
   1163     { /* SOC_FORMAT_INT_SFLOW_ING_DATA_SOURCE_COV_DEFS_BCM56980_A0fmt */ 
   1164         /* format            SFLOW_ING_DATA_SOURCE_COV_DEFSfmt */
   1165         /* nFields     */ 6,
   1166         /* *fields     */ soc_EP_EGRESS_STATS_COUNTER_COV_DEFS_BCM53400_A0fmt_fields,
   1167         /* bits        */ 11,
   1168         /* flags       */ 0,
   1169     },
   1170 #endif /* chips */
   1171 
   1172 #if defined(BCM_56980_B0)
   1173     { /* SOC_FORMAT_INT_SFLOW_ING_DATA_SOURCE_COV_DEFS_BCM56980_B0fmt */ 
   1174         /* format            SFLOW_ING_DATA_SOURCE_COV_DEFSfmt */
   1175         /* nFields     */ 6,
   1176         /* *fields     */ soc_EP_EGRESS_STATS_COUNTER_COV_DEFS_BCM53400_A0fmt_fields,
   1177         /* bits        */ 11,
   1178         /* flags       */ 0,
   1179     },
   1180 #endif /* chips */
   1181 
   1182 #if defined(BCM_56960_A0)
   1183     { /* SOC_FORMAT_INT_SFLOW_ING_FLEX_DATA_SOURCE_COV_DEFSfmt */ 
   1184         /* format            SFLOW_ING_FLEX_DATA_SOURCE_COV_DEFSfmt */
   1185         /* nFields     */ 6,
   1186         /* *fields     */ soc_ISC_HG_STATS_COV_DEFS_BCM53400_A0fmt_fields,
   1187         /* bits        */ 11,
   1188         /* flags       */ 0,
   1189     },
   1190 #endif /* chips */
   1191 
   1192 #if defined(BCM_56370_A0)
   1193     { /* SOC_FORMAT_INT_SFLOW_ING_FLEX_DATA_SOURCE_COV_DEFS_BCM56370_A0fmt */ 
   1194         /* format            SFLOW_ING_FLEX_DATA_SOURCE_COV_DEFSfmt */
   1195         /* nFields     */ 6,
   1196         /* *fields     */ soc_EGR_FCOE_DELIMITER_ERROR_FRAMES_TABLE_COV_DEFS_BCM56960_A0fmt_fields,
   1197         /* bits        */ 13,
   1198         /* flags       */ 0,
   1199     },
   1200 #endif /* chips */
   1201 
   1202 #if defined(BCM_56770_A0)
   1203     { /* SOC_FORMAT_INT_SFLOW_ING_FLEX_DATA_SOURCE_COV_DEFS_BCM56770_A0fmt */ 
   1204         /* format            SFLOW_ING_FLEX_DATA_SOURCE_COV_DEFSfmt */
   1205         /* nFields     */ 6,
   1206         /* *fields     */ soc_EGR_FCOE_DELIMITER_ERROR_FRAMES_TABLE_COV_DEFS_BCM56960_A0fmt_fields,
   1207         /* bits        */ 13,
   1208         /* flags       */ 0,
   1209     },
   1210 #endif /* chips */
   1211 
   1212 #if defined(BCM_56870_A0)
   1213     { /* SOC_FORMAT_INT_SFLOW_ING_FLEX_DATA_SOURCE_COV_DEFS_BCM56870_A0fmt */ 
   1214         /* format            SFLOW_ING_FLEX_DATA_SOURCE_COV_DEFSfmt */
   1215         /* nFields     */ 6,
   1216         /* *fields     */ soc_EGR_FCOE_DELIMITER_ERROR_FRAMES_TABLE_COV_DEFS_BCM56960_A0fmt_fields,
   1217         /* bits        */ 13,
   1218         /* flags       */ 0,
   1219     },
   1220 #endif /* chips */
   1221 
   1222 #if defined(BCM_56965_A0)
   1223     { /* SOC_FORMAT_INT_SFLOW_ING_FLEX_DATA_SOURCE_COV_DEFS_BCM56965_A0fmt */ 
   1224         /* format            SFLOW_ING_FLEX_DATA_SOURCE_COV_DEFSfmt */
   1225         /* nFields     */ 6,
   1226         /* *fields     */ soc_ISC_HG_STATS_COV_DEFS_BCM53400_A0fmt_fields,
   1227         /* bits        */ 11,
   1228         /* flags       */ 0,
   1229     },
   1230 #endif /* chips */
   1231 
   1232 #if defined(BCM_56970_A0)
   1233     { /* SOC_FORMAT_INT_SFLOW_ING_FLEX_DATA_SOURCE_COV_DEFS_BCM56970_A0fmt */ 
   1234         /* format            SFLOW_ING_FLEX_DATA_SOURCE_COV_DEFSfmt */
   1235         /* nFields     */ 6,
   1236         /* *fields     */ soc_ISC_HG_STATS_COV_DEFS_BCM53400_A0fmt_fields,
   1237         /* bits        */ 11,
   1238         /* flags       */ 0,
   1239     },
   1240 #endif /* chips */
   1241 
   1242 #if defined(BCM_56980_A0)
   1243     { /* SOC_FORMAT_INT_SFLOW_ING_FLEX_DATA_SOURCE_COV_DEFS_BCM56980_A0fmt */ 
   1244         /* format            SFLOW_ING_FLEX_DATA_SOURCE_COV_DEFSfmt */
   1245         /* nFields     */ 6,
   1246         /* *fields     */ soc_EP_EGRESS_STATS_COUNTER_COV_DEFS_BCM53400_A0fmt_fields,
   1247         /* bits        */ 11,
   1248         /* flags       */ 0,
   1249     },
   1250 #endif /* chips */
   1251 
   1252 #if defined(BCM_56980_B0)
   1253     { /* SOC_FORMAT_INT_SFLOW_ING_FLEX_DATA_SOURCE_COV_DEFS_BCM56980_B0fmt */ 
   1254         /* format            SFLOW_ING_FLEX_DATA_SOURCE_COV_DEFSfmt */
   1255         /* nFields     */ 6,
   1256         /* *fields     */ soc_EP_EGRESS_STATS_COUNTER_COV_DEFS_BCM53400_A0fmt_fields,
   1257         /* bits        */ 11,
   1258         /* flags       */ 0,
   1259     },
   1260 #endif /* chips */
   1261 
   1262 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \
   1263     defined(BCM_56870_A0)
   1264     { /* SOC_FORMAT_INT_SGLP_ACTION_SETfmt */ 
   1265         /* format            SGLP_ACTION_SETfmt */
   1266         /* nFields     */ 5,
   1267         /* *fields     */ soc_SGLP_ACTION_SETfmt_fields,
   1268         /* bits        */ 17,
   1269         /* flags       */ 0,
   1270     },
   1271 #endif /* chips */
   1272 
   1273 #if defined(BCM_56770_A0) || defined(BCM_56870_A0)
   1274     { /* SOC_FORMAT_INT_SGPP_SUBPORT_ID_SGPP_MAP_DOPfmt */ 
   1275         /* format            SGPP_SUBPORT_ID_SGPP_MAP_DOPfmt */
   1276         /* nFields     */ 3,
   1277         /* *fields     */ soc_SGPP_SUBPORT_ID_SGPP_MAP_DOPfmt_fields,
   1278         /* bits        */ 96,
   1279         /* flags       */ 0,
   1280     },
   1281 #endif /* chips */
   1282 
   1283 #if defined(BCM_56370_A0)
   1284     { /* SOC_FORMAT_INT_SGPP_SUBPORT_ID_SGPP_MAP_DOP_BCM56370_A0fmt */ 
   1285         /* format            SGPP_SUBPORT_ID_SGPP_MAP_DOPfmt */
   1286         /* nFields     */ 3,
   1287         /* *fields     */ soc_SGPP_SUBPORT_ID_SGPP_MAP_DOP_BCM56370_A0fmt_fields,
   1288         /* bits        */ 96,
   1289         /* flags       */ 0,
   1290     },
   1291 #endif /* chips */
   1292 
   1293 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \
   1294     defined(BCM_56870_A0) || defined(BCM_56980_A0) || \
   1295     defined(BCM_56980_B0)
   1296     { /* SOC_FORMAT_INT_SHARED_BANKS_CONTROLfmt */ 
   1297         /* format            SHARED_BANKS_CONTROLfmt */
   1298         /* nFields     */ 19,
   1299         /* *fields     */ soc_SHARED_BANKS_CONTROLfmt_fields,
   1300         /* bits        */ 81,
   1301         /* flags       */ 0,
   1302     },
   1303 #endif /* chips */
   1304 
   1305 #if defined(BCM_56340_A0) || defined(BCM_56640_A0)
   1306     { /* SOC_FORMAT_INT_SM_RES_HDRfmt */ 
   1307         /* format            SM_RES_HDRfmt */
   1308         /* nFields     */ 15,
   1309         /* *fields     */ soc_SM_RES_HDRfmt_fields,
   1310         /* bits        */ 64,
   1311         /* flags       */ 0,
   1312     },
   1313 #endif /* chips */
   1314 
   1315 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \
   1316     defined(BCM_56870_A0)
   1317     { /* SOC_FORMAT_INT_SNAP_HDRfmt */ 
   1318         /* format            SNAP_HDRfmt */
   1319         /* nFields     */ 2,
   1320         /* *fields     */ soc_SNAP_HDRfmt_fields,
   1321         /* bits        */ 40,
   1322         /* flags       */ 0,
   1323     },
   1324 #endif /* chips */
   1325 
   1326 #if defined(BCM_56770_A0) || defined(BCM_56870_A0)
   1327     { /* SOC_FORMAT_INT_SNAT_NAT_INDICES_DOPfmt */ 
   1328         /* format            SNAT_NAT_INDICES_DOPfmt */
   1329         /* nFields     */ 6,
   1330         /* *fields     */ soc_SNAT_NAT_INDICES_DOPfmt_fields,
   1331         /* bits        */ 32,
   1332         /* flags       */ 0,
   1333     },
   1334 #endif /* chips */
   1335 
   1336 #if defined(BCM_56370_A0)
   1337     { /* SOC_FORMAT_INT_SNAT_NAT_INDICES_DOP_BCM56370_A0fmt */ 
   1338         /* format            SNAT_NAT_INDICES_DOPfmt */
   1339         /* nFields     */ 6,
   1340         /* *fields     */ soc_SNAT_NAT_INDICES_DOP_BCM56370_A0fmt_fields,
   1341         /* bits        */ 32,
   1342         /* flags       */ 0,
   1343     },
   1344 #endif /* chips */
   1345 
   1346 #if defined(BCM_56314_A0) || defined(BCM_56504_A0) || \
   1347     defined(BCM_56504_B0) || defined(BCM_56514_A0)
   1348     { /* SOC_FORMAT_INT_SOBMHfmt */ 
   1349         /* format            SOBMHfmt */
   1350         /* nFields     */ 7,
   1351         /* *fields     */ soc_SOBMHfmt_fields,
   1352         /* bits        */ 96,
   1353         /* flags       */ 0,
   1354     },
   1355 #endif /* chips */
   1356 
   1357 #if defined(BCM_53314_A0)
   1358     { /* SOC_FORMAT_INT_SOBMH_BCM53314_A0fmt */ 
   1359         /* format            SOBMHfmt */
   1360         /* nFields     */ 10,
   1361         /* *fields     */ soc_SOBMH_BCM53314_A0fmt_fields,
   1362         /* bits        */ 128,
   1363         /* flags       */ 0,
   1364     },
   1365 #endif /* chips */
   1366 
   1367 #if defined(BCM_53324_A0)
   1368     { /* SOC_FORMAT_INT_SOBMH_BCM53324_A0fmt */ 
   1369         /* format            SOBMHfmt */
   1370         /* nFields     */ 10,
   1371         /* *fields     */ soc_SOBMH_BCM53314_A0fmt_fields,
   1372         /* bits        */ 128,
   1373         /* flags       */ 0,
   1374     },
   1375 #endif /* chips */
   1376 
   1377 #if defined(BCM_53400_A0)
   1378     { /* SOC_FORMAT_INT_SOBMH_BCM53400_A0fmt */ 
   1379         /* format            SOBMHfmt */
   1380         /* nFields     */ 36,
   1381         /* *fields     */ soc_SOBMH_BCM53400_A0fmt_fields,
   1382         /* bits        */ 128,
   1383         /* flags       */ 0,
   1384     },
   1385 #endif /* chips */
   1386 
   1387 #if defined(BCM_53540_A0)
   1388     { /* SOC_FORMAT_INT_SOBMH_BCM53540_A0fmt */ 
   1389         /* format            SOBMHfmt */
   1390         /* nFields     */ 36,
   1391         /* *fields     */ soc_SOBMH_BCM53400_A0fmt_fields,
   1392         /* bits        */ 128,
   1393         /* flags       */ 0,
   1394     },
   1395 #endif /* chips */
   1396 
   1397 #if defined(BCM_53570_A0)
   1398     { /* SOC_FORMAT_INT_SOBMH_BCM53570_A0fmt */ 
   1399         /* format            SOBMHfmt */
   1400         /* nFields     */ 36,
   1401         /* *fields     */ soc_SOBMH_BCM53400_A0fmt_fields,
   1402         /* bits        */ 128,
   1403         /* flags       */ 0,
   1404     },
   1405 #endif /* chips */
   1406 
   1407 #if defined(BCM_53570_B0)
   1408     { /* SOC_FORMAT_INT_SOBMH_BCM53570_B0fmt */ 
   1409         /* format            SOBMHfmt */
   1410         /* nFields     */ 36,
   1411         /* *fields     */ soc_SOBMH_BCM53400_A0fmt_fields,
   1412         /* bits        */ 128,
   1413         /* flags       */ 0,
   1414     },
   1415 #endif /* chips */
   1416 
   1417 #if defined(BCM_56142_A0)
   1418     { /* SOC_FORMAT_INT_SOBMH_BCM56142_A0fmt */ 
   1419         /* format            SOBMHfmt */
   1420         /* nFields     */ 10,
   1421         /* *fields     */ soc_SOBMH_BCM56634_A0fmt_fields,
   1422         /* bits        */ 128,
   1423         /* flags       */ 0,
   1424     },
   1425 #endif /* chips */
   1426 
   1427 #if defined(BCM_56150_A0)
   1428     { /* SOC_FORMAT_INT_SOBMH_BCM56150_A0fmt */ 
   1429         /* format            SOBMHfmt */
   1430         /* nFields     */ 36,
   1431         /* *fields     */ soc_SOBMH_BCM56850_A0fmt_fields,
   1432         /* bits        */ 128,
   1433         /* flags       */ 0,
   1434     },
   1435 #endif /* chips */
   1436 
   1437 #if defined(BCM_56160_A0)
   1438     { /* SOC_FORMAT_INT_SOBMH_BCM56160_A0fmt */ 
   1439         /* format            SOBMHfmt */
   1440         /* nFields     */ 36,
   1441         /* *fields     */ soc_SOBMH_BCM53400_A0fmt_fields,
   1442         /* bits        */ 128,
   1443         /* flags       */ 0,
   1444     },
   1445 #endif /* chips */
   1446 
   1447 #if defined(BCM_56224_A0)
   1448     { /* SOC_FORMAT_INT_SOBMH_BCM56224_A0fmt */ 
   1449         /* format            SOBMHfmt */
   1450         /* nFields     */ 9,
   1451         /* *fields     */ soc_SOBMH_BCM56224_A0fmt_fields,
   1452         /* bits        */ 128,
   1453         /* flags       */ 0,
   1454     },
   1455 #endif /* chips */
   1456 
   1457 #if defined(BCM_56224_B0)
   1458     { /* SOC_FORMAT_INT_SOBMH_BCM56224_B0fmt */ 
   1459         /* format            SOBMHfmt */
   1460         /* nFields     */ 9,
   1461         /* *fields     */ soc_SOBMH_BCM56224_A0fmt_fields,
   1462         /* bits        */ 128,
   1463         /* flags       */ 0,
   1464     },
   1465 #endif /* chips */
   1466 
   1467 #if defined(BCM_56260_A0)
   1468     { /* SOC_FORMAT_INT_SOBMH_BCM56260_A0fmt */ 
   1469         /* format            SOBMHfmt */
   1470         /* nFields     */ 90,
   1471         /* *fields     */ soc_SOBMH_BCM56260_A0fmt_fields,
   1472         /* bits        */ 128,
   1473         /* flags       */ 0,
   1474     },
   1475 #endif /* chips */
   1476 
   1477 #if defined(BCM_56260_B0)
   1478     { /* SOC_FORMAT_INT_SOBMH_BCM56260_B0fmt */ 
   1479         /* format            SOBMHfmt */
   1480         /* nFields     */ 90,
   1481         /* *fields     */ soc_SOBMH_BCM56260_A0fmt_fields,
   1482         /* bits        */ 128,
   1483         /* flags       */ 0,
   1484     },
   1485 #endif /* chips */
   1486 
   1487 #if defined(BCM_56270_A0)
   1488     { /* SOC_FORMAT_INT_SOBMH_BCM56270_A0fmt */ 
   1489         /* format            SOBMHfmt */
   1490         /* nFields     */ 90,
   1491         /* *fields     */ soc_SOBMH_BCM56270_A0fmt_fields,
   1492         /* bits        */ 128,
   1493         /* flags       */ 0,
   1494     },
   1495 #endif /* chips */
   1496 
   1497 #if defined(BCM_56334_A0)
   1498     { /* SOC_FORMAT_INT_SOBMH_BCM56334_A0fmt */ 
   1499         /* format            SOBMHfmt */
   1500         /* nFields     */ 10,
   1501         /* *fields     */ soc_SOBMH_BCM56634_A0fmt_fields,
   1502         /* bits        */ 128,
   1503         /* flags       */ 0,
   1504     },
   1505 #endif /* chips */
   1506 
   1507 #if defined(BCM_56334_B0)
   1508     { /* SOC_FORMAT_INT_SOBMH_BCM56334_B0fmt */ 
   1509         /* format            SOBMHfmt */
   1510         /* nFields     */ 10,
   1511         /* *fields     */ soc_SOBMH_BCM56634_A0fmt_fields,
   1512         /* bits        */ 128,
   1513         /* flags       */ 0,
   1514     },
   1515 #endif /* chips */
   1516 
   1517 #if defined(BCM_56340_A0)
   1518     { /* SOC_FORMAT_INT_SOBMH_BCM56340_A0fmt */ 
   1519         /* format            SOBMHfmt */
   1520         /* nFields     */ 36,
   1521         /* *fields     */ soc_SOBMH_BCM56640_A0fmt_fields,
   1522         /* bits        */ 128,
   1523         /* flags       */ 0,
   1524     },
   1525 #endif /* chips */
   1526 
   1527 #if defined(BCM_56370_A0)
   1528     { /* SOC_FORMAT_INT_SOBMH_BCM56370_A0fmt */ 
   1529         /* format            SOBMHfmt */
   1530         /* nFields     */ 27,
   1531         /* *fields     */ soc_SOBMH_BCM56370_A0fmt_fields,
   1532         /* bits        */ 128,
   1533         /* flags       */ 0,
   1534     },
   1535 #endif /* chips */
   1536 
   1537 #if defined(BCM_56440_A0)
   1538     { /* SOC_FORMAT_INT_SOBMH_BCM56440_A0fmt */ 
   1539         /* format            SOBMHfmt */
   1540         /* nFields     */ 22,
   1541         /* *fields     */ soc_SOBMH_BCM56440_A0fmt_fields,
   1542         /* bits        */ 128,
   1543         /* flags       */ 0,
   1544     },
   1545 #endif /* chips */
   1546 
   1547 #if defined(BCM_56440_B0)
   1548     { /* SOC_FORMAT_INT_SOBMH_BCM56440_B0fmt */ 
   1549         /* format            SOBMHfmt */
   1550         /* nFields     */ 22,
   1551         /* *fields     */ soc_SOBMH_BCM56440_A0fmt_fields,
   1552         /* bits        */ 128,
   1553         /* flags       */ 0,
   1554     },
   1555 #endif /* chips */
   1556 
   1557 #if defined(BCM_56450_A0)
   1558     { /* SOC_FORMAT_INT_SOBMH_BCM56450_A0fmt */ 
   1559         /* format            SOBMHfmt */
   1560         /* nFields     */ 80,
   1561         /* *fields     */ soc_SOBMH_BCM56450_A0fmt_fields,
   1562         /* bits        */ 128,
   1563         /* flags       */ 0,
   1564     },
   1565 #endif /* chips */
   1566 
   1567 #if defined(BCM_56450_B0)
   1568     { /* SOC_FORMAT_INT_SOBMH_BCM56450_B0fmt */ 
   1569         /* format            SOBMHfmt */
   1570         /* nFields     */ 80,
   1571         /* *fields     */ soc_SOBMH_BCM56450_A0fmt_fields,
   1572         /* bits        */ 128,
   1573         /* flags       */ 0,
   1574     },
   1575 #endif /* chips */
   1576 
   1577 #if defined(BCM_56450_B1)
   1578     { /* SOC_FORMAT_INT_SOBMH_BCM56450_B1fmt */ 
   1579         /* format            SOBMHfmt */
   1580         /* nFields     */ 80,
   1581         /* *fields     */ soc_SOBMH_BCM56450_A0fmt_fields,
   1582         /* bits        */ 128,
   1583         /* flags       */ 0,
   1584     },
   1585 #endif /* chips */
   1586 
   1587 #if defined(BCM_56524_A0)
   1588     { /* SOC_FORMAT_INT_SOBMH_BCM56524_A0fmt */ 
   1589         /* format            SOBMHfmt */
   1590         /* nFields     */ 10,
   1591         /* *fields     */ soc_SOBMH_BCM56634_A0fmt_fields,
   1592         /* bits        */ 128,
   1593         /* flags       */ 0,
   1594     },
   1595 #endif /* chips */
   1596 
   1597 #if defined(BCM_56524_B0)
   1598     { /* SOC_FORMAT_INT_SOBMH_BCM56524_B0fmt */ 
   1599         /* format            SOBMHfmt */
   1600         /* nFields     */ 10,
   1601         /* *fields     */ soc_SOBMH_BCM56634_A0fmt_fields,
   1602         /* bits        */ 128,
   1603         /* flags       */ 0,
   1604     },
   1605 #endif /* chips */
   1606 
   1607 #if defined(BCM_56560_A0)
   1608     { /* SOC_FORMAT_INT_SOBMH_BCM56560_A0fmt */ 
   1609         /* format            SOBMHfmt */
   1610         /* nFields     */ 75,
   1611         /* *fields     */ soc_SOBMH_BCM56560_A0fmt_fields,
   1612         /* bits        */ 128,
   1613         /* flags       */ 0,
   1614     },
   1615 #endif /* chips */
   1616 
   1617 #if defined(BCM_56560_B0)
   1618     { /* SOC_FORMAT_INT_SOBMH_BCM56560_B0fmt */ 
   1619         /* format            SOBMHfmt */
   1620         /* nFields     */ 75,
   1621         /* *fields     */ soc_SOBMH_BCM56560_A0fmt_fields,
   1622         /* bits        */ 128,
   1623         /* flags       */ 0,
   1624     },
   1625 #endif /* chips */
   1626 
   1627 #if defined(BCM_56624_A0)
   1628     { /* SOC_FORMAT_INT_SOBMH_BCM56624_A0fmt */ 
   1629         /* format            SOBMHfmt */
   1630         /* nFields     */ 9,
   1631         /* *fields     */ soc_SOBMH_BCM56624_A0fmt_fields,
   1632         /* bits        */ 128,
   1633         /* flags       */ 0,
   1634     },
   1635 #endif /* chips */
   1636 
   1637 #if defined(BCM_56624_B0)
   1638     { /* SOC_FORMAT_INT_SOBMH_BCM56624_B0fmt */ 
   1639         /* format            SOBMHfmt */
   1640         /* nFields     */ 9,
   1641         /* *fields     */ soc_SOBMH_BCM56624_A0fmt_fields,
   1642         /* bits        */ 128,
   1643         /* flags       */ 0,
   1644     },
   1645 #endif /* chips */
   1646 
   1647 #if defined(BCM_56634_A0)
   1648     { /* SOC_FORMAT_INT_SOBMH_BCM56634_A0fmt */ 
   1649         /* format            SOBMHfmt */
   1650         /* nFields     */ 10,
   1651         /* *fields     */ soc_SOBMH_BCM56634_A0fmt_fields,
   1652         /* bits        */ 128,
   1653         /* flags       */ 0,
   1654     },
   1655 #endif /* chips */
   1656 
   1657 #if defined(BCM_56634_B0)
   1658     { /* SOC_FORMAT_INT_SOBMH_BCM56634_B0fmt */ 
   1659         /* format            SOBMHfmt */
   1660         /* nFields     */ 10,
   1661         /* *fields     */ soc_SOBMH_BCM56634_A0fmt_fields,
   1662         /* bits        */ 128,
   1663         /* flags       */ 0,
   1664     },
   1665 #endif /* chips */
   1666 
   1667 #if defined(BCM_56640_A0)
   1668     { /* SOC_FORMAT_INT_SOBMH_BCM56640_A0fmt */ 
   1669         /* format            SOBMHfmt */
   1670         /* nFields     */ 36,
   1671         /* *fields     */ soc_SOBMH_BCM56640_A0fmt_fields,
   1672         /* bits        */ 128,
   1673         /* flags       */ 0,
   1674     },
   1675 #endif /* chips */
   1676 
   1677 #if defined(BCM_56670_A0)
   1678     { /* SOC_FORMAT_INT_SOBMH_BCM56670_A0fmt */ 
   1679         /* format            SOBMHfmt */
   1680         /* nFields     */ 88,
   1681         /* *fields     */ soc_SOBMH_BCM56670_A0fmt_fields,
   1682         /* bits        */ 128,
   1683         /* flags       */ 0,
   1684     },
   1685 #endif /* chips */
   1686 
   1687 #if defined(BCM_56670_B0)
   1688     { /* SOC_FORMAT_INT_SOBMH_BCM56670_B0fmt */ 
   1689         /* format            SOBMHfmt */
   1690         /* nFields     */ 88,
   1691         /* *fields     */ soc_SOBMH_BCM56670_A0fmt_fields,
   1692         /* bits        */ 128,
   1693         /* flags       */ 0,
   1694     },
   1695 #endif /* chips */
   1696 
   1697 #if defined(BCM_56680_A0)
   1698     { /* SOC_FORMAT_INT_SOBMH_BCM56680_A0fmt */ 
   1699         /* format            SOBMHfmt */
   1700         /* nFields     */ 9,
   1701         /* *fields     */ soc_SOBMH_BCM56624_A0fmt_fields,
   1702         /* bits        */ 128,
   1703         /* flags       */ 0,
   1704     },
   1705 #endif /* chips */
   1706 
   1707 #if defined(BCM_56680_B0)
   1708     { /* SOC_FORMAT_INT_SOBMH_BCM56680_B0fmt */ 
   1709         /* format            SOBMHfmt */
   1710         /* nFields     */ 9,
   1711         /* *fields     */ soc_SOBMH_BCM56624_A0fmt_fields,
   1712         /* bits        */ 128,
   1713         /* flags       */ 0,
   1714     },
   1715 #endif /* chips */
   1716 
   1717 #if defined(BCM_56685_A0)
   1718     { /* SOC_FORMAT_INT_SOBMH_BCM56685_A0fmt */ 
   1719         /* format            SOBMHfmt */
   1720         /* nFields     */ 10,
   1721         /* *fields     */ soc_SOBMH_BCM56634_A0fmt_fields,
   1722         /* bits        */ 128,
   1723         /* flags       */ 0,
   1724     },
   1725 #endif /* chips */
   1726 
   1727 #if defined(BCM_56685_B0)
   1728     { /* SOC_FORMAT_INT_SOBMH_BCM56685_B0fmt */ 
   1729         /* format            SOBMHfmt */
   1730         /* nFields     */ 10,
   1731         /* *fields     */ soc_SOBMH_BCM56634_A0fmt_fields,
   1732         /* bits        */ 128,
   1733         /* flags       */ 0,
   1734     },
   1735 #endif /* chips */
   1736 
   1737 #if defined(BCM_56725_A0)
   1738     { /* SOC_FORMAT_INT_SOBMH_BCM56725_A0fmt */ 
   1739         /* format            SOBMHfmt */
   1740         /* nFields     */ 9,
   1741         /* *fields     */ soc_SOBMH_BCM56820_A0fmt_fields,
   1742         /* bits        */ 128,
   1743         /* flags       */ 0,
   1744     },
   1745 #endif /* chips */
   1746 
   1747 #if defined(BCM_56770_A0)
   1748     { /* SOC_FORMAT_INT_SOBMH_BCM56770_A0fmt */ 
   1749         /* format            SOBMHfmt */
   1750         /* nFields     */ 26,
   1751         /* *fields     */ soc_SOBMH_BCM56870_A0fmt_fields,
   1752         /* bits        */ 128,
   1753         /* flags       */ 0,
   1754     },
   1755 #endif /* chips */
   1756 
   1757 #if defined(BCM_56800_A0)
   1758     { /* SOC_FORMAT_INT_SOBMH_BCM56800_A0fmt */ 
   1759         /* format            SOBMHfmt */
   1760         /* nFields     */ 9,
   1761         /* *fields     */ soc_SOBMH_BCM56800_A0fmt_fields,
   1762         /* bits        */ 128,
   1763         /* flags       */ 0,
   1764     },
   1765 #endif /* chips */
   1766 
   1767 #if defined(BCM_56820_A0)
   1768     { /* SOC_FORMAT_INT_SOBMH_BCM56820_A0fmt */ 
   1769         /* format            SOBMHfmt */
   1770         /* nFields     */ 9,
   1771         /* *fields     */ soc_SOBMH_BCM56820_A0fmt_fields,
   1772         /* bits        */ 128,
   1773         /* flags       */ 0,
   1774     },
   1775 #endif /* chips */
   1776 
   1777 #if defined(BCM_56840_A0)
   1778     { /* SOC_FORMAT_INT_SOBMH_BCM56840_A0fmt */ 
   1779         /* format            SOBMHfmt */
   1780         /* nFields     */ 18,
   1781         /* *fields     */ soc_SOBMH_BCM56840_A0fmt_fields,
   1782         /* bits        */ 128,
   1783         /* flags       */ 0,
   1784     },
   1785 #endif /* chips */
   1786 
   1787 #if defined(BCM_56840_B0)
   1788     { /* SOC_FORMAT_INT_SOBMH_BCM56840_B0fmt */ 
   1789         /* format            SOBMHfmt */
   1790         /* nFields     */ 18,
   1791         /* *fields     */ soc_SOBMH_BCM56840_A0fmt_fields,
   1792         /* bits        */ 128,
   1793         /* flags       */ 0,
   1794     },
   1795 #endif /* chips */
   1796 
   1797 #if defined(BCM_56850_A0)
   1798     { /* SOC_FORMAT_INT_SOBMH_BCM56850_A0fmt */ 
   1799         /* format            SOBMHfmt */
   1800         /* nFields     */ 36,
   1801         /* *fields     */ soc_SOBMH_BCM56850_A0fmt_fields,
   1802         /* bits        */ 128,
   1803         /* flags       */ 0,
   1804     },
   1805 #endif /* chips */
   1806 
   1807 #if defined(BCM_56860_A0)
   1808     { /* SOC_FORMAT_INT_SOBMH_BCM56860_A0fmt */ 
   1809         /* format            SOBMHfmt */
   1810         /* nFields     */ 58,
   1811         /* *fields     */ soc_SOBMH_BCM56860_A0fmt_fields,
   1812         /* bits        */ 128,
   1813         /* flags       */ 0,
   1814     },
   1815 #endif /* chips */
   1816 
   1817 #if defined(BCM_56870_A0)
   1818     { /* SOC_FORMAT_INT_SOBMH_BCM56870_A0fmt */ 
   1819         /* format            SOBMHfmt */
   1820         /* nFields     */ 26,
   1821         /* *fields     */ soc_SOBMH_BCM56870_A0fmt_fields,
   1822         /* bits        */ 128,
   1823         /* flags       */ 0,
   1824     },
   1825 #endif /* chips */
   1826 
   1827 #if defined(BCM_56960_A0)
   1828     { /* SOC_FORMAT_INT_SOBMH_BCM56960_A0fmt */ 
   1829         /* format            SOBMHfmt */
   1830         /* nFields     */ 27,
   1831         /* *fields     */ soc_SOBMH_BCM56960_A0fmt_fields,
   1832         /* bits        */ 128,
   1833         /* flags       */ 0,
   1834     },
   1835 #endif /* chips */
   1836 
   1837 #if defined(BCM_56965_A0)
   1838     { /* SOC_FORMAT_INT_SOBMH_BCM56965_A0fmt */ 
   1839         /* format            SOBMHfmt */
   1840         /* nFields     */ 27,
   1841         /* *fields     */ soc_SOBMH_BCM56960_A0fmt_fields,
   1842         /* bits        */ 128,
   1843         /* flags       */ 0,
   1844     },
   1845 #endif /* chips */
   1846 
   1847 #if defined(BCM_56970_A0)
   1848     { /* SOC_FORMAT_INT_SOBMH_BCM56970_A0fmt */ 
   1849         /* format            SOBMHfmt */
   1850         /* nFields     */ 27,
   1851         /* *fields     */ soc_SOBMH_BCM56960_A0fmt_fields,
   1852         /* bits        */ 128,
   1853         /* flags       */ 0,
   1854     },
   1855 #endif /* chips */
   1856 
   1857 #if defined(BCM_56980_A0)
   1858     { /* SOC_FORMAT_INT_SOBMH_BCM56980_A0fmt */ 
   1859         /* format            SOBMHfmt */
   1860         /* nFields     */ 27,
   1861         /* *fields     */ soc_SOBMH_BCM56960_A0fmt_fields,
   1862         /* bits        */ 128,
   1863         /* flags       */ 0,
   1864     },
   1865 #endif /* chips */
   1866 
   1867 #if defined(BCM_56980_B0)
   1868     { /* SOC_FORMAT_INT_SOBMH_BCM56980_B0fmt */ 
   1869         /* format            SOBMHfmt */
   1870         /* nFields     */ 27,
   1871         /* *fields     */ soc_SOBMH_BCM56960_A0fmt_fields,
   1872         /* bits        */ 128,
   1873         /* flags       */ 0,
   1874     },
   1875 #endif /* chips */
   1876 
   1877 #if defined(BCM_88732_A0)
   1878     { /* SOC_FORMAT_INT_SOBMH_BCM88732_A0fmt */ 
   1879         /* format            SOBMHfmt */
   1880         /* nFields     */ 9,
   1881         /* *fields     */ soc_SOBMH_BCM56820_A0fmt_fields,
   1882         /* bits        */ 128,
   1883         /* flags       */ 0,
   1884     },
   1885 #endif /* chips */
   1886 
   1887 #if defined(BCM_56450_A0) || defined(BCM_56450_B0) || \
   1888     defined(BCM_56450_B1)
   1889     { /* SOC_FORMAT_INT_SOP_CONTROLfmt */ 
   1890         /* format            SOP_CONTROLfmt */
   1891         /* nFields     */ 19,
   1892         /* *fields     */ soc_SOP_CONTROLfmt_fields,
   1893         /* bits        */ 479,
   1894         /* flags       */ 0,
   1895     },
   1896 #endif /* chips */
   1897 
   1898 #if defined(BCM_56450_A0) || defined(BCM_56450_B0) || \
   1899     defined(BCM_56450_B1)
   1900     { /* SOC_FORMAT_INT_SOP_CONTROL_1fmt */ 
   1901         /* format            SOP_CONTROL_1fmt */
   1902         /* nFields     */ 10,
   1903         /* *fields     */ soc_SOP_CONTROL_1fmt_fields,
   1904         /* bits        */ 43,
   1905         /* flags       */ 0,
   1906     },
   1907 #endif /* chips */
   1908 
   1909 #if defined(BCM_56260_A0)
   1910     { /* SOC_FORMAT_INT_SOP_CONTROL_1_BCM56260_A0fmt */ 
   1911         /* format            SOP_CONTROL_1fmt */
   1912         /* nFields     */ 10,
   1913         /* *fields     */ soc_SOP_CONTROL_1_BCM56260_A0fmt_fields,
   1914         /* bits        */ 43,
   1915         /* flags       */ 0,
   1916     },
   1917 #endif /* chips */
   1918 
   1919 #if defined(BCM_56260_B0)
   1920     { /* SOC_FORMAT_INT_SOP_CONTROL_1_BCM56260_B0fmt */ 
   1921         /* format            SOP_CONTROL_1fmt */
   1922         /* nFields     */ 10,
   1923         /* *fields     */ soc_SOP_CONTROL_1_BCM56260_A0fmt_fields,
   1924         /* bits        */ 43,
   1925         /* flags       */ 0,
   1926     },
   1927 #endif /* chips */
   1928 
   1929 #if defined(BCM_56270_A0)
   1930     { /* SOC_FORMAT_INT_SOP_CONTROL_1_BCM56270_A0fmt */ 
   1931         /* format            SOP_CONTROL_1fmt */
   1932         /* nFields     */ 11,
   1933         /* *fields     */ soc_SOP_CONTROL_1_BCM56270_A0fmt_fields,
   1934         /* bits        */ 43,
   1935         /* flags       */ 0,
   1936     },
   1937 #endif /* chips */
   1938 
   1939 #if defined(BCM_56260_A0)
   1940     { /* SOC_FORMAT_INT_SOP_CONTROL_BCM56260_A0fmt */ 
   1941         /* format            SOP_CONTROLfmt */
   1942         /* nFields     */ 19,
   1943         /* *fields     */ soc_SOP_CONTROL_BCM56260_A0fmt_fields,
   1944         /* bits        */ 479,
   1945         /* flags       */ 0,
   1946     },
   1947 #endif /* chips */
   1948 
   1949 #if defined(BCM_56260_B0)
   1950     { /* SOC_FORMAT_INT_SOP_CONTROL_BCM56260_B0fmt */ 
   1951         /* format            SOP_CONTROLfmt */
   1952         /* nFields     */ 19,
   1953         /* *fields     */ soc_SOP_CONTROL_BCM56260_A0fmt_fields,
   1954         /* bits        */ 479,
   1955         /* flags       */ 0,
   1956     },
   1957 #endif /* chips */
   1958 
   1959 #if defined(BCM_56270_A0)
   1960     { /* SOC_FORMAT_INT_SOP_CONTROL_BCM56270_A0fmt */ 
   1961         /* format            SOP_CONTROLfmt */
   1962         /* nFields     */ 20,
   1963         /* *fields     */ soc_SOP_CONTROL_BCM56270_A0fmt_fields,
   1964         /* bits        */ 479,
   1965         /* flags       */ 0,
   1966     },
   1967 #endif /* chips */
   1968 
   1969 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \
   1970     defined(BCM_56870_A0)
   1971     { /* SOC_FORMAT_INT_SPECIAL_LABEL_PUSH_TYPE_FORMATfmt */ 
   1972         /* format            SPECIAL_LABEL_PUSH_TYPE_FORMATfmt */
   1973         /* nFields     */ 1,
   1974         /* *fields     */ soc_SPECIAL_LABEL_PUSH_TYPE_FORMATfmt_fields,
   1975         /* bits        */ 2,
   1976         /* flags       */ 0,
   1977     },
   1978 #endif /* chips */
   1979 
   1980 #if defined(BCM_56370_A0)
   1981     { /* SOC_FORMAT_INT_SS_BANK_WR_INTFfmt */ 
   1982         /* format            SS_BANK_WR_INTFfmt */
   1983         /* nFields     */ 8,
   1984         /* *fields     */ soc_SS_BANK_WR_INTFfmt_fields,
   1985         /* bits        */ 272,
   1986         /* flags       */ 0,
   1987     },
   1988 #endif /* chips */
   1989 
   1990 #if defined(BCM_56370_A0)
   1991     { /* SOC_FORMAT_INT_SS_BASE_VALID_OUTfmt */ 
   1992         /* format            SS_BASE_VALID_OUTfmt */
   1993         /* nFields     */ 8,
   1994         /* *fields     */ soc_SS_BASE_VALID_OUTfmt_fields,
   1995         /* bits        */ 96,
   1996         /* flags       */ 0,
   1997     },
   1998 #endif /* chips */
   1999 
   2000 #if defined(BCM_56370_A0)
   2001     { /* SOC_FORMAT_INT_SS_ECC_ENTRY_BUSfmt */ 
   2002         /* format            SS_ECC_ENTRY_BUSfmt */
   2003         /* nFields     */ 16,
   2004         /* *fields     */ soc_SS_ECC_ENTRY_BUSfmt_fields,
   2005         /* bits        */ 144,
   2006         /* flags       */ 0,
   2007     },
   2008 #endif /* chips */
   2009 
   2010 #if defined(BCM_56370_A0)
   2011     { /* SOC_FORMAT_INT_SS_LOGICAL_BKT_IDX_BUSfmt */ 
   2012         /* format            SS_LOGICAL_BKT_IDX_BUSfmt */
   2013         /* nFields     */ 8,
   2014         /* *fields     */ soc_SS_LOGICAL_BKT_IDX_BUSfmt_fields,
   2015         /* bits        */ 120,
   2016         /* flags       */ 0,
   2017     },
   2018 #endif /* chips */
   2019 
   2020 #if defined(BCM_56340_A0) || defined(BCM_56640_A0)
   2021     { /* SOC_FORMAT_INT_SS_REQ_BUSfmt */ 
   2022         /* format            SS_REQ_BUSfmt */
   2023         /* nFields     */ 6,
   2024         /* *fields     */ soc_SS_REQ_BUSfmt_fields,
   2025         /* bits        */ 102,
   2026         /* flags       */ 0,
   2027     },
   2028 #endif /* chips */
   2029 
   2030 #if defined(BCM_56340_A0) || defined(BCM_56640_A0)
   2031     { /* SOC_FORMAT_INT_SS_REQ_BUS0fmt */ 
   2032         /* format            SS_REQ_BUS0fmt */
   2033         /* nFields     */ 1,
   2034         /* *fields     */ soc_SS_REQ_BUS0fmt_fields,
   2035         /* bits        */ 210,
   2036         /* flags       */ 0,
   2037     },
   2038 #endif /* chips */
   2039 
   2040 #if defined(BCM_56640_A0)
   2041     { /* SOC_FORMAT_INT_SS_REQ_BUS1fmt */ 
   2042         /* format            SS_REQ_BUS1fmt */
   2043         /* nFields     */ 1,
   2044         /* *fields     */ soc_SS_REQ_BUS0fmt_fields,
   2045         /* bits        */ 210,
   2046         /* flags       */ 0,
   2047     },
   2048 #endif /* chips */
   2049 
   2050 #if defined(BCM_56340_A0) || defined(BCM_56640_A0)
   2051     { /* SOC_FORMAT_INT_SS_REQ_BUS2fmt */ 
   2052         /* format            SS_REQ_BUS2fmt */
   2053         /* nFields     */ 1,
   2054         /* *fields     */ soc_SS_REQ_BUS2fmt_fields,
   2055         /* bits        */ 420,
   2056         /* flags       */ 0,
   2057     },
   2058 #endif /* chips */
   2059 
   2060 #if defined(BCM_56340_A0) || defined(BCM_56640_A0)
   2061     { /* SOC_FORMAT_INT_SS_REQ_BUS3fmt */ 
   2062         /* format            SS_REQ_BUS3fmt */
   2063         /* nFields     */ 1,
   2064         /* *fields     */ soc_SS_REQ_BUS3fmt_fields,
   2065         /* bits        */ 105,
   2066         /* flags       */ 0,
   2067     },
   2068 #endif /* chips */
   2069 
   2070 #if defined(BCM_56640_A0)
   2071     { /* SOC_FORMAT_INT_SS_REQ_BUS4fmt */ 
   2072         /* format            SS_REQ_BUS4fmt */
   2073         /* nFields     */ 1,
   2074         /* *fields     */ soc_SS_REQ_BUS0fmt_fields,
   2075         /* bits        */ 210,
   2076         /* flags       */ 0,
   2077     },
   2078 #endif /* chips */
   2079 
   2080 #if defined(BCM_56640_A0)
   2081     { /* SOC_FORMAT_INT_SS_REQ_BUS5fmt */ 
   2082         /* format            SS_REQ_BUS5fmt */
   2083         /* nFields     */ 1,
   2084         /* *fields     */ soc_SS_REQ_BUS0fmt_fields,
   2085         /* bits        */ 210,
   2086         /* flags       */ 0,
   2087     },
   2088 #endif /* chips */
   2089 
   2090 #if defined(BCM_56640_A0)
   2091     { /* SOC_FORMAT_INT_SS_REQ_BUS6fmt */ 
   2092         /* format            SS_REQ_BUS6fmt */
   2093         /* nFields     */ 1,
   2094         /* *fields     */ soc_SS_REQ_BUS0fmt_fields,
   2095         /* bits        */ 210,
   2096         /* flags       */ 0,
   2097     },
   2098 #endif /* chips */
   2099 
   2100 #if defined(BCM_56640_A0)
   2101     { /* SOC_FORMAT_INT_SS_REQ_BUS0_C_MODELfmt */ 
   2102         /* format            SS_REQ_BUS0_C_MODELfmt */
   2103         /* nFields     */ 1,
   2104         /* *fields     */ soc_SS_REQ_BUS0fmt_fields,
   2105         /* bits        */ 210,
   2106         /* flags       */ 0,
   2107     },
   2108 #endif /* chips */
   2109 
   2110 #if defined(BCM_56340_A0)
   2111     { /* SOC_FORMAT_INT_SS_REQ_BUS0_C_MODEL_BCM56340_A0fmt */ 
   2112         /* format            SS_REQ_BUS0_C_MODELfmt */
   2113         /* nFields     */ 1,
   2114         /* *fields     */ soc_SS_REQ_BUS0fmt_fields,
   2115         /* bits        */ 210,
   2116         /* flags       */ 0,
   2117     },
   2118 #endif /* chips */
   2119 
   2120 #if defined(BCM_56340_A0)
   2121     { /* SOC_FORMAT_INT_SS_REQ_BUS1_BCM56340_A0fmt */ 
   2122         /* format            SS_REQ_BUS1fmt */
   2123         /* nFields     */ 1,
   2124         /* *fields     */ soc_SS_REQ_BUS0fmt_fields,
   2125         /* bits        */ 210,
   2126         /* flags       */ 0,
   2127     },
   2128 #endif /* chips */
   2129 
   2130 #if defined(BCM_56640_A0)
   2131     { /* SOC_FORMAT_INT_SS_REQ_BUS1_C_MODELfmt */ 
   2132         /* format            SS_REQ_BUS1_C_MODELfmt */
   2133         /* nFields     */ 1,
   2134         /* *fields     */ soc_SS_REQ_BUS0fmt_fields,
   2135         /* bits        */ 210,
   2136         /* flags       */ 0,
   2137     },
   2138 #endif /* chips */
   2139 
   2140 #if defined(BCM_56340_A0)
   2141     { /* SOC_FORMAT_INT_SS_REQ_BUS1_C_MODEL_BCM56340_A0fmt */ 
   2142         /* format            SS_REQ_BUS1_C_MODELfmt */
   2143         /* nFields     */ 1,
   2144         /* *fields     */ soc_SS_REQ_BUS0fmt_fields,
   2145         /* bits        */ 210,
   2146         /* flags       */ 0,
   2147     },
   2148 #endif /* chips */
   2149 
   2150 #if defined(BCM_56640_A0)
   2151     { /* SOC_FORMAT_INT_SS_REQ_BUS2_C_MODELfmt */ 
   2152         /* format            SS_REQ_BUS2_C_MODELfmt */
   2153         /* nFields     */ 1,
   2154         /* *fields     */ soc_SS_REQ_BUS2fmt_fields,
   2155         /* bits        */ 420,
   2156         /* flags       */ 0,
   2157     },
   2158 #endif /* chips */
   2159 
   2160 #if defined(BCM_56340_A0)
   2161     { /* SOC_FORMAT_INT_SS_REQ_BUS2_C_MODEL_BCM56340_A0fmt */ 
   2162         /* format            SS_REQ_BUS2_C_MODELfmt */
   2163         /* nFields     */ 1,
   2164         /* *fields     */ soc_SS_REQ_BUS2fmt_fields,
   2165         /* bits        */ 420,
   2166         /* flags       */ 0,
   2167     },
   2168 #endif /* chips */
   2169 
   2170 #if defined(BCM_56640_A0)
   2171     { /* SOC_FORMAT_INT_SS_REQ_BUS3_C_MODELfmt */ 
   2172         /* format            SS_REQ_BUS3_C_MODELfmt */
   2173         /* nFields     */ 1,
   2174         /* *fields     */ soc_SS_REQ_BUS3fmt_fields,
   2175         /* bits        */ 105,
   2176         /* flags       */ 0,
   2177     },
   2178 #endif /* chips */
   2179 
   2180 #if defined(BCM_56340_A0)
   2181     { /* SOC_FORMAT_INT_SS_REQ_BUS3_C_MODEL_BCM56340_A0fmt */ 
   2182         /* format            SS_REQ_BUS3_C_MODELfmt */
   2183         /* nFields     */ 1,
   2184         /* *fields     */ soc_SS_REQ_BUS3fmt_fields,
   2185         /* bits        */ 105,
   2186         /* flags       */ 0,
   2187     },
   2188 #endif /* chips */
   2189 
   2190 #if defined(BCM_56340_A0)
   2191     { /* SOC_FORMAT_INT_SS_REQ_BUS4_BCM56340_A0fmt */ 
   2192         /* format            SS_REQ_BUS4fmt */
   2193         /* nFields     */ 1,
   2194         /* *fields     */ soc_SS_REQ_BUS0fmt_fields,
   2195         /* bits        */ 210,
   2196         /* flags       */ 0,
   2197     },
   2198 #endif /* chips */
   2199 
   2200 #if defined(BCM_56640_A0)
   2201     { /* SOC_FORMAT_INT_SS_REQ_BUS4_C_MODELfmt */ 
   2202         /* format            SS_REQ_BUS4_C_MODELfmt */
   2203         /* nFields     */ 1,
   2204         /* *fields     */ soc_SS_REQ_BUS2fmt_fields,
   2205         /* bits        */ 420,
   2206         /* flags       */ 0,
   2207     },
   2208 #endif /* chips */
   2209 
   2210 #if defined(BCM_56340_A0)
   2211     { /* SOC_FORMAT_INT_SS_REQ_BUS4_C_MODEL_BCM56340_A0fmt */ 
   2212         /* format            SS_REQ_BUS4_C_MODELfmt */
   2213         /* nFields     */ 1,
   2214         /* *fields     */ soc_SS_REQ_BUS2fmt_fields,
   2215         /* bits        */ 420,
   2216         /* flags       */ 0,
   2217     },
   2218 #endif /* chips */
   2219 
   2220 #if defined(BCM_56340_A0)
   2221     { /* SOC_FORMAT_INT_SS_REQ_BUS5_BCM56340_A0fmt */ 
   2222         /* format            SS_REQ_BUS5fmt */
   2223         /* nFields     */ 1,
   2224         /* *fields     */ soc_SS_REQ_BUS0fmt_fields,
   2225         /* bits        */ 210,
   2226         /* flags       */ 0,
   2227     },
   2228 #endif /* chips */
   2229 
   2230 #if defined(BCM_56640_A0)
   2231     { /* SOC_FORMAT_INT_SS_REQ_BUS5_C_MODELfmt */ 
   2232         /* format            SS_REQ_BUS5_C_MODELfmt */
   2233         /* nFields     */ 1,
   2234         /* *fields     */ soc_SS_REQ_BUS2fmt_fields,
   2235         /* bits        */ 420,
   2236         /* flags       */ 0,
   2237     },
   2238 #endif /* chips */
   2239 
   2240 #if defined(BCM_56340_A0)
   2241     { /* SOC_FORMAT_INT_SS_REQ_BUS5_C_MODEL_BCM56340_A0fmt */ 
   2242         /* format            SS_REQ_BUS5_C_MODELfmt */
   2243         /* nFields     */ 1,
   2244         /* *fields     */ soc_SS_REQ_BUS2fmt_fields,
   2245         /* bits        */ 420,
   2246         /* flags       */ 0,
   2247     },
   2248 #endif /* chips */
   2249 
   2250 #if defined(BCM_56340_A0)
   2251     { /* SOC_FORMAT_INT_SS_REQ_BUS6_BCM56340_A0fmt */ 
   2252         /* format            SS_REQ_BUS6fmt */
   2253         /* nFields     */ 1,
   2254         /* *fields     */ soc_SS_REQ_BUS0fmt_fields,
   2255         /* bits        */ 210,
   2256         /* flags       */ 0,
   2257     },
   2258 #endif /* chips */
   2259 
   2260 #if defined(BCM_56640_A0)
   2261     { /* SOC_FORMAT_INT_SS_REQ_BUS6_C_MODELfmt */ 
   2262         /* format            SS_REQ_BUS6_C_MODELfmt */
   2263         /* nFields     */ 1,
   2264         /* *fields     */ soc_SS_REQ_BUS0fmt_fields,
   2265         /* bits        */ 210,
   2266         /* flags       */ 0,
   2267     },
   2268 #endif /* chips */
   2269 
   2270 #if defined(BCM_56340_A0)
   2271     { /* SOC_FORMAT_INT_SS_REQ_BUS6_C_MODEL_BCM56340_A0fmt */ 
   2272         /* format            SS_REQ_BUS6_C_MODELfmt */
   2273         /* nFields     */ 1,
   2274         /* *fields     */ soc_SS_REQ_BUS0fmt_fields,
   2275         /* bits        */ 210,
   2276         /* flags       */ 0,
   2277     },
   2278 #endif /* chips */
   2279 
   2280 #if defined(BCM_56260_A0)
   2281     { /* SOC_FORMAT_INT_SS_REQ_BUS_BCM56260_A0fmt */ 
   2282         /* format            SS_REQ_BUSfmt */
   2283         /* nFields     */ 12,
   2284         /* *fields     */ soc_SS_REQ_BUS_BCM56960_A0fmt_fields,
   2285         /* bits        */ 99,
   2286         /* flags       */ 0,
   2287     },
   2288 #endif /* chips */
   2289 
   2290 #if defined(BCM_56260_B0)
   2291     { /* SOC_FORMAT_INT_SS_REQ_BUS_BCM56260_B0fmt */ 
   2292         /* format            SS_REQ_BUSfmt */
   2293         /* nFields     */ 12,
   2294         /* *fields     */ soc_SS_REQ_BUS_BCM56960_A0fmt_fields,
   2295         /* bits        */ 99,
   2296         /* flags       */ 0,
   2297     },
   2298 #endif /* chips */
   2299 
   2300 #if defined(BCM_56270_A0)
   2301     { /* SOC_FORMAT_INT_SS_REQ_BUS_BCM56270_A0fmt */ 
   2302         /* format            SS_REQ_BUSfmt */
   2303         /* nFields     */ 12,
   2304         /* *fields     */ soc_SS_REQ_BUS_BCM56960_A0fmt_fields,
   2305         /* bits        */ 99,
   2306         /* flags       */ 0,
   2307     },
   2308 #endif /* chips */
   2309 
   2310 #if defined(BCM_56370_A0)
   2311     { /* SOC_FORMAT_INT_SS_REQ_BUS_BCM56370_A0fmt */ 
   2312         /* format            SS_REQ_BUSfmt */
   2313         /* nFields     */ 33,
   2314         /* *fields     */ soc_SS_REQ_BUS_BCM56370_A0fmt_fields,
   2315         /* bits        */ 130,
   2316         /* flags       */ 0,
   2317     },
   2318 #endif /* chips */
   2319 
   2320 #if defined(BCM_56560_A0)
   2321     { /* SOC_FORMAT_INT_SS_REQ_BUS_BCM56560_A0fmt */ 
   2322         /* format            SS_REQ_BUSfmt */
   2323         /* nFields     */ 12,
   2324         /* *fields     */ soc_SS_REQ_BUS_BCM56560_A0fmt_fields,
   2325         /* bits        */ 99,
   2326         /* flags       */ 0,
   2327     },
   2328 #endif /* chips */
   2329 
   2330 #if defined(BCM_56560_B0)
   2331     { /* SOC_FORMAT_INT_SS_REQ_BUS_BCM56560_B0fmt */ 
   2332         /* format            SS_REQ_BUSfmt */
   2333         /* nFields     */ 12,
   2334         /* *fields     */ soc_SS_REQ_BUS_BCM56560_A0fmt_fields,
   2335         /* bits        */ 99,
   2336         /* flags       */ 0,
   2337     },
   2338 #endif /* chips */
   2339 
   2340 #if defined(BCM_56670_A0)
   2341     { /* SOC_FORMAT_INT_SS_REQ_BUS_BCM56670_A0fmt */ 
   2342         /* format            SS_REQ_BUSfmt */
   2343         /* nFields     */ 12,
   2344         /* *fields     */ soc_SS_REQ_BUS_BCM56670_A0fmt_fields,
   2345         /* bits        */ 99,
   2346         /* flags       */ 0,
   2347     },
   2348 #endif /* chips */
   2349 
   2350 #if defined(BCM_56670_B0)
   2351     { /* SOC_FORMAT_INT_SS_REQ_BUS_BCM56670_B0fmt */ 
   2352         /* format            SS_REQ_BUSfmt */
   2353         /* nFields     */ 12,
   2354         /* *fields     */ soc_SS_REQ_BUS_BCM56670_A0fmt_fields,
   2355         /* bits        */ 99,
   2356         /* flags       */ 0,
   2357     },
   2358 #endif /* chips */
   2359 
   2360 #if defined(BCM_56770_A0)
   2361     { /* SOC_FORMAT_INT_SS_REQ_BUS_BCM56770_A0fmt */ 
   2362         /* format            SS_REQ_BUSfmt */
   2363         /* nFields     */ 31,
   2364         /* *fields     */ soc_SS_REQ_BUS_BCM56870_A0fmt_fields,
   2365         /* bits        */ 129,
   2366         /* flags       */ 0,
   2367     },
   2368 #endif /* chips */
   2369 
   2370 #if defined(BCM_56850_A0)
   2371     { /* SOC_FORMAT_INT_SS_REQ_BUS_BCM56850_A0fmt */ 
   2372         /* format            SS_REQ_BUSfmt */
   2373         /* nFields     */ 10,
   2374         /* *fields     */ soc_SS_REQ_BUS_BCM56850_A0fmt_fields,
   2375         /* bits        */ 97,
   2376         /* flags       */ 0,
   2377     },
   2378 #endif /* chips */
   2379 
   2380 #if defined(BCM_56860_A0)
   2381     { /* SOC_FORMAT_INT_SS_REQ_BUS_BCM56860_A0fmt */ 
   2382         /* format            SS_REQ_BUSfmt */
   2383         /* nFields     */ 11,
   2384         /* *fields     */ soc_SS_REQ_BUS_BCM56860_A0fmt_fields,
   2385         /* bits        */ 98,
   2386         /* flags       */ 0,
   2387     },
   2388 #endif /* chips */
   2389 
   2390 #if defined(BCM_56870_A0)
   2391     { /* SOC_FORMAT_INT_SS_REQ_BUS_BCM56870_A0fmt */ 
   2392         /* format            SS_REQ_BUSfmt */
   2393         /* nFields     */ 31,
   2394         /* *fields     */ soc_SS_REQ_BUS_BCM56870_A0fmt_fields,
   2395         /* bits        */ 129,
   2396         /* flags       */ 0,
   2397     },
   2398 #endif /* chips */
   2399 
   2400 #if defined(BCM_56960_A0)
   2401     { /* SOC_FORMAT_INT_SS_REQ_BUS_BCM56960_A0fmt */ 
   2402         /* format            SS_REQ_BUSfmt */
   2403         /* nFields     */ 12,
   2404         /* *fields     */ soc_SS_REQ_BUS_BCM56960_A0fmt_fields,
   2405         /* bits        */ 99,
   2406         /* flags       */ 0,
   2407     },
   2408 #endif /* chips */
   2409 
   2410 #if defined(BCM_56965_A0)
   2411     { /* SOC_FORMAT_INT_SS_REQ_BUS_BCM56965_A0fmt */ 
   2412         /* format            SS_REQ_BUSfmt */
   2413         /* nFields     */ 12,
   2414         /* *fields     */ soc_SS_REQ_BUS_BCM56960_A0fmt_fields,
   2415         /* bits        */ 99,
   2416         /* flags       */ 0,
   2417     },
   2418 #endif /* chips */
   2419 
   2420 #if defined(BCM_56970_A0)
   2421     { /* SOC_FORMAT_INT_SS_REQ_BUS_BCM56970_A0fmt */ 
   2422         /* format            SS_REQ_BUSfmt */
   2423         /* nFields     */ 12,
   2424         /* *fields     */ soc_SS_REQ_BUS_BCM56560_A0fmt_fields,
   2425         /* bits        */ 99,
   2426         /* flags       */ 0,
   2427     },
   2428 #endif /* chips */
   2429 
   2430 #if defined(BCM_56980_A0)
   2431     { /* SOC_FORMAT_INT_SS_REQ_BUS_BCM56980_A0fmt */ 
   2432         /* format            SS_REQ_BUSfmt */
   2433         /* nFields     */ 44,
   2434         /* *fields     */ soc_SS_REQ_BUS_BCM56980_A0fmt_fields,
   2435         /* bits        */ 129,
   2436         /* flags       */ 0,
   2437     },
   2438 #endif /* chips */
   2439 
   2440 #if defined(BCM_56980_B0)
   2441     { /* SOC_FORMAT_INT_SS_REQ_BUS_BCM56980_B0fmt */ 
   2442         /* format            SS_REQ_BUSfmt */
   2443         /* nFields     */ 44,
   2444         /* *fields     */ soc_SS_REQ_BUS_BCM56980_A0fmt_fields,
   2445         /* bits        */ 129,
   2446         /* flags       */ 0,
   2447     },
   2448 #endif /* chips */
   2449 
   2450 #if defined(BCM_56640_A0)
   2451     { /* SOC_FORMAT_INT_SS_REQ_BUS_C_MODELfmt */ 
   2452         /* format            SS_REQ_BUS_C_MODELfmt */
   2453         /* nFields     */ 6,
   2454         /* *fields     */ soc_SS_REQ_BUSfmt_fields,
   2455         /* bits        */ 102,
   2456         /* flags       */ 0,
   2457     },
   2458 #endif /* chips */
   2459 
   2460 #if defined(BCM_56340_A0)
   2461     { /* SOC_FORMAT_INT_SS_REQ_BUS_C_MODEL_BCM56340_A0fmt */ 
   2462         /* format            SS_REQ_BUS_C_MODELfmt */
   2463         /* nFields     */ 6,
   2464         /* *fields     */ soc_SS_REQ_BUSfmt_fields,
   2465         /* bits        */ 102,
   2466         /* flags       */ 0,
   2467     },
   2468 #endif /* chips */
   2469 
   2470 #if defined(BCM_56260_A0) || defined(BCM_56260_B0) || \
   2471     defined(BCM_56270_A0) || defined(BCM_56560_A0) || \
   2472     defined(BCM_56560_B0) || defined(BCM_56670_A0) || \
   2473     defined(BCM_56670_B0) || defined(BCM_56960_A0) || \
   2474     defined(BCM_56965_A0) || defined(BCM_56970_A0)
   2475     { /* SOC_FORMAT_INT_SS_REQ_BUS_FPEMfmt */ 
   2476         /* format            SS_REQ_BUS_FPEMfmt */
   2477         /* nFields     */ 1,
   2478         /* *fields     */ soc_SS_REQ_BUS_FPEMfmt_fields,
   2479         /* bits        */ 420,
   2480         /* flags       */ 0,
   2481     },
   2482 #endif /* chips */
   2483 
   2484 #if defined(BCM_56850_A0)
   2485     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL2LUfmt */ 
   2486         /* format            SS_REQ_BUS_IL2LUfmt */
   2487         /* nFields     */ 1,
   2488         /* *fields     */ soc_SS_REQ_BUS3fmt_fields,
   2489         /* bits        */ 105,
   2490         /* flags       */ 0,
   2491     },
   2492 #endif /* chips */
   2493 
   2494 #if defined(BCM_56260_A0)
   2495     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL2LU_BCM56260_A0fmt */ 
   2496         /* format            SS_REQ_BUS_IL2LUfmt */
   2497         /* nFields     */ 1,
   2498         /* *fields     */ soc_SS_REQ_BUS_IL2LUfmt_fields,
   2499         /* bits        */ 113,
   2500         /* flags       */ 0,
   2501     },
   2502 #endif /* chips */
   2503 
   2504 #if defined(BCM_56260_B0)
   2505     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL2LU_BCM56260_B0fmt */ 
   2506         /* format            SS_REQ_BUS_IL2LUfmt */
   2507         /* nFields     */ 1,
   2508         /* *fields     */ soc_SS_REQ_BUS_IL2LUfmt_fields,
   2509         /* bits        */ 113,
   2510         /* flags       */ 0,
   2511     },
   2512 #endif /* chips */
   2513 
   2514 #if defined(BCM_56270_A0)
   2515     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL2LU_BCM56270_A0fmt */ 
   2516         /* format            SS_REQ_BUS_IL2LUfmt */
   2517         /* nFields     */ 1,
   2518         /* *fields     */ soc_SS_REQ_BUS_IL2LUfmt_fields,
   2519         /* bits        */ 113,
   2520         /* flags       */ 0,
   2521     },
   2522 #endif /* chips */
   2523 
   2524 #if defined(BCM_56560_A0)
   2525     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL2LU_BCM56560_A0fmt */ 
   2526         /* format            SS_REQ_BUS_IL2LUfmt */
   2527         /* nFields     */ 1,
   2528         /* *fields     */ soc_SS_REQ_BUS_IL2LUfmt_fields,
   2529         /* bits        */ 113,
   2530         /* flags       */ 0,
   2531     },
   2532 #endif /* chips */
   2533 
   2534 #if defined(BCM_56560_B0)
   2535     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL2LU_BCM56560_B0fmt */ 
   2536         /* format            SS_REQ_BUS_IL2LUfmt */
   2537         /* nFields     */ 1,
   2538         /* *fields     */ soc_SS_REQ_BUS_IL2LUfmt_fields,
   2539         /* bits        */ 113,
   2540         /* flags       */ 0,
   2541     },
   2542 #endif /* chips */
   2543 
   2544 #if defined(BCM_56670_A0)
   2545     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL2LU_BCM56670_A0fmt */ 
   2546         /* format            SS_REQ_BUS_IL2LUfmt */
   2547         /* nFields     */ 1,
   2548         /* *fields     */ soc_SS_REQ_BUS_IL2LUfmt_fields,
   2549         /* bits        */ 113,
   2550         /* flags       */ 0,
   2551     },
   2552 #endif /* chips */
   2553 
   2554 #if defined(BCM_56670_B0)
   2555     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL2LU_BCM56670_B0fmt */ 
   2556         /* format            SS_REQ_BUS_IL2LUfmt */
   2557         /* nFields     */ 1,
   2558         /* *fields     */ soc_SS_REQ_BUS_IL2LUfmt_fields,
   2559         /* bits        */ 113,
   2560         /* flags       */ 0,
   2561     },
   2562 #endif /* chips */
   2563 
   2564 #if defined(BCM_56860_A0)
   2565     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL2LU_BCM56860_A0fmt */ 
   2566         /* format            SS_REQ_BUS_IL2LUfmt */
   2567         /* nFields     */ 1,
   2568         /* *fields     */ soc_SS_REQ_BUS_IL2LU_BCM56860_A0fmt_fields,
   2569         /* bits        */ 113,
   2570         /* flags       */ 0,
   2571     },
   2572 #endif /* chips */
   2573 
   2574 #if defined(BCM_56960_A0)
   2575     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL2LU_BCM56960_A0fmt */ 
   2576         /* format            SS_REQ_BUS_IL2LUfmt */
   2577         /* nFields     */ 1,
   2578         /* *fields     */ soc_SS_REQ_BUS_IL2LUfmt_fields,
   2579         /* bits        */ 113,
   2580         /* flags       */ 0,
   2581     },
   2582 #endif /* chips */
   2583 
   2584 #if defined(BCM_56965_A0)
   2585     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL2LU_BCM56965_A0fmt */ 
   2586         /* format            SS_REQ_BUS_IL2LUfmt */
   2587         /* nFields     */ 1,
   2588         /* *fields     */ soc_SS_REQ_BUS_IL2LUfmt_fields,
   2589         /* bits        */ 113,
   2590         /* flags       */ 0,
   2591     },
   2592 #endif /* chips */
   2593 
   2594 #if defined(BCM_56970_A0)
   2595     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL2LU_BCM56970_A0fmt */ 
   2596         /* format            SS_REQ_BUS_IL2LUfmt */
   2597         /* nFields     */ 1,
   2598         /* *fields     */ soc_SS_REQ_BUS_IL2LUfmt_fields,
   2599         /* bits        */ 113,
   2600         /* flags       */ 0,
   2601     },
   2602 #endif /* chips */
   2603 
   2604 #if defined(BCM_56850_A0)
   2605     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL3LUfmt */ 
   2606         /* format            SS_REQ_BUS_IL3LUfmt */
   2607         /* nFields     */ 1,
   2608         /* *fields     */ soc_SS_REQ_BUS2fmt_fields,
   2609         /* bits        */ 420,
   2610         /* flags       */ 0,
   2611     },
   2612 #endif /* chips */
   2613 
   2614 #if defined(BCM_56260_A0)
   2615     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL3LU_BCM56260_A0fmt */ 
   2616         /* format            SS_REQ_BUS_IL3LUfmt */
   2617         /* nFields     */ 1,
   2618         /* *fields     */ soc_SS_REQ_BUS_FPEMfmt_fields,
   2619         /* bits        */ 420,
   2620         /* flags       */ 0,
   2621     },
   2622 #endif /* chips */
   2623 
   2624 #if defined(BCM_56260_B0)
   2625     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL3LU_BCM56260_B0fmt */ 
   2626         /* format            SS_REQ_BUS_IL3LUfmt */
   2627         /* nFields     */ 1,
   2628         /* *fields     */ soc_SS_REQ_BUS_FPEMfmt_fields,
   2629         /* bits        */ 420,
   2630         /* flags       */ 0,
   2631     },
   2632 #endif /* chips */
   2633 
   2634 #if defined(BCM_56270_A0)
   2635     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL3LU_BCM56270_A0fmt */ 
   2636         /* format            SS_REQ_BUS_IL3LUfmt */
   2637         /* nFields     */ 1,
   2638         /* *fields     */ soc_SS_REQ_BUS_FPEMfmt_fields,
   2639         /* bits        */ 420,
   2640         /* flags       */ 0,
   2641     },
   2642 #endif /* chips */
   2643 
   2644 #if defined(BCM_56560_A0)
   2645     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL3LU_BCM56560_A0fmt */ 
   2646         /* format            SS_REQ_BUS_IL3LUfmt */
   2647         /* nFields     */ 1,
   2648         /* *fields     */ soc_SS_REQ_BUS_FPEMfmt_fields,
   2649         /* bits        */ 420,
   2650         /* flags       */ 0,
   2651     },
   2652 #endif /* chips */
   2653 
   2654 #if defined(BCM_56560_B0)
   2655     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL3LU_BCM56560_B0fmt */ 
   2656         /* format            SS_REQ_BUS_IL3LUfmt */
   2657         /* nFields     */ 1,
   2658         /* *fields     */ soc_SS_REQ_BUS_FPEMfmt_fields,
   2659         /* bits        */ 420,
   2660         /* flags       */ 0,
   2661     },
   2662 #endif /* chips */
   2663 
   2664 #if defined(BCM_56670_A0)
   2665     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL3LU_BCM56670_A0fmt */ 
   2666         /* format            SS_REQ_BUS_IL3LUfmt */
   2667         /* nFields     */ 1,
   2668         /* *fields     */ soc_SS_REQ_BUS_IL3LUfmt_fields,
   2669         /* bits        */ 372,
   2670         /* flags       */ 0,
   2671     },
   2672 #endif /* chips */
   2673 
   2674 #if defined(BCM_56670_B0)
   2675     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL3LU_BCM56670_B0fmt */ 
   2676         /* format            SS_REQ_BUS_IL3LUfmt */
   2677         /* nFields     */ 1,
   2678         /* *fields     */ soc_SS_REQ_BUS_IL3LUfmt_fields,
   2679         /* bits        */ 372,
   2680         /* flags       */ 0,
   2681     },
   2682 #endif /* chips */
   2683 
   2684 #if defined(BCM_56860_A0)
   2685     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL3LU_BCM56860_A0fmt */ 
   2686         /* format            SS_REQ_BUS_IL3LUfmt */
   2687         /* nFields     */ 1,
   2688         /* *fields     */ soc_SS_REQ_BUS2fmt_fields,
   2689         /* bits        */ 420,
   2690         /* flags       */ 0,
   2691     },
   2692 #endif /* chips */
   2693 
   2694 #if defined(BCM_56960_A0)
   2695     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL3LU_BCM56960_A0fmt */ 
   2696         /* format            SS_REQ_BUS_IL3LUfmt */
   2697         /* nFields     */ 1,
   2698         /* *fields     */ soc_SS_REQ_BUS_FPEMfmt_fields,
   2699         /* bits        */ 420,
   2700         /* flags       */ 0,
   2701     },
   2702 #endif /* chips */
   2703 
   2704 #if defined(BCM_56965_A0)
   2705     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL3LU_BCM56965_A0fmt */ 
   2706         /* format            SS_REQ_BUS_IL3LUfmt */
   2707         /* nFields     */ 1,
   2708         /* *fields     */ soc_SS_REQ_BUS_FPEMfmt_fields,
   2709         /* bits        */ 420,
   2710         /* flags       */ 0,
   2711     },
   2712 #endif /* chips */
   2713 
   2714 #if defined(BCM_56970_A0)
   2715     { /* SOC_FORMAT_INT_SS_REQ_BUS_IL3LU_BCM56970_A0fmt */ 
   2716         /* format            SS_REQ_BUS_IL3LUfmt */
   2717         /* nFields     */ 1,
   2718         /* *fields     */ soc_SS_REQ_BUS_FPEMfmt_fields,
   2719         /* bits        */ 420,
   2720         /* flags       */ 0,
   2721     },
   2722 #endif /* chips */
   2723 
   2724 #if defined(BCM_56850_A0)
   2725     { /* SOC_FORMAT_INT_SS_REQ_BUS_ILPMfmt */ 
   2726         /* format            SS_REQ_BUS_ILPMfmt */
   2727         /* nFields     */ 1,
   2728         /* *fields     */ soc_SS_REQ_BUS0fmt_fields,
   2729         /* bits        */ 210,
   2730         /* flags       */ 0,
   2731     },
   2732 #endif /* chips */
   2733 
   2734 #if defined(BCM_56260_A0)
   2735     { /* SOC_FORMAT_INT_SS_REQ_BUS_ILPM_BCM56260_A0fmt */ 
   2736         /* format            SS_REQ_BUS_ILPMfmt */
   2737         /* nFields     */ 1,
   2738         /* *fields     */ soc_SS_REQ_BUS_ILPMfmt_fields,
   2739         /* bits        */ 210,
   2740         /* flags       */ 0,
   2741     },
   2742 #endif /* chips */
   2743 
   2744 #if defined(BCM_56260_B0)
   2745     { /* SOC_FORMAT_INT_SS_REQ_BUS_ILPM_BCM56260_B0fmt */ 
   2746         /* format            SS_REQ_BUS_ILPMfmt */
   2747         /* nFields     */ 1,
   2748         /* *fields     */ soc_SS_REQ_BUS_ILPMfmt_fields,
   2749         /* bits        */ 210,
   2750         /* flags       */ 0,
   2751     },
   2752 #endif /* chips */
   2753 
   2754 #if defined(BCM_56270_A0)
   2755     { /* SOC_FORMAT_INT_SS_REQ_BUS_ILPM_BCM56270_A0fmt */ 
   2756         /* format            SS_REQ_BUS_ILPMfmt */
   2757         /* nFields     */ 1,
   2758         /* *fields     */ soc_SS_REQ_BUS_ILPMfmt_fields,
   2759         /* bits        */ 210,
   2760         /* flags       */ 0,
   2761     },
   2762 #endif /* chips */
   2763 
   2764 #if defined(BCM_56370_A0)
   2765     { /* SOC_FORMAT_INT_SS_REQ_BUS_ILPM_BCM56370_A0fmt */ 
   2766         /* format            SS_REQ_BUS_ILPMfmt */
   2767         /* nFields     */ 1,
   2768         /* *fields     */ soc_SS_REQ_BUS_ILPM_BCM56870_A0fmt_fields,
   2769         /* bits        */ 216,
   2770         /* flags       */ 0,
   2771     },
   2772 #endif /* chips */
   2773 
   2774 #if defined(BCM_56560_A0)
   2775     { /* SOC_FORMAT_INT_SS_REQ_BUS_ILPM_BCM56560_A0fmt */ 
   2776         /* format            SS_REQ_BUS_ILPMfmt */
   2777         /* nFields     */ 1,
   2778         /* *fields     */ soc_SS_REQ_BUS_ILPMfmt_fields,
   2779         /* bits        */ 210,
   2780         /* flags       */ 0,
   2781     },
   2782 #endif /* chips */
   2783 
   2784 #if defined(BCM_56560_B0)
   2785     { /* SOC_FORMAT_INT_SS_REQ_BUS_ILPM_BCM56560_B0fmt */ 
   2786         /* format            SS_REQ_BUS_ILPMfmt */
   2787         /* nFields     */ 1,
   2788         /* *fields     */ soc_SS_REQ_BUS_ILPMfmt_fields,
   2789         /* bits        */ 210,
   2790         /* flags       */ 0,
   2791     },
   2792 #endif /* chips */
   2793 
   2794 #if defined(BCM_56670_A0)
   2795     { /* SOC_FORMAT_INT_SS_REQ_BUS_ILPM_BCM56670_A0fmt */ 
   2796         /* format            SS_REQ_BUS_ILPMfmt */
   2797         /* nFields     */ 1,
   2798         /* *fields     */ soc_SS_REQ_BUS_ILPMfmt_fields,
   2799         /* bits        */ 210,
   2800         /* flags       */ 0,
   2801     },
   2802 #endif /* chips */
   2803 
   2804 #if defined(BCM_56670_B0)
   2805     { /* SOC_FORMAT_INT_SS_REQ_BUS_ILPM_BCM56670_B0fmt */ 
   2806         /* format            SS_REQ_BUS_ILPMfmt */
   2807         /* nFields     */ 1,
   2808         /* *fields     */ soc_SS_REQ_BUS_ILPMfmt_fields,
   2809         /* bits        */ 210,
   2810         /* flags       */ 0,
   2811     },
   2812 #endif /* chips */
   2813 
   2814 #if defined(BCM_56770_A0)
   2815     { /* SOC_FORMAT_INT_SS_REQ_BUS_ILPM_BCM56770_A0fmt */ 
   2816         /* format            SS_REQ_BUS_ILPMfmt */
   2817         /* nFields     */ 1,
   2818         /* *fields     */ soc_SS_REQ_BUS_ILPM_BCM56870_A0fmt_fields,
   2819         /* bits        */ 216,
   2820         /* flags       */ 0,
   2821     },
   2822 #endif /* chips */
   2823 
   2824 #if defined(BCM_56860_A0)
   2825     { /* SOC_FORMAT_INT_SS_REQ_BUS_ILPM_BCM56860_A0fmt */ 
   2826         /* format            SS_REQ_BUS_ILPMfmt */
   2827         /* nFields     */ 1,
   2828         /* *fields     */ soc_SS_REQ_BUS0fmt_fields,
   2829         /* bits        */ 210,
   2830         /* flags       */ 0,
   2831     },
   2832 #endif /* chips */
   2833 
   2834 #if defined(BCM_56870_A0)
   2835     { /* SOC_FORMAT_INT_SS_REQ_BUS_ILPM_BCM56870_A0fmt */ 
   2836         /* format            SS_REQ_BUS_ILPMfmt */
   2837         /* nFields     */ 1,
   2838         /* *fields     */ soc_SS_REQ_BUS_ILPM_BCM56870_A0fmt_fields,
   2839         /* bits        */ 216,
   2840         /* flags       */ 0,
   2841     },
   2842 #endif /* chips */
   2843 
   2844 #if defined(BCM_56960_A0)
   2845     { /* SOC_FORMAT_INT_SS_REQ_BUS_ILPM_BCM56960_A0fmt */ 
   2846         /* format            SS_REQ_BUS_ILPMfmt */
   2847         /* nFields     */ 1,
   2848         /* *fields     */ soc_SS_REQ_BUS_ILPMfmt_fields,
   2849         /* bits        */ 210,
   2850         /* flags       */ 0,
   2851     },
   2852 #endif /* chips */
   2853 
   2854 #if defined(BCM_56965_A0)
   2855     { /* SOC_FORMAT_INT_SS_REQ_BUS_ILPM_BCM56965_A0fmt */ 
   2856         /* format            SS_REQ_BUS_ILPMfmt */
   2857         /* nFields     */ 1,
   2858         /* *fields     */ soc_SS_REQ_BUS_ILPMfmt_fields,
   2859         /* bits        */ 210,
   2860         /* flags       */ 0,
   2861     },
   2862 #endif /* chips */
   2863 
   2864 #if defined(BCM_56970_A0)
   2865     { /* SOC_FORMAT_INT_SS_REQ_BUS_ILPM_BCM56970_A0fmt */ 
   2866         /* format            SS_REQ_BUS_ILPMfmt */
   2867         /* nFields     */ 1,
   2868         /* *fields     */ soc_SS_REQ_BUS_ILPMfmt_fields,
   2869         /* bits        */ 210,
   2870         /* flags       */ 0,
   2871     },
   2872 #endif /* chips */
   2873 
   2874 #if defined(BCM_56980_A0)
   2875     { /* SOC_FORMAT_INT_SS_REQ_BUS_ILPM_BCM56980_A0fmt */ 
   2876         /* format            SS_REQ_BUS_ILPMfmt */
   2877         /* nFields     */ 1,
   2878         /* *fields     */ soc_SS_REQ_BUS_ILPM_BCM56980_A0fmt_fields,
   2879         /* bits        */ 480,
   2880         /* flags       */ 0,
   2881     },
   2882 #endif /* chips */
   2883 
   2884 #if defined(BCM_56980_B0)
   2885     { /* SOC_FORMAT_INT_SS_REQ_BUS_ILPM_BCM56980_B0fmt */ 
   2886         /* format            SS_REQ_BUS_ILPMfmt */
   2887         /* nFields     */ 1,
   2888         /* *fields     */ soc_SS_REQ_BUS_ILPM_BCM56980_A0fmt_fields,
   2889         /* bits        */ 480,
   2890         /* flags       */ 0,
   2891     },
   2892 #endif /* chips */
   2893 
   2894 #if defined(BCM_56850_A0)
   2895     { /* SOC_FORMAT_INT_SS_REQ_BUS_IVLANfmt */ 
   2896         /* format            SS_REQ_BUS_IVLANfmt */
   2897         /* nFields     */ 1,
   2898         /* *fields     */ soc_SS_REQ_BUS_IVLANfmt_fields,
   2899         /* bits        */ 170,
   2900         /* flags       */ 0,
   2901     },
   2902 #endif /* chips */
   2903 
   2904 #if defined(BCM_56260_A0)
   2905     { /* SOC_FORMAT_INT_SS_REQ_BUS_IVLAN_BCM56260_A0fmt */ 
   2906         /* format            SS_REQ_BUS_IVLANfmt */
   2907         /* nFields     */ 1,
   2908         /* *fields     */ soc_SS_REQ_BUS_IVLAN_BCM56960_A0fmt_fields,
   2909         /* bits        */ 170,
   2910         /* flags       */ 0,
   2911     },
   2912 #endif /* chips */
   2913 
   2914 #if defined(BCM_56260_B0)
   2915     { /* SOC_FORMAT_INT_SS_REQ_BUS_IVLAN_BCM56260_B0fmt */ 
   2916         /* format            SS_REQ_BUS_IVLANfmt */
   2917         /* nFields     */ 1,
   2918         /* *fields     */ soc_SS_REQ_BUS_IVLAN_BCM56960_A0fmt_fields,
   2919         /* bits        */ 170,
   2920         /* flags       */ 0,
   2921     },
   2922 #endif /* chips */
   2923 
   2924 #if defined(BCM_56270_A0)
   2925     { /* SOC_FORMAT_INT_SS_REQ_BUS_IVLAN_BCM56270_A0fmt */ 
   2926         /* format            SS_REQ_BUS_IVLANfmt */
   2927         /* nFields     */ 1,
   2928         /* *fields     */ soc_SS_REQ_BUS_IVLAN_BCM56960_A0fmt_fields,
   2929         /* bits        */ 170,
   2930         /* flags       */ 0,
   2931     },
   2932 #endif /* chips */
   2933 
   2934 #if defined(BCM_56560_A0)
   2935     { /* SOC_FORMAT_INT_SS_REQ_BUS_IVLAN_BCM56560_A0fmt */ 
   2936         /* format            SS_REQ_BUS_IVLANfmt */
   2937         /* nFields     */ 1,
   2938         /* *fields     */ soc_SS_REQ_BUS_IVLAN_BCM56560_A0fmt_fields,
   2939         /* bits        */ 209,
   2940         /* flags       */ 0,
   2941     },
   2942 #endif /* chips */
   2943 
   2944 #if defined(BCM_56560_B0)
   2945     { /* SOC_FORMAT_INT_SS_REQ_BUS_IVLAN_BCM56560_B0fmt */ 
   2946         /* format            SS_REQ_BUS_IVLANfmt */
   2947         /* nFields     */ 1,
   2948         /* *fields     */ soc_SS_REQ_BUS_IVLAN_BCM56560_A0fmt_fields,
   2949         /* bits        */ 209,
   2950         /* flags       */ 0,
   2951     },
   2952 #endif /* chips */
   2953 
   2954 #if defined(BCM_56670_A0)
   2955     { /* SOC_FORMAT_INT_SS_REQ_BUS_IVLAN_BCM56670_A0fmt */ 
   2956         /* format            SS_REQ_BUS_IVLANfmt */
   2957         /* nFields     */ 1,
   2958         /* *fields     */ soc_SS_REQ_BUS_IVLAN_BCM56560_A0fmt_fields,
   2959         /* bits        */ 209,
   2960         /* flags       */ 0,
   2961     },
   2962 #endif /* chips */
   2963 
   2964 #if defined(BCM_56670_B0)
   2965     { /* SOC_FORMAT_INT_SS_REQ_BUS_IVLAN_BCM56670_B0fmt */ 
   2966         /* format            SS_REQ_BUS_IVLANfmt */
   2967         /* nFields     */ 1,
   2968         /* *fields     */ soc_SS_REQ_BUS_IVLAN_BCM56560_A0fmt_fields,
   2969         /* bits        */ 209,
   2970         /* flags       */ 0,
   2971     },
   2972 #endif /* chips */
   2973 
   2974 #if defined(BCM_56860_A0)
   2975     { /* SOC_FORMAT_INT_SS_REQ_BUS_IVLAN_BCM56860_A0fmt */ 
   2976         /* format            SS_REQ_BUS_IVLANfmt */
   2977         /* nFields     */ 1,
   2978         /* *fields     */ soc_SS_REQ_BUS_IVLAN_BCM56860_A0fmt_fields,
   2979         /* bits        */ 192,
   2980         /* flags       */ 0,
   2981     },
   2982 #endif /* chips */
   2983 
   2984 #if defined(BCM_56960_A0)
   2985     { /* SOC_FORMAT_INT_SS_REQ_BUS_IVLAN_BCM56960_A0fmt */ 
   2986         /* format            SS_REQ_BUS_IVLANfmt */
   2987         /* nFields     */ 1,
   2988         /* *fields     */ soc_SS_REQ_BUS_IVLAN_BCM56960_A0fmt_fields,
   2989         /* bits        */ 170,
   2990         /* flags       */ 0,
   2991     },
   2992 #endif /* chips */
   2993 
   2994 #if defined(BCM_56965_A0)
   2995     { /* SOC_FORMAT_INT_SS_REQ_BUS_IVLAN_BCM56965_A0fmt */ 
   2996         /* format            SS_REQ_BUS_IVLANfmt */
   2997         /* nFields     */ 1,
   2998         /* *fields     */ soc_SS_REQ_BUS_IVLAN_BCM56960_A0fmt_fields,
   2999         /* bits        */ 170,
   3000         /* flags       */ 0,
   3001     },
   3002 #endif /* chips */
   3003 
   3004 #if defined(BCM_56970_A0)
   3005     { /* SOC_FORMAT_INT_SS_REQ_BUS_IVLAN_BCM56970_A0fmt */ 
   3006         /* format            SS_REQ_BUS_IVLANfmt */
   3007         /* nFields     */ 1,
   3008         /* *fields     */ soc_SS_REQ_BUS_IVLAN_BCM56960_A0fmt_fields,
   3009         /* bits        */ 170,
   3010         /* flags       */ 0,
   3011     },
   3012 #endif /* chips */
   3013 
   3014 #if defined(BCM_56850_A0) || defined(BCM_56860_A0)
   3015     { /* SOC_FORMAT_INT_SS_REQ_BUS_LPMfmt */ 
   3016         /* format            SS_REQ_BUS_LPMfmt */
   3017         /* nFields     */ 6,
   3018         /* *fields     */ soc_SS_REQ_BUS_LPMfmt_fields,
   3019         /* bits        */ 52,
   3020         /* flags       */ 0,
   3021     },
   3022 #endif /* chips */
   3023 
   3024 #if defined(BCM_56260_A0)
   3025     { /* SOC_FORMAT_INT_SS_REQ_BUS_LPM_BCM56260_A0fmt */ 
   3026         /* format            SS_REQ_BUS_LPMfmt */
   3027         /* nFields     */ 5,
   3028         /* *fields     */ soc_SS_REQ_BUS_LPM_BCM56960_A0fmt_fields,
   3029         /* bits        */ 46,
   3030         /* flags       */ 0,
   3031     },
   3032 #endif /* chips */
   3033 
   3034 #if defined(BCM_56260_B0)
   3035     { /* SOC_FORMAT_INT_SS_REQ_BUS_LPM_BCM56260_B0fmt */ 
   3036         /* format            SS_REQ_BUS_LPMfmt */
   3037         /* nFields     */ 5,
   3038         /* *fields     */ soc_SS_REQ_BUS_LPM_BCM56960_A0fmt_fields,
   3039         /* bits        */ 46,
   3040         /* flags       */ 0,
   3041     },
   3042 #endif /* chips */
   3043 
   3044 #if defined(BCM_56270_A0)
   3045     { /* SOC_FORMAT_INT_SS_REQ_BUS_LPM_BCM56270_A0fmt */ 
   3046         /* format            SS_REQ_BUS_LPMfmt */
   3047         /* nFields     */ 5,
   3048         /* *fields     */ soc_SS_REQ_BUS_LPM_BCM56960_A0fmt_fields,
   3049         /* bits        */ 46,
   3050         /* flags       */ 0,
   3051     },
   3052 #endif /* chips */
   3053 
   3054 #if defined(BCM_56370_A0)
   3055     { /* SOC_FORMAT_INT_SS_REQ_BUS_LPM_BCM56370_A0fmt */ 
   3056         /* format            SS_REQ_BUS_LPMfmt */
   3057         /* nFields     */ 17,
   3058         /* *fields     */ soc_SS_REQ_BUS_LPM_BCM56370_A0fmt_fields,
   3059         /* bits        */ 60,
   3060         /* flags       */ 0,
   3061     },
   3062 #endif /* chips */
   3063 
   3064 #if defined(BCM_56560_A0)
   3065     { /* SOC_FORMAT_INT_SS_REQ_BUS_LPM_BCM56560_A0fmt */ 
   3066         /* format            SS_REQ_BUS_LPMfmt */
   3067         /* nFields     */ 5,
   3068         /* *fields     */ soc_SS_REQ_BUS_LPM_BCM56560_A0fmt_fields,
   3069         /* bits        */ 48,
   3070         /* flags       */ 0,
   3071     },
   3072 #endif /* chips */
   3073 
   3074 #if defined(BCM_56560_B0)
   3075     { /* SOC_FORMAT_INT_SS_REQ_BUS_LPM_BCM56560_B0fmt */ 
   3076         /* format            SS_REQ_BUS_LPMfmt */
   3077         /* nFields     */ 5,
   3078         /* *fields     */ soc_SS_REQ_BUS_LPM_BCM56560_A0fmt_fields,
   3079         /* bits        */ 48,
   3080         /* flags       */ 0,
   3081     },
   3082 #endif /* chips */
   3083 
   3084 #if defined(BCM_56670_A0)
   3085     { /* SOC_FORMAT_INT_SS_REQ_BUS_LPM_BCM56670_A0fmt */ 
   3086         /* format            SS_REQ_BUS_LPMfmt */
   3087         /* nFields     */ 7,
   3088         /* *fields     */ soc_SS_REQ_BUS_LPM_BCM56670_A0fmt_fields,
   3089         /* bits        */ 48,
   3090         /* flags       */ 0,
   3091     },
   3092 #endif /* chips */
   3093 
   3094 #if defined(BCM_56670_B0)
   3095     { /* SOC_FORMAT_INT_SS_REQ_BUS_LPM_BCM56670_B0fmt */ 
   3096         /* format            SS_REQ_BUS_LPMfmt */
   3097         /* nFields     */ 7,
   3098         /* *fields     */ soc_SS_REQ_BUS_LPM_BCM56670_A0fmt_fields,
   3099         /* bits        */ 48,
   3100         /* flags       */ 0,
   3101     },
   3102 #endif /* chips */
   3103 
   3104 #if defined(BCM_56770_A0)
   3105     { /* SOC_FORMAT_INT_SS_REQ_BUS_LPM_BCM56770_A0fmt */ 
   3106         /* format            SS_REQ_BUS_LPMfmt */
   3107         /* nFields     */ 15,
   3108         /* *fields     */ soc_SS_REQ_BUS_LPM_BCM56870_A0fmt_fields,
   3109         /* bits        */ 60,
   3110         /* flags       */ 0,
   3111     },
   3112 #endif /* chips */
   3113 
   3114 #if defined(BCM_56870_A0)
   3115     { /* SOC_FORMAT_INT_SS_REQ_BUS_LPM_BCM56870_A0fmt */ 
   3116         /* format            SS_REQ_BUS_LPMfmt */
   3117         /* nFields     */ 15,
   3118         /* *fields     */ soc_SS_REQ_BUS_LPM_BCM56870_A0fmt_fields,
   3119         /* bits        */ 60,
   3120         /* flags       */ 0,
   3121     },
   3122 #endif /* chips */
   3123 
   3124 #if defined(BCM_56960_A0)
   3125     { /* SOC_FORMAT_INT_SS_REQ_BUS_LPM_BCM56960_A0fmt */ 
   3126         /* format            SS_REQ_BUS_LPMfmt */
   3127         /* nFields     */ 5,
   3128         /* *fields     */ soc_SS_REQ_BUS_LPM_BCM56960_A0fmt_fields,
   3129         /* bits        */ 46,
   3130         /* flags       */ 0,
   3131     },
   3132 #endif /* chips */
   3133 
   3134 #if defined(BCM_56965_A0)
   3135     { /* SOC_FORMAT_INT_SS_REQ_BUS_LPM_BCM56965_A0fmt */ 
   3136         /* format            SS_REQ_BUS_LPMfmt */
   3137         /* nFields     */ 5,
   3138         /* *fields     */ soc_SS_REQ_BUS_LPM_BCM56960_A0fmt_fields,
   3139         /* bits        */ 46,
   3140         /* flags       */ 0,
   3141     },
   3142 #endif /* chips */
   3143 
   3144 #if defined(BCM_56970_A0)
   3145     { /* SOC_FORMAT_INT_SS_REQ_BUS_LPM_BCM56970_A0fmt */ 
   3146         /* format            SS_REQ_BUS_LPMfmt */
   3147         /* nFields     */ 5,
   3148         /* *fields     */ soc_SS_REQ_BUS_LPM_BCM56560_A0fmt_fields,
   3149         /* bits        */ 48,
   3150         /* flags       */ 0,
   3151     },
   3152 #endif /* chips */
   3153 
   3154 #if defined(BCM_56980_A0)
   3155     { /* SOC_FORMAT_INT_SS_REQ_BUS_LPM_BCM56980_A0fmt */ 
   3156         /* format            SS_REQ_BUS_LPMfmt */
   3157         /* nFields     */ 30,
   3158         /* *fields     */ soc_SS_REQ_BUS_LPM_BCM56980_A0fmt_fields,
   3159         /* bits        */ 65,
   3160         /* flags       */ 0,
   3161     },
   3162 #endif /* chips */
   3163 
   3164 #if defined(BCM_56980_B0)
   3165     { /* SOC_FORMAT_INT_SS_REQ_BUS_LPM_BCM56980_B0fmt */ 
   3166         /* format            SS_REQ_BUS_LPMfmt */
   3167         /* nFields     */ 30,
   3168         /* *fields     */ soc_SS_REQ_BUS_LPM_BCM56980_A0fmt_fields,
   3169         /* bits        */ 65,
   3170         /* flags       */ 0,
   3171     },
   3172 #endif /* chips */
   3173 
   3174 #if defined(BCM_56340_A0) || defined(BCM_56640_A0)
   3175     { /* SOC_FORMAT_INT_SS_RST_BUSfmt */ 
   3176         /* format            SS_RST_BUSfmt */
   3177         /* nFields     */ 12,
   3178         /* *fields     */ soc_SS_RST_BUSfmt_fields,
   3179         /* bits        */ 35,
   3180         /* flags       */ 0,
   3181     },
   3182 #endif /* chips */
   3183 
   3184 #if defined(BCM_56640_A0)
   3185     { /* SOC_FORMAT_INT_SS_RST_BUS0fmt */ 
   3186         /* format            SS_RST_BUS0fmt */
   3187         /* nFields     */ 4,
   3188         /* *fields     */ soc_SS_RST_BUS0fmt_fields,
   3189         /* bits        */ 229,
   3190         /* flags       */ 0,
   3191     },
   3192 #endif /* chips */
   3193 
   3194 #if defined(BCM_56340_A0) || defined(BCM_56640_A0)
   3195     { /* SOC_FORMAT_INT_SS_RST_BUS1fmt */ 
   3196         /* format            SS_RST_BUS1fmt */
   3197         /* nFields     */ 4,
   3198         /* *fields     */ soc_SS_RST_BUS1fmt_fields,
   3199         /* bits        */ 294,
   3200         /* flags       */ 0,
   3201     },
   3202 #endif /* chips */
   3203 
   3204 #if defined(BCM_56340_A0) || defined(BCM_56640_A0)
   3205     { /* SOC_FORMAT_INT_SS_RST_BUS2fmt */ 
   3206         /* format            SS_RST_BUS2fmt */
   3207         /* nFields     */ 9,
   3208         /* *fields     */ soc_SS_RST_BUS2fmt_fields,
   3209         /* bits        */ 747,
   3210         /* flags       */ 0,
   3211     },
   3212 #endif /* chips */
   3213 
   3214 #if defined(BCM_56340_A0) || defined(BCM_56640_A0)
   3215     { /* SOC_FORMAT_INT_SS_RST_BUS3fmt */ 
   3216         /* format            SS_RST_BUS3fmt */
   3217         /* nFields     */ 3,
   3218         /* *fields     */ soc_SS_RST_BUS3fmt_fields,
   3219         /* bits        */ 157,
   3220         /* flags       */ 0,
   3221     },
   3222 #endif /* chips */
   3223 
   3224 #if defined(BCM_56340_A0) || defined(BCM_56640_A0)
   3225     { /* SOC_FORMAT_INT_SS_RST_BUS4fmt */ 
   3226         /* format            SS_RST_BUS4fmt */
   3227         /* nFields     */ 1,
   3228         /* *fields     */ soc_SS_RST_BUS4fmt_fields,
   3229         /* bits        */ 210,
   3230         /* flags       */ 0,
   3231     },
   3232 #endif /* chips */
   3233 
   3234 #if defined(BCM_56640_A0)
   3235     { /* SOC_FORMAT_INT_SS_RST_BUS5fmt */ 
   3236         /* format            SS_RST_BUS5fmt */
   3237         /* nFields     */ 1,
   3238         /* *fields     */ soc_SS_RST_BUS4fmt_fields,
   3239         /* bits        */ 210,
   3240         /* flags       */ 0,
   3241     },
   3242 #endif /* chips */
   3243 
   3244 #if defined(BCM_56340_A0) || defined(BCM_56640_A0)
   3245     { /* SOC_FORMAT_INT_SS_RST_BUS6fmt */ 
   3246         /* format            SS_RST_BUS6fmt */
   3247         /* nFields     */ 4,
   3248         /* *fields     */ soc_SS_RST_BUS6fmt_fields,
   3249         /* bits        */ 249,
   3250         /* flags       */ 0,
   3251     },
   3252 #endif /* chips */
   3253 
   3254 #if defined(BCM_56340_A0)
   3255     { /* SOC_FORMAT_INT_SS_RST_BUS0_BCM56340_A0fmt */ 
   3256         /* format            SS_RST_BUS0fmt */
   3257         /* nFields     */ 4,
   3258         /* *fields     */ soc_SS_RST_BUS0_BCM56340_A0fmt_fields,
   3259         /* bits        */ 223,
   3260         /* flags       */ 0,
   3261     },
   3262 #endif /* chips */
   3263 
   3264 #if defined(BCM_56340_A0) || defined(BCM_56640_A0)
   3265     { /* SOC_FORMAT_INT_SS_RST_BUS0_C_MODELfmt */ 
   3266         /* format            SS_RST_BUS0_C_MODELfmt */
   3267         /* nFields     */ 2,
   3268         /* *fields     */ soc_SS_RST_BUS0_C_MODELfmt_fields,
   3269         /* bits        */ 420,
   3270         /* flags       */ 0,
   3271     },
   3272 #endif /* chips */
   3273 
   3274 #if defined(BCM_56640_A0)
   3275     { /* SOC_FORMAT_INT_SS_RST_BUS1_C_MODELfmt */ 
   3276         /* format            SS_RST_BUS1_C_MODELfmt */
   3277         /* nFields     */ 2,
   3278         /* *fields     */ soc_SS_RST_BUS0_C_MODELfmt_fields,
   3279         /* bits        */ 420,
   3280         /* flags       */ 0,
   3281     },
   3282 #endif /* chips */
   3283 
   3284 #if defined(BCM_56340_A0)
   3285     { /* SOC_FORMAT_INT_SS_RST_BUS1_C_MODEL_BCM56340_A0fmt */ 
   3286         /* format            SS_RST_BUS1_C_MODELfmt */
   3287         /* nFields     */ 2,
   3288         /* *fields     */ soc_SS_RST_BUS0_C_MODELfmt_fields,
   3289         /* bits        */ 420,
   3290         /* flags       */ 0,
   3291     },
   3292 #endif /* chips */
   3293 
   3294 #if defined(BCM_56340_A0) || defined(BCM_56640_A0)
   3295     { /* SOC_FORMAT_INT_SS_RST_BUS2_C_MODELfmt */ 
   3296         /* format            SS_RST_BUS2_C_MODELfmt */
   3297         /* nFields     */ 2,
   3298         /* *fields     */ soc_SS_RST_BUS2_C_MODELfmt_fields,
   3299         /* bits        */ 840,
   3300         /* flags       */ 0,
   3301     },
   3302 #endif /* chips */
   3303 
   3304 #if defined(BCM_56340_A0) || defined(BCM_56640_A0)
   3305     { /* SOC_FORMAT_INT_SS_RST_BUS3_C_MODELfmt */ 
   3306         /* format            SS_RST_BUS3_C_MODELfmt */
   3307         /* nFields     */ 2,
   3308         /* *fields     */ soc_SS_RST_BUS3_C_MODELfmt_fields,
   3309         /* bits        */ 210,
   3310         /* flags       */ 0,
   3311     },
   3312 #endif /* chips */
   3313 
   3314 #if defined(BCM_56340_A0) || defined(BCM_56640_A0)
   3315     { /* SOC_FORMAT_INT_SS_RST_BUS4_C_MODELfmt */ 
   3316         /* format            SS_RST_BUS4_C_MODELfmt */
   3317         /* nFields     */ 1,
   3318         /* *fields     */ soc_SS_RST_BUS4_C_MODELfmt_fields,
   3319         /* bits        */ 420,
   3320         /* flags       */ 0,
   3321     },
   3322 #endif /* chips */
   3323 
   3324 #if defined(BCM_56340_A0)
   3325     { /* SOC_FORMAT_INT_SS_RST_BUS5_BCM56340_A0fmt */ 
   3326         /* format            SS_RST_BUS5fmt */
   3327         /* nFields     */ 1,
   3328         /* *fields     */ soc_SS_RST_BUS4fmt_fields,
   3329         /* bits        */ 210,
   3330         /* flags       */ 0,
   3331     },
   3332 #endif /* chips */
   3333 
   3334 #if defined(BCM_56640_A0)
   3335     { /* SOC_FORMAT_INT_SS_RST_BUS5_C_MODELfmt */ 
   3336         /* format            SS_RST_BUS5_C_MODELfmt */
   3337         /* nFields     */ 1,
   3338         /* *fields     */ soc_SS_RST_BUS4_C_MODELfmt_fields,
   3339         /* bits        */ 420,
   3340         /* flags       */ 0,
   3341     },
   3342 #endif /* chips */
   3343 
   3344 #if defined(BCM_56340_A0)
   3345     { /* SOC_FORMAT_INT_SS_RST_BUS5_C_MODEL_BCM56340_A0fmt */ 
   3346         /* format            SS_RST_BUS5_C_MODELfmt */
   3347         /* nFields     */ 1,
   3348         /* *fields     */ soc_SS_RST_BUS4_C_MODELfmt_fields,
   3349         /* bits        */ 420,
   3350         /* flags       */ 0,
   3351     },
   3352 #endif /* chips */
   3353 
   3354 #if defined(BCM_56640_A0)
   3355     { /* SOC_FORMAT_INT_SS_RST_BUS6_C_MODELfmt */ 
   3356         /* format            SS_RST_BUS6_C_MODELfmt */
   3357         /* nFields     */ 2,
   3358         /* *fields     */ soc_SS_RST_BUS0_C_MODELfmt_fields,
   3359         /* bits        */ 420,
   3360         /* flags       */ 0,
   3361     },
   3362 #endif /* chips */
   3363 
   3364 #if defined(BCM_56340_A0)
   3365     { /* SOC_FORMAT_INT_SS_RST_BUS6_C_MODEL_BCM56340_A0fmt */ 
   3366         /* format            SS_RST_BUS6_C_MODELfmt */
   3367         /* nFields     */ 2,
   3368         /* *fields     */ soc_SS_RST_BUS0_C_MODELfmt_fields,
   3369         /* bits        */ 420,
   3370         /* flags       */ 0,
   3371     },
   3372 #endif /* chips */
   3373 
   3374 #if defined(BCM_56340_A0) || defined(BCM_56640_A0)
   3375     { /* SOC_FORMAT_INT_SS_RST_BUS_C_MODELfmt */ 
   3376         /* format            SS_RST_BUS_C_MODELfmt */
   3377         /* nFields     */ 9,
   3378         /* *fields     */ soc_SS_RST_BUS_C_MODELfmt_fields,
   3379         /* bits        */ 31,
   3380         /* flags       */ 0,
   3381     },
   3382 #endif /* chips */
   3383 
   3384 #if defined(BCM_56850_A0) || defined(BCM_56860_A0)
   3385     { /* SOC_FORMAT_INT_SS_RST_BUS_INfmt */ 
   3386         /* format            SS_RST_BUS_INfmt */
   3387         /* nFields     */ 8,
   3388         /* *fields     */ soc_SS_RST_BUS_INfmt_fields,
   3389         /* bits        */ 15,
   3390         /* flags       */ 0,
   3391     },
   3392 #endif /* chips */
   3393 
   3394 #if defined(BCM_56260_A0)
   3395     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_BCM56260_A0fmt */ 
   3396         /* format            SS_RST_BUS_INfmt */
   3397         /* nFields     */ 11,
   3398         /* *fields     */ soc_SS_RST_BUS_IN_BCM56960_A0fmt_fields,
   3399         /* bits        */ 20,
   3400         /* flags       */ 0,
   3401     },
   3402 #endif /* chips */
   3403 
   3404 #if defined(BCM_56260_B0)
   3405     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_BCM56260_B0fmt */ 
   3406         /* format            SS_RST_BUS_INfmt */
   3407         /* nFields     */ 11,
   3408         /* *fields     */ soc_SS_RST_BUS_IN_BCM56960_A0fmt_fields,
   3409         /* bits        */ 20,
   3410         /* flags       */ 0,
   3411     },
   3412 #endif /* chips */
   3413 
   3414 #if defined(BCM_56270_A0)
   3415     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_BCM56270_A0fmt */ 
   3416         /* format            SS_RST_BUS_INfmt */
   3417         /* nFields     */ 11,
   3418         /* *fields     */ soc_SS_RST_BUS_IN_BCM56960_A0fmt_fields,
   3419         /* bits        */ 20,
   3420         /* flags       */ 0,
   3421     },
   3422 #endif /* chips */
   3423 
   3424 #if defined(BCM_56560_A0)
   3425     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_BCM56560_A0fmt */ 
   3426         /* format            SS_RST_BUS_INfmt */
   3427         /* nFields     */ 11,
   3428         /* *fields     */ soc_SS_RST_BUS_IN_BCM56960_A0fmt_fields,
   3429         /* bits        */ 20,
   3430         /* flags       */ 0,
   3431     },
   3432 #endif /* chips */
   3433 
   3434 #if defined(BCM_56560_B0)
   3435     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_BCM56560_B0fmt */ 
   3436         /* format            SS_RST_BUS_INfmt */
   3437         /* nFields     */ 11,
   3438         /* *fields     */ soc_SS_RST_BUS_IN_BCM56960_A0fmt_fields,
   3439         /* bits        */ 20,
   3440         /* flags       */ 0,
   3441     },
   3442 #endif /* chips */
   3443 
   3444 #if defined(BCM_56670_A0)
   3445     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_BCM56670_A0fmt */ 
   3446         /* format            SS_RST_BUS_INfmt */
   3447         /* nFields     */ 11,
   3448         /* *fields     */ soc_SS_RST_BUS_IN_BCM56960_A0fmt_fields,
   3449         /* bits        */ 20,
   3450         /* flags       */ 0,
   3451     },
   3452 #endif /* chips */
   3453 
   3454 #if defined(BCM_56670_B0)
   3455     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_BCM56670_B0fmt */ 
   3456         /* format            SS_RST_BUS_INfmt */
   3457         /* nFields     */ 11,
   3458         /* *fields     */ soc_SS_RST_BUS_IN_BCM56960_A0fmt_fields,
   3459         /* bits        */ 20,
   3460         /* flags       */ 0,
   3461     },
   3462 #endif /* chips */
   3463 
   3464 #if defined(BCM_56960_A0)
   3465     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_BCM56960_A0fmt */ 
   3466         /* format            SS_RST_BUS_INfmt */
   3467         /* nFields     */ 11,
   3468         /* *fields     */ soc_SS_RST_BUS_IN_BCM56960_A0fmt_fields,
   3469         /* bits        */ 20,
   3470         /* flags       */ 0,
   3471     },
   3472 #endif /* chips */
   3473 
   3474 #if defined(BCM_56965_A0)
   3475     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_BCM56965_A0fmt */ 
   3476         /* format            SS_RST_BUS_INfmt */
   3477         /* nFields     */ 11,
   3478         /* *fields     */ soc_SS_RST_BUS_IN_BCM56960_A0fmt_fields,
   3479         /* bits        */ 20,
   3480         /* flags       */ 0,
   3481     },
   3482 #endif /* chips */
   3483 
   3484 #if defined(BCM_56970_A0)
   3485     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_BCM56970_A0fmt */ 
   3486         /* format            SS_RST_BUS_INfmt */
   3487         /* nFields     */ 11,
   3488         /* *fields     */ soc_SS_RST_BUS_IN_BCM56960_A0fmt_fields,
   3489         /* bits        */ 20,
   3490         /* flags       */ 0,
   3491     },
   3492 #endif /* chips */
   3493 
   3494 #if defined(BCM_56560_A0) || defined(BCM_56560_B0) || \
   3495     defined(BCM_56960_A0) || defined(BCM_56965_A0) || \
   3496     defined(BCM_56970_A0)
   3497     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_FPEMfmt */ 
   3498         /* format            SS_RST_BUS_IN_DATA_FPEMfmt */
   3499         /* nFields     */ 9,
   3500         /* *fields     */ soc_SS_RST_BUS_IN_DATA_FPEMfmt_fields,
   3501         /* bits        */ 420,
   3502         /* flags       */ 0,
   3503     },
   3504 #endif /* chips */
   3505 
   3506 #if defined(BCM_56260_A0)
   3507     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_FPEM_BCM56260_A0fmt */ 
   3508         /* format            SS_RST_BUS_IN_DATA_FPEMfmt */
   3509         /* nFields     */ 1,
   3510         /* *fields     */ soc_SS_RST_BUS_OUT_FPEMfmt_fields,
   3511         /* bits        */ 420,
   3512         /* flags       */ 0,
   3513     },
   3514 #endif /* chips */
   3515 
   3516 #if defined(BCM_56260_B0)
   3517     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_FPEM_BCM56260_B0fmt */ 
   3518         /* format            SS_RST_BUS_IN_DATA_FPEMfmt */
   3519         /* nFields     */ 1,
   3520         /* *fields     */ soc_SS_RST_BUS_OUT_FPEMfmt_fields,
   3521         /* bits        */ 420,
   3522         /* flags       */ 0,
   3523     },
   3524 #endif /* chips */
   3525 
   3526 #if defined(BCM_56270_A0)
   3527     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_FPEM_BCM56270_A0fmt */ 
   3528         /* format            SS_RST_BUS_IN_DATA_FPEMfmt */
   3529         /* nFields     */ 1,
   3530         /* *fields     */ soc_SS_RST_BUS_OUT_FPEMfmt_fields,
   3531         /* bits        */ 420,
   3532         /* flags       */ 0,
   3533     },
   3534 #endif /* chips */
   3535 
   3536 #if defined(BCM_56670_A0)
   3537     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_FPEM_BCM56670_A0fmt */ 
   3538         /* format            SS_RST_BUS_IN_DATA_FPEMfmt */
   3539         /* nFields     */ 9,
   3540         /* *fields     */ soc_SS_RST_BUS_IN_DATA_FPEM_BCM56670_A0fmt_fields,
   3541         /* bits        */ 372,
   3542         /* flags       */ 0,
   3543     },
   3544 #endif /* chips */
   3545 
   3546 #if defined(BCM_56670_B0)
   3547     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_FPEM_BCM56670_B0fmt */ 
   3548         /* format            SS_RST_BUS_IN_DATA_FPEMfmt */
   3549         /* nFields     */ 9,
   3550         /* *fields     */ soc_SS_RST_BUS_IN_DATA_FPEM_BCM56670_A0fmt_fields,
   3551         /* bits        */ 372,
   3552         /* flags       */ 0,
   3553     },
   3554 #endif /* chips */
   3555 
   3556 #if defined(BCM_56850_A0)
   3557     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL2LUfmt */ 
   3558         /* format            SS_RST_BUS_IN_DATA_IL2LUfmt */
   3559         /* nFields     */ 3,
   3560         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IL2LUfmt_fields,
   3561         /* bits        */ 105,
   3562         /* flags       */ 0,
   3563     },
   3564 #endif /* chips */
   3565 
   3566 #if defined(BCM_56260_A0)
   3567     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL2LU_BCM56260_A0fmt */ 
   3568         /* format            SS_RST_BUS_IN_DATA_IL2LUfmt */
   3569         /* nFields     */ 1,
   3570         /* *fields     */ soc_SS_RST_BUS_OUT_IL2LU_BCM56960_A0fmt_fields,
   3571         /* bits        */ 113,
   3572         /* flags       */ 0,
   3573     },
   3574 #endif /* chips */
   3575 
   3576 #if defined(BCM_56260_B0)
   3577     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL2LU_BCM56260_B0fmt */ 
   3578         /* format            SS_RST_BUS_IN_DATA_IL2LUfmt */
   3579         /* nFields     */ 1,
   3580         /* *fields     */ soc_SS_RST_BUS_OUT_IL2LU_BCM56960_A0fmt_fields,
   3581         /* bits        */ 113,
   3582         /* flags       */ 0,
   3583     },
   3584 #endif /* chips */
   3585 
   3586 #if defined(BCM_56270_A0)
   3587     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL2LU_BCM56270_A0fmt */ 
   3588         /* format            SS_RST_BUS_IN_DATA_IL2LUfmt */
   3589         /* nFields     */ 1,
   3590         /* *fields     */ soc_SS_RST_BUS_OUT_IL2LU_BCM56960_A0fmt_fields,
   3591         /* bits        */ 113,
   3592         /* flags       */ 0,
   3593     },
   3594 #endif /* chips */
   3595 
   3596 #if defined(BCM_56560_A0)
   3597     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL2LU_BCM56560_A0fmt */ 
   3598         /* format            SS_RST_BUS_IN_DATA_IL2LUfmt */
   3599         /* nFields     */ 3,
   3600         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IL2LU_BCM56960_A0fmt_fields,
   3601         /* bits        */ 113,
   3602         /* flags       */ 0,
   3603     },
   3604 #endif /* chips */
   3605 
   3606 #if defined(BCM_56560_B0)
   3607     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL2LU_BCM56560_B0fmt */ 
   3608         /* format            SS_RST_BUS_IN_DATA_IL2LUfmt */
   3609         /* nFields     */ 3,
   3610         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IL2LU_BCM56960_A0fmt_fields,
   3611         /* bits        */ 113,
   3612         /* flags       */ 0,
   3613     },
   3614 #endif /* chips */
   3615 
   3616 #if defined(BCM_56670_A0)
   3617     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL2LU_BCM56670_A0fmt */ 
   3618         /* format            SS_RST_BUS_IN_DATA_IL2LUfmt */
   3619         /* nFields     */ 3,
   3620         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IL2LU_BCM56960_A0fmt_fields,
   3621         /* bits        */ 113,
   3622         /* flags       */ 0,
   3623     },
   3624 #endif /* chips */
   3625 
   3626 #if defined(BCM_56670_B0)
   3627     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL2LU_BCM56670_B0fmt */ 
   3628         /* format            SS_RST_BUS_IN_DATA_IL2LUfmt */
   3629         /* nFields     */ 3,
   3630         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IL2LU_BCM56960_A0fmt_fields,
   3631         /* bits        */ 113,
   3632         /* flags       */ 0,
   3633     },
   3634 #endif /* chips */
   3635 
   3636 #if defined(BCM_56860_A0)
   3637     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL2LU_BCM56860_A0fmt */ 
   3638         /* format            SS_RST_BUS_IN_DATA_IL2LUfmt */
   3639         /* nFields     */ 3,
   3640         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IL2LU_BCM56860_A0fmt_fields,
   3641         /* bits        */ 113,
   3642         /* flags       */ 0,
   3643     },
   3644 #endif /* chips */
   3645 
   3646 #if defined(BCM_56960_A0)
   3647     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL2LU_BCM56960_A0fmt */ 
   3648         /* format            SS_RST_BUS_IN_DATA_IL2LUfmt */
   3649         /* nFields     */ 3,
   3650         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IL2LU_BCM56960_A0fmt_fields,
   3651         /* bits        */ 113,
   3652         /* flags       */ 0,
   3653     },
   3654 #endif /* chips */
   3655 
   3656 #if defined(BCM_56965_A0)
   3657     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL2LU_BCM56965_A0fmt */ 
   3658         /* format            SS_RST_BUS_IN_DATA_IL2LUfmt */
   3659         /* nFields     */ 3,
   3660         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IL2LU_BCM56960_A0fmt_fields,
   3661         /* bits        */ 113,
   3662         /* flags       */ 0,
   3663     },
   3664 #endif /* chips */
   3665 
   3666 #if defined(BCM_56970_A0)
   3667     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL2LU_BCM56970_A0fmt */ 
   3668         /* format            SS_RST_BUS_IN_DATA_IL2LUfmt */
   3669         /* nFields     */ 3,
   3670         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IL2LU_BCM56960_A0fmt_fields,
   3671         /* bits        */ 113,
   3672         /* flags       */ 0,
   3673     },
   3674 #endif /* chips */
   3675 
   3676 #if defined(BCM_56850_A0)
   3677     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL3LUfmt */ 
   3678         /* format            SS_RST_BUS_IN_DATA_IL3LUfmt */
   3679         /* nFields     */ 9,
   3680         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IL3LUfmt_fields,
   3681         /* bits        */ 420,
   3682         /* flags       */ 0,
   3683     },
   3684 #endif /* chips */
   3685 
   3686 #if defined(BCM_56260_A0)
   3687     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL3LU_BCM56260_A0fmt */ 
   3688         /* format            SS_RST_BUS_IN_DATA_IL3LUfmt */
   3689         /* nFields     */ 1,
   3690         /* *fields     */ soc_SS_RST_BUS_OUT_FPEMfmt_fields,
   3691         /* bits        */ 420,
   3692         /* flags       */ 0,
   3693     },
   3694 #endif /* chips */
   3695 
   3696 #if defined(BCM_56260_B0)
   3697     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL3LU_BCM56260_B0fmt */ 
   3698         /* format            SS_RST_BUS_IN_DATA_IL3LUfmt */
   3699         /* nFields     */ 1,
   3700         /* *fields     */ soc_SS_RST_BUS_OUT_FPEMfmt_fields,
   3701         /* bits        */ 420,
   3702         /* flags       */ 0,
   3703     },
   3704 #endif /* chips */
   3705 
   3706 #if defined(BCM_56270_A0)
   3707     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL3LU_BCM56270_A0fmt */ 
   3708         /* format            SS_RST_BUS_IN_DATA_IL3LUfmt */
   3709         /* nFields     */ 1,
   3710         /* *fields     */ soc_SS_RST_BUS_OUT_FPEMfmt_fields,
   3711         /* bits        */ 420,
   3712         /* flags       */ 0,
   3713     },
   3714 #endif /* chips */
   3715 
   3716 #if defined(BCM_56560_A0)
   3717     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL3LU_BCM56560_A0fmt */ 
   3718         /* format            SS_RST_BUS_IN_DATA_IL3LUfmt */
   3719         /* nFields     */ 9,
   3720         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IL3LU_BCM56560_A0fmt_fields,
   3721         /* bits        */ 420,
   3722         /* flags       */ 0,
   3723     },
   3724 #endif /* chips */
   3725 
   3726 #if defined(BCM_56560_B0)
   3727     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL3LU_BCM56560_B0fmt */ 
   3728         /* format            SS_RST_BUS_IN_DATA_IL3LUfmt */
   3729         /* nFields     */ 9,
   3730         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IL3LU_BCM56560_A0fmt_fields,
   3731         /* bits        */ 420,
   3732         /* flags       */ 0,
   3733     },
   3734 #endif /* chips */
   3735 
   3736 #if defined(BCM_56670_A0)
   3737     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL3LU_BCM56670_A0fmt */ 
   3738         /* format            SS_RST_BUS_IN_DATA_IL3LUfmt */
   3739         /* nFields     */ 9,
   3740         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IL3LU_BCM56670_A0fmt_fields,
   3741         /* bits        */ 372,
   3742         /* flags       */ 0,
   3743     },
   3744 #endif /* chips */
   3745 
   3746 #if defined(BCM_56670_B0)
   3747     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL3LU_BCM56670_B0fmt */ 
   3748         /* format            SS_RST_BUS_IN_DATA_IL3LUfmt */
   3749         /* nFields     */ 9,
   3750         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IL3LU_BCM56670_A0fmt_fields,
   3751         /* bits        */ 372,
   3752         /* flags       */ 0,
   3753     },
   3754 #endif /* chips */
   3755 
   3756 #if defined(BCM_56860_A0)
   3757     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL3LU_BCM56860_A0fmt */ 
   3758         /* format            SS_RST_BUS_IN_DATA_IL3LUfmt */
   3759         /* nFields     */ 9,
   3760         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IL3LU_BCM56860_A0fmt_fields,
   3761         /* bits        */ 420,
   3762         /* flags       */ 0,
   3763     },
   3764 #endif /* chips */
   3765 
   3766 #if defined(BCM_56960_A0)
   3767     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL3LU_BCM56960_A0fmt */ 
   3768         /* format            SS_RST_BUS_IN_DATA_IL3LUfmt */
   3769         /* nFields     */ 9,
   3770         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IL3LU_BCM56960_A0fmt_fields,
   3771         /* bits        */ 420,
   3772         /* flags       */ 0,
   3773     },
   3774 #endif /* chips */
   3775 
   3776 #if defined(BCM_56965_A0)
   3777     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL3LU_BCM56965_A0fmt */ 
   3778         /* format            SS_RST_BUS_IN_DATA_IL3LUfmt */
   3779         /* nFields     */ 9,
   3780         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IL3LU_BCM56960_A0fmt_fields,
   3781         /* bits        */ 420,
   3782         /* flags       */ 0,
   3783     },
   3784 #endif /* chips */
   3785 
   3786 #if defined(BCM_56970_A0)
   3787     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IL3LU_BCM56970_A0fmt */ 
   3788         /* format            SS_RST_BUS_IN_DATA_IL3LUfmt */
   3789         /* nFields     */ 9,
   3790         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IL3LU_BCM56960_A0fmt_fields,
   3791         /* bits        */ 420,
   3792         /* flags       */ 0,
   3793     },
   3794 #endif /* chips */
   3795 
   3796 #if defined(BCM_56850_A0) || defined(BCM_56860_A0)
   3797     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_ILPMfmt */ 
   3798         /* format            SS_RST_BUS_IN_DATA_ILPMfmt */
   3799         /* nFields     */ 3,
   3800         /* *fields     */ soc_SS_RST_BUS_IN_DATA_ILPMfmt_fields,
   3801         /* bits        */ 210,
   3802         /* flags       */ 0,
   3803     },
   3804 #endif /* chips */
   3805 
   3806 #if defined(BCM_56260_A0)
   3807     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_ILPM_BCM56260_A0fmt */ 
   3808         /* format            SS_RST_BUS_IN_DATA_ILPMfmt */
   3809         /* nFields     */ 1,
   3810         /* *fields     */ soc_SS_RST_BUS_OUT_ILPMfmt_fields,
   3811         /* bits        */ 210,
   3812         /* flags       */ 0,
   3813     },
   3814 #endif /* chips */
   3815 
   3816 #if defined(BCM_56260_B0)
   3817     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_ILPM_BCM56260_B0fmt */ 
   3818         /* format            SS_RST_BUS_IN_DATA_ILPMfmt */
   3819         /* nFields     */ 1,
   3820         /* *fields     */ soc_SS_RST_BUS_OUT_ILPMfmt_fields,
   3821         /* bits        */ 210,
   3822         /* flags       */ 0,
   3823     },
   3824 #endif /* chips */
   3825 
   3826 #if defined(BCM_56270_A0)
   3827     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_ILPM_BCM56270_A0fmt */ 
   3828         /* format            SS_RST_BUS_IN_DATA_ILPMfmt */
   3829         /* nFields     */ 1,
   3830         /* *fields     */ soc_SS_RST_BUS_OUT_ILPMfmt_fields,
   3831         /* bits        */ 210,
   3832         /* flags       */ 0,
   3833     },
   3834 #endif /* chips */
   3835 
   3836 #if defined(BCM_56370_A0)
   3837     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_ILPM_BCM56370_A0fmt */ 
   3838         /* format            SS_RST_BUS_IN_DATA_ILPMfmt */
   3839         /* nFields     */ 5,
   3840         /* *fields     */ soc_SS_RST_BUS_IN_DATA_ILPM_BCM56870_A0fmt_fields,
   3841         /* bits        */ 216,
   3842         /* flags       */ 0,
   3843     },
   3844 #endif /* chips */
   3845 
   3846 #if defined(BCM_56560_A0)
   3847     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_ILPM_BCM56560_A0fmt */ 
   3848         /* format            SS_RST_BUS_IN_DATA_ILPMfmt */
   3849         /* nFields     */ 3,
   3850         /* *fields     */ soc_SS_RST_BUS_IN_DATA_ILPM_BCM56960_A0fmt_fields,
   3851         /* bits        */ 210,
   3852         /* flags       */ 0,
   3853     },
   3854 #endif /* chips */
   3855 
   3856 #if defined(BCM_56560_B0)
   3857     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_ILPM_BCM56560_B0fmt */ 
   3858         /* format            SS_RST_BUS_IN_DATA_ILPMfmt */
   3859         /* nFields     */ 3,
   3860         /* *fields     */ soc_SS_RST_BUS_IN_DATA_ILPM_BCM56960_A0fmt_fields,
   3861         /* bits        */ 210,
   3862         /* flags       */ 0,
   3863     },
   3864 #endif /* chips */
   3865 
   3866 #if defined(BCM_56670_A0)
   3867     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_ILPM_BCM56670_A0fmt */ 
   3868         /* format            SS_RST_BUS_IN_DATA_ILPMfmt */
   3869         /* nFields     */ 3,
   3870         /* *fields     */ soc_SS_RST_BUS_IN_DATA_ILPM_BCM56960_A0fmt_fields,
   3871         /* bits        */ 210,
   3872         /* flags       */ 0,
   3873     },
   3874 #endif /* chips */
   3875 
   3876 #if defined(BCM_56670_B0)
   3877     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_ILPM_BCM56670_B0fmt */ 
   3878         /* format            SS_RST_BUS_IN_DATA_ILPMfmt */
   3879         /* nFields     */ 3,
   3880         /* *fields     */ soc_SS_RST_BUS_IN_DATA_ILPM_BCM56960_A0fmt_fields,
   3881         /* bits        */ 210,
   3882         /* flags       */ 0,
   3883     },
   3884 #endif /* chips */
   3885 
   3886 #if defined(BCM_56770_A0)
   3887     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_ILPM_BCM56770_A0fmt */ 
   3888         /* format            SS_RST_BUS_IN_DATA_ILPMfmt */
   3889         /* nFields     */ 5,
   3890         /* *fields     */ soc_SS_RST_BUS_IN_DATA_ILPM_BCM56870_A0fmt_fields,
   3891         /* bits        */ 216,
   3892         /* flags       */ 0,
   3893     },
   3894 #endif /* chips */
   3895 
   3896 #if defined(BCM_56870_A0)
   3897     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_ILPM_BCM56870_A0fmt */ 
   3898         /* format            SS_RST_BUS_IN_DATA_ILPMfmt */
   3899         /* nFields     */ 5,
   3900         /* *fields     */ soc_SS_RST_BUS_IN_DATA_ILPM_BCM56870_A0fmt_fields,
   3901         /* bits        */ 216,
   3902         /* flags       */ 0,
   3903     },
   3904 #endif /* chips */
   3905 
   3906 #if defined(BCM_56960_A0)
   3907     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_ILPM_BCM56960_A0fmt */ 
   3908         /* format            SS_RST_BUS_IN_DATA_ILPMfmt */
   3909         /* nFields     */ 3,
   3910         /* *fields     */ soc_SS_RST_BUS_IN_DATA_ILPM_BCM56960_A0fmt_fields,
   3911         /* bits        */ 210,
   3912         /* flags       */ 0,
   3913     },
   3914 #endif /* chips */
   3915 
   3916 #if defined(BCM_56965_A0)
   3917     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_ILPM_BCM56965_A0fmt */ 
   3918         /* format            SS_RST_BUS_IN_DATA_ILPMfmt */
   3919         /* nFields     */ 3,
   3920         /* *fields     */ soc_SS_RST_BUS_IN_DATA_ILPM_BCM56960_A0fmt_fields,
   3921         /* bits        */ 210,
   3922         /* flags       */ 0,
   3923     },
   3924 #endif /* chips */
   3925 
   3926 #if defined(BCM_56970_A0)
   3927     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_ILPM_BCM56970_A0fmt */ 
   3928         /* format            SS_RST_BUS_IN_DATA_ILPMfmt */
   3929         /* nFields     */ 3,
   3930         /* *fields     */ soc_SS_RST_BUS_IN_DATA_ILPM_BCM56960_A0fmt_fields,
   3931         /* bits        */ 210,
   3932         /* flags       */ 0,
   3933     },
   3934 #endif /* chips */
   3935 
   3936 #if defined(BCM_56980_A0)
   3937     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_ILPM_BCM56980_A0fmt */ 
   3938         /* format            SS_RST_BUS_IN_DATA_ILPMfmt */
   3939         /* nFields     */ 4,
   3940         /* *fields     */ soc_SS_RST_BUS_IN_DATA_ILPM_BCM56980_A0fmt_fields,
   3941         /* bits        */ 480,
   3942         /* flags       */ 0,
   3943     },
   3944 #endif /* chips */
   3945 
   3946 #if defined(BCM_56980_B0)
   3947     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_ILPM_BCM56980_B0fmt */ 
   3948         /* format            SS_RST_BUS_IN_DATA_ILPMfmt */
   3949         /* nFields     */ 4,
   3950         /* *fields     */ soc_SS_RST_BUS_IN_DATA_ILPM_BCM56980_A0fmt_fields,
   3951         /* bits        */ 480,
   3952         /* flags       */ 0,
   3953     },
   3954 #endif /* chips */
   3955 
   3956 #if defined(BCM_56850_A0)
   3957     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IVLANfmt */ 
   3958         /* format            SS_RST_BUS_IN_DATA_IVLANfmt */
   3959         /* nFields     */ 3,
   3960         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IVLANfmt_fields,
   3961         /* bits        */ 170,
   3962         /* flags       */ 0,
   3963     },
   3964 #endif /* chips */
   3965 
   3966 #if defined(BCM_56260_A0)
   3967     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IVLAN_BCM56260_A0fmt */ 
   3968         /* format            SS_RST_BUS_IN_DATA_IVLANfmt */
   3969         /* nFields     */ 1,
   3970         /* *fields     */ soc_SS_RST_BUS_OUT_IVLAN_BCM56960_A0fmt_fields,
   3971         /* bits        */ 170,
   3972         /* flags       */ 0,
   3973     },
   3974 #endif /* chips */
   3975 
   3976 #if defined(BCM_56260_B0)
   3977     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IVLAN_BCM56260_B0fmt */ 
   3978         /* format            SS_RST_BUS_IN_DATA_IVLANfmt */
   3979         /* nFields     */ 1,
   3980         /* *fields     */ soc_SS_RST_BUS_OUT_IVLAN_BCM56960_A0fmt_fields,
   3981         /* bits        */ 170,
   3982         /* flags       */ 0,
   3983     },
   3984 #endif /* chips */
   3985 
   3986 #if defined(BCM_56270_A0)
   3987     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IVLAN_BCM56270_A0fmt */ 
   3988         /* format            SS_RST_BUS_IN_DATA_IVLANfmt */
   3989         /* nFields     */ 1,
   3990         /* *fields     */ soc_SS_RST_BUS_OUT_IVLAN_BCM56960_A0fmt_fields,
   3991         /* bits        */ 170,
   3992         /* flags       */ 0,
   3993     },
   3994 #endif /* chips */
   3995 
   3996 #if defined(BCM_56560_A0)
   3997     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IVLAN_BCM56560_A0fmt */ 
   3998         /* format            SS_RST_BUS_IN_DATA_IVLANfmt */
   3999         /* nFields     */ 4,
   4000         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IVLAN_BCM56560_A0fmt_fields,
   4001         /* bits        */ 209,
   4002         /* flags       */ 0,
   4003     },
   4004 #endif /* chips */
   4005 
   4006 #if defined(BCM_56560_B0)
   4007     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IVLAN_BCM56560_B0fmt */ 
   4008         /* format            SS_RST_BUS_IN_DATA_IVLANfmt */
   4009         /* nFields     */ 4,
   4010         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IVLAN_BCM56560_A0fmt_fields,
   4011         /* bits        */ 209,
   4012         /* flags       */ 0,
   4013     },
   4014 #endif /* chips */
   4015 
   4016 #if defined(BCM_56670_A0)
   4017     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IVLAN_BCM56670_A0fmt */ 
   4018         /* format            SS_RST_BUS_IN_DATA_IVLANfmt */
   4019         /* nFields     */ 4,
   4020         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IVLAN_BCM56560_A0fmt_fields,
   4021         /* bits        */ 209,
   4022         /* flags       */ 0,
   4023     },
   4024 #endif /* chips */
   4025 
   4026 #if defined(BCM_56670_B0)
   4027     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IVLAN_BCM56670_B0fmt */ 
   4028         /* format            SS_RST_BUS_IN_DATA_IVLANfmt */
   4029         /* nFields     */ 4,
   4030         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IVLAN_BCM56560_A0fmt_fields,
   4031         /* bits        */ 209,
   4032         /* flags       */ 0,
   4033     },
   4034 #endif /* chips */
   4035 
   4036 #if defined(BCM_56860_A0)
   4037     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IVLAN_BCM56860_A0fmt */ 
   4038         /* format            SS_RST_BUS_IN_DATA_IVLANfmt */
   4039         /* nFields     */ 3,
   4040         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IVLAN_BCM56860_A0fmt_fields,
   4041         /* bits        */ 192,
   4042         /* flags       */ 0,
   4043     },
   4044 #endif /* chips */
   4045 
   4046 #if defined(BCM_56960_A0)
   4047     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IVLAN_BCM56960_A0fmt */ 
   4048         /* format            SS_RST_BUS_IN_DATA_IVLANfmt */
   4049         /* nFields     */ 3,
   4050         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IVLAN_BCM56960_A0fmt_fields,
   4051         /* bits        */ 170,
   4052         /* flags       */ 0,
   4053     },
   4054 #endif /* chips */
   4055 
   4056 #if defined(BCM_56965_A0)
   4057     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IVLAN_BCM56965_A0fmt */ 
   4058         /* format            SS_RST_BUS_IN_DATA_IVLANfmt */
   4059         /* nFields     */ 3,
   4060         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IVLAN_BCM56960_A0fmt_fields,
   4061         /* bits        */ 170,
   4062         /* flags       */ 0,
   4063     },
   4064 #endif /* chips */
   4065 
   4066 #if defined(BCM_56970_A0)
   4067     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_DATA_IVLAN_BCM56970_A0fmt */ 
   4068         /* format            SS_RST_BUS_IN_DATA_IVLANfmt */
   4069         /* nFields     */ 3,
   4070         /* *fields     */ soc_SS_RST_BUS_IN_DATA_IVLAN_BCM56960_A0fmt_fields,
   4071         /* bits        */ 170,
   4072         /* flags       */ 0,
   4073     },
   4074 #endif /* chips */
   4075 
   4076 #if defined(BCM_56260_A0) || defined(BCM_56260_B0) || \
   4077     defined(BCM_56270_A0) || defined(BCM_56560_A0) || \
   4078     defined(BCM_56560_B0) || defined(BCM_56670_A0) || \
   4079     defined(BCM_56670_B0) || defined(BCM_56960_A0) || \
   4080     defined(BCM_56965_A0) || defined(BCM_56970_A0)
   4081     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_FPEMfmt */ 
   4082         /* format            SS_RST_BUS_IN_FPEMfmt */
   4083         /* nFields     */ 8,
   4084         /* *fields     */ soc_SS_RST_BUS_IN_FPEMfmt_fields,
   4085         /* bits        */ 356,
   4086         /* flags       */ 0,
   4087     },
   4088 #endif /* chips */
   4089 
   4090 #if defined(BCM_56850_A0) || defined(BCM_56860_A0)
   4091     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IL2LUfmt */ 
   4092         /* format            SS_RST_BUS_IN_IL2LUfmt */
   4093         /* nFields     */ 2,
   4094         /* *fields     */ soc_SS_RST_BUS_IN_IL2LUfmt_fields,
   4095         /* bits        */ 75,
   4096         /* flags       */ 0,
   4097     },
   4098 #endif /* chips */
   4099 
   4100 #if defined(BCM_56260_A0)
   4101     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IL2LU_BCM56260_A0fmt */ 
   4102         /* format            SS_RST_BUS_IN_IL2LUfmt */
   4103         /* nFields     */ 2,
   4104         /* *fields     */ soc_SS_RST_BUS_IN_IL2LU_BCM56960_A0fmt_fields,
   4105         /* bits        */ 75,
   4106         /* flags       */ 0,
   4107     },
   4108 #endif /* chips */
   4109 
   4110 #if defined(BCM_56260_B0)
   4111     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IL2LU_BCM56260_B0fmt */ 
   4112         /* format            SS_RST_BUS_IN_IL2LUfmt */
   4113         /* nFields     */ 2,
   4114         /* *fields     */ soc_SS_RST_BUS_IN_IL2LU_BCM56960_A0fmt_fields,
   4115         /* bits        */ 75,
   4116         /* flags       */ 0,
   4117     },
   4118 #endif /* chips */
   4119 
   4120 #if defined(BCM_56270_A0)
   4121     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IL2LU_BCM56270_A0fmt */ 
   4122         /* format            SS_RST_BUS_IN_IL2LUfmt */
   4123         /* nFields     */ 2,
   4124         /* *fields     */ soc_SS_RST_BUS_IN_IL2LU_BCM56960_A0fmt_fields,
   4125         /* bits        */ 75,
   4126         /* flags       */ 0,
   4127     },
   4128 #endif /* chips */
   4129 
   4130 #if defined(BCM_56560_A0)
   4131     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IL2LU_BCM56560_A0fmt */ 
   4132         /* format            SS_RST_BUS_IN_IL2LUfmt */
   4133         /* nFields     */ 2,
   4134         /* *fields     */ soc_SS_RST_BUS_IN_IL2LU_BCM56960_A0fmt_fields,
   4135         /* bits        */ 75,
   4136         /* flags       */ 0,
   4137     },
   4138 #endif /* chips */
   4139 
   4140 #if defined(BCM_56560_B0)
   4141     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IL2LU_BCM56560_B0fmt */ 
   4142         /* format            SS_RST_BUS_IN_IL2LUfmt */
   4143         /* nFields     */ 2,
   4144         /* *fields     */ soc_SS_RST_BUS_IN_IL2LU_BCM56960_A0fmt_fields,
   4145         /* bits        */ 75,
   4146         /* flags       */ 0,
   4147     },
   4148 #endif /* chips */
   4149 
   4150 #if defined(BCM_56670_A0)
   4151     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IL2LU_BCM56670_A0fmt */ 
   4152         /* format            SS_RST_BUS_IN_IL2LUfmt */
   4153         /* nFields     */ 2,
   4154         /* *fields     */ soc_SS_RST_BUS_IN_IL2LU_BCM56960_A0fmt_fields,
   4155         /* bits        */ 75,
   4156         /* flags       */ 0,
   4157     },
   4158 #endif /* chips */
   4159 
   4160 #if defined(BCM_56670_B0)
   4161     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IL2LU_BCM56670_B0fmt */ 
   4162         /* format            SS_RST_BUS_IN_IL2LUfmt */
   4163         /* nFields     */ 2,
   4164         /* *fields     */ soc_SS_RST_BUS_IN_IL2LU_BCM56960_A0fmt_fields,
   4165         /* bits        */ 75,
   4166         /* flags       */ 0,
   4167     },
   4168 #endif /* chips */
   4169 
   4170 #if defined(BCM_56960_A0)
   4171     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IL2LU_BCM56960_A0fmt */ 
   4172         /* format            SS_RST_BUS_IN_IL2LUfmt */
   4173         /* nFields     */ 2,
   4174         /* *fields     */ soc_SS_RST_BUS_IN_IL2LU_BCM56960_A0fmt_fields,
   4175         /* bits        */ 75,
   4176         /* flags       */ 0,
   4177     },
   4178 #endif /* chips */
   4179 
   4180 #if defined(BCM_56965_A0)
   4181     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IL2LU_BCM56965_A0fmt */ 
   4182         /* format            SS_RST_BUS_IN_IL2LUfmt */
   4183         /* nFields     */ 2,
   4184         /* *fields     */ soc_SS_RST_BUS_IN_IL2LU_BCM56960_A0fmt_fields,
   4185         /* bits        */ 75,
   4186         /* flags       */ 0,
   4187     },
   4188 #endif /* chips */
   4189 
   4190 #if defined(BCM_56970_A0)
   4191     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IL2LU_BCM56970_A0fmt */ 
   4192         /* format            SS_RST_BUS_IN_IL2LUfmt */
   4193         /* nFields     */ 2,
   4194         /* *fields     */ soc_SS_RST_BUS_IN_IL2LU_BCM56960_A0fmt_fields,
   4195         /* bits        */ 75,
   4196         /* flags       */ 0,
   4197     },
   4198 #endif /* chips */
   4199 
   4200 #if defined(BCM_56850_A0)
   4201     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IL3LUfmt */ 
   4202         /* format            SS_RST_BUS_IN_IL3LUfmt */
   4203         /* nFields     */ 8,
   4204         /* *fields     */ soc_SS_RST_BUS_IN_IL3LUfmt_fields,
   4205         /* bits        */ 329,
   4206         /* flags       */ 0,
   4207     },
   4208 #endif /* chips */
   4209 
   4210 #if defined(BCM_56260_A0)
   4211     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IL3LU_BCM56260_A0fmt */ 
   4212         /* format            SS_RST_BUS_IN_IL3LUfmt */
   4213         /* nFields     */ 8,
   4214         /* *fields     */ soc_SS_RST_BUS_IN_IL3LU_BCM56960_A0fmt_fields,
   4215         /* bits        */ 329,
   4216         /* flags       */ 0,
   4217     },
   4218 #endif /* chips */
   4219 
   4220 #if defined(BCM_56260_B0)
   4221     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IL3LU_BCM56260_B0fmt */ 
   4222         /* format            SS_RST_BUS_IN_IL3LUfmt */
   4223         /* nFields     */ 8,
   4224         /* *fields     */ soc_SS_RST_BUS_IN_IL3LU_BCM56960_A0fmt_fields,
   4225         /* bits        */ 329,
   4226         /* flags       */ 0,
   4227     },
   4228 #endif /* chips */
   4229 
   4230 #if defined(BCM_56270_A0)
   4231     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IL3LU_BCM56270_A0fmt */ 
   4232         /* format            SS_RST_BUS_IN_IL3LUfmt */
   4233         /* nFields     */ 8,
   4234         /* *fields     */ soc_SS_RST_BUS_IN_IL3LU_BCM56960_A0fmt_fields,
   4235         /* bits        */ 329,
   4236         /* flags       */ 0,
   4237     },
   4238 #endif /* chips */
   4239 
   4240 #if defined(BCM_56560_A0)
   4241     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IL3LU_BCM56560_A0fmt */ 
   4242         /* format            SS_RST_BUS_IN_IL3LUfmt */
   4243         /* nFields     */ 8,
   4244         /* *fields     */ soc_SS_RST_BUS_IN_IL3LU_BCM56560_A0fmt_fields,
   4245         /* bits        */ 330,
   4246         /* flags       */ 0,
   4247     },
   4248 #endif /* chips */
   4249 
   4250 #if defined(BCM_56560_B0)
   4251     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IL3LU_BCM56560_B0fmt */ 
   4252         /* format            SS_RST_BUS_IN_IL3LUfmt */
   4253         /* nFields     */ 8,
   4254         /* *fields     */ soc_SS_RST_BUS_IN_IL3LU_BCM56560_A0fmt_fields,
   4255         /* bits        */ 330,
   4256         /* flags       */ 0,
   4257     },
   4258 #endif /* chips */
   4259 
   4260 #if defined(BCM_56670_A0)
   4261     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IL3LU_BCM56670_A0fmt */ 
   4262         /* format            SS_RST_BUS_IN_IL3LUfmt */
   4263         /* nFields     */ 8,
   4264         /* *fields     */ soc_SS_RST_BUS_IN_IL3LU_BCM56560_A0fmt_fields,
   4265         /* bits        */ 330,
   4266         /* flags       */ 0,
   4267     },
   4268 #endif /* chips */
   4269 
   4270 #if defined(BCM_56670_B0)
   4271     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IL3LU_BCM56670_B0fmt */ 
   4272         /* format            SS_RST_BUS_IN_IL3LUfmt */
   4273         /* nFields     */ 8,
   4274         /* *fields     */ soc_SS_RST_BUS_IN_IL3LU_BCM56560_A0fmt_fields,
   4275         /* bits        */ 330,
   4276         /* flags       */ 0,
   4277     },
   4278 #endif /* chips */
   4279 
   4280 #if defined(BCM_56860_A0)
   4281     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IL3LU_BCM56860_A0fmt */ 
   4282         /* format            SS_RST_BUS_IN_IL3LUfmt */
   4283         /* nFields     */ 8,
   4284         /* *fields     */ soc_SS_RST_BUS_IN_IL3LU_BCM56860_A0fmt_fields,
   4285         /* bits        */ 330,
   4286         /* flags       */ 0,
   4287     },
   4288 #endif /* chips */
   4289 
   4290 #if defined(BCM_56960_A0)
   4291     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IL3LU_BCM56960_A0fmt */ 
   4292         /* format            SS_RST_BUS_IN_IL3LUfmt */
   4293         /* nFields     */ 8,
   4294         /* *fields     */ soc_SS_RST_BUS_IN_IL3LU_BCM56960_A0fmt_fields,
   4295         /* bits        */ 329,
   4296         /* flags       */ 0,
   4297     },
   4298 #endif /* chips */
   4299 
   4300 #if defined(BCM_56965_A0)
   4301     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IL3LU_BCM56965_A0fmt */ 
   4302         /* format            SS_RST_BUS_IN_IL3LUfmt */
   4303         /* nFields     */ 8,
   4304         /* *fields     */ soc_SS_RST_BUS_IN_IL3LU_BCM56960_A0fmt_fields,
   4305         /* bits        */ 329,
   4306         /* flags       */ 0,
   4307     },
   4308 #endif /* chips */
   4309 
   4310 #if defined(BCM_56970_A0)
   4311     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IL3LU_BCM56970_A0fmt */ 
   4312         /* format            SS_RST_BUS_IN_IL3LUfmt */
   4313         /* nFields     */ 8,
   4314         /* *fields     */ soc_SS_RST_BUS_IN_IL3LU_BCM56960_A0fmt_fields,
   4315         /* bits        */ 329,
   4316         /* flags       */ 0,
   4317     },
   4318 #endif /* chips */
   4319 
   4320 #if defined(BCM_56850_A0) || defined(BCM_56860_A0)
   4321     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_ILPMfmt */ 
   4322         /* format            SS_RST_BUS_IN_ILPMfmt */
   4323         /* nFields     */ 2,
   4324         /* *fields     */ soc_SS_RST_BUS_IN_ILPMfmt_fields,
   4325         /* bits        */ 136,
   4326         /* flags       */ 0,
   4327     },
   4328 #endif /* chips */
   4329 
   4330 #if defined(BCM_56260_A0)
   4331     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_ILPM_BCM56260_A0fmt */ 
   4332         /* format            SS_RST_BUS_IN_ILPMfmt */
   4333         /* nFields     */ 2,
   4334         /* *fields     */ soc_SS_RST_BUS_IN_ILPM_BCM56960_A0fmt_fields,
   4335         /* bits        */ 136,
   4336         /* flags       */ 0,
   4337     },
   4338 #endif /* chips */
   4339 
   4340 #if defined(BCM_56260_B0)
   4341     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_ILPM_BCM56260_B0fmt */ 
   4342         /* format            SS_RST_BUS_IN_ILPMfmt */
   4343         /* nFields     */ 2,
   4344         /* *fields     */ soc_SS_RST_BUS_IN_ILPM_BCM56960_A0fmt_fields,
   4345         /* bits        */ 136,
   4346         /* flags       */ 0,
   4347     },
   4348 #endif /* chips */
   4349 
   4350 #if defined(BCM_56270_A0)
   4351     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_ILPM_BCM56270_A0fmt */ 
   4352         /* format            SS_RST_BUS_IN_ILPMfmt */
   4353         /* nFields     */ 2,
   4354         /* *fields     */ soc_SS_RST_BUS_IN_ILPM_BCM56960_A0fmt_fields,
   4355         /* bits        */ 136,
   4356         /* flags       */ 0,
   4357     },
   4358 #endif /* chips */
   4359 
   4360 #if defined(BCM_56370_A0)
   4361     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_ILPM_BCM56370_A0fmt */ 
   4362         /* format            SS_RST_BUS_IN_ILPMfmt */
   4363         /* nFields     */ 2,
   4364         /* *fields     */ soc_SS_RST_BUS_IN_ILPM_BCM56960_A0fmt_fields,
   4365         /* bits        */ 136,
   4366         /* flags       */ 0,
   4367     },
   4368 #endif /* chips */
   4369 
   4370 #if defined(BCM_56560_A0)
   4371     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_ILPM_BCM56560_A0fmt */ 
   4372         /* format            SS_RST_BUS_IN_ILPMfmt */
   4373         /* nFields     */ 2,
   4374         /* *fields     */ soc_SS_RST_BUS_IN_ILPM_BCM56960_A0fmt_fields,
   4375         /* bits        */ 136,
   4376         /* flags       */ 0,
   4377     },
   4378 #endif /* chips */
   4379 
   4380 #if defined(BCM_56560_B0)
   4381     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_ILPM_BCM56560_B0fmt */ 
   4382         /* format            SS_RST_BUS_IN_ILPMfmt */
   4383         /* nFields     */ 2,
   4384         /* *fields     */ soc_SS_RST_BUS_IN_ILPM_BCM56960_A0fmt_fields,
   4385         /* bits        */ 136,
   4386         /* flags       */ 0,
   4387     },
   4388 #endif /* chips */
   4389 
   4390 #if defined(BCM_56670_A0)
   4391     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_ILPM_BCM56670_A0fmt */ 
   4392         /* format            SS_RST_BUS_IN_ILPMfmt */
   4393         /* nFields     */ 2,
   4394         /* *fields     */ soc_SS_RST_BUS_IN_ILPM_BCM56960_A0fmt_fields,
   4395         /* bits        */ 136,
   4396         /* flags       */ 0,
   4397     },
   4398 #endif /* chips */
   4399 
   4400 #if defined(BCM_56670_B0)
   4401     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_ILPM_BCM56670_B0fmt */ 
   4402         /* format            SS_RST_BUS_IN_ILPMfmt */
   4403         /* nFields     */ 2,
   4404         /* *fields     */ soc_SS_RST_BUS_IN_ILPM_BCM56960_A0fmt_fields,
   4405         /* bits        */ 136,
   4406         /* flags       */ 0,
   4407     },
   4408 #endif /* chips */
   4409 
   4410 #if defined(BCM_56770_A0)
   4411     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_ILPM_BCM56770_A0fmt */ 
   4412         /* format            SS_RST_BUS_IN_ILPMfmt */
   4413         /* nFields     */ 2,
   4414         /* *fields     */ soc_SS_RST_BUS_IN_ILPM_BCM56960_A0fmt_fields,
   4415         /* bits        */ 136,
   4416         /* flags       */ 0,
   4417     },
   4418 #endif /* chips */
   4419 
   4420 #if defined(BCM_56870_A0)
   4421     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_ILPM_BCM56870_A0fmt */ 
   4422         /* format            SS_RST_BUS_IN_ILPMfmt */
   4423         /* nFields     */ 2,
   4424         /* *fields     */ soc_SS_RST_BUS_IN_ILPM_BCM56960_A0fmt_fields,
   4425         /* bits        */ 136,
   4426         /* flags       */ 0,
   4427     },
   4428 #endif /* chips */
   4429 
   4430 #if defined(BCM_56960_A0)
   4431     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_ILPM_BCM56960_A0fmt */ 
   4432         /* format            SS_RST_BUS_IN_ILPMfmt */
   4433         /* nFields     */ 2,
   4434         /* *fields     */ soc_SS_RST_BUS_IN_ILPM_BCM56960_A0fmt_fields,
   4435         /* bits        */ 136,
   4436         /* flags       */ 0,
   4437     },
   4438 #endif /* chips */
   4439 
   4440 #if defined(BCM_56965_A0)
   4441     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_ILPM_BCM56965_A0fmt */ 
   4442         /* format            SS_RST_BUS_IN_ILPMfmt */
   4443         /* nFields     */ 2,
   4444         /* *fields     */ soc_SS_RST_BUS_IN_ILPM_BCM56960_A0fmt_fields,
   4445         /* bits        */ 136,
   4446         /* flags       */ 0,
   4447     },
   4448 #endif /* chips */
   4449 
   4450 #if defined(BCM_56970_A0)
   4451     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_ILPM_BCM56970_A0fmt */ 
   4452         /* format            SS_RST_BUS_IN_ILPMfmt */
   4453         /* nFields     */ 2,
   4454         /* *fields     */ soc_SS_RST_BUS_IN_ILPM_BCM56960_A0fmt_fields,
   4455         /* bits        */ 136,
   4456         /* flags       */ 0,
   4457     },
   4458 #endif /* chips */
   4459 
   4460 #if defined(BCM_56980_A0)
   4461     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_ILPM_BCM56980_A0fmt */ 
   4462         /* format            SS_RST_BUS_IN_ILPMfmt */
   4463         /* nFields     */ 4,
   4464         /* *fields     */ soc_SS_RST_BUS_IN_ILPM_BCM56980_A0fmt_fields,
   4465         /* bits        */ 128,
   4466         /* flags       */ 0,
   4467     },
   4468 #endif /* chips */
   4469 
   4470 #if defined(BCM_56980_B0)
   4471     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_ILPM_BCM56980_B0fmt */ 
   4472         /* format            SS_RST_BUS_IN_ILPMfmt */
   4473         /* nFields     */ 4,
   4474         /* *fields     */ soc_SS_RST_BUS_IN_ILPM_BCM56980_A0fmt_fields,
   4475         /* bits        */ 128,
   4476         /* flags       */ 0,
   4477     },
   4478 #endif /* chips */
   4479 
   4480 #if defined(BCM_56850_A0) || defined(BCM_56860_A0)
   4481     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IVLANfmt */ 
   4482         /* format            SS_RST_BUS_IN_IVLANfmt */
   4483         /* nFields     */ 2,
   4484         /* *fields     */ soc_SS_RST_BUS_IN_IVLANfmt_fields,
   4485         /* bits        */ 78,
   4486         /* flags       */ 0,
   4487     },
   4488 #endif /* chips */
   4489 
   4490 #if defined(BCM_56260_A0)
   4491     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IVLAN_BCM56260_A0fmt */ 
   4492         /* format            SS_RST_BUS_IN_IVLANfmt */
   4493         /* nFields     */ 2,
   4494         /* *fields     */ soc_SS_RST_BUS_IN_IVLAN_BCM56960_A0fmt_fields,
   4495         /* bits        */ 79,
   4496         /* flags       */ 0,
   4497     },
   4498 #endif /* chips */
   4499 
   4500 #if defined(BCM_56260_B0)
   4501     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IVLAN_BCM56260_B0fmt */ 
   4502         /* format            SS_RST_BUS_IN_IVLANfmt */
   4503         /* nFields     */ 2,
   4504         /* *fields     */ soc_SS_RST_BUS_IN_IVLAN_BCM56960_A0fmt_fields,
   4505         /* bits        */ 79,
   4506         /* flags       */ 0,
   4507     },
   4508 #endif /* chips */
   4509 
   4510 #if defined(BCM_56270_A0)
   4511     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IVLAN_BCM56270_A0fmt */ 
   4512         /* format            SS_RST_BUS_IN_IVLANfmt */
   4513         /* nFields     */ 2,
   4514         /* *fields     */ soc_SS_RST_BUS_IN_IVLAN_BCM56960_A0fmt_fields,
   4515         /* bits        */ 79,
   4516         /* flags       */ 0,
   4517     },
   4518 #endif /* chips */
   4519 
   4520 #if defined(BCM_56560_A0)
   4521     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IVLAN_BCM56560_A0fmt */ 
   4522         /* format            SS_RST_BUS_IN_IVLANfmt */
   4523         /* nFields     */ 3,
   4524         /* *fields     */ soc_SS_RST_BUS_IN_IVLAN_BCM56560_A0fmt_fields,
   4525         /* bits        */ 79,
   4526         /* flags       */ 0,
   4527     },
   4528 #endif /* chips */
   4529 
   4530 #if defined(BCM_56560_B0)
   4531     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IVLAN_BCM56560_B0fmt */ 
   4532         /* format            SS_RST_BUS_IN_IVLANfmt */
   4533         /* nFields     */ 3,
   4534         /* *fields     */ soc_SS_RST_BUS_IN_IVLAN_BCM56560_A0fmt_fields,
   4535         /* bits        */ 79,
   4536         /* flags       */ 0,
   4537     },
   4538 #endif /* chips */
   4539 
   4540 #if defined(BCM_56670_A0)
   4541     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IVLAN_BCM56670_A0fmt */ 
   4542         /* format            SS_RST_BUS_IN_IVLANfmt */
   4543         /* nFields     */ 3,
   4544         /* *fields     */ soc_SS_RST_BUS_IN_IVLAN_BCM56560_A0fmt_fields,
   4545         /* bits        */ 79,
   4546         /* flags       */ 0,
   4547     },
   4548 #endif /* chips */
   4549 
   4550 #if defined(BCM_56670_B0)
   4551     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IVLAN_BCM56670_B0fmt */ 
   4552         /* format            SS_RST_BUS_IN_IVLANfmt */
   4553         /* nFields     */ 3,
   4554         /* *fields     */ soc_SS_RST_BUS_IN_IVLAN_BCM56560_A0fmt_fields,
   4555         /* bits        */ 79,
   4556         /* flags       */ 0,
   4557     },
   4558 #endif /* chips */
   4559 
   4560 #if defined(BCM_56960_A0)
   4561     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IVLAN_BCM56960_A0fmt */ 
   4562         /* format            SS_RST_BUS_IN_IVLANfmt */
   4563         /* nFields     */ 2,
   4564         /* *fields     */ soc_SS_RST_BUS_IN_IVLAN_BCM56960_A0fmt_fields,
   4565         /* bits        */ 79,
   4566         /* flags       */ 0,
   4567     },
   4568 #endif /* chips */
   4569 
   4570 #if defined(BCM_56965_A0)
   4571     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IVLAN_BCM56965_A0fmt */ 
   4572         /* format            SS_RST_BUS_IN_IVLANfmt */
   4573         /* nFields     */ 2,
   4574         /* *fields     */ soc_SS_RST_BUS_IN_IVLAN_BCM56960_A0fmt_fields,
   4575         /* bits        */ 79,
   4576         /* flags       */ 0,
   4577     },
   4578 #endif /* chips */
   4579 
   4580 #if defined(BCM_56970_A0)
   4581     { /* SOC_FORMAT_INT_SS_RST_BUS_IN_IVLAN_BCM56970_A0fmt */ 
   4582         /* format            SS_RST_BUS_IN_IVLANfmt */
   4583         /* nFields     */ 2,
   4584         /* *fields     */ soc_SS_RST_BUS_IN_IVLAN_BCM56960_A0fmt_fields,
   4585         /* bits        */ 79,
   4586         /* flags       */ 0,
   4587     },
   4588 #endif /* chips */
   4589 
   4590 #if defined(BCM_56850_A0)
   4591     { /* SOC_FORMAT_INT_SS_RST_BUS_OUTfmt */ 
   4592         /* format            SS_RST_BUS_OUTfmt */
   4593         /* nFields     */ 10,
   4594         /* *fields     */ soc_SS_RST_BUS_OUTfmt_fields,
   4595         /* bits        */ 38,
   4596         /* flags       */ 0,
   4597     },
   4598 #endif /* chips */
   4599 
   4600 #if defined(BCM_56260_A0)
   4601     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_BCM56260_A0fmt */ 
   4602         /* format            SS_RST_BUS_OUTfmt */
   4603         /* nFields     */ 15,
   4604         /* *fields     */ soc_SS_RST_BUS_OUT_BCM56960_A0fmt_fields,
   4605         /* bits        */ 64,
   4606         /* flags       */ 0,
   4607     },
   4608 #endif /* chips */
   4609 
   4610 #if defined(BCM_56260_B0)
   4611     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_BCM56260_B0fmt */ 
   4612         /* format            SS_RST_BUS_OUTfmt */
   4613         /* nFields     */ 15,
   4614         /* *fields     */ soc_SS_RST_BUS_OUT_BCM56960_A0fmt_fields,
   4615         /* bits        */ 64,
   4616         /* flags       */ 0,
   4617     },
   4618 #endif /* chips */
   4619 
   4620 #if defined(BCM_56270_A0)
   4621     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_BCM56270_A0fmt */ 
   4622         /* format            SS_RST_BUS_OUTfmt */
   4623         /* nFields     */ 15,
   4624         /* *fields     */ soc_SS_RST_BUS_OUT_BCM56960_A0fmt_fields,
   4625         /* bits        */ 64,
   4626         /* flags       */ 0,
   4627     },
   4628 #endif /* chips */
   4629 
   4630 #if defined(BCM_56370_A0)
   4631     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_BCM56370_A0fmt */ 
   4632         /* format            SS_RST_BUS_OUTfmt */
   4633         /* nFields     */ 28,
   4634         /* *fields     */ soc_SS_RST_BUS_OUT_BCM56870_A0fmt_fields,
   4635         /* bits        */ 82,
   4636         /* flags       */ 0,
   4637     },
   4638 #endif /* chips */
   4639 
   4640 #if defined(BCM_56560_A0)
   4641     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_BCM56560_A0fmt */ 
   4642         /* format            SS_RST_BUS_OUTfmt */
   4643         /* nFields     */ 15,
   4644         /* *fields     */ soc_SS_RST_BUS_OUT_BCM56560_A0fmt_fields,
   4645         /* bits        */ 66,
   4646         /* flags       */ 0,
   4647     },
   4648 #endif /* chips */
   4649 
   4650 #if defined(BCM_56560_B0)
   4651     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_BCM56560_B0fmt */ 
   4652         /* format            SS_RST_BUS_OUTfmt */
   4653         /* nFields     */ 15,
   4654         /* *fields     */ soc_SS_RST_BUS_OUT_BCM56560_A0fmt_fields,
   4655         /* bits        */ 66,
   4656         /* flags       */ 0,
   4657     },
   4658 #endif /* chips */
   4659 
   4660 #if defined(BCM_56670_A0)
   4661     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_BCM56670_A0fmt */ 
   4662         /* format            SS_RST_BUS_OUTfmt */
   4663         /* nFields     */ 17,
   4664         /* *fields     */ soc_SS_RST_BUS_OUT_BCM56670_A0fmt_fields,
   4665         /* bits        */ 66,
   4666         /* flags       */ 0,
   4667     },
   4668 #endif /* chips */
   4669 
   4670 #if defined(BCM_56670_B0)
   4671     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_BCM56670_B0fmt */ 
   4672         /* format            SS_RST_BUS_OUTfmt */
   4673         /* nFields     */ 17,
   4674         /* *fields     */ soc_SS_RST_BUS_OUT_BCM56670_A0fmt_fields,
   4675         /* bits        */ 66,
   4676         /* flags       */ 0,
   4677     },
   4678 #endif /* chips */
   4679 
   4680 #if defined(BCM_56770_A0)
   4681     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_BCM56770_A0fmt */ 
   4682         /* format            SS_RST_BUS_OUTfmt */
   4683         /* nFields     */ 28,
   4684         /* *fields     */ soc_SS_RST_BUS_OUT_BCM56870_A0fmt_fields,
   4685         /* bits        */ 82,
   4686         /* flags       */ 0,
   4687     },
   4688 #endif /* chips */
   4689 
   4690 #if defined(BCM_56860_A0)
   4691     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_BCM56860_A0fmt */ 
   4692         /* format            SS_RST_BUS_OUTfmt */
   4693         /* nFields     */ 17,
   4694         /* *fields     */ soc_SS_RST_BUS_OUT_BCM56860_A0fmt_fields,
   4695         /* bits        */ 68,
   4696         /* flags       */ 0,
   4697     },
   4698 #endif /* chips */
   4699 
   4700 #if defined(BCM_56870_A0)
   4701     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_BCM56870_A0fmt */ 
   4702         /* format            SS_RST_BUS_OUTfmt */
   4703         /* nFields     */ 28,
   4704         /* *fields     */ soc_SS_RST_BUS_OUT_BCM56870_A0fmt_fields,
   4705         /* bits        */ 82,
   4706         /* flags       */ 0,
   4707     },
   4708 #endif /* chips */
   4709 
   4710 #if defined(BCM_56960_A0)
   4711     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_BCM56960_A0fmt */ 
   4712         /* format            SS_RST_BUS_OUTfmt */
   4713         /* nFields     */ 15,
   4714         /* *fields     */ soc_SS_RST_BUS_OUT_BCM56960_A0fmt_fields,
   4715         /* bits        */ 64,
   4716         /* flags       */ 0,
   4717     },
   4718 #endif /* chips */
   4719 
   4720 #if defined(BCM_56965_A0)
   4721     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_BCM56965_A0fmt */ 
   4722         /* format            SS_RST_BUS_OUTfmt */
   4723         /* nFields     */ 15,
   4724         /* *fields     */ soc_SS_RST_BUS_OUT_BCM56960_A0fmt_fields,
   4725         /* bits        */ 64,
   4726         /* flags       */ 0,
   4727     },
   4728 #endif /* chips */
   4729 
   4730 #if defined(BCM_56970_A0)
   4731     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_BCM56970_A0fmt */ 
   4732         /* format            SS_RST_BUS_OUTfmt */
   4733         /* nFields     */ 15,
   4734         /* *fields     */ soc_SS_RST_BUS_OUT_BCM56560_A0fmt_fields,
   4735         /* bits        */ 66,
   4736         /* flags       */ 0,
   4737     },
   4738 #endif /* chips */
   4739 
   4740 #if defined(BCM_56980_A0)
   4741     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_BCM56980_A0fmt */ 
   4742         /* format            SS_RST_BUS_OUTfmt */
   4743         /* nFields     */ 32,
   4744         /* *fields     */ soc_SS_RST_BUS_OUT_BCM56980_A0fmt_fields,
   4745         /* bits        */ 82,
   4746         /* flags       */ 0,
   4747     },
   4748 #endif /* chips */
   4749 
   4750 #if defined(BCM_56980_B0)
   4751     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_BCM56980_B0fmt */ 
   4752         /* format            SS_RST_BUS_OUTfmt */
   4753         /* nFields     */ 32,
   4754         /* *fields     */ soc_SS_RST_BUS_OUT_BCM56980_A0fmt_fields,
   4755         /* bits        */ 82,
   4756         /* flags       */ 0,
   4757     },
   4758 #endif /* chips */
   4759 
   4760 #if defined(BCM_56260_A0) || defined(BCM_56260_B0) || \
   4761     defined(BCM_56270_A0) || defined(BCM_56560_A0) || \
   4762     defined(BCM_56560_B0) || defined(BCM_56670_A0) || \
   4763     defined(BCM_56670_B0) || defined(BCM_56960_A0) || \
   4764     defined(BCM_56965_A0) || defined(BCM_56970_A0)
   4765     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_FPEMfmt */ 
   4766         /* format            SS_RST_BUS_OUT_FPEMfmt */
   4767         /* nFields     */ 1,
   4768         /* *fields     */ soc_SS_RST_BUS_OUT_FPEMfmt_fields,
   4769         /* bits        */ 420,
   4770         /* flags       */ 0,
   4771     },
   4772 #endif /* chips */
   4773 
   4774 #if defined(BCM_56850_A0)
   4775     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL2LUfmt */ 
   4776         /* format            SS_RST_BUS_OUT_IL2LUfmt */
   4777         /* nFields     */ 1,
   4778         /* *fields     */ soc_SS_RST_BUS_OUT_IL2LUfmt_fields,
   4779         /* bits        */ 105,
   4780         /* flags       */ 0,
   4781     },
   4782 #endif /* chips */
   4783 
   4784 #if defined(BCM_56260_A0)
   4785     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL2LU_BCM56260_A0fmt */ 
   4786         /* format            SS_RST_BUS_OUT_IL2LUfmt */
   4787         /* nFields     */ 1,
   4788         /* *fields     */ soc_SS_RST_BUS_OUT_IL2LU_BCM56960_A0fmt_fields,
   4789         /* bits        */ 113,
   4790         /* flags       */ 0,
   4791     },
   4792 #endif /* chips */
   4793 
   4794 #if defined(BCM_56260_B0)
   4795     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL2LU_BCM56260_B0fmt */ 
   4796         /* format            SS_RST_BUS_OUT_IL2LUfmt */
   4797         /* nFields     */ 1,
   4798         /* *fields     */ soc_SS_RST_BUS_OUT_IL2LU_BCM56960_A0fmt_fields,
   4799         /* bits        */ 113,
   4800         /* flags       */ 0,
   4801     },
   4802 #endif /* chips */
   4803 
   4804 #if defined(BCM_56270_A0)
   4805     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL2LU_BCM56270_A0fmt */ 
   4806         /* format            SS_RST_BUS_OUT_IL2LUfmt */
   4807         /* nFields     */ 1,
   4808         /* *fields     */ soc_SS_RST_BUS_OUT_IL2LU_BCM56960_A0fmt_fields,
   4809         /* bits        */ 113,
   4810         /* flags       */ 0,
   4811     },
   4812 #endif /* chips */
   4813 
   4814 #if defined(BCM_56560_A0)
   4815     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL2LU_BCM56560_A0fmt */ 
   4816         /* format            SS_RST_BUS_OUT_IL2LUfmt */
   4817         /* nFields     */ 1,
   4818         /* *fields     */ soc_SS_RST_BUS_OUT_IL2LU_BCM56960_A0fmt_fields,
   4819         /* bits        */ 113,
   4820         /* flags       */ 0,
   4821     },
   4822 #endif /* chips */
   4823 
   4824 #if defined(BCM_56560_B0)
   4825     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL2LU_BCM56560_B0fmt */ 
   4826         /* format            SS_RST_BUS_OUT_IL2LUfmt */
   4827         /* nFields     */ 1,
   4828         /* *fields     */ soc_SS_RST_BUS_OUT_IL2LU_BCM56960_A0fmt_fields,
   4829         /* bits        */ 113,
   4830         /* flags       */ 0,
   4831     },
   4832 #endif /* chips */
   4833 
   4834 #if defined(BCM_56670_A0)
   4835     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL2LU_BCM56670_A0fmt */ 
   4836         /* format            SS_RST_BUS_OUT_IL2LUfmt */
   4837         /* nFields     */ 1,
   4838         /* *fields     */ soc_SS_RST_BUS_OUT_IL2LU_BCM56960_A0fmt_fields,
   4839         /* bits        */ 113,
   4840         /* flags       */ 0,
   4841     },
   4842 #endif /* chips */
   4843 
   4844 #if defined(BCM_56670_B0)
   4845     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL2LU_BCM56670_B0fmt */ 
   4846         /* format            SS_RST_BUS_OUT_IL2LUfmt */
   4847         /* nFields     */ 1,
   4848         /* *fields     */ soc_SS_RST_BUS_OUT_IL2LU_BCM56960_A0fmt_fields,
   4849         /* bits        */ 113,
   4850         /* flags       */ 0,
   4851     },
   4852 #endif /* chips */
   4853 
   4854 #if defined(BCM_56860_A0)
   4855     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL2LU_BCM56860_A0fmt */ 
   4856         /* format            SS_RST_BUS_OUT_IL2LUfmt */
   4857         /* nFields     */ 1,
   4858         /* *fields     */ soc_SS_RST_BUS_OUT_IL2LU_BCM56860_A0fmt_fields,
   4859         /* bits        */ 113,
   4860         /* flags       */ 0,
   4861     },
   4862 #endif /* chips */
   4863 
   4864 #if defined(BCM_56960_A0)
   4865     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL2LU_BCM56960_A0fmt */ 
   4866         /* format            SS_RST_BUS_OUT_IL2LUfmt */
   4867         /* nFields     */ 1,
   4868         /* *fields     */ soc_SS_RST_BUS_OUT_IL2LU_BCM56960_A0fmt_fields,
   4869         /* bits        */ 113,
   4870         /* flags       */ 0,
   4871     },
   4872 #endif /* chips */
   4873 
   4874 #if defined(BCM_56965_A0)
   4875     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL2LU_BCM56965_A0fmt */ 
   4876         /* format            SS_RST_BUS_OUT_IL2LUfmt */
   4877         /* nFields     */ 1,
   4878         /* *fields     */ soc_SS_RST_BUS_OUT_IL2LU_BCM56960_A0fmt_fields,
   4879         /* bits        */ 113,
   4880         /* flags       */ 0,
   4881     },
   4882 #endif /* chips */
   4883 
   4884 #if defined(BCM_56970_A0)
   4885     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL2LU_BCM56970_A0fmt */ 
   4886         /* format            SS_RST_BUS_OUT_IL2LUfmt */
   4887         /* nFields     */ 1,
   4888         /* *fields     */ soc_SS_RST_BUS_OUT_IL2LU_BCM56960_A0fmt_fields,
   4889         /* bits        */ 113,
   4890         /* flags       */ 0,
   4891     },
   4892 #endif /* chips */
   4893 
   4894 #if defined(BCM_56850_A0)
   4895     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL3LUfmt */ 
   4896         /* format            SS_RST_BUS_OUT_IL3LUfmt */
   4897         /* nFields     */ 1,
   4898         /* *fields     */ soc_SS_RST_BUS4_C_MODELfmt_fields,
   4899         /* bits        */ 420,
   4900         /* flags       */ 0,
   4901     },
   4902 #endif /* chips */
   4903 
   4904 #if defined(BCM_56260_A0)
   4905     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL3LU_BCM56260_A0fmt */ 
   4906         /* format            SS_RST_BUS_OUT_IL3LUfmt */
   4907         /* nFields     */ 1,
   4908         /* *fields     */ soc_SS_RST_BUS_OUT_FPEMfmt_fields,
   4909         /* bits        */ 420,
   4910         /* flags       */ 0,
   4911     },
   4912 #endif /* chips */
   4913 
   4914 #if defined(BCM_56260_B0)
   4915     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL3LU_BCM56260_B0fmt */ 
   4916         /* format            SS_RST_BUS_OUT_IL3LUfmt */
   4917         /* nFields     */ 1,
   4918         /* *fields     */ soc_SS_RST_BUS_OUT_FPEMfmt_fields,
   4919         /* bits        */ 420,
   4920         /* flags       */ 0,
   4921     },
   4922 #endif /* chips */
   4923 
   4924 #if defined(BCM_56270_A0)
   4925     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL3LU_BCM56270_A0fmt */ 
   4926         /* format            SS_RST_BUS_OUT_IL3LUfmt */
   4927         /* nFields     */ 1,
   4928         /* *fields     */ soc_SS_RST_BUS_OUT_FPEMfmt_fields,
   4929         /* bits        */ 420,
   4930         /* flags       */ 0,
   4931     },
   4932 #endif /* chips */
   4933 
   4934 #if defined(BCM_56560_A0)
   4935     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL3LU_BCM56560_A0fmt */ 
   4936         /* format            SS_RST_BUS_OUT_IL3LUfmt */
   4937         /* nFields     */ 1,
   4938         /* *fields     */ soc_SS_RST_BUS_OUT_FPEMfmt_fields,
   4939         /* bits        */ 420,
   4940         /* flags       */ 0,
   4941     },
   4942 #endif /* chips */
   4943 
   4944 #if defined(BCM_56560_B0)
   4945     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL3LU_BCM56560_B0fmt */ 
   4946         /* format            SS_RST_BUS_OUT_IL3LUfmt */
   4947         /* nFields     */ 1,
   4948         /* *fields     */ soc_SS_RST_BUS_OUT_FPEMfmt_fields,
   4949         /* bits        */ 420,
   4950         /* flags       */ 0,
   4951     },
   4952 #endif /* chips */
   4953 
   4954 #if defined(BCM_56670_A0)
   4955     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL3LU_BCM56670_A0fmt */ 
   4956         /* format            SS_RST_BUS_OUT_IL3LUfmt */
   4957         /* nFields     */ 1,
   4958         /* *fields     */ soc_SS_RST_BUS_OUT_IL3LUfmt_fields,
   4959         /* bits        */ 372,
   4960         /* flags       */ 0,
   4961     },
   4962 #endif /* chips */
   4963 
   4964 #if defined(BCM_56670_B0)
   4965     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL3LU_BCM56670_B0fmt */ 
   4966         /* format            SS_RST_BUS_OUT_IL3LUfmt */
   4967         /* nFields     */ 1,
   4968         /* *fields     */ soc_SS_RST_BUS_OUT_IL3LUfmt_fields,
   4969         /* bits        */ 372,
   4970         /* flags       */ 0,
   4971     },
   4972 #endif /* chips */
   4973 
   4974 #if defined(BCM_56860_A0)
   4975     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL3LU_BCM56860_A0fmt */ 
   4976         /* format            SS_RST_BUS_OUT_IL3LUfmt */
   4977         /* nFields     */ 1,
   4978         /* *fields     */ soc_SS_RST_BUS4_C_MODELfmt_fields,
   4979         /* bits        */ 420,
   4980         /* flags       */ 0,
   4981     },
   4982 #endif /* chips */
   4983 
   4984 #if defined(BCM_56960_A0)
   4985     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL3LU_BCM56960_A0fmt */ 
   4986         /* format            SS_RST_BUS_OUT_IL3LUfmt */
   4987         /* nFields     */ 1,
   4988         /* *fields     */ soc_SS_RST_BUS_OUT_FPEMfmt_fields,
   4989         /* bits        */ 420,
   4990         /* flags       */ 0,
   4991     },
   4992 #endif /* chips */
   4993 
   4994 #if defined(BCM_56965_A0)
   4995     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL3LU_BCM56965_A0fmt */ 
   4996         /* format            SS_RST_BUS_OUT_IL3LUfmt */
   4997         /* nFields     */ 1,
   4998         /* *fields     */ soc_SS_RST_BUS_OUT_FPEMfmt_fields,
   4999         /* bits        */ 420,
   5000         /* flags       */ 0,
   5001     },
   5002 #endif /* chips */
   5003 
   5004 #if defined(BCM_56970_A0)
   5005     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IL3LU_BCM56970_A0fmt */ 
   5006         /* format            SS_RST_BUS_OUT_IL3LUfmt */
   5007         /* nFields     */ 1,
   5008         /* *fields     */ soc_SS_RST_BUS_OUT_FPEMfmt_fields,
   5009         /* bits        */ 420,
   5010         /* flags       */ 0,
   5011     },
   5012 #endif /* chips */
   5013 
   5014 #if defined(BCM_56850_A0)
   5015     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_ILPMfmt */ 
   5016         /* format            SS_RST_BUS_OUT_ILPMfmt */
   5017         /* nFields     */ 1,
   5018         /* *fields     */ soc_SS_RST_BUS4fmt_fields,
   5019         /* bits        */ 210,
   5020         /* flags       */ 0,
   5021     },
   5022 #endif /* chips */
   5023 
   5024 #if defined(BCM_56260_A0)
   5025     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_ILPM_BCM56260_A0fmt */ 
   5026         /* format            SS_RST_BUS_OUT_ILPMfmt */
   5027         /* nFields     */ 1,
   5028         /* *fields     */ soc_SS_RST_BUS_OUT_ILPMfmt_fields,
   5029         /* bits        */ 210,
   5030         /* flags       */ 0,
   5031     },
   5032 #endif /* chips */
   5033 
   5034 #if defined(BCM_56260_B0)
   5035     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_ILPM_BCM56260_B0fmt */ 
   5036         /* format            SS_RST_BUS_OUT_ILPMfmt */
   5037         /* nFields     */ 1,
   5038         /* *fields     */ soc_SS_RST_BUS_OUT_ILPMfmt_fields,
   5039         /* bits        */ 210,
   5040         /* flags       */ 0,
   5041     },
   5042 #endif /* chips */
   5043 
   5044 #if defined(BCM_56270_A0)
   5045     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_ILPM_BCM56270_A0fmt */ 
   5046         /* format            SS_RST_BUS_OUT_ILPMfmt */
   5047         /* nFields     */ 1,
   5048         /* *fields     */ soc_SS_RST_BUS_OUT_ILPMfmt_fields,
   5049         /* bits        */ 210,
   5050         /* flags       */ 0,
   5051     },
   5052 #endif /* chips */
   5053 
   5054 #if defined(BCM_56370_A0)
   5055     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_ILPM_BCM56370_A0fmt */ 
   5056         /* format            SS_RST_BUS_OUT_ILPMfmt */
   5057         /* nFields     */ 1,
   5058         /* *fields     */ soc_SS_RST_BUS_OUT_ILPM_BCM56870_A0fmt_fields,
   5059         /* bits        */ 216,
   5060         /* flags       */ 0,
   5061     },
   5062 #endif /* chips */
   5063 
   5064 #if defined(BCM_56560_A0)
   5065     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_ILPM_BCM56560_A0fmt */ 
   5066         /* format            SS_RST_BUS_OUT_ILPMfmt */
   5067         /* nFields     */ 1,
   5068         /* *fields     */ soc_SS_RST_BUS_OUT_ILPMfmt_fields,
   5069         /* bits        */ 210,
   5070         /* flags       */ 0,
   5071     },
   5072 #endif /* chips */
   5073 
   5074 #if defined(BCM_56560_B0)
   5075     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_ILPM_BCM56560_B0fmt */ 
   5076         /* format            SS_RST_BUS_OUT_ILPMfmt */
   5077         /* nFields     */ 1,
   5078         /* *fields     */ soc_SS_RST_BUS_OUT_ILPMfmt_fields,
   5079         /* bits        */ 210,
   5080         /* flags       */ 0,
   5081     },
   5082 #endif /* chips */
   5083 
   5084 #if defined(BCM_56670_A0)
   5085     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_ILPM_BCM56670_A0fmt */ 
   5086         /* format            SS_RST_BUS_OUT_ILPMfmt */
   5087         /* nFields     */ 1,
   5088         /* *fields     */ soc_SS_RST_BUS_OUT_ILPMfmt_fields,
   5089         /* bits        */ 210,
   5090         /* flags       */ 0,
   5091     },
   5092 #endif /* chips */
   5093 
   5094 #if defined(BCM_56670_B0)
   5095     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_ILPM_BCM56670_B0fmt */ 
   5096         /* format            SS_RST_BUS_OUT_ILPMfmt */
   5097         /* nFields     */ 1,
   5098         /* *fields     */ soc_SS_RST_BUS_OUT_ILPMfmt_fields,
   5099         /* bits        */ 210,
   5100         /* flags       */ 0,
   5101     },
   5102 #endif /* chips */
   5103 
   5104 #if defined(BCM_56770_A0)
   5105     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_ILPM_BCM56770_A0fmt */ 
   5106         /* format            SS_RST_BUS_OUT_ILPMfmt */
   5107         /* nFields     */ 1,
   5108         /* *fields     */ soc_SS_RST_BUS_OUT_ILPM_BCM56870_A0fmt_fields,
   5109         /* bits        */ 216,
   5110         /* flags       */ 0,
   5111     },
   5112 #endif /* chips */
   5113 
   5114 #if defined(BCM_56860_A0)
   5115     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_ILPM_BCM56860_A0fmt */ 
   5116         /* format            SS_RST_BUS_OUT_ILPMfmt */
   5117         /* nFields     */ 1,
   5118         /* *fields     */ soc_SS_RST_BUS4fmt_fields,
   5119         /* bits        */ 210,
   5120         /* flags       */ 0,
   5121     },
   5122 #endif /* chips */
   5123 
   5124 #if defined(BCM_56870_A0)
   5125     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_ILPM_BCM56870_A0fmt */ 
   5126         /* format            SS_RST_BUS_OUT_ILPMfmt */
   5127         /* nFields     */ 1,
   5128         /* *fields     */ soc_SS_RST_BUS_OUT_ILPM_BCM56870_A0fmt_fields,
   5129         /* bits        */ 216,
   5130         /* flags       */ 0,
   5131     },
   5132 #endif /* chips */
   5133 
   5134 #if defined(BCM_56960_A0)
   5135     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_ILPM_BCM56960_A0fmt */ 
   5136         /* format            SS_RST_BUS_OUT_ILPMfmt */
   5137         /* nFields     */ 1,
   5138         /* *fields     */ soc_SS_RST_BUS_OUT_ILPMfmt_fields,
   5139         /* bits        */ 210,
   5140         /* flags       */ 0,
   5141     },
   5142 #endif /* chips */
   5143 
   5144 #if defined(BCM_56965_A0)
   5145     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_ILPM_BCM56965_A0fmt */ 
   5146         /* format            SS_RST_BUS_OUT_ILPMfmt */
   5147         /* nFields     */ 1,
   5148         /* *fields     */ soc_SS_RST_BUS_OUT_ILPMfmt_fields,
   5149         /* bits        */ 210,
   5150         /* flags       */ 0,
   5151     },
   5152 #endif /* chips */
   5153 
   5154 #if defined(BCM_56970_A0)
   5155     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_ILPM_BCM56970_A0fmt */ 
   5156         /* format            SS_RST_BUS_OUT_ILPMfmt */
   5157         /* nFields     */ 1,
   5158         /* *fields     */ soc_SS_RST_BUS_OUT_ILPMfmt_fields,
   5159         /* bits        */ 210,
   5160         /* flags       */ 0,
   5161     },
   5162 #endif /* chips */
   5163 
   5164 #if defined(BCM_56980_A0)
   5165     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_ILPM_BCM56980_A0fmt */ 
   5166         /* format            SS_RST_BUS_OUT_ILPMfmt */
   5167         /* nFields     */ 1,
   5168         /* *fields     */ soc_SS_RST_BUS_OUT_ILPM_BCM56980_A0fmt_fields,
   5169         /* bits        */ 480,
   5170         /* flags       */ 0,
   5171     },
   5172 #endif /* chips */
   5173 
   5174 #if defined(BCM_56980_B0)
   5175     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_ILPM_BCM56980_B0fmt */ 
   5176         /* format            SS_RST_BUS_OUT_ILPMfmt */
   5177         /* nFields     */ 1,
   5178         /* *fields     */ soc_SS_RST_BUS_OUT_ILPM_BCM56980_A0fmt_fields,
   5179         /* bits        */ 480,
   5180         /* flags       */ 0,
   5181     },
   5182 #endif /* chips */
   5183 
   5184 #if defined(BCM_56850_A0)
   5185     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IVLANfmt */ 
   5186         /* format            SS_RST_BUS_OUT_IVLANfmt */
   5187         /* nFields     */ 1,
   5188         /* *fields     */ soc_SS_RST_BUS_OUT_IVLANfmt_fields,
   5189         /* bits        */ 170,
   5190         /* flags       */ 0,
   5191     },
   5192 #endif /* chips */
   5193 
   5194 #if defined(BCM_56260_A0)
   5195     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IVLAN_BCM56260_A0fmt */ 
   5196         /* format            SS_RST_BUS_OUT_IVLANfmt */
   5197         /* nFields     */ 1,
   5198         /* *fields     */ soc_SS_RST_BUS_OUT_IVLAN_BCM56960_A0fmt_fields,
   5199         /* bits        */ 170,
   5200         /* flags       */ 0,
   5201     },
   5202 #endif /* chips */
   5203 
   5204 #if defined(BCM_56260_B0)
   5205     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IVLAN_BCM56260_B0fmt */ 
   5206         /* format            SS_RST_BUS_OUT_IVLANfmt */
   5207         /* nFields     */ 1,
   5208         /* *fields     */ soc_SS_RST_BUS_OUT_IVLAN_BCM56960_A0fmt_fields,
   5209         /* bits        */ 170,
   5210         /* flags       */ 0,
   5211     },
   5212 #endif /* chips */
   5213 
   5214 #if defined(BCM_56270_A0)
   5215     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IVLAN_BCM56270_A0fmt */ 
   5216         /* format            SS_RST_BUS_OUT_IVLANfmt */
   5217         /* nFields     */ 1,
   5218         /* *fields     */ soc_SS_RST_BUS_OUT_IVLAN_BCM56960_A0fmt_fields,
   5219         /* bits        */ 170,
   5220         /* flags       */ 0,
   5221     },
   5222 #endif /* chips */
   5223 
   5224 #if defined(BCM_56560_A0)
   5225     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IVLAN_BCM56560_A0fmt */ 
   5226         /* format            SS_RST_BUS_OUT_IVLANfmt */
   5227         /* nFields     */ 1,
   5228         /* *fields     */ soc_SS_RST_BUS_OUT_IVLAN_BCM56560_A0fmt_fields,
   5229         /* bits        */ 209,
   5230         /* flags       */ 0,
   5231     },
   5232 #endif /* chips */
   5233 
   5234 #if defined(BCM_56560_B0)
   5235     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IVLAN_BCM56560_B0fmt */ 
   5236         /* format            SS_RST_BUS_OUT_IVLANfmt */
   5237         /* nFields     */ 1,
   5238         /* *fields     */ soc_SS_RST_BUS_OUT_IVLAN_BCM56560_A0fmt_fields,
   5239         /* bits        */ 209,
   5240         /* flags       */ 0,
   5241     },
   5242 #endif /* chips */
   5243 
   5244 #if defined(BCM_56670_A0)
   5245     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IVLAN_BCM56670_A0fmt */ 
   5246         /* format            SS_RST_BUS_OUT_IVLANfmt */
   5247         /* nFields     */ 1,
   5248         /* *fields     */ soc_SS_RST_BUS_OUT_IVLAN_BCM56560_A0fmt_fields,
   5249         /* bits        */ 209,
   5250         /* flags       */ 0,
   5251     },
   5252 #endif /* chips */
   5253 
   5254 #if defined(BCM_56670_B0)
   5255     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IVLAN_BCM56670_B0fmt */ 
   5256         /* format            SS_RST_BUS_OUT_IVLANfmt */
   5257         /* nFields     */ 1,
   5258         /* *fields     */ soc_SS_RST_BUS_OUT_IVLAN_BCM56560_A0fmt_fields,
   5259         /* bits        */ 209,
   5260         /* flags       */ 0,
   5261     },
   5262 #endif /* chips */
   5263 
   5264 #if defined(BCM_56860_A0)
   5265     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IVLAN_BCM56860_A0fmt */ 
   5266         /* format            SS_RST_BUS_OUT_IVLANfmt */
   5267         /* nFields     */ 1,
   5268         /* *fields     */ soc_SS_RST_BUS_OUT_IVLAN_BCM56860_A0fmt_fields,
   5269         /* bits        */ 192,
   5270         /* flags       */ 0,
   5271     },
   5272 #endif /* chips */
   5273 
   5274 #if defined(BCM_56960_A0)
   5275     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IVLAN_BCM56960_A0fmt */ 
   5276         /* format            SS_RST_BUS_OUT_IVLANfmt */
   5277         /* nFields     */ 1,
   5278         /* *fields     */ soc_SS_RST_BUS_OUT_IVLAN_BCM56960_A0fmt_fields,
   5279         /* bits        */ 170,
   5280         /* flags       */ 0,
   5281     },
   5282 #endif /* chips */
   5283 
   5284 #if defined(BCM_56965_A0)
   5285     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IVLAN_BCM56965_A0fmt */ 
   5286         /* format            SS_RST_BUS_OUT_IVLANfmt */
   5287         /* nFields     */ 1,
   5288         /* *fields     */ soc_SS_RST_BUS_OUT_IVLAN_BCM56960_A0fmt_fields,
   5289         /* bits        */ 170,
   5290         /* flags       */ 0,
   5291     },
   5292 #endif /* chips */
   5293 
   5294 #if defined(BCM_56970_A0)
   5295     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_IVLAN_BCM56970_A0fmt */ 
   5296         /* format            SS_RST_BUS_OUT_IVLANfmt */
   5297         /* nFields     */ 1,
   5298         /* *fields     */ soc_SS_RST_BUS_OUT_IVLAN_BCM56960_A0fmt_fields,
   5299         /* bits        */ 170,
   5300         /* flags       */ 0,
   5301     },
   5302 #endif /* chips */
   5303 
   5304 #if defined(BCM_56980_A0) || defined(BCM_56980_B0)
   5305     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_LPMfmt */ 
   5306         /* format            SS_RST_BUS_OUT_LPMfmt */
   5307         /* nFields     */ 32,
   5308         /* *fields     */ soc_SS_RST_BUS_OUT_LPMfmt_fields,
   5309         /* bits        */ 70,
   5310         /* flags       */ 0,
   5311     },
   5312 #endif /* chips */
   5313 
   5314 #if defined(BCM_56260_A0) || defined(BCM_56260_B0) || \
   5315     defined(BCM_56270_A0) || defined(BCM_56560_A0) || \
   5316     defined(BCM_56560_B0) || defined(BCM_56670_A0) || \
   5317     defined(BCM_56670_B0) || defined(BCM_56960_A0) || \
   5318     defined(BCM_56965_A0) || defined(BCM_56970_A0)
   5319     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_FPEMfmt */ 
   5320         /* format            SS_RST_BUS_OUT_SEARCH_FPEMfmt */
   5321         /* nFields     */ 1,
   5322         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_FPEMfmt_fields,
   5323         /* bits        */ 84,
   5324         /* flags       */ 0,
   5325     },
   5326 #endif /* chips */
   5327 
   5328 #if defined(BCM_56370_A0)
   5329     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_FPEM_BCM56370_A0fmt */ 
   5330         /* format            SS_RST_BUS_OUT_SEARCH_FPEMfmt */
   5331         /* nFields     */ 1,
   5332         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_FPEM_BCM56870_A0fmt_fields,
   5333         /* bits        */ 432,
   5334         /* flags       */ 0,
   5335     },
   5336 #endif /* chips */
   5337 
   5338 #if defined(BCM_56770_A0)
   5339     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_FPEM_BCM56770_A0fmt */ 
   5340         /* format            SS_RST_BUS_OUT_SEARCH_FPEMfmt */
   5341         /* nFields     */ 1,
   5342         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_FPEM_BCM56870_A0fmt_fields,
   5343         /* bits        */ 432,
   5344         /* flags       */ 0,
   5345     },
   5346 #endif /* chips */
   5347 
   5348 #if defined(BCM_56870_A0)
   5349     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_FPEM_BCM56870_A0fmt */ 
   5350         /* format            SS_RST_BUS_OUT_SEARCH_FPEMfmt */
   5351         /* nFields     */ 1,
   5352         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_FPEM_BCM56870_A0fmt_fields,
   5353         /* bits        */ 432,
   5354         /* flags       */ 0,
   5355     },
   5356 #endif /* chips */
   5357 
   5358 #if defined(BCM_56980_A0)
   5359     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_FPEM_BCM56980_A0fmt */ 
   5360         /* format            SS_RST_BUS_OUT_SEARCH_FPEMfmt */
   5361         /* nFields     */ 1,
   5362         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_FPEM_BCM56870_A0fmt_fields,
   5363         /* bits        */ 432,
   5364         /* flags       */ 0,
   5365     },
   5366 #endif /* chips */
   5367 
   5368 #if defined(BCM_56980_B0)
   5369     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_FPEM_BCM56980_B0fmt */ 
   5370         /* format            SS_RST_BUS_OUT_SEARCH_FPEMfmt */
   5371         /* nFields     */ 1,
   5372         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_FPEM_BCM56870_A0fmt_fields,
   5373         /* bits        */ 432,
   5374         /* flags       */ 0,
   5375     },
   5376 #endif /* chips */
   5377 
   5378 #if defined(BCM_56850_A0) || defined(BCM_56860_A0)
   5379     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IL2LUfmt */ 
   5380         /* format            SS_RST_BUS_OUT_SEARCH_IL2LUfmt */
   5381         /* nFields     */ 1,
   5382         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IL2LUfmt_fields,
   5383         /* bits        */ 52,
   5384         /* flags       */ 0,
   5385     },
   5386 #endif /* chips */
   5387 
   5388 #if defined(BCM_56260_A0)
   5389     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IL2LU_BCM56260_A0fmt */ 
   5390         /* format            SS_RST_BUS_OUT_SEARCH_IL2LUfmt */
   5391         /* nFields     */ 1,
   5392         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IL2LU_BCM56960_A0fmt_fields,
   5393         /* bits        */ 52,
   5394         /* flags       */ 0,
   5395     },
   5396 #endif /* chips */
   5397 
   5398 #if defined(BCM_56260_B0)
   5399     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IL2LU_BCM56260_B0fmt */ 
   5400         /* format            SS_RST_BUS_OUT_SEARCH_IL2LUfmt */
   5401         /* nFields     */ 1,
   5402         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IL2LU_BCM56960_A0fmt_fields,
   5403         /* bits        */ 52,
   5404         /* flags       */ 0,
   5405     },
   5406 #endif /* chips */
   5407 
   5408 #if defined(BCM_56270_A0)
   5409     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IL2LU_BCM56270_A0fmt */ 
   5410         /* format            SS_RST_BUS_OUT_SEARCH_IL2LUfmt */
   5411         /* nFields     */ 1,
   5412         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IL2LU_BCM56960_A0fmt_fields,
   5413         /* bits        */ 52,
   5414         /* flags       */ 0,
   5415     },
   5416 #endif /* chips */
   5417 
   5418 #if defined(BCM_56560_A0)
   5419     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IL2LU_BCM56560_A0fmt */ 
   5420         /* format            SS_RST_BUS_OUT_SEARCH_IL2LUfmt */
   5421         /* nFields     */ 1,
   5422         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IL2LU_BCM56960_A0fmt_fields,
   5423         /* bits        */ 52,
   5424         /* flags       */ 0,
   5425     },
   5426 #endif /* chips */
   5427 
   5428 #if defined(BCM_56560_B0)
   5429     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IL2LU_BCM56560_B0fmt */ 
   5430         /* format            SS_RST_BUS_OUT_SEARCH_IL2LUfmt */
   5431         /* nFields     */ 1,
   5432         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IL2LU_BCM56960_A0fmt_fields,
   5433         /* bits        */ 52,
   5434         /* flags       */ 0,
   5435     },
   5436 #endif /* chips */
   5437 
   5438 #if defined(BCM_56670_A0)
   5439     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IL2LU_BCM56670_A0fmt */ 
   5440         /* format            SS_RST_BUS_OUT_SEARCH_IL2LUfmt */
   5441         /* nFields     */ 1,
   5442         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IL2LU_BCM56960_A0fmt_fields,
   5443         /* bits        */ 52,
   5444         /* flags       */ 0,
   5445     },
   5446 #endif /* chips */
   5447 
   5448 #if defined(BCM_56670_B0)
   5449     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IL2LU_BCM56670_B0fmt */ 
   5450         /* format            SS_RST_BUS_OUT_SEARCH_IL2LUfmt */
   5451         /* nFields     */ 1,
   5452         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IL2LU_BCM56960_A0fmt_fields,
   5453         /* bits        */ 52,
   5454         /* flags       */ 0,
   5455     },
   5456 #endif /* chips */
   5457 
   5458 #if defined(BCM_56960_A0)
   5459     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IL2LU_BCM56960_A0fmt */ 
   5460         /* format            SS_RST_BUS_OUT_SEARCH_IL2LUfmt */
   5461         /* nFields     */ 1,
   5462         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IL2LU_BCM56960_A0fmt_fields,
   5463         /* bits        */ 52,
   5464         /* flags       */ 0,
   5465     },
   5466 #endif /* chips */
   5467 
   5468 #if defined(BCM_56965_A0)
   5469     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IL2LU_BCM56965_A0fmt */ 
   5470         /* format            SS_RST_BUS_OUT_SEARCH_IL2LUfmt */
   5471         /* nFields     */ 1,
   5472         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IL2LU_BCM56960_A0fmt_fields,
   5473         /* bits        */ 52,
   5474         /* flags       */ 0,
   5475     },
   5476 #endif /* chips */
   5477 
   5478 #if defined(BCM_56970_A0)
   5479     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IL2LU_BCM56970_A0fmt */ 
   5480         /* format            SS_RST_BUS_OUT_SEARCH_IL2LUfmt */
   5481         /* nFields     */ 1,
   5482         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IL2LU_BCM56960_A0fmt_fields,
   5483         /* bits        */ 52,
   5484         /* flags       */ 0,
   5485     },
   5486 #endif /* chips */
   5487 
   5488 #if defined(BCM_56850_A0) || defined(BCM_56860_A0)
   5489     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IL3LUfmt */ 
   5490         /* format            SS_RST_BUS_OUT_SEARCH_IL3LUfmt */
   5491         /* nFields     */ 1,
   5492         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IL3LUfmt_fields,
   5493         /* bits        */ 146,
   5494         /* flags       */ 0,
   5495     },
   5496 #endif /* chips */
   5497 
   5498 #if defined(BCM_56260_A0)
   5499     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IL3LU_BCM56260_A0fmt */ 
   5500         /* format            SS_RST_BUS_OUT_SEARCH_IL3LUfmt */
   5501         /* nFields     */ 1,
   5502         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IL3LU_BCM56960_A0fmt_fields,
   5503         /* bits        */ 146,
   5504         /* flags       */ 0,
   5505     },
   5506 #endif /* chips */
   5507 
   5508 #if defined(BCM_56260_B0)
   5509     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IL3LU_BCM56260_B0fmt */ 
   5510         /* format            SS_RST_BUS_OUT_SEARCH_IL3LUfmt */
   5511         /* nFields     */ 1,
   5512         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IL3LU_BCM56960_A0fmt_fields,
   5513         /* bits        */ 146,
   5514         /* flags       */ 0,
   5515     },
   5516 #endif /* chips */
   5517 
   5518 #if defined(BCM_56270_A0)
   5519     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IL3LU_BCM56270_A0fmt */ 
   5520         /* format            SS_RST_BUS_OUT_SEARCH_IL3LUfmt */
   5521         /* nFields     */ 1,
   5522         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IL3LU_BCM56960_A0fmt_fields,
   5523         /* bits        */ 146,
   5524         /* flags       */ 0,
   5525     },
   5526 #endif /* chips */
   5527 
   5528 #if defined(BCM_56560_A0)
   5529     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IL3LU_BCM56560_A0fmt */ 
   5530         /* format            SS_RST_BUS_OUT_SEARCH_IL3LUfmt */
   5531         /* nFields     */ 1,
   5532         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IL3LU_BCM56960_A0fmt_fields,
   5533         /* bits        */ 146,
   5534         /* flags       */ 0,
   5535     },
   5536 #endif /* chips */
   5537 
   5538 #if defined(BCM_56560_B0)
   5539     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IL3LU_BCM56560_B0fmt */ 
   5540         /* format            SS_RST_BUS_OUT_SEARCH_IL3LUfmt */
   5541         /* nFields     */ 1,
   5542         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IL3LU_BCM56960_A0fmt_fields,
   5543         /* bits        */ 146,
   5544         /* flags       */ 0,
   5545     },
   5546 #endif /* chips */
   5547 
   5548 #if defined(BCM_56670_A0)
   5549     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IL3LU_BCM56670_A0fmt */ 
   5550         /* format            SS_RST_BUS_OUT_SEARCH_IL3LUfmt */
   5551         /* nFields     */ 1,
   5552         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IL3LU_BCM56960_A0fmt_fields,
   5553         /* bits        */ 146,
   5554         /* flags       */ 0,
   5555     },
   5556 #endif /* chips */
   5557 
   5558 #if defined(BCM_56670_B0)
   5559     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IL3LU_BCM56670_B0fmt */ 
   5560         /* format            SS_RST_BUS_OUT_SEARCH_IL3LUfmt */
   5561         /* nFields     */ 1,
   5562         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IL3LU_BCM56960_A0fmt_fields,
   5563         /* bits        */ 146,
   5564         /* flags       */ 0,
   5565     },
   5566 #endif /* chips */
   5567 
   5568 #if defined(BCM_56960_A0)
   5569     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IL3LU_BCM56960_A0fmt */ 
   5570         /* format            SS_RST_BUS_OUT_SEARCH_IL3LUfmt */
   5571         /* nFields     */ 1,
   5572         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IL3LU_BCM56960_A0fmt_fields,
   5573         /* bits        */ 146,
   5574         /* flags       */ 0,
   5575     },
   5576 #endif /* chips */
   5577 
   5578 #if defined(BCM_56965_A0)
   5579     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IL3LU_BCM56965_A0fmt */ 
   5580         /* format            SS_RST_BUS_OUT_SEARCH_IL3LUfmt */
   5581         /* nFields     */ 1,
   5582         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IL3LU_BCM56960_A0fmt_fields,
   5583         /* bits        */ 146,
   5584         /* flags       */ 0,
   5585     },
   5586 #endif /* chips */
   5587 
   5588 #if defined(BCM_56970_A0)
   5589     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IL3LU_BCM56970_A0fmt */ 
   5590         /* format            SS_RST_BUS_OUT_SEARCH_IL3LUfmt */
   5591         /* nFields     */ 1,
   5592         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IL3LU_BCM56960_A0fmt_fields,
   5593         /* bits        */ 146,
   5594         /* flags       */ 0,
   5595     },
   5596 #endif /* chips */
   5597 
   5598 #if defined(BCM_56850_A0) || defined(BCM_56860_A0)
   5599     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_ILPMfmt */ 
   5600         /* format            SS_RST_BUS_OUT_SEARCH_ILPMfmt */
   5601         /* nFields     */ 1,
   5602         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_ILPMfmt_fields,
   5603         /* bits        */ 48,
   5604         /* flags       */ 0,
   5605     },
   5606 #endif /* chips */
   5607 
   5608 #if defined(BCM_56260_A0)
   5609     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56260_A0fmt */ 
   5610         /* format            SS_RST_BUS_OUT_SEARCH_ILPMfmt */
   5611         /* nFields     */ 1,
   5612         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56960_A0fmt_fields,
   5613         /* bits        */ 48,
   5614         /* flags       */ 0,
   5615     },
   5616 #endif /* chips */
   5617 
   5618 #if defined(BCM_56260_B0)
   5619     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56260_B0fmt */ 
   5620         /* format            SS_RST_BUS_OUT_SEARCH_ILPMfmt */
   5621         /* nFields     */ 1,
   5622         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56960_A0fmt_fields,
   5623         /* bits        */ 48,
   5624         /* flags       */ 0,
   5625     },
   5626 #endif /* chips */
   5627 
   5628 #if defined(BCM_56270_A0)
   5629     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56270_A0fmt */ 
   5630         /* format            SS_RST_BUS_OUT_SEARCH_ILPMfmt */
   5631         /* nFields     */ 1,
   5632         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56960_A0fmt_fields,
   5633         /* bits        */ 48,
   5634         /* flags       */ 0,
   5635     },
   5636 #endif /* chips */
   5637 
   5638 #if defined(BCM_56370_A0)
   5639     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56370_A0fmt */ 
   5640         /* format            SS_RST_BUS_OUT_SEARCH_ILPMfmt */
   5641         /* nFields     */ 1,
   5642         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56870_A0fmt_fields,
   5643         /* bits        */ 49,
   5644         /* flags       */ 0,
   5645     },
   5646 #endif /* chips */
   5647 
   5648 #if defined(BCM_56560_A0)
   5649     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56560_A0fmt */ 
   5650         /* format            SS_RST_BUS_OUT_SEARCH_ILPMfmt */
   5651         /* nFields     */ 1,
   5652         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56960_A0fmt_fields,
   5653         /* bits        */ 48,
   5654         /* flags       */ 0,
   5655     },
   5656 #endif /* chips */
   5657 
   5658 #if defined(BCM_56560_B0)
   5659     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56560_B0fmt */ 
   5660         /* format            SS_RST_BUS_OUT_SEARCH_ILPMfmt */
   5661         /* nFields     */ 1,
   5662         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56960_A0fmt_fields,
   5663         /* bits        */ 48,
   5664         /* flags       */ 0,
   5665     },
   5666 #endif /* chips */
   5667 
   5668 #if defined(BCM_56670_A0)
   5669     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56670_A0fmt */ 
   5670         /* format            SS_RST_BUS_OUT_SEARCH_ILPMfmt */
   5671         /* nFields     */ 1,
   5672         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56960_A0fmt_fields,
   5673         /* bits        */ 48,
   5674         /* flags       */ 0,
   5675     },
   5676 #endif /* chips */
   5677 
   5678 #if defined(BCM_56670_B0)
   5679     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56670_B0fmt */ 
   5680         /* format            SS_RST_BUS_OUT_SEARCH_ILPMfmt */
   5681         /* nFields     */ 1,
   5682         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56960_A0fmt_fields,
   5683         /* bits        */ 48,
   5684         /* flags       */ 0,
   5685     },
   5686 #endif /* chips */
   5687 
   5688 #if defined(BCM_56770_A0)
   5689     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56770_A0fmt */ 
   5690         /* format            SS_RST_BUS_OUT_SEARCH_ILPMfmt */
   5691         /* nFields     */ 1,
   5692         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56870_A0fmt_fields,
   5693         /* bits        */ 49,
   5694         /* flags       */ 0,
   5695     },
   5696 #endif /* chips */
   5697 
   5698 #if defined(BCM_56870_A0)
   5699     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56870_A0fmt */ 
   5700         /* format            SS_RST_BUS_OUT_SEARCH_ILPMfmt */
   5701         /* nFields     */ 1,
   5702         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56870_A0fmt_fields,
   5703         /* bits        */ 49,
   5704         /* flags       */ 0,
   5705     },
   5706 #endif /* chips */
   5707 
   5708 #if defined(BCM_56960_A0)
   5709     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56960_A0fmt */ 
   5710         /* format            SS_RST_BUS_OUT_SEARCH_ILPMfmt */
   5711         /* nFields     */ 1,
   5712         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56960_A0fmt_fields,
   5713         /* bits        */ 48,
   5714         /* flags       */ 0,
   5715     },
   5716 #endif /* chips */
   5717 
   5718 #if defined(BCM_56965_A0)
   5719     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56965_A0fmt */ 
   5720         /* format            SS_RST_BUS_OUT_SEARCH_ILPMfmt */
   5721         /* nFields     */ 1,
   5722         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56960_A0fmt_fields,
   5723         /* bits        */ 48,
   5724         /* flags       */ 0,
   5725     },
   5726 #endif /* chips */
   5727 
   5728 #if defined(BCM_56970_A0)
   5729     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56970_A0fmt */ 
   5730         /* format            SS_RST_BUS_OUT_SEARCH_ILPMfmt */
   5731         /* nFields     */ 1,
   5732         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56960_A0fmt_fields,
   5733         /* bits        */ 48,
   5734         /* flags       */ 0,
   5735     },
   5736 #endif /* chips */
   5737 
   5738 #if defined(BCM_56980_A0)
   5739     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56980_A0fmt */ 
   5740         /* format            SS_RST_BUS_OUT_SEARCH_ILPMfmt */
   5741         /* nFields     */ 4,
   5742         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56980_A0fmt_fields,
   5743         /* bits        */ 118,
   5744         /* flags       */ 0,
   5745     },
   5746 #endif /* chips */
   5747 
   5748 #if defined(BCM_56980_B0)
   5749     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56980_B0fmt */ 
   5750         /* format            SS_RST_BUS_OUT_SEARCH_ILPMfmt */
   5751         /* nFields     */ 4,
   5752         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_ILPM_BCM56980_A0fmt_fields,
   5753         /* bits        */ 118,
   5754         /* flags       */ 0,
   5755     },
   5756 #endif /* chips */
   5757 
   5758 #if defined(BCM_56850_A0)
   5759     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IVLANfmt */ 
   5760         /* format            SS_RST_BUS_OUT_SEARCH_IVLANfmt */
   5761         /* nFields     */ 1,
   5762         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IVLANfmt_fields,
   5763         /* bits        */ 132,
   5764         /* flags       */ 0,
   5765     },
   5766 #endif /* chips */
   5767 
   5768 #if defined(BCM_56260_A0)
   5769     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IVLAN_BCM56260_A0fmt */ 
   5770         /* format            SS_RST_BUS_OUT_SEARCH_IVLANfmt */
   5771         /* nFields     */ 1,
   5772         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IVLAN_BCM56960_A0fmt_fields,
   5773         /* bits        */ 132,
   5774         /* flags       */ 0,
   5775     },
   5776 #endif /* chips */
   5777 
   5778 #if defined(BCM_56260_B0)
   5779     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IVLAN_BCM56260_B0fmt */ 
   5780         /* format            SS_RST_BUS_OUT_SEARCH_IVLANfmt */
   5781         /* nFields     */ 1,
   5782         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IVLAN_BCM56960_A0fmt_fields,
   5783         /* bits        */ 132,
   5784         /* flags       */ 0,
   5785     },
   5786 #endif /* chips */
   5787 
   5788 #if defined(BCM_56270_A0)
   5789     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IVLAN_BCM56270_A0fmt */ 
   5790         /* format            SS_RST_BUS_OUT_SEARCH_IVLANfmt */
   5791         /* nFields     */ 1,
   5792         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IVLAN_BCM56960_A0fmt_fields,
   5793         /* bits        */ 132,
   5794         /* flags       */ 0,
   5795     },
   5796 #endif /* chips */
   5797 
   5798 #if defined(BCM_56560_A0)
   5799     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IVLAN_BCM56560_A0fmt */ 
   5800         /* format            SS_RST_BUS_OUT_SEARCH_IVLANfmt */
   5801         /* nFields     */ 1,
   5802         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IVLAN_BCM56960_A0fmt_fields,
   5803         /* bits        */ 132,
   5804         /* flags       */ 0,
   5805     },
   5806 #endif /* chips */
   5807 
   5808 #if defined(BCM_56560_B0)
   5809     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IVLAN_BCM56560_B0fmt */ 
   5810         /* format            SS_RST_BUS_OUT_SEARCH_IVLANfmt */
   5811         /* nFields     */ 1,
   5812         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IVLAN_BCM56960_A0fmt_fields,
   5813         /* bits        */ 132,
   5814         /* flags       */ 0,
   5815     },
   5816 #endif /* chips */
   5817 
   5818 #if defined(BCM_56670_A0)
   5819     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IVLAN_BCM56670_A0fmt */ 
   5820         /* format            SS_RST_BUS_OUT_SEARCH_IVLANfmt */
   5821         /* nFields     */ 1,
   5822         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IVLAN_BCM56960_A0fmt_fields,
   5823         /* bits        */ 132,
   5824         /* flags       */ 0,
   5825     },
   5826 #endif /* chips */
   5827 
   5828 #if defined(BCM_56670_B0)
   5829     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IVLAN_BCM56670_B0fmt */ 
   5830         /* format            SS_RST_BUS_OUT_SEARCH_IVLANfmt */
   5831         /* nFields     */ 1,
   5832         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IVLAN_BCM56960_A0fmt_fields,
   5833         /* bits        */ 132,
   5834         /* flags       */ 0,
   5835     },
   5836 #endif /* chips */
   5837 
   5838 #if defined(BCM_56860_A0)
   5839     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IVLAN_BCM56860_A0fmt */ 
   5840         /* format            SS_RST_BUS_OUT_SEARCH_IVLANfmt */
   5841         /* nFields     */ 1,
   5842         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IVLAN_BCM56860_A0fmt_fields,
   5843         /* bits        */ 142,
   5844         /* flags       */ 0,
   5845     },
   5846 #endif /* chips */
   5847 
   5848 #if defined(BCM_56960_A0)
   5849     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IVLAN_BCM56960_A0fmt */ 
   5850         /* format            SS_RST_BUS_OUT_SEARCH_IVLANfmt */
   5851         /* nFields     */ 1,
   5852         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IVLAN_BCM56960_A0fmt_fields,
   5853         /* bits        */ 132,
   5854         /* flags       */ 0,
   5855     },
   5856 #endif /* chips */
   5857 
   5858 #if defined(BCM_56965_A0)
   5859     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IVLAN_BCM56965_A0fmt */ 
   5860         /* format            SS_RST_BUS_OUT_SEARCH_IVLANfmt */
   5861         /* nFields     */ 1,
   5862         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IVLAN_BCM56960_A0fmt_fields,
   5863         /* bits        */ 132,
   5864         /* flags       */ 0,
   5865     },
   5866 #endif /* chips */
   5867 
   5868 #if defined(BCM_56970_A0)
   5869     { /* SOC_FORMAT_INT_SS_RST_BUS_OUT_SEARCH_IVLAN_BCM56970_A0fmt */ 
   5870         /* format            SS_RST_BUS_OUT_SEARCH_IVLANfmt */
   5871         /* nFields     */ 1,
   5872         /* *fields     */ soc_SS_RST_BUS_OUT_SEARCH_IVLAN_BCM56960_A0fmt_fields,
   5873         /* bits        */ 132,
   5874         /* flags       */ 0,
   5875     },
   5876 #endif /* chips */
   5877 
   5878 #if defined(BCM_88732_A0)
   5879     { /* SOC_FORMAT_INT_STUB_TO_SWITCH_SCHfmt */ 
   5880         /* format            STUB_TO_SWITCH_SCHfmt */
   5881         /* nFields     */ 9,
   5882         /* *fields     */ soc_STUB_TO_SWITCH_SCHfmt_fields,
   5883         /* bits        */ 64,
   5884         /* flags       */ 0,
   5885     },
   5886 #endif /* chips */
   5887 
   5888 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \
   5889     defined(BCM_56870_A0)
   5890     { /* SOC_FORMAT_INT_SUBNET_PROTOCOL_DOPfmt */ 
   5891         /* format            SUBNET_PROTOCOL_DOPfmt */
   5892         /* nFields     */ 6,
   5893         /* *fields     */ soc_SUBNET_PROTOCOL_DOPfmt_fields,
   5894         /* bits        */ 32,
   5895         /* flags       */ 0,
   5896     },
   5897 #endif /* chips */
   5898 
   5899 #if defined(BCM_56440_A0)
   5900     { /* SOC_FORMAT_INT_SVM_ACTIONSfmt */ 
   5901         /* format            SVM_ACTIONSfmt */
   5902         /* nFields     */ 10,
   5903         /* *fields     */ soc_SVM_ACTIONSfmt_fields,
   5904         /* bits        */ 22,
   5905         /* flags       */ 0,
   5906     },
   5907 #endif /* chips */
   5908 
   5909 #if defined(BCM_53570_A0)
   5910     { /* SOC_FORMAT_INT_SVM_ACTIONS_BCM53570_A0fmt */ 
   5911         /* format            SVM_ACTIONSfmt */
   5912         /* nFields     */ 12,
   5913         /* *fields     */ soc_SVM_ACTIONS_BCM53570_A0fmt_fields,
   5914         /* bits        */ 35,
   5915         /* flags       */ 0,
   5916     },
   5917 #endif /* chips */
   5918 
   5919 #if defined(BCM_53570_B0)
   5920     { /* SOC_FORMAT_INT_SVM_ACTIONS_BCM53570_B0fmt */ 
   5921         /* format            SVM_ACTIONSfmt */
   5922         /* nFields     */ 12,
   5923         /* *fields     */ soc_SVM_ACTIONS_BCM53570_A0fmt_fields,
   5924         /* bits        */ 35,
   5925         /* flags       */ 0,
   5926     },
   5927 #endif /* chips */
   5928 
   5929 #if defined(BCM_56260_A0)
   5930     { /* SOC_FORMAT_INT_SVM_ACTIONS_BCM56260_A0fmt */ 
   5931         /* format            SVM_ACTIONSfmt */
   5932         /* nFields     */ 10,
   5933         /* *fields     */ soc_SVM_ACTIONS_BCM56560_A0fmt_fields,
   5934         /* bits        */ 22,
   5935         /* flags       */ 0,
   5936     },
   5937 #endif /* chips */
   5938 
   5939 #if defined(BCM_56260_B0)
   5940     { /* SOC_FORMAT_INT_SVM_ACTIONS_BCM56260_B0fmt */ 
   5941         /* format            SVM_ACTIONSfmt */
   5942         /* nFields     */ 10,
   5943         /* *fields     */ soc_SVM_ACTIONS_BCM56560_A0fmt_fields,
   5944         /* bits        */ 22,
   5945         /* flags       */ 0,
   5946     },
   5947 #endif /* chips */
   5948 
   5949 #if defined(BCM_56270_A0)
   5950     { /* SOC_FORMAT_INT_SVM_ACTIONS_BCM56270_A0fmt */ 
   5951         /* format            SVM_ACTIONSfmt */
   5952         /* nFields     */ 10,
   5953         /* *fields     */ soc_SVM_ACTIONS_BCM56560_A0fmt_fields,
   5954         /* bits        */ 22,
   5955         /* flags       */ 0,
   5956     },
   5957 #endif /* chips */
   5958 
   5959 #if defined(BCM_56340_A0)
   5960     { /* SOC_FORMAT_INT_SVM_ACTIONS_BCM56340_A0fmt */ 
   5961         /* format            SVM_ACTIONSfmt */
   5962         /* nFields     */ 10,
   5963         /* *fields     */ soc_SVM_ACTIONS_BCM56640_A0fmt_fields,
   5964         /* bits        */ 22,
   5965         /* flags       */ 0,
   5966     },
   5967 #endif /* chips */
   5968 
   5969 #if defined(BCM_56440_B0)
   5970     { /* SOC_FORMAT_INT_SVM_ACTIONS_BCM56440_B0fmt */ 
   5971         /* format            SVM_ACTIONSfmt */
   5972         /* nFields     */ 10,
   5973         /* *fields     */ soc_SVM_ACTIONSfmt_fields,
   5974         /* bits        */ 22,
   5975         /* flags       */ 0,
   5976     },
   5977 #endif /* chips */
   5978 
   5979 #if defined(BCM_56450_A0)
   5980     { /* SOC_FORMAT_INT_SVM_ACTIONS_BCM56450_A0fmt */ 
   5981         /* format            SVM_ACTIONSfmt */
   5982         /* nFields     */ 10,
   5983         /* *fields     */ soc_SVM_ACTIONS_BCM56640_A0fmt_fields,
   5984         /* bits        */ 22,
   5985         /* flags       */ 0,
   5986     },
   5987 #endif /* chips */
   5988 
   5989 #if defined(BCM_56450_B0)
   5990     { /* SOC_FORMAT_INT_SVM_ACTIONS_BCM56450_B0fmt */ 
   5991         /* format            SVM_ACTIONSfmt */
   5992         /* nFields     */ 10,
   5993         /* *fields     */ soc_SVM_ACTIONS_BCM56640_A0fmt_fields,
   5994         /* bits        */ 22,
   5995         /* flags       */ 0,
   5996     },
   5997 #endif /* chips */
   5998 
   5999 #if defined(BCM_56450_B1)
   6000     { /* SOC_FORMAT_INT_SVM_ACTIONS_BCM56450_B1fmt */ 
   6001         /* format            SVM_ACTIONSfmt */
   6002         /* nFields     */ 10,
   6003         /* *fields     */ soc_SVM_ACTIONS_BCM56640_A0fmt_fields,
   6004         /* bits        */ 22,
   6005         /* flags       */ 0,
   6006     },
   6007 #endif /* chips */
   6008 
   6009 #if defined(BCM_56560_A0)
   6010     { /* SOC_FORMAT_INT_SVM_ACTIONS_BCM56560_A0fmt */ 
   6011         /* format            SVM_ACTIONSfmt */
   6012         /* nFields     */ 10,
   6013         /* *fields     */ soc_SVM_ACTIONS_BCM56560_A0fmt_fields,
   6014         /* bits        */ 22,
   6015         /* flags       */ 0,
   6016     },
   6017 #endif /* chips */
   6018 
   6019 #if defined(BCM_56560_B0)
   6020     { /* SOC_FORMAT_INT_SVM_ACTIONS_BCM56560_B0fmt */ 
   6021         /* format            SVM_ACTIONSfmt */
   6022         /* nFields     */ 10,
   6023         /* *fields     */ soc_SVM_ACTIONS_BCM56560_A0fmt_fields,
   6024         /* bits        */ 22,
   6025         /* flags       */ 0,
   6026     },
   6027 #endif /* chips */
   6028 
   6029 #if defined(BCM_56640_A0)
   6030     { /* SOC_FORMAT_INT_SVM_ACTIONS_BCM56640_A0fmt */ 
   6031         /* format            SVM_ACTIONSfmt */
   6032         /* nFields     */ 10,
   6033         /* *fields     */ soc_SVM_ACTIONS_BCM56640_A0fmt_fields,
   6034         /* bits        */ 22,
   6035         /* flags       */ 0,
   6036     },
   6037 #endif /* chips */
   6038 
   6039 #if defined(BCM_56670_A0)
   6040     { /* SOC_FORMAT_INT_SVM_ACTIONS_BCM56670_A0fmt */ 
   6041         /* format            SVM_ACTIONSfmt */
   6042         /* nFields     */ 10,
   6043         /* *fields     */ soc_SVM_ACTIONS_BCM56560_A0fmt_fields,
   6044         /* bits        */ 22,
   6045         /* flags       */ 0,
   6046     },
   6047 #endif /* chips */
   6048 
   6049 #if defined(BCM_56670_B0)
   6050     { /* SOC_FORMAT_INT_SVM_ACTIONS_BCM56670_B0fmt */ 
   6051         /* format            SVM_ACTIONSfmt */
   6052         /* nFields     */ 10,
   6053         /* *fields     */ soc_SVM_ACTIONS_BCM56560_A0fmt_fields,
   6054         /* bits        */ 22,
   6055         /* flags       */ 0,
   6056     },
   6057 #endif /* chips */
   6058 
   6059 #if defined(BCM_56440_A0) || defined(BCM_56440_B0)
   6060     { /* SOC_FORMAT_INT_SVM_COMPRESSED_PKT_ATTRfmt */ 
   6061         /* format            SVM_COMPRESSED_PKT_ATTRfmt */
   6062         /* nFields     */ 6,
   6063         /* *fields     */ soc_SVM_COMPRESSED_PKT_ATTRfmt_fields,
   6064         /* bits        */ 37,
   6065         /* flags       */ 0,
   6066     },
   6067 #endif /* chips */
   6068 
   6069 #if defined(BCM_56260_A0)
   6070     { /* SOC_FORMAT_INT_SVM_COMPRESSED_PKT_ATTR_BCM56260_A0fmt */ 
   6071         /* format            SVM_COMPRESSED_PKT_ATTRfmt */
   6072         /* nFields     */ 6,
   6073         /* *fields     */ soc_SVM_COMPRESSED_PKT_ATTR_BCM56560_A0fmt_fields,
   6074         /* bits        */ 38,
   6075         /* flags       */ 0,
   6076     },
   6077 #endif /* chips */
   6078 
   6079 #if defined(BCM_56260_B0)
   6080     { /* SOC_FORMAT_INT_SVM_COMPRESSED_PKT_ATTR_BCM56260_B0fmt */ 
   6081         /* format            SVM_COMPRESSED_PKT_ATTRfmt */
   6082         /* nFields     */ 6,
   6083         /* *fields     */ soc_SVM_COMPRESSED_PKT_ATTR_BCM56560_A0fmt_fields,
   6084         /* bits        */ 38,
   6085         /* flags       */ 0,
   6086     },
   6087 #endif /* chips */
   6088 
   6089 #if defined(BCM_56270_A0)
   6090     { /* SOC_FORMAT_INT_SVM_COMPRESSED_PKT_ATTR_BCM56270_A0fmt */ 
   6091         /* format            SVM_COMPRESSED_PKT_ATTRfmt */
   6092         /* nFields     */ 6,
   6093         /* *fields     */ soc_SVM_COMPRESSED_PKT_ATTR_BCM56560_A0fmt_fields,
   6094         /* bits        */ 38,
   6095         /* flags       */ 0,
   6096     },
   6097 #endif /* chips */
   6098 
   6099 #if defined(BCM_56340_A0)
   6100     { /* SOC_FORMAT_INT_SVM_COMPRESSED_PKT_ATTR_BCM56340_A0fmt */ 
   6101         /* format            SVM_COMPRESSED_PKT_ATTRfmt */
   6102         /* nFields     */ 6,
   6103         /* *fields     */ soc_SVM_COMPRESSED_PKT_ATTR_BCM56640_A0fmt_fields,
   6104         /* bits        */ 37,
   6105         /* flags       */ 0,
   6106     },
   6107 #endif /* chips */
   6108 
   6109 #if defined(BCM_56450_A0)
   6110     { /* SOC_FORMAT_INT_SVM_COMPRESSED_PKT_ATTR_BCM56450_A0fmt */ 
   6111         /* format            SVM_COMPRESSED_PKT_ATTRfmt */
   6112         /* nFields     */ 6,
   6113         /* *fields     */ soc_SVM_COMPRESSED_PKT_ATTR_BCM56450_A0fmt_fields,
   6114         /* bits        */ 39,
   6115         /* flags       */ 0,
   6116     },
   6117 #endif /* chips */
   6118 
   6119 #if defined(BCM_56450_B0)
   6120     { /* SOC_FORMAT_INT_SVM_COMPRESSED_PKT_ATTR_BCM56450_B0fmt */ 
   6121         /* format            SVM_COMPRESSED_PKT_ATTRfmt */
   6122         /* nFields     */ 6,
   6123         /* *fields     */ soc_SVM_COMPRESSED_PKT_ATTR_BCM56450_A0fmt_fields,
   6124         /* bits        */ 39,
   6125         /* flags       */ 0,
   6126     },
   6127 #endif /* chips */
   6128 
   6129 #if defined(BCM_56450_B1)
   6130     { /* SOC_FORMAT_INT_SVM_COMPRESSED_PKT_ATTR_BCM56450_B1fmt */ 
   6131         /* format            SVM_COMPRESSED_PKT_ATTRfmt */
   6132         /* nFields     */ 6,
   6133         /* *fields     */ soc_SVM_COMPRESSED_PKT_ATTR_BCM56450_A0fmt_fields,
   6134         /* bits        */ 39,
   6135         /* flags       */ 0,
   6136     },
   6137 #endif /* chips */
   6138 
   6139 #if defined(BCM_56560_A0)
   6140     { /* SOC_FORMAT_INT_SVM_COMPRESSED_PKT_ATTR_BCM56560_A0fmt */ 
   6141         /* format            SVM_COMPRESSED_PKT_ATTRfmt */
   6142         /* nFields     */ 6,
   6143         /* *fields     */ soc_SVM_COMPRESSED_PKT_ATTR_BCM56560_A0fmt_fields,
   6144         /* bits        */ 38,
   6145         /* flags       */ 0,
   6146     },
   6147 #endif /* chips */
   6148 
   6149 #if defined(BCM_56560_B0)
   6150     { /* SOC_FORMAT_INT_SVM_COMPRESSED_PKT_ATTR_BCM56560_B0fmt */ 
   6151         /* format            SVM_COMPRESSED_PKT_ATTRfmt */
   6152         /* nFields     */ 6,
   6153         /* *fields     */ soc_SVM_COMPRESSED_PKT_ATTR_BCM56560_A0fmt_fields,
   6154         /* bits        */ 38,
   6155         /* flags       */ 0,
   6156     },
   6157 #endif /* chips */
   6158 
   6159 #if defined(BCM_56640_A0)
   6160     { /* SOC_FORMAT_INT_SVM_COMPRESSED_PKT_ATTR_BCM56640_A0fmt */ 
   6161         /* format            SVM_COMPRESSED_PKT_ATTRfmt */
   6162         /* nFields     */ 6,
   6163         /* *fields     */ soc_SVM_COMPRESSED_PKT_ATTR_BCM56640_A0fmt_fields,
   6164         /* bits        */ 37,
   6165         /* flags       */ 0,
   6166     },
   6167 #endif /* chips */
   6168 
   6169 #if defined(BCM_56670_A0)
   6170     { /* SOC_FORMAT_INT_SVM_COMPRESSED_PKT_ATTR_BCM56670_A0fmt */ 
   6171         /* format            SVM_COMPRESSED_PKT_ATTRfmt */
   6172         /* nFields     */ 6,
   6173         /* *fields     */ soc_SVM_COMPRESSED_PKT_ATTR_BCM56560_A0fmt_fields,
   6174         /* bits        */ 38,
   6175         /* flags       */ 0,
   6176     },
   6177 #endif /* chips */
   6178 
   6179 #if defined(BCM_56670_B0)
   6180     { /* SOC_FORMAT_INT_SVM_COMPRESSED_PKT_ATTR_BCM56670_B0fmt */ 
   6181         /* format            SVM_COMPRESSED_PKT_ATTRfmt */
   6182         /* nFields     */ 6,
   6183         /* *fields     */ soc_SVM_COMPRESSED_PKT_ATTR_BCM56560_A0fmt_fields,
   6184         /* bits        */ 38,
   6185         /* flags       */ 0,
   6186     },
   6187 #endif /* chips */
   6188 
   6189 #if defined(BCM_56440_A0) || defined(BCM_56440_B0)
   6190     { /* SOC_FORMAT_INT_SVM_CTR_UDFfmt */ 
   6191         /* format            SVM_CTR_UDFfmt */
   6192         /* nFields     */ 3,
   6193         /* *fields     */ soc_ING_FLEX_CTR_UDFfmt_fields,
   6194         /* bits        */ 33,
   6195         /* flags       */ 0,
   6196     },
   6197 #endif /* chips */
   6198 
   6199 #if defined(BCM_56260_A0)
   6200     { /* SOC_FORMAT_INT_SVM_CTR_UDF_BCM56260_A0fmt */ 
   6201         /* format            SVM_CTR_UDFfmt */
   6202         /* nFields     */ 3,
   6203         /* *fields     */ soc_EGR_FLEX_CTR_UDF_BCM56960_A0fmt_fields,
   6204         /* bits        */ 33,
   6205         /* flags       */ 0,
   6206     },
   6207 #endif /* chips */
   6208 
   6209 #if defined(BCM_56260_B0)
   6210     { /* SOC_FORMAT_INT_SVM_CTR_UDF_BCM56260_B0fmt */ 
   6211         /* format            SVM_CTR_UDFfmt */
   6212         /* nFields     */ 3,
   6213         /* *fields     */ soc_EGR_FLEX_CTR_UDF_BCM56960_A0fmt_fields,
   6214         /* bits        */ 33,
   6215         /* flags       */ 0,
   6216     },
   6217 #endif /* chips */
   6218 
   6219 #if defined(BCM_56270_A0)
   6220     { /* SOC_FORMAT_INT_SVM_CTR_UDF_BCM56270_A0fmt */ 
   6221         /* format            SVM_CTR_UDFfmt */
   6222         /* nFields     */ 3,
   6223         /* *fields     */ soc_EGR_FLEX_CTR_UDF_BCM56960_A0fmt_fields,
   6224         /* bits        */ 33,
   6225         /* flags       */ 0,
   6226     },
   6227 #endif /* chips */
   6228 
   6229 #if defined(BCM_56340_A0)
   6230     { /* SOC_FORMAT_INT_SVM_CTR_UDF_BCM56340_A0fmt */ 
   6231         /* format            SVM_CTR_UDFfmt */
   6232         /* nFields     */ 3,
   6233         /* *fields     */ soc_EGR_FLEX_CTR_UDFfmt_fields,
   6234         /* bits        */ 33,
   6235         /* flags       */ 0,
   6236     },
   6237 #endif /* chips */
   6238 
   6239 #if defined(BCM_56450_A0)
   6240     { /* SOC_FORMAT_INT_SVM_CTR_UDF_BCM56450_A0fmt */ 
   6241         /* format            SVM_CTR_UDFfmt */
   6242         /* nFields     */ 3,
   6243         /* *fields     */ soc_EGR_FLEX_CTR_UDFfmt_fields,
   6244         /* bits        */ 33,
   6245         /* flags       */ 0,
   6246     },
   6247 #endif /* chips */
   6248 
   6249 #if defined(BCM_56450_B0)
   6250     { /* SOC_FORMAT_INT_SVM_CTR_UDF_BCM56450_B0fmt */ 
   6251         /* format            SVM_CTR_UDFfmt */
   6252         /* nFields     */ 3,
   6253         /* *fields     */ soc_EGR_FLEX_CTR_UDFfmt_fields,
   6254         /* bits        */ 33,
   6255         /* flags       */ 0,
   6256     },
   6257 #endif /* chips */
   6258 
   6259 #if defined(BCM_56450_B1)
   6260     { /* SOC_FORMAT_INT_SVM_CTR_UDF_BCM56450_B1fmt */ 
   6261         /* format            SVM_CTR_UDFfmt */
   6262         /* nFields     */ 3,
   6263         /* *fields     */ soc_EGR_FLEX_CTR_UDFfmt_fields,
   6264         /* bits        */ 33,
   6265         /* flags       */ 0,
   6266     },
   6267 #endif /* chips */
   6268 
   6269 #if defined(BCM_56560_A0)
   6270     { /* SOC_FORMAT_INT_SVM_CTR_UDF_BCM56560_A0fmt */ 
   6271         /* format            SVM_CTR_UDFfmt */
   6272         /* nFields     */ 3,
   6273         /* *fields     */ soc_EGR_FLEX_CTR_UDF_BCM56960_A0fmt_fields,
   6274         /* bits        */ 33,
   6275         /* flags       */ 0,
   6276     },
   6277 #endif /* chips */
   6278 
   6279 #if defined(BCM_56560_B0)
   6280     { /* SOC_FORMAT_INT_SVM_CTR_UDF_BCM56560_B0fmt */ 
   6281         /* format            SVM_CTR_UDFfmt */
   6282         /* nFields     */ 3,
   6283         /* *fields     */ soc_EGR_FLEX_CTR_UDF_BCM56960_A0fmt_fields,
   6284         /* bits        */ 33,
   6285         /* flags       */ 0,
   6286     },
   6287 #endif /* chips */
   6288 
   6289 #if defined(BCM_56640_A0)
   6290     { /* SOC_FORMAT_INT_SVM_CTR_UDF_BCM56640_A0fmt */ 
   6291         /* format            SVM_CTR_UDFfmt */
   6292         /* nFields     */ 3,
   6293         /* *fields     */ soc_EGR_FLEX_CTR_UDFfmt_fields,
   6294         /* bits        */ 33,
   6295         /* flags       */ 0,
   6296     },
   6297 #endif /* chips */
   6298 
   6299 #if defined(BCM_56670_A0)
   6300     { /* SOC_FORMAT_INT_SVM_CTR_UDF_BCM56670_A0fmt */ 
   6301         /* format            SVM_CTR_UDFfmt */
   6302         /* nFields     */ 3,
   6303         /* *fields     */ soc_EGR_FLEX_CTR_UDF_BCM56960_A0fmt_fields,
   6304         /* bits        */ 33,
   6305         /* flags       */ 0,
   6306     },
   6307 #endif /* chips */
   6308 
   6309 #if defined(BCM_56670_B0)
   6310     { /* SOC_FORMAT_INT_SVM_CTR_UDF_BCM56670_B0fmt */ 
   6311         /* format            SVM_CTR_UDFfmt */
   6312         /* nFields     */ 3,
   6313         /* *fields     */ soc_EGR_FLEX_CTR_UDF_BCM56960_A0fmt_fields,
   6314         /* bits        */ 33,
   6315         /* flags       */ 0,
   6316     },
   6317 #endif /* chips */
   6318 
   6319 #if defined(BCM_56440_A0) || defined(BCM_56440_B0)
   6320     { /* SOC_FORMAT_INT_SVM_IN_BUSfmt */ 
   6321         /* format            SVM_IN_BUSfmt */
   6322         /* nFields     */ 18,
   6323         /* *fields     */ soc_SVM_IN_BUSfmt_fields,
   6324         /* bits        */ 242,
   6325         /* flags       */ 0,
   6326     },
   6327 #endif /* chips */
   6328 
   6329 #if defined(BCM_53570_A0)
   6330     { /* SOC_FORMAT_INT_SVM_IN_BUS_BCM53570_A0fmt */ 
   6331         /* format            SVM_IN_BUSfmt */
   6332         /* nFields     */ 19,
   6333         /* *fields     */ soc_SVM_IN_BUS_BCM53570_A0fmt_fields,
   6334         /* bits        */ 247,
   6335         /* flags       */ 0,
   6336     },
   6337 #endif /* chips */
   6338 
   6339 #if defined(BCM_53570_B0)
   6340     { /* SOC_FORMAT_INT_SVM_IN_BUS_BCM53570_B0fmt */ 
   6341         /* format            SVM_IN_BUSfmt */
   6342         /* nFields     */ 19,
   6343         /* *fields     */ soc_SVM_IN_BUS_BCM53570_A0fmt_fields,
   6344         /* bits        */ 247,
   6345         /* flags       */ 0,
   6346     },
   6347 #endif /* chips */
   6348 
   6349 #if defined(BCM_56260_A0)
   6350     { /* SOC_FORMAT_INT_SVM_IN_BUS_BCM56260_A0fmt */ 
   6351         /* format            SVM_IN_BUSfmt */
   6352         /* nFields     */ 19,
   6353         /* *fields     */ soc_SVM_IN_BUS_BCM56260_A0fmt_fields,
   6354         /* bits        */ 246,
   6355         /* flags       */ 0,
   6356     },
   6357 #endif /* chips */
   6358 
   6359 #if defined(BCM_56260_B0)
   6360     { /* SOC_FORMAT_INT_SVM_IN_BUS_BCM56260_B0fmt */ 
   6361         /* format            SVM_IN_BUSfmt */
   6362         /* nFields     */ 19,
   6363         /* *fields     */ soc_SVM_IN_BUS_BCM56260_A0fmt_fields,
   6364         /* bits        */ 246,
   6365         /* flags       */ 0,
   6366     },
   6367 #endif /* chips */
   6368 
   6369 #if defined(BCM_56270_A0)
   6370     { /* SOC_FORMAT_INT_SVM_IN_BUS_BCM56270_A0fmt */ 
   6371         /* format            SVM_IN_BUSfmt */
   6372         /* nFields     */ 19,
   6373         /* *fields     */ soc_SVM_IN_BUS_BCM56260_A0fmt_fields,
   6374         /* bits        */ 246,
   6375         /* flags       */ 0,
   6376     },
   6377 #endif /* chips */
   6378 
   6379 #if defined(BCM_56340_A0)
   6380     { /* SOC_FORMAT_INT_SVM_IN_BUS_BCM56340_A0fmt */ 
   6381         /* format            SVM_IN_BUSfmt */
   6382         /* nFields     */ 17,
   6383         /* *fields     */ soc_SVM_IN_BUS_BCM56340_A0fmt_fields,
   6384         /* bits        */ 227,
   6385         /* flags       */ 0,
   6386     },
   6387 #endif /* chips */
   6388 
   6389 #if defined(BCM_56450_A0)
   6390     { /* SOC_FORMAT_INT_SVM_IN_BUS_BCM56450_A0fmt */ 
   6391         /* format            SVM_IN_BUSfmt */
   6392         /* nFields     */ 19,
   6393         /* *fields     */ soc_SVM_IN_BUS_BCM56450_A0fmt_fields,
   6394         /* bits        */ 250,
   6395         /* flags       */ 0,
   6396     },
   6397 #endif /* chips */
   6398 
   6399 #if defined(BCM_56450_B0)
   6400     { /* SOC_FORMAT_INT_SVM_IN_BUS_BCM56450_B0fmt */ 
   6401         /* format            SVM_IN_BUSfmt */
   6402         /* nFields     */ 19,
   6403         /* *fields     */ soc_SVM_IN_BUS_BCM56450_A0fmt_fields,
   6404         /* bits        */ 250,
   6405         /* flags       */ 0,
   6406     },
   6407 #endif /* chips */
   6408 
   6409 #if defined(BCM_56450_B1)
   6410     { /* SOC_FORMAT_INT_SVM_IN_BUS_BCM56450_B1fmt */ 
   6411         /* format            SVM_IN_BUSfmt */
   6412         /* nFields     */ 19,
   6413         /* *fields     */ soc_SVM_IN_BUS_BCM56450_A0fmt_fields,
   6414         /* bits        */ 250,
   6415         /* flags       */ 0,
   6416     },
   6417 #endif /* chips */
   6418 
   6419 #if defined(BCM_56560_A0)
   6420     { /* SOC_FORMAT_INT_SVM_IN_BUS_BCM56560_A0fmt */ 
   6421         /* format            SVM_IN_BUSfmt */
   6422         /* nFields     */ 19,
   6423         /* *fields     */ soc_SVM_IN_BUS_BCM56560_A0fmt_fields,
   6424         /* bits        */ 268,
   6425         /* flags       */ 0,
   6426     },
   6427 #endif /* chips */
   6428 
   6429 #if defined(BCM_56560_B0)
   6430     { /* SOC_FORMAT_INT_SVM_IN_BUS_BCM56560_B0fmt */ 
   6431         /* format            SVM_IN_BUSfmt */
   6432         /* nFields     */ 19,
   6433         /* *fields     */ soc_SVM_IN_BUS_BCM56560_A0fmt_fields,
   6434         /* bits        */ 268,
   6435         /* flags       */ 0,
   6436     },
   6437 #endif /* chips */
   6438 
   6439 #if defined(BCM_56640_A0)
   6440     { /* SOC_FORMAT_INT_SVM_IN_BUS_BCM56640_A0fmt */ 
   6441         /* format            SVM_IN_BUSfmt */
   6442         /* nFields     */ 18,
   6443         /* *fields     */ soc_SVM_IN_BUS_BCM56640_A0fmt_fields,
   6444         /* bits        */ 256,
   6445         /* flags       */ 0,
   6446     },
   6447 #endif /* chips */
   6448 
   6449 #if defined(BCM_56670_A0)
   6450     { /* SOC_FORMAT_INT_SVM_IN_BUS_BCM56670_A0fmt */ 
   6451         /* format            SVM_IN_BUSfmt */
   6452         /* nFields     */ 19,
   6453         /* *fields     */ soc_SVM_IN_BUS_BCM56560_A0fmt_fields,
   6454         /* bits        */ 268,
   6455         /* flags       */ 0,
   6456     },
   6457 #endif /* chips */
   6458 
   6459 #if defined(BCM_56670_B0)
   6460     { /* SOC_FORMAT_INT_SVM_IN_BUS_BCM56670_B0fmt */ 
   6461         /* format            SVM_IN_BUSfmt */
   6462         /* nFields     */ 19,
   6463         /* *fields     */ soc_SVM_IN_BUS_BCM56560_A0fmt_fields,
   6464         /* bits        */ 268,
   6465         /* flags       */ 0,
   6466     },
   6467 #endif /* chips */
   6468 
   6469 #if defined(BCM_56440_A0) || defined(BCM_56440_B0)
   6470     { /* SOC_FORMAT_INT_SVM_METER_INDEX_EOP_BUFFERfmt */ 
   6471         /* format            SVM_METER_INDEX_EOP_BUFFERfmt */
   6472         /* nFields     */ 4,
   6473         /* *fields     */ soc_SVM_METER_INDEX_EOP_BUFFERfmt_fields,
   6474         /* bits        */ 28,
   6475         /* flags       */ 0,
   6476     },
   6477 #endif /* chips */
   6478 
   6479 #if defined(BCM_56260_A0)
   6480     { /* SOC_FORMAT_INT_SVM_METER_INDEX_EOP_BUFFER_BCM56260_A0fmt */ 
   6481         /* format            SVM_METER_INDEX_EOP_BUFFERfmt */
   6482         /* nFields     */ 4,
   6483         /* *fields     */ soc_SVM_METER_INDEX_EOP_BUFFER_BCM56260_A0fmt_fields,
   6484         /* bits        */ 28,
   6485         /* flags       */ 0,
   6486     },
   6487 #endif /* chips */
   6488 
   6489 #if defined(BCM_56260_B0)
   6490     { /* SOC_FORMAT_INT_SVM_METER_INDEX_EOP_BUFFER_BCM56260_B0fmt */ 
   6491         /* format            SVM_METER_INDEX_EOP_BUFFERfmt */
   6492         /* nFields     */ 4,
   6493         /* *fields     */ soc_SVM_METER_INDEX_EOP_BUFFER_BCM56260_A0fmt_fields,
   6494         /* bits        */ 28,
   6495         /* flags       */ 0,
   6496     },
   6497 #endif /* chips */
   6498 
   6499 #if defined(BCM_56270_A0)
   6500     { /* SOC_FORMAT_INT_SVM_METER_INDEX_EOP_BUFFER_BCM56270_A0fmt */ 
   6501         /* format            SVM_METER_INDEX_EOP_BUFFERfmt */
   6502         /* nFields     */ 6,
   6503         /* *fields     */ soc_SVM_METER_INDEX_EOP_BUFFER_BCM56270_A0fmt_fields,
   6504         /* bits        */ 28,
   6505         /* flags       */ 0,
   6506     },
   6507 #endif /* chips */
   6508 
   6509 #if defined(BCM_56340_A0)
   6510     { /* SOC_FORMAT_INT_SVM_METER_INDEX_EOP_BUFFER_BCM56340_A0fmt */ 
   6511         /* format            SVM_METER_INDEX_EOP_BUFFERfmt */
   6512         /* nFields     */ 4,
   6513         /* *fields     */ soc_SVM_METER_INDEX_EOP_BUFFER_BCM56450_A0fmt_fields,
   6514         /* bits        */ 28,
   6515         /* flags       */ 0,
   6516     },
   6517 #endif /* chips */
   6518 
   6519 #if defined(BCM_56450_A0)
   6520     { /* SOC_FORMAT_INT_SVM_METER_INDEX_EOP_BUFFER_BCM56450_A0fmt */ 
   6521         /* format            SVM_METER_INDEX_EOP_BUFFERfmt */
   6522         /* nFields     */ 4,
   6523         /* *fields     */ soc_SVM_METER_INDEX_EOP_BUFFER_BCM56450_A0fmt_fields,
   6524         /* bits        */ 28,
   6525         /* flags       */ 0,
   6526     },
   6527 #endif /* chips */
   6528 
   6529 #if defined(BCM_56450_B0)
   6530     { /* SOC_FORMAT_INT_SVM_METER_INDEX_EOP_BUFFER_BCM56450_B0fmt */ 
   6531         /* format            SVM_METER_INDEX_EOP_BUFFERfmt */
   6532         /* nFields     */ 4,
   6533         /* *fields     */ soc_SVM_METER_INDEX_EOP_BUFFER_BCM56450_A0fmt_fields,
   6534         /* bits        */ 28,
   6535         /* flags       */ 0,
   6536     },
   6537 #endif /* chips */
   6538 
   6539 #if defined(BCM_56450_B1)
   6540     { /* SOC_FORMAT_INT_SVM_METER_INDEX_EOP_BUFFER_BCM56450_B1fmt */ 
   6541         /* format            SVM_METER_INDEX_EOP_BUFFERfmt */
   6542         /* nFields     */ 4,
   6543         /* *fields     */ soc_SVM_METER_INDEX_EOP_BUFFER_BCM56450_A0fmt_fields,
   6544         /* bits        */ 28,
   6545         /* flags       */ 0,
   6546     },
   6547 #endif /* chips */
   6548 
   6549 #if defined(BCM_56560_A0)
   6550     { /* SOC_FORMAT_INT_SVM_METER_INDEX_EOP_BUFFER_BCM56560_A0fmt */ 
   6551         /* format            SVM_METER_INDEX_EOP_BUFFERfmt */
   6552         /* nFields     */ 6,
   6553         /* *fields     */ soc_SVM_METER_INDEX_EOP_BUFFER_BCM56560_A0fmt_fields,
   6554         /* bits        */ 32,
   6555         /* flags       */ 0,
   6556     },
   6557 #endif /* chips */
   6558 
   6559 #if defined(BCM_56560_B0)
   6560     { /* SOC_FORMAT_INT_SVM_METER_INDEX_EOP_BUFFER_BCM56560_B0fmt */ 
   6561         /* format            SVM_METER_INDEX_EOP_BUFFERfmt */
   6562         /* nFields     */ 6,
   6563         /* *fields     */ soc_SVM_METER_INDEX_EOP_BUFFER_BCM56560_A0fmt_fields,
   6564         /* bits        */ 32,
   6565         /* flags       */ 0,
   6566     },
   6567 #endif /* chips */
   6568 
   6569 #if defined(BCM_56640_A0)
   6570     { /* SOC_FORMAT_INT_SVM_METER_INDEX_EOP_BUFFER_BCM56640_A0fmt */ 
   6571         /* format            SVM_METER_INDEX_EOP_BUFFERfmt */
   6572         /* nFields     */ 4,
   6573         /* *fields     */ soc_SVM_METER_INDEX_EOP_BUFFER_BCM56640_A0fmt_fields,
   6574         /* bits        */ 32,
   6575         /* flags       */ 0,
   6576     },
   6577 #endif /* chips */
   6578 
   6579 #if defined(BCM_56670_A0)
   6580     { /* SOC_FORMAT_INT_SVM_METER_INDEX_EOP_BUFFER_BCM56670_A0fmt */ 
   6581         /* format            SVM_METER_INDEX_EOP_BUFFERfmt */
   6582         /* nFields     */ 6,
   6583         /* *fields     */ soc_SVM_METER_INDEX_EOP_BUFFER_BCM56670_A0fmt_fields,
   6584         /* bits        */ 32,
   6585         /* flags       */ 0,
   6586     },
   6587 #endif /* chips */
   6588 
   6589 #if defined(BCM_56670_B0)
   6590     { /* SOC_FORMAT_INT_SVM_METER_INDEX_EOP_BUFFER_BCM56670_B0fmt */ 
   6591         /* format            SVM_METER_INDEX_EOP_BUFFERfmt */
   6592         /* nFields     */ 6,
   6593         /* *fields     */ soc_SVM_METER_INDEX_EOP_BUFFER_BCM56670_A0fmt_fields,
   6594         /* bits        */ 32,
   6595         /* flags       */ 0,
   6596     },
   6597 #endif /* chips */
   6598 
   6599 #if defined(BCM_56440_A0) || defined(BCM_56440_B0)
   6600     { /* SOC_FORMAT_INT_SVM_METER_INFO_FROM_SOURCEfmt */ 
   6601         /* format            SVM_METER_INFO_FROM_SOURCEfmt */
   6602         /* nFields     */ 2,
   6603         /* *fields     */ soc_SVM_METER_INFO_FROM_SOURCEfmt_fields,
   6604         /* bits        */ 15,
   6605         /* flags       */ 0,
   6606     },
   6607 #endif /* chips */
   6608 
   6609 #if defined(BCM_53570_A0)
   6610     { /* SOC_FORMAT_INT_SVM_METER_INFO_FROM_SOURCE_BCM53570_A0fmt */ 
   6611         /* format            SVM_METER_INFO_FROM_SOURCEfmt */
   6612         /* nFields     */ 2,
   6613         /* *fields     */ soc_SVM_METER_INFO_FROM_SOURCE_BCM53570_A0fmt_fields,
   6614         /* bits        */ 14,
   6615         /* flags       */ 0,
   6616     },
   6617 #endif /* chips */
   6618 
   6619 #if defined(BCM_53570_B0)
   6620     { /* SOC_FORMAT_INT_SVM_METER_INFO_FROM_SOURCE_BCM53570_B0fmt */ 
   6621         /* format            SVM_METER_INFO_FROM_SOURCEfmt */
   6622         /* nFields     */ 2,
   6623         /* *fields     */ soc_SVM_METER_INFO_FROM_SOURCE_BCM53570_A0fmt_fields,
   6624         /* bits        */ 14,
   6625         /* flags       */ 0,
   6626     },
   6627 #endif /* chips */
   6628 
   6629 #if defined(BCM_56260_A0)
   6630     { /* SOC_FORMAT_INT_SVM_METER_INFO_FROM_SOURCE_BCM56260_A0fmt */ 
   6631         /* format            SVM_METER_INFO_FROM_SOURCEfmt */
   6632         /* nFields     */ 2,
   6633         /* *fields     */ soc_SVM_METER_INFO_FROM_SOURCE_BCM56260_A0fmt_fields,
   6634         /* bits        */ 15,
   6635         /* flags       */ 0,
   6636     },
   6637 #endif /* chips */
   6638 
   6639 #if defined(BCM_56260_B0)
   6640     { /* SOC_FORMAT_INT_SVM_METER_INFO_FROM_SOURCE_BCM56260_B0fmt */ 
   6641         /* format            SVM_METER_INFO_FROM_SOURCEfmt */
   6642         /* nFields     */ 2,
   6643         /* *fields     */ soc_SVM_METER_INFO_FROM_SOURCE_BCM56260_A0fmt_fields,
   6644         /* bits        */ 15,
   6645         /* flags       */ 0,
   6646     },
   6647 #endif /* chips */
   6648 
   6649 #if defined(BCM_56270_A0)
   6650     { /* SOC_FORMAT_INT_SVM_METER_INFO_FROM_SOURCE_BCM56270_A0fmt */ 
   6651         /* format            SVM_METER_INFO_FROM_SOURCEfmt */
   6652         /* nFields     */ 3,
   6653         /* *fields     */ soc_SVM_METER_INFO_FROM_SOURCE_BCM56270_A0fmt_fields,
   6654         /* bits        */ 15,
   6655         /* flags       */ 0,
   6656     },
   6657 #endif /* chips */
   6658 
   6659 #if defined(BCM_56340_A0)
   6660     { /* SOC_FORMAT_INT_SVM_METER_INFO_FROM_SOURCE_BCM56340_A0fmt */ 
   6661         /* format            SVM_METER_INFO_FROM_SOURCEfmt */
   6662         /* nFields     */ 2,
   6663         /* *fields     */ soc_SVM_METER_INFO_FROM_SOURCE_BCM56450_A0fmt_fields,
   6664         /* bits        */ 15,
   6665         /* flags       */ 0,
   6666     },
   6667 #endif /* chips */
   6668 
   6669 #if defined(BCM_56450_A0)
   6670     { /* SOC_FORMAT_INT_SVM_METER_INFO_FROM_SOURCE_BCM56450_A0fmt */ 
   6671         /* format            SVM_METER_INFO_FROM_SOURCEfmt */
   6672         /* nFields     */ 2,
   6673         /* *fields     */ soc_SVM_METER_INFO_FROM_SOURCE_BCM56450_A0fmt_fields,
   6674         /* bits        */ 15,
   6675         /* flags       */ 0,
   6676     },
   6677 #endif /* chips */
   6678 
   6679 #if defined(BCM_56450_B0)
   6680     { /* SOC_FORMAT_INT_SVM_METER_INFO_FROM_SOURCE_BCM56450_B0fmt */ 
   6681         /* format            SVM_METER_INFO_FROM_SOURCEfmt */
   6682         /* nFields     */ 2,
   6683         /* *fields     */ soc_SVM_METER_INFO_FROM_SOURCE_BCM56450_A0fmt_fields,
   6684         /* bits        */ 15,
   6685         /* flags       */ 0,
   6686     },
   6687 #endif /* chips */
   6688 
   6689 #if defined(BCM_56450_B1)
   6690     { /* SOC_FORMAT_INT_SVM_METER_INFO_FROM_SOURCE_BCM56450_B1fmt */ 
   6691         /* format            SVM_METER_INFO_FROM_SOURCEfmt */
   6692         /* nFields     */ 2,
   6693         /* *fields     */ soc_SVM_METER_INFO_FROM_SOURCE_BCM56450_A0fmt_fields,
   6694         /* bits        */ 15,
   6695         /* flags       */ 0,
   6696     },
   6697 #endif /* chips */
   6698 
   6699 #if defined(BCM_56560_A0)
   6700     { /* SOC_FORMAT_INT_SVM_METER_INFO_FROM_SOURCE_BCM56560_A0fmt */ 
   6701         /* format            SVM_METER_INFO_FROM_SOURCEfmt */
   6702         /* nFields     */ 3,
   6703         /* *fields     */ soc_SVM_METER_INFO_FROM_SOURCE_BCM56560_A0fmt_fields,
   6704         /* bits        */ 18,
   6705         /* flags       */ 0,
   6706     },
   6707 #endif /* chips */
   6708 
   6709 #if defined(BCM_56560_B0)
   6710     { /* SOC_FORMAT_INT_SVM_METER_INFO_FROM_SOURCE_BCM56560_B0fmt */ 
   6711         /* format            SVM_METER_INFO_FROM_SOURCEfmt */
   6712         /* nFields     */ 3,
   6713         /* *fields     */ soc_SVM_METER_INFO_FROM_SOURCE_BCM56560_A0fmt_fields,
   6714         /* bits        */ 18,
   6715         /* flags       */ 0,
   6716     },
   6717 #endif /* chips */
   6718 
   6719 #if defined(BCM_56640_A0)
   6720     { /* SOC_FORMAT_INT_SVM_METER_INFO_FROM_SOURCE_BCM56640_A0fmt */ 
   6721         /* format            SVM_METER_INFO_FROM_SOURCEfmt */
   6722         /* nFields     */ 2,
   6723         /* *fields     */ soc_SVM_METER_INFO_FROM_SOURCE_BCM56640_A0fmt_fields,
   6724         /* bits        */ 17,
   6725         /* flags       */ 0,
   6726     },
   6727 #endif /* chips */
   6728 
   6729 #if defined(BCM_56670_A0)
   6730     { /* SOC_FORMAT_INT_SVM_METER_INFO_FROM_SOURCE_BCM56670_A0fmt */ 
   6731         /* format            SVM_METER_INFO_FROM_SOURCEfmt */
   6732         /* nFields     */ 3,
   6733         /* *fields     */ soc_SVM_METER_INFO_FROM_SOURCE_BCM56670_A0fmt_fields,
   6734         /* bits        */ 18,
   6735         /* flags       */ 0,
   6736     },
   6737 #endif /* chips */
   6738 
   6739 #if defined(BCM_56670_B0)
   6740     { /* SOC_FORMAT_INT_SVM_METER_INFO_FROM_SOURCE_BCM56670_B0fmt */ 
   6741         /* format            SVM_METER_INFO_FROM_SOURCEfmt */
   6742         /* nFields     */ 3,
   6743         /* *fields     */ soc_SVM_METER_INFO_FROM_SOURCE_BCM56670_A0fmt_fields,
   6744         /* bits        */ 18,
   6745         /* flags       */ 0,
   6746     },
   6747 #endif /* chips */
   6748 
   6749 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) || \
   6750     defined(BCM_56850_A0) || defined(BCM_56860_A0)
   6751     { /* SOC_FORMAT_INT_SVM_METER_TABLE_COV_DEFSfmt */ 
   6752         /* format            SVM_METER_TABLE_COV_DEFSfmt */
   6753         /* nFields     */ 7,
   6754         /* *fields     */ soc_SVM_METER_TABLE_COV_DEFSfmt_fields,
   6755         /* bits        */ 35,
   6756         /* flags       */ 0,
   6757     },
   6758 #endif /* chips */
   6759 
   6760 #if defined(BCM_56370_A0)
   6761     { /* SOC_FORMAT_INT_SVM_METER_TABLE_COV_DEFS_BCM56370_A0fmt */ 
   6762         /* format            SVM_METER_TABLE_COV_DEFSfmt */
   6763         /* nFields     */ 7,
   6764         /* *fields     */ soc_SVM_METER_TABLE_COV_DEFS_BCM56960_A0fmt_fields,
   6765         /* bits        */ 35,
   6766         /* flags       */ 0,
   6767     },
   6768 #endif /* chips */
   6769 
   6770 #if defined(BCM_56560_A0)
   6771     { /* SOC_FORMAT_INT_SVM_METER_TABLE_COV_DEFS_BCM56560_A0fmt */ 
   6772         /* format            SVM_METER_TABLE_COV_DEFSfmt */
   6773         /* nFields     */ 7,
   6774         /* *fields     */ soc_SVM_METER_TABLE_COV_DEFS_BCM56960_A0fmt_fields,
   6775         /* bits        */ 35,
   6776         /* flags       */ 0,
   6777     },
   6778 #endif /* chips */
   6779 
   6780 #if defined(BCM_56560_B0)
   6781     { /* SOC_FORMAT_INT_SVM_METER_TABLE_COV_DEFS_BCM56560_B0fmt */ 
   6782         /* format            SVM_METER_TABLE_COV_DEFSfmt */
   6783         /* nFields     */ 7,
   6784         /* *fields     */ soc_SVM_METER_TABLE_COV_DEFS_BCM56960_A0fmt_fields,
   6785         /* bits        */ 35,
   6786         /* flags       */ 0,
   6787     },
   6788 #endif /* chips */
   6789 
   6790 #if defined(BCM_56670_A0)
   6791     { /* SOC_FORMAT_INT_SVM_METER_TABLE_COV_DEFS_BCM56670_A0fmt */ 
   6792         /* format            SVM_METER_TABLE_COV_DEFSfmt */
   6793         /* nFields     */ 7,
   6794         /* *fields     */ soc_SVM_METER_TABLE_COV_DEFS_BCM56960_A0fmt_fields,
   6795         /* bits        */ 35,
   6796         /* flags       */ 0,
   6797     },
   6798 #endif /* chips */
   6799 
   6800 #if defined(BCM_56670_B0)
   6801     { /* SOC_FORMAT_INT_SVM_METER_TABLE_COV_DEFS_BCM56670_B0fmt */ 
   6802         /* format            SVM_METER_TABLE_COV_DEFSfmt */
   6803         /* nFields     */ 7,
   6804         /* *fields     */ soc_SVM_METER_TABLE_COV_DEFS_BCM56960_A0fmt_fields,
   6805         /* bits        */ 35,
   6806         /* flags       */ 0,
   6807     },
   6808 #endif /* chips */
   6809 
   6810 #if defined(BCM_56770_A0)
   6811     { /* SOC_FORMAT_INT_SVM_METER_TABLE_COV_DEFS_BCM56770_A0fmt */ 
   6812         /* format            SVM_METER_TABLE_COV_DEFSfmt */
   6813         /* nFields     */ 7,
   6814         /* *fields     */ soc_SVM_METER_TABLE_COV_DEFS_BCM56960_A0fmt_fields,
   6815         /* bits        */ 35,
   6816         /* flags       */ 0,
   6817     },
   6818 #endif /* chips */
   6819 
   6820 #if defined(BCM_56870_A0)
   6821     { /* SOC_FORMAT_INT_SVM_METER_TABLE_COV_DEFS_BCM56870_A0fmt */ 
   6822         /* format            SVM_METER_TABLE_COV_DEFSfmt */
   6823         /* nFields     */ 7,
   6824         /* *fields     */ soc_SVM_METER_TABLE_COV_DEFS_BCM56960_A0fmt_fields,
   6825         /* bits        */ 35,
   6826         /* flags       */ 0,
   6827     },
   6828 #endif /* chips */
   6829 
   6830 #if defined(BCM_56960_A0)
   6831     { /* SOC_FORMAT_INT_SVM_METER_TABLE_COV_DEFS_BCM56960_A0fmt */ 
   6832         /* format            SVM_METER_TABLE_COV_DEFSfmt */
   6833         /* nFields     */ 7,
   6834         /* *fields     */ soc_SVM_METER_TABLE_COV_DEFS_BCM56960_A0fmt_fields,
   6835         /* bits        */ 35,
   6836         /* flags       */ 0,
   6837     },
   6838 #endif /* chips */
   6839 
   6840 #if defined(BCM_56965_A0)
   6841     { /* SOC_FORMAT_INT_SVM_METER_TABLE_COV_DEFS_BCM56965_A0fmt */ 
   6842         /* format            SVM_METER_TABLE_COV_DEFSfmt */
   6843         /* nFields     */ 7,
   6844         /* *fields     */ soc_SVM_METER_TABLE_COV_DEFS_BCM56960_A0fmt_fields,
   6845         /* bits        */ 35,
   6846         /* flags       */ 0,
   6847     },
   6848 #endif /* chips */
   6849 
   6850 #if defined(BCM_56440_A0)
   6851     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_CTRL_BUSfmt */ 
   6852         /* format            SVM_MTR_PIPE_CTRL_BUSfmt */
   6853         /* nFields     */ 22,
   6854         /* *fields     */ soc_SVM_MTR_PIPE_CTRL_BUSfmt_fields,
   6855         /* bits        */ 114,
   6856         /* flags       */ 0,
   6857     },
   6858 #endif /* chips */
   6859 
   6860 #if defined(BCM_56260_A0)
   6861     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_CTRL_BUS_BCM56260_A0fmt */ 
   6862         /* format            SVM_MTR_PIPE_CTRL_BUSfmt */
   6863         /* nFields     */ 22,
   6864         /* *fields     */ soc_SVM_MTR_PIPE_CTRL_BUS_BCM56260_A0fmt_fields,
   6865         /* bits        */ 114,
   6866         /* flags       */ 0,
   6867     },
   6868 #endif /* chips */
   6869 
   6870 #if defined(BCM_56260_B0)
   6871     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_CTRL_BUS_BCM56260_B0fmt */ 
   6872         /* format            SVM_MTR_PIPE_CTRL_BUSfmt */
   6873         /* nFields     */ 22,
   6874         /* *fields     */ soc_SVM_MTR_PIPE_CTRL_BUS_BCM56260_A0fmt_fields,
   6875         /* bits        */ 114,
   6876         /* flags       */ 0,
   6877     },
   6878 #endif /* chips */
   6879 
   6880 #if defined(BCM_56270_A0)
   6881     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_CTRL_BUS_BCM56270_A0fmt */ 
   6882         /* format            SVM_MTR_PIPE_CTRL_BUSfmt */
   6883         /* nFields     */ 24,
   6884         /* *fields     */ soc_SVM_MTR_PIPE_CTRL_BUS_BCM56270_A0fmt_fields,
   6885         /* bits        */ 114,
   6886         /* flags       */ 0,
   6887     },
   6888 #endif /* chips */
   6889 
   6890 #if defined(BCM_56340_A0)
   6891     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_CTRL_BUS_BCM56340_A0fmt */ 
   6892         /* format            SVM_MTR_PIPE_CTRL_BUSfmt */
   6893         /* nFields     */ 22,
   6894         /* *fields     */ soc_SVM_MTR_PIPE_CTRL_BUS_BCM56450_A0fmt_fields,
   6895         /* bits        */ 114,
   6896         /* flags       */ 0,
   6897     },
   6898 #endif /* chips */
   6899 
   6900 #if defined(BCM_56440_B0)
   6901     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_CTRL_BUS_BCM56440_B0fmt */ 
   6902         /* format            SVM_MTR_PIPE_CTRL_BUSfmt */
   6903         /* nFields     */ 22,
   6904         /* *fields     */ soc_SVM_MTR_PIPE_CTRL_BUSfmt_fields,
   6905         /* bits        */ 114,
   6906         /* flags       */ 0,
   6907     },
   6908 #endif /* chips */
   6909 
   6910 #if defined(BCM_56450_A0)
   6911     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_CTRL_BUS_BCM56450_A0fmt */ 
   6912         /* format            SVM_MTR_PIPE_CTRL_BUSfmt */
   6913         /* nFields     */ 22,
   6914         /* *fields     */ soc_SVM_MTR_PIPE_CTRL_BUS_BCM56450_A0fmt_fields,
   6915         /* bits        */ 114,
   6916         /* flags       */ 0,
   6917     },
   6918 #endif /* chips */
   6919 
   6920 #if defined(BCM_56450_B0)
   6921     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_CTRL_BUS_BCM56450_B0fmt */ 
   6922         /* format            SVM_MTR_PIPE_CTRL_BUSfmt */
   6923         /* nFields     */ 22,
   6924         /* *fields     */ soc_SVM_MTR_PIPE_CTRL_BUS_BCM56450_A0fmt_fields,
   6925         /* bits        */ 114,
   6926         /* flags       */ 0,
   6927     },
   6928 #endif /* chips */
   6929 
   6930 #if defined(BCM_56450_B1)
   6931     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_CTRL_BUS_BCM56450_B1fmt */ 
   6932         /* format            SVM_MTR_PIPE_CTRL_BUSfmt */
   6933         /* nFields     */ 22,
   6934         /* *fields     */ soc_SVM_MTR_PIPE_CTRL_BUS_BCM56450_A0fmt_fields,
   6935         /* bits        */ 114,
   6936         /* flags       */ 0,
   6937     },
   6938 #endif /* chips */
   6939 
   6940 #if defined(BCM_56560_A0)
   6941     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_CTRL_BUS_BCM56560_A0fmt */ 
   6942         /* format            SVM_MTR_PIPE_CTRL_BUSfmt */
   6943         /* nFields     */ 22,
   6944         /* *fields     */ soc_SVM_MTR_PIPE_CTRL_BUS_BCM56560_A0fmt_fields,
   6945         /* bits        */ 118,
   6946         /* flags       */ 0,
   6947     },
   6948 #endif /* chips */
   6949 
   6950 #if defined(BCM_56560_B0)
   6951     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_CTRL_BUS_BCM56560_B0fmt */ 
   6952         /* format            SVM_MTR_PIPE_CTRL_BUSfmt */
   6953         /* nFields     */ 22,
   6954         /* *fields     */ soc_SVM_MTR_PIPE_CTRL_BUS_BCM56560_A0fmt_fields,
   6955         /* bits        */ 118,
   6956         /* flags       */ 0,
   6957     },
   6958 #endif /* chips */
   6959 
   6960 #if defined(BCM_56640_A0)
   6961     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_CTRL_BUS_BCM56640_A0fmt */ 
   6962         /* format            SVM_MTR_PIPE_CTRL_BUSfmt */
   6963         /* nFields     */ 22,
   6964         /* *fields     */ soc_SVM_MTR_PIPE_CTRL_BUS_BCM56640_A0fmt_fields,
   6965         /* bits        */ 116,
   6966         /* flags       */ 0,
   6967     },
   6968 #endif /* chips */
   6969 
   6970 #if defined(BCM_56670_A0)
   6971     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_CTRL_BUS_BCM56670_A0fmt */ 
   6972         /* format            SVM_MTR_PIPE_CTRL_BUSfmt */
   6973         /* nFields     */ 22,
   6974         /* *fields     */ soc_SVM_MTR_PIPE_CTRL_BUS_BCM56560_A0fmt_fields,
   6975         /* bits        */ 118,
   6976         /* flags       */ 0,
   6977     },
   6978 #endif /* chips */
   6979 
   6980 #if defined(BCM_56670_B0)
   6981     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_CTRL_BUS_BCM56670_B0fmt */ 
   6982         /* format            SVM_MTR_PIPE_CTRL_BUSfmt */
   6983         /* nFields     */ 22,
   6984         /* *fields     */ soc_SVM_MTR_PIPE_CTRL_BUS_BCM56560_A0fmt_fields,
   6985         /* bits        */ 118,
   6986         /* flags       */ 0,
   6987     },
   6988 #endif /* chips */
   6989 
   6990 #if defined(BCM_56440_A0)
   6991     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_DATA_BUSfmt */ 
   6992         /* format            SVM_MTR_PIPE_DATA_BUSfmt */
   6993         /* nFields     */ 10,
   6994         /* *fields     */ soc_SVM_MTR_PIPE_DATA_BUSfmt_fields,
   6995         /* bits        */ 152,
   6996         /* flags       */ 0,
   6997     },
   6998 #endif /* chips */
   6999 
   7000 #if defined(BCM_56260_A0)
   7001     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_DATA_BUS_BCM56260_A0fmt */ 
   7002         /* format            SVM_MTR_PIPE_DATA_BUSfmt */
   7003         /* nFields     */ 10,
   7004         /* *fields     */ soc_SVM_MTR_PIPE_DATA_BUS_BCM56560_A0fmt_fields,
   7005         /* bits        */ 152,
   7006         /* flags       */ 0,
   7007     },
   7008 #endif /* chips */
   7009 
   7010 #if defined(BCM_56260_B0)
   7011     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_DATA_BUS_BCM56260_B0fmt */ 
   7012         /* format            SVM_MTR_PIPE_DATA_BUSfmt */
   7013         /* nFields     */ 10,
   7014         /* *fields     */ soc_SVM_MTR_PIPE_DATA_BUS_BCM56560_A0fmt_fields,
   7015         /* bits        */ 152,
   7016         /* flags       */ 0,
   7017     },
   7018 #endif /* chips */
   7019 
   7020 #if defined(BCM_56270_A0)
   7021     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_DATA_BUS_BCM56270_A0fmt */ 
   7022         /* format            SVM_MTR_PIPE_DATA_BUSfmt */
   7023         /* nFields     */ 10,
   7024         /* *fields     */ soc_SVM_MTR_PIPE_DATA_BUS_BCM56560_A0fmt_fields,
   7025         /* bits        */ 152,
   7026         /* flags       */ 0,
   7027     },
   7028 #endif /* chips */
   7029 
   7030 #if defined(BCM_56340_A0)
   7031     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_DATA_BUS_BCM56340_A0fmt */ 
   7032         /* format            SVM_MTR_PIPE_DATA_BUSfmt */
   7033         /* nFields     */ 10,
   7034         /* *fields     */ soc_SVM_MTR_PIPE_DATA_BUS_BCM56640_A0fmt_fields,
   7035         /* bits        */ 152,
   7036         /* flags       */ 0,
   7037     },
   7038 #endif /* chips */
   7039 
   7040 #if defined(BCM_56440_B0)
   7041     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_DATA_BUS_BCM56440_B0fmt */ 
   7042         /* format            SVM_MTR_PIPE_DATA_BUSfmt */
   7043         /* nFields     */ 10,
   7044         /* *fields     */ soc_SVM_MTR_PIPE_DATA_BUSfmt_fields,
   7045         /* bits        */ 152,
   7046         /* flags       */ 0,
   7047     },
   7048 #endif /* chips */
   7049 
   7050 #if defined(BCM_56450_A0)
   7051     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_DATA_BUS_BCM56450_A0fmt */ 
   7052         /* format            SVM_MTR_PIPE_DATA_BUSfmt */
   7053         /* nFields     */ 10,
   7054         /* *fields     */ soc_SVM_MTR_PIPE_DATA_BUS_BCM56640_A0fmt_fields,
   7055         /* bits        */ 152,
   7056         /* flags       */ 0,
   7057     },
   7058 #endif /* chips */
   7059 
   7060 #if defined(BCM_56450_B0)
   7061     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_DATA_BUS_BCM56450_B0fmt */ 
   7062         /* format            SVM_MTR_PIPE_DATA_BUSfmt */
   7063         /* nFields     */ 10,
   7064         /* *fields     */ soc_SVM_MTR_PIPE_DATA_BUS_BCM56640_A0fmt_fields,
   7065         /* bits        */ 152,
   7066         /* flags       */ 0,
   7067     },
   7068 #endif /* chips */
   7069 
   7070 #if defined(BCM_56450_B1)
   7071     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_DATA_BUS_BCM56450_B1fmt */ 
   7072         /* format            SVM_MTR_PIPE_DATA_BUSfmt */
   7073         /* nFields     */ 10,
   7074         /* *fields     */ soc_SVM_MTR_PIPE_DATA_BUS_BCM56640_A0fmt_fields,
   7075         /* bits        */ 152,
   7076         /* flags       */ 0,
   7077     },
   7078 #endif /* chips */
   7079 
   7080 #if defined(BCM_56560_A0)
   7081     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_DATA_BUS_BCM56560_A0fmt */ 
   7082         /* format            SVM_MTR_PIPE_DATA_BUSfmt */
   7083         /* nFields     */ 10,
   7084         /* *fields     */ soc_SVM_MTR_PIPE_DATA_BUS_BCM56560_A0fmt_fields,
   7085         /* bits        */ 152,
   7086         /* flags       */ 0,
   7087     },
   7088 #endif /* chips */
   7089 
   7090 #if defined(BCM_56560_B0)
   7091     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_DATA_BUS_BCM56560_B0fmt */ 
   7092         /* format            SVM_MTR_PIPE_DATA_BUSfmt */
   7093         /* nFields     */ 10,
   7094         /* *fields     */ soc_SVM_MTR_PIPE_DATA_BUS_BCM56560_A0fmt_fields,
   7095         /* bits        */ 152,
   7096         /* flags       */ 0,
   7097     },
   7098 #endif /* chips */
   7099 
   7100 #if defined(BCM_56640_A0)
   7101     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_DATA_BUS_BCM56640_A0fmt */ 
   7102         /* format            SVM_MTR_PIPE_DATA_BUSfmt */
   7103         /* nFields     */ 10,
   7104         /* *fields     */ soc_SVM_MTR_PIPE_DATA_BUS_BCM56640_A0fmt_fields,
   7105         /* bits        */ 152,
   7106         /* flags       */ 0,
   7107     },
   7108 #endif /* chips */
   7109 
   7110 #if defined(BCM_56670_A0)
   7111     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_DATA_BUS_BCM56670_A0fmt */ 
   7112         /* format            SVM_MTR_PIPE_DATA_BUSfmt */
   7113         /* nFields     */ 10,
   7114         /* *fields     */ soc_SVM_MTR_PIPE_DATA_BUS_BCM56560_A0fmt_fields,
   7115         /* bits        */ 152,
   7116         /* flags       */ 0,
   7117     },
   7118 #endif /* chips */
   7119 
   7120 #if defined(BCM_56670_B0)
   7121     { /* SOC_FORMAT_INT_SVM_MTR_PIPE_DATA_BUS_BCM56670_B0fmt */ 
   7122         /* format            SVM_MTR_PIPE_DATA_BUSfmt */
   7123         /* nFields     */ 10,
   7124         /* *fields     */ soc_SVM_MTR_PIPE_DATA_BUS_BCM56560_A0fmt_fields,
   7125         /* bits        */ 152,
   7126         /* flags       */ 0,
   7127     },
   7128 #endif /* chips */
   7129 
   7130 #if defined(BCM_56440_A0) || defined(BCM_56440_B0)
   7131     { /* SOC_FORMAT_INT_SVM_OUT_BUSfmt */ 
   7132         /* format            SVM_OUT_BUSfmt */
   7133         /* nFields     */ 8,
   7134         /* *fields     */ soc_SVM_OUT_BUSfmt_fields,
   7135         /* bits        */ 29,
   7136         /* flags       */ 0,
   7137     },
   7138 #endif /* chips */
   7139 
   7140 #if defined(BCM_53570_A0)
   7141     { /* SOC_FORMAT_INT_SVM_OUT_BUS_BCM53570_A0fmt */ 
   7142         /* format            SVM_OUT_BUSfmt */
   7143         /* nFields     */ 3,
   7144         /* *fields     */ soc_SVM_OUT_BUS_BCM53570_A0fmt_fields,
   7145         /* bits        */ 41,
   7146         /* flags       */ 0,
   7147     },
   7148 #endif /* chips */
   7149 
   7150 #if defined(BCM_53570_B0)
   7151     { /* SOC_FORMAT_INT_SVM_OUT_BUS_BCM53570_B0fmt */ 
   7152         /* format            SVM_OUT_BUSfmt */
   7153         /* nFields     */ 3,
   7154         /* *fields     */ soc_SVM_OUT_BUS_BCM53570_A0fmt_fields,
   7155         /* bits        */ 41,
   7156         /* flags       */ 0,
   7157     },
   7158 #endif /* chips */
   7159 
   7160 #if defined(BCM_56260_A0)
   7161     { /* SOC_FORMAT_INT_SVM_OUT_BUS_BCM56260_A0fmt */ 
   7162         /* format            SVM_OUT_BUSfmt */
   7163         /* nFields     */ 8,
   7164         /* *fields     */ soc_SVM_OUT_BUS_BCM56560_A0fmt_fields,
   7165         /* bits        */ 29,
   7166         /* flags       */ 0,
   7167     },
   7168 #endif /* chips */
   7169 
   7170 #if defined(BCM_56260_B0)
   7171     { /* SOC_FORMAT_INT_SVM_OUT_BUS_BCM56260_B0fmt */ 
   7172         /* format            SVM_OUT_BUSfmt */
   7173         /* nFields     */ 8,
   7174         /* *fields     */ soc_SVM_OUT_BUS_BCM56560_A0fmt_fields,
   7175         /* bits        */ 29,
   7176         /* flags       */ 0,
   7177     },
   7178 #endif /* chips */
   7179 
   7180 #if defined(BCM_56270_A0)
   7181     { /* SOC_FORMAT_INT_SVM_OUT_BUS_BCM56270_A0fmt */ 
   7182         /* format            SVM_OUT_BUSfmt */
   7183         /* nFields     */ 8,
   7184         /* *fields     */ soc_SVM_OUT_BUS_BCM56560_A0fmt_fields,
   7185         /* bits        */ 29,
   7186         /* flags       */ 0,
   7187     },
   7188 #endif /* chips */
   7189 
   7190 #if defined(BCM_56340_A0)
   7191     { /* SOC_FORMAT_INT_SVM_OUT_BUS_BCM56340_A0fmt */ 
   7192         /* format            SVM_OUT_BUSfmt */
   7193         /* nFields     */ 3,
   7194         /* *fields     */ soc_SVM_OUT_BUS_BCM56640_A0fmt_fields,
   7195         /* bits        */ 25,
   7196         /* flags       */ 0,
   7197     },
   7198 #endif /* chips */
   7199 
   7200 #if defined(BCM_56450_A0)
   7201     { /* SOC_FORMAT_INT_SVM_OUT_BUS_BCM56450_A0fmt */ 
   7202         /* format            SVM_OUT_BUSfmt */
   7203         /* nFields     */ 8,
   7204         /* *fields     */ soc_SVM_OUT_BUS_BCM56450_A0fmt_fields,
   7205         /* bits        */ 29,
   7206         /* flags       */ 0,
   7207     },
   7208 #endif /* chips */
   7209 
   7210 #if defined(BCM_56450_B0)
   7211     { /* SOC_FORMAT_INT_SVM_OUT_BUS_BCM56450_B0fmt */ 
   7212         /* format            SVM_OUT_BUSfmt */
   7213         /* nFields     */ 8,
   7214         /* *fields     */ soc_SVM_OUT_BUS_BCM56450_A0fmt_fields,
   7215         /* bits        */ 29,
   7216         /* flags       */ 0,
   7217     },
   7218 #endif /* chips */
   7219 
   7220 #if defined(BCM_56450_B1)
   7221     { /* SOC_FORMAT_INT_SVM_OUT_BUS_BCM56450_B1fmt */ 
   7222         /* format            SVM_OUT_BUSfmt */
   7223         /* nFields     */ 8,
   7224         /* *fields     */ soc_SVM_OUT_BUS_BCM56450_A0fmt_fields,
   7225         /* bits        */ 29,
   7226         /* flags       */ 0,
   7227     },
   7228 #endif /* chips */
   7229 
   7230 #if defined(BCM_56560_A0)
   7231     { /* SOC_FORMAT_INT_SVM_OUT_BUS_BCM56560_A0fmt */ 
   7232         /* format            SVM_OUT_BUSfmt */
   7233         /* nFields     */ 8,
   7234         /* *fields     */ soc_SVM_OUT_BUS_BCM56560_A0fmt_fields,
   7235         /* bits        */ 29,
   7236         /* flags       */ 0,
   7237     },
   7238 #endif /* chips */
   7239 
   7240 #if defined(BCM_56560_B0)
   7241     { /* SOC_FORMAT_INT_SVM_OUT_BUS_BCM56560_B0fmt */ 
   7242         /* format            SVM_OUT_BUSfmt */
   7243         /* nFields     */ 8,
   7244         /* *fields     */ soc_SVM_OUT_BUS_BCM56560_A0fmt_fields,
   7245         /* bits        */ 29,
   7246         /* flags       */ 0,
   7247     },
   7248 #endif /* chips */
   7249 
   7250 #if defined(BCM_56640_A0)
   7251     { /* SOC_FORMAT_INT_SVM_OUT_BUS_BCM56640_A0fmt */ 
   7252         /* format            SVM_OUT_BUSfmt */
   7253         /* nFields     */ 3,
   7254         /* *fields     */ soc_SVM_OUT_BUS_BCM56640_A0fmt_fields,
   7255         /* bits        */ 25,
   7256         /* flags       */ 0,
   7257     },
   7258 #endif /* chips */
   7259 
   7260 #if defined(BCM_56670_A0)
   7261     { /* SOC_FORMAT_INT_SVM_OUT_BUS_BCM56670_A0fmt */ 
   7262         /* format            SVM_OUT_BUSfmt */
   7263         /* nFields     */ 8,
   7264         /* *fields     */ soc_SVM_OUT_BUS_BCM56560_A0fmt_fields,
   7265         /* bits        */ 29,
   7266         /* flags       */ 0,
   7267     },
   7268 #endif /* chips */
   7269 
   7270 #if defined(BCM_56670_B0)
   7271     { /* SOC_FORMAT_INT_SVM_OUT_BUS_BCM56670_B0fmt */ 
   7272         /* format            SVM_OUT_BUSfmt */
   7273         /* nFields     */ 8,
   7274         /* *fields     */ soc_SVM_OUT_BUS_BCM56560_A0fmt_fields,
   7275         /* bits        */ 29,
   7276         /* flags       */ 0,
   7277     },
   7278 #endif /* chips */
   7279 
   7280 #if defined(BCM_56440_A0)
   7281     { /* SOC_FORMAT_INT_SVM_PKT_ATTRfmt */ 
   7282         /* format            SVM_PKT_ATTRfmt */
   7283         /* nFields     */ 11,
   7284         /* *fields     */ soc_SVM_PKT_ATTRfmt_fields,
   7285         /* bits        */ 37,
   7286         /* flags       */ 0,
   7287     },
   7288 #endif /* chips */
   7289 
   7290 #if defined(BCM_53570_A0)
   7291     { /* SOC_FORMAT_INT_SVM_PKT_ATTR_BCM53570_A0fmt */ 
   7292         /* format            SVM_PKT_ATTRfmt */
   7293         /* nFields     */ 10,
   7294         /* *fields     */ soc_SVM_PKT_ATTR_BCM53570_A0fmt_fields,
   7295         /* bits        */ 54,
   7296         /* flags       */ 0,
   7297     },
   7298 #endif /* chips */
   7299 
   7300 #if defined(BCM_53570_B0)
   7301     { /* SOC_FORMAT_INT_SVM_PKT_ATTR_BCM53570_B0fmt */ 
   7302         /* format            SVM_PKT_ATTRfmt */
   7303         /* nFields     */ 10,
   7304         /* *fields     */ soc_SVM_PKT_ATTR_BCM53570_A0fmt_fields,
   7305         /* bits        */ 54,
   7306         /* flags       */ 0,
   7307     },
   7308 #endif /* chips */
   7309 
   7310 #if defined(BCM_56260_A0)
   7311     { /* SOC_FORMAT_INT_SVM_PKT_ATTR_BCM56260_A0fmt */ 
   7312         /* format            SVM_PKT_ATTRfmt */
   7313         /* nFields     */ 12,
   7314         /* *fields     */ soc_SVM_PKT_ATTR_BCM56560_A0fmt_fields,
   7315         /* bits        */ 41,
   7316         /* flags       */ 0,
   7317     },
   7318 #endif /* chips */
   7319 
   7320 #if defined(BCM_56260_B0)
   7321     { /* SOC_FORMAT_INT_SVM_PKT_ATTR_BCM56260_B0fmt */ 
   7322         /* format            SVM_PKT_ATTRfmt */
   7323         /* nFields     */ 12,
   7324         /* *fields     */ soc_SVM_PKT_ATTR_BCM56560_A0fmt_fields,
   7325         /* bits        */ 41,
   7326         /* flags       */ 0,
   7327     },
   7328 #endif /* chips */
   7329 
   7330 #if defined(BCM_56270_A0)
   7331     { /* SOC_FORMAT_INT_SVM_PKT_ATTR_BCM56270_A0fmt */ 
   7332         /* format            SVM_PKT_ATTRfmt */
   7333         /* nFields     */ 12,
   7334         /* *fields     */ soc_SVM_PKT_ATTR_BCM56560_A0fmt_fields,
   7335         /* bits        */ 41,
   7336         /* flags       */ 0,
   7337     },
   7338 #endif /* chips */
   7339 
   7340 #if defined(BCM_56340_A0)
   7341     { /* SOC_FORMAT_INT_SVM_PKT_ATTR_BCM56340_A0fmt */ 
   7342         /* format            SVM_PKT_ATTRfmt */
   7343         /* nFields     */ 11,
   7344         /* *fields     */ soc_SVM_PKT_ATTR_BCM56640_A0fmt_fields,
   7345         /* bits        */ 37,
   7346         /* flags       */ 0,
   7347     },
   7348 #endif /* chips */
   7349 
   7350 #if defined(BCM_56440_B0)
   7351     { /* SOC_FORMAT_INT_SVM_PKT_ATTR_BCM56440_B0fmt */ 
   7352         /* format            SVM_PKT_ATTRfmt */
   7353         /* nFields     */ 11,
   7354         /* *fields     */ soc_SVM_PKT_ATTRfmt_fields,
   7355         /* bits        */ 37,
   7356         /* flags       */ 0,
   7357     },
   7358 #endif /* chips */
   7359 
   7360 #if defined(BCM_56450_A0)
   7361     { /* SOC_FORMAT_INT_SVM_PKT_ATTR_BCM56450_A0fmt */ 
   7362         /* format            SVM_PKT_ATTRfmt */
   7363         /* nFields     */ 11,
   7364         /* *fields     */ soc_SVM_PKT_ATTR_BCM56450_A0fmt_fields,
   7365         /* bits        */ 41,
   7366         /* flags       */ 0,
   7367     },
   7368 #endif /* chips */
   7369 
   7370 #if defined(BCM_56450_B0)
   7371     { /* SOC_FORMAT_INT_SVM_PKT_ATTR_BCM56450_B0fmt */ 
   7372         /* format            SVM_PKT_ATTRfmt */
   7373         /* nFields     */ 11,
   7374         /* *fields     */ soc_SVM_PKT_ATTR_BCM56450_A0fmt_fields,
   7375         /* bits        */ 41,
   7376         /* flags       */ 0,
   7377     },
   7378 #endif /* chips */
   7379 
   7380 #if defined(BCM_56450_B1)
   7381     { /* SOC_FORMAT_INT_SVM_PKT_ATTR_BCM56450_B1fmt */ 
   7382         /* format            SVM_PKT_ATTRfmt */
   7383         /* nFields     */ 11,
   7384         /* *fields     */ soc_SVM_PKT_ATTR_BCM56450_A0fmt_fields,
   7385         /* bits        */ 41,
   7386         /* flags       */ 0,
   7387     },
   7388 #endif /* chips */
   7389 
   7390 #if defined(BCM_56560_A0)
   7391     { /* SOC_FORMAT_INT_SVM_PKT_ATTR_BCM56560_A0fmt */ 
   7392         /* format            SVM_PKT_ATTRfmt */
   7393         /* nFields     */ 12,
   7394         /* *fields     */ soc_SVM_PKT_ATTR_BCM56560_A0fmt_fields,
   7395         /* bits        */ 41,
   7396         /* flags       */ 0,
   7397     },
   7398 #endif /* chips */
   7399 
   7400 #if defined(BCM_56560_B0)
   7401     { /* SOC_FORMAT_INT_SVM_PKT_ATTR_BCM56560_B0fmt */ 
   7402         /* format            SVM_PKT_ATTRfmt */
   7403         /* nFields     */ 12,
   7404         /* *fields     */ soc_SVM_PKT_ATTR_BCM56560_A0fmt_fields,
   7405         /* bits        */ 41,
   7406         /* flags       */ 0,
   7407     },
   7408 #endif /* chips */
   7409 
   7410 #if defined(BCM_56640_A0)
   7411     { /* SOC_FORMAT_INT_SVM_PKT_ATTR_BCM56640_A0fmt */ 
   7412         /* format            SVM_PKT_ATTRfmt */
   7413         /* nFields     */ 11,
   7414         /* *fields     */ soc_SVM_PKT_ATTR_BCM56640_A0fmt_fields,
   7415         /* bits        */ 37,
   7416         /* flags       */ 0,
   7417     },
   7418 #endif /* chips */
   7419 
   7420 #if defined(BCM_56670_A0)
   7421     { /* SOC_FORMAT_INT_SVM_PKT_ATTR_BCM56670_A0fmt */ 
   7422         /* format            SVM_PKT_ATTRfmt */
   7423         /* nFields     */ 12,
   7424         /* *fields     */ soc_SVM_PKT_ATTR_BCM56560_A0fmt_fields,
   7425         /* bits        */ 41,
   7426         /* flags       */ 0,
   7427     },
   7428 #endif /* chips */
   7429 
   7430 #if defined(BCM_56670_B0)
   7431     { /* SOC_FORMAT_INT_SVM_PKT_ATTR_BCM56670_B0fmt */ 
   7432         /* format            SVM_PKT_ATTRfmt */
   7433         /* nFields     */ 12,
   7434         /* *fields     */ soc_SVM_PKT_ATTR_BCM56560_A0fmt_fields,
   7435         /* bits        */ 41,
   7436         /* flags       */ 0,
   7437     },
   7438 #endif /* chips */
   7439 
   7440 #if defined(BCM_56440_A0) || defined(BCM_56440_B0)
   7441     { /* SOC_FORMAT_INT_SVM_UPDATE_BITMAP_EOP_BUFFERfmt */ 
   7442         /* format            SVM_UPDATE_BITMAP_EOP_BUFFERfmt */
   7443         /* nFields     */ 6,
   7444         /* *fields     */ soc_SVM_UPDATE_BITMAP_EOP_BUFFERfmt_fields,
   7445         /* bits        */ 8,
   7446         /* flags       */ 0,
   7447     },
   7448 #endif /* chips */
   7449 
   7450 #if defined(BCM_56260_A0)
   7451     { /* SOC_FORMAT_INT_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56260_A0fmt */ 
   7452         /* format            SVM_UPDATE_BITMAP_EOP_BUFFERfmt */
   7453         /* nFields     */ 6,
   7454         /* *fields     */ soc_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56560_A0fmt_fields,
   7455         /* bits        */ 8,
   7456         /* flags       */ 0,
   7457     },
   7458 #endif /* chips */
   7459 
   7460 #if defined(BCM_56260_B0)
   7461     { /* SOC_FORMAT_INT_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56260_B0fmt */ 
   7462         /* format            SVM_UPDATE_BITMAP_EOP_BUFFERfmt */
   7463         /* nFields     */ 6,
   7464         /* *fields     */ soc_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56560_A0fmt_fields,
   7465         /* bits        */ 8,
   7466         /* flags       */ 0,
   7467     },
   7468 #endif /* chips */
   7469 
   7470 #if defined(BCM_56270_A0)
   7471     { /* SOC_FORMAT_INT_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56270_A0fmt */ 
   7472         /* format            SVM_UPDATE_BITMAP_EOP_BUFFERfmt */
   7473         /* nFields     */ 6,
   7474         /* *fields     */ soc_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56560_A0fmt_fields,
   7475         /* bits        */ 8,
   7476         /* flags       */ 0,
   7477     },
   7478 #endif /* chips */
   7479 
   7480 #if defined(BCM_56340_A0)
   7481     { /* SOC_FORMAT_INT_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56340_A0fmt */ 
   7482         /* format            SVM_UPDATE_BITMAP_EOP_BUFFERfmt */
   7483         /* nFields     */ 6,
   7484         /* *fields     */ soc_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56640_A0fmt_fields,
   7485         /* bits        */ 8,
   7486         /* flags       */ 0,
   7487     },
   7488 #endif /* chips */
   7489 
   7490 #if defined(BCM_56450_A0)
   7491     { /* SOC_FORMAT_INT_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56450_A0fmt */ 
   7492         /* format            SVM_UPDATE_BITMAP_EOP_BUFFERfmt */
   7493         /* nFields     */ 6,
   7494         /* *fields     */ soc_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56640_A0fmt_fields,
   7495         /* bits        */ 8,
   7496         /* flags       */ 0,
   7497     },
   7498 #endif /* chips */
   7499 
   7500 #if defined(BCM_56450_B0)
   7501     { /* SOC_FORMAT_INT_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56450_B0fmt */ 
   7502         /* format            SVM_UPDATE_BITMAP_EOP_BUFFERfmt */
   7503         /* nFields     */ 6,
   7504         /* *fields     */ soc_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56640_A0fmt_fields,
   7505         /* bits        */ 8,
   7506         /* flags       */ 0,
   7507     },
   7508 #endif /* chips */
   7509 
   7510 #if defined(BCM_56450_B1)
   7511     { /* SOC_FORMAT_INT_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56450_B1fmt */ 
   7512         /* format            SVM_UPDATE_BITMAP_EOP_BUFFERfmt */
   7513         /* nFields     */ 6,
   7514         /* *fields     */ soc_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56640_A0fmt_fields,
   7515         /* bits        */ 8,
   7516         /* flags       */ 0,
   7517     },
   7518 #endif /* chips */
   7519 
   7520 #if defined(BCM_56560_A0)
   7521     { /* SOC_FORMAT_INT_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56560_A0fmt */ 
   7522         /* format            SVM_UPDATE_BITMAP_EOP_BUFFERfmt */
   7523         /* nFields     */ 6,
   7524         /* *fields     */ soc_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56560_A0fmt_fields,
   7525         /* bits        */ 8,
   7526         /* flags       */ 0,
   7527     },
   7528 #endif /* chips */
   7529 
   7530 #if defined(BCM_56560_B0)
   7531     { /* SOC_FORMAT_INT_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56560_B0fmt */ 
   7532         /* format            SVM_UPDATE_BITMAP_EOP_BUFFERfmt */
   7533         /* nFields     */ 6,
   7534         /* *fields     */ soc_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56560_A0fmt_fields,
   7535         /* bits        */ 8,
   7536         /* flags       */ 0,
   7537     },
   7538 #endif /* chips */
   7539 
   7540 #if defined(BCM_56640_A0)
   7541     { /* SOC_FORMAT_INT_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56640_A0fmt */ 
   7542         /* format            SVM_UPDATE_BITMAP_EOP_BUFFERfmt */
   7543         /* nFields     */ 6,
   7544         /* *fields     */ soc_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56640_A0fmt_fields,
   7545         /* bits        */ 8,
   7546         /* flags       */ 0,
   7547     },
   7548 #endif /* chips */
   7549 
   7550 #if defined(BCM_56670_A0)
   7551     { /* SOC_FORMAT_INT_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56670_A0fmt */ 
   7552         /* format            SVM_UPDATE_BITMAP_EOP_BUFFERfmt */
   7553         /* nFields     */ 6,
   7554         /* *fields     */ soc_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56560_A0fmt_fields,
   7555         /* bits        */ 8,
   7556         /* flags       */ 0,
   7557     },
   7558 #endif /* chips */
   7559 
   7560 #if defined(BCM_56670_B0)
   7561     { /* SOC_FORMAT_INT_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56670_B0fmt */ 
   7562         /* format            SVM_UPDATE_BITMAP_EOP_BUFFERfmt */
   7563         /* nFields     */ 6,
   7564         /* *fields     */ soc_SVM_UPDATE_BITMAP_EOP_BUFFER_BCM56560_A0fmt_fields,
   7565         /* bits        */ 8,
   7566         /* flags       */ 0,
   7567     },
   7568 #endif /* chips */
   7569 
   7570 #if defined(BCM_56770_A0) || defined(BCM_56870_A0)
   7571     { /* SOC_FORMAT_INT_SVP_ACTION_SETfmt */ 
   7572         /* format            SVP_ACTION_SETfmt */
   7573         /* nFields     */ 2,
   7574         /* *fields     */ soc_SVP_ACTION_SETfmt_fields,
   7575         /* bits        */ 15,
   7576         /* flags       */ 0,
   7577     },
   7578 #endif /* chips */
   7579 
   7580 #if defined(BCM_56370_A0)
   7581     { /* SOC_FORMAT_INT_SVP_ACTION_SET_BCM56370_A0fmt */ 
   7582         /* format            SVP_ACTION_SETfmt */
   7583         /* nFields     */ 3,
   7584         /* *fields     */ soc_SVP_ACTION_SET_BCM56370_A0fmt_fields,
   7585         /* bits        */ 15,
   7586         /* flags       */ 0,
   7587     },
   7588 #endif /* chips */
   7589 
   7590 #if defined(BCM_56860_A0)
   7591     { /* SOC_FORMAT_INT_SVP_SOURCEfmt */ 
   7592         /* format            SVP_SOURCEfmt */
   7593         /* nFields     */ 1,
   7594         /* *fields     */ soc_SVP_SOURCEfmt_fields,
   7595         /* bits        */ 4,
   7596         /* flags       */ 0,
   7597     },
   7598 #endif /* chips */
   7599 
   7600 #if defined(BCM_56560_A0)
   7601     { /* SOC_FORMAT_INT_SVP_SOURCE_BCM56560_A0fmt */ 
   7602         /* format            SVP_SOURCEfmt */
   7603         /* nFields     */ 1,
   7604         /* *fields     */ soc_SVP_SOURCE_BCM56560_A0fmt_fields,
   7605         /* bits        */ 4,
   7606         /* flags       */ 0,
   7607     },
   7608 #endif /* chips */
   7609 
   7610 #if defined(BCM_56560_B0)
   7611     { /* SOC_FORMAT_INT_SVP_SOURCE_BCM56560_B0fmt */ 
   7612         /* format            SVP_SOURCEfmt */
   7613         /* nFields     */ 1,
   7614         /* *fields     */ soc_SVP_SOURCE_BCM56560_A0fmt_fields,
   7615         /* bits        */ 4,
   7616         /* flags       */ 0,
   7617     },
   7618 #endif /* chips */
   7619 
   7620 #if defined(BCM_56670_A0)
   7621     { /* SOC_FORMAT_INT_SVP_SOURCE_BCM56670_A0fmt */ 
   7622         /* format            SVP_SOURCEfmt */
   7623         /* nFields     */ 1,
   7624         /* *fields     */ soc_SVP_SOURCE_BCM56560_A0fmt_fields,
   7625         /* bits        */ 4,
   7626         /* flags       */ 0,
   7627     },
   7628 #endif /* chips */
   7629 
   7630 #if defined(BCM_56670_B0)
   7631     { /* SOC_FORMAT_INT_SVP_SOURCE_BCM56670_B0fmt */ 
   7632         /* format            SVP_SOURCEfmt */
   7633         /* nFields     */ 1,
   7634         /* *fields     */ soc_SVP_SOURCE_BCM56560_A0fmt_fields,
   7635         /* bits        */ 4,
   7636         /* flags       */ 0,
   7637     },
   7638 #endif /* chips */
   7639 
   7640 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \
   7641     defined(BCM_56870_A0)
   7642     { /* SOC_FORMAT_INT_SW2_0_DOPfmt */ 
   7643         /* format            SW2_0_DOPfmt */
   7644         /* nFields     */ 8,
   7645         /* *fields     */ soc_SW2_0_DOPfmt_fields,
   7646         /* bits        */ 32,
   7647         /* flags       */ 0,
   7648     },
   7649 #endif /* chips */
   7650 
   7651 #if defined(BCM_56770_A0) || defined(BCM_56870_A0)
   7652     { /* SOC_FORMAT_INT_SW2_1_DOPfmt */ 
   7653         /* format            SW2_1_DOPfmt */
   7654         /* nFields     */ 9,
   7655         /* *fields     */ soc_SW2_1_DOPfmt_fields,
   7656         /* bits        */ 96,
   7657         /* flags       */ 0,
   7658     },
   7659 #endif /* chips */
   7660 
   7661 #if defined(BCM_56370_A0)
   7662     { /* SOC_FORMAT_INT_SW2_1_DOP_BCM56370_A0fmt */ 
   7663         /* format            SW2_1_DOPfmt */
   7664         /* nFields     */ 9,
   7665         /* *fields     */ soc_SW2_1_DOP_BCM56370_A0fmt_fields,
   7666         /* bits        */ 96,
   7667         /* flags       */ 0,
   7668     },
   7669 #endif /* chips */
   7670 
   7671 #if defined(BCM_56624_A0) || defined(BCM_56624_B0) || \
   7672     defined(BCM_56680_A0) || defined(BCM_56680_B0)
   7673     { /* SOC_FORMAT_INT_SW2_EOP_BUFFERfmt */ 
   7674         /* format            SW2_EOP_BUFFERfmt */
   7675         /* nFields     */ 16,
   7676         /* *fields     */ soc_SW2_EOP_BUFFERfmt_fields,
   7677         /* bits        */ 256,
   7678         /* flags       */ 0,
   7679     },
   7680 #endif /* chips */
   7681 
   7682 #if defined(BCM_56524_A0) || defined(BCM_56524_B0) || \
   7683     defined(BCM_56634_A0) || defined(BCM_56634_B0)
   7684     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_Afmt */ 
   7685         /* format            SW2_EOP_BUFFER_Afmt */
   7686         /* nFields     */ 16,
   7687         /* *fields     */ soc_SW2_EOP_BUFFER_Afmt_fields,
   7688         /* bits        */ 128,
   7689         /* flags       */ 0,
   7690     },
   7691 #endif /* chips */
   7692 
   7693 #if defined(BCM_56260_A0)
   7694     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_A_BCM56260_A0fmt */ 
   7695         /* format            SW2_EOP_BUFFER_Afmt */
   7696         /* nFields     */ 5,
   7697         /* *fields     */ soc_SW2_EOP_BUFFER_A_BCM56260_A0fmt_fields,
   7698         /* bits        */ 24,
   7699         /* flags       */ 0,
   7700     },
   7701 #endif /* chips */
   7702 
   7703 #if defined(BCM_56260_B0)
   7704     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_A_BCM56260_B0fmt */ 
   7705         /* format            SW2_EOP_BUFFER_Afmt */
   7706         /* nFields     */ 5,
   7707         /* *fields     */ soc_SW2_EOP_BUFFER_A_BCM56260_A0fmt_fields,
   7708         /* bits        */ 24,
   7709         /* flags       */ 0,
   7710     },
   7711 #endif /* chips */
   7712 
   7713 #if defined(BCM_56270_A0)
   7714     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_A_BCM56270_A0fmt */ 
   7715         /* format            SW2_EOP_BUFFER_Afmt */
   7716         /* nFields     */ 5,
   7717         /* *fields     */ soc_SW2_EOP_BUFFER_A_BCM56260_A0fmt_fields,
   7718         /* bits        */ 24,
   7719         /* flags       */ 0,
   7720     },
   7721 #endif /* chips */
   7722 
   7723 #if defined(BCM_56340_A0)
   7724     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_A_BCM56340_A0fmt */ 
   7725         /* format            SW2_EOP_BUFFER_Afmt */
   7726         /* nFields     */ 6,
   7727         /* *fields     */ soc_SW2_EOP_BUFFER_A_BCM56640_A0fmt_fields,
   7728         /* bits        */ 128,
   7729         /* flags       */ 0,
   7730     },
   7731 #endif /* chips */
   7732 
   7733 #if defined(BCM_56440_A0)
   7734     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_A_BCM56440_A0fmt */ 
   7735         /* format            SW2_EOP_BUFFER_Afmt */
   7736         /* nFields     */ 6,
   7737         /* *fields     */ soc_SW2_EOP_BUFFER_A_BCM56440_A0fmt_fields,
   7738         /* bits        */ 128,
   7739         /* flags       */ 0,
   7740     },
   7741 #endif /* chips */
   7742 
   7743 #if defined(BCM_56440_B0)
   7744     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_A_BCM56440_B0fmt */ 
   7745         /* format            SW2_EOP_BUFFER_Afmt */
   7746         /* nFields     */ 6,
   7747         /* *fields     */ soc_SW2_EOP_BUFFER_A_BCM56440_A0fmt_fields,
   7748         /* bits        */ 128,
   7749         /* flags       */ 0,
   7750     },
   7751 #endif /* chips */
   7752 
   7753 #if defined(BCM_56450_A0)
   7754     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_A_BCM56450_A0fmt */ 
   7755         /* format            SW2_EOP_BUFFER_Afmt */
   7756         /* nFields     */ 5,
   7757         /* *fields     */ soc_SW2_EOP_BUFFER_A_BCM56450_A0fmt_fields,
   7758         /* bits        */ 24,
   7759         /* flags       */ 0,
   7760     },
   7761 #endif /* chips */
   7762 
   7763 #if defined(BCM_56450_B0)
   7764     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_A_BCM56450_B0fmt */ 
   7765         /* format            SW2_EOP_BUFFER_Afmt */
   7766         /* nFields     */ 5,
   7767         /* *fields     */ soc_SW2_EOP_BUFFER_A_BCM56450_A0fmt_fields,
   7768         /* bits        */ 24,
   7769         /* flags       */ 0,
   7770     },
   7771 #endif /* chips */
   7772 
   7773 #if defined(BCM_56450_B1)
   7774     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_A_BCM56450_B1fmt */ 
   7775         /* format            SW2_EOP_BUFFER_Afmt */
   7776         /* nFields     */ 5,
   7777         /* *fields     */ soc_SW2_EOP_BUFFER_A_BCM56450_A0fmt_fields,
   7778         /* bits        */ 24,
   7779         /* flags       */ 0,
   7780     },
   7781 #endif /* chips */
   7782 
   7783 #if defined(BCM_56560_A0)
   7784     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_A_BCM56560_A0fmt */ 
   7785         /* format            SW2_EOP_BUFFER_Afmt */
   7786         /* nFields     */ 6,
   7787         /* *fields     */ soc_SW2_EOP_BUFFER_A_BCM56560_A0fmt_fields,
   7788         /* bits        */ 66,
   7789         /* flags       */ 0,
   7790     },
   7791 #endif /* chips */
   7792 
   7793 #if defined(BCM_56560_B0)
   7794     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_A_BCM56560_B0fmt */ 
   7795         /* format            SW2_EOP_BUFFER_Afmt */
   7796         /* nFields     */ 6,
   7797         /* *fields     */ soc_SW2_EOP_BUFFER_A_BCM56560_A0fmt_fields,
   7798         /* bits        */ 66,
   7799         /* flags       */ 0,
   7800     },
   7801 #endif /* chips */
   7802 
   7803 #if defined(BCM_56640_A0)
   7804     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_A_BCM56640_A0fmt */ 
   7805         /* format            SW2_EOP_BUFFER_Afmt */
   7806         /* nFields     */ 6,
   7807         /* *fields     */ soc_SW2_EOP_BUFFER_A_BCM56640_A0fmt_fields,
   7808         /* bits        */ 128,
   7809         /* flags       */ 0,
   7810     },
   7811 #endif /* chips */
   7812 
   7813 #if defined(BCM_56670_A0)
   7814     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_A_BCM56670_A0fmt */ 
   7815         /* format            SW2_EOP_BUFFER_Afmt */
   7816         /* nFields     */ 6,
   7817         /* *fields     */ soc_SW2_EOP_BUFFER_A_BCM56670_A0fmt_fields,
   7818         /* bits        */ 32,
   7819         /* flags       */ 0,
   7820     },
   7821 #endif /* chips */
   7822 
   7823 #if defined(BCM_56670_B0)
   7824     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_A_BCM56670_B0fmt */ 
   7825         /* format            SW2_EOP_BUFFER_Afmt */
   7826         /* nFields     */ 6,
   7827         /* *fields     */ soc_SW2_EOP_BUFFER_A_BCM56670_A0fmt_fields,
   7828         /* bits        */ 32,
   7829         /* flags       */ 0,
   7830     },
   7831 #endif /* chips */
   7832 
   7833 #if defined(BCM_56685_A0)
   7834     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_A_BCM56685_A0fmt */ 
   7835         /* format            SW2_EOP_BUFFER_Afmt */
   7836         /* nFields     */ 16,
   7837         /* *fields     */ soc_SW2_EOP_BUFFER_Afmt_fields,
   7838         /* bits        */ 128,
   7839         /* flags       */ 0,
   7840     },
   7841 #endif /* chips */
   7842 
   7843 #if defined(BCM_56685_B0)
   7844     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_A_BCM56685_B0fmt */ 
   7845         /* format            SW2_EOP_BUFFER_Afmt */
   7846         /* nFields     */ 16,
   7847         /* *fields     */ soc_SW2_EOP_BUFFER_Afmt_fields,
   7848         /* bits        */ 128,
   7849         /* flags       */ 0,
   7850     },
   7851 #endif /* chips */
   7852 
   7853 #if defined(BCM_56840_A0)
   7854     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_A_BCM56840_A0fmt */ 
   7855         /* format            SW2_EOP_BUFFER_Afmt */
   7856         /* nFields     */ 11,
   7857         /* *fields     */ soc_SW2_EOP_BUFFER_A_BCM56840_A0fmt_fields,
   7858         /* bits        */ 128,
   7859         /* flags       */ 0,
   7860     },
   7861 #endif /* chips */
   7862 
   7863 #if defined(BCM_56840_B0)
   7864     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_A_BCM56840_B0fmt */ 
   7865         /* format            SW2_EOP_BUFFER_Afmt */
   7866         /* nFields     */ 11,
   7867         /* *fields     */ soc_SW2_EOP_BUFFER_A_BCM56840_B0fmt_fields,
   7868         /* bits        */ 128,
   7869         /* flags       */ 0,
   7870     },
   7871 #endif /* chips */
   7872 
   7873 #if defined(BCM_56850_A0)
   7874     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_A_BCM56850_A0fmt */ 
   7875         /* format            SW2_EOP_BUFFER_Afmt */
   7876         /* nFields     */ 6,
   7877         /* *fields     */ soc_SW2_EOP_BUFFER_A_BCM56850_A0fmt_fields,
   7878         /* bits        */ 66,
   7879         /* flags       */ 0,
   7880     },
   7881 #endif /* chips */
   7882 
   7883 #if defined(BCM_56860_A0)
   7884     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_A_BCM56860_A0fmt */ 
   7885         /* format            SW2_EOP_BUFFER_Afmt */
   7886         /* nFields     */ 6,
   7887         /* *fields     */ soc_SW2_EOP_BUFFER_A_BCM56850_A0fmt_fields,
   7888         /* bits        */ 66,
   7889         /* flags       */ 0,
   7890     },
   7891 #endif /* chips */
   7892 
   7893 #if defined(BCM_56524_A0) || defined(BCM_56634_A0) || \
   7894     defined(BCM_56634_B0)
   7895     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_Bfmt */ 
   7896         /* format            SW2_EOP_BUFFER_Bfmt */
   7897         /* nFields     */ 8,
   7898         /* *fields     */ soc_SW2_EOP_BUFFER_Bfmt_fields,
   7899         /* bits        */ 128,
   7900         /* flags       */ 0,
   7901     },
   7902 #endif /* chips */
   7903 
   7904 #if defined(BCM_53400_A0)
   7905     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_BCM53400_A0fmt */ 
   7906         /* format            SW2_EOP_BUFFERfmt */
   7907         /* nFields     */ 9,
   7908         /* *fields     */ soc_SW2_EOP_BUFFER_BCM53400_A0fmt_fields,
   7909         /* bits        */ 96,
   7910         /* flags       */ 0,
   7911     },
   7912 #endif /* chips */
   7913 
   7914 #if defined(BCM_53540_A0)
   7915     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_BCM53540_A0fmt */ 
   7916         /* format            SW2_EOP_BUFFERfmt */
   7917         /* nFields     */ 13,
   7918         /* *fields     */ soc_SW2_EOP_BUFFER_BCM53540_A0fmt_fields,
   7919         /* bits        */ 108,
   7920         /* flags       */ 0,
   7921     },
   7922 #endif /* chips */
   7923 
   7924 #if defined(BCM_53570_A0)
   7925     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_BCM53570_A0fmt */ 
   7926         /* format            SW2_EOP_BUFFERfmt */
   7927         /* nFields     */ 14,
   7928         /* *fields     */ soc_SW2_EOP_BUFFER_BCM53570_A0fmt_fields,
   7929         /* bits        */ 154,
   7930         /* flags       */ 0,
   7931     },
   7932 #endif /* chips */
   7933 
   7934 #if defined(BCM_53570_B0)
   7935     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_BCM53570_B0fmt */ 
   7936         /* format            SW2_EOP_BUFFERfmt */
   7937         /* nFields     */ 15,
   7938         /* *fields     */ soc_SW2_EOP_BUFFER_BCM53570_B0fmt_fields,
   7939         /* bits        */ 155,
   7940         /* flags       */ 0,
   7941     },
   7942 #endif /* chips */
   7943 
   7944 #if defined(BCM_56142_A0)
   7945     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_BCM56142_A0fmt */ 
   7946         /* format            SW2_EOP_BUFFERfmt */
   7947         /* nFields     */ 19,
   7948         /* *fields     */ soc_SW2_EOP_BUFFER_BCM56142_A0fmt_fields,
   7949         /* bits        */ 192,
   7950         /* flags       */ 0,
   7951     },
   7952 #endif /* chips */
   7953 
   7954 #if defined(BCM_56150_A0)
   7955     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_BCM56150_A0fmt */ 
   7956         /* format            SW2_EOP_BUFFERfmt */
   7957         /* nFields     */ 18,
   7958         /* *fields     */ soc_SW2_EOP_BUFFER_BCM56150_A0fmt_fields,
   7959         /* bits        */ 192,
   7960         /* flags       */ 0,
   7961     },
   7962 #endif /* chips */
   7963 
   7964 #if defined(BCM_56160_A0)
   7965     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_BCM56160_A0fmt */ 
   7966         /* format            SW2_EOP_BUFFERfmt */
   7967         /* nFields     */ 12,
   7968         /* *fields     */ soc_SW2_EOP_BUFFER_BCM56160_A0fmt_fields,
   7969         /* bits        */ 108,
   7970         /* flags       */ 0,
   7971     },
   7972 #endif /* chips */
   7973 
   7974 #if defined(BCM_56334_A0)
   7975     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_BCM56334_A0fmt */ 
   7976         /* format            SW2_EOP_BUFFERfmt */
   7977         /* nFields     */ 15,
   7978         /* *fields     */ soc_SW2_EOP_BUFFER_BCM56334_A0fmt_fields,
   7979         /* bits        */ 180,
   7980         /* flags       */ 0,
   7981     },
   7982 #endif /* chips */
   7983 
   7984 #if defined(BCM_56334_B0)
   7985     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_BCM56334_B0fmt */ 
   7986         /* format            SW2_EOP_BUFFERfmt */
   7987         /* nFields     */ 15,
   7988         /* *fields     */ soc_SW2_EOP_BUFFER_BCM56334_A0fmt_fields,
   7989         /* bits        */ 180,
   7990         /* flags       */ 0,
   7991     },
   7992 #endif /* chips */
   7993 
   7994 #if defined(BCM_56725_A0)
   7995     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_BCM56725_A0fmt */ 
   7996         /* format            SW2_EOP_BUFFERfmt */
   7997         /* nFields     */ 10,
   7998         /* *fields     */ soc_SW2_EOP_BUFFER_BCM56820_A0fmt_fields,
   7999         /* bits        */ 126,
   8000         /* flags       */ 0,
   8001     },
   8002 #endif /* chips */
   8003 
   8004 #if defined(BCM_56820_A0)
   8005     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_BCM56820_A0fmt */ 
   8006         /* format            SW2_EOP_BUFFERfmt */
   8007         /* nFields     */ 10,
   8008         /* *fields     */ soc_SW2_EOP_BUFFER_BCM56820_A0fmt_fields,
   8009         /* bits        */ 126,
   8010         /* flags       */ 0,
   8011     },
   8012 #endif /* chips */
   8013 
   8014 #if defined(BCM_88732_A0)
   8015     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_BCM88732_A0fmt */ 
   8016         /* format            SW2_EOP_BUFFERfmt */
   8017         /* nFields     */ 5,
   8018         /* *fields     */ soc_SW2_EOP_BUFFER_BCM88732_A0fmt_fields,
   8019         /* bits        */ 99,
   8020         /* flags       */ 0,
   8021     },
   8022 #endif /* chips */
   8023 
   8024 #if defined(BCM_56260_A0)
   8025     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_B_BCM56260_A0fmt */ 
   8026         /* format            SW2_EOP_BUFFER_Bfmt */
   8027         /* nFields     */ 8,
   8028         /* *fields     */ soc_SW2_EOP_BUFFER_B_BCM56260_A0fmt_fields,
   8029         /* bits        */ 16,
   8030         /* flags       */ 0,
   8031     },
   8032 #endif /* chips */
   8033 
   8034 #if defined(BCM_56260_B0)
   8035     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_B_BCM56260_B0fmt */ 
   8036         /* format            SW2_EOP_BUFFER_Bfmt */
   8037         /* nFields     */ 8,
   8038         /* *fields     */ soc_SW2_EOP_BUFFER_B_BCM56260_A0fmt_fields,
   8039         /* bits        */ 16,
   8040         /* flags       */ 0,
   8041     },
   8042 #endif /* chips */
   8043 
   8044 #if defined(BCM_56270_A0)
   8045     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_B_BCM56270_A0fmt */ 
   8046         /* format            SW2_EOP_BUFFER_Bfmt */
   8047         /* nFields     */ 6,
   8048         /* *fields     */ soc_SW2_EOP_BUFFER_B_BCM56270_A0fmt_fields,
   8049         /* bits        */ 12,
   8050         /* flags       */ 0,
   8051     },
   8052 #endif /* chips */
   8053 
   8054 #if defined(BCM_56340_A0)
   8055     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_B_BCM56340_A0fmt */ 
   8056         /* format            SW2_EOP_BUFFER_Bfmt */
   8057         /* nFields     */ 3,
   8058         /* *fields     */ soc_SW2_EOP_BUFFER_B_BCM56640_A0fmt_fields,
   8059         /* bits        */ 128,
   8060         /* flags       */ 0,
   8061     },
   8062 #endif /* chips */
   8063 
   8064 #if defined(BCM_56440_A0)
   8065     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_B_BCM56440_A0fmt */ 
   8066         /* format            SW2_EOP_BUFFER_Bfmt */
   8067         /* nFields     */ 8,
   8068         /* *fields     */ soc_SW2_EOP_BUFFER_B_BCM56440_A0fmt_fields,
   8069         /* bits        */ 66,
   8070         /* flags       */ 0,
   8071     },
   8072 #endif /* chips */
   8073 
   8074 #if defined(BCM_56440_B0)
   8075     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_B_BCM56440_B0fmt */ 
   8076         /* format            SW2_EOP_BUFFER_Bfmt */
   8077         /* nFields     */ 8,
   8078         /* *fields     */ soc_SW2_EOP_BUFFER_B_BCM56440_A0fmt_fields,
   8079         /* bits        */ 66,
   8080         /* flags       */ 0,
   8081     },
   8082 #endif /* chips */
   8083 
   8084 #if defined(BCM_56450_A0)
   8085     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_B_BCM56450_A0fmt */ 
   8086         /* format            SW2_EOP_BUFFER_Bfmt */
   8087         /* nFields     */ 7,
   8088         /* *fields     */ soc_SW2_EOP_BUFFER_B_BCM56450_A0fmt_fields,
   8089         /* bits        */ 16,
   8090         /* flags       */ 0,
   8091     },
   8092 #endif /* chips */
   8093 
   8094 #if defined(BCM_56450_B0)
   8095     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_B_BCM56450_B0fmt */ 
   8096         /* format            SW2_EOP_BUFFER_Bfmt */
   8097         /* nFields     */ 7,
   8098         /* *fields     */ soc_SW2_EOP_BUFFER_B_BCM56450_A0fmt_fields,
   8099         /* bits        */ 16,
   8100         /* flags       */ 0,
   8101     },
   8102 #endif /* chips */
   8103 
   8104 #if defined(BCM_56450_B1)
   8105     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_B_BCM56450_B1fmt */ 
   8106         /* format            SW2_EOP_BUFFER_Bfmt */
   8107         /* nFields     */ 7,
   8108         /* *fields     */ soc_SW2_EOP_BUFFER_B_BCM56450_A0fmt_fields,
   8109         /* bits        */ 16,
   8110         /* flags       */ 0,
   8111     },
   8112 #endif /* chips */
   8113 
   8114 #if defined(BCM_56524_B0)
   8115     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_B_BCM56524_B0fmt */ 
   8116         /* format            SW2_EOP_BUFFER_Bfmt */
   8117         /* nFields     */ 8,
   8118         /* *fields     */ soc_SW2_EOP_BUFFER_Bfmt_fields,
   8119         /* bits        */ 128,
   8120         /* flags       */ 0,
   8121     },
   8122 #endif /* chips */
   8123 
   8124 #if defined(BCM_56560_A0)
   8125     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_B_BCM56560_A0fmt */ 
   8126         /* format            SW2_EOP_BUFFER_Bfmt */
   8127         /* nFields     */ 3,
   8128         /* *fields     */ soc_SW2_EOP_BUFFER_B_BCM56560_A0fmt_fields,
   8129         /* bits        */ 128,
   8130         /* flags       */ 0,
   8131     },
   8132 #endif /* chips */
   8133 
   8134 #if defined(BCM_56560_B0)
   8135     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_B_BCM56560_B0fmt */ 
   8136         /* format            SW2_EOP_BUFFER_Bfmt */
   8137         /* nFields     */ 3,
   8138         /* *fields     */ soc_SW2_EOP_BUFFER_B_BCM56560_A0fmt_fields,
   8139         /* bits        */ 128,
   8140         /* flags       */ 0,
   8141     },
   8142 #endif /* chips */
   8143 
   8144 #if defined(BCM_56640_A0)
   8145     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_B_BCM56640_A0fmt */ 
   8146         /* format            SW2_EOP_BUFFER_Bfmt */
   8147         /* nFields     */ 3,
   8148         /* *fields     */ soc_SW2_EOP_BUFFER_B_BCM56640_A0fmt_fields,
   8149         /* bits        */ 128,
   8150         /* flags       */ 0,
   8151     },
   8152 #endif /* chips */
   8153 
   8154 #if defined(BCM_56670_A0)
   8155     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_B_BCM56670_A0fmt */ 
   8156         /* format            SW2_EOP_BUFFER_Bfmt */
   8157         /* nFields     */ 2,
   8158         /* *fields     */ soc_SW2_EOP_BUFFER_B_BCM56670_A0fmt_fields,
   8159         /* bits        */ 8,
   8160         /* flags       */ 0,
   8161     },
   8162 #endif /* chips */
   8163 
   8164 #if defined(BCM_56670_B0)
   8165     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_B_BCM56670_B0fmt */ 
   8166         /* format            SW2_EOP_BUFFER_Bfmt */
   8167         /* nFields     */ 2,
   8168         /* *fields     */ soc_SW2_EOP_BUFFER_B_BCM56670_A0fmt_fields,
   8169         /* bits        */ 8,
   8170         /* flags       */ 0,
   8171     },
   8172 #endif /* chips */
   8173 
   8174 #if defined(BCM_56685_A0)
   8175     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_B_BCM56685_A0fmt */ 
   8176         /* format            SW2_EOP_BUFFER_Bfmt */
   8177         /* nFields     */ 8,
   8178         /* *fields     */ soc_SW2_EOP_BUFFER_Bfmt_fields,
   8179         /* bits        */ 128,
   8180         /* flags       */ 0,
   8181     },
   8182 #endif /* chips */
   8183 
   8184 #if defined(BCM_56685_B0)
   8185     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_B_BCM56685_B0fmt */ 
   8186         /* format            SW2_EOP_BUFFER_Bfmt */
   8187         /* nFields     */ 8,
   8188         /* *fields     */ soc_SW2_EOP_BUFFER_Bfmt_fields,
   8189         /* bits        */ 128,
   8190         /* flags       */ 0,
   8191     },
   8192 #endif /* chips */
   8193 
   8194 #if defined(BCM_56840_A0)
   8195     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_B_BCM56840_A0fmt */ 
   8196         /* format            SW2_EOP_BUFFER_Bfmt */
   8197         /* nFields     */ 3,
   8198         /* *fields     */ soc_SW2_EOP_BUFFER_B_BCM56840_A0fmt_fields,
   8199         /* bits        */ 128,
   8200         /* flags       */ 0,
   8201     },
   8202 #endif /* chips */
   8203 
   8204 #if defined(BCM_56840_B0)
   8205     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_B_BCM56840_B0fmt */ 
   8206         /* format            SW2_EOP_BUFFER_Bfmt */
   8207         /* nFields     */ 3,
   8208         /* *fields     */ soc_SW2_EOP_BUFFER_B_BCM56840_A0fmt_fields,
   8209         /* bits        */ 128,
   8210         /* flags       */ 0,
   8211     },
   8212 #endif /* chips */
   8213 
   8214 #if defined(BCM_56850_A0)
   8215     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_B_BCM56850_A0fmt */ 
   8216         /* format            SW2_EOP_BUFFER_Bfmt */
   8217         /* nFields     */ 3,
   8218         /* *fields     */ soc_SW2_EOP_BUFFER_B_BCM56640_A0fmt_fields,
   8219         /* bits        */ 128,
   8220         /* flags       */ 0,
   8221     },
   8222 #endif /* chips */
   8223 
   8224 #if defined(BCM_56860_A0)
   8225     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_B_BCM56860_A0fmt */ 
   8226         /* format            SW2_EOP_BUFFER_Bfmt */
   8227         /* nFields     */ 3,
   8228         /* *fields     */ soc_SW2_EOP_BUFFER_B_BCM56640_A0fmt_fields,
   8229         /* bits        */ 128,
   8230         /* flags       */ 0,
   8231     },
   8232 #endif /* chips */
   8233 
   8234 #if defined(BCM_56524_A0) || defined(BCM_56634_A0) || \
   8235     defined(BCM_56634_B0)
   8236     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_Cfmt */ 
   8237         /* format            SW2_EOP_BUFFER_Cfmt */
   8238         /* nFields     */ 6,
   8239         /* *fields     */ soc_SW2_EOP_BUFFER_Cfmt_fields,
   8240         /* bits        */ 66,
   8241         /* flags       */ 0,
   8242     },
   8243 #endif /* chips */
   8244 
   8245 #if defined(BCM_56260_A0)
   8246     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_C_BCM56260_A0fmt */ 
   8247         /* format            SW2_EOP_BUFFER_Cfmt */
   8248         /* nFields     */ 3,
   8249         /* *fields     */ soc_SW2_EOP_BUFFER_C_BCM56260_A0fmt_fields,
   8250         /* bits        */ 66,
   8251         /* flags       */ 0,
   8252     },
   8253 #endif /* chips */
   8254 
   8255 #if defined(BCM_56260_B0)
   8256     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_C_BCM56260_B0fmt */ 
   8257         /* format            SW2_EOP_BUFFER_Cfmt */
   8258         /* nFields     */ 3,
   8259         /* *fields     */ soc_SW2_EOP_BUFFER_C_BCM56260_A0fmt_fields,
   8260         /* bits        */ 66,
   8261         /* flags       */ 0,
   8262     },
   8263 #endif /* chips */
   8264 
   8265 #if defined(BCM_56270_A0)
   8266     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_C_BCM56270_A0fmt */ 
   8267         /* format            SW2_EOP_BUFFER_Cfmt */
   8268         /* nFields     */ 3,
   8269         /* *fields     */ soc_SW2_EOP_BUFFER_C_BCM56260_A0fmt_fields,
   8270         /* bits        */ 66,
   8271         /* flags       */ 0,
   8272     },
   8273 #endif /* chips */
   8274 
   8275 #if defined(BCM_56340_A0)
   8276     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_C_BCM56340_A0fmt */ 
   8277         /* format            SW2_EOP_BUFFER_Cfmt */
   8278         /* nFields     */ 6,
   8279         /* *fields     */ soc_SW2_EOP_BUFFER_C_BCM56640_A0fmt_fields,
   8280         /* bits        */ 66,
   8281         /* flags       */ 0,
   8282     },
   8283 #endif /* chips */
   8284 
   8285 #if defined(BCM_56450_A0)
   8286     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_C_BCM56450_A0fmt */ 
   8287         /* format            SW2_EOP_BUFFER_Cfmt */
   8288         /* nFields     */ 2,
   8289         /* *fields     */ soc_SW2_EOP_BUFFER_C_BCM56450_A0fmt_fields,
   8290         /* bits        */ 65,
   8291         /* flags       */ 0,
   8292     },
   8293 #endif /* chips */
   8294 
   8295 #if defined(BCM_56450_B0)
   8296     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_C_BCM56450_B0fmt */ 
   8297         /* format            SW2_EOP_BUFFER_Cfmt */
   8298         /* nFields     */ 2,
   8299         /* *fields     */ soc_SW2_EOP_BUFFER_C_BCM56450_A0fmt_fields,
   8300         /* bits        */ 65,
   8301         /* flags       */ 0,
   8302     },
   8303 #endif /* chips */
   8304 
   8305 #if defined(BCM_56450_B1)
   8306     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_C_BCM56450_B1fmt */ 
   8307         /* format            SW2_EOP_BUFFER_Cfmt */
   8308         /* nFields     */ 2,
   8309         /* *fields     */ soc_SW2_EOP_BUFFER_C_BCM56450_A0fmt_fields,
   8310         /* bits        */ 65,
   8311         /* flags       */ 0,
   8312     },
   8313 #endif /* chips */
   8314 
   8315 #if defined(BCM_56524_B0)
   8316     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_C_BCM56524_B0fmt */ 
   8317         /* format            SW2_EOP_BUFFER_Cfmt */
   8318         /* nFields     */ 6,
   8319         /* *fields     */ soc_SW2_EOP_BUFFER_Cfmt_fields,
   8320         /* bits        */ 66,
   8321         /* flags       */ 0,
   8322     },
   8323 #endif /* chips */
   8324 
   8325 #if defined(BCM_56560_A0)
   8326     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_C_BCM56560_A0fmt */ 
   8327         /* format            SW2_EOP_BUFFER_Cfmt */
   8328         /* nFields     */ 7,
   8329         /* *fields     */ soc_SW2_EOP_BUFFER_C_BCM56560_A0fmt_fields,
   8330         /* bits        */ 74,
   8331         /* flags       */ 0,
   8332     },
   8333 #endif /* chips */
   8334 
   8335 #if defined(BCM_56560_B0)
   8336     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_C_BCM56560_B0fmt */ 
   8337         /* format            SW2_EOP_BUFFER_Cfmt */
   8338         /* nFields     */ 7,
   8339         /* *fields     */ soc_SW2_EOP_BUFFER_C_BCM56560_A0fmt_fields,
   8340         /* bits        */ 74,
   8341         /* flags       */ 0,
   8342     },
   8343 #endif /* chips */
   8344 
   8345 #if defined(BCM_56640_A0)
   8346     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_C_BCM56640_A0fmt */ 
   8347         /* format            SW2_EOP_BUFFER_Cfmt */
   8348         /* nFields     */ 6,
   8349         /* *fields     */ soc_SW2_EOP_BUFFER_C_BCM56640_A0fmt_fields,
   8350         /* bits        */ 66,
   8351         /* flags       */ 0,
   8352     },
   8353 #endif /* chips */
   8354 
   8355 #if defined(BCM_56670_A0)
   8356     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_C_BCM56670_A0fmt */ 
   8357         /* format            SW2_EOP_BUFFER_Cfmt */
   8358         /* nFields     */ 7,
   8359         /* *fields     */ soc_SW2_EOP_BUFFER_C_BCM56560_A0fmt_fields,
   8360         /* bits        */ 74,
   8361         /* flags       */ 0,
   8362     },
   8363 #endif /* chips */
   8364 
   8365 #if defined(BCM_56670_B0)
   8366     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_C_BCM56670_B0fmt */ 
   8367         /* format            SW2_EOP_BUFFER_Cfmt */
   8368         /* nFields     */ 7,
   8369         /* *fields     */ soc_SW2_EOP_BUFFER_C_BCM56560_A0fmt_fields,
   8370         /* bits        */ 74,
   8371         /* flags       */ 0,
   8372     },
   8373 #endif /* chips */
   8374 
   8375 #if defined(BCM_56685_A0)
   8376     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_C_BCM56685_A0fmt */ 
   8377         /* format            SW2_EOP_BUFFER_Cfmt */
   8378         /* nFields     */ 6,
   8379         /* *fields     */ soc_SW2_EOP_BUFFER_Cfmt_fields,
   8380         /* bits        */ 66,
   8381         /* flags       */ 0,
   8382     },
   8383 #endif /* chips */
   8384 
   8385 #if defined(BCM_56685_B0)
   8386     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_C_BCM56685_B0fmt */ 
   8387         /* format            SW2_EOP_BUFFER_Cfmt */
   8388         /* nFields     */ 6,
   8389         /* *fields     */ soc_SW2_EOP_BUFFER_Cfmt_fields,
   8390         /* bits        */ 66,
   8391         /* flags       */ 0,
   8392     },
   8393 #endif /* chips */
   8394 
   8395 #if defined(BCM_56840_A0)
   8396     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_C_BCM56840_A0fmt */ 
   8397         /* format            SW2_EOP_BUFFER_Cfmt */
   8398         /* nFields     */ 7,
   8399         /* *fields     */ soc_SW2_EOP_BUFFER_C_BCM56840_A0fmt_fields,
   8400         /* bits        */ 66,
   8401         /* flags       */ 0,
   8402     },
   8403 #endif /* chips */
   8404 
   8405 #if defined(BCM_56840_B0)
   8406     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_C_BCM56840_B0fmt */ 
   8407         /* format            SW2_EOP_BUFFER_Cfmt */
   8408         /* nFields     */ 7,
   8409         /* *fields     */ soc_SW2_EOP_BUFFER_C_BCM56840_B0fmt_fields,
   8410         /* bits        */ 66,
   8411         /* flags       */ 0,
   8412     },
   8413 #endif /* chips */
   8414 
   8415 #if defined(BCM_56850_A0)
   8416     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_C_BCM56850_A0fmt */ 
   8417         /* format            SW2_EOP_BUFFER_Cfmt */
   8418         /* nFields     */ 7,
   8419         /* *fields     */ soc_SW2_EOP_BUFFER_C_BCM56850_A0fmt_fields,
   8420         /* bits        */ 74,
   8421         /* flags       */ 0,
   8422     },
   8423 #endif /* chips */
   8424 
   8425 #if defined(BCM_56860_A0)
   8426     { /* SOC_FORMAT_INT_SW2_EOP_BUFFER_C_BCM56860_A0fmt */ 
   8427         /* format            SW2_EOP_BUFFER_Cfmt */
   8428         /* nFields     */ 7,
   8429         /* *fields     */ soc_SW2_EOP_BUFFER_C_BCM56850_A0fmt_fields,
   8430         /* bits        */ 74,
   8431         /* flags       */ 0,
   8432     },
   8433 #endif /* chips */
   8434 
   8435 #if defined(BCM_56370_A0) || defined(BCM_56870_A0)
   8436     { /* SOC_FORMAT_INT_SW3_0_DOPfmt */ 
   8437         /* format            SW3_0_DOPfmt */
   8438         /* nFields     */ 7,
   8439         /* *fields     */ soc_SW3_0_DOPfmt_fields,
   8440         /* bits        */ 32,
   8441         /* flags       */ 0,
   8442     },
   8443 #endif /* chips */
   8444 
   8445 #if defined(BCM_56770_A0)
   8446     { /* SOC_FORMAT_INT_SW3_0_DOP_BCM56770_A0fmt */ 
   8447         /* format            SW3_0_DOPfmt */
   8448         /* nFields     */ 9,
   8449         /* *fields     */ soc_SW3_0_DOP_BCM56770_A0fmt_fields,
   8450         /* bits        */ 64,
   8451         /* flags       */ 0,
   8452     },
   8453 #endif /* chips */
   8454 
   8455 #if defined(BCM_56960_A0) || defined(BCM_56965_A0)
   8456     { /* SOC_FORMAT_INT_SW3_EOP_BUFFER_Afmt */ 
   8457         /* format            SW3_EOP_BUFFER_Afmt */
   8458         /* nFields     */ 8,
   8459         /* *fields     */ soc_SW3_EOP_BUFFER_Afmt_fields,
   8460         /* bits        */ 66,
   8461         /* flags       */ 0,
   8462     },
   8463 #endif /* chips */
   8464 
   8465 #if defined(BCM_56370_A0)
   8466     { /* SOC_FORMAT_INT_SW3_EOP_BUFFER_A_BCM56370_A0fmt */ 
   8467         /* format            SW3_EOP_BUFFER_Afmt */
   8468         /* nFields     */ 8,
   8469         /* *fields     */ soc_SW3_EOP_BUFFER_A_BCM56370_A0fmt_fields,
   8470         /* bits        */ 72,
   8471         /* flags       */ 0,
   8472     },
   8473 #endif /* chips */
   8474 
   8475 #if defined(BCM_56770_A0)
   8476     { /* SOC_FORMAT_INT_SW3_EOP_BUFFER_A_BCM56770_A0fmt */ 
   8477         /* format            SW3_EOP_BUFFER_Afmt */
   8478         /* nFields     */ 7,
   8479         /* *fields     */ soc_SW3_EOP_BUFFER_A_BCM56870_A0fmt_fields,
   8480         /* bits        */ 72,
   8481         /* flags       */ 0,
   8482     },
   8483 #endif /* chips */
   8484 
   8485 #if defined(BCM_56870_A0)
   8486     { /* SOC_FORMAT_INT_SW3_EOP_BUFFER_A_BCM56870_A0fmt */ 
   8487         /* format            SW3_EOP_BUFFER_Afmt */
   8488         /* nFields     */ 7,
   8489         /* *fields     */ soc_SW3_EOP_BUFFER_A_BCM56870_A0fmt_fields,
   8490         /* bits        */ 72,
   8491         /* flags       */ 0,
   8492     },
   8493 #endif /* chips */
   8494 
   8495 #if defined(BCM_56970_A0)
   8496     { /* SOC_FORMAT_INT_SW3_EOP_BUFFER_A_BCM56970_A0fmt */ 
   8497         /* format            SW3_EOP_BUFFER_Afmt */
   8498         /* nFields     */ 10,
   8499         /* *fields     */ soc_SW3_EOP_BUFFER_A_BCM56970_A0fmt_fields,
   8500         /* bits        */ 73,
   8501         /* flags       */ 0,
   8502     },
   8503 #endif /* chips */
   8504 
   8505 #if defined(BCM_56960_A0) || defined(BCM_56965_A0)
   8506     { /* SOC_FORMAT_INT_SW3_EOP_BUFFER_Bfmt */ 
   8507         /* format            SW3_EOP_BUFFER_Bfmt */
   8508         /* nFields     */ 8,
   8509         /* *fields     */ soc_SW3_EOP_BUFFER_Bfmt_fields,
   8510         /* bits        */ 82,
   8511         /* flags       */ 0,
   8512     },
   8513 #endif /* chips */
   8514 
   8515 #if defined(BCM_56370_A0)
   8516     { /* SOC_FORMAT_INT_SW3_EOP_BUFFER_B_BCM56370_A0fmt */ 
   8517         /* format            SW3_EOP_BUFFER_Bfmt */
   8518         /* nFields     */ 11,
   8519         /* *fields     */ soc_SW3_EOP_BUFFER_B_BCM56370_A0fmt_fields,
   8520         /* bits        */ 156,
   8521         /* flags       */ 0,
   8522     },
   8523 #endif /* chips */
   8524 
   8525 #if defined(BCM_56770_A0)
   8526     { /* SOC_FORMAT_INT_SW3_EOP_BUFFER_B_BCM56770_A0fmt */ 
   8527         /* format            SW3_EOP_BUFFER_Bfmt */
   8528         /* nFields     */ 10,
   8529         /* *fields     */ soc_SW3_EOP_BUFFER_B_BCM56870_A0fmt_fields,
   8530         /* bits        */ 152,
   8531         /* flags       */ 0,
   8532     },
   8533 #endif /* chips */
   8534 
   8535 #if defined(BCM_56870_A0)
   8536     { /* SOC_FORMAT_INT_SW3_EOP_BUFFER_B_BCM56870_A0fmt */ 
   8537         /* format            SW3_EOP_BUFFER_Bfmt */
   8538         /* nFields     */ 10,
   8539         /* *fields     */ soc_SW3_EOP_BUFFER_B_BCM56870_A0fmt_fields,
   8540         /* bits        */ 152,
   8541         /* flags       */ 0,
   8542     },
   8543 #endif /* chips */
   8544 
   8545 #if defined(BCM_56970_A0)
   8546     { /* SOC_FORMAT_INT_SW3_EOP_BUFFER_B_BCM56970_A0fmt */ 
   8547         /* format            SW3_EOP_BUFFER_Bfmt */
   8548         /* nFields     */ 11,
   8549         /* *fields     */ soc_SW3_EOP_BUFFER_B_BCM56970_A0fmt_fields,
   8550         /* bits        */ 88,
   8551         /* flags       */ 0,
   8552     },
   8553 #endif /* chips */
   8554 
   8555 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \
   8556     defined(BCM_56870_A0)
   8557     { /* SOC_FORMAT_INT_SWITCHING_CTRLS_ACTION_SETfmt */ 
   8558         /* format            SWITCHING_CTRLS_ACTION_SETfmt */
   8559         /* nFields     */ 6,
   8560         /* *fields     */ soc_SWITCHING_CTRLS_ACTION_SETfmt_fields,
   8561         /* bits        */ 6,
   8562         /* flags       */ 0,
   8563     },
   8564 #endif /* chips */
   8565 
   8566 #if defined(BCM_88732_A0)
   8567     { /* SOC_FORMAT_INT_SWITCH_TO_STUB_SCHfmt */ 
   8568         /* format            SWITCH_TO_STUB_SCHfmt */
   8569         /* nFields     */ 9,
   8570         /* *fields     */ soc_SWITCH_TO_STUB_SCHfmt_fields,
   8571         /* bits        */ 64,
   8572         /* flags       */ 0,
   8573     },
   8574 #endif /* chips */
   8575 
   8576 #if defined(BCM_56980_A0) || defined(BCM_56980_B0)
   8577     { /* SOC_FORMAT_INT_SW_COUNTER_UPDATE_VECTORfmt */ 
   8578         /* format            SW_COUNTER_UPDATE_VECTORfmt */
   8579         /* nFields     */ 12,
   8580         /* *fields     */ soc_SW_COUNTER_UPDATE_VECTORfmt_fields,
   8581         /* bits        */ 32,
   8582         /* flags       */ 0,
   8583     },
   8584 #endif /* chips */
   8585 
   8586 #if defined(BCM_56980_A0) || defined(BCM_56980_B0)
   8587     { /* SOC_FORMAT_INT_SW_EOP_BUFFER_Bfmt */ 
   8588         /* format            SW_EOP_BUFFER_Bfmt */
   8589         /* nFields     */ 9,
   8590         /* *fields     */ soc_SW_EOP_BUFFER_Bfmt_fields,
   8591         /* bits        */ 144,
   8592         /* flags       */ 0,
   8593     },
   8594 #endif /* chips */
   8595 
   8596 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \
   8597     defined(BCM_56870_A0)
   8598     { /* SOC_FORMAT_INT_SYSTEM_HVE_OUTPUT_BUSfmt */ 
   8599         /* format            SYSTEM_HVE_OUTPUT_BUSfmt */
   8600         /* nFields     */ 43,
   8601         /* *fields     */ soc_SYSTEM_HVE_OUTPUT_BUSfmt_fields,
   8602         /* bits        */ 192,
   8603         /* flags       */ 0,
   8604     },
   8605 #endif /* chips */
   8606 
   8607 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \
   8608     defined(BCM_56870_A0)
   8609     { /* SOC_FORMAT_INT_SYSTEM_HVE_TRIGGERS_FORMATfmt */ 
   8610         /* format            SYSTEM_HVE_TRIGGERS_FORMATfmt */
   8611         /* nFields     */ 9,
   8612         /* *fields     */ soc_SYSTEM_HVE_TRIGGERS_FORMATfmt_fields,
   8613         /* bits        */ 10,
   8614         /* flags       */ 0,
   8615     },
   8616 #endif /* chips */
   8617
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