allformats_q.i (11763B)
1 /* 2 * DO NOT EDIT THIS FILE! 3 * This file is auto-generated from the registers file. 4 * Edits to this file will be lost when it is regenerated. 5 * 6 * 7 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 8 * 9 * Copyright 2007-2020 Broadcom Inc. All rights reserved. 10 * 11 * File: allformats_q.i 12 * Purpose: Independent format descriptions. 13 */ 14 15 #if defined(BCM_56840_A0) 16 { /* SOC_FORMAT_INT_QCN_DESCP_INFOfmt */ 17 /* format QCN_DESCP_INFOfmt */ 18 /* nFields */ 9, 19 /* *fields */ soc_QCN_DESCP_INFOfmt_fields, 20 /* bits */ 72, 21 /* flags */ 0, 22 }, 23 #endif /* chips */ 24 25 #if defined(BCM_56340_A0) 26 { /* SOC_FORMAT_INT_QCN_DESCP_INFO_BCM56340_A0fmt */ 27 /* format QCN_DESCP_INFOfmt */ 28 /* nFields */ 10, 29 /* *fields */ soc_QCN_DESCP_INFO_BCM56640_A0fmt_fields, 30 /* bits */ 83, 31 /* flags */ 0, 32 }, 33 #endif /* chips */ 34 35 #if defined(BCM_56560_A0) 36 { /* SOC_FORMAT_INT_QCN_DESCP_INFO_BCM56560_A0fmt */ 37 /* format QCN_DESCP_INFOfmt */ 38 /* nFields */ 12, 39 /* *fields */ soc_QCN_DESCP_INFO_BCM56560_A0fmt_fields, 40 /* bits */ 90, 41 /* flags */ 0, 42 }, 43 #endif /* chips */ 44 45 #if defined(BCM_56560_B0) 46 { /* SOC_FORMAT_INT_QCN_DESCP_INFO_BCM56560_B0fmt */ 47 /* format QCN_DESCP_INFOfmt */ 48 /* nFields */ 12, 49 /* *fields */ soc_QCN_DESCP_INFO_BCM56560_A0fmt_fields, 50 /* bits */ 90, 51 /* flags */ 0, 52 }, 53 #endif /* chips */ 54 55 #if defined(BCM_56640_A0) 56 { /* SOC_FORMAT_INT_QCN_DESCP_INFO_BCM56640_A0fmt */ 57 /* format QCN_DESCP_INFOfmt */ 58 /* nFields */ 10, 59 /* *fields */ soc_QCN_DESCP_INFO_BCM56640_A0fmt_fields, 60 /* bits */ 83, 61 /* flags */ 0, 62 }, 63 #endif /* chips */ 64 65 #if defined(BCM_56840_B0) 66 { /* SOC_FORMAT_INT_QCN_DESCP_INFO_BCM56840_B0fmt */ 67 /* format QCN_DESCP_INFOfmt */ 68 /* nFields */ 9, 69 /* *fields */ soc_QCN_DESCP_INFOfmt_fields, 70 /* bits */ 72, 71 /* flags */ 0, 72 }, 73 #endif /* chips */ 74 75 #if defined(BCM_56850_A0) 76 { /* SOC_FORMAT_INT_QCN_DESCP_INFO_BCM56850_A0fmt */ 77 /* format QCN_DESCP_INFOfmt */ 78 /* nFields */ 11, 79 /* *fields */ soc_QCN_DESCP_INFO_BCM56850_A0fmt_fields, 80 /* bits */ 91, 81 /* flags */ 0, 82 }, 83 #endif /* chips */ 84 85 #if defined(BCM_56860_A0) 86 { /* SOC_FORMAT_INT_QCN_DESCP_INFO_BCM56860_A0fmt */ 87 /* format QCN_DESCP_INFOfmt */ 88 /* nFields */ 12, 89 /* *fields */ soc_QCN_DESCP_INFO_BCM56860_A0fmt_fields, 90 /* bits */ 92, 91 /* flags */ 0, 92 }, 93 #endif /* chips */ 94 95 #if defined(BCM_56840_A0) 96 { /* SOC_FORMAT_INT_QCN_TO_TOQ_INFOfmt */ 97 /* format QCN_TO_TOQ_INFOfmt */ 98 /* nFields */ 9, 99 /* *fields */ soc_QCN_TO_TOQ_INFOfmt_fields, 100 /* bits */ 71, 101 /* flags */ 0, 102 }, 103 #endif /* chips */ 104 105 #if defined(BCM_56340_A0) 106 { /* SOC_FORMAT_INT_QCN_TO_TOQ_INFO_BCM56340_A0fmt */ 107 /* format QCN_TO_TOQ_INFOfmt */ 108 /* nFields */ 9, 109 /* *fields */ soc_QCN_TO_TOQ_INFO_BCM56640_A0fmt_fields, 110 /* bits */ 80, 111 /* flags */ 0, 112 }, 113 #endif /* chips */ 114 115 #if defined(BCM_56560_A0) 116 { /* SOC_FORMAT_INT_QCN_TO_TOQ_INFO_BCM56560_A0fmt */ 117 /* format QCN_TO_TOQ_INFOfmt */ 118 /* nFields */ 10, 119 /* *fields */ soc_QCN_TO_TOQ_INFO_BCM56560_A0fmt_fields, 120 /* bits */ 79, 121 /* flags */ 0, 122 }, 123 #endif /* chips */ 124 125 #if defined(BCM_56560_B0) 126 { /* SOC_FORMAT_INT_QCN_TO_TOQ_INFO_BCM56560_B0fmt */ 127 /* format QCN_TO_TOQ_INFOfmt */ 128 /* nFields */ 10, 129 /* *fields */ soc_QCN_TO_TOQ_INFO_BCM56560_A0fmt_fields, 130 /* bits */ 79, 131 /* flags */ 0, 132 }, 133 #endif /* chips */ 134 135 #if defined(BCM_56640_A0) 136 { /* SOC_FORMAT_INT_QCN_TO_TOQ_INFO_BCM56640_A0fmt */ 137 /* format QCN_TO_TOQ_INFOfmt */ 138 /* nFields */ 9, 139 /* *fields */ soc_QCN_TO_TOQ_INFO_BCM56640_A0fmt_fields, 140 /* bits */ 80, 141 /* flags */ 0, 142 }, 143 #endif /* chips */ 144 145 #if defined(BCM_56670_A0) 146 { /* SOC_FORMAT_INT_QCN_TO_TOQ_INFO_BCM56670_A0fmt */ 147 /* format QCN_TO_TOQ_INFOfmt */ 148 /* nFields */ 10, 149 /* *fields */ soc_QCN_TO_TOQ_INFO_BCM56560_A0fmt_fields, 150 /* bits */ 79, 151 /* flags */ 0, 152 }, 153 #endif /* chips */ 154 155 #if defined(BCM_56670_B0) 156 { /* SOC_FORMAT_INT_QCN_TO_TOQ_INFO_BCM56670_B0fmt */ 157 /* format QCN_TO_TOQ_INFOfmt */ 158 /* nFields */ 10, 159 /* *fields */ soc_QCN_TO_TOQ_INFO_BCM56560_A0fmt_fields, 160 /* bits */ 79, 161 /* flags */ 0, 162 }, 163 #endif /* chips */ 164 165 #if defined(BCM_56840_B0) 166 { /* SOC_FORMAT_INT_QCN_TO_TOQ_INFO_BCM56840_B0fmt */ 167 /* format QCN_TO_TOQ_INFOfmt */ 168 /* nFields */ 9, 169 /* *fields */ soc_QCN_TO_TOQ_INFOfmt_fields, 170 /* bits */ 71, 171 /* flags */ 0, 172 }, 173 #endif /* chips */ 174 175 #if defined(BCM_56850_A0) 176 { /* SOC_FORMAT_INT_QCN_TO_TOQ_INFO_BCM56850_A0fmt */ 177 /* format QCN_TO_TOQ_INFOfmt */ 178 /* nFields */ 9, 179 /* *fields */ soc_QCN_TO_TOQ_INFO_BCM56850_A0fmt_fields, 180 /* bits */ 80, 181 /* flags */ 0, 182 }, 183 #endif /* chips */ 184 185 #if defined(BCM_56860_A0) 186 { /* SOC_FORMAT_INT_QCN_TO_TOQ_INFO_BCM56860_A0fmt */ 187 /* format QCN_TO_TOQ_INFOfmt */ 188 /* nFields */ 10, 189 /* *fields */ soc_QCN_TO_TOQ_INFO_BCM56860_A0fmt_fields, 190 /* bits */ 81, 191 /* flags */ 0, 192 }, 193 #endif /* chips */ 194 195 #if defined(BCM_56820_A0) 196 { /* SOC_FORMAT_INT_QGPORT_TO_IP_CONTROL_WORDfmt */ 197 /* format QGPORT_TO_IP_CONTROL_WORDfmt */ 198 /* nFields */ 6, 199 /* *fields */ soc_QGPORT_TO_IP_CONTROL_WORDfmt_fields, 200 /* bits */ 14, 201 /* flags */ 0, 202 }, 203 #endif /* chips */ 204 205 #if defined(BCM_56725_A0) 206 { /* SOC_FORMAT_INT_QGPORT_TO_IP_CONTROL_WORD_BCM56725_A0fmt */ 207 /* format QGPORT_TO_IP_CONTROL_WORDfmt */ 208 /* nFields */ 6, 209 /* *fields */ soc_QGPORT_TO_IP_CONTROL_WORDfmt_fields, 210 /* bits */ 14, 211 /* flags */ 0, 212 }, 213 #endif /* chips */ 214 215 #if defined(BCM_56440_A0) 216 { /* SOC_FORMAT_INT_QID_ENQ_RQE_STORE_INFOfmt */ 217 /* format QID_ENQ_RQE_STORE_INFOfmt */ 218 /* nFields */ 32, 219 /* *fields */ soc_QID_ENQ_RQE_STORE_INFOfmt_fields, 220 /* bits */ 229, 221 /* flags */ 0, 222 }, 223 #endif /* chips */ 224 225 #if defined(BCM_56260_A0) 226 { /* SOC_FORMAT_INT_QID_ENQ_RQE_STORE_INFO_BCM56260_A0fmt */ 227 /* format QID_ENQ_RQE_STORE_INFOfmt */ 228 /* nFields */ 40, 229 /* *fields */ soc_QID_ENQ_RQE_STORE_INFO_BCM56260_A0fmt_fields, 230 /* bits */ 377, 231 /* flags */ 0, 232 }, 233 #endif /* chips */ 234 235 #if defined(BCM_56260_B0) 236 { /* SOC_FORMAT_INT_QID_ENQ_RQE_STORE_INFO_BCM56260_B0fmt */ 237 /* format QID_ENQ_RQE_STORE_INFOfmt */ 238 /* nFields */ 40, 239 /* *fields */ soc_QID_ENQ_RQE_STORE_INFO_BCM56260_A0fmt_fields, 240 /* bits */ 377, 241 /* flags */ 0, 242 }, 243 #endif /* chips */ 244 245 #if defined(BCM_56270_A0) 246 { /* SOC_FORMAT_INT_QID_ENQ_RQE_STORE_INFO_BCM56270_A0fmt */ 247 /* format QID_ENQ_RQE_STORE_INFOfmt */ 248 /* nFields */ 31, 249 /* *fields */ soc_QID_ENQ_RQE_STORE_INFO_BCM56270_A0fmt_fields, 250 /* bits */ 211, 251 /* flags */ 0, 252 }, 253 #endif /* chips */ 254 255 #if defined(BCM_56440_B0) 256 { /* SOC_FORMAT_INT_QID_ENQ_RQE_STORE_INFO_BCM56440_B0fmt */ 257 /* format QID_ENQ_RQE_STORE_INFOfmt */ 258 /* nFields */ 32, 259 /* *fields */ soc_QID_ENQ_RQE_STORE_INFOfmt_fields, 260 /* bits */ 229, 261 /* flags */ 0, 262 }, 263 #endif /* chips */ 264 265 #if defined(BCM_56450_A0) 266 { /* SOC_FORMAT_INT_QID_ENQ_RQE_STORE_INFO_BCM56450_A0fmt */ 267 /* format QID_ENQ_RQE_STORE_INFOfmt */ 268 /* nFields */ 40, 269 /* *fields */ soc_QID_ENQ_RQE_STORE_INFO_BCM56450_A0fmt_fields, 270 /* bits */ 538, 271 /* flags */ 0, 272 }, 273 #endif /* chips */ 274 275 #if defined(BCM_56450_B0) 276 { /* SOC_FORMAT_INT_QID_ENQ_RQE_STORE_INFO_BCM56450_B0fmt */ 277 /* format QID_ENQ_RQE_STORE_INFOfmt */ 278 /* nFields */ 40, 279 /* *fields */ soc_QID_ENQ_RQE_STORE_INFO_BCM56450_A0fmt_fields, 280 /* bits */ 538, 281 /* flags */ 0, 282 }, 283 #endif /* chips */ 284 285 #if defined(BCM_56450_B1) 286 { /* SOC_FORMAT_INT_QID_ENQ_RQE_STORE_INFO_BCM56450_B1fmt */ 287 /* format QID_ENQ_RQE_STORE_INFOfmt */ 288 /* nFields */ 40, 289 /* *fields */ soc_QID_ENQ_RQE_STORE_INFO_BCM56450_A0fmt_fields, 290 /* bits */ 538, 291 /* flags */ 0, 292 }, 293 #endif /* chips */ 294 295 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 296 defined(BCM_56870_A0) 297 { /* SOC_FORMAT_INT_QOS_ACTION_SETfmt */ 298 /* format QOS_ACTION_SETfmt */ 299 /* nFields */ 2, 300 /* *fields */ soc_QOS_ACTION_SETfmt_fields, 301 /* bits */ 5, 302 /* flags */ 0, 303 }, 304 #endif /* chips */ 305 306 #if defined(BCM_56770_A0) || defined(BCM_56870_A0) 307 { /* SOC_FORMAT_INT_QOS_A_ACTION_SETfmt */ 308 /* format QOS_A_ACTION_SETfmt */ 309 /* nFields */ 5, 310 /* *fields */ soc_QOS_A_ACTION_SETfmt_fields, 311 /* bits */ 10, 312 /* flags */ 0, 313 }, 314 #endif /* chips */ 315 316 #if defined(BCM_56370_A0) 317 { /* SOC_FORMAT_INT_QOS_A_ACTION_SET_BCM56370_A0fmt */ 318 /* format QOS_A_ACTION_SETfmt */ 319 /* nFields */ 5, 320 /* *fields */ soc_QOS_A_ACTION_SET_BCM56370_A0fmt_fields, 321 /* bits */ 10, 322 /* flags */ 0, 323 }, 324 #endif /* chips */ 325 326 #if defined(BCM_56870_A0) 327 { /* SOC_FORMAT_INT_QOS_B_ACTION_SETfmt */ 328 /* format QOS_B_ACTION_SETfmt */ 329 /* nFields */ 5, 330 /* *fields */ soc_QOS_A_ACTION_SETfmt_fields, 331 /* bits */ 10, 332 /* flags */ 0, 333 }, 334 #endif /* chips */ 335 336 #if defined(BCM_56370_A0) 337 { /* SOC_FORMAT_INT_QOS_B_ACTION_SET_BCM56370_A0fmt */ 338 /* format QOS_B_ACTION_SETfmt */ 339 /* nFields */ 5, 340 /* *fields */ soc_QOS_A_ACTION_SET_BCM56370_A0fmt_fields, 341 /* bits */ 10, 342 /* flags */ 0, 343 }, 344 #endif /* chips */ 345 346 #if defined(BCM_56770_A0) 347 { /* SOC_FORMAT_INT_QOS_B_ACTION_SET_BCM56770_A0fmt */ 348 /* format QOS_B_ACTION_SETfmt */ 349 /* nFields */ 5, 350 /* *fields */ soc_QOS_A_ACTION_SETfmt_fields, 351 /* bits */ 10, 352 /* flags */ 0, 353 }, 354 #endif /* chips */ 355 356 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 357 defined(BCM_56870_A0) 358 { /* SOC_FORMAT_INT_QTAG_ACTION_SETfmt */ 359 /* format QTAG_ACTION_SETfmt */ 360 /* nFields */ 2, 361 /* *fields */ soc_QTAG_ACTION_SETfmt_fields, 362 /* bits */ 18, 363 /* flags */ 0, 364 }, 365 #endif /* chips */ 366