allformats_f.i (290387B)
1 /* 2 * DO NOT EDIT THIS FILE! 3 * This file is auto-generated from the registers file. 4 * Edits to this file will be lost when it is regenerated. 5 * 6 * 7 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 8 * 9 * Copyright 2007-2020 Broadcom Inc. All rights reserved. 10 * 11 * File: allformats_f.i 12 * Purpose: Independent format descriptions. 13 */ 14 15 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 16 defined(BCM_56870_A0) 17 { /* SOC_FORMAT_INT_FCOE_ACTION_SETfmt */ 18 /* format FCOE_ACTION_SETfmt */ 19 /* nFields */ 6, 20 /* *fields */ soc_FCOE_ACTION_SETfmt_fields, 21 /* bits */ 24, 22 /* flags */ 0, 23 }, 24 #endif /* chips */ 25 26 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 27 defined(BCM_56870_A0) 28 { /* SOC_FORMAT_INT_FCOE_HDRfmt */ 29 /* format FCOE_HDRfmt */ 30 /* nFields */ 3, 31 /* *fields */ soc_FCOE_HDRfmt_fields, 32 /* bits */ 112, 33 /* flags */ 0, 34 }, 35 #endif /* chips */ 36 37 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 38 defined(BCM_56870_A0) 39 { /* SOC_FORMAT_INT_FCOE_SOF_HDRfmt */ 40 /* format FCOE_SOF_HDRfmt */ 41 /* nFields */ 1, 42 /* *fields */ soc_FCOE_SOF_HDRfmt_fields, 43 /* bits */ 8, 44 /* flags */ 0, 45 }, 46 #endif /* chips */ 47 48 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 49 defined(BCM_56870_A0) 50 { /* SOC_FORMAT_INT_FCOE_STANDARD_HDRfmt */ 51 /* format FCOE_STANDARD_HDRfmt */ 52 /* nFields */ 11, 53 /* *fields */ soc_FCOE_STANDARD_HDRfmt_fields, 54 /* bits */ 160, 55 /* flags */ 0, 56 }, 57 #endif /* chips */ 58 59 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 60 defined(BCM_56870_A0) 61 { /* SOC_FORMAT_INT_FCOE_VFT_HDRfmt */ 62 /* format FCOE_VFT_HDRfmt */ 63 /* nFields */ 10, 64 /* *fields */ soc_FCOE_VFT_HDRfmt_fields, 65 /* bits */ 64, 66 /* flags */ 0, 67 }, 68 #endif /* chips */ 69 70 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 71 defined(BCM_56870_A0) 72 { /* SOC_FORMAT_INT_FIELD_BUS_MERGE_PROFILE_0_INDEXfmt */ 73 /* format FIELD_BUS_MERGE_PROFILE_0_INDEXfmt */ 74 /* nFields */ 3, 75 /* *fields */ soc_FIELD_BUS_MERGE_PROFILE_0_INDEXfmt_fields, 76 /* bits */ 3, 77 /* flags */ 0, 78 }, 79 #endif /* chips */ 80 81 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 82 defined(BCM_56870_A0) 83 { /* SOC_FORMAT_INT_FIELD_BUS_MERGE_PROFILE_INDEXfmt */ 84 /* format FIELD_BUS_MERGE_PROFILE_INDEXfmt */ 85 /* nFields */ 3, 86 /* *fields */ soc_FIELD_BUS_MERGE_PROFILE_INDEXfmt_fields, 87 /* bits */ 10, 88 /* flags */ 0, 89 }, 90 #endif /* chips */ 91 92 #if defined(BCM_56150_A0) || defined(BCM_56340_A0) || \ 93 defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 94 defined(BCM_56450_B1) || defined(BCM_56640_A0) || \ 95 defined(BCM_56850_A0) || defined(BCM_56860_A0) 96 { /* SOC_FORMAT_INT_FIFO_RD_DMA_ERROR_VECfmt */ 97 /* format FIFO_RD_DMA_ERROR_VECfmt */ 98 /* nFields */ 7, 99 /* *fields */ soc_FIFO_RD_DMA_ERROR_VECfmt_fields, 100 /* bits */ 8, 101 /* flags */ 0, 102 }, 103 #endif /* chips */ 104 105 #if defined(BCM_53400_A0) 106 { /* SOC_FORMAT_INT_FIFO_RD_DMA_ERROR_VEC_BCM53400_A0fmt */ 107 /* format FIFO_RD_DMA_ERROR_VECfmt */ 108 /* nFields */ 7, 109 /* *fields */ soc_FIFO_RD_DMA_ERROR_VEC_BCM53400_A0fmt_fields, 110 /* bits */ 8, 111 /* flags */ 0, 112 }, 113 #endif /* chips */ 114 115 #if defined(BCM_53540_A0) 116 { /* SOC_FORMAT_INT_FIFO_RD_DMA_ERROR_VEC_BCM53540_A0fmt */ 117 /* format FIFO_RD_DMA_ERROR_VECfmt */ 118 /* nFields */ 7, 119 /* *fields */ soc_FIFO_RD_DMA_ERROR_VEC_BCM53400_A0fmt_fields, 120 /* bits */ 8, 121 /* flags */ 0, 122 }, 123 #endif /* chips */ 124 125 #if defined(BCM_53570_A0) 126 { /* SOC_FORMAT_INT_FIFO_RD_DMA_ERROR_VEC_BCM53570_A0fmt */ 127 /* format FIFO_RD_DMA_ERROR_VECfmt */ 128 /* nFields */ 7, 129 /* *fields */ soc_FIFO_RD_DMA_ERROR_VEC_BCM53400_A0fmt_fields, 130 /* bits */ 8, 131 /* flags */ 0, 132 }, 133 #endif /* chips */ 134 135 #if defined(BCM_53570_B0) 136 { /* SOC_FORMAT_INT_FIFO_RD_DMA_ERROR_VEC_BCM53570_B0fmt */ 137 /* format FIFO_RD_DMA_ERROR_VECfmt */ 138 /* nFields */ 7, 139 /* *fields */ soc_FIFO_RD_DMA_ERROR_VEC_BCM53400_A0fmt_fields, 140 /* bits */ 8, 141 /* flags */ 0, 142 }, 143 #endif /* chips */ 144 145 #if defined(BCM_56160_A0) 146 { /* SOC_FORMAT_INT_FIFO_RD_DMA_ERROR_VEC_BCM56160_A0fmt */ 147 /* format FIFO_RD_DMA_ERROR_VECfmt */ 148 /* nFields */ 7, 149 /* *fields */ soc_FIFO_RD_DMA_ERROR_VEC_BCM53400_A0fmt_fields, 150 /* bits */ 8, 151 /* flags */ 0, 152 }, 153 #endif /* chips */ 154 155 #if defined(BCM_56260_A0) 156 { /* SOC_FORMAT_INT_FIFO_RD_DMA_ERROR_VEC_BCM56260_A0fmt */ 157 /* format FIFO_RD_DMA_ERROR_VECfmt */ 158 /* nFields */ 7, 159 /* *fields */ soc_FIFO_RD_DMA_ERROR_VEC_BCM53400_A0fmt_fields, 160 /* bits */ 8, 161 /* flags */ 0, 162 }, 163 #endif /* chips */ 164 165 #if defined(BCM_56260_B0) 166 { /* SOC_FORMAT_INT_FIFO_RD_DMA_ERROR_VEC_BCM56260_B0fmt */ 167 /* format FIFO_RD_DMA_ERROR_VECfmt */ 168 /* nFields */ 7, 169 /* *fields */ soc_FIFO_RD_DMA_ERROR_VEC_BCM53400_A0fmt_fields, 170 /* bits */ 8, 171 /* flags */ 0, 172 }, 173 #endif /* chips */ 174 175 #if defined(BCM_56270_A0) 176 { /* SOC_FORMAT_INT_FIFO_RD_DMA_ERROR_VEC_BCM56270_A0fmt */ 177 /* format FIFO_RD_DMA_ERROR_VECfmt */ 178 /* nFields */ 7, 179 /* *fields */ soc_FIFO_RD_DMA_ERROR_VEC_BCM53400_A0fmt_fields, 180 /* bits */ 8, 181 /* flags */ 0, 182 }, 183 #endif /* chips */ 184 185 #if defined(BCM_56370_A0) 186 { /* SOC_FORMAT_INT_FIFO_RD_DMA_ERROR_VEC_BCM56370_A0fmt */ 187 /* format FIFO_RD_DMA_ERROR_VECfmt */ 188 /* nFields */ 7, 189 /* *fields */ soc_FIFO_RD_DMA_ERROR_VEC_BCM53400_A0fmt_fields, 190 /* bits */ 8, 191 /* flags */ 0, 192 }, 193 #endif /* chips */ 194 195 #if defined(BCM_56560_A0) 196 { /* SOC_FORMAT_INT_FIFO_RD_DMA_ERROR_VEC_BCM56560_A0fmt */ 197 /* format FIFO_RD_DMA_ERROR_VECfmt */ 198 /* nFields */ 7, 199 /* *fields */ soc_FIFO_RD_DMA_ERROR_VEC_BCM53400_A0fmt_fields, 200 /* bits */ 8, 201 /* flags */ 0, 202 }, 203 #endif /* chips */ 204 205 #if defined(BCM_56560_B0) 206 { /* SOC_FORMAT_INT_FIFO_RD_DMA_ERROR_VEC_BCM56560_B0fmt */ 207 /* format FIFO_RD_DMA_ERROR_VECfmt */ 208 /* nFields */ 7, 209 /* *fields */ soc_FIFO_RD_DMA_ERROR_VEC_BCM53400_A0fmt_fields, 210 /* bits */ 8, 211 /* flags */ 0, 212 }, 213 #endif /* chips */ 214 215 #if defined(BCM_56670_A0) 216 { /* SOC_FORMAT_INT_FIFO_RD_DMA_ERROR_VEC_BCM56670_A0fmt */ 217 /* format FIFO_RD_DMA_ERROR_VECfmt */ 218 /* nFields */ 7, 219 /* *fields */ soc_FIFO_RD_DMA_ERROR_VEC_BCM53400_A0fmt_fields, 220 /* bits */ 8, 221 /* flags */ 0, 222 }, 223 #endif /* chips */ 224 225 #if defined(BCM_56670_B0) 226 { /* SOC_FORMAT_INT_FIFO_RD_DMA_ERROR_VEC_BCM56670_B0fmt */ 227 /* format FIFO_RD_DMA_ERROR_VECfmt */ 228 /* nFields */ 7, 229 /* *fields */ soc_FIFO_RD_DMA_ERROR_VEC_BCM53400_A0fmt_fields, 230 /* bits */ 8, 231 /* flags */ 0, 232 }, 233 #endif /* chips */ 234 235 #if defined(BCM_56770_A0) 236 { /* SOC_FORMAT_INT_FIFO_RD_DMA_ERROR_VEC_BCM56770_A0fmt */ 237 /* format FIFO_RD_DMA_ERROR_VECfmt */ 238 /* nFields */ 7, 239 /* *fields */ soc_FIFO_RD_DMA_ERROR_VEC_BCM53400_A0fmt_fields, 240 /* bits */ 8, 241 /* flags */ 0, 242 }, 243 #endif /* chips */ 244 245 #if defined(BCM_56870_A0) 246 { /* SOC_FORMAT_INT_FIFO_RD_DMA_ERROR_VEC_BCM56870_A0fmt */ 247 /* format FIFO_RD_DMA_ERROR_VECfmt */ 248 /* nFields */ 7, 249 /* *fields */ soc_FIFO_RD_DMA_ERROR_VEC_BCM53400_A0fmt_fields, 250 /* bits */ 8, 251 /* flags */ 0, 252 }, 253 #endif /* chips */ 254 255 #if defined(BCM_56960_A0) 256 { /* SOC_FORMAT_INT_FIFO_RD_DMA_ERROR_VEC_BCM56960_A0fmt */ 257 /* format FIFO_RD_DMA_ERROR_VECfmt */ 258 /* nFields */ 7, 259 /* *fields */ soc_FIFO_RD_DMA_ERROR_VEC_BCM53400_A0fmt_fields, 260 /* bits */ 8, 261 /* flags */ 0, 262 }, 263 #endif /* chips */ 264 265 #if defined(BCM_56965_A0) 266 { /* SOC_FORMAT_INT_FIFO_RD_DMA_ERROR_VEC_BCM56965_A0fmt */ 267 /* format FIFO_RD_DMA_ERROR_VECfmt */ 268 /* nFields */ 7, 269 /* *fields */ soc_FIFO_RD_DMA_ERROR_VEC_BCM53400_A0fmt_fields, 270 /* bits */ 8, 271 /* flags */ 0, 272 }, 273 #endif /* chips */ 274 275 #if defined(BCM_56970_A0) 276 { /* SOC_FORMAT_INT_FIFO_RD_DMA_ERROR_VEC_BCM56970_A0fmt */ 277 /* format FIFO_RD_DMA_ERROR_VECfmt */ 278 /* nFields */ 7, 279 /* *fields */ soc_FIFO_RD_DMA_ERROR_VEC_BCM53400_A0fmt_fields, 280 /* bits */ 8, 281 /* flags */ 0, 282 }, 283 #endif /* chips */ 284 285 #if defined(BCM_56980_A0) 286 { /* SOC_FORMAT_INT_FIFO_RD_DMA_ERROR_VEC_BCM56980_A0fmt */ 287 /* format FIFO_RD_DMA_ERROR_VECfmt */ 288 /* nFields */ 7, 289 /* *fields */ soc_FIFO_RD_DMA_ERROR_VEC_BCM53400_A0fmt_fields, 290 /* bits */ 8, 291 /* flags */ 0, 292 }, 293 #endif /* chips */ 294 295 #if defined(BCM_56980_B0) 296 { /* SOC_FORMAT_INT_FIFO_RD_DMA_ERROR_VEC_BCM56980_B0fmt */ 297 /* format FIFO_RD_DMA_ERROR_VECfmt */ 298 /* nFields */ 7, 299 /* *fields */ soc_FIFO_RD_DMA_ERROR_VEC_BCM53400_A0fmt_fields, 300 /* bits */ 8, 301 /* flags */ 0, 302 }, 303 #endif /* chips */ 304 305 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 306 defined(BCM_56870_A0) 307 { /* SOC_FORMAT_INT_FIXED_ACTION_SETfmt */ 308 /* format FIXED_ACTION_SETfmt */ 309 /* nFields */ 1, 310 /* *fields */ soc_FIXED_ACTION_SETfmt_fields, 311 /* bits */ 1, 312 /* flags */ 0, 313 }, 314 #endif /* chips */ 315 316 #if defined(BCM_56980_A0) || defined(BCM_56980_B0) 317 { /* SOC_FORMAT_INT_FIXED_DATAfmt */ 318 /* format FIXED_DATAfmt */ 319 /* nFields */ 1, 320 /* *fields */ soc_FIXED_DATAfmt_fields, 321 /* bits */ 2, 322 /* flags */ 0, 323 }, 324 #endif /* chips */ 325 326 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 327 defined(BCM_56870_A0) 328 { /* SOC_FORMAT_INT_FLEXKEY_MEMSELfmt */ 329 /* format FLEXKEY_MEMSELfmt */ 330 /* nFields */ 1, 331 /* *fields */ soc_FLEXKEY_MEMSELfmt_fields, 332 /* bits */ 4, 333 /* flags */ 0, 334 }, 335 #endif /* chips */ 336 337 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 338 defined(BCM_56870_A0) 339 { /* SOC_FORMAT_INT_FLEX_ASSIGNMENT_CTRL_FORMATfmt */ 340 /* format FLEX_ASSIGNMENT_CTRL_FORMATfmt */ 341 /* nFields */ 1, 342 /* *fields */ soc_FLEX_ASSIGNMENT_CTRL_FORMATfmt_fields, 343 /* bits */ 2, 344 /* flags */ 0, 345 }, 346 #endif /* chips */ 347 348 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 349 defined(BCM_56870_A0) 350 { /* SOC_FORMAT_INT_FLEX_BIN_HASH_PROFILE_FORMATfmt */ 351 /* format FLEX_BIN_HASH_PROFILE_FORMATfmt */ 352 /* nFields */ 5, 353 /* *fields */ soc_FLEX_BIN_HASH_PROFILE_FORMATfmt_fields, 354 /* bits */ 24, 355 /* flags */ 0, 356 }, 357 #endif /* chips */ 358 359 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 360 defined(BCM_56870_A0) 361 { /* SOC_FORMAT_INT_FLEX_CONTAINER_UPDATE_ACTION_SETfmt */ 362 /* format FLEX_CONTAINER_UPDATE_ACTION_SETfmt */ 363 /* nFields */ 1, 364 /* *fields */ soc_FLEX_CONTAINER_UPDATE_ACTION_SETfmt_fields, 365 /* bits */ 4, 366 /* flags */ 0, 367 }, 368 #endif /* chips */ 369 370 #if defined(BCM_56860_A0) 371 { /* SOC_FORMAT_INT_FLEX_CTR_ACTION_BUS_POOLfmt */ 372 /* format FLEX_CTR_ACTION_BUS_POOLfmt */ 373 /* nFields */ 2, 374 /* *fields */ soc_FLEX_CTR_ACTION_BUS_POOLfmt_fields, 375 /* bits */ 4, 376 /* flags */ 0, 377 }, 378 #endif /* chips */ 379 380 #if defined(BCM_56560_A0) 381 { /* SOC_FORMAT_INT_FLEX_CTR_ACTION_BUS_POOL_BCM56560_A0fmt */ 382 /* format FLEX_CTR_ACTION_BUS_POOLfmt */ 383 /* nFields */ 2, 384 /* *fields */ soc_FLEX_CTR_ACTION_BUS_POOL_BCM56560_A0fmt_fields, 385 /* bits */ 4, 386 /* flags */ 0, 387 }, 388 #endif /* chips */ 389 390 #if defined(BCM_56560_B0) 391 { /* SOC_FORMAT_INT_FLEX_CTR_ACTION_BUS_POOL_BCM56560_B0fmt */ 392 /* format FLEX_CTR_ACTION_BUS_POOLfmt */ 393 /* nFields */ 2, 394 /* *fields */ soc_FLEX_CTR_ACTION_BUS_POOL_BCM56560_A0fmt_fields, 395 /* bits */ 4, 396 /* flags */ 0, 397 }, 398 #endif /* chips */ 399 400 #if defined(BCM_56670_A0) 401 { /* SOC_FORMAT_INT_FLEX_CTR_ACTION_BUS_POOL_BCM56670_A0fmt */ 402 /* format FLEX_CTR_ACTION_BUS_POOLfmt */ 403 /* nFields */ 2, 404 /* *fields */ soc_FLEX_CTR_ACTION_BUS_POOL_BCM56560_A0fmt_fields, 405 /* bits */ 4, 406 /* flags */ 0, 407 }, 408 #endif /* chips */ 409 410 #if defined(BCM_56670_B0) 411 { /* SOC_FORMAT_INT_FLEX_CTR_ACTION_BUS_POOL_BCM56670_B0fmt */ 412 /* format FLEX_CTR_ACTION_BUS_POOLfmt */ 413 /* nFields */ 2, 414 /* *fields */ soc_FLEX_CTR_ACTION_BUS_POOL_BCM56560_A0fmt_fields, 415 /* bits */ 4, 416 /* flags */ 0, 417 }, 418 #endif /* chips */ 419 420 #if defined(BCM_56770_A0) || defined(BCM_56870_A0) 421 { /* SOC_FORMAT_INT_FLEX_CTR_ACTION_SETfmt */ 422 /* format FLEX_CTR_ACTION_SETfmt */ 423 /* nFields */ 5, 424 /* *fields */ soc_FLEX_CTR_ACTION_SETfmt_fields, 425 /* bits */ 21, 426 /* flags */ 0, 427 }, 428 #endif /* chips */ 429 430 #if defined(BCM_56370_A0) 431 { /* SOC_FORMAT_INT_FLEX_CTR_ACTION_SET_BCM56370_A0fmt */ 432 /* format FLEX_CTR_ACTION_SETfmt */ 433 /* nFields */ 5, 434 /* *fields */ soc_FLEX_CTR_ACTION_SET_BCM56370_A0fmt_fields, 435 /* bits */ 21, 436 /* flags */ 0, 437 }, 438 #endif /* chips */ 439 440 #if defined(BCM_56440_A0) 441 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFSfmt */ 442 /* format FLEX_CTR_COV_DEFSfmt */ 443 /* nFields */ 5, 444 /* *fields */ soc_FLEX_CTR_COV_DEFSfmt_fields, 445 /* bits */ 23, 446 /* flags */ 0, 447 }, 448 #endif /* chips */ 449 450 #if defined(BCM_56260_A0) 451 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFS_BCM56260_A0fmt */ 452 /* format FLEX_CTR_COV_DEFSfmt */ 453 /* nFields */ 5, 454 /* *fields */ soc_FLEX_CTR_COV_DEFS_BCM56260_A0fmt_fields, 455 /* bits */ 23, 456 /* flags */ 0, 457 }, 458 #endif /* chips */ 459 460 #if defined(BCM_56260_B0) 461 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFS_BCM56260_B0fmt */ 462 /* format FLEX_CTR_COV_DEFSfmt */ 463 /* nFields */ 5, 464 /* *fields */ soc_FLEX_CTR_COV_DEFS_BCM56260_A0fmt_fields, 465 /* bits */ 23, 466 /* flags */ 0, 467 }, 468 #endif /* chips */ 469 470 #if defined(BCM_56270_A0) 471 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFS_BCM56270_A0fmt */ 472 /* format FLEX_CTR_COV_DEFSfmt */ 473 /* nFields */ 5, 474 /* *fields */ soc_FLEX_CTR_COV_DEFS_BCM56260_A0fmt_fields, 475 /* bits */ 23, 476 /* flags */ 0, 477 }, 478 #endif /* chips */ 479 480 #if defined(BCM_56340_A0) 481 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFS_BCM56340_A0fmt */ 482 /* format FLEX_CTR_COV_DEFSfmt */ 483 /* nFields */ 6, 484 /* *fields */ soc_FLEX_CTR_COV_DEFS_BCM56640_A0fmt_fields, 485 /* bits */ 23, 486 /* flags */ 0, 487 }, 488 #endif /* chips */ 489 490 #if defined(BCM_56370_A0) 491 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFS_BCM56370_A0fmt */ 492 /* format FLEX_CTR_COV_DEFSfmt */ 493 /* nFields */ 8, 494 /* *fields */ soc_FLEX_CTR_COV_DEFS_BCM56970_A0fmt_fields, 495 /* bits */ 22, 496 /* flags */ 0, 497 }, 498 #endif /* chips */ 499 500 #if defined(BCM_56440_B0) 501 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFS_BCM56440_B0fmt */ 502 /* format FLEX_CTR_COV_DEFSfmt */ 503 /* nFields */ 5, 504 /* *fields */ soc_FLEX_CTR_COV_DEFSfmt_fields, 505 /* bits */ 23, 506 /* flags */ 0, 507 }, 508 #endif /* chips */ 509 510 #if defined(BCM_56450_A0) 511 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFS_BCM56450_A0fmt */ 512 /* format FLEX_CTR_COV_DEFSfmt */ 513 /* nFields */ 5, 514 /* *fields */ soc_FLEX_CTR_COV_DEFS_BCM56450_A0fmt_fields, 515 /* bits */ 23, 516 /* flags */ 0, 517 }, 518 #endif /* chips */ 519 520 #if defined(BCM_56450_B0) 521 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFS_BCM56450_B0fmt */ 522 /* format FLEX_CTR_COV_DEFSfmt */ 523 /* nFields */ 5, 524 /* *fields */ soc_FLEX_CTR_COV_DEFS_BCM56450_A0fmt_fields, 525 /* bits */ 23, 526 /* flags */ 0, 527 }, 528 #endif /* chips */ 529 530 #if defined(BCM_56450_B1) 531 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFS_BCM56450_B1fmt */ 532 /* format FLEX_CTR_COV_DEFSfmt */ 533 /* nFields */ 5, 534 /* *fields */ soc_FLEX_CTR_COV_DEFS_BCM56450_A0fmt_fields, 535 /* bits */ 23, 536 /* flags */ 0, 537 }, 538 #endif /* chips */ 539 540 #if defined(BCM_56560_A0) 541 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFS_BCM56560_A0fmt */ 542 /* format FLEX_CTR_COV_DEFSfmt */ 543 /* nFields */ 8, 544 /* *fields */ soc_FLEX_CTR_COV_DEFS_BCM56560_A0fmt_fields, 545 /* bits */ 20, 546 /* flags */ 0, 547 }, 548 #endif /* chips */ 549 550 #if defined(BCM_56560_B0) 551 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFS_BCM56560_B0fmt */ 552 /* format FLEX_CTR_COV_DEFSfmt */ 553 /* nFields */ 8, 554 /* *fields */ soc_FLEX_CTR_COV_DEFS_BCM56560_A0fmt_fields, 555 /* bits */ 20, 556 /* flags */ 0, 557 }, 558 #endif /* chips */ 559 560 #if defined(BCM_56640_A0) 561 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFS_BCM56640_A0fmt */ 562 /* format FLEX_CTR_COV_DEFSfmt */ 563 /* nFields */ 6, 564 /* *fields */ soc_FLEX_CTR_COV_DEFS_BCM56640_A0fmt_fields, 565 /* bits */ 23, 566 /* flags */ 0, 567 }, 568 #endif /* chips */ 569 570 #if defined(BCM_56670_A0) 571 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFS_BCM56670_A0fmt */ 572 /* format FLEX_CTR_COV_DEFSfmt */ 573 /* nFields */ 8, 574 /* *fields */ soc_FLEX_CTR_COV_DEFS_BCM56560_A0fmt_fields, 575 /* bits */ 20, 576 /* flags */ 0, 577 }, 578 #endif /* chips */ 579 580 #if defined(BCM_56670_B0) 581 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFS_BCM56670_B0fmt */ 582 /* format FLEX_CTR_COV_DEFSfmt */ 583 /* nFields */ 8, 584 /* *fields */ soc_FLEX_CTR_COV_DEFS_BCM56560_A0fmt_fields, 585 /* bits */ 20, 586 /* flags */ 0, 587 }, 588 #endif /* chips */ 589 590 #if defined(BCM_56770_A0) 591 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFS_BCM56770_A0fmt */ 592 /* format FLEX_CTR_COV_DEFSfmt */ 593 /* nFields */ 8, 594 /* *fields */ soc_FLEX_CTR_COV_DEFS_BCM56970_A0fmt_fields, 595 /* bits */ 22, 596 /* flags */ 0, 597 }, 598 #endif /* chips */ 599 600 #if defined(BCM_56850_A0) 601 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFS_BCM56850_A0fmt */ 602 /* format FLEX_CTR_COV_DEFSfmt */ 603 /* nFields */ 6, 604 /* *fields */ soc_FLEX_CTR_COV_DEFS_BCM56850_A0fmt_fields, 605 /* bits */ 19, 606 /* flags */ 0, 607 }, 608 #endif /* chips */ 609 610 #if defined(BCM_56860_A0) 611 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFS_BCM56860_A0fmt */ 612 /* format FLEX_CTR_COV_DEFSfmt */ 613 /* nFields */ 8, 614 /* *fields */ soc_FLEX_CTR_COV_DEFS_BCM56860_A0fmt_fields, 615 /* bits */ 20, 616 /* flags */ 0, 617 }, 618 #endif /* chips */ 619 620 #if defined(BCM_56870_A0) 621 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFS_BCM56870_A0fmt */ 622 /* format FLEX_CTR_COV_DEFSfmt */ 623 /* nFields */ 8, 624 /* *fields */ soc_FLEX_CTR_COV_DEFS_BCM56970_A0fmt_fields, 625 /* bits */ 22, 626 /* flags */ 0, 627 }, 628 #endif /* chips */ 629 630 #if defined(BCM_56960_A0) 631 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFS_BCM56960_A0fmt */ 632 /* format FLEX_CTR_COV_DEFSfmt */ 633 /* nFields */ 8, 634 /* *fields */ soc_FLEX_CTR_COV_DEFS_BCM56960_A0fmt_fields, 635 /* bits */ 21, 636 /* flags */ 0, 637 }, 638 #endif /* chips */ 639 640 #if defined(BCM_56965_A0) 641 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFS_BCM56965_A0fmt */ 642 /* format FLEX_CTR_COV_DEFSfmt */ 643 /* nFields */ 8, 644 /* *fields */ soc_FLEX_CTR_COV_DEFS_BCM56960_A0fmt_fields, 645 /* bits */ 21, 646 /* flags */ 0, 647 }, 648 #endif /* chips */ 649 650 #if defined(BCM_56970_A0) 651 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFS_BCM56970_A0fmt */ 652 /* format FLEX_CTR_COV_DEFSfmt */ 653 /* nFields */ 8, 654 /* *fields */ soc_FLEX_CTR_COV_DEFS_BCM56970_A0fmt_fields, 655 /* bits */ 22, 656 /* flags */ 0, 657 }, 658 #endif /* chips */ 659 660 #if defined(BCM_56980_A0) 661 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFS_BCM56980_A0fmt */ 662 /* format FLEX_CTR_COV_DEFSfmt */ 663 /* nFields */ 8, 664 /* *fields */ soc_FLEX_CTR_COV_DEFS_BCM56980_A0fmt_fields, 665 /* bits */ 21, 666 /* flags */ 0, 667 }, 668 #endif /* chips */ 669 670 #if defined(BCM_56980_B0) 671 { /* SOC_FORMAT_INT_FLEX_CTR_COV_DEFS_BCM56980_B0fmt */ 672 /* format FLEX_CTR_COV_DEFSfmt */ 673 /* nFields */ 8, 674 /* *fields */ soc_FLEX_CTR_COV_DEFS_BCM56980_A0fmt_fields, 675 /* bits */ 21, 676 /* flags */ 0, 677 }, 678 #endif /* chips */ 679 680 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 681 { /* SOC_FORMAT_INT_FLEX_CTR_DEFINESfmt */ 682 /* format FLEX_CTR_DEFINESfmt */ 683 /* nFields */ 1, 684 /* *fields */ soc_FLEX_CTR_DEFINESfmt_fields, 685 /* bits */ 4, 686 /* flags */ 0, 687 }, 688 #endif /* chips */ 689 690 #if defined(BCM_56440_A0) 691 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATAfmt */ 692 /* format FLEX_CTR_FT_READ_DATAfmt */ 693 /* nFields */ 4, 694 /* *fields */ soc_FLEX_CTR_FT_READ_DATAfmt_fields, 695 /* bits */ 68, 696 /* flags */ 0, 697 }, 698 #endif /* chips */ 699 700 #if defined(BCM_56260_A0) 701 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATA_BCM56260_A0fmt */ 702 /* format FLEX_CTR_FT_READ_DATAfmt */ 703 /* nFields */ 4, 704 /* *fields */ soc_FLEX_CTR_FT_READ_DATA_BCM56960_A0fmt_fields, 705 /* bits */ 68, 706 /* flags */ 0, 707 }, 708 #endif /* chips */ 709 710 #if defined(BCM_56260_B0) 711 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATA_BCM56260_B0fmt */ 712 /* format FLEX_CTR_FT_READ_DATAfmt */ 713 /* nFields */ 4, 714 /* *fields */ soc_FLEX_CTR_FT_READ_DATA_BCM56960_A0fmt_fields, 715 /* bits */ 68, 716 /* flags */ 0, 717 }, 718 #endif /* chips */ 719 720 #if defined(BCM_56270_A0) 721 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATA_BCM56270_A0fmt */ 722 /* format FLEX_CTR_FT_READ_DATAfmt */ 723 /* nFields */ 4, 724 /* *fields */ soc_FLEX_CTR_FT_READ_DATA_BCM56960_A0fmt_fields, 725 /* bits */ 68, 726 /* flags */ 0, 727 }, 728 #endif /* chips */ 729 730 #if defined(BCM_56340_A0) 731 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATA_BCM56340_A0fmt */ 732 /* format FLEX_CTR_FT_READ_DATAfmt */ 733 /* nFields */ 4, 734 /* *fields */ soc_FLEX_CTR_FT_READ_DATA_BCM56640_A0fmt_fields, 735 /* bits */ 68, 736 /* flags */ 0, 737 }, 738 #endif /* chips */ 739 740 #if defined(BCM_56370_A0) 741 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATA_BCM56370_A0fmt */ 742 /* format FLEX_CTR_FT_READ_DATAfmt */ 743 /* nFields */ 4, 744 /* *fields */ soc_FLEX_CTR_FT_READ_DATA_BCM56870_A0fmt_fields, 745 /* bits */ 66, 746 /* flags */ 0, 747 }, 748 #endif /* chips */ 749 750 #if defined(BCM_56440_B0) 751 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATA_BCM56440_B0fmt */ 752 /* format FLEX_CTR_FT_READ_DATAfmt */ 753 /* nFields */ 4, 754 /* *fields */ soc_FLEX_CTR_FT_READ_DATAfmt_fields, 755 /* bits */ 68, 756 /* flags */ 0, 757 }, 758 #endif /* chips */ 759 760 #if defined(BCM_56450_A0) 761 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATA_BCM56450_A0fmt */ 762 /* format FLEX_CTR_FT_READ_DATAfmt */ 763 /* nFields */ 4, 764 /* *fields */ soc_FLEX_CTR_FT_READ_DATA_BCM56640_A0fmt_fields, 765 /* bits */ 68, 766 /* flags */ 0, 767 }, 768 #endif /* chips */ 769 770 #if defined(BCM_56450_B0) 771 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATA_BCM56450_B0fmt */ 772 /* format FLEX_CTR_FT_READ_DATAfmt */ 773 /* nFields */ 4, 774 /* *fields */ soc_FLEX_CTR_FT_READ_DATA_BCM56640_A0fmt_fields, 775 /* bits */ 68, 776 /* flags */ 0, 777 }, 778 #endif /* chips */ 779 780 #if defined(BCM_56450_B1) 781 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATA_BCM56450_B1fmt */ 782 /* format FLEX_CTR_FT_READ_DATAfmt */ 783 /* nFields */ 4, 784 /* *fields */ soc_FLEX_CTR_FT_READ_DATA_BCM56640_A0fmt_fields, 785 /* bits */ 68, 786 /* flags */ 0, 787 }, 788 #endif /* chips */ 789 790 #if defined(BCM_56560_A0) 791 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATA_BCM56560_A0fmt */ 792 /* format FLEX_CTR_FT_READ_DATAfmt */ 793 /* nFields */ 5, 794 /* *fields */ soc_FLEX_CTR_FT_READ_DATA_BCM56560_A0fmt_fields, 795 /* bits */ 81, 796 /* flags */ 0, 797 }, 798 #endif /* chips */ 799 800 #if defined(BCM_56560_B0) 801 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATA_BCM56560_B0fmt */ 802 /* format FLEX_CTR_FT_READ_DATAfmt */ 803 /* nFields */ 5, 804 /* *fields */ soc_FLEX_CTR_FT_READ_DATA_BCM56560_A0fmt_fields, 805 /* bits */ 81, 806 /* flags */ 0, 807 }, 808 #endif /* chips */ 809 810 #if defined(BCM_56640_A0) 811 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATA_BCM56640_A0fmt */ 812 /* format FLEX_CTR_FT_READ_DATAfmt */ 813 /* nFields */ 4, 814 /* *fields */ soc_FLEX_CTR_FT_READ_DATA_BCM56640_A0fmt_fields, 815 /* bits */ 68, 816 /* flags */ 0, 817 }, 818 #endif /* chips */ 819 820 #if defined(BCM_56670_A0) 821 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATA_BCM56670_A0fmt */ 822 /* format FLEX_CTR_FT_READ_DATAfmt */ 823 /* nFields */ 5, 824 /* *fields */ soc_FLEX_CTR_FT_READ_DATA_BCM56560_A0fmt_fields, 825 /* bits */ 81, 826 /* flags */ 0, 827 }, 828 #endif /* chips */ 829 830 #if defined(BCM_56670_B0) 831 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATA_BCM56670_B0fmt */ 832 /* format FLEX_CTR_FT_READ_DATAfmt */ 833 /* nFields */ 5, 834 /* *fields */ soc_FLEX_CTR_FT_READ_DATA_BCM56560_A0fmt_fields, 835 /* bits */ 81, 836 /* flags */ 0, 837 }, 838 #endif /* chips */ 839 840 #if defined(BCM_56770_A0) 841 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATA_BCM56770_A0fmt */ 842 /* format FLEX_CTR_FT_READ_DATAfmt */ 843 /* nFields */ 4, 844 /* *fields */ soc_FLEX_CTR_FT_READ_DATA_BCM56870_A0fmt_fields, 845 /* bits */ 66, 846 /* flags */ 0, 847 }, 848 #endif /* chips */ 849 850 #if defined(BCM_56850_A0) 851 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATA_BCM56850_A0fmt */ 852 /* format FLEX_CTR_FT_READ_DATAfmt */ 853 /* nFields */ 4, 854 /* *fields */ soc_FLEX_CTR_FT_READ_DATA_BCM56640_A0fmt_fields, 855 /* bits */ 68, 856 /* flags */ 0, 857 }, 858 #endif /* chips */ 859 860 #if defined(BCM_56860_A0) 861 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATA_BCM56860_A0fmt */ 862 /* format FLEX_CTR_FT_READ_DATAfmt */ 863 /* nFields */ 4, 864 /* *fields */ soc_FLEX_CTR_FT_READ_DATA_BCM56860_A0fmt_fields, 865 /* bits */ 69, 866 /* flags */ 0, 867 }, 868 #endif /* chips */ 869 870 #if defined(BCM_56870_A0) 871 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATA_BCM56870_A0fmt */ 872 /* format FLEX_CTR_FT_READ_DATAfmt */ 873 /* nFields */ 4, 874 /* *fields */ soc_FLEX_CTR_FT_READ_DATA_BCM56870_A0fmt_fields, 875 /* bits */ 66, 876 /* flags */ 0, 877 }, 878 #endif /* chips */ 879 880 #if defined(BCM_56960_A0) 881 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATA_BCM56960_A0fmt */ 882 /* format FLEX_CTR_FT_READ_DATAfmt */ 883 /* nFields */ 4, 884 /* *fields */ soc_FLEX_CTR_FT_READ_DATA_BCM56960_A0fmt_fields, 885 /* bits */ 68, 886 /* flags */ 0, 887 }, 888 #endif /* chips */ 889 890 #if defined(BCM_56965_A0) 891 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATA_BCM56965_A0fmt */ 892 /* format FLEX_CTR_FT_READ_DATAfmt */ 893 /* nFields */ 4, 894 /* *fields */ soc_FLEX_CTR_FT_READ_DATA_BCM56960_A0fmt_fields, 895 /* bits */ 68, 896 /* flags */ 0, 897 }, 898 #endif /* chips */ 899 900 #if defined(BCM_56970_A0) 901 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATA_BCM56970_A0fmt */ 902 /* format FLEX_CTR_FT_READ_DATAfmt */ 903 /* nFields */ 4, 904 /* *fields */ soc_FLEX_CTR_FT_READ_DATA_BCM56960_A0fmt_fields, 905 /* bits */ 68, 906 /* flags */ 0, 907 }, 908 #endif /* chips */ 909 910 #if defined(BCM_56980_A0) 911 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATA_BCM56980_A0fmt */ 912 /* format FLEX_CTR_FT_READ_DATAfmt */ 913 /* nFields */ 4, 914 /* *fields */ soc_FLEX_CTR_FT_READ_DATA_BCM56960_A0fmt_fields, 915 /* bits */ 68, 916 /* flags */ 0, 917 }, 918 #endif /* chips */ 919 920 #if defined(BCM_56980_B0) 921 { /* SOC_FORMAT_INT_FLEX_CTR_FT_READ_DATA_BCM56980_B0fmt */ 922 /* format FLEX_CTR_FT_READ_DATAfmt */ 923 /* nFields */ 4, 924 /* *fields */ soc_FLEX_CTR_FT_READ_DATA_BCM56960_A0fmt_fields, 925 /* bits */ 68, 926 /* flags */ 0, 927 }, 928 #endif /* chips */ 929 930 #if defined(BCM_56440_A0) 931 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUSfmt */ 932 /* format FLEX_CTR_IN_BUSfmt */ 933 /* nFields */ 18, 934 /* *fields */ soc_FLEX_CTR_IN_BUSfmt_fields, 935 /* bits */ 217, 936 /* flags */ 0, 937 }, 938 #endif /* chips */ 939 940 #if defined(BCM_56260_A0) 941 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUS_BCM56260_A0fmt */ 942 /* format FLEX_CTR_IN_BUSfmt */ 943 /* nFields */ 19, 944 /* *fields */ soc_FLEX_CTR_IN_BUS_BCM56260_A0fmt_fields, 945 /* bits */ 221, 946 /* flags */ 0, 947 }, 948 #endif /* chips */ 949 950 #if defined(BCM_56260_B0) 951 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUS_BCM56260_B0fmt */ 952 /* format FLEX_CTR_IN_BUSfmt */ 953 /* nFields */ 19, 954 /* *fields */ soc_FLEX_CTR_IN_BUS_BCM56260_A0fmt_fields, 955 /* bits */ 221, 956 /* flags */ 0, 957 }, 958 #endif /* chips */ 959 960 #if defined(BCM_56270_A0) 961 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUS_BCM56270_A0fmt */ 962 /* format FLEX_CTR_IN_BUSfmt */ 963 /* nFields */ 19, 964 /* *fields */ soc_FLEX_CTR_IN_BUS_BCM56260_A0fmt_fields, 965 /* bits */ 221, 966 /* flags */ 0, 967 }, 968 #endif /* chips */ 969 970 #if defined(BCM_56340_A0) 971 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUS_BCM56340_A0fmt */ 972 /* format FLEX_CTR_IN_BUSfmt */ 973 /* nFields */ 18, 974 /* *fields */ soc_FLEX_CTR_IN_BUS_BCM56340_A0fmt_fields, 975 /* bits */ 205, 976 /* flags */ 0, 977 }, 978 #endif /* chips */ 979 980 #if defined(BCM_56370_A0) 981 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUS_BCM56370_A0fmt */ 982 /* format FLEX_CTR_IN_BUSfmt */ 983 /* nFields */ 20, 984 /* *fields */ soc_FLEX_CTR_IN_BUS_BCM56370_A0fmt_fields, 985 /* bits */ 234, 986 /* flags */ 0, 987 }, 988 #endif /* chips */ 989 990 #if defined(BCM_56440_B0) 991 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUS_BCM56440_B0fmt */ 992 /* format FLEX_CTR_IN_BUSfmt */ 993 /* nFields */ 18, 994 /* *fields */ soc_FLEX_CTR_IN_BUSfmt_fields, 995 /* bits */ 217, 996 /* flags */ 0, 997 }, 998 #endif /* chips */ 999 1000 #if defined(BCM_56450_A0) 1001 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUS_BCM56450_A0fmt */ 1002 /* format FLEX_CTR_IN_BUSfmt */ 1003 /* nFields */ 19, 1004 /* *fields */ soc_FLEX_CTR_IN_BUS_BCM56450_A0fmt_fields, 1005 /* bits */ 225, 1006 /* flags */ 0, 1007 }, 1008 #endif /* chips */ 1009 1010 #if defined(BCM_56450_B0) 1011 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUS_BCM56450_B0fmt */ 1012 /* format FLEX_CTR_IN_BUSfmt */ 1013 /* nFields */ 19, 1014 /* *fields */ soc_FLEX_CTR_IN_BUS_BCM56450_A0fmt_fields, 1015 /* bits */ 225, 1016 /* flags */ 0, 1017 }, 1018 #endif /* chips */ 1019 1020 #if defined(BCM_56450_B1) 1021 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUS_BCM56450_B1fmt */ 1022 /* format FLEX_CTR_IN_BUSfmt */ 1023 /* nFields */ 19, 1024 /* *fields */ soc_FLEX_CTR_IN_BUS_BCM56450_A0fmt_fields, 1025 /* bits */ 225, 1026 /* flags */ 0, 1027 }, 1028 #endif /* chips */ 1029 1030 #if defined(BCM_56560_A0) 1031 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUS_BCM56560_A0fmt */ 1032 /* format FLEX_CTR_IN_BUSfmt */ 1033 /* nFields */ 23, 1034 /* *fields */ soc_FLEX_CTR_IN_BUS_BCM56560_A0fmt_fields, 1035 /* bits */ 283, 1036 /* flags */ 0, 1037 }, 1038 #endif /* chips */ 1039 1040 #if defined(BCM_56560_B0) 1041 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUS_BCM56560_B0fmt */ 1042 /* format FLEX_CTR_IN_BUSfmt */ 1043 /* nFields */ 23, 1044 /* *fields */ soc_FLEX_CTR_IN_BUS_BCM56560_A0fmt_fields, 1045 /* bits */ 283, 1046 /* flags */ 0, 1047 }, 1048 #endif /* chips */ 1049 1050 #if defined(BCM_56640_A0) 1051 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUS_BCM56640_A0fmt */ 1052 /* format FLEX_CTR_IN_BUSfmt */ 1053 /* nFields */ 18, 1054 /* *fields */ soc_FLEX_CTR_IN_BUS_BCM56640_A0fmt_fields, 1055 /* bits */ 217, 1056 /* flags */ 0, 1057 }, 1058 #endif /* chips */ 1059 1060 #if defined(BCM_56670_A0) 1061 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUS_BCM56670_A0fmt */ 1062 /* format FLEX_CTR_IN_BUSfmt */ 1063 /* nFields */ 23, 1064 /* *fields */ soc_FLEX_CTR_IN_BUS_BCM56560_A0fmt_fields, 1065 /* bits */ 283, 1066 /* flags */ 0, 1067 }, 1068 #endif /* chips */ 1069 1070 #if defined(BCM_56670_B0) 1071 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUS_BCM56670_B0fmt */ 1072 /* format FLEX_CTR_IN_BUSfmt */ 1073 /* nFields */ 23, 1074 /* *fields */ soc_FLEX_CTR_IN_BUS_BCM56560_A0fmt_fields, 1075 /* bits */ 283, 1076 /* flags */ 0, 1077 }, 1078 #endif /* chips */ 1079 1080 #if defined(BCM_56770_A0) 1081 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUS_BCM56770_A0fmt */ 1082 /* format FLEX_CTR_IN_BUSfmt */ 1083 /* nFields */ 19, 1084 /* *fields */ soc_FLEX_CTR_IN_BUS_BCM56770_A0fmt_fields, 1085 /* bits */ 232, 1086 /* flags */ 0, 1087 }, 1088 #endif /* chips */ 1089 1090 #if defined(BCM_56850_A0) 1091 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUS_BCM56850_A0fmt */ 1092 /* format FLEX_CTR_IN_BUSfmt */ 1093 /* nFields */ 18, 1094 /* *fields */ soc_FLEX_CTR_IN_BUS_BCM56850_A0fmt_fields, 1095 /* bits */ 219, 1096 /* flags */ 0, 1097 }, 1098 #endif /* chips */ 1099 1100 #if defined(BCM_56860_A0) 1101 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUS_BCM56860_A0fmt */ 1102 /* format FLEX_CTR_IN_BUSfmt */ 1103 /* nFields */ 23, 1104 /* *fields */ soc_FLEX_CTR_IN_BUS_BCM56860_A0fmt_fields, 1105 /* bits */ 235, 1106 /* flags */ 0, 1107 }, 1108 #endif /* chips */ 1109 1110 #if defined(BCM_56870_A0) 1111 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUS_BCM56870_A0fmt */ 1112 /* format FLEX_CTR_IN_BUSfmt */ 1113 /* nFields */ 18, 1114 /* *fields */ soc_FLEX_CTR_IN_BUS_BCM56870_A0fmt_fields, 1115 /* bits */ 226, 1116 /* flags */ 0, 1117 }, 1118 #endif /* chips */ 1119 1120 #if defined(BCM_56960_A0) 1121 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUS_BCM56960_A0fmt */ 1122 /* format FLEX_CTR_IN_BUSfmt */ 1123 /* nFields */ 18, 1124 /* *fields */ soc_FLEX_CTR_IN_BUS_BCM56960_A0fmt_fields, 1125 /* bits */ 222, 1126 /* flags */ 0, 1127 }, 1128 #endif /* chips */ 1129 1130 #if defined(BCM_56965_A0) 1131 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUS_BCM56965_A0fmt */ 1132 /* format FLEX_CTR_IN_BUSfmt */ 1133 /* nFields */ 18, 1134 /* *fields */ soc_FLEX_CTR_IN_BUS_BCM56960_A0fmt_fields, 1135 /* bits */ 222, 1136 /* flags */ 0, 1137 }, 1138 #endif /* chips */ 1139 1140 #if defined(BCM_56970_A0) 1141 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUS_BCM56970_A0fmt */ 1142 /* format FLEX_CTR_IN_BUSfmt */ 1143 /* nFields */ 18, 1144 /* *fields */ soc_FLEX_CTR_IN_BUS_BCM56960_A0fmt_fields, 1145 /* bits */ 222, 1146 /* flags */ 0, 1147 }, 1148 #endif /* chips */ 1149 1150 #if defined(BCM_56980_A0) 1151 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUS_BCM56980_A0fmt */ 1152 /* format FLEX_CTR_IN_BUSfmt */ 1153 /* nFields */ 17, 1154 /* *fields */ soc_FLEX_CTR_IN_BUS_BCM56980_A0fmt_fields, 1155 /* bits */ 186, 1156 /* flags */ 0, 1157 }, 1158 #endif /* chips */ 1159 1160 #if defined(BCM_56980_B0) 1161 { /* SOC_FORMAT_INT_FLEX_CTR_IN_BUS_BCM56980_B0fmt */ 1162 /* format FLEX_CTR_IN_BUSfmt */ 1163 /* nFields */ 17, 1164 /* *fields */ soc_FLEX_CTR_IN_BUS_BCM56980_A0fmt_fields, 1165 /* bits */ 186, 1166 /* flags */ 0, 1167 }, 1168 #endif /* chips */ 1169 1170 #if defined(BCM_56440_A0) 1171 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOLfmt */ 1172 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1173 /* nFields */ 2, 1174 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOLfmt_fields, 1175 /* bits */ 4, 1176 /* flags */ 0, 1177 }, 1178 #endif /* chips */ 1179 1180 #if defined(BCM_56260_A0) 1181 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOL_BCM56260_A0fmt */ 1182 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1183 /* nFields */ 2, 1184 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOL_BCM56960_A0fmt_fields, 1185 /* bits */ 4, 1186 /* flags */ 0, 1187 }, 1188 #endif /* chips */ 1189 1190 #if defined(BCM_56260_B0) 1191 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOL_BCM56260_B0fmt */ 1192 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1193 /* nFields */ 2, 1194 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOL_BCM56960_A0fmt_fields, 1195 /* bits */ 4, 1196 /* flags */ 0, 1197 }, 1198 #endif /* chips */ 1199 1200 #if defined(BCM_56270_A0) 1201 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOL_BCM56270_A0fmt */ 1202 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1203 /* nFields */ 2, 1204 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOL_BCM56960_A0fmt_fields, 1205 /* bits */ 4, 1206 /* flags */ 0, 1207 }, 1208 #endif /* chips */ 1209 1210 #if defined(BCM_56340_A0) 1211 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOL_BCM56340_A0fmt */ 1212 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1213 /* nFields */ 2, 1214 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOL_BCM56640_A0fmt_fields, 1215 /* bits */ 4, 1216 /* flags */ 0, 1217 }, 1218 #endif /* chips */ 1219 1220 #if defined(BCM_56370_A0) 1221 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOL_BCM56370_A0fmt */ 1222 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1223 /* nFields */ 2, 1224 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOL_BCM56960_A0fmt_fields, 1225 /* bits */ 4, 1226 /* flags */ 0, 1227 }, 1228 #endif /* chips */ 1229 1230 #if defined(BCM_56440_B0) 1231 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOL_BCM56440_B0fmt */ 1232 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1233 /* nFields */ 2, 1234 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOLfmt_fields, 1235 /* bits */ 4, 1236 /* flags */ 0, 1237 }, 1238 #endif /* chips */ 1239 1240 #if defined(BCM_56450_A0) 1241 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOL_BCM56450_A0fmt */ 1242 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1243 /* nFields */ 2, 1244 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOL_BCM56640_A0fmt_fields, 1245 /* bits */ 4, 1246 /* flags */ 0, 1247 }, 1248 #endif /* chips */ 1249 1250 #if defined(BCM_56450_B0) 1251 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOL_BCM56450_B0fmt */ 1252 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1253 /* nFields */ 2, 1254 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOL_BCM56640_A0fmt_fields, 1255 /* bits */ 4, 1256 /* flags */ 0, 1257 }, 1258 #endif /* chips */ 1259 1260 #if defined(BCM_56450_B1) 1261 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOL_BCM56450_B1fmt */ 1262 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1263 /* nFields */ 2, 1264 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOL_BCM56640_A0fmt_fields, 1265 /* bits */ 4, 1266 /* flags */ 0, 1267 }, 1268 #endif /* chips */ 1269 1270 #if defined(BCM_56560_A0) 1271 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOL_BCM56560_A0fmt */ 1272 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1273 /* nFields */ 2, 1274 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOL_BCM56960_A0fmt_fields, 1275 /* bits */ 4, 1276 /* flags */ 0, 1277 }, 1278 #endif /* chips */ 1279 1280 #if defined(BCM_56560_B0) 1281 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOL_BCM56560_B0fmt */ 1282 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1283 /* nFields */ 2, 1284 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOL_BCM56960_A0fmt_fields, 1285 /* bits */ 4, 1286 /* flags */ 0, 1287 }, 1288 #endif /* chips */ 1289 1290 #if defined(BCM_56640_A0) 1291 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOL_BCM56640_A0fmt */ 1292 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1293 /* nFields */ 2, 1294 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOL_BCM56640_A0fmt_fields, 1295 /* bits */ 4, 1296 /* flags */ 0, 1297 }, 1298 #endif /* chips */ 1299 1300 #if defined(BCM_56670_A0) 1301 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOL_BCM56670_A0fmt */ 1302 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1303 /* nFields */ 2, 1304 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOL_BCM56960_A0fmt_fields, 1305 /* bits */ 4, 1306 /* flags */ 0, 1307 }, 1308 #endif /* chips */ 1309 1310 #if defined(BCM_56670_B0) 1311 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOL_BCM56670_B0fmt */ 1312 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1313 /* nFields */ 2, 1314 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOL_BCM56960_A0fmt_fields, 1315 /* bits */ 4, 1316 /* flags */ 0, 1317 }, 1318 #endif /* chips */ 1319 1320 #if defined(BCM_56770_A0) 1321 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOL_BCM56770_A0fmt */ 1322 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1323 /* nFields */ 2, 1324 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOL_BCM56960_A0fmt_fields, 1325 /* bits */ 4, 1326 /* flags */ 0, 1327 }, 1328 #endif /* chips */ 1329 1330 #if defined(BCM_56850_A0) 1331 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOL_BCM56850_A0fmt */ 1332 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1333 /* nFields */ 2, 1334 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOL_BCM56640_A0fmt_fields, 1335 /* bits */ 4, 1336 /* flags */ 0, 1337 }, 1338 #endif /* chips */ 1339 1340 #if defined(BCM_56860_A0) 1341 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOL_BCM56860_A0fmt */ 1342 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1343 /* nFields */ 2, 1344 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOL_BCM56640_A0fmt_fields, 1345 /* bits */ 4, 1346 /* flags */ 0, 1347 }, 1348 #endif /* chips */ 1349 1350 #if defined(BCM_56870_A0) 1351 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOL_BCM56870_A0fmt */ 1352 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1353 /* nFields */ 2, 1354 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOL_BCM56960_A0fmt_fields, 1355 /* bits */ 4, 1356 /* flags */ 0, 1357 }, 1358 #endif /* chips */ 1359 1360 #if defined(BCM_56960_A0) 1361 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOL_BCM56960_A0fmt */ 1362 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1363 /* nFields */ 2, 1364 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOL_BCM56960_A0fmt_fields, 1365 /* bits */ 4, 1366 /* flags */ 0, 1367 }, 1368 #endif /* chips */ 1369 1370 #if defined(BCM_56965_A0) 1371 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOL_BCM56965_A0fmt */ 1372 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1373 /* nFields */ 2, 1374 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOL_BCM56960_A0fmt_fields, 1375 /* bits */ 4, 1376 /* flags */ 0, 1377 }, 1378 #endif /* chips */ 1379 1380 #if defined(BCM_56970_A0) 1381 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOL_BCM56970_A0fmt */ 1382 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1383 /* nFields */ 2, 1384 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOL_BCM56960_A0fmt_fields, 1385 /* bits */ 4, 1386 /* flags */ 0, 1387 }, 1388 #endif /* chips */ 1389 1390 #if defined(BCM_56980_A0) 1391 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOL_BCM56980_A0fmt */ 1392 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1393 /* nFields */ 2, 1394 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOL_BCM56960_A0fmt_fields, 1395 /* bits */ 4, 1396 /* flags */ 0, 1397 }, 1398 #endif /* chips */ 1399 1400 #if defined(BCM_56980_B0) 1401 { /* SOC_FORMAT_INT_FLEX_CTR_OPCODE_BUS_POOL_BCM56980_B0fmt */ 1402 /* format FLEX_CTR_OPCODE_BUS_POOLfmt */ 1403 /* nFields */ 2, 1404 /* *fields */ soc_FLEX_CTR_OPCODE_BUS_POOL_BCM56960_A0fmt_fields, 1405 /* bits */ 4, 1406 /* flags */ 0, 1407 }, 1408 #endif /* chips */ 1409 1410 #if defined(BCM_56440_A0) || defined(BCM_56440_B0) 1411 { /* SOC_FORMAT_INT_FLEX_CTR_OUTBUSfmt */ 1412 /* format FLEX_CTR_OUTBUSfmt */ 1413 /* nFields */ 9, 1414 /* *fields */ soc_FLEX_CTR_OUTBUSfmt_fields, 1415 /* bits */ 8, 1416 /* flags */ 0, 1417 }, 1418 #endif /* chips */ 1419 1420 #if defined(BCM_56260_A0) 1421 { /* SOC_FORMAT_INT_FLEX_CTR_OUTBUS_BCM56260_A0fmt */ 1422 /* format FLEX_CTR_OUTBUSfmt */ 1423 /* nFields */ 9, 1424 /* *fields */ soc_FLEX_CTR_OUTBUS_BCM56260_A0fmt_fields, 1425 /* bits */ 8, 1426 /* flags */ 0, 1427 }, 1428 #endif /* chips */ 1429 1430 #if defined(BCM_56260_B0) 1431 { /* SOC_FORMAT_INT_FLEX_CTR_OUTBUS_BCM56260_B0fmt */ 1432 /* format FLEX_CTR_OUTBUSfmt */ 1433 /* nFields */ 9, 1434 /* *fields */ soc_FLEX_CTR_OUTBUS_BCM56260_A0fmt_fields, 1435 /* bits */ 8, 1436 /* flags */ 0, 1437 }, 1438 #endif /* chips */ 1439 1440 #if defined(BCM_56270_A0) 1441 { /* SOC_FORMAT_INT_FLEX_CTR_OUTBUS_BCM56270_A0fmt */ 1442 /* format FLEX_CTR_OUTBUSfmt */ 1443 /* nFields */ 9, 1444 /* *fields */ soc_FLEX_CTR_OUTBUS_BCM56260_A0fmt_fields, 1445 /* bits */ 8, 1446 /* flags */ 0, 1447 }, 1448 #endif /* chips */ 1449 1450 #if defined(BCM_56450_A0) 1451 { /* SOC_FORMAT_INT_FLEX_CTR_OUTBUS_BCM56450_A0fmt */ 1452 /* format FLEX_CTR_OUTBUSfmt */ 1453 /* nFields */ 9, 1454 /* *fields */ soc_FLEX_CTR_OUTBUS_BCM56450_A0fmt_fields, 1455 /* bits */ 8, 1456 /* flags */ 0, 1457 }, 1458 #endif /* chips */ 1459 1460 #if defined(BCM_56450_B0) 1461 { /* SOC_FORMAT_INT_FLEX_CTR_OUTBUS_BCM56450_B0fmt */ 1462 /* format FLEX_CTR_OUTBUSfmt */ 1463 /* nFields */ 9, 1464 /* *fields */ soc_FLEX_CTR_OUTBUS_BCM56450_A0fmt_fields, 1465 /* bits */ 8, 1466 /* flags */ 0, 1467 }, 1468 #endif /* chips */ 1469 1470 #if defined(BCM_56450_B1) 1471 { /* SOC_FORMAT_INT_FLEX_CTR_OUTBUS_BCM56450_B1fmt */ 1472 /* format FLEX_CTR_OUTBUSfmt */ 1473 /* nFields */ 9, 1474 /* *fields */ soc_FLEX_CTR_OUTBUS_BCM56450_A0fmt_fields, 1475 /* bits */ 8, 1476 /* flags */ 0, 1477 }, 1478 #endif /* chips */ 1479 1480 #if defined(BCM_56440_A0) || defined(BCM_56440_B0) 1481 { /* SOC_FORMAT_INT_FLEX_CTR_SIDE_OUTBUSfmt */ 1482 /* format FLEX_CTR_SIDE_OUTBUSfmt */ 1483 /* nFields */ 4, 1484 /* *fields */ soc_FLEX_CTR_SIDE_OUTBUSfmt_fields, 1485 /* bits */ 272, 1486 /* flags */ 0, 1487 }, 1488 #endif /* chips */ 1489 1490 #if defined(BCM_56260_A0) 1491 { /* SOC_FORMAT_INT_FLEX_CTR_SIDE_OUTBUS_BCM56260_A0fmt */ 1492 /* format FLEX_CTR_SIDE_OUTBUSfmt */ 1493 /* nFields */ 4, 1494 /* *fields */ soc_FLEX_CTR_SIDE_OUTBUS_BCM56960_A0fmt_fields, 1495 /* bits */ 272, 1496 /* flags */ 0, 1497 }, 1498 #endif /* chips */ 1499 1500 #if defined(BCM_56260_B0) 1501 { /* SOC_FORMAT_INT_FLEX_CTR_SIDE_OUTBUS_BCM56260_B0fmt */ 1502 /* format FLEX_CTR_SIDE_OUTBUSfmt */ 1503 /* nFields */ 4, 1504 /* *fields */ soc_FLEX_CTR_SIDE_OUTBUS_BCM56960_A0fmt_fields, 1505 /* bits */ 272, 1506 /* flags */ 0, 1507 }, 1508 #endif /* chips */ 1509 1510 #if defined(BCM_56270_A0) 1511 { /* SOC_FORMAT_INT_FLEX_CTR_SIDE_OUTBUS_BCM56270_A0fmt */ 1512 /* format FLEX_CTR_SIDE_OUTBUSfmt */ 1513 /* nFields */ 4, 1514 /* *fields */ soc_FLEX_CTR_SIDE_OUTBUS_BCM56960_A0fmt_fields, 1515 /* bits */ 272, 1516 /* flags */ 0, 1517 }, 1518 #endif /* chips */ 1519 1520 #if defined(BCM_56340_A0) 1521 { /* SOC_FORMAT_INT_FLEX_CTR_SIDE_OUTBUS_BCM56340_A0fmt */ 1522 /* format FLEX_CTR_SIDE_OUTBUSfmt */ 1523 /* nFields */ 4, 1524 /* *fields */ soc_FLEX_CTR_SIDE_OUTBUS_BCM56640_A0fmt_fields, 1525 /* bits */ 272, 1526 /* flags */ 0, 1527 }, 1528 #endif /* chips */ 1529 1530 #if defined(BCM_56370_A0) 1531 { /* SOC_FORMAT_INT_FLEX_CTR_SIDE_OUTBUS_BCM56370_A0fmt */ 1532 /* format FLEX_CTR_SIDE_OUTBUSfmt */ 1533 /* nFields */ 4, 1534 /* *fields */ soc_FLEX_CTR_SIDE_OUTBUS_BCM56870_A0fmt_fields, 1535 /* bits */ 264, 1536 /* flags */ 0, 1537 }, 1538 #endif /* chips */ 1539 1540 #if defined(BCM_56450_A0) 1541 { /* SOC_FORMAT_INT_FLEX_CTR_SIDE_OUTBUS_BCM56450_A0fmt */ 1542 /* format FLEX_CTR_SIDE_OUTBUSfmt */ 1543 /* nFields */ 4, 1544 /* *fields */ soc_FLEX_CTR_SIDE_OUTBUS_BCM56640_A0fmt_fields, 1545 /* bits */ 272, 1546 /* flags */ 0, 1547 }, 1548 #endif /* chips */ 1549 1550 #if defined(BCM_56450_B0) 1551 { /* SOC_FORMAT_INT_FLEX_CTR_SIDE_OUTBUS_BCM56450_B0fmt */ 1552 /* format FLEX_CTR_SIDE_OUTBUSfmt */ 1553 /* nFields */ 4, 1554 /* *fields */ soc_FLEX_CTR_SIDE_OUTBUS_BCM56640_A0fmt_fields, 1555 /* bits */ 272, 1556 /* flags */ 0, 1557 }, 1558 #endif /* chips */ 1559 1560 #if defined(BCM_56450_B1) 1561 { /* SOC_FORMAT_INT_FLEX_CTR_SIDE_OUTBUS_BCM56450_B1fmt */ 1562 /* format FLEX_CTR_SIDE_OUTBUSfmt */ 1563 /* nFields */ 4, 1564 /* *fields */ soc_FLEX_CTR_SIDE_OUTBUS_BCM56640_A0fmt_fields, 1565 /* bits */ 272, 1566 /* flags */ 0, 1567 }, 1568 #endif /* chips */ 1569 1570 #if defined(BCM_56560_A0) 1571 { /* SOC_FORMAT_INT_FLEX_CTR_SIDE_OUTBUS_BCM56560_A0fmt */ 1572 /* format FLEX_CTR_SIDE_OUTBUSfmt */ 1573 /* nFields */ 4, 1574 /* *fields */ soc_FLEX_CTR_SIDE_OUTBUS_BCM56560_A0fmt_fields, 1575 /* bits */ 324, 1576 /* flags */ 0, 1577 }, 1578 #endif /* chips */ 1579 1580 #if defined(BCM_56560_B0) 1581 { /* SOC_FORMAT_INT_FLEX_CTR_SIDE_OUTBUS_BCM56560_B0fmt */ 1582 /* format FLEX_CTR_SIDE_OUTBUSfmt */ 1583 /* nFields */ 4, 1584 /* *fields */ soc_FLEX_CTR_SIDE_OUTBUS_BCM56560_A0fmt_fields, 1585 /* bits */ 324, 1586 /* flags */ 0, 1587 }, 1588 #endif /* chips */ 1589 1590 #if defined(BCM_56640_A0) 1591 { /* SOC_FORMAT_INT_FLEX_CTR_SIDE_OUTBUS_BCM56640_A0fmt */ 1592 /* format FLEX_CTR_SIDE_OUTBUSfmt */ 1593 /* nFields */ 4, 1594 /* *fields */ soc_FLEX_CTR_SIDE_OUTBUS_BCM56640_A0fmt_fields, 1595 /* bits */ 272, 1596 /* flags */ 0, 1597 }, 1598 #endif /* chips */ 1599 1600 #if defined(BCM_56670_A0) 1601 { /* SOC_FORMAT_INT_FLEX_CTR_SIDE_OUTBUS_BCM56670_A0fmt */ 1602 /* format FLEX_CTR_SIDE_OUTBUSfmt */ 1603 /* nFields */ 4, 1604 /* *fields */ soc_FLEX_CTR_SIDE_OUTBUS_BCM56560_A0fmt_fields, 1605 /* bits */ 324, 1606 /* flags */ 0, 1607 }, 1608 #endif /* chips */ 1609 1610 #if defined(BCM_56670_B0) 1611 { /* SOC_FORMAT_INT_FLEX_CTR_SIDE_OUTBUS_BCM56670_B0fmt */ 1612 /* format FLEX_CTR_SIDE_OUTBUSfmt */ 1613 /* nFields */ 4, 1614 /* *fields */ soc_FLEX_CTR_SIDE_OUTBUS_BCM56560_A0fmt_fields, 1615 /* bits */ 324, 1616 /* flags */ 0, 1617 }, 1618 #endif /* chips */ 1619 1620 #if defined(BCM_56770_A0) 1621 { /* SOC_FORMAT_INT_FLEX_CTR_SIDE_OUTBUS_BCM56770_A0fmt */ 1622 /* format FLEX_CTR_SIDE_OUTBUSfmt */ 1623 /* nFields */ 4, 1624 /* *fields */ soc_FLEX_CTR_SIDE_OUTBUS_BCM56870_A0fmt_fields, 1625 /* bits */ 264, 1626 /* flags */ 0, 1627 }, 1628 #endif /* chips */ 1629 1630 #if defined(BCM_56850_A0) 1631 { /* SOC_FORMAT_INT_FLEX_CTR_SIDE_OUTBUS_BCM56850_A0fmt */ 1632 /* format FLEX_CTR_SIDE_OUTBUSfmt */ 1633 /* nFields */ 4, 1634 /* *fields */ soc_FLEX_CTR_SIDE_OUTBUS_BCM56640_A0fmt_fields, 1635 /* bits */ 272, 1636 /* flags */ 0, 1637 }, 1638 #endif /* chips */ 1639 1640 #if defined(BCM_56860_A0) 1641 { /* SOC_FORMAT_INT_FLEX_CTR_SIDE_OUTBUS_BCM56860_A0fmt */ 1642 /* format FLEX_CTR_SIDE_OUTBUSfmt */ 1643 /* nFields */ 4, 1644 /* *fields */ soc_FLEX_CTR_SIDE_OUTBUS_BCM56860_A0fmt_fields, 1645 /* bits */ 276, 1646 /* flags */ 0, 1647 }, 1648 #endif /* chips */ 1649 1650 #if defined(BCM_56870_A0) 1651 { /* SOC_FORMAT_INT_FLEX_CTR_SIDE_OUTBUS_BCM56870_A0fmt */ 1652 /* format FLEX_CTR_SIDE_OUTBUSfmt */ 1653 /* nFields */ 4, 1654 /* *fields */ soc_FLEX_CTR_SIDE_OUTBUS_BCM56870_A0fmt_fields, 1655 /* bits */ 264, 1656 /* flags */ 0, 1657 }, 1658 #endif /* chips */ 1659 1660 #if defined(BCM_56960_A0) 1661 { /* SOC_FORMAT_INT_FLEX_CTR_SIDE_OUTBUS_BCM56960_A0fmt */ 1662 /* format FLEX_CTR_SIDE_OUTBUSfmt */ 1663 /* nFields */ 4, 1664 /* *fields */ soc_FLEX_CTR_SIDE_OUTBUS_BCM56960_A0fmt_fields, 1665 /* bits */ 272, 1666 /* flags */ 0, 1667 }, 1668 #endif /* chips */ 1669 1670 #if defined(BCM_56965_A0) 1671 { /* SOC_FORMAT_INT_FLEX_CTR_SIDE_OUTBUS_BCM56965_A0fmt */ 1672 /* format FLEX_CTR_SIDE_OUTBUSfmt */ 1673 /* nFields */ 4, 1674 /* *fields */ soc_FLEX_CTR_SIDE_OUTBUS_BCM56960_A0fmt_fields, 1675 /* bits */ 272, 1676 /* flags */ 0, 1677 }, 1678 #endif /* chips */ 1679 1680 #if defined(BCM_56970_A0) 1681 { /* SOC_FORMAT_INT_FLEX_CTR_SIDE_OUTBUS_BCM56970_A0fmt */ 1682 /* format FLEX_CTR_SIDE_OUTBUSfmt */ 1683 /* nFields */ 4, 1684 /* *fields */ soc_FLEX_CTR_SIDE_OUTBUS_BCM56960_A0fmt_fields, 1685 /* bits */ 272, 1686 /* flags */ 0, 1687 }, 1688 #endif /* chips */ 1689 1690 #if defined(BCM_56980_A0) 1691 { /* SOC_FORMAT_INT_FLEX_CTR_SIDE_OUTBUS_BCM56980_A0fmt */ 1692 /* format FLEX_CTR_SIDE_OUTBUSfmt */ 1693 /* nFields */ 4, 1694 /* *fields */ soc_FLEX_CTR_SIDE_OUTBUS_BCM56960_A0fmt_fields, 1695 /* bits */ 272, 1696 /* flags */ 0, 1697 }, 1698 #endif /* chips */ 1699 1700 #if defined(BCM_56980_B0) 1701 { /* SOC_FORMAT_INT_FLEX_CTR_SIDE_OUTBUS_BCM56980_B0fmt */ 1702 /* format FLEX_CTR_SIDE_OUTBUSfmt */ 1703 /* nFields */ 4, 1704 /* *fields */ soc_FLEX_CTR_SIDE_OUTBUS_BCM56960_A0fmt_fields, 1705 /* bits */ 272, 1706 /* flags */ 0, 1707 }, 1708 #endif /* chips */ 1709 1710 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 1711 defined(BCM_56870_A0) 1712 { /* SOC_FORMAT_INT_FLEX_EDITOR_COMPOSITES_BUSfmt */ 1713 /* format FLEX_EDITOR_COMPOSITES_BUSfmt */ 1714 /* nFields */ 5, 1715 /* *fields */ soc_FLEX_EDITOR_COMPOSITES_BUSfmt_fields, 1716 /* bits */ 2272, 1717 /* flags */ 0, 1718 }, 1719 #endif /* chips */ 1720 1721 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 1722 defined(BCM_56870_A0) 1723 { /* SOC_FORMAT_INT_FLEX_EDITOR_COMPUTED_FIELD_BUSfmt */ 1724 /* format FLEX_EDITOR_COMPUTED_FIELD_BUSfmt */ 1725 /* nFields */ 13, 1726 /* *fields */ soc_FLEX_EDITOR_COMPUTED_FIELD_BUSfmt_fields, 1727 /* bits */ 112, 1728 /* flags */ 0, 1729 }, 1730 #endif /* chips */ 1731 1732 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 1733 defined(BCM_56870_A0) 1734 { /* SOC_FORMAT_INT_FLEX_EDITOR_DELETE_COMMAND_BASEfmt */ 1735 /* format FLEX_EDITOR_DELETE_COMMAND_BASEfmt */ 1736 /* nFields */ 6, 1737 /* *fields */ soc_FLEX_EDITOR_DELETE_COMMAND_BASEfmt_fields, 1738 /* bits */ 25, 1739 /* flags */ 0, 1740 }, 1741 #endif /* chips */ 1742 1743 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 1744 defined(BCM_56870_A0) 1745 { /* SOC_FORMAT_INT_FLEX_EDITOR_EDIT_ACTION_IN_BUSfmt */ 1746 /* format FLEX_EDITOR_EDIT_ACTION_IN_BUSfmt */ 1747 /* nFields */ 45, 1748 /* *fields */ soc_FLEX_EDITOR_EDIT_ACTION_IN_BUSfmt_fields, 1749 /* bits */ 2392, 1750 /* flags */ 0, 1751 }, 1752 #endif /* chips */ 1753 1754 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 1755 defined(BCM_56870_A0) 1756 { /* SOC_FORMAT_INT_FLEX_EDITOR_EDIT_ACTION_OUT_BUSfmt */ 1757 /* format FLEX_EDITOR_EDIT_ACTION_OUT_BUSfmt */ 1758 /* nFields */ 142, 1759 /* *fields */ soc_FLEX_EDITOR_EDIT_ACTION_OUT_BUSfmt_fields, 1760 /* bits */ 4262, 1761 /* flags */ 0, 1762 }, 1763 #endif /* chips */ 1764 1765 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 1766 defined(BCM_56870_A0) 1767 { /* SOC_FORMAT_INT_FLEX_EDITOR_EDIT_HDR_GEN_IN_BUSfmt */ 1768 /* format FLEX_EDITOR_EDIT_HDR_GEN_IN_BUSfmt */ 1769 /* nFields */ 79, 1770 /* *fields */ soc_FLEX_EDITOR_EDIT_HDR_GEN_IN_BUSfmt_fields, 1771 /* bits */ 3816, 1772 /* flags */ 0, 1773 }, 1774 #endif /* chips */ 1775 1776 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 1777 defined(BCM_56870_A0) 1778 { /* SOC_FORMAT_INT_FLEX_EDITOR_EDIT_HDR_GEN_OUT_BUSfmt */ 1779 /* format FLEX_EDITOR_EDIT_HDR_GEN_OUT_BUSfmt */ 1780 /* nFields */ 46, 1781 /* *fields */ soc_FLEX_EDITOR_EDIT_HDR_GEN_OUT_BUSfmt_fields, 1782 /* bits */ 4578, 1783 /* flags */ 0, 1784 }, 1785 #endif /* chips */ 1786 1787 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 1788 defined(BCM_56870_A0) 1789 { /* SOC_FORMAT_INT_FLEX_EDITOR_EDIT_ID_DEL_SET_BASEfmt */ 1790 /* format FLEX_EDITOR_EDIT_ID_DEL_SET_BASEfmt */ 1791 /* nFields */ 1, 1792 /* *fields */ soc_FLEX_EDITOR_EDIT_ID_DEL_SET_BASEfmt_fields, 1793 /* bits */ 10, 1794 /* flags */ 0, 1795 }, 1796 #endif /* chips */ 1797 1798 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 1799 defined(BCM_56870_A0) 1800 { /* SOC_FORMAT_INT_FLEX_EDITOR_EDIT_ID_DEL_TABLEfmt */ 1801 /* format FLEX_EDITOR_EDIT_ID_DEL_TABLEfmt */ 1802 /* nFields */ 17, 1803 /* *fields */ soc_FLEX_EDITOR_EDIT_ID_DEL_TABLEfmt_fields, 1804 /* bits */ 58, 1805 /* flags */ 0, 1806 }, 1807 #endif /* chips */ 1808 1809 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 1810 defined(BCM_56870_A0) 1811 { /* SOC_FORMAT_INT_FLEX_EDITOR_EDIT_ID_INS_1_TABLEfmt */ 1812 /* format FLEX_EDITOR_EDIT_ID_INS_1_TABLEfmt */ 1813 /* nFields */ 80, 1814 /* *fields */ soc_FLEX_EDITOR_EDIT_ID_INS_1_TABLEfmt_fields, 1815 /* bits */ 342, 1816 /* flags */ 0, 1817 }, 1818 #endif /* chips */ 1819 1820 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 1821 defined(BCM_56870_A0) 1822 { /* SOC_FORMAT_INT_FLEX_EDITOR_EDIT_ID_INS_2_TABLEfmt */ 1823 /* format FLEX_EDITOR_EDIT_ID_INS_2_TABLEfmt */ 1824 /* nFields */ 38, 1825 /* *fields */ soc_FLEX_EDITOR_EDIT_ID_INS_2_TABLEfmt_fields, 1826 /* bits */ 138, 1827 /* flags */ 0, 1828 }, 1829 #endif /* chips */ 1830 1831 #if defined(BCM_56870_A0) 1832 { /* SOC_FORMAT_INT_FLEX_EDITOR_EDIT_ID_INS_SET_BASEfmt */ 1833 /* format FLEX_EDITOR_EDIT_ID_INS_SET_BASEfmt */ 1834 /* nFields */ 1, 1835 /* *fields */ soc_FLEX_EDITOR_EDIT_ID_DEL_SET_BASEfmt_fields, 1836 /* bits */ 10, 1837 /* flags */ 0, 1838 }, 1839 #endif /* chips */ 1840 1841 #if defined(BCM_56370_A0) 1842 { /* SOC_FORMAT_INT_FLEX_EDITOR_EDIT_ID_INS_SET_BASE_BCM56370_A0fmt */ 1843 /* format FLEX_EDITOR_EDIT_ID_INS_SET_BASEfmt */ 1844 /* nFields */ 1, 1845 /* *fields */ soc_FLEX_EDITOR_EDIT_ID_DEL_SET_BASEfmt_fields, 1846 /* bits */ 10, 1847 /* flags */ 0, 1848 }, 1849 #endif /* chips */ 1850 1851 #if defined(BCM_56770_A0) 1852 { /* SOC_FORMAT_INT_FLEX_EDITOR_EDIT_ID_INS_SET_BASE_BCM56770_A0fmt */ 1853 /* format FLEX_EDITOR_EDIT_ID_INS_SET_BASEfmt */ 1854 /* nFields */ 1, 1855 /* *fields */ soc_FLEX_EDITOR_EDIT_ID_DEL_SET_BASEfmt_fields, 1856 /* bits */ 10, 1857 /* flags */ 0, 1858 }, 1859 #endif /* chips */ 1860 1861 #if defined(BCM_56870_A0) 1862 { /* SOC_FORMAT_INT_FLEX_EDITOR_EDIT_ID_RW_SET_BASEfmt */ 1863 /* format FLEX_EDITOR_EDIT_ID_RW_SET_BASEfmt */ 1864 /* nFields */ 1, 1865 /* *fields */ soc_FLEX_EDITOR_EDIT_ID_DEL_SET_BASEfmt_fields, 1866 /* bits */ 10, 1867 /* flags */ 0, 1868 }, 1869 #endif /* chips */ 1870 1871 #if defined(BCM_56370_A0) 1872 { /* SOC_FORMAT_INT_FLEX_EDITOR_EDIT_ID_RW_SET_BASE_BCM56370_A0fmt */ 1873 /* format FLEX_EDITOR_EDIT_ID_RW_SET_BASEfmt */ 1874 /* nFields */ 1, 1875 /* *fields */ soc_FLEX_EDITOR_EDIT_ID_DEL_SET_BASEfmt_fields, 1876 /* bits */ 10, 1877 /* flags */ 0, 1878 }, 1879 #endif /* chips */ 1880 1881 #if defined(BCM_56770_A0) 1882 { /* SOC_FORMAT_INT_FLEX_EDITOR_EDIT_ID_RW_SET_BASE_BCM56770_A0fmt */ 1883 /* format FLEX_EDITOR_EDIT_ID_RW_SET_BASEfmt */ 1884 /* nFields */ 1, 1885 /* *fields */ soc_FLEX_EDITOR_EDIT_ID_DEL_SET_BASEfmt_fields, 1886 /* bits */ 10, 1887 /* flags */ 0, 1888 }, 1889 #endif /* chips */ 1890 1891 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 1892 defined(BCM_56870_A0) 1893 { /* SOC_FORMAT_INT_FLEX_EDITOR_EDIT_ID_RW_TABLEfmt */ 1894 /* format FLEX_EDITOR_EDIT_ID_RW_TABLEfmt */ 1895 /* nFields */ 16, 1896 /* *fields */ soc_FLEX_EDITOR_EDIT_ID_RW_TABLEfmt_fields, 1897 /* bits */ 57, 1898 /* flags */ 0, 1899 }, 1900 #endif /* chips */ 1901 1902 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 1903 defined(BCM_56870_A0) 1904 { /* SOC_FORMAT_INT_FLEX_EDITOR_EDIT_PKT_MOD_IN_BUSfmt */ 1905 /* format FLEX_EDITOR_EDIT_PKT_MOD_IN_BUSfmt */ 1906 /* nFields */ 51, 1907 /* *fields */ soc_FLEX_EDITOR_EDIT_PKT_MOD_IN_BUSfmt_fields, 1908 /* bits */ 7548, 1909 /* flags */ 0, 1910 }, 1911 #endif /* chips */ 1912 1913 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 1914 defined(BCM_56870_A0) 1915 { /* SOC_FORMAT_INT_FLEX_EDITOR_EDIT_PKT_MOD_OUT_BUSfmt */ 1916 /* format FLEX_EDITOR_EDIT_PKT_MOD_OUT_BUSfmt */ 1917 /* nFields */ 2, 1918 /* *fields */ soc_FLEX_EDITOR_EDIT_PKT_MOD_OUT_BUSfmt_fields, 1919 /* bits */ 2441, 1920 /* flags */ 0, 1921 }, 1922 #endif /* chips */ 1923 1924 #if defined(BCM_56870_A0) 1925 { /* SOC_FORMAT_INT_FLEX_EDITOR_EH_TYPE_0_FORMATfmt */ 1926 /* format FLEX_EDITOR_EH_TYPE_0_FORMATfmt */ 1927 /* nFields */ 7, 1928 /* *fields */ soc_EH_TYPE_0_FORMATfmt_fields, 1929 /* bits */ 32, 1930 /* flags */ 0, 1931 }, 1932 #endif /* chips */ 1933 1934 #if defined(BCM_56370_A0) 1935 { /* SOC_FORMAT_INT_FLEX_EDITOR_EH_TYPE_0_FORMAT_BCM56370_A0fmt */ 1936 /* format FLEX_EDITOR_EH_TYPE_0_FORMATfmt */ 1937 /* nFields */ 7, 1938 /* *fields */ soc_EH_TYPE_0_FORMATfmt_fields, 1939 /* bits */ 32, 1940 /* flags */ 0, 1941 }, 1942 #endif /* chips */ 1943 1944 #if defined(BCM_56770_A0) 1945 { /* SOC_FORMAT_INT_FLEX_EDITOR_EH_TYPE_0_FORMAT_BCM56770_A0fmt */ 1946 /* format FLEX_EDITOR_EH_TYPE_0_FORMATfmt */ 1947 /* nFields */ 7, 1948 /* *fields */ soc_EH_TYPE_0_FORMATfmt_fields, 1949 /* bits */ 32, 1950 /* flags */ 0, 1951 }, 1952 #endif /* chips */ 1953 1954 #if defined(BCM_56870_A0) 1955 { /* SOC_FORMAT_INT_FLEX_EDITOR_EH_TYPE_1_FORMATfmt */ 1956 /* format FLEX_EDITOR_EH_TYPE_1_FORMATfmt */ 1957 /* nFields */ 5, 1958 /* *fields */ soc_EH_TYPE_1_FORMATfmt_fields, 1959 /* bits */ 32, 1960 /* flags */ 0, 1961 }, 1962 #endif /* chips */ 1963 1964 #if defined(BCM_56370_A0) 1965 { /* SOC_FORMAT_INT_FLEX_EDITOR_EH_TYPE_1_FORMAT_BCM56370_A0fmt */ 1966 /* format FLEX_EDITOR_EH_TYPE_1_FORMATfmt */ 1967 /* nFields */ 5, 1968 /* *fields */ soc_EH_TYPE_1_FORMATfmt_fields, 1969 /* bits */ 32, 1970 /* flags */ 0, 1971 }, 1972 #endif /* chips */ 1973 1974 #if defined(BCM_56770_A0) 1975 { /* SOC_FORMAT_INT_FLEX_EDITOR_EH_TYPE_1_FORMAT_BCM56770_A0fmt */ 1976 /* format FLEX_EDITOR_EH_TYPE_1_FORMATfmt */ 1977 /* nFields */ 5, 1978 /* *fields */ soc_EH_TYPE_1_FORMATfmt_fields, 1979 /* bits */ 32, 1980 /* flags */ 0, 1981 }, 1982 #endif /* chips */ 1983 1984 #if defined(BCM_56870_A0) 1985 { /* SOC_FORMAT_INT_FLEX_EDITOR_EH_TYPE_2_FORMATfmt */ 1986 /* format FLEX_EDITOR_EH_TYPE_2_FORMATfmt */ 1987 /* nFields */ 5, 1988 /* *fields */ soc_EH_TYPE_2_FORMATfmt_fields, 1989 /* bits */ 32, 1990 /* flags */ 0, 1991 }, 1992 #endif /* chips */ 1993 1994 #if defined(BCM_56370_A0) 1995 { /* SOC_FORMAT_INT_FLEX_EDITOR_EH_TYPE_2_FORMAT_BCM56370_A0fmt */ 1996 /* format FLEX_EDITOR_EH_TYPE_2_FORMATfmt */ 1997 /* nFields */ 5, 1998 /* *fields */ soc_EH_TYPE_2_FORMATfmt_fields, 1999 /* bits */ 32, 2000 /* flags */ 0, 2001 }, 2002 #endif /* chips */ 2003 2004 #if defined(BCM_56770_A0) 2005 { /* SOC_FORMAT_INT_FLEX_EDITOR_EH_TYPE_2_FORMAT_BCM56770_A0fmt */ 2006 /* format FLEX_EDITOR_EH_TYPE_2_FORMATfmt */ 2007 /* nFields */ 5, 2008 /* *fields */ soc_EH_TYPE_2_FORMATfmt_fields, 2009 /* bits */ 32, 2010 /* flags */ 0, 2011 }, 2012 #endif /* chips */ 2013 2014 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2015 defined(BCM_56870_A0) 2016 { /* SOC_FORMAT_INT_FLEX_EDITOR_ENGINE_VALIDfmt */ 2017 /* format FLEX_EDITOR_ENGINE_VALIDfmt */ 2018 /* nFields */ 1, 2019 /* *fields */ soc_FLEX_EDITOR_ENGINE_VALIDfmt_fields, 2020 /* bits */ 1, 2021 /* flags */ 0, 2022 }, 2023 #endif /* chips */ 2024 2025 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2026 defined(BCM_56870_A0) 2027 { /* SOC_FORMAT_INT_FLEX_EDITOR_ERROR_VECTOR_FORMATfmt */ 2028 /* format FLEX_EDITOR_ERROR_VECTOR_FORMATfmt */ 2029 /* nFields */ 18, 2030 /* *fields */ soc_FLEX_EDITOR_ERROR_VECTOR_FORMATfmt_fields, 2031 /* bits */ 18, 2032 /* flags */ 0, 2033 }, 2034 #endif /* chips */ 2035 2036 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2037 defined(BCM_56870_A0) 2038 { /* SOC_FORMAT_INT_FLEX_EDITOR_EXTRACTED_PKT_SET_BASEfmt */ 2039 /* format FLEX_EDITOR_EXTRACTED_PKT_SET_BASEfmt */ 2040 /* nFields */ 1, 2041 /* *fields */ soc_FLEX_EDITOR_EXTRACTED_PKT_SET_BASEfmt_fields, 2042 /* bits */ 512, 2043 /* flags */ 0, 2044 }, 2045 #endif /* chips */ 2046 2047 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2048 defined(BCM_56870_A0) 2049 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIELD_16BIT_COMMAND_BASEfmt */ 2050 /* format FLEX_EDITOR_FIELD_16BIT_COMMAND_BASEfmt */ 2051 /* nFields */ 5, 2052 /* *fields */ soc_FLEX_EDITOR_FIELD_16BIT_COMMAND_BASEfmt_fields, 2053 /* bits */ 22, 2054 /* flags */ 0, 2055 }, 2056 #endif /* chips */ 2057 2058 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2059 defined(BCM_56870_A0) 2060 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIELD_32BIT_COMMAND_BASEfmt */ 2061 /* format FLEX_EDITOR_FIELD_32BIT_COMMAND_BASEfmt */ 2062 /* nFields */ 5, 2063 /* *fields */ soc_FLEX_EDITOR_FIELD_32BIT_COMMAND_BASEfmt_fields, 2064 /* bits */ 24, 2065 /* flags */ 0, 2066 }, 2067 #endif /* chips */ 2068 2069 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2070 defined(BCM_56870_A0) 2071 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIELD_BUSfmt */ 2072 /* format FLEX_EDITOR_FIELD_BUSfmt */ 2073 /* nFields */ 29, 2074 /* *fields */ soc_FLEX_EDITOR_FIELD_BUSfmt_fields, 2075 /* bits */ 896, 2076 /* flags */ 0, 2077 }, 2078 #endif /* chips */ 2079 2080 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2081 defined(BCM_56870_A0) 2082 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIXED_HDR_L2_PROFILE_PTR_SET_BASEfmt */ 2083 /* format FLEX_EDITOR_FIXED_HDR_L2_PROFILE_PTR_SET_BASEfmt */ 2084 /* nFields */ 1, 2085 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_L2_PROFILE_PTR_SET_BASEfmt_fields, 2086 /* bits */ 9, 2087 /* flags */ 0, 2088 }, 2089 #endif /* chips */ 2090 2091 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2092 defined(BCM_56870_A0) 2093 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIXED_HDR_L2_PROFILE_TABLEfmt */ 2094 /* format FLEX_EDITOR_FIXED_HDR_L2_PROFILE_TABLEfmt */ 2095 /* nFields */ 19, 2096 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_L2_PROFILE_TABLEfmt_fields, 2097 /* bits */ 48, 2098 /* flags */ 0, 2099 }, 2100 #endif /* chips */ 2101 2102 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2103 defined(BCM_56870_A0) 2104 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIXED_HDR_L3_PROFILE_PTR_SET_BASEfmt */ 2105 /* format FLEX_EDITOR_FIXED_HDR_L3_PROFILE_PTR_SET_BASEfmt */ 2106 /* nFields */ 1, 2107 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_L3_PROFILE_PTR_SET_BASEfmt_fields, 2108 /* bits */ 6, 2109 /* flags */ 0, 2110 }, 2111 #endif /* chips */ 2112 2113 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2114 defined(BCM_56870_A0) 2115 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIXED_HDR_L3_PROFILE_TABLEfmt */ 2116 /* format FLEX_EDITOR_FIXED_HDR_L3_PROFILE_TABLEfmt */ 2117 /* nFields */ 4, 2118 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_L3_PROFILE_TABLEfmt_fields, 2119 /* bits */ 10, 2120 /* flags */ 0, 2121 }, 2122 #endif /* chips */ 2123 2124 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2125 defined(BCM_56870_A0) 2126 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIXED_HDR_LOOPBACK_PROFILE_PTR_SET_BASEfmt */ 2127 /* format FLEX_EDITOR_FIXED_HDR_LOOPBACK_PROFILE_PTR_SET_BASEfmt */ 2128 /* nFields */ 1, 2129 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_LOOPBACK_PROFILE_PTR_SET_BASEfmt_fields, 2130 /* bits */ 4, 2131 /* flags */ 0, 2132 }, 2133 #endif /* chips */ 2134 2135 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2136 defined(BCM_56870_A0) 2137 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIXED_HDR_LOOPBACK_PROFILE_TABLEfmt */ 2138 /* format FLEX_EDITOR_FIXED_HDR_LOOPBACK_PROFILE_TABLEfmt */ 2139 /* nFields */ 11, 2140 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_LOOPBACK_PROFILE_TABLEfmt_fields, 2141 /* bits */ 152, 2142 /* flags */ 0, 2143 }, 2144 #endif /* chips */ 2145 2146 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2147 defined(BCM_56870_A0) 2148 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIXED_HDR_NEXT_PROTO_ID_SET_BASEfmt */ 2149 /* format FLEX_EDITOR_FIXED_HDR_NEXT_PROTO_ID_SET_BASEfmt */ 2150 /* nFields */ 1, 2151 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_NEXT_PROTO_ID_SET_BASEfmt_fields, 2152 /* bits */ 5, 2153 /* flags */ 0, 2154 }, 2155 #endif /* chips */ 2156 2157 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2158 defined(BCM_56870_A0) 2159 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIXED_HDR_NEXT_PROTO_TABLEfmt */ 2160 /* format FLEX_EDITOR_FIXED_HDR_NEXT_PROTO_TABLEfmt */ 2161 /* nFields */ 1, 2162 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_NEXT_PROTO_TABLEfmt_fields, 2163 /* bits */ 16, 2164 /* flags */ 0, 2165 }, 2166 #endif /* chips */ 2167 2168 #if defined(BCM_56870_A0) 2169 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIXED_HDR_PROFILE_PTR_SET_BASEfmt */ 2170 /* format FLEX_EDITOR_FIXED_HDR_PROFILE_PTR_SET_BASEfmt */ 2171 /* nFields */ 1, 2172 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_L3_PROFILE_PTR_SET_BASEfmt_fields, 2173 /* bits */ 6, 2174 /* flags */ 0, 2175 }, 2176 #endif /* chips */ 2177 2178 #if defined(BCM_56370_A0) 2179 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIXED_HDR_PROFILE_PTR_SET_BASE_BCM56370_A0fmt */ 2180 /* format FLEX_EDITOR_FIXED_HDR_PROFILE_PTR_SET_BASEfmt */ 2181 /* nFields */ 1, 2182 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_L3_PROFILE_PTR_SET_BASEfmt_fields, 2183 /* bits */ 6, 2184 /* flags */ 0, 2185 }, 2186 #endif /* chips */ 2187 2188 #if defined(BCM_56770_A0) 2189 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIXED_HDR_PROFILE_PTR_SET_BASE_BCM56770_A0fmt */ 2190 /* format FLEX_EDITOR_FIXED_HDR_PROFILE_PTR_SET_BASEfmt */ 2191 /* nFields */ 1, 2192 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_L3_PROFILE_PTR_SET_BASEfmt_fields, 2193 /* bits */ 6, 2194 /* flags */ 0, 2195 }, 2196 #endif /* chips */ 2197 2198 #if defined(BCM_56870_A0) 2199 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIXED_HDR_SYS_PROFILE_PTR_SET_BASEfmt */ 2200 /* format FLEX_EDITOR_FIXED_HDR_SYS_PROFILE_PTR_SET_BASEfmt */ 2201 /* nFields */ 1, 2202 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_L3_PROFILE_PTR_SET_BASEfmt_fields, 2203 /* bits */ 6, 2204 /* flags */ 0, 2205 }, 2206 #endif /* chips */ 2207 2208 #if defined(BCM_56370_A0) 2209 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIXED_HDR_SYS_PROFILE_PTR_SET_BASE_BCM56370_A0fmt */ 2210 /* format FLEX_EDITOR_FIXED_HDR_SYS_PROFILE_PTR_SET_BASEfmt */ 2211 /* nFields */ 1, 2212 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_L3_PROFILE_PTR_SET_BASEfmt_fields, 2213 /* bits */ 6, 2214 /* flags */ 0, 2215 }, 2216 #endif /* chips */ 2217 2218 #if defined(BCM_56770_A0) 2219 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIXED_HDR_SYS_PROFILE_PTR_SET_BASE_BCM56770_A0fmt */ 2220 /* format FLEX_EDITOR_FIXED_HDR_SYS_PROFILE_PTR_SET_BASEfmt */ 2221 /* nFields */ 1, 2222 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_L3_PROFILE_PTR_SET_BASEfmt_fields, 2223 /* bits */ 6, 2224 /* flags */ 0, 2225 }, 2226 #endif /* chips */ 2227 2228 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2229 defined(BCM_56870_A0) 2230 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIXED_HDR_SYS_PROFILE_TABLEfmt */ 2231 /* format FLEX_EDITOR_FIXED_HDR_SYS_PROFILE_TABLEfmt */ 2232 /* nFields */ 5, 2233 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_SYS_PROFILE_TABLEfmt_fields, 2234 /* bits */ 9, 2235 /* flags */ 0, 2236 }, 2237 #endif /* chips */ 2238 2239 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2240 defined(BCM_56870_A0) 2241 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIXED_HDR_TUNNEL_PROFILE_PTR_SET_BASEfmt */ 2242 /* format FLEX_EDITOR_FIXED_HDR_TUNNEL_PROFILE_PTR_SET_BASEfmt */ 2243 /* nFields */ 1, 2244 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_TUNNEL_PROFILE_PTR_SET_BASEfmt_fields, 2245 /* bits */ 8, 2246 /* flags */ 0, 2247 }, 2248 #endif /* chips */ 2249 2250 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2251 defined(BCM_56870_A0) 2252 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIXED_HDR_TUNNEL_PROFILE_TABLEfmt */ 2253 /* format FLEX_EDITOR_FIXED_HDR_TUNNEL_PROFILE_TABLEfmt */ 2254 /* nFields */ 21, 2255 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_TUNNEL_PROFILE_TABLEfmt_fields, 2256 /* bits */ 51, 2257 /* flags */ 0, 2258 }, 2259 #endif /* chips */ 2260 2261 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2262 defined(BCM_56870_A0) 2263 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIXED_L2_HEADER_SET_BASEfmt */ 2264 /* format FLEX_EDITOR_FIXED_L2_HEADER_SET_BASEfmt */ 2265 /* nFields */ 1, 2266 /* *fields */ soc_FLEX_EDITOR_FIXED_L2_HEADER_SET_BASEfmt_fields, 2267 /* bits */ 384, 2268 /* flags */ 0, 2269 }, 2270 #endif /* chips */ 2271 2272 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2273 defined(BCM_56870_A0) 2274 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIXED_L3_HEADER_SET_BASEfmt */ 2275 /* format FLEX_EDITOR_FIXED_L3_HEADER_SET_BASEfmt */ 2276 /* nFields */ 1, 2277 /* *fields */ soc_FLEX_EDITOR_FIXED_L3_HEADER_SET_BASEfmt_fields, 2278 /* bits */ 320, 2279 /* flags */ 0, 2280 }, 2281 #endif /* chips */ 2282 2283 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2284 defined(BCM_56870_A0) 2285 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIXED_SYS_HEADER_SET_BASEfmt */ 2286 /* format FLEX_EDITOR_FIXED_SYS_HEADER_SET_BASEfmt */ 2287 /* nFields */ 1, 2288 /* *fields */ soc_FLEX_EDITOR_FIXED_SYS_HEADER_SET_BASEfmt_fields, 2289 /* bits */ 480, 2290 /* flags */ 0, 2291 }, 2292 #endif /* chips */ 2293 2294 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2295 defined(BCM_56870_A0) 2296 { /* SOC_FORMAT_INT_FLEX_EDITOR_FIXED_TUNNEL_HEADER_SET_BASEfmt */ 2297 /* format FLEX_EDITOR_FIXED_TUNNEL_HEADER_SET_BASEfmt */ 2298 /* nFields */ 1, 2299 /* *fields */ soc_FLEX_EDITOR_FIXED_TUNNEL_HEADER_SET_BASEfmt_fields, 2300 /* bits */ 496, 2301 /* flags */ 0, 2302 }, 2303 #endif /* chips */ 2304 2305 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2306 defined(BCM_56870_A0) 2307 { /* SOC_FORMAT_INT_FLEX_EDITOR_FLEX_HDR_16BIT_FS_PROFILE_TABLEfmt */ 2308 /* format FLEX_EDITOR_FLEX_HDR_16BIT_FS_PROFILE_TABLEfmt */ 2309 /* nFields */ 52, 2310 /* *fields */ soc_FLEX_EDITOR_FLEX_HDR_16BIT_FS_PROFILE_TABLEfmt_fields, 2311 /* bits */ 214, 2312 /* flags */ 0, 2313 }, 2314 #endif /* chips */ 2315 2316 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2317 defined(BCM_56870_A0) 2318 { /* SOC_FORMAT_INT_FLEX_EDITOR_FLEX_HDR_32BIT_FS_PROFILE_TABLEfmt */ 2319 /* format FLEX_EDITOR_FLEX_HDR_32BIT_FS_PROFILE_TABLEfmt */ 2320 /* nFields */ 70, 2321 /* *fields */ soc_FLEX_EDITOR_FLEX_HDR_32BIT_FS_PROFILE_TABLEfmt_fields, 2322 /* bits */ 312, 2323 /* flags */ 0, 2324 }, 2325 #endif /* chips */ 2326 2327 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2328 defined(BCM_56870_A0) 2329 { /* SOC_FORMAT_INT_FLEX_EDITOR_FLEX_HDR_ALU_COMMAND_BASEfmt */ 2330 /* format FLEX_EDITOR_FLEX_HDR_ALU_COMMAND_BASEfmt */ 2331 /* nFields */ 12, 2332 /* *fields */ soc_FLEX_EDITOR_FLEX_HDR_ALU_COMMAND_BASEfmt_fields, 2333 /* bits */ 62, 2334 /* flags */ 0, 2335 }, 2336 #endif /* chips */ 2337 2338 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2339 defined(BCM_56870_A0) 2340 { /* SOC_FORMAT_INT_FLEX_EDITOR_FLEX_HDR_ALU_PROFILE_TABLEfmt */ 2341 /* format FLEX_EDITOR_FLEX_HDR_ALU_PROFILE_TABLEfmt */ 2342 /* nFields */ 29, 2343 /* *fields */ soc_FLEX_EDITOR_FLEX_HDR_ALU_PROFILE_TABLEfmt_fields, 2344 /* bits */ 134, 2345 /* flags */ 0, 2346 }, 2347 #endif /* chips */ 2348 2349 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2350 defined(BCM_56870_A0) 2351 { /* SOC_FORMAT_INT_FLEX_EDITOR_FLEX_HDR_FIELD_BUSfmt */ 2352 /* format FLEX_EDITOR_FLEX_HDR_FIELD_BUSfmt */ 2353 /* nFields */ 21, 2354 /* *fields */ soc_FLEX_EDITOR_FLEX_HDR_FIELD_BUSfmt_fields, 2355 /* bits */ 528, 2356 /* flags */ 0, 2357 }, 2358 #endif /* chips */ 2359 2360 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2361 defined(BCM_56870_A0) 2362 { /* SOC_FORMAT_INT_FLEX_EDITOR_FLEX_HDR_FIELD_SELECT_COMMAND_BASEfmt */ 2363 /* format FLEX_EDITOR_FLEX_HDR_FIELD_SELECT_COMMAND_BASEfmt */ 2364 /* nFields */ 2, 2365 /* *fields */ soc_FLEX_EDITOR_FLEX_HDR_FIELD_SELECT_COMMAND_BASEfmt_fields, 2366 /* bits */ 5, 2367 /* flags */ 0, 2368 }, 2369 #endif /* chips */ 2370 2371 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2372 defined(BCM_56870_A0) 2373 { /* SOC_FORMAT_INT_FLEX_EDITOR_FLEX_HDR_HC_PROFILE_TABLEfmt */ 2374 /* format FLEX_EDITOR_FLEX_HDR_HC_PROFILE_TABLEfmt */ 2375 /* nFields */ 57, 2376 /* *fields */ soc_FLEX_EDITOR_FLEX_HDR_HC_PROFILE_TABLEfmt_fields, 2377 /* bits */ 140, 2378 /* flags */ 0, 2379 }, 2380 #endif /* chips */ 2381 2382 #if defined(BCM_56870_A0) 2383 { /* SOC_FORMAT_INT_FLEX_EDITOR_FLEX_HDR_NEXT_PROTO_ID_SET_BASEfmt */ 2384 /* format FLEX_EDITOR_FLEX_HDR_NEXT_PROTO_ID_SET_BASEfmt */ 2385 /* nFields */ 1, 2386 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_NEXT_PROTO_ID_SET_BASEfmt_fields, 2387 /* bits */ 5, 2388 /* flags */ 0, 2389 }, 2390 #endif /* chips */ 2391 2392 #if defined(BCM_56370_A0) 2393 { /* SOC_FORMAT_INT_FLEX_EDITOR_FLEX_HDR_NEXT_PROTO_ID_SET_BASE_BCM56370_A0fmt */ 2394 /* format FLEX_EDITOR_FLEX_HDR_NEXT_PROTO_ID_SET_BASEfmt */ 2395 /* nFields */ 1, 2396 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_NEXT_PROTO_ID_SET_BASEfmt_fields, 2397 /* bits */ 5, 2398 /* flags */ 0, 2399 }, 2400 #endif /* chips */ 2401 2402 #if defined(BCM_56770_A0) 2403 { /* SOC_FORMAT_INT_FLEX_EDITOR_FLEX_HDR_NEXT_PROTO_ID_SET_BASE_BCM56770_A0fmt */ 2404 /* format FLEX_EDITOR_FLEX_HDR_NEXT_PROTO_ID_SET_BASEfmt */ 2405 /* nFields */ 1, 2406 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_NEXT_PROTO_ID_SET_BASEfmt_fields, 2407 /* bits */ 5, 2408 /* flags */ 0, 2409 }, 2410 #endif /* chips */ 2411 2412 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2413 defined(BCM_56870_A0) 2414 { /* SOC_FORMAT_INT_FLEX_EDITOR_FLEX_HDR_NEXT_PROTO_TABLEfmt */ 2415 /* format FLEX_EDITOR_FLEX_HDR_NEXT_PROTO_TABLEfmt */ 2416 /* nFields */ 4, 2417 /* *fields */ soc_FLEX_EDITOR_FLEX_HDR_NEXT_PROTO_TABLEfmt_fields, 2418 /* bits */ 22, 2419 /* flags */ 0, 2420 }, 2421 #endif /* chips */ 2422 2423 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2424 defined(BCM_56870_A0) 2425 { /* SOC_FORMAT_INT_FLEX_EDITOR_FLEX_HDR_OW_PROFILE_TABLEfmt */ 2426 /* format FLEX_EDITOR_FLEX_HDR_OW_PROFILE_TABLEfmt */ 2427 /* nFields */ 26, 2428 /* *fields */ soc_FLEX_EDITOR_FLEX_HDR_OW_PROFILE_TABLEfmt_fields, 2429 /* bits */ 156, 2430 /* flags */ 0, 2431 }, 2432 #endif /* chips */ 2433 2434 #if defined(BCM_56870_A0) 2435 { /* SOC_FORMAT_INT_FLEX_EDITOR_FLEX_HDR_PROFILE_PTR_SET_BASEfmt */ 2436 /* format FLEX_EDITOR_FLEX_HDR_PROFILE_PTR_SET_BASEfmt */ 2437 /* nFields */ 1, 2438 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_L3_PROFILE_PTR_SET_BASEfmt_fields, 2439 /* bits */ 6, 2440 /* flags */ 0, 2441 }, 2442 #endif /* chips */ 2443 2444 #if defined(BCM_56370_A0) 2445 { /* SOC_FORMAT_INT_FLEX_EDITOR_FLEX_HDR_PROFILE_PTR_SET_BASE_BCM56370_A0fmt */ 2446 /* format FLEX_EDITOR_FLEX_HDR_PROFILE_PTR_SET_BASEfmt */ 2447 /* nFields */ 1, 2448 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_L3_PROFILE_PTR_SET_BASEfmt_fields, 2449 /* bits */ 6, 2450 /* flags */ 0, 2451 }, 2452 #endif /* chips */ 2453 2454 #if defined(BCM_56770_A0) 2455 { /* SOC_FORMAT_INT_FLEX_EDITOR_FLEX_HDR_PROFILE_PTR_SET_BASE_BCM56770_A0fmt */ 2456 /* format FLEX_EDITOR_FLEX_HDR_PROFILE_PTR_SET_BASEfmt */ 2457 /* nFields */ 1, 2458 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_L3_PROFILE_PTR_SET_BASEfmt_fields, 2459 /* bits */ 6, 2460 /* flags */ 0, 2461 }, 2462 #endif /* chips */ 2463 2464 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2465 defined(BCM_56870_A0) 2466 { /* SOC_FORMAT_INT_FLEX_EDITOR_FLEX_HDR_PROFILE_TABLEfmt */ 2467 /* format FLEX_EDITOR_FLEX_HDR_PROFILE_TABLEfmt */ 2468 /* nFields */ 9, 2469 /* *fields */ soc_FLEX_EDITOR_FLEX_HDR_PROFILE_TABLEfmt_fields, 2470 /* bits */ 30, 2471 /* flags */ 0, 2472 }, 2473 #endif /* chips */ 2474 2475 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2476 defined(BCM_56870_A0) 2477 { /* SOC_FORMAT_INT_FLEX_EDITOR_FLEX_HDR_USER_FIELD_FORMATfmt */ 2478 /* format FLEX_EDITOR_FLEX_HDR_USER_FIELD_FORMATfmt */ 2479 /* nFields */ 1, 2480 /* *fields */ soc_FLEX_EDITOR_FLEX_HDR_USER_FIELD_FORMATfmt_fields, 2481 /* bits */ 32, 2482 /* flags */ 0, 2483 }, 2484 #endif /* chips */ 2485 2486 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2487 defined(BCM_56870_A0) 2488 { /* SOC_FORMAT_INT_FLEX_EDITOR_FLEX_HEADER_SET_BASEfmt */ 2489 /* format FLEX_EDITOR_FLEX_HEADER_SET_BASEfmt */ 2490 /* nFields */ 1, 2491 /* *fields */ soc_FLEX_EDITOR_FLEX_HEADER_SET_BASEfmt_fields, 2492 /* bits */ 128, 2493 /* flags */ 0, 2494 }, 2495 #endif /* chips */ 2496 2497 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2498 defined(BCM_56870_A0) 2499 { /* SOC_FORMAT_INT_FLEX_EDITOR_HDR_EGR_START_SET_BASEfmt */ 2500 /* format FLEX_EDITOR_HDR_EGR_START_SET_BASEfmt */ 2501 /* nFields */ 1, 2502 /* *fields */ soc_FLEX_EDITOR_HDR_EGR_START_SET_BASEfmt_fields, 2503 /* bits */ 8, 2504 /* flags */ 0, 2505 }, 2506 #endif /* chips */ 2507 2508 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2509 defined(BCM_56870_A0) 2510 { /* SOC_FORMAT_INT_FLEX_EDITOR_HDR_ID_LIST_COMMAND_BASEfmt */ 2511 /* format FLEX_EDITOR_HDR_ID_LIST_COMMAND_BASEfmt */ 2512 /* nFields */ 3, 2513 /* *fields */ soc_FLEX_EDITOR_HDR_ID_LIST_COMMAND_BASEfmt_fields, 2514 /* bits */ 16, 2515 /* flags */ 0, 2516 }, 2517 #endif /* chips */ 2518 2519 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2520 defined(BCM_56870_A0) 2521 { /* SOC_FORMAT_INT_FLEX_EDITOR_HDR_ID_SET_BASEfmt */ 2522 /* format FLEX_EDITOR_HDR_ID_SET_BASEfmt */ 2523 /* nFields */ 2, 2524 /* *fields */ soc_FLEX_EDITOR_HDR_ID_SET_BASEfmt_fields, 2525 /* bits */ 15, 2526 /* flags */ 0, 2527 }, 2528 #endif /* chips */ 2529 2530 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2531 defined(BCM_56870_A0) 2532 { /* SOC_FORMAT_INT_FLEX_EDITOR_HDR_LIST_ARRAY_BASEfmt */ 2533 /* format FLEX_EDITOR_HDR_LIST_ARRAY_BASEfmt */ 2534 /* nFields */ 3, 2535 /* *fields */ soc_FLEX_EDITOR_HDR_LIST_ARRAY_BASEfmt_fields, 2536 /* bits */ 16, 2537 /* flags */ 0, 2538 }, 2539 #endif /* chips */ 2540 2541 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2542 defined(BCM_56870_A0) 2543 { /* SOC_FORMAT_INT_FLEX_EDITOR_HDR_SIZE_SET_BASEfmt */ 2544 /* format FLEX_EDITOR_HDR_SIZE_SET_BASEfmt */ 2545 /* nFields */ 1, 2546 /* *fields */ soc_FLEX_EDITOR_HDR_SIZE_SET_BASEfmt_fields, 2547 /* bits */ 7, 2548 /* flags */ 0, 2549 }, 2550 #endif /* chips */ 2551 2552 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2553 defined(BCM_56870_A0) 2554 { /* SOC_FORMAT_INT_FLEX_EDITOR_HG2_UNUSED_FIELDSfmt */ 2555 /* format FLEX_EDITOR_HG2_UNUSED_FIELDSfmt */ 2556 /* nFields */ 10, 2557 /* *fields */ soc_FLEX_EDITOR_HG2_UNUSED_FIELDSfmt_fields, 2558 /* bits */ 21, 2559 /* flags */ 0, 2560 }, 2561 #endif /* chips */ 2562 2563 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2564 defined(BCM_56870_A0) 2565 { /* SOC_FORMAT_INT_FLEX_EDITOR_HG_EH_CONTROL_FORMATfmt */ 2566 /* format FLEX_EDITOR_HG_EH_CONTROL_FORMATfmt */ 2567 /* nFields */ 1, 2568 /* *fields */ soc_FLEX_EDITOR_HG_EH_CONTROL_FORMATfmt_fields, 2569 /* bits */ 32, 2570 /* flags */ 0, 2571 }, 2572 #endif /* chips */ 2573 2574 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2575 defined(BCM_56870_A0) 2576 { /* SOC_FORMAT_INT_FLEX_EDITOR_HIGIG_HEADER_CONFIG_FORMATfmt */ 2577 /* format FLEX_EDITOR_HIGIG_HEADER_CONFIG_FORMATfmt */ 2578 /* nFields */ 7, 2579 /* *fields */ soc_FLEX_EDITOR_HIGIG_HEADER_CONFIG_FORMATfmt_fields, 2580 /* bits */ 8, 2581 /* flags */ 0, 2582 }, 2583 #endif /* chips */ 2584 2585 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2586 defined(BCM_56870_A0) 2587 { /* SOC_FORMAT_INT_FLEX_EDITOR_INSERT_COMMAND_BASEfmt */ 2588 /* format FLEX_EDITOR_INSERT_COMMAND_BASEfmt */ 2589 /* nFields */ 8, 2590 /* *fields */ soc_FLEX_EDITOR_INSERT_COMMAND_BASEfmt_fields, 2591 /* bits */ 26, 2592 /* flags */ 0, 2593 }, 2594 #endif /* chips */ 2595 2596 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2597 defined(BCM_56870_A0) 2598 { /* SOC_FORMAT_INT_FLEX_EDITOR_IN_BUSfmt */ 2599 /* format FLEX_EDITOR_IN_BUSfmt */ 2600 /* nFields */ 91, 2601 /* *fields */ soc_FLEX_EDITOR_IN_BUSfmt_fields, 2602 /* bits */ 5309, 2603 /* flags */ 0, 2604 }, 2605 #endif /* chips */ 2606 2607 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2608 defined(BCM_56870_A0) 2609 { /* SOC_FORMAT_INT_FLEX_EDITOR_L2_FIELD_BUSfmt */ 2610 /* format FLEX_EDITOR_L2_FIELD_BUSfmt */ 2611 /* nFields */ 11, 2612 /* *fields */ soc_FLEX_EDITOR_L2_FIELD_BUSfmt_fields, 2613 /* bits */ 304, 2614 /* flags */ 0, 2615 }, 2616 #endif /* chips */ 2617 2618 #if defined(BCM_56870_A0) 2619 { /* SOC_FORMAT_INT_FLEX_EDITOR_L2_TAG_BUSfmt */ 2620 /* format FLEX_EDITOR_L2_TAG_BUSfmt */ 2621 /* nFields */ 9, 2622 /* *fields */ soc_EGRESS_L2_TAG_BUSfmt_fields, 2623 /* bits */ 160, 2624 /* flags */ 0, 2625 }, 2626 #endif /* chips */ 2627 2628 #if defined(BCM_56370_A0) 2629 { /* SOC_FORMAT_INT_FLEX_EDITOR_L2_TAG_BUS_BCM56370_A0fmt */ 2630 /* format FLEX_EDITOR_L2_TAG_BUSfmt */ 2631 /* nFields */ 9, 2632 /* *fields */ soc_EGRESS_L2_TAG_BUSfmt_fields, 2633 /* bits */ 160, 2634 /* flags */ 0, 2635 }, 2636 #endif /* chips */ 2637 2638 #if defined(BCM_56770_A0) 2639 { /* SOC_FORMAT_INT_FLEX_EDITOR_L2_TAG_BUS_BCM56770_A0fmt */ 2640 /* format FLEX_EDITOR_L2_TAG_BUSfmt */ 2641 /* nFields */ 9, 2642 /* *fields */ soc_EGRESS_L2_TAG_BUSfmt_fields, 2643 /* bits */ 160, 2644 /* flags */ 0, 2645 }, 2646 #endif /* chips */ 2647 2648 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2649 defined(BCM_56870_A0) 2650 { /* SOC_FORMAT_INT_FLEX_EDITOR_L3_FIELD_BUSfmt */ 2651 /* format FLEX_EDITOR_L3_FIELD_BUSfmt */ 2652 /* nFields */ 45, 2653 /* *fields */ soc_FLEX_EDITOR_L3_FIELD_BUSfmt_fields, 2654 /* bits */ 460, 2655 /* flags */ 0, 2656 }, 2657 #endif /* chips */ 2658 2659 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2660 defined(BCM_56870_A0) 2661 { /* SOC_FORMAT_INT_FLEX_EDITOR_MATCH_ID_COMMAND_PROFILE_TABLEfmt */ 2662 /* format FLEX_EDITOR_MATCH_ID_COMMAND_PROFILE_TABLEfmt */ 2663 /* nFields */ 22, 2664 /* *fields */ soc_FLEX_EDITOR_MATCH_ID_COMMAND_PROFILE_TABLEfmt_fields, 2665 /* bits */ 86, 2666 /* flags */ 0, 2667 }, 2668 #endif /* chips */ 2669 2670 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2671 defined(BCM_56870_A0) 2672 { /* SOC_FORMAT_INT_FLEX_EDITOR_MATCH_ID_SET_BASEfmt */ 2673 /* format FLEX_EDITOR_MATCH_ID_SET_BASEfmt */ 2674 /* nFields */ 1, 2675 /* *fields */ soc_FLEX_EDITOR_MATCH_ID_SET_BASEfmt_fields, 2676 /* bits */ 11, 2677 /* flags */ 0, 2678 }, 2679 #endif /* chips */ 2680 2681 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2682 defined(BCM_56870_A0) 2683 { /* SOC_FORMAT_INT_FLEX_EDITOR_MATCH_ID_TABLEfmt */ 2684 /* format FLEX_EDITOR_MATCH_ID_TABLEfmt */ 2685 /* nFields */ 51, 2686 /* *fields */ soc_FLEX_EDITOR_MATCH_ID_TABLEfmt_fields, 2687 /* bits */ 222, 2688 /* flags */ 0, 2689 }, 2690 #endif /* chips */ 2691 2692 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2693 defined(BCM_56870_A0) 2694 { /* SOC_FORMAT_INT_FLEX_EDITOR_MHC_CHECKSUM_COMMAND_BASEfmt */ 2695 /* format FLEX_EDITOR_MHC_CHECKSUM_COMMAND_BASEfmt */ 2696 /* nFields */ 7, 2697 /* *fields */ soc_FLEX_EDITOR_MHC_CHECKSUM_COMMAND_BASEfmt_fields, 2698 /* bits */ 32, 2699 /* flags */ 0, 2700 }, 2701 #endif /* chips */ 2702 2703 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2704 defined(BCM_56870_A0) 2705 { /* SOC_FORMAT_INT_FLEX_EDITOR_MHC_CHECKSUM_FLEX_HDR_SUM_SET_BASEfmt */ 2706 /* format FLEX_EDITOR_MHC_CHECKSUM_FLEX_HDR_SUM_SET_BASEfmt */ 2707 /* nFields */ 1, 2708 /* *fields */ soc_FLEX_EDITOR_MHC_CHECKSUM_FLEX_HDR_SUM_SET_BASEfmt_fields, 2709 /* bits */ 16, 2710 /* flags */ 0, 2711 }, 2712 #endif /* chips */ 2713 2714 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2715 defined(BCM_56870_A0) 2716 { /* SOC_FORMAT_INT_FLEX_EDITOR_MHC_CHECKSUM_MASK_BITMAP_64_FORMATfmt */ 2717 /* format FLEX_EDITOR_MHC_CHECKSUM_MASK_BITMAP_64_FORMATfmt */ 2718 /* nFields */ 1, 2719 /* *fields */ soc_FLEX_EDITOR_MHC_CHECKSUM_MASK_BITMAP_64_FORMATfmt_fields, 2720 /* bits */ 48, 2721 /* flags */ 0, 2722 }, 2723 #endif /* chips */ 2724 2725 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2726 defined(BCM_56870_A0) 2727 { /* SOC_FORMAT_INT_FLEX_EDITOR_MHC_CHECKSUM_POSITION_SET_BASEfmt */ 2728 /* format FLEX_EDITOR_MHC_CHECKSUM_POSITION_SET_BASEfmt */ 2729 /* nFields */ 4, 2730 /* *fields */ soc_FLEX_EDITOR_MHC_CHECKSUM_POSITION_SET_BASEfmt_fields, 2731 /* bits */ 24, 2732 /* flags */ 0, 2733 }, 2734 #endif /* chips */ 2735 2736 #if defined(BCM_56870_A0) 2737 { /* SOC_FORMAT_INT_FLEX_EDITOR_MHC_CHECKSUM_PROFILE_PTR_SET_BASEfmt */ 2738 /* format FLEX_EDITOR_MHC_CHECKSUM_PROFILE_PTR_SET_BASEfmt */ 2739 /* nFields */ 1, 2740 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_LOOPBACK_PROFILE_PTR_SET_BASEfmt_fields, 2741 /* bits */ 4, 2742 /* flags */ 0, 2743 }, 2744 #endif /* chips */ 2745 2746 #if defined(BCM_56370_A0) 2747 { /* SOC_FORMAT_INT_FLEX_EDITOR_MHC_CHECKSUM_PROFILE_PTR_SET_BASE_BCM56370_A0fmt */ 2748 /* format FLEX_EDITOR_MHC_CHECKSUM_PROFILE_PTR_SET_BASEfmt */ 2749 /* nFields */ 1, 2750 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_LOOPBACK_PROFILE_PTR_SET_BASEfmt_fields, 2751 /* bits */ 4, 2752 /* flags */ 0, 2753 }, 2754 #endif /* chips */ 2755 2756 #if defined(BCM_56770_A0) 2757 { /* SOC_FORMAT_INT_FLEX_EDITOR_MHC_CHECKSUM_PROFILE_PTR_SET_BASE_BCM56770_A0fmt */ 2758 /* format FLEX_EDITOR_MHC_CHECKSUM_PROFILE_PTR_SET_BASEfmt */ 2759 /* nFields */ 1, 2760 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_LOOPBACK_PROFILE_PTR_SET_BASEfmt_fields, 2761 /* bits */ 4, 2762 /* flags */ 0, 2763 }, 2764 #endif /* chips */ 2765 2766 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2767 defined(BCM_56870_A0) 2768 { /* SOC_FORMAT_INT_FLEX_EDITOR_MHC_CHECKSUM_PROFILE_SET_BASEfmt */ 2769 /* format FLEX_EDITOR_MHC_CHECKSUM_PROFILE_SET_BASEfmt */ 2770 /* nFields */ 1, 2771 /* *fields */ soc_FLEX_EDITOR_MHC_CHECKSUM_PROFILE_SET_BASEfmt_fields, 2772 /* bits */ 64, 2773 /* flags */ 0, 2774 }, 2775 #endif /* chips */ 2776 2777 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2778 defined(BCM_56870_A0) 2779 { /* SOC_FORMAT_INT_FLEX_EDITOR_MHC_CHECKSUM_PROFILE_TABLEfmt */ 2780 /* format FLEX_EDITOR_MHC_CHECKSUM_PROFILE_TABLEfmt */ 2781 /* nFields */ 13, 2782 /* *fields */ soc_FLEX_EDITOR_MHC_CHECKSUM_PROFILE_TABLEfmt_fields, 2783 /* bits */ 64, 2784 /* flags */ 0, 2785 }, 2786 #endif /* chips */ 2787 2788 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2789 defined(BCM_56870_A0) 2790 { /* SOC_FORMAT_INT_FLEX_EDITOR_MHC_CHECKSUM_RW_DELTA_SET_BASEfmt */ 2791 /* format FLEX_EDITOR_MHC_CHECKSUM_RW_DELTA_SET_BASEfmt */ 2792 /* nFields */ 6, 2793 /* *fields */ soc_FLEX_EDITOR_MHC_CHECKSUM_RW_DELTA_SET_BASEfmt_fields, 2794 /* bits */ 96, 2795 /* flags */ 0, 2796 }, 2797 #endif /* chips */ 2798 2799 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2800 defined(BCM_56870_A0) 2801 { /* SOC_FORMAT_INT_FLEX_EDITOR_MHC_CRC_COMMAND_BASEfmt */ 2802 /* format FLEX_EDITOR_MHC_CRC_COMMAND_BASEfmt */ 2803 /* nFields */ 3, 2804 /* *fields */ soc_FLEX_EDITOR_MHC_CRC_COMMAND_BASEfmt_fields, 2805 /* bits */ 14, 2806 /* flags */ 0, 2807 }, 2808 #endif /* chips */ 2809 2810 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2811 defined(BCM_56870_A0) 2812 { /* SOC_FORMAT_INT_FLEX_EDITOR_MHC_CRC_PROFILE_PTR_SET_BASEfmt */ 2813 /* format FLEX_EDITOR_MHC_CRC_PROFILE_PTR_SET_BASEfmt */ 2814 /* nFields */ 1, 2815 /* *fields */ soc_FLEX_EDITOR_MHC_CRC_PROFILE_PTR_SET_BASEfmt_fields, 2816 /* bits */ 3, 2817 /* flags */ 0, 2818 }, 2819 #endif /* chips */ 2820 2821 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2822 defined(BCM_56870_A0) 2823 { /* SOC_FORMAT_INT_FLEX_EDITOR_MHC_CRC_PROFILE_SET_BASEfmt */ 2824 /* format FLEX_EDITOR_MHC_CRC_PROFILE_SET_BASEfmt */ 2825 /* nFields */ 2, 2826 /* *fields */ soc_FLEX_EDITOR_MHC_CRC_PROFILE_SET_BASEfmt_fields, 2827 /* bits */ 13, 2828 /* flags */ 0, 2829 }, 2830 #endif /* chips */ 2831 2832 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2833 defined(BCM_56870_A0) 2834 { /* SOC_FORMAT_INT_FLEX_EDITOR_MHC_CRC_PROFILE_TABLEfmt */ 2835 /* format FLEX_EDITOR_MHC_CRC_PROFILE_TABLEfmt */ 2836 /* nFields */ 4, 2837 /* *fields */ soc_FLEX_EDITOR_MHC_CRC_PROFILE_TABLEfmt_fields, 2838 /* bits */ 12, 2839 /* flags */ 0, 2840 }, 2841 #endif /* chips */ 2842 2843 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2844 defined(BCM_56870_A0) 2845 { /* SOC_FORMAT_INT_FLEX_EDITOR_MIRROR_ENCAP_CHECKSUM_COMMAND_BASEfmt */ 2846 /* format FLEX_EDITOR_MIRROR_ENCAP_CHECKSUM_COMMAND_BASEfmt */ 2847 /* nFields */ 3, 2848 /* *fields */ soc_FLEX_EDITOR_MIRROR_ENCAP_CHECKSUM_COMMAND_BASEfmt_fields, 2849 /* bits */ 88, 2850 /* flags */ 0, 2851 }, 2852 #endif /* chips */ 2853 2854 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2855 defined(BCM_56870_A0) 2856 { /* SOC_FORMAT_INT_FLEX_EDITOR_MIRROR_ENCAP_HEADER_SET_BASEfmt */ 2857 /* format FLEX_EDITOR_MIRROR_ENCAP_HEADER_SET_BASEfmt */ 2858 /* nFields */ 1, 2859 /* *fields */ soc_FLEX_EDITOR_MIRROR_ENCAP_HEADER_SET_BASEfmt_fields, 2860 /* bits */ 640, 2861 /* flags */ 0, 2862 }, 2863 #endif /* chips */ 2864 2865 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2866 defined(BCM_56870_A0) 2867 { /* SOC_FORMAT_INT_FLEX_EDITOR_MIRROR_ENCAP_PKT_LEN_COMMAND_BASEfmt */ 2868 /* format FLEX_EDITOR_MIRROR_ENCAP_PKT_LEN_COMMAND_BASEfmt */ 2869 /* nFields */ 4, 2870 /* *fields */ soc_FLEX_EDITOR_MIRROR_ENCAP_PKT_LEN_COMMAND_BASEfmt_fields, 2871 /* bits */ 18, 2872 /* flags */ 0, 2873 }, 2874 #endif /* chips */ 2875 2876 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2877 defined(BCM_56870_A0) 2878 { /* SOC_FORMAT_INT_FLEX_EDITOR_MIRROR_ENCAP_PROFILE_1_TABLEfmt */ 2879 /* format FLEX_EDITOR_MIRROR_ENCAP_PROFILE_1_TABLEfmt */ 2880 /* nFields */ 13, 2881 /* *fields */ soc_FLEX_EDITOR_MIRROR_ENCAP_PROFILE_1_TABLEfmt_fields, 2882 /* bits */ 352, 2883 /* flags */ 0, 2884 }, 2885 #endif /* chips */ 2886 2887 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2888 defined(BCM_56870_A0) 2889 { /* SOC_FORMAT_INT_FLEX_EDITOR_MIRROR_ENCAP_PROFILE_2_TABLEfmt */ 2890 /* format FLEX_EDITOR_MIRROR_ENCAP_PROFILE_2_TABLEfmt */ 2891 /* nFields */ 13, 2892 /* *fields */ soc_FLEX_EDITOR_MIRROR_ENCAP_PROFILE_2_TABLEfmt_fields, 2893 /* bits */ 352, 2894 /* flags */ 0, 2895 }, 2896 #endif /* chips */ 2897 2898 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2899 defined(BCM_56870_A0) 2900 { /* SOC_FORMAT_INT_FLEX_EDITOR_MIRROR_ENCAP_PROFILE_3_TABLEfmt */ 2901 /* format FLEX_EDITOR_MIRROR_ENCAP_PROFILE_3_TABLEfmt */ 2902 /* nFields */ 17, 2903 /* *fields */ soc_FLEX_EDITOR_MIRROR_ENCAP_PROFILE_3_TABLEfmt_fields, 2904 /* bits */ 134, 2905 /* flags */ 0, 2906 }, 2907 #endif /* chips */ 2908 2909 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2910 defined(BCM_56870_A0) 2911 { /* SOC_FORMAT_INT_FLEX_EDITOR_MIRROR_FIELD_BUSfmt */ 2912 /* format FLEX_EDITOR_MIRROR_FIELD_BUSfmt */ 2913 /* nFields */ 1, 2914 /* *fields */ soc_FLEX_EDITOR_MIRROR_FIELD_BUSfmt_fields, 2915 /* bits */ 16, 2916 /* flags */ 0, 2917 }, 2918 #endif /* chips */ 2919 2920 #if defined(BCM_56870_A0) 2921 { /* SOC_FORMAT_INT_FLEX_EDITOR_MIRROR_PROFILE_PTR_SET_BASEfmt */ 2922 /* format FLEX_EDITOR_MIRROR_PROFILE_PTR_SET_BASEfmt */ 2923 /* nFields */ 1, 2924 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_LOOPBACK_PROFILE_PTR_SET_BASEfmt_fields, 2925 /* bits */ 4, 2926 /* flags */ 0, 2927 }, 2928 #endif /* chips */ 2929 2930 #if defined(BCM_56370_A0) 2931 { /* SOC_FORMAT_INT_FLEX_EDITOR_MIRROR_PROFILE_PTR_SET_BASE_BCM56370_A0fmt */ 2932 /* format FLEX_EDITOR_MIRROR_PROFILE_PTR_SET_BASEfmt */ 2933 /* nFields */ 1, 2934 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_LOOPBACK_PROFILE_PTR_SET_BASEfmt_fields, 2935 /* bits */ 4, 2936 /* flags */ 0, 2937 }, 2938 #endif /* chips */ 2939 2940 #if defined(BCM_56770_A0) 2941 { /* SOC_FORMAT_INT_FLEX_EDITOR_MIRROR_PROFILE_PTR_SET_BASE_BCM56770_A0fmt */ 2942 /* format FLEX_EDITOR_MIRROR_PROFILE_PTR_SET_BASEfmt */ 2943 /* nFields */ 1, 2944 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_LOOPBACK_PROFILE_PTR_SET_BASEfmt_fields, 2945 /* bits */ 4, 2946 /* flags */ 0, 2947 }, 2948 #endif /* chips */ 2949 2950 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2951 defined(BCM_56870_A0) 2952 { /* SOC_FORMAT_INT_FLEX_EDITOR_MMU_PKT_LENGTH_ADJUST_FORMATfmt */ 2953 /* format FLEX_EDITOR_MMU_PKT_LENGTH_ADJUST_FORMATfmt */ 2954 /* nFields */ 1, 2955 /* *fields */ soc_FLEX_EDITOR_MMU_PKT_LENGTH_ADJUST_FORMATfmt_fields, 2956 /* bits */ 6, 2957 /* flags */ 0, 2958 }, 2959 #endif /* chips */ 2960 2961 #if defined(BCM_56870_A0) 2962 { /* SOC_FORMAT_INT_FLEX_EDITOR_OBJECT_BUSfmt */ 2963 /* format FLEX_EDITOR_OBJECT_BUSfmt */ 2964 /* nFields */ 113, 2965 /* *fields */ soc_EGRESS_OBJECT_BUSfmt_fields, 2966 /* bits */ 944, 2967 /* flags */ 0, 2968 }, 2969 #endif /* chips */ 2970 2971 #if defined(BCM_56370_A0) 2972 { /* SOC_FORMAT_INT_FLEX_EDITOR_OBJECT_BUS_BCM56370_A0fmt */ 2973 /* format FLEX_EDITOR_OBJECT_BUSfmt */ 2974 /* nFields */ 113, 2975 /* *fields */ soc_FLEX_EDITOR_OBJECT_BUSfmt_fields, 2976 /* bits */ 944, 2977 /* flags */ 0, 2978 }, 2979 #endif /* chips */ 2980 2981 #if defined(BCM_56770_A0) 2982 { /* SOC_FORMAT_INT_FLEX_EDITOR_OBJECT_BUS_BCM56770_A0fmt */ 2983 /* format FLEX_EDITOR_OBJECT_BUSfmt */ 2984 /* nFields */ 113, 2985 /* *fields */ soc_FLEX_EDITOR_OBJECT_BUSfmt_fields, 2986 /* bits */ 944, 2987 /* flags */ 0, 2988 }, 2989 #endif /* chips */ 2990 2991 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 2992 defined(BCM_56870_A0) 2993 { /* SOC_FORMAT_INT_FLEX_EDITOR_OUT_BUSfmt */ 2994 /* format FLEX_EDITOR_OUT_BUSfmt */ 2995 /* nFields */ 70, 2996 /* *fields */ soc_FLEX_EDITOR_OUT_BUSfmt_fields, 2997 /* bits */ 2956, 2998 /* flags */ 0, 2999 }, 3000 #endif /* chips */ 3001 3002 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3003 defined(BCM_56870_A0) 3004 { /* SOC_FORMAT_INT_FLEX_EDITOR_OW_FIELD_SELECT_COMMAND_BASEfmt */ 3005 /* format FLEX_EDITOR_OW_FIELD_SELECT_COMMAND_BASEfmt */ 3006 /* nFields */ 3, 3007 /* *fields */ soc_FLEX_EDITOR_OW_FIELD_SELECT_COMMAND_BASEfmt_fields, 3008 /* bits */ 23, 3009 /* flags */ 0, 3010 }, 3011 #endif /* chips */ 3012 3013 #if defined(BCM_56870_A0) 3014 { /* SOC_FORMAT_INT_FLEX_EDITOR_PKT_LENGTH_SET_BASEfmt */ 3015 /* format FLEX_EDITOR_PKT_LENGTH_SET_BASEfmt */ 3016 /* nFields */ 1, 3017 /* *fields */ soc_FLEX_EDITOR_MHC_CHECKSUM_FLEX_HDR_SUM_SET_BASEfmt_fields, 3018 /* bits */ 16, 3019 /* flags */ 0, 3020 }, 3021 #endif /* chips */ 3022 3023 #if defined(BCM_56370_A0) 3024 { /* SOC_FORMAT_INT_FLEX_EDITOR_PKT_LENGTH_SET_BASE_BCM56370_A0fmt */ 3025 /* format FLEX_EDITOR_PKT_LENGTH_SET_BASEfmt */ 3026 /* nFields */ 1, 3027 /* *fields */ soc_FLEX_EDITOR_MHC_CHECKSUM_FLEX_HDR_SUM_SET_BASEfmt_fields, 3028 /* bits */ 16, 3029 /* flags */ 0, 3030 }, 3031 #endif /* chips */ 3032 3033 #if defined(BCM_56770_A0) 3034 { /* SOC_FORMAT_INT_FLEX_EDITOR_PKT_LENGTH_SET_BASE_BCM56770_A0fmt */ 3035 /* format FLEX_EDITOR_PKT_LENGTH_SET_BASEfmt */ 3036 /* nFields */ 1, 3037 /* *fields */ soc_FLEX_EDITOR_MHC_CHECKSUM_FLEX_HDR_SUM_SET_BASEfmt_fields, 3038 /* bits */ 16, 3039 /* flags */ 0, 3040 }, 3041 #endif /* chips */ 3042 3043 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3044 defined(BCM_56870_A0) 3045 { /* SOC_FORMAT_INT_FLEX_EDITOR_PKT_LEN_ATTRIBUTE_SET_BASEfmt */ 3046 /* format FLEX_EDITOR_PKT_LEN_ATTRIBUTE_SET_BASEfmt */ 3047 /* nFields */ 2, 3048 /* *fields */ soc_FLEX_EDITOR_PKT_LEN_ATTRIBUTE_SET_BASEfmt_fields, 3049 /* bits */ 24, 3050 /* flags */ 0, 3051 }, 3052 #endif /* chips */ 3053 3054 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3055 defined(BCM_56870_A0) 3056 { /* SOC_FORMAT_INT_FLEX_EDITOR_PKT_LEN_COMMAND_BASEfmt */ 3057 /* format FLEX_EDITOR_PKT_LEN_COMMAND_BASEfmt */ 3058 /* nFields */ 5, 3059 /* *fields */ soc_FLEX_EDITOR_PKT_LEN_COMMAND_BASEfmt_fields, 3060 /* bits */ 17, 3061 /* flags */ 0, 3062 }, 3063 #endif /* chips */ 3064 3065 #if defined(BCM_56870_A0) 3066 { /* SOC_FORMAT_INT_FLEX_EDITOR_REWRITE_ALU_COMMAND_BASEfmt */ 3067 /* format FLEX_EDITOR_REWRITE_ALU_COMMAND_BASEfmt */ 3068 /* nFields */ 12, 3069 /* *fields */ soc_FLEX_EDITOR_FLEX_HDR_ALU_COMMAND_BASEfmt_fields, 3070 /* bits */ 62, 3071 /* flags */ 0, 3072 }, 3073 #endif /* chips */ 3074 3075 #if defined(BCM_56370_A0) 3076 { /* SOC_FORMAT_INT_FLEX_EDITOR_REWRITE_ALU_COMMAND_BASE_BCM56370_A0fmt */ 3077 /* format FLEX_EDITOR_REWRITE_ALU_COMMAND_BASEfmt */ 3078 /* nFields */ 12, 3079 /* *fields */ soc_FLEX_EDITOR_FLEX_HDR_ALU_COMMAND_BASEfmt_fields, 3080 /* bits */ 62, 3081 /* flags */ 0, 3082 }, 3083 #endif /* chips */ 3084 3085 #if defined(BCM_56770_A0) 3086 { /* SOC_FORMAT_INT_FLEX_EDITOR_REWRITE_ALU_COMMAND_BASE_BCM56770_A0fmt */ 3087 /* format FLEX_EDITOR_REWRITE_ALU_COMMAND_BASEfmt */ 3088 /* nFields */ 12, 3089 /* *fields */ soc_FLEX_EDITOR_FLEX_HDR_ALU_COMMAND_BASEfmt_fields, 3090 /* bits */ 62, 3091 /* flags */ 0, 3092 }, 3093 #endif /* chips */ 3094 3095 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3096 defined(BCM_56870_A0) 3097 { /* SOC_FORMAT_INT_FLEX_EDITOR_REWRITE_COMMAND_BASEfmt */ 3098 /* format FLEX_EDITOR_REWRITE_COMMAND_BASEfmt */ 3099 /* nFields */ 6, 3100 /* *fields */ soc_FLEX_EDITOR_REWRITE_COMMAND_BASEfmt_fields, 3101 /* bits */ 25, 3102 /* flags */ 0, 3103 }, 3104 #endif /* chips */ 3105 3106 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3107 defined(BCM_56870_A0) 3108 { /* SOC_FORMAT_INT_FLEX_EDITOR_REWRITE_FIELD_SELECT_COMMAND_BASEfmt */ 3109 /* format FLEX_EDITOR_REWRITE_FIELD_SELECT_COMMAND_BASEfmt */ 3110 /* nFields */ 5, 3111 /* *fields */ soc_FLEX_EDITOR_REWRITE_FIELD_SELECT_COMMAND_BASEfmt_fields, 3112 /* bits */ 45, 3113 /* flags */ 0, 3114 }, 3115 #endif /* chips */ 3116 3117 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3118 defined(BCM_56870_A0) 3119 { /* SOC_FORMAT_INT_FLEX_EDITOR_RW_ALU_PROFILE_TABLEfmt */ 3120 /* format FLEX_EDITOR_RW_ALU_PROFILE_TABLEfmt */ 3121 /* nFields */ 28, 3122 /* *fields */ soc_FLEX_EDITOR_RW_ALU_PROFILE_TABLEfmt_fields, 3123 /* bits */ 133, 3124 /* flags */ 0, 3125 }, 3126 #endif /* chips */ 3127 3128 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3129 defined(BCM_56870_A0) 3130 { /* SOC_FORMAT_INT_FLEX_EDITOR_RW_FIELD_BUSfmt */ 3131 /* format FLEX_EDITOR_RW_FIELD_BUSfmt */ 3132 /* nFields */ 12, 3133 /* *fields */ soc_FLEX_EDITOR_RW_FIELD_BUSfmt_fields, 3134 /* bits */ 384, 3135 /* flags */ 0, 3136 }, 3137 #endif /* chips */ 3138 3139 #if defined(BCM_56870_A0) 3140 { /* SOC_FORMAT_INT_FLEX_EDITOR_RW_FS_PROFILE_TABLEfmt */ 3141 /* format FLEX_EDITOR_RW_FS_PROFILE_TABLEfmt */ 3142 /* nFields */ 70, 3143 /* *fields */ soc_FLEX_EDITOR_FLEX_HDR_32BIT_FS_PROFILE_TABLEfmt_fields, 3144 /* bits */ 312, 3145 /* flags */ 0, 3146 }, 3147 #endif /* chips */ 3148 3149 #if defined(BCM_56370_A0) 3150 { /* SOC_FORMAT_INT_FLEX_EDITOR_RW_FS_PROFILE_TABLE_BCM56370_A0fmt */ 3151 /* format FLEX_EDITOR_RW_FS_PROFILE_TABLEfmt */ 3152 /* nFields */ 70, 3153 /* *fields */ soc_FLEX_EDITOR_FLEX_HDR_32BIT_FS_PROFILE_TABLEfmt_fields, 3154 /* bits */ 312, 3155 /* flags */ 0, 3156 }, 3157 #endif /* chips */ 3158 3159 #if defined(BCM_56770_A0) 3160 { /* SOC_FORMAT_INT_FLEX_EDITOR_RW_FS_PROFILE_TABLE_BCM56770_A0fmt */ 3161 /* format FLEX_EDITOR_RW_FS_PROFILE_TABLEfmt */ 3162 /* nFields */ 70, 3163 /* *fields */ soc_FLEX_EDITOR_FLEX_HDR_32BIT_FS_PROFILE_TABLEfmt_fields, 3164 /* bits */ 312, 3165 /* flags */ 0, 3166 }, 3167 #endif /* chips */ 3168 3169 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3170 defined(BCM_56870_A0) 3171 { /* SOC_FORMAT_INT_FLEX_EDITOR_RW_HC_PROFILE_TABLEfmt */ 3172 /* format FLEX_EDITOR_RW_HC_PROFILE_TABLEfmt */ 3173 /* nFields */ 37, 3174 /* *fields */ soc_FLEX_EDITOR_RW_HC_PROFILE_TABLEfmt_fields, 3175 /* bits */ 288, 3176 /* flags */ 0, 3177 }, 3178 #endif /* chips */ 3179 3180 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3181 defined(BCM_56870_A0) 3182 { /* SOC_FORMAT_INT_FLEX_EDITOR_RW_HEADER_SET_BASEfmt */ 3183 /* format FLEX_EDITOR_RW_HEADER_SET_BASEfmt */ 3184 /* nFields */ 1, 3185 /* *fields */ soc_FLEX_EDITOR_RW_HEADER_SET_BASEfmt_fields, 3186 /* bits */ 512, 3187 /* flags */ 0, 3188 }, 3189 #endif /* chips */ 3190 3191 #if defined(BCM_56870_A0) 3192 { /* SOC_FORMAT_INT_FLEX_EDITOR_RW_NEXT_PROTO_ID_SET_BASEfmt */ 3193 /* format FLEX_EDITOR_RW_NEXT_PROTO_ID_SET_BASEfmt */ 3194 /* nFields */ 1, 3195 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_NEXT_PROTO_ID_SET_BASEfmt_fields, 3196 /* bits */ 5, 3197 /* flags */ 0, 3198 }, 3199 #endif /* chips */ 3200 3201 #if defined(BCM_56370_A0) 3202 { /* SOC_FORMAT_INT_FLEX_EDITOR_RW_NEXT_PROTO_ID_SET_BASE_BCM56370_A0fmt */ 3203 /* format FLEX_EDITOR_RW_NEXT_PROTO_ID_SET_BASEfmt */ 3204 /* nFields */ 1, 3205 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_NEXT_PROTO_ID_SET_BASEfmt_fields, 3206 /* bits */ 5, 3207 /* flags */ 0, 3208 }, 3209 #endif /* chips */ 3210 3211 #if defined(BCM_56770_A0) 3212 { /* SOC_FORMAT_INT_FLEX_EDITOR_RW_NEXT_PROTO_ID_SET_BASE_BCM56770_A0fmt */ 3213 /* format FLEX_EDITOR_RW_NEXT_PROTO_ID_SET_BASEfmt */ 3214 /* nFields */ 1, 3215 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_NEXT_PROTO_ID_SET_BASEfmt_fields, 3216 /* bits */ 5, 3217 /* flags */ 0, 3218 }, 3219 #endif /* chips */ 3220 3221 #if defined(BCM_56870_A0) 3222 { /* SOC_FORMAT_INT_FLEX_EDITOR_RW_NEXT_PROTO_TABLEfmt */ 3223 /* format FLEX_EDITOR_RW_NEXT_PROTO_TABLEfmt */ 3224 /* nFields */ 1, 3225 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_NEXT_PROTO_TABLEfmt_fields, 3226 /* bits */ 16, 3227 /* flags */ 0, 3228 }, 3229 #endif /* chips */ 3230 3231 #if defined(BCM_56370_A0) 3232 { /* SOC_FORMAT_INT_FLEX_EDITOR_RW_NEXT_PROTO_TABLE_BCM56370_A0fmt */ 3233 /* format FLEX_EDITOR_RW_NEXT_PROTO_TABLEfmt */ 3234 /* nFields */ 1, 3235 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_NEXT_PROTO_TABLEfmt_fields, 3236 /* bits */ 16, 3237 /* flags */ 0, 3238 }, 3239 #endif /* chips */ 3240 3241 #if defined(BCM_56770_A0) 3242 { /* SOC_FORMAT_INT_FLEX_EDITOR_RW_NEXT_PROTO_TABLE_BCM56770_A0fmt */ 3243 /* format FLEX_EDITOR_RW_NEXT_PROTO_TABLEfmt */ 3244 /* nFields */ 1, 3245 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_NEXT_PROTO_TABLEfmt_fields, 3246 /* bits */ 16, 3247 /* flags */ 0, 3248 }, 3249 #endif /* chips */ 3250 3251 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3252 defined(BCM_56870_A0) 3253 { /* SOC_FORMAT_INT_FLEX_EDITOR_RW_PROFILE_PTR_SET_BASEfmt */ 3254 /* format FLEX_EDITOR_RW_PROFILE_PTR_SET_BASEfmt */ 3255 /* nFields */ 1, 3256 /* *fields */ soc_FLEX_EDITOR_RW_PROFILE_PTR_SET_BASEfmt_fields, 3257 /* bits */ 7, 3258 /* flags */ 0, 3259 }, 3260 #endif /* chips */ 3261 3262 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3263 defined(BCM_56870_A0) 3264 { /* SOC_FORMAT_INT_FLEX_EDITOR_RW_PROFILE_TABLEfmt */ 3265 /* format FLEX_EDITOR_RW_PROFILE_TABLEfmt */ 3266 /* nFields */ 6, 3267 /* *fields */ soc_FLEX_EDITOR_RW_PROFILE_TABLEfmt_fields, 3268 /* bits */ 27, 3269 /* flags */ 0, 3270 }, 3271 #endif /* chips */ 3272 3273 #if defined(BCM_56870_A0) 3274 { /* SOC_FORMAT_INT_FLEX_EDITOR_RW_USER_FIELD_FORMATfmt */ 3275 /* format FLEX_EDITOR_RW_USER_FIELD_FORMATfmt */ 3276 /* nFields */ 1, 3277 /* *fields */ soc_FLEX_EDITOR_FLEX_HDR_USER_FIELD_FORMATfmt_fields, 3278 /* bits */ 32, 3279 /* flags */ 0, 3280 }, 3281 #endif /* chips */ 3282 3283 #if defined(BCM_56370_A0) 3284 { /* SOC_FORMAT_INT_FLEX_EDITOR_RW_USER_FIELD_FORMAT_BCM56370_A0fmt */ 3285 /* format FLEX_EDITOR_RW_USER_FIELD_FORMATfmt */ 3286 /* nFields */ 1, 3287 /* *fields */ soc_FLEX_EDITOR_FLEX_HDR_USER_FIELD_FORMATfmt_fields, 3288 /* bits */ 32, 3289 /* flags */ 0, 3290 }, 3291 #endif /* chips */ 3292 3293 #if defined(BCM_56770_A0) 3294 { /* SOC_FORMAT_INT_FLEX_EDITOR_RW_USER_FIELD_FORMAT_BCM56770_A0fmt */ 3295 /* format FLEX_EDITOR_RW_USER_FIELD_FORMATfmt */ 3296 /* nFields */ 1, 3297 /* *fields */ soc_FLEX_EDITOR_FLEX_HDR_USER_FIELD_FORMATfmt_fields, 3298 /* bits */ 32, 3299 /* flags */ 0, 3300 }, 3301 #endif /* chips */ 3302 3303 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3304 defined(BCM_56870_A0) 3305 { /* SOC_FORMAT_INT_FLEX_EDITOR_SYS_FIELD_BUSfmt */ 3306 /* format FLEX_EDITOR_SYS_FIELD_BUSfmt */ 3307 /* nFields */ 42, 3308 /* *fields */ soc_FLEX_EDITOR_SYS_FIELD_BUSfmt_fields, 3309 /* bits */ 279, 3310 /* flags */ 0, 3311 }, 3312 #endif /* chips */ 3313 3314 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3315 defined(BCM_56870_A0) 3316 { /* SOC_FORMAT_INT_FLEX_EDITOR_TIMESTAMP_SET_BASEfmt */ 3317 /* format FLEX_EDITOR_TIMESTAMP_SET_BASEfmt */ 3318 /* nFields */ 3, 3319 /* *fields */ soc_FLEX_EDITOR_TIMESTAMP_SET_BASEfmt_fields, 3320 /* bits */ 134, 3321 /* flags */ 0, 3322 }, 3323 #endif /* chips */ 3324 3325 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3326 defined(BCM_56870_A0) 3327 { /* SOC_FORMAT_INT_FLEX_EDITOR_TUNNEL_FIELD_BUSfmt */ 3328 /* format FLEX_EDITOR_TUNNEL_FIELD_BUSfmt */ 3329 /* nFields */ 10, 3330 /* *fields */ soc_FLEX_EDITOR_TUNNEL_FIELD_BUSfmt_fields, 3331 /* bits */ 212, 3332 /* flags */ 0, 3333 }, 3334 #endif /* chips */ 3335 3336 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3337 defined(BCM_56870_A0) 3338 { /* SOC_FORMAT_INT_FLEX_EDITOR_TUNNEL_PIMDR1_CFG0_FORMATfmt */ 3339 /* format FLEX_EDITOR_TUNNEL_PIMDR1_CFG0_FORMATfmt */ 3340 /* nFields */ 1, 3341 /* *fields */ soc_FLEX_EDITOR_TUNNEL_PIMDR1_CFG0_FORMATfmt_fields, 3342 /* bits */ 32, 3343 /* flags */ 0, 3344 }, 3345 #endif /* chips */ 3346 3347 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3348 defined(BCM_56870_A0) 3349 { /* SOC_FORMAT_INT_FLEX_EDITOR_TUNNEL_PIMDR1_CFG1_FORMATfmt */ 3350 /* format FLEX_EDITOR_TUNNEL_PIMDR1_CFG1_FORMATfmt */ 3351 /* nFields */ 1, 3352 /* *fields */ soc_FLEX_EDITOR_TUNNEL_PIMDR1_CFG1_FORMATfmt_fields, 3353 /* bits */ 32, 3354 /* flags */ 0, 3355 }, 3356 #endif /* chips */ 3357 3358 #if defined(BCM_56870_A0) 3359 { /* SOC_FORMAT_INT_FLEX_EDITOR_TUNNEL_PIMDR2_CFG0_FORMATfmt */ 3360 /* format FLEX_EDITOR_TUNNEL_PIMDR2_CFG0_FORMATfmt */ 3361 /* nFields */ 1, 3362 /* *fields */ soc_FLEX_EDITOR_TUNNEL_PIMDR1_CFG0_FORMATfmt_fields, 3363 /* bits */ 32, 3364 /* flags */ 0, 3365 }, 3366 #endif /* chips */ 3367 3368 #if defined(BCM_56370_A0) 3369 { /* SOC_FORMAT_INT_FLEX_EDITOR_TUNNEL_PIMDR2_CFG0_FORMAT_BCM56370_A0fmt */ 3370 /* format FLEX_EDITOR_TUNNEL_PIMDR2_CFG0_FORMATfmt */ 3371 /* nFields */ 1, 3372 /* *fields */ soc_FLEX_EDITOR_TUNNEL_PIMDR1_CFG0_FORMATfmt_fields, 3373 /* bits */ 32, 3374 /* flags */ 0, 3375 }, 3376 #endif /* chips */ 3377 3378 #if defined(BCM_56770_A0) 3379 { /* SOC_FORMAT_INT_FLEX_EDITOR_TUNNEL_PIMDR2_CFG0_FORMAT_BCM56770_A0fmt */ 3380 /* format FLEX_EDITOR_TUNNEL_PIMDR2_CFG0_FORMATfmt */ 3381 /* nFields */ 1, 3382 /* *fields */ soc_FLEX_EDITOR_TUNNEL_PIMDR1_CFG0_FORMATfmt_fields, 3383 /* bits */ 32, 3384 /* flags */ 0, 3385 }, 3386 #endif /* chips */ 3387 3388 #if defined(BCM_56870_A0) 3389 { /* SOC_FORMAT_INT_FLEX_EDITOR_TUNNEL_PIMDR2_CFG1_FORMATfmt */ 3390 /* format FLEX_EDITOR_TUNNEL_PIMDR2_CFG1_FORMATfmt */ 3391 /* nFields */ 1, 3392 /* *fields */ soc_FLEX_EDITOR_TUNNEL_PIMDR1_CFG1_FORMATfmt_fields, 3393 /* bits */ 32, 3394 /* flags */ 0, 3395 }, 3396 #endif /* chips */ 3397 3398 #if defined(BCM_56370_A0) 3399 { /* SOC_FORMAT_INT_FLEX_EDITOR_TUNNEL_PIMDR2_CFG1_FORMAT_BCM56370_A0fmt */ 3400 /* format FLEX_EDITOR_TUNNEL_PIMDR2_CFG1_FORMATfmt */ 3401 /* nFields */ 1, 3402 /* *fields */ soc_FLEX_EDITOR_TUNNEL_PIMDR1_CFG1_FORMATfmt_fields, 3403 /* bits */ 32, 3404 /* flags */ 0, 3405 }, 3406 #endif /* chips */ 3407 3408 #if defined(BCM_56770_A0) 3409 { /* SOC_FORMAT_INT_FLEX_EDITOR_TUNNEL_PIMDR2_CFG1_FORMAT_BCM56770_A0fmt */ 3410 /* format FLEX_EDITOR_TUNNEL_PIMDR2_CFG1_FORMATfmt */ 3411 /* nFields */ 1, 3412 /* *fields */ soc_FLEX_EDITOR_TUNNEL_PIMDR1_CFG1_FORMATfmt_fields, 3413 /* bits */ 32, 3414 /* flags */ 0, 3415 }, 3416 #endif /* chips */ 3417 3418 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3419 defined(BCM_56870_A0) 3420 { /* SOC_FORMAT_INT_FLEX_EDITOR_USER_FIELD_32BIT_COMMAND_BASEfmt */ 3421 /* format FLEX_EDITOR_USER_FIELD_32BIT_COMMAND_BASEfmt */ 3422 /* nFields */ 2, 3423 /* *fields */ soc_FLEX_EDITOR_USER_FIELD_32BIT_COMMAND_BASEfmt_fields, 3424 /* bits */ 11, 3425 /* flags */ 0, 3426 }, 3427 #endif /* chips */ 3428 3429 #if defined(BCM_56870_A0) 3430 { /* SOC_FORMAT_INT_FLEX_EDITOR_VHLEN_SET_BASEfmt */ 3431 /* format FLEX_EDITOR_VHLEN_SET_BASEfmt */ 3432 /* nFields */ 1, 3433 /* *fields */ soc_FLEX_EDITOR_RW_PROFILE_PTR_SET_BASEfmt_fields, 3434 /* bits */ 7, 3435 /* flags */ 0, 3436 }, 3437 #endif /* chips */ 3438 3439 #if defined(BCM_56370_A0) 3440 { /* SOC_FORMAT_INT_FLEX_EDITOR_VHLEN_SET_BASE_BCM56370_A0fmt */ 3441 /* format FLEX_EDITOR_VHLEN_SET_BASEfmt */ 3442 /* nFields */ 1, 3443 /* *fields */ soc_FLEX_EDITOR_RW_PROFILE_PTR_SET_BASEfmt_fields, 3444 /* bits */ 7, 3445 /* flags */ 0, 3446 }, 3447 #endif /* chips */ 3448 3449 #if defined(BCM_56770_A0) 3450 { /* SOC_FORMAT_INT_FLEX_EDITOR_VHLEN_SET_BASE_BCM56770_A0fmt */ 3451 /* format FLEX_EDITOR_VHLEN_SET_BASEfmt */ 3452 /* nFields */ 1, 3453 /* *fields */ soc_FLEX_EDITOR_RW_PROFILE_PTR_SET_BASEfmt_fields, 3454 /* bits */ 7, 3455 /* flags */ 0, 3456 }, 3457 #endif /* chips */ 3458 3459 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3460 defined(BCM_56870_A0) 3461 { /* SOC_FORMAT_INT_FLEX_EDITOR_VXLAN_CONTROL_64_FORMATfmt */ 3462 /* format FLEX_EDITOR_VXLAN_CONTROL_64_FORMATfmt */ 3463 /* nFields */ 3, 3464 /* *fields */ soc_FLEX_EDITOR_VXLAN_CONTROL_64_FORMATfmt_fields, 3465 /* bits */ 40, 3466 /* flags */ 0, 3467 }, 3468 #endif /* chips */ 3469 3470 #if defined(BCM_56870_A0) 3471 { /* SOC_FORMAT_INT_FLEX_EDITOR_ZONE_SIZE_SET_BASEfmt */ 3472 /* format FLEX_EDITOR_ZONE_SIZE_SET_BASEfmt */ 3473 /* nFields */ 1, 3474 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_TUNNEL_PROFILE_PTR_SET_BASEfmt_fields, 3475 /* bits */ 8, 3476 /* flags */ 0, 3477 }, 3478 #endif /* chips */ 3479 3480 #if defined(BCM_56370_A0) 3481 { /* SOC_FORMAT_INT_FLEX_EDITOR_ZONE_SIZE_SET_BASE_BCM56370_A0fmt */ 3482 /* format FLEX_EDITOR_ZONE_SIZE_SET_BASEfmt */ 3483 /* nFields */ 1, 3484 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_TUNNEL_PROFILE_PTR_SET_BASEfmt_fields, 3485 /* bits */ 8, 3486 /* flags */ 0, 3487 }, 3488 #endif /* chips */ 3489 3490 #if defined(BCM_56770_A0) 3491 { /* SOC_FORMAT_INT_FLEX_EDITOR_ZONE_SIZE_SET_BASE_BCM56770_A0fmt */ 3492 /* format FLEX_EDITOR_ZONE_SIZE_SET_BASEfmt */ 3493 /* nFields */ 1, 3494 /* *fields */ soc_FLEX_EDITOR_FIXED_HDR_TUNNEL_PROFILE_PTR_SET_BASEfmt_fields, 3495 /* bits */ 8, 3496 /* flags */ 0, 3497 }, 3498 #endif /* chips */ 3499 3500 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3501 defined(BCM_56870_A0) 3502 { /* SOC_FORMAT_INT_FLEX_HVE_TRIGGERS_FORMATfmt */ 3503 /* format FLEX_HVE_TRIGGERS_FORMATfmt */ 3504 /* nFields */ 22, 3505 /* *fields */ soc_FLEX_HVE_TRIGGERS_FORMATfmt_fields, 3506 /* bits */ 33, 3507 /* flags */ 0, 3508 }, 3509 #endif /* chips */ 3510 3511 #if defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 3512 defined(BCM_56450_B1) 3513 { /* SOC_FORMAT_INT_FLEX_IFP_KEY_SIGNALSfmt */ 3514 /* format FLEX_IFP_KEY_SIGNALSfmt */ 3515 /* nFields */ 130, 3516 /* *fields */ soc_FLEX_IFP_KEY_SIGNALSfmt_fields, 3517 /* bits */ 1048, 3518 /* flags */ 0, 3519 }, 3520 #endif /* chips */ 3521 3522 #if defined(BCM_56260_A0) 3523 { /* SOC_FORMAT_INT_FLEX_IFP_KEY_SIGNALS_BCM56260_A0fmt */ 3524 /* format FLEX_IFP_KEY_SIGNALSfmt */ 3525 /* nFields */ 130, 3526 /* *fields */ soc_FLEX_IFP_KEY_SIGNALS_BCM56260_A0fmt_fields, 3527 /* bits */ 1048, 3528 /* flags */ 0, 3529 }, 3530 #endif /* chips */ 3531 3532 #if defined(BCM_56260_B0) 3533 { /* SOC_FORMAT_INT_FLEX_IFP_KEY_SIGNALS_BCM56260_B0fmt */ 3534 /* format FLEX_IFP_KEY_SIGNALSfmt */ 3535 /* nFields */ 130, 3536 /* *fields */ soc_FLEX_IFP_KEY_SIGNALS_BCM56260_A0fmt_fields, 3537 /* bits */ 1048, 3538 /* flags */ 0, 3539 }, 3540 #endif /* chips */ 3541 3542 #if defined(BCM_56270_A0) 3543 { /* SOC_FORMAT_INT_FLEX_IFP_KEY_SIGNALS_BCM56270_A0fmt */ 3544 /* format FLEX_IFP_KEY_SIGNALSfmt */ 3545 /* nFields */ 130, 3546 /* *fields */ soc_FLEX_IFP_KEY_SIGNALS_BCM56260_A0fmt_fields, 3547 /* bits */ 1048, 3548 /* flags */ 0, 3549 }, 3550 #endif /* chips */ 3551 3552 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3553 defined(BCM_56870_A0) 3554 { /* SOC_FORMAT_INT_FLEX_KEY_CAM_BIST_CONFIG_64fmt */ 3555 /* format FLEX_KEY_CAM_BIST_CONFIG_64fmt */ 3556 /* nFields */ 6, 3557 /* *fields */ soc_FLEX_KEY_CAM_BIST_CONFIG_64fmt_fields, 3558 /* bits */ 37, 3559 /* flags */ 0, 3560 }, 3561 #endif /* chips */ 3562 3563 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3564 defined(BCM_56870_A0) 3565 { /* SOC_FORMAT_INT_FLEX_KEY_CAM_BIST_STATUSfmt */ 3566 /* format FLEX_KEY_CAM_BIST_STATUSfmt */ 3567 /* nFields */ 1, 3568 /* *fields */ soc_FLEX_KEY_CAM_BIST_STATUSfmt_fields, 3569 /* bits */ 32, 3570 /* flags */ 0, 3571 }, 3572 #endif /* chips */ 3573 3574 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3575 defined(BCM_56870_A0) 3576 { /* SOC_FORMAT_INT_FLEX_KEY_GEN_EXTRACT_COMMAND_BASEfmt */ 3577 /* format FLEX_KEY_GEN_EXTRACT_COMMAND_BASEfmt */ 3578 /* nFields */ 3, 3579 /* *fields */ soc_FLEX_KEY_GEN_EXTRACT_COMMAND_BASEfmt_fields, 3580 /* bits */ 11, 3581 /* flags */ 0, 3582 }, 3583 #endif /* chips */ 3584 3585 #if defined(BCM_56370_A0) 3586 { /* SOC_FORMAT_INT_FLEX_KEY_GEN_EXTRACT_COMMAND_TYPE_A_BASEfmt */ 3587 /* format FLEX_KEY_GEN_EXTRACT_COMMAND_TYPE_A_BASEfmt */ 3588 /* nFields */ 3, 3589 /* *fields */ soc_FLEX_KEY_GEN_EXTRACT_COMMAND_TYPE_A_BASEfmt_fields, 3590 /* bits */ 12, 3591 /* flags */ 0, 3592 }, 3593 #endif /* chips */ 3594 3595 #if defined(BCM_56370_A0) 3596 { /* SOC_FORMAT_INT_FLEX_KEY_GEN_EXTRACT_COMMAND_TYPE_B_BASEfmt */ 3597 /* format FLEX_KEY_GEN_EXTRACT_COMMAND_TYPE_B_BASEfmt */ 3598 /* nFields */ 1, 3599 /* *fields */ soc_FLEX_KEY_GEN_EXTRACT_COMMAND_TYPE_B_BASEfmt_fields, 3600 /* bits */ 8, 3601 /* flags */ 0, 3602 }, 3603 #endif /* chips */ 3604 3605 #if defined(BCM_56370_A0) 3606 { /* SOC_FORMAT_INT_FLEX_KEY_GEN_EXTRACT_COMMAND_TYPE_C_BASEfmt */ 3607 /* format FLEX_KEY_GEN_EXTRACT_COMMAND_TYPE_C_BASEfmt */ 3608 /* nFields */ 1, 3609 /* *fields */ soc_FLEX_KEY_GEN_EXTRACT_COMMAND_TYPE_C_BASEfmt_fields, 3610 /* bits */ 7, 3611 /* flags */ 0, 3612 }, 3613 #endif /* chips */ 3614 3615 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3616 defined(BCM_56870_A0) 3617 { /* SOC_FORMAT_INT_FLEX_KEY_GEN_MUX_CTRLfmt */ 3618 /* format FLEX_KEY_GEN_MUX_CTRLfmt */ 3619 /* nFields */ 34, 3620 /* *fields */ soc_FLEX_KEY_GEN_MUX_CTRLfmt_fields, 3621 /* bits */ 118, 3622 /* flags */ 0, 3623 }, 3624 #endif /* chips */ 3625 3626 #if defined(BCM_56370_A0) 3627 { /* SOC_FORMAT_INT_FLEX_KEY_GEN_MUX_CTRL_PLUS_MASK_TYPE_Bfmt */ 3628 /* format FLEX_KEY_GEN_MUX_CTRL_PLUS_MASK_TYPE_Bfmt */ 3629 /* nFields */ 21, 3630 /* *fields */ soc_FLEX_KEY_GEN_MUX_CTRL_PLUS_MASK_TYPE_Bfmt_fields, 3631 /* bits */ 80, 3632 /* flags */ 0, 3633 }, 3634 #endif /* chips */ 3635 3636 #if defined(BCM_56370_A0) 3637 { /* SOC_FORMAT_INT_FLEX_KEY_GEN_MUX_CTRL_PLUS_MASK_TYPE_Cfmt */ 3638 /* format FLEX_KEY_GEN_MUX_CTRL_PLUS_MASK_TYPE_Cfmt */ 3639 /* nFields */ 22, 3640 /* *fields */ soc_FLEX_KEY_GEN_MUX_CTRL_PLUS_MASK_TYPE_Cfmt_fields, 3641 /* bits */ 140, 3642 /* flags */ 0, 3643 }, 3644 #endif /* chips */ 3645 3646 #if defined(BCM_56370_A0) 3647 { /* SOC_FORMAT_INT_FLEX_KEY_GEN_MUX_CTRL_TYPE_Afmt */ 3648 /* format FLEX_KEY_GEN_MUX_CTRL_TYPE_Afmt */ 3649 /* nFields */ 34, 3650 /* *fields */ soc_FLEX_KEY_GEN_MUX_CTRL_TYPE_Afmt_fields, 3651 /* bits */ 128, 3652 /* flags */ 0, 3653 }, 3654 #endif /* chips */ 3655 3656 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3657 defined(BCM_56870_A0) 3658 { /* SOC_FORMAT_INT_FLEX_KEY_LOOKUP_CONTROL_SRAMfmt */ 3659 /* format FLEX_KEY_LOOKUP_CONTROL_SRAMfmt */ 3660 /* nFields */ 4, 3661 /* *fields */ soc_FLEX_KEY_LOOKUP_CONTROL_SRAMfmt_fields, 3662 /* bits */ 118, 3663 /* flags */ 0, 3664 }, 3665 #endif /* chips */ 3666 3667 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3668 defined(BCM_56870_A0) 3669 { /* SOC_FORMAT_INT_FLEX_KEY_MASKfmt */ 3670 /* format FLEX_KEY_MASKfmt */ 3671 /* nFields */ 4, 3672 /* *fields */ soc_FLEX_KEY_MASKfmt_fields, 3673 /* bits */ 137, 3674 /* flags */ 0, 3675 }, 3676 #endif /* chips */ 3677 3678 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3679 defined(BCM_56870_A0) 3680 { /* SOC_FORMAT_INT_FLEX_KEY_SER_CONTROLfmt */ 3681 /* format FLEX_KEY_SER_CONTROLfmt */ 3682 /* nFields */ 13, 3683 /* *fields */ soc_FLEX_KEY_SER_CONTROLfmt_fields, 3684 /* bits */ 32, 3685 /* flags */ 0, 3686 }, 3687 #endif /* chips */ 3688 3689 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3690 defined(BCM_56870_A0) 3691 { /* SOC_FORMAT_INT_FLEX_KEY_TCAMfmt */ 3692 /* format FLEX_KEY_TCAMfmt */ 3693 /* nFields */ 5, 3694 /* *fields */ soc_FLEX_KEY_TCAMfmt_fields, 3695 /* bits */ 298, 3696 /* flags */ 0, 3697 }, 3698 #endif /* chips */ 3699 3700 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3701 defined(BCM_56870_A0) 3702 { /* SOC_FORMAT_INT_FLEX_KEY_TCAM1fmt */ 3703 /* format FLEX_KEY_TCAM1fmt */ 3704 /* nFields */ 5, 3705 /* *fields */ soc_FLEX_KEY_TCAM1fmt_fields, 3706 /* bits */ 250, 3707 /* flags */ 0, 3708 }, 3709 #endif /* chips */ 3710 3711 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3712 defined(BCM_56870_A0) 3713 { /* SOC_FORMAT_INT_FLEX_KEY_TM_CONTROL_64fmt */ 3714 /* format FLEX_KEY_TM_CONTROL_64fmt */ 3715 /* nFields */ 5, 3716 /* *fields */ soc_FLEX_KEY_TM_CONTROL_64fmt_fields, 3717 /* bits */ 64, 3718 /* flags */ 0, 3719 }, 3720 #endif /* chips */ 3721 3722 #if defined(BCM_56370_A0) 3723 { /* SOC_FORMAT_INT_FLEX_KEY_TM_CONTROL_TYPE_Bfmt */ 3724 /* format FLEX_KEY_TM_CONTROL_TYPE_Bfmt */ 3725 /* nFields */ 4, 3726 /* *fields */ soc_FLEX_KEY_TM_CONTROL_TYPE_Bfmt_fields, 3727 /* bits */ 64, 3728 /* flags */ 0, 3729 }, 3730 #endif /* chips */ 3731 3732 #if defined(BCM_56670_A0) || defined(BCM_56670_B0) 3733 { /* SOC_FORMAT_INT_FLEX_PREEMPTfmt */ 3734 /* format FLEX_PREEMPTfmt */ 3735 /* nFields */ 4, 3736 /* *fields */ soc_FLEX_PREEMPTfmt_fields, 3737 /* bits */ 4, 3738 /* flags */ 0, 3739 }, 3740 #endif /* chips */ 3741 3742 #if defined(BCM_56670_A0) || defined(BCM_56670_B0) 3743 { /* SOC_FORMAT_INT_FLEX_PREEMPT_STARTfmt */ 3744 /* format FLEX_PREEMPT_STARTfmt */ 3745 /* nFields */ 3, 3746 /* *fields */ soc_FLEX_PREEMPT_STARTfmt_fields, 3747 /* bits */ 3, 3748 /* flags */ 0, 3749 }, 3750 #endif /* chips */ 3751 3752 #if defined(BCM_56670_A0) || defined(BCM_56670_B0) 3753 { /* SOC_FORMAT_INT_FLEX_PREEMPT_TERMINATEfmt */ 3754 /* format FLEX_PREEMPT_TERMINATEfmt */ 3755 /* nFields */ 4, 3756 /* *fields */ soc_FLEX_PREEMPT_TERMINATEfmt_fields, 3757 /* bits */ 4, 3758 /* flags */ 0, 3759 }, 3760 #endif /* chips */ 3761 3762 #if defined(BCM_56770_A0) || defined(BCM_56870_A0) 3763 { /* SOC_FORMAT_INT_FLEX_RTAG7_HASH_OBJECT_BUS_FORMATfmt */ 3764 /* format FLEX_RTAG7_HASH_OBJECT_BUS_FORMATfmt */ 3765 /* nFields */ 26, 3766 /* *fields */ soc_FLEX_RTAG7_HASH_OBJECT_BUS_FORMATfmt_fields, 3767 /* bits */ 540, 3768 /* flags */ 0, 3769 }, 3770 #endif /* chips */ 3771 3772 #if defined(BCM_56370_A0) 3773 { /* SOC_FORMAT_INT_FLEX_RTAG7_HASH_OBJECT_BUS_FORMAT_BCM56370_A0fmt */ 3774 /* format FLEX_RTAG7_HASH_OBJECT_BUS_FORMATfmt */ 3775 /* nFields */ 27, 3776 /* *fields */ soc_FLEX_RTAG7_HASH_OBJECT_BUS_FORMAT_BCM56370_A0fmt_fields, 3777 /* bits */ 540, 3778 /* flags */ 0, 3779 }, 3780 #endif /* chips */ 3781 3782 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3783 defined(BCM_56870_A0) || defined(BCM_56970_A0) || \ 3784 defined(BCM_56980_A0) || defined(BCM_56980_B0) 3785 { /* SOC_FORMAT_INT_FLOWSET_COV_DEFSfmt */ 3786 /* format FLOWSET_COV_DEFSfmt */ 3787 /* nFields */ 6, 3788 /* *fields */ soc_FLOWSET_COV_DEFSfmt_fields, 3789 /* bits */ 22, 3790 /* flags */ 0, 3791 }, 3792 #endif /* chips */ 3793 3794 #if defined(BCM_56970_A0) 3795 { /* SOC_FORMAT_INT_FLOWSET_MEMBER_COV_DEFSfmt */ 3796 /* format FLOWSET_MEMBER_COV_DEFSfmt */ 3797 /* nFields */ 6, 3798 /* *fields */ soc_FLOWSET_COV_DEFSfmt_fields, 3799 /* bits */ 22, 3800 /* flags */ 0, 3801 }, 3802 #endif /* chips */ 3803 3804 #if defined(BCM_56370_A0) 3805 { /* SOC_FORMAT_INT_FLOWSET_MEMBER_COV_DEFS_BCM56370_A0fmt */ 3806 /* format FLOWSET_MEMBER_COV_DEFSfmt */ 3807 /* nFields */ 6, 3808 /* *fields */ soc_FLOWSET_COV_DEFSfmt_fields, 3809 /* bits */ 22, 3810 /* flags */ 0, 3811 }, 3812 #endif /* chips */ 3813 3814 #if defined(BCM_56770_A0) 3815 { /* SOC_FORMAT_INT_FLOWSET_MEMBER_COV_DEFS_BCM56770_A0fmt */ 3816 /* format FLOWSET_MEMBER_COV_DEFSfmt */ 3817 /* nFields */ 6, 3818 /* *fields */ soc_FLOWSET_COV_DEFSfmt_fields, 3819 /* bits */ 22, 3820 /* flags */ 0, 3821 }, 3822 #endif /* chips */ 3823 3824 #if defined(BCM_56870_A0) 3825 { /* SOC_FORMAT_INT_FLOWSET_MEMBER_COV_DEFS_BCM56870_A0fmt */ 3826 /* format FLOWSET_MEMBER_COV_DEFSfmt */ 3827 /* nFields */ 6, 3828 /* *fields */ soc_FLOWSET_COV_DEFSfmt_fields, 3829 /* bits */ 22, 3830 /* flags */ 0, 3831 }, 3832 #endif /* chips */ 3833 3834 #if defined(BCM_56980_A0) 3835 { /* SOC_FORMAT_INT_FLOWSET_MEMBER_COV_DEFS_BCM56980_A0fmt */ 3836 /* format FLOWSET_MEMBER_COV_DEFSfmt */ 3837 /* nFields */ 6, 3838 /* *fields */ soc_FLOWSET_COV_DEFSfmt_fields, 3839 /* bits */ 22, 3840 /* flags */ 0, 3841 }, 3842 #endif /* chips */ 3843 3844 #if defined(BCM_56980_B0) 3845 { /* SOC_FORMAT_INT_FLOWSET_MEMBER_COV_DEFS_BCM56980_B0fmt */ 3846 /* format FLOWSET_MEMBER_COV_DEFSfmt */ 3847 /* nFields */ 6, 3848 /* *fields */ soc_FLOWSET_COV_DEFSfmt_fields, 3849 /* bits */ 22, 3850 /* flags */ 0, 3851 }, 3852 #endif /* chips */ 3853 3854 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 3855 defined(BCM_56870_A0) || defined(BCM_56970_A0) || \ 3856 defined(BCM_56980_A0) || defined(BCM_56980_B0) 3857 { /* SOC_FORMAT_INT_FLOWSET_TIMESTAMP_PAGE_COV_DEFSfmt */ 3858 /* format FLOWSET_TIMESTAMP_PAGE_COV_DEFSfmt */ 3859 /* nFields */ 7, 3860 /* *fields */ soc_FLOWSET_TIMESTAMP_PAGE_COV_DEFSfmt_fields, 3861 /* bits */ 18, 3862 /* flags */ 0, 3863 }, 3864 #endif /* chips */ 3865 3866 #if defined(BCM_56850_A0) 3867 { /* SOC_FORMAT_INT_FMT_ALPM_ASSOC_DATAfmt */ 3868 /* format FMT_ALPM_ASSOC_DATAfmt */ 3869 /* nFields */ 15, 3870 /* *fields */ soc_FMT_ALPM_ASSOC_DATAfmt_fields, 3871 /* bits */ 48, 3872 /* flags */ 0, 3873 }, 3874 #endif /* chips */ 3875 3876 #if defined(BCM_56370_A0) 3877 { /* SOC_FORMAT_INT_FMT_ALPM_ASSOC_DATA_BCM56370_A0fmt */ 3878 /* format FMT_ALPM_ASSOC_DATAfmt */ 3879 /* nFields */ 13, 3880 /* *fields */ soc_FMT_ALPM_ASSOC_DATA_BCM56370_A0fmt_fields, 3881 /* bits */ 50, 3882 /* flags */ 0, 3883 }, 3884 #endif /* chips */ 3885 3886 #if defined(BCM_56560_A0) 3887 { /* SOC_FORMAT_INT_FMT_ALPM_ASSOC_DATA_BCM56560_A0fmt */ 3888 /* format FMT_ALPM_ASSOC_DATAfmt */ 3889 /* nFields */ 14, 3890 /* *fields */ soc_FMT_ALPM_ASSOC_DATA_BCM56560_A0fmt_fields, 3891 /* bits */ 46, 3892 /* flags */ 0, 3893 }, 3894 #endif /* chips */ 3895 3896 #if defined(BCM_56560_B0) 3897 { /* SOC_FORMAT_INT_FMT_ALPM_ASSOC_DATA_BCM56560_B0fmt */ 3898 /* format FMT_ALPM_ASSOC_DATAfmt */ 3899 /* nFields */ 14, 3900 /* *fields */ soc_FMT_ALPM_ASSOC_DATA_BCM56560_A0fmt_fields, 3901 /* bits */ 46, 3902 /* flags */ 0, 3903 }, 3904 #endif /* chips */ 3905 3906 #if defined(BCM_56670_A0) 3907 { /* SOC_FORMAT_INT_FMT_ALPM_ASSOC_DATA_BCM56670_A0fmt */ 3908 /* format FMT_ALPM_ASSOC_DATAfmt */ 3909 /* nFields */ 14, 3910 /* *fields */ soc_FMT_ALPM_ASSOC_DATA_BCM56670_A0fmt_fields, 3911 /* bits */ 46, 3912 /* flags */ 0, 3913 }, 3914 #endif /* chips */ 3915 3916 #if defined(BCM_56670_B0) 3917 { /* SOC_FORMAT_INT_FMT_ALPM_ASSOC_DATA_BCM56670_B0fmt */ 3918 /* format FMT_ALPM_ASSOC_DATAfmt */ 3919 /* nFields */ 14, 3920 /* *fields */ soc_FMT_ALPM_ASSOC_DATA_BCM56670_A0fmt_fields, 3921 /* bits */ 46, 3922 /* flags */ 0, 3923 }, 3924 #endif /* chips */ 3925 3926 #if defined(BCM_56770_A0) 3927 { /* SOC_FORMAT_INT_FMT_ALPM_ASSOC_DATA_BCM56770_A0fmt */ 3928 /* format FMT_ALPM_ASSOC_DATAfmt */ 3929 /* nFields */ 11, 3930 /* *fields */ soc_FMT_ALPM_ASSOC_DATA_BCM56870_A0fmt_fields, 3931 /* bits */ 50, 3932 /* flags */ 0, 3933 }, 3934 #endif /* chips */ 3935 3936 #if defined(BCM_56860_A0) 3937 { /* SOC_FORMAT_INT_FMT_ALPM_ASSOC_DATA_BCM56860_A0fmt */ 3938 /* format FMT_ALPM_ASSOC_DATAfmt */ 3939 /* nFields */ 15, 3940 /* *fields */ soc_FMT_ALPM_ASSOC_DATA_BCM56860_A0fmt_fields, 3941 /* bits */ 48, 3942 /* flags */ 0, 3943 }, 3944 #endif /* chips */ 3945 3946 #if defined(BCM_56870_A0) 3947 { /* SOC_FORMAT_INT_FMT_ALPM_ASSOC_DATA_BCM56870_A0fmt */ 3948 /* format FMT_ALPM_ASSOC_DATAfmt */ 3949 /* nFields */ 11, 3950 /* *fields */ soc_FMT_ALPM_ASSOC_DATA_BCM56870_A0fmt_fields, 3951 /* bits */ 50, 3952 /* flags */ 0, 3953 }, 3954 #endif /* chips */ 3955 3956 #if defined(BCM_56960_A0) 3957 { /* SOC_FORMAT_INT_FMT_ALPM_ASSOC_DATA_BCM56960_A0fmt */ 3958 /* format FMT_ALPM_ASSOC_DATAfmt */ 3959 /* nFields */ 13, 3960 /* *fields */ soc_FMT_ALPM_ASSOC_DATA_BCM56960_A0fmt_fields, 3961 /* bits */ 46, 3962 /* flags */ 0, 3963 }, 3964 #endif /* chips */ 3965 3966 #if defined(BCM_56965_A0) 3967 { /* SOC_FORMAT_INT_FMT_ALPM_ASSOC_DATA_BCM56965_A0fmt */ 3968 /* format FMT_ALPM_ASSOC_DATAfmt */ 3969 /* nFields */ 13, 3970 /* *fields */ soc_FMT_ALPM_ASSOC_DATA_BCM56960_A0fmt_fields, 3971 /* bits */ 46, 3972 /* flags */ 0, 3973 }, 3974 #endif /* chips */ 3975 3976 #if defined(BCM_56970_A0) 3977 { /* SOC_FORMAT_INT_FMT_ALPM_ASSOC_DATA_BCM56970_A0fmt */ 3978 /* format FMT_ALPM_ASSOC_DATAfmt */ 3979 /* nFields */ 13, 3980 /* *fields */ soc_FMT_ALPM_ASSOC_DATA_BCM56970_A0fmt_fields, 3981 /* bits */ 48, 3982 /* flags */ 0, 3983 }, 3984 #endif /* chips */ 3985 3986 #if defined(BCM_56850_A0) 3987 { /* SOC_FORMAT_INT_FMT_ALPM_ENTRY_DATAfmt */ 3988 /* format FMT_ALPM_ENTRY_DATAfmt */ 3989 /* nFields */ 12, 3990 /* *fields */ soc_FMT_ALPM_ENTRY_DATAfmt_fields, 3991 /* bits */ 31, 3992 /* flags */ 0, 3993 }, 3994 #endif /* chips */ 3995 3996 #if defined(BCM_56560_A0) 3997 { /* SOC_FORMAT_INT_FMT_ALPM_ENTRY_DATA_BCM56560_A0fmt */ 3998 /* format FMT_ALPM_ENTRY_DATAfmt */ 3999 /* nFields */ 12, 4000 /* *fields */ soc_FMT_ALPM_ENTRY_DATA_BCM56560_A0fmt_fields, 4001 /* bits */ 31, 4002 /* flags */ 0, 4003 }, 4004 #endif /* chips */ 4005 4006 #if defined(BCM_56560_B0) 4007 { /* SOC_FORMAT_INT_FMT_ALPM_ENTRY_DATA_BCM56560_B0fmt */ 4008 /* format FMT_ALPM_ENTRY_DATAfmt */ 4009 /* nFields */ 12, 4010 /* *fields */ soc_FMT_ALPM_ENTRY_DATA_BCM56560_A0fmt_fields, 4011 /* bits */ 31, 4012 /* flags */ 0, 4013 }, 4014 #endif /* chips */ 4015 4016 #if defined(BCM_56670_A0) 4017 { /* SOC_FORMAT_INT_FMT_ALPM_ENTRY_DATA_BCM56670_A0fmt */ 4018 /* format FMT_ALPM_ENTRY_DATAfmt */ 4019 /* nFields */ 12, 4020 /* *fields */ soc_FMT_ALPM_ENTRY_DATA_BCM56670_A0fmt_fields, 4021 /* bits */ 31, 4022 /* flags */ 0, 4023 }, 4024 #endif /* chips */ 4025 4026 #if defined(BCM_56670_B0) 4027 { /* SOC_FORMAT_INT_FMT_ALPM_ENTRY_DATA_BCM56670_B0fmt */ 4028 /* format FMT_ALPM_ENTRY_DATAfmt */ 4029 /* nFields */ 12, 4030 /* *fields */ soc_FMT_ALPM_ENTRY_DATA_BCM56670_A0fmt_fields, 4031 /* bits */ 31, 4032 /* flags */ 0, 4033 }, 4034 #endif /* chips */ 4035 4036 #if defined(BCM_56860_A0) 4037 { /* SOC_FORMAT_INT_FMT_ALPM_ENTRY_DATA_BCM56860_A0fmt */ 4038 /* format FMT_ALPM_ENTRY_DATAfmt */ 4039 /* nFields */ 12, 4040 /* *fields */ soc_FMT_ALPM_ENTRY_DATA_BCM56860_A0fmt_fields, 4041 /* bits */ 31, 4042 /* flags */ 0, 4043 }, 4044 #endif /* chips */ 4045 4046 #if defined(BCM_56960_A0) 4047 { /* SOC_FORMAT_INT_FMT_ALPM_ENTRY_DATA_BCM56960_A0fmt */ 4048 /* format FMT_ALPM_ENTRY_DATAfmt */ 4049 /* nFields */ 12, 4050 /* *fields */ soc_FMT_ALPM_ENTRY_DATA_BCM56960_A0fmt_fields, 4051 /* bits */ 31, 4052 /* flags */ 0, 4053 }, 4054 #endif /* chips */ 4055 4056 #if defined(BCM_56965_A0) 4057 { /* SOC_FORMAT_INT_FMT_ALPM_ENTRY_DATA_BCM56965_A0fmt */ 4058 /* format FMT_ALPM_ENTRY_DATAfmt */ 4059 /* nFields */ 12, 4060 /* *fields */ soc_FMT_ALPM_ENTRY_DATA_BCM56960_A0fmt_fields, 4061 /* bits */ 31, 4062 /* flags */ 0, 4063 }, 4064 #endif /* chips */ 4065 4066 #if defined(BCM_56970_A0) 4067 { /* SOC_FORMAT_INT_FMT_ALPM_ENTRY_DATA_BCM56970_A0fmt */ 4068 /* format FMT_ALPM_ENTRY_DATAfmt */ 4069 /* nFields */ 12, 4070 /* *fields */ soc_FMT_ALPM_ENTRY_DATA_BCM56970_A0fmt_fields, 4071 /* bits */ 31, 4072 /* flags */ 0, 4073 }, 4074 #endif /* chips */ 4075 4076 #if defined(BCM_56980_A0) 4077 { /* SOC_FORMAT_INT_FMT_ALPM_ENTRY_DATA_BCM56980_A0fmt */ 4078 /* format FMT_ALPM_ENTRY_DATAfmt */ 4079 /* nFields */ 12, 4080 /* *fields */ soc_FMT_ALPM_ENTRY_DATA_BCM56970_A0fmt_fields, 4081 /* bits */ 31, 4082 /* flags */ 0, 4083 }, 4084 #endif /* chips */ 4085 4086 #if defined(BCM_56980_B0) 4087 { /* SOC_FORMAT_INT_FMT_ALPM_ENTRY_DATA_BCM56980_B0fmt */ 4088 /* format FMT_ALPM_ENTRY_DATAfmt */ 4089 /* nFields */ 12, 4090 /* *fields */ soc_FMT_ALPM_ENTRY_DATA_BCM56970_A0fmt_fields, 4091 /* bits */ 31, 4092 /* flags */ 0, 4093 }, 4094 #endif /* chips */ 4095 4096 #if defined(BCM_56224_A0) || defined(BCM_56334_A0) || \ 4097 defined(BCM_56440_B0) || defined(BCM_56504_A0) || \ 4098 defined(BCM_56504_B0) || defined(BCM_56524_A0) || \ 4099 defined(BCM_56524_B0) || defined(BCM_56624_A0) || \ 4100 defined(BCM_56624_B0) || defined(BCM_56634_A0) || \ 4101 defined(BCM_56634_B0) || defined(BCM_56680_A0) || \ 4102 defined(BCM_56685_A0) || defined(BCM_56685_B0) || \ 4103 defined(BCM_56725_A0) || defined(BCM_56800_A0) || \ 4104 defined(BCM_56840_A0) || defined(BCM_56840_B0) || \ 4105 defined(BCM_88732_A0) 4106 { /* SOC_FORMAT_INT_FMT_SAMPLEfmt */ 4107 /* format FMT_SAMPLEfmt */ 4108 /* nFields */ 7, 4109 /* *fields */ soc_FMT_SAMPLEfmt_fields, 4110 /* bits */ 32, 4111 /* flags */ 0, 4112 }, 4113 #endif /* chips */ 4114 4115 #if defined(BCM_53314_A0) 4116 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM53314_A0fmt */ 4117 /* format FMT_SAMPLEfmt */ 4118 /* nFields */ 7, 4119 /* *fields */ soc_FMT_SAMPLEfmt_fields, 4120 /* bits */ 32, 4121 /* flags */ 0, 4122 }, 4123 #endif /* chips */ 4124 4125 #if defined(BCM_53324_A0) 4126 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM53324_A0fmt */ 4127 /* format FMT_SAMPLEfmt */ 4128 /* nFields */ 7, 4129 /* *fields */ soc_FMT_SAMPLEfmt_fields, 4130 /* bits */ 32, 4131 /* flags */ 0, 4132 }, 4133 #endif /* chips */ 4134 4135 #if defined(BCM_53400_A0) 4136 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM53400_A0fmt */ 4137 /* format FMT_SAMPLEfmt */ 4138 /* nFields */ 7, 4139 /* *fields */ soc_FMT_SAMPLE_BCM53400_A0fmt_fields, 4140 /* bits */ 32, 4141 /* flags */ 0, 4142 }, 4143 #endif /* chips */ 4144 4145 #if defined(BCM_53540_A0) 4146 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM53540_A0fmt */ 4147 /* format FMT_SAMPLEfmt */ 4148 /* nFields */ 7, 4149 /* *fields */ soc_FMT_SAMPLE_BCM53400_A0fmt_fields, 4150 /* bits */ 32, 4151 /* flags */ 0, 4152 }, 4153 #endif /* chips */ 4154 4155 #if defined(BCM_53570_A0) 4156 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM53570_A0fmt */ 4157 /* format FMT_SAMPLEfmt */ 4158 /* nFields */ 7, 4159 /* *fields */ soc_FMT_SAMPLE_BCM53400_A0fmt_fields, 4160 /* bits */ 32, 4161 /* flags */ 0, 4162 }, 4163 #endif /* chips */ 4164 4165 #if defined(BCM_53570_B0) 4166 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM53570_B0fmt */ 4167 /* format FMT_SAMPLEfmt */ 4168 /* nFields */ 7, 4169 /* *fields */ soc_FMT_SAMPLE_BCM53400_A0fmt_fields, 4170 /* bits */ 32, 4171 /* flags */ 0, 4172 }, 4173 #endif /* chips */ 4174 4175 #if defined(BCM_56142_A0) 4176 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM56142_A0fmt */ 4177 /* format FMT_SAMPLEfmt */ 4178 /* nFields */ 7, 4179 /* *fields */ soc_FMT_SAMPLEfmt_fields, 4180 /* bits */ 32, 4181 /* flags */ 0, 4182 }, 4183 #endif /* chips */ 4184 4185 #if defined(BCM_56150_A0) 4186 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM56150_A0fmt */ 4187 /* format FMT_SAMPLEfmt */ 4188 /* nFields */ 7, 4189 /* *fields */ soc_FMT_SAMPLE_BCM56640_A0fmt_fields, 4190 /* bits */ 32, 4191 /* flags */ 0, 4192 }, 4193 #endif /* chips */ 4194 4195 #if defined(BCM_56160_A0) 4196 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM56160_A0fmt */ 4197 /* format FMT_SAMPLEfmt */ 4198 /* nFields */ 7, 4199 /* *fields */ soc_FMT_SAMPLE_BCM53400_A0fmt_fields, 4200 /* bits */ 32, 4201 /* flags */ 0, 4202 }, 4203 #endif /* chips */ 4204 4205 #if defined(BCM_56224_B0) 4206 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM56224_B0fmt */ 4207 /* format FMT_SAMPLEfmt */ 4208 /* nFields */ 7, 4209 /* *fields */ soc_FMT_SAMPLEfmt_fields, 4210 /* bits */ 32, 4211 /* flags */ 0, 4212 }, 4213 #endif /* chips */ 4214 4215 #if defined(BCM_56260_A0) 4216 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM56260_A0fmt */ 4217 /* format FMT_SAMPLEfmt */ 4218 /* nFields */ 7, 4219 /* *fields */ soc_FMT_SAMPLE_BCM53400_A0fmt_fields, 4220 /* bits */ 32, 4221 /* flags */ 0, 4222 }, 4223 #endif /* chips */ 4224 4225 #if defined(BCM_56260_B0) 4226 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM56260_B0fmt */ 4227 /* format FMT_SAMPLEfmt */ 4228 /* nFields */ 7, 4229 /* *fields */ soc_FMT_SAMPLE_BCM53400_A0fmt_fields, 4230 /* bits */ 32, 4231 /* flags */ 0, 4232 }, 4233 #endif /* chips */ 4234 4235 #if defined(BCM_56270_A0) 4236 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM56270_A0fmt */ 4237 /* format FMT_SAMPLEfmt */ 4238 /* nFields */ 7, 4239 /* *fields */ soc_FMT_SAMPLE_BCM53400_A0fmt_fields, 4240 /* bits */ 32, 4241 /* flags */ 0, 4242 }, 4243 #endif /* chips */ 4244 4245 #if defined(BCM_56314_A0) 4246 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM56314_A0fmt */ 4247 /* format FMT_SAMPLEfmt */ 4248 /* nFields */ 7, 4249 /* *fields */ soc_FMT_SAMPLEfmt_fields, 4250 /* bits */ 32, 4251 /* flags */ 0, 4252 }, 4253 #endif /* chips */ 4254 4255 #if defined(BCM_56334_B0) 4256 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM56334_B0fmt */ 4257 /* format FMT_SAMPLEfmt */ 4258 /* nFields */ 7, 4259 /* *fields */ soc_FMT_SAMPLEfmt_fields, 4260 /* bits */ 32, 4261 /* flags */ 0, 4262 }, 4263 #endif /* chips */ 4264 4265 #if defined(BCM_56340_A0) 4266 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM56340_A0fmt */ 4267 /* format FMT_SAMPLEfmt */ 4268 /* nFields */ 7, 4269 /* *fields */ soc_FMT_SAMPLE_BCM56640_A0fmt_fields, 4270 /* bits */ 32, 4271 /* flags */ 0, 4272 }, 4273 #endif /* chips */ 4274 4275 #if defined(BCM_56440_A0) 4276 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM56440_A0fmt */ 4277 /* format FMT_SAMPLEfmt */ 4278 /* nFields */ 7, 4279 /* *fields */ soc_FMT_SAMPLEfmt_fields, 4280 /* bits */ 32, 4281 /* flags */ 0, 4282 }, 4283 #endif /* chips */ 4284 4285 #if defined(BCM_56450_A0) 4286 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM56450_A0fmt */ 4287 /* format FMT_SAMPLEfmt */ 4288 /* nFields */ 7, 4289 /* *fields */ soc_FMT_SAMPLE_BCM56640_A0fmt_fields, 4290 /* bits */ 32, 4291 /* flags */ 0, 4292 }, 4293 #endif /* chips */ 4294 4295 #if defined(BCM_56450_B0) 4296 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM56450_B0fmt */ 4297 /* format FMT_SAMPLEfmt */ 4298 /* nFields */ 7, 4299 /* *fields */ soc_FMT_SAMPLE_BCM56640_A0fmt_fields, 4300 /* bits */ 32, 4301 /* flags */ 0, 4302 }, 4303 #endif /* chips */ 4304 4305 #if defined(BCM_56450_B1) 4306 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM56450_B1fmt */ 4307 /* format FMT_SAMPLEfmt */ 4308 /* nFields */ 7, 4309 /* *fields */ soc_FMT_SAMPLE_BCM56640_A0fmt_fields, 4310 /* bits */ 32, 4311 /* flags */ 0, 4312 }, 4313 #endif /* chips */ 4314 4315 #if defined(BCM_56640_A0) 4316 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM56640_A0fmt */ 4317 /* format FMT_SAMPLEfmt */ 4318 /* nFields */ 7, 4319 /* *fields */ soc_FMT_SAMPLE_BCM56640_A0fmt_fields, 4320 /* bits */ 32, 4321 /* flags */ 0, 4322 }, 4323 #endif /* chips */ 4324 4325 #if defined(BCM_56680_B0) 4326 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM56680_B0fmt */ 4327 /* format FMT_SAMPLEfmt */ 4328 /* nFields */ 7, 4329 /* *fields */ soc_FMT_SAMPLEfmt_fields, 4330 /* bits */ 32, 4331 /* flags */ 0, 4332 }, 4333 #endif /* chips */ 4334 4335 #if defined(BCM_56820_A0) 4336 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM56820_A0fmt */ 4337 /* format FMT_SAMPLEfmt */ 4338 /* nFields */ 7, 4339 /* *fields */ soc_FMT_SAMPLEfmt_fields, 4340 /* bits */ 32, 4341 /* flags */ 0, 4342 }, 4343 #endif /* chips */ 4344 4345 #if defined(BCM_56980_A0) 4346 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM56980_A0fmt */ 4347 /* format FMT_SAMPLEfmt */ 4348 /* nFields */ 7, 4349 /* *fields */ soc_FMT_SAMPLE_BCM53400_A0fmt_fields, 4350 /* bits */ 32, 4351 /* flags */ 0, 4352 }, 4353 #endif /* chips */ 4354 4355 #if defined(BCM_56980_B0) 4356 { /* SOC_FORMAT_INT_FMT_SAMPLE_BCM56980_B0fmt */ 4357 /* format FMT_SAMPLEfmt */ 4358 /* nFields */ 7, 4359 /* *fields */ soc_FMT_SAMPLE_BCM53400_A0fmt_fields, 4360 /* bits */ 32, 4361 /* flags */ 0, 4362 }, 4363 #endif /* chips */ 4364 4365 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 4366 defined(BCM_56870_A0) 4367 { /* SOC_FORMAT_INT_FORWARDING_1_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 4368 /* format FORWARDING_1_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 4369 /* nFields */ 12, 4370 /* *fields */ soc_FORWARDING_1_FLEX_KEY_GEN_IN_CONTROL_BUSfmt_fields, 4371 /* bits */ 144, 4372 /* flags */ 0, 4373 }, 4374 #endif /* chips */ 4375 4376 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 4377 defined(BCM_56870_A0) 4378 { /* SOC_FORMAT_INT_FORWARDING_1_FLEX_KEY_GEN_OUT_BUSfmt */ 4379 /* format FORWARDING_1_FLEX_KEY_GEN_OUT_BUSfmt */ 4380 /* nFields */ 8, 4381 /* *fields */ soc_FORWARDING_1_FLEX_KEY_GEN_OUT_BUSfmt_fields, 4382 /* bits */ 256, 4383 /* flags */ 0, 4384 }, 4385 #endif /* chips */ 4386 4387 #if defined(BCM_56770_A0) || defined(BCM_56870_A0) 4388 { /* SOC_FORMAT_INT_FORWARDING_1_KEYS_DOPfmt */ 4389 /* format FORWARDING_1_KEYS_DOPfmt */ 4390 /* nFields */ 4, 4391 /* *fields */ soc_FORWARDING_1_KEYS_DOPfmt_fields, 4392 /* bits */ 224, 4393 /* flags */ 0, 4394 }, 4395 #endif /* chips */ 4396 4397 #if defined(BCM_56370_A0) 4398 { /* SOC_FORMAT_INT_FORWARDING_1_KEYS_DOP_BCM56370_A0fmt */ 4399 /* format FORWARDING_1_KEYS_DOPfmt */ 4400 /* nFields */ 4, 4401 /* *fields */ soc_FORWARDING_1_KEYS_DOP_BCM56370_A0fmt_fields, 4402 /* bits */ 224, 4403 /* flags */ 0, 4404 }, 4405 #endif /* chips */ 4406 4407 #if defined(BCM_56870_A0) 4408 { /* SOC_FORMAT_INT_FORWARDING_1_LKUP_DOPfmt */ 4409 /* format FORWARDING_1_LKUP_DOPfmt */ 4410 /* nFields */ 10, 4411 /* *fields */ soc_FORWARDING_1_LKUP_DOPfmt_fields, 4412 /* bits */ 64, 4413 /* flags */ 0, 4414 }, 4415 #endif /* chips */ 4416 4417 #if defined(BCM_56370_A0) 4418 { /* SOC_FORMAT_INT_FORWARDING_1_LKUP_DOP_BCM56370_A0fmt */ 4419 /* format FORWARDING_1_LKUP_DOPfmt */ 4420 /* nFields */ 10, 4421 /* *fields */ soc_FORWARDING_1_LKUP_DOP_BCM56370_A0fmt_fields, 4422 /* bits */ 64, 4423 /* flags */ 0, 4424 }, 4425 #endif /* chips */ 4426 4427 #if defined(BCM_56770_A0) 4428 { /* SOC_FORMAT_INT_FORWARDING_1_LKUP_DOP_BCM56770_A0fmt */ 4429 /* format FORWARDING_1_LKUP_DOPfmt */ 4430 /* nFields */ 9, 4431 /* *fields */ soc_FORWARDING_1_LKUP_DOP_BCM56770_A0fmt_fields, 4432 /* bits */ 64, 4433 /* flags */ 0, 4434 }, 4435 #endif /* chips */ 4436 4437 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 4438 defined(BCM_56870_A0) 4439 { /* SOC_FORMAT_INT_FORWARDING_1_MISC_ATTRIBUTES_ACTION_SETfmt */ 4440 /* format FORWARDING_1_MISC_ATTRIBUTES_ACTION_SETfmt */ 4441 /* nFields */ 4, 4442 /* *fields */ soc_FORWARDING_1_MISC_ATTRIBUTES_ACTION_SETfmt_fields, 4443 /* bits */ 4, 4444 /* flags */ 0, 4445 }, 4446 #endif /* chips */ 4447 4448 #if defined(BCM_56870_A0) 4449 { /* SOC_FORMAT_INT_FORWARDING_1_PDD_OUT_BUSfmt */ 4450 /* format FORWARDING_1_PDD_OUT_BUSfmt */ 4451 /* nFields */ 105, 4452 /* *fields */ soc_FORWARDING_1_PDD_OUT_BUSfmt_fields, 4453 /* bits */ 257, 4454 /* flags */ 0, 4455 }, 4456 #endif /* chips */ 4457 4458 #if defined(BCM_56370_A0) 4459 { /* SOC_FORMAT_INT_FORWARDING_1_PDD_OUT_BUS_BCM56370_A0fmt */ 4460 /* format FORWARDING_1_PDD_OUT_BUSfmt */ 4461 /* nFields */ 106, 4462 /* *fields */ soc_FORWARDING_1_PDD_OUT_BUS_BCM56370_A0fmt_fields, 4463 /* bits */ 265, 4464 /* flags */ 0, 4465 }, 4466 #endif /* chips */ 4467 4468 #if defined(BCM_56770_A0) 4469 { /* SOC_FORMAT_INT_FORWARDING_1_PDD_OUT_BUS_BCM56770_A0fmt */ 4470 /* format FORWARDING_1_PDD_OUT_BUSfmt */ 4471 /* nFields */ 106, 4472 /* *fields */ soc_FORWARDING_1_PDD_OUT_BUS_BCM56370_A0fmt_fields, 4473 /* bits */ 265, 4474 /* flags */ 0, 4475 }, 4476 #endif /* chips */ 4477 4478 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 4479 defined(BCM_56870_A0) 4480 { /* SOC_FORMAT_INT_FORWARDING_1_QOS_ACTION_SETfmt */ 4481 /* format FORWARDING_1_QOS_ACTION_SETfmt */ 4482 /* nFields */ 3, 4483 /* *fields */ soc_FORWARDING_1_QOS_ACTION_SETfmt_fields, 4484 /* bits */ 6, 4485 /* flags */ 0, 4486 }, 4487 #endif /* chips */ 4488 4489 #if defined(BCM_56870_A0) 4490 { /* SOC_FORMAT_INT_FORWARDING_2_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 4491 /* format FORWARDING_2_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 4492 /* nFields */ 12, 4493 /* *fields */ soc_FORWARDING_1_FLEX_KEY_GEN_IN_CONTROL_BUSfmt_fields, 4494 /* bits */ 144, 4495 /* flags */ 0, 4496 }, 4497 #endif /* chips */ 4498 4499 #if defined(BCM_56370_A0) 4500 { /* SOC_FORMAT_INT_FORWARDING_2_FLEX_KEY_GEN_IN_CONTROL_BUS_BCM56370_A0fmt */ 4501 /* format FORWARDING_2_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 4502 /* nFields */ 12, 4503 /* *fields */ soc_FORWARDING_1_FLEX_KEY_GEN_IN_CONTROL_BUSfmt_fields, 4504 /* bits */ 144, 4505 /* flags */ 0, 4506 }, 4507 #endif /* chips */ 4508 4509 #if defined(BCM_56770_A0) 4510 { /* SOC_FORMAT_INT_FORWARDING_2_FLEX_KEY_GEN_IN_CONTROL_BUS_BCM56770_A0fmt */ 4511 /* format FORWARDING_2_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 4512 /* nFields */ 12, 4513 /* *fields */ soc_FORWARDING_1_FLEX_KEY_GEN_IN_CONTROL_BUSfmt_fields, 4514 /* bits */ 144, 4515 /* flags */ 0, 4516 }, 4517 #endif /* chips */ 4518 4519 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 4520 defined(BCM_56870_A0) 4521 { /* SOC_FORMAT_INT_FORWARDING_2_FLEX_KEY_GEN_OUT_BUSfmt */ 4522 /* format FORWARDING_2_FLEX_KEY_GEN_OUT_BUSfmt */ 4523 /* nFields */ 8, 4524 /* *fields */ soc_FORWARDING_2_FLEX_KEY_GEN_OUT_BUSfmt_fields, 4525 /* bits */ 768, 4526 /* flags */ 0, 4527 }, 4528 #endif /* chips */ 4529 4530 #if defined(BCM_56770_A0) || defined(BCM_56870_A0) 4531 { /* SOC_FORMAT_INT_FORWARDING_2_KEY_1_DOPfmt */ 4532 /* format FORWARDING_2_KEY_1_DOPfmt */ 4533 /* nFields */ 3, 4534 /* *fields */ soc_FORWARDING_2_KEY_1_DOPfmt_fields, 4535 /* bits */ 480, 4536 /* flags */ 0, 4537 }, 4538 #endif /* chips */ 4539 4540 #if defined(BCM_56370_A0) 4541 { /* SOC_FORMAT_INT_FORWARDING_2_KEY_1_DOP_BCM56370_A0fmt */ 4542 /* format FORWARDING_2_KEY_1_DOPfmt */ 4543 /* nFields */ 3, 4544 /* *fields */ soc_FORWARDING_2_KEY_1_DOP_BCM56370_A0fmt_fields, 4545 /* bits */ 480, 4546 /* flags */ 0, 4547 }, 4548 #endif /* chips */ 4549 4550 #if defined(BCM_56770_A0) || defined(BCM_56870_A0) 4551 { /* SOC_FORMAT_INT_FORWARDING_2_KEY_2_DOPfmt */ 4552 /* format FORWARDING_2_KEY_2_DOPfmt */ 4553 /* nFields */ 3, 4554 /* *fields */ soc_FORWARDING_2_KEY_2_DOPfmt_fields, 4555 /* bits */ 480, 4556 /* flags */ 0, 4557 }, 4558 #endif /* chips */ 4559 4560 #if defined(BCM_56370_A0) 4561 { /* SOC_FORMAT_INT_FORWARDING_2_KEY_2_DOP_BCM56370_A0fmt */ 4562 /* format FORWARDING_2_KEY_2_DOPfmt */ 4563 /* nFields */ 3, 4564 /* *fields */ soc_FORWARDING_2_KEY_2_DOP_BCM56370_A0fmt_fields, 4565 /* bits */ 480, 4566 /* flags */ 0, 4567 }, 4568 #endif /* chips */ 4569 4570 #if defined(BCM_56870_A0) 4571 { /* SOC_FORMAT_INT_FORWARDING_2_LKUP_DOPfmt */ 4572 /* format FORWARDING_2_LKUP_DOPfmt */ 4573 /* nFields */ 10, 4574 /* *fields */ soc_FORWARDING_1_LKUP_DOPfmt_fields, 4575 /* bits */ 64, 4576 /* flags */ 0, 4577 }, 4578 #endif /* chips */ 4579 4580 #if defined(BCM_56370_A0) 4581 { /* SOC_FORMAT_INT_FORWARDING_2_LKUP_DOP_BCM56370_A0fmt */ 4582 /* format FORWARDING_2_LKUP_DOPfmt */ 4583 /* nFields */ 10, 4584 /* *fields */ soc_FORWARDING_1_LKUP_DOP_BCM56370_A0fmt_fields, 4585 /* bits */ 64, 4586 /* flags */ 0, 4587 }, 4588 #endif /* chips */ 4589 4590 #if defined(BCM_56770_A0) 4591 { /* SOC_FORMAT_INT_FORWARDING_2_LKUP_DOP_BCM56770_A0fmt */ 4592 /* format FORWARDING_2_LKUP_DOPfmt */ 4593 /* nFields */ 9, 4594 /* *fields */ soc_FORWARDING_1_LKUP_DOP_BCM56770_A0fmt_fields, 4595 /* bits */ 64, 4596 /* flags */ 0, 4597 }, 4598 #endif /* chips */ 4599 4600 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 4601 defined(BCM_56870_A0) 4602 { /* SOC_FORMAT_INT_FORWARDING_2_MISC_ATTRIBUTES_ACTION_SETfmt */ 4603 /* format FORWARDING_2_MISC_ATTRIBUTES_ACTION_SETfmt */ 4604 /* nFields */ 7, 4605 /* *fields */ soc_FORWARDING_2_MISC_ATTRIBUTES_ACTION_SETfmt_fields, 4606 /* bits */ 7, 4607 /* flags */ 0, 4608 }, 4609 #endif /* chips */ 4610 4611 #if defined(BCM_56870_A0) 4612 { /* SOC_FORMAT_INT_FORWARDING_2_PDD_OUT_BUSfmt */ 4613 /* format FORWARDING_2_PDD_OUT_BUSfmt */ 4614 /* nFields */ 106, 4615 /* *fields */ soc_FORWARDING_2_PDD_OUT_BUSfmt_fields, 4616 /* bits */ 343, 4617 /* flags */ 0, 4618 }, 4619 #endif /* chips */ 4620 4621 #if defined(BCM_56370_A0) 4622 { /* SOC_FORMAT_INT_FORWARDING_2_PDD_OUT_BUS_BCM56370_A0fmt */ 4623 /* format FORWARDING_2_PDD_OUT_BUSfmt */ 4624 /* nFields */ 107, 4625 /* *fields */ soc_FORWARDING_2_PDD_OUT_BUS_BCM56370_A0fmt_fields, 4626 /* bits */ 351, 4627 /* flags */ 0, 4628 }, 4629 #endif /* chips */ 4630 4631 #if defined(BCM_56770_A0) 4632 { /* SOC_FORMAT_INT_FORWARDING_2_PDD_OUT_BUS_BCM56770_A0fmt */ 4633 /* format FORWARDING_2_PDD_OUT_BUSfmt */ 4634 /* nFields */ 107, 4635 /* *fields */ soc_FORWARDING_2_PDD_OUT_BUS_BCM56370_A0fmt_fields, 4636 /* bits */ 351, 4637 /* flags */ 0, 4638 }, 4639 #endif /* chips */ 4640 4641 #if defined(BCM_56870_A0) 4642 { /* SOC_FORMAT_INT_FORWARDING_3_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 4643 /* format FORWARDING_3_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 4644 /* nFields */ 12, 4645 /* *fields */ soc_FORWARDING_1_FLEX_KEY_GEN_IN_CONTROL_BUSfmt_fields, 4646 /* bits */ 144, 4647 /* flags */ 0, 4648 }, 4649 #endif /* chips */ 4650 4651 #if defined(BCM_56370_A0) 4652 { /* SOC_FORMAT_INT_FORWARDING_3_FLEX_KEY_GEN_IN_CONTROL_BUS_BCM56370_A0fmt */ 4653 /* format FORWARDING_3_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 4654 /* nFields */ 12, 4655 /* *fields */ soc_FORWARDING_1_FLEX_KEY_GEN_IN_CONTROL_BUSfmt_fields, 4656 /* bits */ 144, 4657 /* flags */ 0, 4658 }, 4659 #endif /* chips */ 4660 4661 #if defined(BCM_56770_A0) 4662 { /* SOC_FORMAT_INT_FORWARDING_3_FLEX_KEY_GEN_IN_CONTROL_BUS_BCM56770_A0fmt */ 4663 /* format FORWARDING_3_FLEX_KEY_GEN_IN_CONTROL_BUSfmt */ 4664 /* nFields */ 12, 4665 /* *fields */ soc_FORWARDING_1_FLEX_KEY_GEN_IN_CONTROL_BUSfmt_fields, 4666 /* bits */ 144, 4667 /* flags */ 0, 4668 }, 4669 #endif /* chips */ 4670 4671 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 4672 defined(BCM_56870_A0) 4673 { /* SOC_FORMAT_INT_FORWARDING_3_FLEX_KEY_GEN_OUT_BUSfmt */ 4674 /* format FORWARDING_3_FLEX_KEY_GEN_OUT_BUSfmt */ 4675 /* nFields */ 16, 4676 /* *fields */ soc_FORWARDING_3_FLEX_KEY_GEN_OUT_BUSfmt_fields, 4677 /* bits */ 768, 4678 /* flags */ 0, 4679 }, 4680 #endif /* chips */ 4681 4682 #if defined(BCM_56770_A0) || defined(BCM_56870_A0) 4683 { /* SOC_FORMAT_INT_FORWARDING_3_KEY_0_DOPfmt */ 4684 /* format FORWARDING_3_KEY_0_DOPfmt */ 4685 /* nFields */ 3, 4686 /* *fields */ soc_FORWARDING_3_KEY_0_DOPfmt_fields, 4687 /* bits */ 416, 4688 /* flags */ 0, 4689 }, 4690 #endif /* chips */ 4691 4692 #if defined(BCM_56370_A0) 4693 { /* SOC_FORMAT_INT_FORWARDING_3_KEY_0_DOP_BCM56370_A0fmt */ 4694 /* format FORWARDING_3_KEY_0_DOPfmt */ 4695 /* nFields */ 3, 4696 /* *fields */ soc_FORWARDING_3_KEY_0_DOP_BCM56370_A0fmt_fields, 4697 /* bits */ 416, 4698 /* flags */ 0, 4699 }, 4700 #endif /* chips */ 4701 4702 #if defined(BCM_56770_A0) || defined(BCM_56870_A0) 4703 { /* SOC_FORMAT_INT_FORWARDING_3_KEY_1_DOPfmt */ 4704 /* format FORWARDING_3_KEY_1_DOPfmt */ 4705 /* nFields */ 3, 4706 /* *fields */ soc_FORWARDING_3_KEY_1_DOPfmt_fields, 4707 /* bits */ 416, 4708 /* flags */ 0, 4709 }, 4710 #endif /* chips */ 4711 4712 #if defined(BCM_56370_A0) 4713 { /* SOC_FORMAT_INT_FORWARDING_3_KEY_1_DOP_BCM56370_A0fmt */ 4714 /* format FORWARDING_3_KEY_1_DOPfmt */ 4715 /* nFields */ 3, 4716 /* *fields */ soc_FORWARDING_3_KEY_1_DOP_BCM56370_A0fmt_fields, 4717 /* bits */ 416, 4718 /* flags */ 0, 4719 }, 4720 #endif /* chips */ 4721 4722 #if defined(BCM_56770_A0) || defined(BCM_56870_A0) 4723 { /* SOC_FORMAT_INT_FORWARDING_3_KEY_2_DOPfmt */ 4724 /* format FORWARDING_3_KEY_2_DOPfmt */ 4725 /* nFields */ 3, 4726 /* *fields */ soc_FORWARDING_3_KEY_2_DOPfmt_fields, 4727 /* bits */ 416, 4728 /* flags */ 0, 4729 }, 4730 #endif /* chips */ 4731 4732 #if defined(BCM_56370_A0) 4733 { /* SOC_FORMAT_INT_FORWARDING_3_KEY_2_DOP_BCM56370_A0fmt */ 4734 /* format FORWARDING_3_KEY_2_DOPfmt */ 4735 /* nFields */ 3, 4736 /* *fields */ soc_FORWARDING_3_KEY_2_DOP_BCM56370_A0fmt_fields, 4737 /* bits */ 416, 4738 /* flags */ 0, 4739 }, 4740 #endif /* chips */ 4741 4742 #if defined(BCM_56770_A0) || defined(BCM_56870_A0) 4743 { /* SOC_FORMAT_INT_FORWARDING_3_KEY_3_DOPfmt */ 4744 /* format FORWARDING_3_KEY_3_DOPfmt */ 4745 /* nFields */ 3, 4746 /* *fields */ soc_FORWARDING_3_KEY_3_DOPfmt_fields, 4747 /* bits */ 416, 4748 /* flags */ 0, 4749 }, 4750 #endif /* chips */ 4751 4752 #if defined(BCM_56370_A0) 4753 { /* SOC_FORMAT_INT_FORWARDING_3_KEY_3_DOP_BCM56370_A0fmt */ 4754 /* format FORWARDING_3_KEY_3_DOPfmt */ 4755 /* nFields */ 3, 4756 /* *fields */ soc_FORWARDING_3_KEY_3_DOP_BCM56370_A0fmt_fields, 4757 /* bits */ 416, 4758 /* flags */ 0, 4759 }, 4760 #endif /* chips */ 4761 4762 #if defined(BCM_56870_A0) 4763 { /* SOC_FORMAT_INT_FORWARDING_3_LKUP_DOPfmt */ 4764 /* format FORWARDING_3_LKUP_DOPfmt */ 4765 /* nFields */ 10, 4766 /* *fields */ soc_FORWARDING_1_LKUP_DOPfmt_fields, 4767 /* bits */ 64, 4768 /* flags */ 0, 4769 }, 4770 #endif /* chips */ 4771 4772 #if defined(BCM_56370_A0) 4773 { /* SOC_FORMAT_INT_FORWARDING_3_LKUP_DOP_BCM56370_A0fmt */ 4774 /* format FORWARDING_3_LKUP_DOPfmt */ 4775 /* nFields */ 10, 4776 /* *fields */ soc_FORWARDING_1_LKUP_DOP_BCM56370_A0fmt_fields, 4777 /* bits */ 64, 4778 /* flags */ 0, 4779 }, 4780 #endif /* chips */ 4781 4782 #if defined(BCM_56770_A0) 4783 { /* SOC_FORMAT_INT_FORWARDING_3_LKUP_DOP_BCM56770_A0fmt */ 4784 /* format FORWARDING_3_LKUP_DOPfmt */ 4785 /* nFields */ 9, 4786 /* *fields */ soc_FORWARDING_1_LKUP_DOP_BCM56770_A0fmt_fields, 4787 /* bits */ 64, 4788 /* flags */ 0, 4789 }, 4790 #endif /* chips */ 4791 4792 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 4793 defined(BCM_56870_A0) 4794 { /* SOC_FORMAT_INT_FORWARDING_3_MISC_ATTRIBUTES_ACTION_SETfmt */ 4795 /* format FORWARDING_3_MISC_ATTRIBUTES_ACTION_SETfmt */ 4796 /* nFields */ 6, 4797 /* *fields */ soc_FORWARDING_3_MISC_ATTRIBUTES_ACTION_SETfmt_fields, 4798 /* bits */ 6, 4799 /* flags */ 0, 4800 }, 4801 #endif /* chips */ 4802 4803 #if defined(BCM_56870_A0) 4804 { /* SOC_FORMAT_INT_FORWARDING_3_PDD_OUT_BUSfmt */ 4805 /* format FORWARDING_3_PDD_OUT_BUSfmt */ 4806 /* nFields */ 102, 4807 /* *fields */ soc_FORWARDING_3_PDD_OUT_BUSfmt_fields, 4808 /* bits */ 249, 4809 /* flags */ 0, 4810 }, 4811 #endif /* chips */ 4812 4813 #if defined(BCM_56370_A0) 4814 { /* SOC_FORMAT_INT_FORWARDING_3_PDD_OUT_BUS_BCM56370_A0fmt */ 4815 /* format FORWARDING_3_PDD_OUT_BUSfmt */ 4816 /* nFields */ 103, 4817 /* *fields */ soc_FORWARDING_3_PDD_OUT_BUS_BCM56370_A0fmt_fields, 4818 /* bits */ 257, 4819 /* flags */ 0, 4820 }, 4821 #endif /* chips */ 4822 4823 #if defined(BCM_56770_A0) 4824 { /* SOC_FORMAT_INT_FORWARDING_3_PDD_OUT_BUS_BCM56770_A0fmt */ 4825 /* format FORWARDING_3_PDD_OUT_BUSfmt */ 4826 /* nFields */ 103, 4827 /* *fields */ soc_FORWARDING_3_PDD_OUT_BUS_BCM56370_A0fmt_fields, 4828 /* bits */ 257, 4829 /* flags */ 0, 4830 }, 4831 #endif /* chips */ 4832 4833 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 4834 defined(BCM_56870_A0) 4835 { /* SOC_FORMAT_INT_FORWARDING_FLEX_KEY_GEN_IN_BUSfmt */ 4836 /* format FORWARDING_FLEX_KEY_GEN_IN_BUSfmt */ 4837 /* nFields */ 2, 4838 /* *fields */ soc_FORWARDING_FLEX_KEY_GEN_IN_BUSfmt_fields, 4839 /* bits */ 1696, 4840 /* flags */ 0, 4841 }, 4842 #endif /* chips */ 4843 4844 #if defined(BCM_56770_A0) || defined(BCM_56870_A0) 4845 { /* SOC_FORMAT_INT_FORWARDING_KEYGEN_OBJECT_BUSfmt */ 4846 /* format FORWARDING_KEYGEN_OBJECT_BUSfmt */ 4847 /* nFields */ 69, 4848 /* *fields */ soc_FORWARDING_KEYGEN_OBJECT_BUSfmt_fields, 4849 /* bits */ 672, 4850 /* flags */ 0, 4851 }, 4852 #endif /* chips */ 4853 4854 #if defined(BCM_56370_A0) 4855 { /* SOC_FORMAT_INT_FORWARDING_KEYGEN_OBJECT_BUS_BCM56370_A0fmt */ 4856 /* format FORWARDING_KEYGEN_OBJECT_BUSfmt */ 4857 /* nFields */ 74, 4858 /* *fields */ soc_FORWARDING_KEYGEN_OBJECT_BUS_BCM56370_A0fmt_fields, 4859 /* bits */ 672, 4860 /* flags */ 0, 4861 }, 4862 #endif /* chips */ 4863 4864 #if defined(BCM_56514_A0) 4865 { /* SOC_FORMAT_INT_FPfmt */ 4866 /* format FPfmt */ 4867 /* nFields */ 134, 4868 /* *fields */ soc_FPfmt_fields, 4869 /* bits */ 128, 4870 /* flags */ 0, 4871 }, 4872 #endif /* chips */ 4873 4874 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 4875 { /* SOC_FORMAT_INT_FP_COPY_TO_CPU_SETfmt */ 4876 /* format FP_COPY_TO_CPU_SETfmt */ 4877 /* nFields */ 5, 4878 /* *fields */ soc_FP_COPY_TO_CPU_SETfmt_fields, 4879 /* bits */ 18, 4880 /* flags */ 0, 4881 }, 4882 #endif /* chips */ 4883 4884 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 4885 { /* SOC_FORMAT_INT_FP_COUNTER_SETfmt */ 4886 /* format FP_COUNTER_SETfmt */ 4887 /* nFields */ 5, 4888 /* *fields */ soc_FP_COUNTER_SETfmt_fields, 4889 /* bits */ 20, 4890 /* flags */ 0, 4891 }, 4892 #endif /* chips */ 4893 4894 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 4895 { /* SOC_FORMAT_INT_FP_CPU_COS_SETfmt */ 4896 /* format FP_CPU_COS_SETfmt */ 4897 /* nFields */ 2, 4898 /* *fields */ soc_FP_CPU_COS_SETfmt_fields, 4899 /* bits */ 8, 4900 /* flags */ 0, 4901 }, 4902 #endif /* chips */ 4903 4904 #if defined(BCM_56514_A0) 4905 { /* SOC_FORMAT_INT_FP_DWfmt */ 4906 /* format FP_DWfmt */ 4907 /* nFields */ 14, 4908 /* *fields */ soc_FP_DWfmt_fields, 4909 /* bits */ 128, 4910 /* flags */ 0, 4911 }, 4912 #endif /* chips */ 4913 4914 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 4915 { /* SOC_FORMAT_INT_FP_GOA_SETfmt */ 4916 /* format FP_GOA_SETfmt */ 4917 /* nFields */ 7, 4918 /* *fields */ soc_FP_GOA_SETfmt_fields, 4919 /* bits */ 7, 4920 /* flags */ 0, 4921 }, 4922 #endif /* chips */ 4923 4924 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 4925 defined(BCM_56870_A0) 4926 { /* SOC_FORMAT_INT_FP_HGPRXY_AUX_HDR_BITMAPfmt */ 4927 /* format FP_HGPRXY_AUX_HDR_BITMAPfmt */ 4928 /* nFields */ 22, 4929 /* *fields */ soc_FP_HGPRXY_AUX_HDR_BITMAPfmt_fields, 4930 /* bits */ 22, 4931 /* flags */ 0, 4932 }, 4933 #endif /* chips */ 4934 4935 #if defined(BCM_56640_A0) 4936 { /* SOC_FORMAT_INT_FP_L3SW_L2_FIELDS_SETfmt */ 4937 /* format FP_L3SW_L2_FIELDS_SETfmt */ 4938 /* nFields */ 15, 4939 /* *fields */ soc_FP_L3SW_L2_FIELDS_SETfmt_fields, 4940 /* bits */ 23, 4941 /* flags */ 0, 4942 }, 4943 #endif /* chips */ 4944 4945 #if defined(BCM_56340_A0) 4946 { /* SOC_FORMAT_INT_FP_L3SW_L2_FIELDS_SET_BCM56340_A0fmt */ 4947 /* format FP_L3SW_L2_FIELDS_SETfmt */ 4948 /* nFields */ 15, 4949 /* *fields */ soc_FP_L3SW_L2_FIELDS_SET_BCM56340_A0fmt_fields, 4950 /* bits */ 23, 4951 /* flags */ 0, 4952 }, 4953 #endif /* chips */ 4954 4955 #if defined(BCM_56504_A0) 4956 { /* SOC_FORMAT_INT_FP_LOOKUPfmt */ 4957 /* format FP_LOOKUPfmt */ 4958 /* nFields */ 15, 4959 /* *fields */ soc_FP_LOOKUPfmt_fields, 4960 /* bits */ 16, 4961 /* flags */ 0, 4962 }, 4963 #endif /* chips */ 4964 4965 #if defined(BCM_53314_A0) 4966 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM53314_A0fmt */ 4967 /* format FP_LOOKUPfmt */ 4968 /* nFields */ 15, 4969 /* *fields */ soc_FP_LOOKUPfmt_fields, 4970 /* bits */ 16, 4971 /* flags */ 0, 4972 }, 4973 #endif /* chips */ 4974 4975 #if defined(BCM_53324_A0) 4976 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM53324_A0fmt */ 4977 /* format FP_LOOKUPfmt */ 4978 /* nFields */ 15, 4979 /* *fields */ soc_FP_LOOKUPfmt_fields, 4980 /* bits */ 16, 4981 /* flags */ 0, 4982 }, 4983 #endif /* chips */ 4984 4985 #if defined(BCM_53400_A0) 4986 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM53400_A0fmt */ 4987 /* format FP_LOOKUPfmt */ 4988 /* nFields */ 15, 4989 /* *fields */ soc_FP_LOOKUP_BCM53400_A0fmt_fields, 4990 /* bits */ 16, 4991 /* flags */ 0, 4992 }, 4993 #endif /* chips */ 4994 4995 #if defined(BCM_53540_A0) 4996 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM53540_A0fmt */ 4997 /* format FP_LOOKUPfmt */ 4998 /* nFields */ 15, 4999 /* *fields */ soc_FP_LOOKUP_BCM53400_A0fmt_fields, 5000 /* bits */ 16, 5001 /* flags */ 0, 5002 }, 5003 #endif /* chips */ 5004 5005 #if defined(BCM_53570_A0) 5006 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM53570_A0fmt */ 5007 /* format FP_LOOKUPfmt */ 5008 /* nFields */ 15, 5009 /* *fields */ soc_FP_LOOKUP_BCM53400_A0fmt_fields, 5010 /* bits */ 16, 5011 /* flags */ 0, 5012 }, 5013 #endif /* chips */ 5014 5015 #if defined(BCM_53570_B0) 5016 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM53570_B0fmt */ 5017 /* format FP_LOOKUPfmt */ 5018 /* nFields */ 15, 5019 /* *fields */ soc_FP_LOOKUP_BCM53400_A0fmt_fields, 5020 /* bits */ 16, 5021 /* flags */ 0, 5022 }, 5023 #endif /* chips */ 5024 5025 #if defined(BCM_56142_A0) 5026 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56142_A0fmt */ 5027 /* format FP_LOOKUPfmt */ 5028 /* nFields */ 15, 5029 /* *fields */ soc_FP_LOOKUP_BCM56624_A0fmt_fields, 5030 /* bits */ 16, 5031 /* flags */ 0, 5032 }, 5033 #endif /* chips */ 5034 5035 #if defined(BCM_56150_A0) 5036 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56150_A0fmt */ 5037 /* format FP_LOOKUPfmt */ 5038 /* nFields */ 15, 5039 /* *fields */ soc_FP_LOOKUP_BCM56850_A0fmt_fields, 5040 /* bits */ 16, 5041 /* flags */ 0, 5042 }, 5043 #endif /* chips */ 5044 5045 #if defined(BCM_56160_A0) 5046 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56160_A0fmt */ 5047 /* format FP_LOOKUPfmt */ 5048 /* nFields */ 15, 5049 /* *fields */ soc_FP_LOOKUP_BCM53400_A0fmt_fields, 5050 /* bits */ 16, 5051 /* flags */ 0, 5052 }, 5053 #endif /* chips */ 5054 5055 #if defined(BCM_56224_A0) 5056 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56224_A0fmt */ 5057 /* format FP_LOOKUPfmt */ 5058 /* nFields */ 15, 5059 /* *fields */ soc_FP_LOOKUPfmt_fields, 5060 /* bits */ 16, 5061 /* flags */ 0, 5062 }, 5063 #endif /* chips */ 5064 5065 #if defined(BCM_56224_B0) 5066 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56224_B0fmt */ 5067 /* format FP_LOOKUPfmt */ 5068 /* nFields */ 15, 5069 /* *fields */ soc_FP_LOOKUPfmt_fields, 5070 /* bits */ 16, 5071 /* flags */ 0, 5072 }, 5073 #endif /* chips */ 5074 5075 #if defined(BCM_56260_A0) 5076 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56260_A0fmt */ 5077 /* format FP_LOOKUPfmt */ 5078 /* nFields */ 16, 5079 /* *fields */ soc_FP_LOOKUP_BCM56260_A0fmt_fields, 5080 /* bits */ 18, 5081 /* flags */ 0, 5082 }, 5083 #endif /* chips */ 5084 5085 #if defined(BCM_56260_B0) 5086 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56260_B0fmt */ 5087 /* format FP_LOOKUPfmt */ 5088 /* nFields */ 16, 5089 /* *fields */ soc_FP_LOOKUP_BCM56260_A0fmt_fields, 5090 /* bits */ 18, 5091 /* flags */ 0, 5092 }, 5093 #endif /* chips */ 5094 5095 #if defined(BCM_56270_A0) 5096 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56270_A0fmt */ 5097 /* format FP_LOOKUPfmt */ 5098 /* nFields */ 16, 5099 /* *fields */ soc_FP_LOOKUP_BCM56260_A0fmt_fields, 5100 /* bits */ 18, 5101 /* flags */ 0, 5102 }, 5103 #endif /* chips */ 5104 5105 #if defined(BCM_56314_A0) 5106 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56314_A0fmt */ 5107 /* format FP_LOOKUPfmt */ 5108 /* nFields */ 15, 5109 /* *fields */ soc_FP_LOOKUPfmt_fields, 5110 /* bits */ 16, 5111 /* flags */ 0, 5112 }, 5113 #endif /* chips */ 5114 5115 #if defined(BCM_56334_A0) 5116 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56334_A0fmt */ 5117 /* format FP_LOOKUPfmt */ 5118 /* nFields */ 15, 5119 /* *fields */ soc_FP_LOOKUP_BCM56624_A0fmt_fields, 5120 /* bits */ 16, 5121 /* flags */ 0, 5122 }, 5123 #endif /* chips */ 5124 5125 #if defined(BCM_56334_B0) 5126 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56334_B0fmt */ 5127 /* format FP_LOOKUPfmt */ 5128 /* nFields */ 15, 5129 /* *fields */ soc_FP_LOOKUP_BCM56624_A0fmt_fields, 5130 /* bits */ 16, 5131 /* flags */ 0, 5132 }, 5133 #endif /* chips */ 5134 5135 #if defined(BCM_56440_A0) 5136 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56440_A0fmt */ 5137 /* format FP_LOOKUPfmt */ 5138 /* nFields */ 15, 5139 /* *fields */ soc_FP_LOOKUP_BCM56624_A0fmt_fields, 5140 /* bits */ 16, 5141 /* flags */ 0, 5142 }, 5143 #endif /* chips */ 5144 5145 #if defined(BCM_56440_B0) 5146 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56440_B0fmt */ 5147 /* format FP_LOOKUPfmt */ 5148 /* nFields */ 15, 5149 /* *fields */ soc_FP_LOOKUP_BCM56624_A0fmt_fields, 5150 /* bits */ 16, 5151 /* flags */ 0, 5152 }, 5153 #endif /* chips */ 5154 5155 #if defined(BCM_56450_A0) 5156 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56450_A0fmt */ 5157 /* format FP_LOOKUPfmt */ 5158 /* nFields */ 16, 5159 /* *fields */ soc_FP_LOOKUP_BCM56450_A0fmt_fields, 5160 /* bits */ 18, 5161 /* flags */ 0, 5162 }, 5163 #endif /* chips */ 5164 5165 #if defined(BCM_56450_B0) 5166 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56450_B0fmt */ 5167 /* format FP_LOOKUPfmt */ 5168 /* nFields */ 16, 5169 /* *fields */ soc_FP_LOOKUP_BCM56450_A0fmt_fields, 5170 /* bits */ 18, 5171 /* flags */ 0, 5172 }, 5173 #endif /* chips */ 5174 5175 #if defined(BCM_56450_B1) 5176 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56450_B1fmt */ 5177 /* format FP_LOOKUPfmt */ 5178 /* nFields */ 16, 5179 /* *fields */ soc_FP_LOOKUP_BCM56450_A0fmt_fields, 5180 /* bits */ 18, 5181 /* flags */ 0, 5182 }, 5183 #endif /* chips */ 5184 5185 #if defined(BCM_56504_B0) 5186 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56504_B0fmt */ 5187 /* format FP_LOOKUPfmt */ 5188 /* nFields */ 15, 5189 /* *fields */ soc_FP_LOOKUPfmt_fields, 5190 /* bits */ 16, 5191 /* flags */ 0, 5192 }, 5193 #endif /* chips */ 5194 5195 #if defined(BCM_56514_A0) 5196 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56514_A0fmt */ 5197 /* format FP_LOOKUPfmt */ 5198 /* nFields */ 15, 5199 /* *fields */ soc_FP_LOOKUPfmt_fields, 5200 /* bits */ 16, 5201 /* flags */ 0, 5202 }, 5203 #endif /* chips */ 5204 5205 #if defined(BCM_56524_A0) 5206 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56524_A0fmt */ 5207 /* format FP_LOOKUPfmt */ 5208 /* nFields */ 15, 5209 /* *fields */ soc_FP_LOOKUP_BCM56624_A0fmt_fields, 5210 /* bits */ 16, 5211 /* flags */ 0, 5212 }, 5213 #endif /* chips */ 5214 5215 #if defined(BCM_56524_B0) 5216 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56524_B0fmt */ 5217 /* format FP_LOOKUPfmt */ 5218 /* nFields */ 15, 5219 /* *fields */ soc_FP_LOOKUP_BCM56624_A0fmt_fields, 5220 /* bits */ 16, 5221 /* flags */ 0, 5222 }, 5223 #endif /* chips */ 5224 5225 #if defined(BCM_56624_A0) 5226 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56624_A0fmt */ 5227 /* format FP_LOOKUPfmt */ 5228 /* nFields */ 15, 5229 /* *fields */ soc_FP_LOOKUP_BCM56624_A0fmt_fields, 5230 /* bits */ 16, 5231 /* flags */ 0, 5232 }, 5233 #endif /* chips */ 5234 5235 #if defined(BCM_56624_B0) 5236 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56624_B0fmt */ 5237 /* format FP_LOOKUPfmt */ 5238 /* nFields */ 15, 5239 /* *fields */ soc_FP_LOOKUP_BCM56624_A0fmt_fields, 5240 /* bits */ 16, 5241 /* flags */ 0, 5242 }, 5243 #endif /* chips */ 5244 5245 #if defined(BCM_56634_A0) 5246 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56634_A0fmt */ 5247 /* format FP_LOOKUPfmt */ 5248 /* nFields */ 15, 5249 /* *fields */ soc_FP_LOOKUP_BCM56624_A0fmt_fields, 5250 /* bits */ 16, 5251 /* flags */ 0, 5252 }, 5253 #endif /* chips */ 5254 5255 #if defined(BCM_56634_B0) 5256 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56634_B0fmt */ 5257 /* format FP_LOOKUPfmt */ 5258 /* nFields */ 15, 5259 /* *fields */ soc_FP_LOOKUP_BCM56624_A0fmt_fields, 5260 /* bits */ 16, 5261 /* flags */ 0, 5262 }, 5263 #endif /* chips */ 5264 5265 #if defined(BCM_56680_A0) 5266 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56680_A0fmt */ 5267 /* format FP_LOOKUPfmt */ 5268 /* nFields */ 15, 5269 /* *fields */ soc_FP_LOOKUP_BCM56624_A0fmt_fields, 5270 /* bits */ 16, 5271 /* flags */ 0, 5272 }, 5273 #endif /* chips */ 5274 5275 #if defined(BCM_56680_B0) 5276 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56680_B0fmt */ 5277 /* format FP_LOOKUPfmt */ 5278 /* nFields */ 15, 5279 /* *fields */ soc_FP_LOOKUP_BCM56624_A0fmt_fields, 5280 /* bits */ 16, 5281 /* flags */ 0, 5282 }, 5283 #endif /* chips */ 5284 5285 #if defined(BCM_56685_A0) 5286 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56685_A0fmt */ 5287 /* format FP_LOOKUPfmt */ 5288 /* nFields */ 15, 5289 /* *fields */ soc_FP_LOOKUP_BCM56624_A0fmt_fields, 5290 /* bits */ 16, 5291 /* flags */ 0, 5292 }, 5293 #endif /* chips */ 5294 5295 #if defined(BCM_56685_B0) 5296 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56685_B0fmt */ 5297 /* format FP_LOOKUPfmt */ 5298 /* nFields */ 15, 5299 /* *fields */ soc_FP_LOOKUP_BCM56624_A0fmt_fields, 5300 /* bits */ 16, 5301 /* flags */ 0, 5302 }, 5303 #endif /* chips */ 5304 5305 #if defined(BCM_56725_A0) 5306 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56725_A0fmt */ 5307 /* format FP_LOOKUPfmt */ 5308 /* nFields */ 15, 5309 /* *fields */ soc_FP_LOOKUP_BCM56820_A0fmt_fields, 5310 /* bits */ 16, 5311 /* flags */ 0, 5312 }, 5313 #endif /* chips */ 5314 5315 #if defined(BCM_56800_A0) 5316 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56800_A0fmt */ 5317 /* format FP_LOOKUPfmt */ 5318 /* nFields */ 15, 5319 /* *fields */ soc_FP_LOOKUPfmt_fields, 5320 /* bits */ 16, 5321 /* flags */ 0, 5322 }, 5323 #endif /* chips */ 5324 5325 #if defined(BCM_56820_A0) 5326 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56820_A0fmt */ 5327 /* format FP_LOOKUPfmt */ 5328 /* nFields */ 15, 5329 /* *fields */ soc_FP_LOOKUP_BCM56820_A0fmt_fields, 5330 /* bits */ 16, 5331 /* flags */ 0, 5332 }, 5333 #endif /* chips */ 5334 5335 #if defined(BCM_56840_A0) 5336 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56840_A0fmt */ 5337 /* format FP_LOOKUPfmt */ 5338 /* nFields */ 15, 5339 /* *fields */ soc_FP_LOOKUP_BCM56624_A0fmt_fields, 5340 /* bits */ 16, 5341 /* flags */ 0, 5342 }, 5343 #endif /* chips */ 5344 5345 #if defined(BCM_56840_B0) 5346 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56840_B0fmt */ 5347 /* format FP_LOOKUPfmt */ 5348 /* nFields */ 15, 5349 /* *fields */ soc_FP_LOOKUP_BCM56624_A0fmt_fields, 5350 /* bits */ 16, 5351 /* flags */ 0, 5352 }, 5353 #endif /* chips */ 5354 5355 #if defined(BCM_56850_A0) 5356 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM56850_A0fmt */ 5357 /* format FP_LOOKUPfmt */ 5358 /* nFields */ 15, 5359 /* *fields */ soc_FP_LOOKUP_BCM56850_A0fmt_fields, 5360 /* bits */ 16, 5361 /* flags */ 0, 5362 }, 5363 #endif /* chips */ 5364 5365 #if defined(BCM_88732_A0) 5366 { /* SOC_FORMAT_INT_FP_LOOKUP_BCM88732_A0fmt */ 5367 /* format FP_LOOKUPfmt */ 5368 /* nFields */ 10, 5369 /* *fields */ soc_FP_LOOKUP_BCM88732_A0fmt_fields, 5370 /* bits */ 16, 5371 /* flags */ 0, 5372 }, 5373 #endif /* chips */ 5374 5375 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 5376 { /* SOC_FORMAT_INT_FP_LOOKUP_STATUS_VECTORfmt */ 5377 /* format FP_LOOKUP_STATUS_VECTORfmt */ 5378 /* nFields */ 18, 5379 /* *fields */ soc_FP_LOOKUP_STATUS_VECTORfmt_fields, 5380 /* bits */ 20, 5381 /* flags */ 0, 5382 }, 5383 #endif /* chips */ 5384 5385 #if defined(BCM_56560_A0) 5386 { /* SOC_FORMAT_INT_FP_LOOKUP_STATUS_VECTOR_BCM56560_A0fmt */ 5387 /* format FP_LOOKUP_STATUS_VECTORfmt */ 5388 /* nFields */ 17, 5389 /* *fields */ soc_FP_LOOKUP_STATUS_VECTOR_BCM56560_A0fmt_fields, 5390 /* bits */ 20, 5391 /* flags */ 0, 5392 }, 5393 #endif /* chips */ 5394 5395 #if defined(BCM_56560_B0) 5396 { /* SOC_FORMAT_INT_FP_LOOKUP_STATUS_VECTOR_BCM56560_B0fmt */ 5397 /* format FP_LOOKUP_STATUS_VECTORfmt */ 5398 /* nFields */ 17, 5399 /* *fields */ soc_FP_LOOKUP_STATUS_VECTOR_BCM56560_A0fmt_fields, 5400 /* bits */ 20, 5401 /* flags */ 0, 5402 }, 5403 #endif /* chips */ 5404 5405 #if defined(BCM_56670_A0) 5406 { /* SOC_FORMAT_INT_FP_LOOKUP_STATUS_VECTOR_BCM56670_A0fmt */ 5407 /* format FP_LOOKUP_STATUS_VECTORfmt */ 5408 /* nFields */ 17, 5409 /* *fields */ soc_FP_LOOKUP_STATUS_VECTOR_BCM56560_A0fmt_fields, 5410 /* bits */ 20, 5411 /* flags */ 0, 5412 }, 5413 #endif /* chips */ 5414 5415 #if defined(BCM_56670_B0) 5416 { /* SOC_FORMAT_INT_FP_LOOKUP_STATUS_VECTOR_BCM56670_B0fmt */ 5417 /* format FP_LOOKUP_STATUS_VECTORfmt */ 5418 /* nFields */ 17, 5419 /* *fields */ soc_FP_LOOKUP_STATUS_VECTOR_BCM56560_A0fmt_fields, 5420 /* bits */ 20, 5421 /* flags */ 0, 5422 }, 5423 #endif /* chips */ 5424 5425 #if defined(BCM_56850_A0) 5426 { /* SOC_FORMAT_INT_FP_LOOKUP_STATUS_VECTOR_BCM56850_A0fmt */ 5427 /* format FP_LOOKUP_STATUS_VECTORfmt */ 5428 /* nFields */ 17, 5429 /* *fields */ soc_FP_LOOKUP_STATUS_VECTOR_BCM56850_A0fmt_fields, 5430 /* bits */ 20, 5431 /* flags */ 0, 5432 }, 5433 #endif /* chips */ 5434 5435 #if defined(BCM_56860_A0) 5436 { /* SOC_FORMAT_INT_FP_LOOKUP_STATUS_VECTOR_BCM56860_A0fmt */ 5437 /* format FP_LOOKUP_STATUS_VECTORfmt */ 5438 /* nFields */ 17, 5439 /* *fields */ soc_FP_LOOKUP_STATUS_VECTOR_BCM56850_A0fmt_fields, 5440 /* bits */ 20, 5441 /* flags */ 0, 5442 }, 5443 #endif /* chips */ 5444 5445 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 5446 { /* SOC_FORMAT_INT_FP_METER_SETfmt */ 5447 /* format FP_METER_SETfmt */ 5448 /* nFields */ 7, 5449 /* *fields */ soc_FP_METER_SETfmt_fields, 5450 /* bits */ 19, 5451 /* flags */ 0, 5452 }, 5453 #endif /* chips */ 5454 5455 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 5456 { /* SOC_FORMAT_INT_FP_MIRROR_SETfmt */ 5457 /* format FP_MIRROR_SETfmt */ 5458 /* nFields */ 5, 5459 /* *fields */ soc_FP_MIRROR_SETfmt_fields, 5460 /* bits */ 12, 5461 /* flags */ 0, 5462 }, 5463 #endif /* chips */ 5464 5465 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 5466 { /* SOC_FORMAT_INT_FP_MISC_1_SETfmt */ 5467 /* format FP_MISC_1_SETfmt */ 5468 /* nFields */ 10, 5469 /* *fields */ soc_FP_MISC_1_SETfmt_fields, 5470 /* bits */ 10, 5471 /* flags */ 0, 5472 }, 5473 #endif /* chips */ 5474 5475 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 5476 { /* SOC_FORMAT_INT_FP_MISC_2_SETfmt */ 5477 /* format FP_MISC_2_SETfmt */ 5478 /* nFields */ 7, 5479 /* *fields */ soc_FP_MISC_2_SETfmt_fields, 5480 /* bits */ 14, 5481 /* flags */ 0, 5482 }, 5483 #endif /* chips */ 5484 5485 #if defined(BCM_56150_A0) || defined(BCM_56340_A0) || \ 5486 defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 5487 defined(BCM_56450_B1) || defined(BCM_56640_A0) || \ 5488 defined(BCM_56850_A0) || defined(BCM_56860_A0) 5489 { /* SOC_FORMAT_INT_FP_MPLS_LABELfmt */ 5490 /* format FP_MPLS_LABELfmt */ 5491 /* nFields */ 1, 5492 /* *fields */ soc_FP_MPLS_LABELfmt_fields, 5493 /* bits */ 3, 5494 /* flags */ 0, 5495 }, 5496 #endif /* chips */ 5497 5498 #if defined(BCM_53400_A0) 5499 { /* SOC_FORMAT_INT_FP_MPLS_LABEL_BCM53400_A0fmt */ 5500 /* format FP_MPLS_LABELfmt */ 5501 /* nFields */ 1, 5502 /* *fields */ soc_FP_MPLS_LABEL_BCM53400_A0fmt_fields, 5503 /* bits */ 3, 5504 /* flags */ 0, 5505 }, 5506 #endif /* chips */ 5507 5508 #if defined(BCM_53540_A0) 5509 { /* SOC_FORMAT_INT_FP_MPLS_LABEL_BCM53540_A0fmt */ 5510 /* format FP_MPLS_LABELfmt */ 5511 /* nFields */ 1, 5512 /* *fields */ soc_FP_MPLS_LABEL_BCM53400_A0fmt_fields, 5513 /* bits */ 3, 5514 /* flags */ 0, 5515 }, 5516 #endif /* chips */ 5517 5518 #if defined(BCM_53570_A0) 5519 { /* SOC_FORMAT_INT_FP_MPLS_LABEL_BCM53570_A0fmt */ 5520 /* format FP_MPLS_LABELfmt */ 5521 /* nFields */ 1, 5522 /* *fields */ soc_FP_MPLS_LABEL_BCM53400_A0fmt_fields, 5523 /* bits */ 3, 5524 /* flags */ 0, 5525 }, 5526 #endif /* chips */ 5527 5528 #if defined(BCM_53570_B0) 5529 { /* SOC_FORMAT_INT_FP_MPLS_LABEL_BCM53570_B0fmt */ 5530 /* format FP_MPLS_LABELfmt */ 5531 /* nFields */ 1, 5532 /* *fields */ soc_FP_MPLS_LABEL_BCM53400_A0fmt_fields, 5533 /* bits */ 3, 5534 /* flags */ 0, 5535 }, 5536 #endif /* chips */ 5537 5538 #if defined(BCM_56160_A0) 5539 { /* SOC_FORMAT_INT_FP_MPLS_LABEL_BCM56160_A0fmt */ 5540 /* format FP_MPLS_LABELfmt */ 5541 /* nFields */ 1, 5542 /* *fields */ soc_FP_MPLS_LABEL_BCM53400_A0fmt_fields, 5543 /* bits */ 3, 5544 /* flags */ 0, 5545 }, 5546 #endif /* chips */ 5547 5548 #if defined(BCM_56260_A0) 5549 { /* SOC_FORMAT_INT_FP_MPLS_LABEL_BCM56260_A0fmt */ 5550 /* format FP_MPLS_LABELfmt */ 5551 /* nFields */ 1, 5552 /* *fields */ soc_FP_MPLS_LABEL_BCM53400_A0fmt_fields, 5553 /* bits */ 3, 5554 /* flags */ 0, 5555 }, 5556 #endif /* chips */ 5557 5558 #if defined(BCM_56260_B0) 5559 { /* SOC_FORMAT_INT_FP_MPLS_LABEL_BCM56260_B0fmt */ 5560 /* format FP_MPLS_LABELfmt */ 5561 /* nFields */ 1, 5562 /* *fields */ soc_FP_MPLS_LABEL_BCM53400_A0fmt_fields, 5563 /* bits */ 3, 5564 /* flags */ 0, 5565 }, 5566 #endif /* chips */ 5567 5568 #if defined(BCM_56270_A0) 5569 { /* SOC_FORMAT_INT_FP_MPLS_LABEL_BCM56270_A0fmt */ 5570 /* format FP_MPLS_LABELfmt */ 5571 /* nFields */ 1, 5572 /* *fields */ soc_FP_MPLS_LABEL_BCM53400_A0fmt_fields, 5573 /* bits */ 3, 5574 /* flags */ 0, 5575 }, 5576 #endif /* chips */ 5577 5578 #if defined(BCM_56560_A0) 5579 { /* SOC_FORMAT_INT_FP_MPLS_LABEL_BCM56560_A0fmt */ 5580 /* format FP_MPLS_LABELfmt */ 5581 /* nFields */ 1, 5582 /* *fields */ soc_FP_MPLS_LABEL_BCM53400_A0fmt_fields, 5583 /* bits */ 3, 5584 /* flags */ 0, 5585 }, 5586 #endif /* chips */ 5587 5588 #if defined(BCM_56560_B0) 5589 { /* SOC_FORMAT_INT_FP_MPLS_LABEL_BCM56560_B0fmt */ 5590 /* format FP_MPLS_LABELfmt */ 5591 /* nFields */ 1, 5592 /* *fields */ soc_FP_MPLS_LABEL_BCM53400_A0fmt_fields, 5593 /* bits */ 3, 5594 /* flags */ 0, 5595 }, 5596 #endif /* chips */ 5597 5598 #if defined(BCM_56670_A0) 5599 { /* SOC_FORMAT_INT_FP_MPLS_LABEL_BCM56670_A0fmt */ 5600 /* format FP_MPLS_LABELfmt */ 5601 /* nFields */ 1, 5602 /* *fields */ soc_FP_MPLS_LABEL_BCM53400_A0fmt_fields, 5603 /* bits */ 3, 5604 /* flags */ 0, 5605 }, 5606 #endif /* chips */ 5607 5608 #if defined(BCM_56670_B0) 5609 { /* SOC_FORMAT_INT_FP_MPLS_LABEL_BCM56670_B0fmt */ 5610 /* format FP_MPLS_LABELfmt */ 5611 /* nFields */ 1, 5612 /* *fields */ soc_FP_MPLS_LABEL_BCM53400_A0fmt_fields, 5613 /* bits */ 3, 5614 /* flags */ 0, 5615 }, 5616 #endif /* chips */ 5617 5618 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 5619 { /* SOC_FORMAT_INT_FP_OAM_SETfmt */ 5620 /* format FP_OAM_SETfmt */ 5621 /* nFields */ 12, 5622 /* *fields */ soc_FP_OAM_SETfmt_fields, 5623 /* bits */ 32, 5624 /* flags */ 0, 5625 }, 5626 #endif /* chips */ 5627 5628 #if defined(BCM_56850_A0) 5629 { /* SOC_FORMAT_INT_FP_PORT_FIELD_SEL_SLICE_ENTRY_0_11fmt */ 5630 /* format FP_PORT_FIELD_SEL_SLICE_ENTRY_0_11fmt */ 5631 /* nFields */ 10, 5632 /* *fields */ soc_FP_PORT_FIELD_SEL_SLICE_ENTRY_0_11fmt_fields, 5633 /* bits */ 26, 5634 /* flags */ 0, 5635 }, 5636 #endif /* chips */ 5637 5638 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 5639 { /* SOC_FORMAT_INT_FP_PORT_FIELD_SEL_SLICE_ENTRY_0_15fmt */ 5640 /* format FP_PORT_FIELD_SEL_SLICE_ENTRY_0_15fmt */ 5641 /* nFields */ 10, 5642 /* *fields */ soc_FP_PORT_FIELD_SEL_SLICE_ENTRY_0_15fmt_fields, 5643 /* bits */ 22, 5644 /* flags */ 0, 5645 }, 5646 #endif /* chips */ 5647 5648 #if defined(BCM_56560_A0) 5649 { /* SOC_FORMAT_INT_FP_PORT_FIELD_SEL_SLICE_ENTRY_0_11_BCM56560_A0fmt */ 5650 /* format FP_PORT_FIELD_SEL_SLICE_ENTRY_0_11fmt */ 5651 /* nFields */ 11, 5652 /* *fields */ soc_FP_PORT_FIELD_SEL_SLICE_ENTRY_0_11_BCM56560_A0fmt_fields, 5653 /* bits */ 27, 5654 /* flags */ 0, 5655 }, 5656 #endif /* chips */ 5657 5658 #if defined(BCM_56560_B0) 5659 { /* SOC_FORMAT_INT_FP_PORT_FIELD_SEL_SLICE_ENTRY_0_11_BCM56560_B0fmt */ 5660 /* format FP_PORT_FIELD_SEL_SLICE_ENTRY_0_11fmt */ 5661 /* nFields */ 11, 5662 /* *fields */ soc_FP_PORT_FIELD_SEL_SLICE_ENTRY_0_11_BCM56560_A0fmt_fields, 5663 /* bits */ 27, 5664 /* flags */ 0, 5665 }, 5666 #endif /* chips */ 5667 5668 #if defined(BCM_56670_A0) 5669 { /* SOC_FORMAT_INT_FP_PORT_FIELD_SEL_SLICE_ENTRY_0_11_BCM56670_A0fmt */ 5670 /* format FP_PORT_FIELD_SEL_SLICE_ENTRY_0_11fmt */ 5671 /* nFields */ 11, 5672 /* *fields */ soc_FP_PORT_FIELD_SEL_SLICE_ENTRY_0_11_BCM56560_A0fmt_fields, 5673 /* bits */ 27, 5674 /* flags */ 0, 5675 }, 5676 #endif /* chips */ 5677 5678 #if defined(BCM_56670_B0) 5679 { /* SOC_FORMAT_INT_FP_PORT_FIELD_SEL_SLICE_ENTRY_0_11_BCM56670_B0fmt */ 5680 /* format FP_PORT_FIELD_SEL_SLICE_ENTRY_0_11fmt */ 5681 /* nFields */ 11, 5682 /* *fields */ soc_FP_PORT_FIELD_SEL_SLICE_ENTRY_0_11_BCM56560_A0fmt_fields, 5683 /* bits */ 27, 5684 /* flags */ 0, 5685 }, 5686 #endif /* chips */ 5687 5688 #if defined(BCM_56860_A0) 5689 { /* SOC_FORMAT_INT_FP_PORT_FIELD_SEL_SLICE_ENTRY_0_11_BCM56860_A0fmt */ 5690 /* format FP_PORT_FIELD_SEL_SLICE_ENTRY_0_11fmt */ 5691 /* nFields */ 11, 5692 /* *fields */ soc_FP_PORT_FIELD_SEL_SLICE_ENTRY_0_11_BCM56860_A0fmt_fields, 5693 /* bits */ 27, 5694 /* flags */ 0, 5695 }, 5696 #endif /* chips */ 5697 5698 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 5699 { /* SOC_FORMAT_INT_FP_PROFILE_SETfmt */ 5700 /* format FP_PROFILE_SETfmt */ 5701 /* nFields */ 24, 5702 /* *fields */ soc_FP_PROFILE_SETfmt_fields, 5703 /* bits */ 94, 5704 /* flags */ 0, 5705 }, 5706 #endif /* chips */ 5707 5708 #if defined(BCM_56640_A0) 5709 { /* SOC_FORMAT_INT_FP_REDIRECT_SETfmt */ 5710 /* format FP_REDIRECT_SETfmt */ 5711 /* nFields */ 14, 5712 /* *fields */ soc_FP_REDIRECT_SETfmt_fields, 5713 /* bits */ 24, 5714 /* flags */ 0, 5715 }, 5716 #endif /* chips */ 5717 5718 #if defined(BCM_56340_A0) 5719 { /* SOC_FORMAT_INT_FP_REDIRECT_SET_BCM56340_A0fmt */ 5720 /* format FP_REDIRECT_SETfmt */ 5721 /* nFields */ 14, 5722 /* *fields */ soc_FP_REDIRECT_SET_BCM56340_A0fmt_fields, 5723 /* bits */ 24, 5724 /* flags */ 0, 5725 }, 5726 #endif /* chips */ 5727 5728 #if defined(BCM_53314_A0) || defined(BCM_53324_A0) || \ 5729 defined(BCM_56224_A0) || defined(BCM_56224_B0) || \ 5730 defined(BCM_56314_A0) || defined(BCM_56504_A0) || \ 5731 defined(BCM_56504_B0) || defined(BCM_56514_A0) || \ 5732 defined(BCM_56624_A0) || defined(BCM_56624_B0) || \ 5733 defined(BCM_56680_A0) || defined(BCM_56680_B0) || \ 5734 defined(BCM_56725_A0) || defined(BCM_56820_A0) 5735 { /* SOC_FORMAT_INT_FP_RESOLUTIONfmt */ 5736 /* format FP_RESOLUTIONfmt */ 5737 /* nFields */ 1, 5738 /* *fields */ soc_FP_RESOLUTIONfmt_fields, 5739 /* bits */ 4, 5740 /* flags */ 0, 5741 }, 5742 #endif /* chips */ 5743 5744 #if defined(BCM_53400_A0) 5745 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM53400_A0fmt */ 5746 /* format FP_RESOLUTIONfmt */ 5747 /* nFields */ 1, 5748 /* *fields */ soc_FP_RESOLUTION_BCM53400_A0fmt_fields, 5749 /* bits */ 5, 5750 /* flags */ 0, 5751 }, 5752 #endif /* chips */ 5753 5754 #if defined(BCM_53540_A0) 5755 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM53540_A0fmt */ 5756 /* format FP_RESOLUTIONfmt */ 5757 /* nFields */ 1, 5758 /* *fields */ soc_FP_RESOLUTION_BCM53400_A0fmt_fields, 5759 /* bits */ 5, 5760 /* flags */ 0, 5761 }, 5762 #endif /* chips */ 5763 5764 #if defined(BCM_53570_A0) 5765 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM53570_A0fmt */ 5766 /* format FP_RESOLUTIONfmt */ 5767 /* nFields */ 1, 5768 /* *fields */ soc_FP_RESOLUTION_BCM53400_A0fmt_fields, 5769 /* bits */ 5, 5770 /* flags */ 0, 5771 }, 5772 #endif /* chips */ 5773 5774 #if defined(BCM_53570_B0) 5775 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM53570_B0fmt */ 5776 /* format FP_RESOLUTIONfmt */ 5777 /* nFields */ 1, 5778 /* *fields */ soc_FP_RESOLUTION_BCM53400_A0fmt_fields, 5779 /* bits */ 5, 5780 /* flags */ 0, 5781 }, 5782 #endif /* chips */ 5783 5784 #if defined(BCM_56142_A0) 5785 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56142_A0fmt */ 5786 /* format FP_RESOLUTIONfmt */ 5787 /* nFields */ 1, 5788 /* *fields */ soc_FP_RESOLUTION_BCM56634_A0fmt_fields, 5789 /* bits */ 5, 5790 /* flags */ 0, 5791 }, 5792 #endif /* chips */ 5793 5794 #if defined(BCM_56150_A0) 5795 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56150_A0fmt */ 5796 /* format FP_RESOLUTIONfmt */ 5797 /* nFields */ 1, 5798 /* *fields */ soc_TUNNEL_TYPE_LOOPBACK_TYPEfmt_fields, 5799 /* bits */ 5, 5800 /* flags */ 0, 5801 }, 5802 #endif /* chips */ 5803 5804 #if defined(BCM_56160_A0) 5805 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56160_A0fmt */ 5806 /* format FP_RESOLUTIONfmt */ 5807 /* nFields */ 1, 5808 /* *fields */ soc_FP_RESOLUTION_BCM53400_A0fmt_fields, 5809 /* bits */ 5, 5810 /* flags */ 0, 5811 }, 5812 #endif /* chips */ 5813 5814 #if defined(BCM_56260_A0) 5815 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56260_A0fmt */ 5816 /* format FP_RESOLUTIONfmt */ 5817 /* nFields */ 1, 5818 /* *fields */ soc_IFP_RESOLUTIONfmt_fields, 5819 /* bits */ 6, 5820 /* flags */ 0, 5821 }, 5822 #endif /* chips */ 5823 5824 #if defined(BCM_56260_B0) 5825 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56260_B0fmt */ 5826 /* format FP_RESOLUTIONfmt */ 5827 /* nFields */ 1, 5828 /* *fields */ soc_IFP_RESOLUTIONfmt_fields, 5829 /* bits */ 6, 5830 /* flags */ 0, 5831 }, 5832 #endif /* chips */ 5833 5834 #if defined(BCM_56270_A0) 5835 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56270_A0fmt */ 5836 /* format FP_RESOLUTIONfmt */ 5837 /* nFields */ 1, 5838 /* *fields */ soc_IFP_RESOLUTIONfmt_fields, 5839 /* bits */ 6, 5840 /* flags */ 0, 5841 }, 5842 #endif /* chips */ 5843 5844 #if defined(BCM_56334_A0) 5845 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56334_A0fmt */ 5846 /* format FP_RESOLUTIONfmt */ 5847 /* nFields */ 1, 5848 /* *fields */ soc_FP_RESOLUTION_BCM56634_A0fmt_fields, 5849 /* bits */ 5, 5850 /* flags */ 0, 5851 }, 5852 #endif /* chips */ 5853 5854 #if defined(BCM_56334_B0) 5855 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56334_B0fmt */ 5856 /* format FP_RESOLUTIONfmt */ 5857 /* nFields */ 1, 5858 /* *fields */ soc_FP_RESOLUTION_BCM56634_A0fmt_fields, 5859 /* bits */ 5, 5860 /* flags */ 0, 5861 }, 5862 #endif /* chips */ 5863 5864 #if defined(BCM_56340_A0) 5865 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56340_A0fmt */ 5866 /* format FP_RESOLUTIONfmt */ 5867 /* nFields */ 1, 5868 /* *fields */ soc_FP_RESOLUTION_BCM56640_A0fmt_fields, 5869 /* bits */ 6, 5870 /* flags */ 0, 5871 }, 5872 #endif /* chips */ 5873 5874 #if defined(BCM_56440_A0) 5875 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56440_A0fmt */ 5876 /* format FP_RESOLUTIONfmt */ 5877 /* nFields */ 1, 5878 /* *fields */ soc_FP_RESOLUTION_BCM56634_A0fmt_fields, 5879 /* bits */ 5, 5880 /* flags */ 0, 5881 }, 5882 #endif /* chips */ 5883 5884 #if defined(BCM_56440_B0) 5885 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56440_B0fmt */ 5886 /* format FP_RESOLUTIONfmt */ 5887 /* nFields */ 1, 5888 /* *fields */ soc_FP_RESOLUTION_BCM56634_A0fmt_fields, 5889 /* bits */ 5, 5890 /* flags */ 0, 5891 }, 5892 #endif /* chips */ 5893 5894 #if defined(BCM_56450_A0) 5895 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56450_A0fmt */ 5896 /* format FP_RESOLUTIONfmt */ 5897 /* nFields */ 1, 5898 /* *fields */ soc_FP_RESOLUTION_BCM56640_A0fmt_fields, 5899 /* bits */ 6, 5900 /* flags */ 0, 5901 }, 5902 #endif /* chips */ 5903 5904 #if defined(BCM_56450_B0) 5905 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56450_B0fmt */ 5906 /* format FP_RESOLUTIONfmt */ 5907 /* nFields */ 1, 5908 /* *fields */ soc_FP_RESOLUTION_BCM56640_A0fmt_fields, 5909 /* bits */ 6, 5910 /* flags */ 0, 5911 }, 5912 #endif /* chips */ 5913 5914 #if defined(BCM_56450_B1) 5915 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56450_B1fmt */ 5916 /* format FP_RESOLUTIONfmt */ 5917 /* nFields */ 1, 5918 /* *fields */ soc_FP_RESOLUTION_BCM56640_A0fmt_fields, 5919 /* bits */ 6, 5920 /* flags */ 0, 5921 }, 5922 #endif /* chips */ 5923 5924 #if defined(BCM_56524_A0) 5925 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56524_A0fmt */ 5926 /* format FP_RESOLUTIONfmt */ 5927 /* nFields */ 1, 5928 /* *fields */ soc_FP_RESOLUTION_BCM56634_A0fmt_fields, 5929 /* bits */ 5, 5930 /* flags */ 0, 5931 }, 5932 #endif /* chips */ 5933 5934 #if defined(BCM_56524_B0) 5935 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56524_B0fmt */ 5936 /* format FP_RESOLUTIONfmt */ 5937 /* nFields */ 1, 5938 /* *fields */ soc_FP_RESOLUTION_BCM56634_A0fmt_fields, 5939 /* bits */ 5, 5940 /* flags */ 0, 5941 }, 5942 #endif /* chips */ 5943 5944 #if defined(BCM_56560_A0) 5945 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56560_A0fmt */ 5946 /* format FP_RESOLUTIONfmt */ 5947 /* nFields */ 1, 5948 /* *fields */ soc_IFP_RESOLUTIONfmt_fields, 5949 /* bits */ 6, 5950 /* flags */ 0, 5951 }, 5952 #endif /* chips */ 5953 5954 #if defined(BCM_56560_B0) 5955 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56560_B0fmt */ 5956 /* format FP_RESOLUTIONfmt */ 5957 /* nFields */ 1, 5958 /* *fields */ soc_IFP_RESOLUTIONfmt_fields, 5959 /* bits */ 6, 5960 /* flags */ 0, 5961 }, 5962 #endif /* chips */ 5963 5964 #if defined(BCM_56634_A0) 5965 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56634_A0fmt */ 5966 /* format FP_RESOLUTIONfmt */ 5967 /* nFields */ 1, 5968 /* *fields */ soc_FP_RESOLUTION_BCM56634_A0fmt_fields, 5969 /* bits */ 5, 5970 /* flags */ 0, 5971 }, 5972 #endif /* chips */ 5973 5974 #if defined(BCM_56634_B0) 5975 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56634_B0fmt */ 5976 /* format FP_RESOLUTIONfmt */ 5977 /* nFields */ 1, 5978 /* *fields */ soc_FP_RESOLUTION_BCM56634_A0fmt_fields, 5979 /* bits */ 5, 5980 /* flags */ 0, 5981 }, 5982 #endif /* chips */ 5983 5984 #if defined(BCM_56640_A0) 5985 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56640_A0fmt */ 5986 /* format FP_RESOLUTIONfmt */ 5987 /* nFields */ 1, 5988 /* *fields */ soc_FP_RESOLUTION_BCM56640_A0fmt_fields, 5989 /* bits */ 6, 5990 /* flags */ 0, 5991 }, 5992 #endif /* chips */ 5993 5994 #if defined(BCM_56670_A0) 5995 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56670_A0fmt */ 5996 /* format FP_RESOLUTIONfmt */ 5997 /* nFields */ 1, 5998 /* *fields */ soc_IFP_RESOLUTIONfmt_fields, 5999 /* bits */ 6, 6000 /* flags */ 0, 6001 }, 6002 #endif /* chips */ 6003 6004 #if defined(BCM_56670_B0) 6005 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56670_B0fmt */ 6006 /* format FP_RESOLUTIONfmt */ 6007 /* nFields */ 1, 6008 /* *fields */ soc_IFP_RESOLUTIONfmt_fields, 6009 /* bits */ 6, 6010 /* flags */ 0, 6011 }, 6012 #endif /* chips */ 6013 6014 #if defined(BCM_56685_A0) 6015 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56685_A0fmt */ 6016 /* format FP_RESOLUTIONfmt */ 6017 /* nFields */ 1, 6018 /* *fields */ soc_FP_RESOLUTION_BCM56634_A0fmt_fields, 6019 /* bits */ 5, 6020 /* flags */ 0, 6021 }, 6022 #endif /* chips */ 6023 6024 #if defined(BCM_56685_B0) 6025 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56685_B0fmt */ 6026 /* format FP_RESOLUTIONfmt */ 6027 /* nFields */ 1, 6028 /* *fields */ soc_FP_RESOLUTION_BCM56634_A0fmt_fields, 6029 /* bits */ 5, 6030 /* flags */ 0, 6031 }, 6032 #endif /* chips */ 6033 6034 #if defined(BCM_56800_A0) 6035 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56800_A0fmt */ 6036 /* format FP_RESOLUTIONfmt */ 6037 /* nFields */ 1, 6038 /* *fields */ soc_FP_RESOLUTIONfmt_fields, 6039 /* bits */ 4, 6040 /* flags */ 0, 6041 }, 6042 #endif /* chips */ 6043 6044 #if defined(BCM_56840_A0) 6045 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56840_A0fmt */ 6046 /* format FP_RESOLUTIONfmt */ 6047 /* nFields */ 1, 6048 /* *fields */ soc_FP_RESOLUTION_BCM56634_A0fmt_fields, 6049 /* bits */ 5, 6050 /* flags */ 0, 6051 }, 6052 #endif /* chips */ 6053 6054 #if defined(BCM_56840_B0) 6055 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56840_B0fmt */ 6056 /* format FP_RESOLUTIONfmt */ 6057 /* nFields */ 1, 6058 /* *fields */ soc_FP_RESOLUTION_BCM56634_A0fmt_fields, 6059 /* bits */ 5, 6060 /* flags */ 0, 6061 }, 6062 #endif /* chips */ 6063 6064 #if defined(BCM_56850_A0) 6065 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56850_A0fmt */ 6066 /* format FP_RESOLUTIONfmt */ 6067 /* nFields */ 1, 6068 /* *fields */ soc_FP_RESOLUTION_BCM56640_A0fmt_fields, 6069 /* bits */ 6, 6070 /* flags */ 0, 6071 }, 6072 #endif /* chips */ 6073 6074 #if defined(BCM_56860_A0) 6075 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM56860_A0fmt */ 6076 /* format FP_RESOLUTIONfmt */ 6077 /* nFields */ 1, 6078 /* *fields */ soc_FP_RESOLUTION_BCM56640_A0fmt_fields, 6079 /* bits */ 6, 6080 /* flags */ 0, 6081 }, 6082 #endif /* chips */ 6083 6084 #if defined(BCM_88732_A0) 6085 { /* SOC_FORMAT_INT_FP_RESOLUTION_BCM88732_A0fmt */ 6086 /* format FP_RESOLUTIONfmt */ 6087 /* nFields */ 1, 6088 /* *fields */ soc_FP_RESOLUTIONfmt_fields, 6089 /* bits */ 4, 6090 /* flags */ 0, 6091 }, 6092 #endif /* chips */ 6093 6094 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 6095 { /* SOC_FORMAT_INT_FP_SHARED_METER_SETfmt */ 6096 /* format FP_SHARED_METER_SETfmt */ 6097 /* nFields */ 7, 6098 /* *fields */ soc_FP_SHARED_METER_SETfmt_fields, 6099 /* bits */ 18, 6100 /* flags */ 0, 6101 }, 6102 #endif /* chips */ 6103 6104 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 6105 { /* SOC_FORMAT_INT_FT_CMICM_TO_IP0_EP2_Xfmt */ 6106 /* format FT_CMICM_TO_IP0_EP2_Xfmt */ 6107 /* nFields */ 8, 6108 /* *fields */ soc_FT_CMICM_TO_IP0_EP2_Xfmt_fields, 6109 /* bits */ 79, 6110 /* flags */ 0, 6111 }, 6112 #endif /* chips */ 6113 6114 #if defined(BCM_56370_A0) 6115 { /* SOC_FORMAT_INT_FT_CMICM_TO_IP0_EP2_X_BCM56370_A0fmt */ 6116 /* format FT_CMICM_TO_IP0_EP2_Xfmt */ 6117 /* nFields */ 8, 6118 /* *fields */ soc_FT_CMICM_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 6119 /* bits */ 79, 6120 /* flags */ 0, 6121 }, 6122 #endif /* chips */ 6123 6124 #if defined(BCM_56770_A0) 6125 { /* SOC_FORMAT_INT_FT_CMICM_TO_IP0_EP2_X_BCM56770_A0fmt */ 6126 /* format FT_CMICM_TO_IP0_EP2_Xfmt */ 6127 /* nFields */ 8, 6128 /* *fields */ soc_FT_CMICM_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 6129 /* bits */ 79, 6130 /* flags */ 0, 6131 }, 6132 #endif /* chips */ 6133 6134 #if defined(BCM_56870_A0) 6135 { /* SOC_FORMAT_INT_FT_CMICM_TO_IP0_EP2_X_BCM56870_A0fmt */ 6136 /* format FT_CMICM_TO_IP0_EP2_Xfmt */ 6137 /* nFields */ 8, 6138 /* *fields */ soc_FT_CMICM_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 6139 /* bits */ 79, 6140 /* flags */ 0, 6141 }, 6142 #endif /* chips */ 6143 6144 #if defined(BCM_56960_A0) 6145 { /* SOC_FORMAT_INT_FT_CMICM_TO_IP0_EP2_X_BCM56960_A0fmt */ 6146 /* format FT_CMICM_TO_IP0_EP2_Xfmt */ 6147 /* nFields */ 8, 6148 /* *fields */ soc_FT_CMICM_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 6149 /* bits */ 79, 6150 /* flags */ 0, 6151 }, 6152 #endif /* chips */ 6153 6154 #if defined(BCM_56965_A0) 6155 { /* SOC_FORMAT_INT_FT_CMICM_TO_IP0_EP2_X_BCM56965_A0fmt */ 6156 /* format FT_CMICM_TO_IP0_EP2_Xfmt */ 6157 /* nFields */ 8, 6158 /* *fields */ soc_FT_CMICM_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 6159 /* bits */ 79, 6160 /* flags */ 0, 6161 }, 6162 #endif /* chips */ 6163 6164 #if defined(BCM_56970_A0) 6165 { /* SOC_FORMAT_INT_FT_CMICM_TO_IP0_EP2_X_BCM56970_A0fmt */ 6166 /* format FT_CMICM_TO_IP0_EP2_Xfmt */ 6167 /* nFields */ 8, 6168 /* *fields */ soc_FT_CMICM_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 6169 /* bits */ 79, 6170 /* flags */ 0, 6171 }, 6172 #endif /* chips */ 6173 6174 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 6175 { /* SOC_FORMAT_INT_FT_CMICM_TO_IP45_SHAREDfmt */ 6176 /* format FT_CMICM_TO_IP45_SHAREDfmt */ 6177 /* nFields */ 4, 6178 /* *fields */ soc_FT_CMICM_TO_IP45_SHAREDfmt_fields, 6179 /* bits */ 66, 6180 /* flags */ 0, 6181 }, 6182 #endif /* chips */ 6183 6184 #if defined(BCM_56370_A0) 6185 { /* SOC_FORMAT_INT_FT_CMICM_TO_IP45_SHARED_BCM56370_A0fmt */ 6186 /* format FT_CMICM_TO_IP45_SHAREDfmt */ 6187 /* nFields */ 4, 6188 /* *fields */ soc_FT_CMICM_TO_IP45_SHARED_BCM56960_A0fmt_fields, 6189 /* bits */ 66, 6190 /* flags */ 0, 6191 }, 6192 #endif /* chips */ 6193 6194 #if defined(BCM_56770_A0) 6195 { /* SOC_FORMAT_INT_FT_CMICM_TO_IP45_SHARED_BCM56770_A0fmt */ 6196 /* format FT_CMICM_TO_IP45_SHAREDfmt */ 6197 /* nFields */ 4, 6198 /* *fields */ soc_FT_CMICM_TO_IP45_SHARED_BCM56960_A0fmt_fields, 6199 /* bits */ 66, 6200 /* flags */ 0, 6201 }, 6202 #endif /* chips */ 6203 6204 #if defined(BCM_56870_A0) 6205 { /* SOC_FORMAT_INT_FT_CMICM_TO_IP45_SHARED_BCM56870_A0fmt */ 6206 /* format FT_CMICM_TO_IP45_SHAREDfmt */ 6207 /* nFields */ 4, 6208 /* *fields */ soc_FT_CMICM_TO_IP45_SHARED_BCM56960_A0fmt_fields, 6209 /* bits */ 66, 6210 /* flags */ 0, 6211 }, 6212 #endif /* chips */ 6213 6214 #if defined(BCM_56960_A0) 6215 { /* SOC_FORMAT_INT_FT_CMICM_TO_IP45_SHARED_BCM56960_A0fmt */ 6216 /* format FT_CMICM_TO_IP45_SHAREDfmt */ 6217 /* nFields */ 4, 6218 /* *fields */ soc_FT_CMICM_TO_IP45_SHARED_BCM56960_A0fmt_fields, 6219 /* bits */ 66, 6220 /* flags */ 0, 6221 }, 6222 #endif /* chips */ 6223 6224 #if defined(BCM_56965_A0) 6225 { /* SOC_FORMAT_INT_FT_CMICM_TO_IP45_SHARED_BCM56965_A0fmt */ 6226 /* format FT_CMICM_TO_IP45_SHAREDfmt */ 6227 /* nFields */ 4, 6228 /* *fields */ soc_FT_CMICM_TO_IP45_SHARED_BCM56960_A0fmt_fields, 6229 /* bits */ 66, 6230 /* flags */ 0, 6231 }, 6232 #endif /* chips */ 6233 6234 #if defined(BCM_56970_A0) 6235 { /* SOC_FORMAT_INT_FT_CMICM_TO_IP45_SHARED_BCM56970_A0fmt */ 6236 /* format FT_CMICM_TO_IP45_SHAREDfmt */ 6237 /* nFields */ 4, 6238 /* *fields */ soc_FT_CMICM_TO_IP45_SHARED_BCM56960_A0fmt_fields, 6239 /* bits */ 66, 6240 /* flags */ 0, 6241 }, 6242 #endif /* chips */ 6243 6244 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 6245 { /* SOC_FORMAT_INT_FT_CMICM_TO_MMU1fmt */ 6246 /* format FT_CMICM_TO_MMU1fmt */ 6247 /* nFields */ 1, 6248 /* *fields */ soc_FT_CMICM_TO_MMU1fmt_fields, 6249 /* bits */ 48, 6250 /* flags */ 0, 6251 }, 6252 #endif /* chips */ 6253 6254 #if defined(BCM_56370_A0) 6255 { /* SOC_FORMAT_INT_FT_CMICM_TO_MMU1_BCM56370_A0fmt */ 6256 /* format FT_CMICM_TO_MMU1fmt */ 6257 /* nFields */ 1, 6258 /* *fields */ soc_FT_CMICM_TO_MMU1_BCM56960_A0fmt_fields, 6259 /* bits */ 48, 6260 /* flags */ 0, 6261 }, 6262 #endif /* chips */ 6263 6264 #if defined(BCM_56770_A0) 6265 { /* SOC_FORMAT_INT_FT_CMICM_TO_MMU1_BCM56770_A0fmt */ 6266 /* format FT_CMICM_TO_MMU1fmt */ 6267 /* nFields */ 1, 6268 /* *fields */ soc_FT_CMICM_TO_MMU1_BCM56960_A0fmt_fields, 6269 /* bits */ 48, 6270 /* flags */ 0, 6271 }, 6272 #endif /* chips */ 6273 6274 #if defined(BCM_56870_A0) 6275 { /* SOC_FORMAT_INT_FT_CMICM_TO_MMU1_BCM56870_A0fmt */ 6276 /* format FT_CMICM_TO_MMU1fmt */ 6277 /* nFields */ 1, 6278 /* *fields */ soc_FT_CMICM_TO_MMU1_BCM56960_A0fmt_fields, 6279 /* bits */ 48, 6280 /* flags */ 0, 6281 }, 6282 #endif /* chips */ 6283 6284 #if defined(BCM_56960_A0) 6285 { /* SOC_FORMAT_INT_FT_CMICM_TO_MMU1_BCM56960_A0fmt */ 6286 /* format FT_CMICM_TO_MMU1fmt */ 6287 /* nFields */ 1, 6288 /* *fields */ soc_FT_CMICM_TO_MMU1_BCM56960_A0fmt_fields, 6289 /* bits */ 48, 6290 /* flags */ 0, 6291 }, 6292 #endif /* chips */ 6293 6294 #if defined(BCM_56965_A0) 6295 { /* SOC_FORMAT_INT_FT_CMICM_TO_MMU1_BCM56965_A0fmt */ 6296 /* format FT_CMICM_TO_MMU1fmt */ 6297 /* nFields */ 1, 6298 /* *fields */ soc_FT_CMICM_TO_MMU1_BCM56960_A0fmt_fields, 6299 /* bits */ 48, 6300 /* flags */ 0, 6301 }, 6302 #endif /* chips */ 6303 6304 #if defined(BCM_56970_A0) 6305 { /* SOC_FORMAT_INT_FT_CMICM_TO_MMU1_BCM56970_A0fmt */ 6306 /* format FT_CMICM_TO_MMU1fmt */ 6307 /* nFields */ 1, 6308 /* *fields */ soc_FT_CMICM_TO_MMU1_BCM56960_A0fmt_fields, 6309 /* bits */ 48, 6310 /* flags */ 0, 6311 }, 6312 #endif /* chips */ 6313 6314 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 6315 { /* SOC_FORMAT_INT_FT_CMICM_TO_PGW_Xfmt */ 6316 /* format FT_CMICM_TO_PGW_Xfmt */ 6317 /* nFields */ 8, 6318 /* *fields */ soc_FT_CMICM_TO_PGW_Xfmt_fields, 6319 /* bits */ 70, 6320 /* flags */ 0, 6321 }, 6322 #endif /* chips */ 6323 6324 #if defined(BCM_56370_A0) 6325 { /* SOC_FORMAT_INT_FT_CMICM_TO_PGW_X_BCM56370_A0fmt */ 6326 /* format FT_CMICM_TO_PGW_Xfmt */ 6327 /* nFields */ 8, 6328 /* *fields */ soc_FT_CMICM_TO_PGW_X_BCM56960_A0fmt_fields, 6329 /* bits */ 70, 6330 /* flags */ 0, 6331 }, 6332 #endif /* chips */ 6333 6334 #if defined(BCM_56770_A0) 6335 { /* SOC_FORMAT_INT_FT_CMICM_TO_PGW_X_BCM56770_A0fmt */ 6336 /* format FT_CMICM_TO_PGW_Xfmt */ 6337 /* nFields */ 8, 6338 /* *fields */ soc_FT_CMICM_TO_PGW_X_BCM56960_A0fmt_fields, 6339 /* bits */ 70, 6340 /* flags */ 0, 6341 }, 6342 #endif /* chips */ 6343 6344 #if defined(BCM_56870_A0) 6345 { /* SOC_FORMAT_INT_FT_CMICM_TO_PGW_X_BCM56870_A0fmt */ 6346 /* format FT_CMICM_TO_PGW_Xfmt */ 6347 /* nFields */ 8, 6348 /* *fields */ soc_FT_CMICM_TO_PGW_X_BCM56960_A0fmt_fields, 6349 /* bits */ 70, 6350 /* flags */ 0, 6351 }, 6352 #endif /* chips */ 6353 6354 #if defined(BCM_56960_A0) 6355 { /* SOC_FORMAT_INT_FT_CMICM_TO_PGW_X_BCM56960_A0fmt */ 6356 /* format FT_CMICM_TO_PGW_Xfmt */ 6357 /* nFields */ 8, 6358 /* *fields */ soc_FT_CMICM_TO_PGW_X_BCM56960_A0fmt_fields, 6359 /* bits */ 70, 6360 /* flags */ 0, 6361 }, 6362 #endif /* chips */ 6363 6364 #if defined(BCM_56965_A0) 6365 { /* SOC_FORMAT_INT_FT_CMICM_TO_PGW_X_BCM56965_A0fmt */ 6366 /* format FT_CMICM_TO_PGW_Xfmt */ 6367 /* nFields */ 8, 6368 /* *fields */ soc_FT_CMICM_TO_PGW_X_BCM56960_A0fmt_fields, 6369 /* bits */ 70, 6370 /* flags */ 0, 6371 }, 6372 #endif /* chips */ 6373 6374 #if defined(BCM_56970_A0) 6375 { /* SOC_FORMAT_INT_FT_CMICM_TO_PGW_X_BCM56970_A0fmt */ 6376 /* format FT_CMICM_TO_PGW_Xfmt */ 6377 /* nFields */ 8, 6378 /* *fields */ soc_FT_CMICM_TO_PGW_X_BCM56960_A0fmt_fields, 6379 /* bits */ 70, 6380 /* flags */ 0, 6381 }, 6382 #endif /* chips */ 6383 6384 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 6385 { /* SOC_FORMAT_INT_FT_CMICM_TO_PGW_Yfmt */ 6386 /* format FT_CMICM_TO_PGW_Yfmt */ 6387 /* nFields */ 8, 6388 /* *fields */ soc_FT_CMICM_TO_PGW_Yfmt_fields, 6389 /* bits */ 70, 6390 /* flags */ 0, 6391 }, 6392 #endif /* chips */ 6393 6394 #if defined(BCM_56370_A0) 6395 { /* SOC_FORMAT_INT_FT_CMICM_TO_PGW_Y_BCM56370_A0fmt */ 6396 /* format FT_CMICM_TO_PGW_Yfmt */ 6397 /* nFields */ 8, 6398 /* *fields */ soc_FT_CMICM_TO_PGW_Y_BCM56960_A0fmt_fields, 6399 /* bits */ 70, 6400 /* flags */ 0, 6401 }, 6402 #endif /* chips */ 6403 6404 #if defined(BCM_56770_A0) 6405 { /* SOC_FORMAT_INT_FT_CMICM_TO_PGW_Y_BCM56770_A0fmt */ 6406 /* format FT_CMICM_TO_PGW_Yfmt */ 6407 /* nFields */ 8, 6408 /* *fields */ soc_FT_CMICM_TO_PGW_Y_BCM56960_A0fmt_fields, 6409 /* bits */ 70, 6410 /* flags */ 0, 6411 }, 6412 #endif /* chips */ 6413 6414 #if defined(BCM_56870_A0) 6415 { /* SOC_FORMAT_INT_FT_CMICM_TO_PGW_Y_BCM56870_A0fmt */ 6416 /* format FT_CMICM_TO_PGW_Yfmt */ 6417 /* nFields */ 8, 6418 /* *fields */ soc_FT_CMICM_TO_PGW_Y_BCM56960_A0fmt_fields, 6419 /* bits */ 70, 6420 /* flags */ 0, 6421 }, 6422 #endif /* chips */ 6423 6424 #if defined(BCM_56960_A0) 6425 { /* SOC_FORMAT_INT_FT_CMICM_TO_PGW_Y_BCM56960_A0fmt */ 6426 /* format FT_CMICM_TO_PGW_Yfmt */ 6427 /* nFields */ 8, 6428 /* *fields */ soc_FT_CMICM_TO_PGW_Y_BCM56960_A0fmt_fields, 6429 /* bits */ 70, 6430 /* flags */ 0, 6431 }, 6432 #endif /* chips */ 6433 6434 #if defined(BCM_56965_A0) 6435 { /* SOC_FORMAT_INT_FT_CMICM_TO_PGW_Y_BCM56965_A0fmt */ 6436 /* format FT_CMICM_TO_PGW_Yfmt */ 6437 /* nFields */ 8, 6438 /* *fields */ soc_FT_CMICM_TO_PGW_Y_BCM56960_A0fmt_fields, 6439 /* bits */ 70, 6440 /* flags */ 0, 6441 }, 6442 #endif /* chips */ 6443 6444 #if defined(BCM_56970_A0) 6445 { /* SOC_FORMAT_INT_FT_CMICM_TO_PGW_Y_BCM56970_A0fmt */ 6446 /* format FT_CMICM_TO_PGW_Yfmt */ 6447 /* nFields */ 8, 6448 /* *fields */ soc_FT_CMICM_TO_PGW_Y_BCM56960_A0fmt_fields, 6449 /* bits */ 70, 6450 /* flags */ 0, 6451 }, 6452 #endif /* chips */ 6453 6454 #if defined(BCM_56770_A0) 6455 { /* SOC_FORMAT_INT_FT_FIXED_ASSOCIATED_DATAfmt */ 6456 /* format FT_FIXED_ASSOCIATED_DATAfmt */ 6457 /* nFields */ 4, 6458 /* *fields */ soc_FT_FIXED_ASSOCIATED_DATAfmt_fields, 6459 /* bits */ 22, 6460 /* flags */ 0, 6461 }, 6462 #endif /* chips */ 6463 6464 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 6465 { /* SOC_FORMAT_INT_FT_IN_BUSfmt */ 6466 /* format FT_IN_BUSfmt */ 6467 /* nFields */ 36, 6468 /* *fields */ soc_FT_IN_BUSfmt_fields, 6469 /* bits */ 450, 6470 /* flags */ 0, 6471 }, 6472 #endif /* chips */ 6473 6474 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 6475 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_CMICMfmt */ 6476 /* format FT_IP0_EP2_TO_CMICMfmt */ 6477 /* nFields */ 9, 6478 /* *fields */ soc_FT_IP0_EP2_TO_CMICMfmt_fields, 6479 /* bits */ 80, 6480 /* flags */ 0, 6481 }, 6482 #endif /* chips */ 6483 6484 #if defined(BCM_56370_A0) 6485 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_CMICM_BCM56370_A0fmt */ 6486 /* format FT_IP0_EP2_TO_CMICMfmt */ 6487 /* nFields */ 9, 6488 /* *fields */ soc_FT_IP0_EP2_TO_CMICM_BCM56960_A0fmt_fields, 6489 /* bits */ 80, 6490 /* flags */ 0, 6491 }, 6492 #endif /* chips */ 6493 6494 #if defined(BCM_56770_A0) 6495 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_CMICM_BCM56770_A0fmt */ 6496 /* format FT_IP0_EP2_TO_CMICMfmt */ 6497 /* nFields */ 9, 6498 /* *fields */ soc_FT_IP0_EP2_TO_CMICM_BCM56960_A0fmt_fields, 6499 /* bits */ 80, 6500 /* flags */ 0, 6501 }, 6502 #endif /* chips */ 6503 6504 #if defined(BCM_56870_A0) 6505 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_CMICM_BCM56870_A0fmt */ 6506 /* format FT_IP0_EP2_TO_CMICMfmt */ 6507 /* nFields */ 9, 6508 /* *fields */ soc_FT_IP0_EP2_TO_CMICM_BCM56960_A0fmt_fields, 6509 /* bits */ 80, 6510 /* flags */ 0, 6511 }, 6512 #endif /* chips */ 6513 6514 #if defined(BCM_56960_A0) 6515 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_CMICM_BCM56960_A0fmt */ 6516 /* format FT_IP0_EP2_TO_CMICMfmt */ 6517 /* nFields */ 9, 6518 /* *fields */ soc_FT_IP0_EP2_TO_CMICM_BCM56960_A0fmt_fields, 6519 /* bits */ 80, 6520 /* flags */ 0, 6521 }, 6522 #endif /* chips */ 6523 6524 #if defined(BCM_56965_A0) 6525 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_CMICM_BCM56965_A0fmt */ 6526 /* format FT_IP0_EP2_TO_CMICMfmt */ 6527 /* nFields */ 9, 6528 /* *fields */ soc_FT_IP0_EP2_TO_CMICM_BCM56960_A0fmt_fields, 6529 /* bits */ 80, 6530 /* flags */ 0, 6531 }, 6532 #endif /* chips */ 6533 6534 #if defined(BCM_56970_A0) 6535 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_CMICM_BCM56970_A0fmt */ 6536 /* format FT_IP0_EP2_TO_CMICMfmt */ 6537 /* nFields */ 9, 6538 /* *fields */ soc_FT_IP0_EP2_TO_CMICM_BCM56960_A0fmt_fields, 6539 /* bits */ 80, 6540 /* flags */ 0, 6541 }, 6542 #endif /* chips */ 6543 6544 #if defined(BCM_56850_A0) 6545 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_IP5fmt */ 6546 /* format FT_IP0_EP2_TO_IP5fmt */ 6547 /* nFields */ 1, 6548 /* *fields */ soc_FT_IP0_EP2_TO_IP5fmt_fields, 6549 /* bits */ 128, 6550 /* flags */ 0, 6551 }, 6552 #endif /* chips */ 6553 6554 #if defined(BCM_56850_A0) 6555 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_IP1_EP0fmt */ 6556 /* format FT_IP0_EP2_TO_IP1_EP0fmt */ 6557 /* nFields */ 7, 6558 /* *fields */ soc_FT_IP0_EP2_TO_IP1_EP0fmt_fields, 6559 /* bits */ 2584, 6560 /* flags */ 0, 6561 }, 6562 #endif /* chips */ 6563 6564 #if defined(BCM_56370_A0) 6565 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_IP1_EP0_BCM56370_A0fmt */ 6566 /* format FT_IP0_EP2_TO_IP1_EP0fmt */ 6567 /* nFields */ 7, 6568 /* *fields */ soc_FT_IP0_EP2_TO_IP1_EP0_BCM56960_A0fmt_fields, 6569 /* bits */ 2584, 6570 /* flags */ 0, 6571 }, 6572 #endif /* chips */ 6573 6574 #if defined(BCM_56770_A0) 6575 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_IP1_EP0_BCM56770_A0fmt */ 6576 /* format FT_IP0_EP2_TO_IP1_EP0fmt */ 6577 /* nFields */ 7, 6578 /* *fields */ soc_FT_IP0_EP2_TO_IP1_EP0_BCM56960_A0fmt_fields, 6579 /* bits */ 2584, 6580 /* flags */ 0, 6581 }, 6582 #endif /* chips */ 6583 6584 #if defined(BCM_56860_A0) 6585 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_IP1_EP0_BCM56860_A0fmt */ 6586 /* format FT_IP0_EP2_TO_IP1_EP0fmt */ 6587 /* nFields */ 7, 6588 /* *fields */ soc_FT_IP0_EP2_TO_IP1_EP0_BCM56860_A0fmt_fields, 6589 /* bits */ 2586, 6590 /* flags */ 0, 6591 }, 6592 #endif /* chips */ 6593 6594 #if defined(BCM_56870_A0) 6595 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_IP1_EP0_BCM56870_A0fmt */ 6596 /* format FT_IP0_EP2_TO_IP1_EP0fmt */ 6597 /* nFields */ 7, 6598 /* *fields */ soc_FT_IP0_EP2_TO_IP1_EP0_BCM56960_A0fmt_fields, 6599 /* bits */ 2584, 6600 /* flags */ 0, 6601 }, 6602 #endif /* chips */ 6603 6604 #if defined(BCM_56960_A0) 6605 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_IP1_EP0_BCM56960_A0fmt */ 6606 /* format FT_IP0_EP2_TO_IP1_EP0fmt */ 6607 /* nFields */ 7, 6608 /* *fields */ soc_FT_IP0_EP2_TO_IP1_EP0_BCM56960_A0fmt_fields, 6609 /* bits */ 2584, 6610 /* flags */ 0, 6611 }, 6612 #endif /* chips */ 6613 6614 #if defined(BCM_56965_A0) 6615 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_IP1_EP0_BCM56965_A0fmt */ 6616 /* format FT_IP0_EP2_TO_IP1_EP0fmt */ 6617 /* nFields */ 7, 6618 /* *fields */ soc_FT_IP0_EP2_TO_IP1_EP0_BCM56960_A0fmt_fields, 6619 /* bits */ 2584, 6620 /* flags */ 0, 6621 }, 6622 #endif /* chips */ 6623 6624 #if defined(BCM_56970_A0) 6625 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_IP1_EP0_BCM56970_A0fmt */ 6626 /* format FT_IP0_EP2_TO_IP1_EP0fmt */ 6627 /* nFields */ 7, 6628 /* *fields */ soc_FT_IP0_EP2_TO_IP1_EP0_BCM56960_A0fmt_fields, 6629 /* bits */ 2584, 6630 /* flags */ 0, 6631 }, 6632 #endif /* chips */ 6633 6634 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 6635 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_IP45_SHAREDfmt */ 6636 /* format FT_IP0_EP2_TO_IP45_SHAREDfmt */ 6637 /* nFields */ 4, 6638 /* *fields */ soc_FT_IP0_EP2_TO_IP45_SHAREDfmt_fields, 6639 /* bits */ 155, 6640 /* flags */ 0, 6641 }, 6642 #endif /* chips */ 6643 6644 #if defined(BCM_56370_A0) 6645 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_IP45_SHARED_BCM56370_A0fmt */ 6646 /* format FT_IP0_EP2_TO_IP45_SHAREDfmt */ 6647 /* nFields */ 3, 6648 /* *fields */ soc_FT_IP0_EP2_TO_IP45_SHARED_BCM56960_A0fmt_fields, 6649 /* bits */ 139, 6650 /* flags */ 0, 6651 }, 6652 #endif /* chips */ 6653 6654 #if defined(BCM_56770_A0) 6655 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_IP45_SHARED_BCM56770_A0fmt */ 6656 /* format FT_IP0_EP2_TO_IP45_SHAREDfmt */ 6657 /* nFields */ 3, 6658 /* *fields */ soc_FT_IP0_EP2_TO_IP45_SHARED_BCM56960_A0fmt_fields, 6659 /* bits */ 139, 6660 /* flags */ 0, 6661 }, 6662 #endif /* chips */ 6663 6664 #if defined(BCM_56870_A0) 6665 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_IP45_SHARED_BCM56870_A0fmt */ 6666 /* format FT_IP0_EP2_TO_IP45_SHAREDfmt */ 6667 /* nFields */ 3, 6668 /* *fields */ soc_FT_IP0_EP2_TO_IP45_SHARED_BCM56960_A0fmt_fields, 6669 /* bits */ 139, 6670 /* flags */ 0, 6671 }, 6672 #endif /* chips */ 6673 6674 #if defined(BCM_56960_A0) 6675 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_IP45_SHARED_BCM56960_A0fmt */ 6676 /* format FT_IP0_EP2_TO_IP45_SHAREDfmt */ 6677 /* nFields */ 3, 6678 /* *fields */ soc_FT_IP0_EP2_TO_IP45_SHARED_BCM56960_A0fmt_fields, 6679 /* bits */ 139, 6680 /* flags */ 0, 6681 }, 6682 #endif /* chips */ 6683 6684 #if defined(BCM_56965_A0) 6685 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_IP45_SHARED_BCM56965_A0fmt */ 6686 /* format FT_IP0_EP2_TO_IP45_SHAREDfmt */ 6687 /* nFields */ 3, 6688 /* *fields */ soc_FT_IP0_EP2_TO_IP45_SHARED_BCM56960_A0fmt_fields, 6689 /* bits */ 139, 6690 /* flags */ 0, 6691 }, 6692 #endif /* chips */ 6693 6694 #if defined(BCM_56970_A0) 6695 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_IP45_SHARED_BCM56970_A0fmt */ 6696 /* format FT_IP0_EP2_TO_IP45_SHAREDfmt */ 6697 /* nFields */ 3, 6698 /* *fields */ soc_FT_IP0_EP2_TO_IP45_SHARED_BCM56960_A0fmt_fields, 6699 /* bits */ 139, 6700 /* flags */ 0, 6701 }, 6702 #endif /* chips */ 6703 6704 #if defined(BCM_56960_A0) 6705 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_IP5_BCM56960_A0fmt */ 6706 /* format FT_IP0_EP2_TO_IP5fmt */ 6707 /* nFields */ 1, 6708 /* *fields */ soc_FT_IP0_EP2_TO_IP5_BCM56960_A0fmt_fields, 6709 /* bits */ 128, 6710 /* flags */ 0, 6711 }, 6712 #endif /* chips */ 6713 6714 #if defined(BCM_56965_A0) 6715 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_IP5_BCM56965_A0fmt */ 6716 /* format FT_IP0_EP2_TO_IP5fmt */ 6717 /* nFields */ 1, 6718 /* *fields */ soc_FT_IP0_EP2_TO_IP5_BCM56960_A0fmt_fields, 6719 /* bits */ 128, 6720 /* flags */ 0, 6721 }, 6722 #endif /* chips */ 6723 6724 #if defined(BCM_56970_A0) 6725 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_IP5_BCM56970_A0fmt */ 6726 /* format FT_IP0_EP2_TO_IP5fmt */ 6727 /* nFields */ 1, 6728 /* *fields */ soc_FT_IP0_EP2_TO_IP5_BCM56960_A0fmt_fields, 6729 /* bits */ 128, 6730 /* flags */ 0, 6731 }, 6732 #endif /* chips */ 6733 6734 #if defined(BCM_56850_A0) 6735 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_MMU0fmt */ 6736 /* format FT_IP0_EP2_TO_MMU0fmt */ 6737 /* nFields */ 2, 6738 /* *fields */ soc_FT_IP0_EP2_TO_MMU0fmt_fields, 6739 /* bits */ 58, 6740 /* flags */ 0, 6741 }, 6742 #endif /* chips */ 6743 6744 #if defined(BCM_56370_A0) 6745 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_MMU0_BCM56370_A0fmt */ 6746 /* format FT_IP0_EP2_TO_MMU0fmt */ 6747 /* nFields */ 2, 6748 /* *fields */ soc_FT_IP0_EP2_TO_MMU0_BCM56960_A0fmt_fields, 6749 /* bits */ 58, 6750 /* flags */ 0, 6751 }, 6752 #endif /* chips */ 6753 6754 #if defined(BCM_56770_A0) 6755 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_MMU0_BCM56770_A0fmt */ 6756 /* format FT_IP0_EP2_TO_MMU0fmt */ 6757 /* nFields */ 2, 6758 /* *fields */ soc_FT_IP0_EP2_TO_MMU0_BCM56960_A0fmt_fields, 6759 /* bits */ 58, 6760 /* flags */ 0, 6761 }, 6762 #endif /* chips */ 6763 6764 #if defined(BCM_56860_A0) 6765 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_MMU0_BCM56860_A0fmt */ 6766 /* format FT_IP0_EP2_TO_MMU0fmt */ 6767 /* nFields */ 2, 6768 /* *fields */ soc_FT_IP0_EP2_TO_MMU0_BCM56860_A0fmt_fields, 6769 /* bits */ 59, 6770 /* flags */ 0, 6771 }, 6772 #endif /* chips */ 6773 6774 #if defined(BCM_56870_A0) 6775 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_MMU0_BCM56870_A0fmt */ 6776 /* format FT_IP0_EP2_TO_MMU0fmt */ 6777 /* nFields */ 2, 6778 /* *fields */ soc_FT_IP0_EP2_TO_MMU0_BCM56960_A0fmt_fields, 6779 /* bits */ 58, 6780 /* flags */ 0, 6781 }, 6782 #endif /* chips */ 6783 6784 #if defined(BCM_56960_A0) 6785 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_MMU0_BCM56960_A0fmt */ 6786 /* format FT_IP0_EP2_TO_MMU0fmt */ 6787 /* nFields */ 2, 6788 /* *fields */ soc_FT_IP0_EP2_TO_MMU0_BCM56960_A0fmt_fields, 6789 /* bits */ 58, 6790 /* flags */ 0, 6791 }, 6792 #endif /* chips */ 6793 6794 #if defined(BCM_56965_A0) 6795 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_MMU0_BCM56965_A0fmt */ 6796 /* format FT_IP0_EP2_TO_MMU0fmt */ 6797 /* nFields */ 2, 6798 /* *fields */ soc_FT_IP0_EP2_TO_MMU0_BCM56960_A0fmt_fields, 6799 /* bits */ 58, 6800 /* flags */ 0, 6801 }, 6802 #endif /* chips */ 6803 6804 #if defined(BCM_56970_A0) 6805 { /* SOC_FORMAT_INT_FT_IP0_EP2_TO_MMU0_BCM56970_A0fmt */ 6806 /* format FT_IP0_EP2_TO_MMU0fmt */ 6807 /* nFields */ 2, 6808 /* *fields */ soc_FT_IP0_EP2_TO_MMU0_BCM56960_A0fmt_fields, 6809 /* bits */ 58, 6810 /* flags */ 0, 6811 }, 6812 #endif /* chips */ 6813 6814 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 6815 { /* SOC_FORMAT_INT_FT_IP0_EP2_X_TO_IP0_EP2_Yfmt */ 6816 /* format FT_IP0_EP2_X_TO_IP0_EP2_Yfmt */ 6817 /* nFields */ 3, 6818 /* *fields */ soc_FT_IP0_EP2_X_TO_IP0_EP2_Yfmt_fields, 6819 /* bits */ 162, 6820 /* flags */ 0, 6821 }, 6822 #endif /* chips */ 6823 6824 #if defined(BCM_56370_A0) 6825 { /* SOC_FORMAT_INT_FT_IP0_EP2_X_TO_IP0_EP2_Y_BCM56370_A0fmt */ 6826 /* format FT_IP0_EP2_X_TO_IP0_EP2_Yfmt */ 6827 /* nFields */ 3, 6828 /* *fields */ soc_FT_IP0_EP2_X_TO_IP0_EP2_Y_BCM56960_A0fmt_fields, 6829 /* bits */ 162, 6830 /* flags */ 0, 6831 }, 6832 #endif /* chips */ 6833 6834 #if defined(BCM_56770_A0) 6835 { /* SOC_FORMAT_INT_FT_IP0_EP2_X_TO_IP0_EP2_Y_BCM56770_A0fmt */ 6836 /* format FT_IP0_EP2_X_TO_IP0_EP2_Yfmt */ 6837 /* nFields */ 3, 6838 /* *fields */ soc_FT_IP0_EP2_X_TO_IP0_EP2_Y_BCM56960_A0fmt_fields, 6839 /* bits */ 162, 6840 /* flags */ 0, 6841 }, 6842 #endif /* chips */ 6843 6844 #if defined(BCM_56870_A0) 6845 { /* SOC_FORMAT_INT_FT_IP0_EP2_X_TO_IP0_EP2_Y_BCM56870_A0fmt */ 6846 /* format FT_IP0_EP2_X_TO_IP0_EP2_Yfmt */ 6847 /* nFields */ 3, 6848 /* *fields */ soc_FT_IP0_EP2_X_TO_IP0_EP2_Y_BCM56960_A0fmt_fields, 6849 /* bits */ 162, 6850 /* flags */ 0, 6851 }, 6852 #endif /* chips */ 6853 6854 #if defined(BCM_56960_A0) 6855 { /* SOC_FORMAT_INT_FT_IP0_EP2_X_TO_IP0_EP2_Y_BCM56960_A0fmt */ 6856 /* format FT_IP0_EP2_X_TO_IP0_EP2_Yfmt */ 6857 /* nFields */ 3, 6858 /* *fields */ soc_FT_IP0_EP2_X_TO_IP0_EP2_Y_BCM56960_A0fmt_fields, 6859 /* bits */ 162, 6860 /* flags */ 0, 6861 }, 6862 #endif /* chips */ 6863 6864 #if defined(BCM_56965_A0) 6865 { /* SOC_FORMAT_INT_FT_IP0_EP2_X_TO_IP0_EP2_Y_BCM56965_A0fmt */ 6866 /* format FT_IP0_EP2_X_TO_IP0_EP2_Yfmt */ 6867 /* nFields */ 3, 6868 /* *fields */ soc_FT_IP0_EP2_X_TO_IP0_EP2_Y_BCM56960_A0fmt_fields, 6869 /* bits */ 162, 6870 /* flags */ 0, 6871 }, 6872 #endif /* chips */ 6873 6874 #if defined(BCM_56970_A0) 6875 { /* SOC_FORMAT_INT_FT_IP0_EP2_X_TO_IP0_EP2_Y_BCM56970_A0fmt */ 6876 /* format FT_IP0_EP2_X_TO_IP0_EP2_Yfmt */ 6877 /* nFields */ 3, 6878 /* *fields */ soc_FT_IP0_EP2_X_TO_IP0_EP2_Y_BCM56960_A0fmt_fields, 6879 /* bits */ 162, 6880 /* flags */ 0, 6881 }, 6882 #endif /* chips */ 6883 6884 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 6885 { /* SOC_FORMAT_INT_FT_IP0_EP2_X_TO_MMU1fmt */ 6886 /* format FT_IP0_EP2_X_TO_MMU1fmt */ 6887 /* nFields */ 1, 6888 /* *fields */ soc_FT_IP0_EP2_X_TO_MMU1fmt_fields, 6889 /* bits */ 65, 6890 /* flags */ 0, 6891 }, 6892 #endif /* chips */ 6893 6894 #if defined(BCM_56370_A0) 6895 { /* SOC_FORMAT_INT_FT_IP0_EP2_X_TO_MMU1_BCM56370_A0fmt */ 6896 /* format FT_IP0_EP2_X_TO_MMU1fmt */ 6897 /* nFields */ 1, 6898 /* *fields */ soc_FT_IP0_EP2_X_TO_MMU1_BCM56960_A0fmt_fields, 6899 /* bits */ 65, 6900 /* flags */ 0, 6901 }, 6902 #endif /* chips */ 6903 6904 #if defined(BCM_56770_A0) 6905 { /* SOC_FORMAT_INT_FT_IP0_EP2_X_TO_MMU1_BCM56770_A0fmt */ 6906 /* format FT_IP0_EP2_X_TO_MMU1fmt */ 6907 /* nFields */ 1, 6908 /* *fields */ soc_FT_IP0_EP2_X_TO_MMU1_BCM56960_A0fmt_fields, 6909 /* bits */ 65, 6910 /* flags */ 0, 6911 }, 6912 #endif /* chips */ 6913 6914 #if defined(BCM_56870_A0) 6915 { /* SOC_FORMAT_INT_FT_IP0_EP2_X_TO_MMU1_BCM56870_A0fmt */ 6916 /* format FT_IP0_EP2_X_TO_MMU1fmt */ 6917 /* nFields */ 1, 6918 /* *fields */ soc_FT_IP0_EP2_X_TO_MMU1_BCM56960_A0fmt_fields, 6919 /* bits */ 65, 6920 /* flags */ 0, 6921 }, 6922 #endif /* chips */ 6923 6924 #if defined(BCM_56960_A0) 6925 { /* SOC_FORMAT_INT_FT_IP0_EP2_X_TO_MMU1_BCM56960_A0fmt */ 6926 /* format FT_IP0_EP2_X_TO_MMU1fmt */ 6927 /* nFields */ 1, 6928 /* *fields */ soc_FT_IP0_EP2_X_TO_MMU1_BCM56960_A0fmt_fields, 6929 /* bits */ 65, 6930 /* flags */ 0, 6931 }, 6932 #endif /* chips */ 6933 6934 #if defined(BCM_56965_A0) 6935 { /* SOC_FORMAT_INT_FT_IP0_EP2_X_TO_MMU1_BCM56965_A0fmt */ 6936 /* format FT_IP0_EP2_X_TO_MMU1fmt */ 6937 /* nFields */ 1, 6938 /* *fields */ soc_FT_IP0_EP2_X_TO_MMU1_BCM56960_A0fmt_fields, 6939 /* bits */ 65, 6940 /* flags */ 0, 6941 }, 6942 #endif /* chips */ 6943 6944 #if defined(BCM_56970_A0) 6945 { /* SOC_FORMAT_INT_FT_IP0_EP2_X_TO_MMU1_BCM56970_A0fmt */ 6946 /* format FT_IP0_EP2_X_TO_MMU1fmt */ 6947 /* nFields */ 1, 6948 /* *fields */ soc_FT_IP0_EP2_X_TO_MMU1_BCM56960_A0fmt_fields, 6949 /* bits */ 65, 6950 /* flags */ 0, 6951 }, 6952 #endif /* chips */ 6953 6954 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 6955 { /* SOC_FORMAT_INT_FT_IP0_EP2_Y_TO_IP0_EP2_Xfmt */ 6956 /* format FT_IP0_EP2_Y_TO_IP0_EP2_Xfmt */ 6957 /* nFields */ 3, 6958 /* *fields */ soc_FT_IP0_EP2_Y_TO_IP0_EP2_Xfmt_fields, 6959 /* bits */ 34, 6960 /* flags */ 0, 6961 }, 6962 #endif /* chips */ 6963 6964 #if defined(BCM_56370_A0) 6965 { /* SOC_FORMAT_INT_FT_IP0_EP2_Y_TO_IP0_EP2_X_BCM56370_A0fmt */ 6966 /* format FT_IP0_EP2_Y_TO_IP0_EP2_Xfmt */ 6967 /* nFields */ 3, 6968 /* *fields */ soc_FT_IP0_EP2_Y_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 6969 /* bits */ 34, 6970 /* flags */ 0, 6971 }, 6972 #endif /* chips */ 6973 6974 #if defined(BCM_56770_A0) 6975 { /* SOC_FORMAT_INT_FT_IP0_EP2_Y_TO_IP0_EP2_X_BCM56770_A0fmt */ 6976 /* format FT_IP0_EP2_Y_TO_IP0_EP2_Xfmt */ 6977 /* nFields */ 3, 6978 /* *fields */ soc_FT_IP0_EP2_Y_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 6979 /* bits */ 34, 6980 /* flags */ 0, 6981 }, 6982 #endif /* chips */ 6983 6984 #if defined(BCM_56870_A0) 6985 { /* SOC_FORMAT_INT_FT_IP0_EP2_Y_TO_IP0_EP2_X_BCM56870_A0fmt */ 6986 /* format FT_IP0_EP2_Y_TO_IP0_EP2_Xfmt */ 6987 /* nFields */ 3, 6988 /* *fields */ soc_FT_IP0_EP2_Y_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 6989 /* bits */ 34, 6990 /* flags */ 0, 6991 }, 6992 #endif /* chips */ 6993 6994 #if defined(BCM_56960_A0) 6995 { /* SOC_FORMAT_INT_FT_IP0_EP2_Y_TO_IP0_EP2_X_BCM56960_A0fmt */ 6996 /* format FT_IP0_EP2_Y_TO_IP0_EP2_Xfmt */ 6997 /* nFields */ 3, 6998 /* *fields */ soc_FT_IP0_EP2_Y_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 6999 /* bits */ 34, 7000 /* flags */ 0, 7001 }, 7002 #endif /* chips */ 7003 7004 #if defined(BCM_56965_A0) 7005 { /* SOC_FORMAT_INT_FT_IP0_EP2_Y_TO_IP0_EP2_X_BCM56965_A0fmt */ 7006 /* format FT_IP0_EP2_Y_TO_IP0_EP2_Xfmt */ 7007 /* nFields */ 3, 7008 /* *fields */ soc_FT_IP0_EP2_Y_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 7009 /* bits */ 34, 7010 /* flags */ 0, 7011 }, 7012 #endif /* chips */ 7013 7014 #if defined(BCM_56970_A0) 7015 { /* SOC_FORMAT_INT_FT_IP0_EP2_Y_TO_IP0_EP2_X_BCM56970_A0fmt */ 7016 /* format FT_IP0_EP2_Y_TO_IP0_EP2_Xfmt */ 7017 /* nFields */ 3, 7018 /* *fields */ soc_FT_IP0_EP2_Y_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 7019 /* bits */ 34, 7020 /* flags */ 0, 7021 }, 7022 #endif /* chips */ 7023 7024 #if defined(BCM_56850_A0) 7025 { /* SOC_FORMAT_INT_FT_IP0_EP2_Y_TO_MMU1fmt */ 7026 /* format FT_IP0_EP2_Y_TO_MMU1fmt */ 7027 /* nFields */ 3, 7028 /* *fields */ soc_FT_IP0_EP2_Y_TO_MMU1fmt_fields, 7029 /* bits */ 123, 7030 /* flags */ 0, 7031 }, 7032 #endif /* chips */ 7033 7034 #if defined(BCM_56370_A0) 7035 { /* SOC_FORMAT_INT_FT_IP0_EP2_Y_TO_MMU1_BCM56370_A0fmt */ 7036 /* format FT_IP0_EP2_Y_TO_MMU1fmt */ 7037 /* nFields */ 3, 7038 /* *fields */ soc_FT_IP0_EP2_Y_TO_MMU1_BCM56960_A0fmt_fields, 7039 /* bits */ 123, 7040 /* flags */ 0, 7041 }, 7042 #endif /* chips */ 7043 7044 #if defined(BCM_56770_A0) 7045 { /* SOC_FORMAT_INT_FT_IP0_EP2_Y_TO_MMU1_BCM56770_A0fmt */ 7046 /* format FT_IP0_EP2_Y_TO_MMU1fmt */ 7047 /* nFields */ 3, 7048 /* *fields */ soc_FT_IP0_EP2_Y_TO_MMU1_BCM56960_A0fmt_fields, 7049 /* bits */ 123, 7050 /* flags */ 0, 7051 }, 7052 #endif /* chips */ 7053 7054 #if defined(BCM_56860_A0) 7055 { /* SOC_FORMAT_INT_FT_IP0_EP2_Y_TO_MMU1_BCM56860_A0fmt */ 7056 /* format FT_IP0_EP2_Y_TO_MMU1fmt */ 7057 /* nFields */ 3, 7058 /* *fields */ soc_FT_IP0_EP2_Y_TO_MMU1_BCM56860_A0fmt_fields, 7059 /* bits */ 124, 7060 /* flags */ 0, 7061 }, 7062 #endif /* chips */ 7063 7064 #if defined(BCM_56870_A0) 7065 { /* SOC_FORMAT_INT_FT_IP0_EP2_Y_TO_MMU1_BCM56870_A0fmt */ 7066 /* format FT_IP0_EP2_Y_TO_MMU1fmt */ 7067 /* nFields */ 3, 7068 /* *fields */ soc_FT_IP0_EP2_Y_TO_MMU1_BCM56960_A0fmt_fields, 7069 /* bits */ 123, 7070 /* flags */ 0, 7071 }, 7072 #endif /* chips */ 7073 7074 #if defined(BCM_56960_A0) 7075 { /* SOC_FORMAT_INT_FT_IP0_EP2_Y_TO_MMU1_BCM56960_A0fmt */ 7076 /* format FT_IP0_EP2_Y_TO_MMU1fmt */ 7077 /* nFields */ 3, 7078 /* *fields */ soc_FT_IP0_EP2_Y_TO_MMU1_BCM56960_A0fmt_fields, 7079 /* bits */ 123, 7080 /* flags */ 0, 7081 }, 7082 #endif /* chips */ 7083 7084 #if defined(BCM_56965_A0) 7085 { /* SOC_FORMAT_INT_FT_IP0_EP2_Y_TO_MMU1_BCM56965_A0fmt */ 7086 /* format FT_IP0_EP2_Y_TO_MMU1fmt */ 7087 /* nFields */ 3, 7088 /* *fields */ soc_FT_IP0_EP2_Y_TO_MMU1_BCM56960_A0fmt_fields, 7089 /* bits */ 123, 7090 /* flags */ 0, 7091 }, 7092 #endif /* chips */ 7093 7094 #if defined(BCM_56970_A0) 7095 { /* SOC_FORMAT_INT_FT_IP0_EP2_Y_TO_MMU1_BCM56970_A0fmt */ 7096 /* format FT_IP0_EP2_Y_TO_MMU1fmt */ 7097 /* nFields */ 3, 7098 /* *fields */ soc_FT_IP0_EP2_Y_TO_MMU1_BCM56960_A0fmt_fields, 7099 /* bits */ 123, 7100 /* flags */ 0, 7101 }, 7102 #endif /* chips */ 7103 7104 #if defined(BCM_56860_A0) 7105 { /* SOC_FORMAT_INT_FT_IP0_X_TO_EP1_IP5fmt */ 7106 /* format FT_IP0_X_TO_EP1_IP5fmt */ 7107 /* nFields */ 1, 7108 /* *fields */ soc_FT_IP0_X_TO_EP1_IP5fmt_fields, 7109 /* bits */ 128, 7110 /* flags */ 0, 7111 }, 7112 #endif /* chips */ 7113 7114 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 7115 { /* SOC_FORMAT_INT_FT_IP1_EP0_X_TO_MMU1fmt */ 7116 /* format FT_IP1_EP0_X_TO_MMU1fmt */ 7117 /* nFields */ 1, 7118 /* *fields */ soc_FT_IP1_EP0_X_TO_MMU1fmt_fields, 7119 /* bits */ 1, 7120 /* flags */ 0, 7121 }, 7122 #endif /* chips */ 7123 7124 #if defined(BCM_56370_A0) 7125 { /* SOC_FORMAT_INT_FT_IP1_EP0_X_TO_MMU1_BCM56370_A0fmt */ 7126 /* format FT_IP1_EP0_X_TO_MMU1fmt */ 7127 /* nFields */ 1, 7128 /* *fields */ soc_FT_IP1_EP0_X_TO_MMU1_BCM56960_A0fmt_fields, 7129 /* bits */ 1, 7130 /* flags */ 0, 7131 }, 7132 #endif /* chips */ 7133 7134 #if defined(BCM_56770_A0) 7135 { /* SOC_FORMAT_INT_FT_IP1_EP0_X_TO_MMU1_BCM56770_A0fmt */ 7136 /* format FT_IP1_EP0_X_TO_MMU1fmt */ 7137 /* nFields */ 1, 7138 /* *fields */ soc_FT_IP1_EP0_X_TO_MMU1_BCM56960_A0fmt_fields, 7139 /* bits */ 1, 7140 /* flags */ 0, 7141 }, 7142 #endif /* chips */ 7143 7144 #if defined(BCM_56870_A0) 7145 { /* SOC_FORMAT_INT_FT_IP1_EP0_X_TO_MMU1_BCM56870_A0fmt */ 7146 /* format FT_IP1_EP0_X_TO_MMU1fmt */ 7147 /* nFields */ 1, 7148 /* *fields */ soc_FT_IP1_EP0_X_TO_MMU1_BCM56960_A0fmt_fields, 7149 /* bits */ 1, 7150 /* flags */ 0, 7151 }, 7152 #endif /* chips */ 7153 7154 #if defined(BCM_56960_A0) 7155 { /* SOC_FORMAT_INT_FT_IP1_EP0_X_TO_MMU1_BCM56960_A0fmt */ 7156 /* format FT_IP1_EP0_X_TO_MMU1fmt */ 7157 /* nFields */ 1, 7158 /* *fields */ soc_FT_IP1_EP0_X_TO_MMU1_BCM56960_A0fmt_fields, 7159 /* bits */ 1, 7160 /* flags */ 0, 7161 }, 7162 #endif /* chips */ 7163 7164 #if defined(BCM_56965_A0) 7165 { /* SOC_FORMAT_INT_FT_IP1_EP0_X_TO_MMU1_BCM56965_A0fmt */ 7166 /* format FT_IP1_EP0_X_TO_MMU1fmt */ 7167 /* nFields */ 1, 7168 /* *fields */ soc_FT_IP1_EP0_X_TO_MMU1_BCM56960_A0fmt_fields, 7169 /* bits */ 1, 7170 /* flags */ 0, 7171 }, 7172 #endif /* chips */ 7173 7174 #if defined(BCM_56970_A0) 7175 { /* SOC_FORMAT_INT_FT_IP1_EP0_X_TO_MMU1_BCM56970_A0fmt */ 7176 /* format FT_IP1_EP0_X_TO_MMU1fmt */ 7177 /* nFields */ 1, 7178 /* *fields */ soc_FT_IP1_EP0_X_TO_MMU1_BCM56960_A0fmt_fields, 7179 /* bits */ 1, 7180 /* flags */ 0, 7181 }, 7182 #endif /* chips */ 7183 7184 #if defined(BCM_56850_A0) 7185 { /* SOC_FORMAT_INT_FT_IP1_EP0_Y_TO_MMU1fmt */ 7186 /* format FT_IP1_EP0_Y_TO_MMU1fmt */ 7187 /* nFields */ 1, 7188 /* *fields */ soc_FT_IP1_EP0_X_TO_MMU1fmt_fields, 7189 /* bits */ 1, 7190 /* flags */ 0, 7191 }, 7192 #endif /* chips */ 7193 7194 #if defined(BCM_56370_A0) 7195 { /* SOC_FORMAT_INT_FT_IP1_EP0_Y_TO_MMU1_BCM56370_A0fmt */ 7196 /* format FT_IP1_EP0_Y_TO_MMU1fmt */ 7197 /* nFields */ 1, 7198 /* *fields */ soc_FT_IP1_EP0_X_TO_MMU1_BCM56960_A0fmt_fields, 7199 /* bits */ 1, 7200 /* flags */ 0, 7201 }, 7202 #endif /* chips */ 7203 7204 #if defined(BCM_56770_A0) 7205 { /* SOC_FORMAT_INT_FT_IP1_EP0_Y_TO_MMU1_BCM56770_A0fmt */ 7206 /* format FT_IP1_EP0_Y_TO_MMU1fmt */ 7207 /* nFields */ 1, 7208 /* *fields */ soc_FT_IP1_EP0_X_TO_MMU1_BCM56960_A0fmt_fields, 7209 /* bits */ 1, 7210 /* flags */ 0, 7211 }, 7212 #endif /* chips */ 7213 7214 #if defined(BCM_56860_A0) 7215 { /* SOC_FORMAT_INT_FT_IP1_EP0_Y_TO_MMU1_BCM56860_A0fmt */ 7216 /* format FT_IP1_EP0_Y_TO_MMU1fmt */ 7217 /* nFields */ 1, 7218 /* *fields */ soc_FT_IP1_EP0_X_TO_MMU1fmt_fields, 7219 /* bits */ 1, 7220 /* flags */ 0, 7221 }, 7222 #endif /* chips */ 7223 7224 #if defined(BCM_56870_A0) 7225 { /* SOC_FORMAT_INT_FT_IP1_EP0_Y_TO_MMU1_BCM56870_A0fmt */ 7226 /* format FT_IP1_EP0_Y_TO_MMU1fmt */ 7227 /* nFields */ 1, 7228 /* *fields */ soc_FT_IP1_EP0_X_TO_MMU1_BCM56960_A0fmt_fields, 7229 /* bits */ 1, 7230 /* flags */ 0, 7231 }, 7232 #endif /* chips */ 7233 7234 #if defined(BCM_56960_A0) 7235 { /* SOC_FORMAT_INT_FT_IP1_EP0_Y_TO_MMU1_BCM56960_A0fmt */ 7236 /* format FT_IP1_EP0_Y_TO_MMU1fmt */ 7237 /* nFields */ 1, 7238 /* *fields */ soc_FT_IP1_EP0_X_TO_MMU1_BCM56960_A0fmt_fields, 7239 /* bits */ 1, 7240 /* flags */ 0, 7241 }, 7242 #endif /* chips */ 7243 7244 #if defined(BCM_56965_A0) 7245 { /* SOC_FORMAT_INT_FT_IP1_EP0_Y_TO_MMU1_BCM56965_A0fmt */ 7246 /* format FT_IP1_EP0_Y_TO_MMU1fmt */ 7247 /* nFields */ 1, 7248 /* *fields */ soc_FT_IP1_EP0_X_TO_MMU1_BCM56960_A0fmt_fields, 7249 /* bits */ 1, 7250 /* flags */ 0, 7251 }, 7252 #endif /* chips */ 7253 7254 #if defined(BCM_56970_A0) 7255 { /* SOC_FORMAT_INT_FT_IP1_EP0_Y_TO_MMU1_BCM56970_A0fmt */ 7256 /* format FT_IP1_EP0_Y_TO_MMU1fmt */ 7257 /* nFields */ 1, 7258 /* *fields */ soc_FT_IP1_EP0_X_TO_MMU1_BCM56960_A0fmt_fields, 7259 /* bits */ 1, 7260 /* flags */ 0, 7261 }, 7262 #endif /* chips */ 7263 7264 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 7265 { /* SOC_FORMAT_INT_FT_IP2_TO_IP0_EP2fmt */ 7266 /* format FT_IP2_TO_IP0_EP2fmt */ 7267 /* nFields */ 1, 7268 /* *fields */ soc_FT_IP2_TO_IP0_EP2fmt_fields, 7269 /* bits */ 1, 7270 /* flags */ 0, 7271 }, 7272 #endif /* chips */ 7273 7274 #if defined(BCM_56370_A0) 7275 { /* SOC_FORMAT_INT_FT_IP2_TO_IP0_EP2_BCM56370_A0fmt */ 7276 /* format FT_IP2_TO_IP0_EP2fmt */ 7277 /* nFields */ 1, 7278 /* *fields */ soc_FT_IP2_TO_IP0_EP2_BCM56960_A0fmt_fields, 7279 /* bits */ 1, 7280 /* flags */ 0, 7281 }, 7282 #endif /* chips */ 7283 7284 #if defined(BCM_56770_A0) 7285 { /* SOC_FORMAT_INT_FT_IP2_TO_IP0_EP2_BCM56770_A0fmt */ 7286 /* format FT_IP2_TO_IP0_EP2fmt */ 7287 /* nFields */ 1, 7288 /* *fields */ soc_FT_IP2_TO_IP0_EP2_BCM56960_A0fmt_fields, 7289 /* bits */ 1, 7290 /* flags */ 0, 7291 }, 7292 #endif /* chips */ 7293 7294 #if defined(BCM_56870_A0) 7295 { /* SOC_FORMAT_INT_FT_IP2_TO_IP0_EP2_BCM56870_A0fmt */ 7296 /* format FT_IP2_TO_IP0_EP2fmt */ 7297 /* nFields */ 1, 7298 /* *fields */ soc_FT_IP2_TO_IP0_EP2_BCM56960_A0fmt_fields, 7299 /* bits */ 1, 7300 /* flags */ 0, 7301 }, 7302 #endif /* chips */ 7303 7304 #if defined(BCM_56960_A0) 7305 { /* SOC_FORMAT_INT_FT_IP2_TO_IP0_EP2_BCM56960_A0fmt */ 7306 /* format FT_IP2_TO_IP0_EP2fmt */ 7307 /* nFields */ 1, 7308 /* *fields */ soc_FT_IP2_TO_IP0_EP2_BCM56960_A0fmt_fields, 7309 /* bits */ 1, 7310 /* flags */ 0, 7311 }, 7312 #endif /* chips */ 7313 7314 #if defined(BCM_56965_A0) 7315 { /* SOC_FORMAT_INT_FT_IP2_TO_IP0_EP2_BCM56965_A0fmt */ 7316 /* format FT_IP2_TO_IP0_EP2fmt */ 7317 /* nFields */ 1, 7318 /* *fields */ soc_FT_IP2_TO_IP0_EP2_BCM56960_A0fmt_fields, 7319 /* bits */ 1, 7320 /* flags */ 0, 7321 }, 7322 #endif /* chips */ 7323 7324 #if defined(BCM_56970_A0) 7325 { /* SOC_FORMAT_INT_FT_IP2_TO_IP0_EP2_BCM56970_A0fmt */ 7326 /* format FT_IP2_TO_IP0_EP2fmt */ 7327 /* nFields */ 1, 7328 /* *fields */ soc_FT_IP2_TO_IP0_EP2_BCM56960_A0fmt_fields, 7329 /* bits */ 1, 7330 /* flags */ 0, 7331 }, 7332 #endif /* chips */ 7333 7334 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 7335 { /* SOC_FORMAT_INT_FT_IP2_X_TO_CMICMfmt */ 7336 /* format FT_IP2_X_TO_CMICMfmt */ 7337 /* nFields */ 1, 7338 /* *fields */ soc_FT_IP2_X_TO_CMICMfmt_fields, 7339 /* bits */ 8, 7340 /* flags */ 0, 7341 }, 7342 #endif /* chips */ 7343 7344 #if defined(BCM_56370_A0) 7345 { /* SOC_FORMAT_INT_FT_IP2_X_TO_CMICM_BCM56370_A0fmt */ 7346 /* format FT_IP2_X_TO_CMICMfmt */ 7347 /* nFields */ 1, 7348 /* *fields */ soc_FT_IP2_X_TO_CMICM_BCM56960_A0fmt_fields, 7349 /* bits */ 8, 7350 /* flags */ 0, 7351 }, 7352 #endif /* chips */ 7353 7354 #if defined(BCM_56770_A0) 7355 { /* SOC_FORMAT_INT_FT_IP2_X_TO_CMICM_BCM56770_A0fmt */ 7356 /* format FT_IP2_X_TO_CMICMfmt */ 7357 /* nFields */ 1, 7358 /* *fields */ soc_FT_IP2_X_TO_CMICM_BCM56960_A0fmt_fields, 7359 /* bits */ 8, 7360 /* flags */ 0, 7361 }, 7362 #endif /* chips */ 7363 7364 #if defined(BCM_56870_A0) 7365 { /* SOC_FORMAT_INT_FT_IP2_X_TO_CMICM_BCM56870_A0fmt */ 7366 /* format FT_IP2_X_TO_CMICMfmt */ 7367 /* nFields */ 1, 7368 /* *fields */ soc_FT_IP2_X_TO_CMICM_BCM56960_A0fmt_fields, 7369 /* bits */ 8, 7370 /* flags */ 0, 7371 }, 7372 #endif /* chips */ 7373 7374 #if defined(BCM_56960_A0) 7375 { /* SOC_FORMAT_INT_FT_IP2_X_TO_CMICM_BCM56960_A0fmt */ 7376 /* format FT_IP2_X_TO_CMICMfmt */ 7377 /* nFields */ 1, 7378 /* *fields */ soc_FT_IP2_X_TO_CMICM_BCM56960_A0fmt_fields, 7379 /* bits */ 8, 7380 /* flags */ 0, 7381 }, 7382 #endif /* chips */ 7383 7384 #if defined(BCM_56965_A0) 7385 { /* SOC_FORMAT_INT_FT_IP2_X_TO_CMICM_BCM56965_A0fmt */ 7386 /* format FT_IP2_X_TO_CMICMfmt */ 7387 /* nFields */ 1, 7388 /* *fields */ soc_FT_IP2_X_TO_CMICM_BCM56960_A0fmt_fields, 7389 /* bits */ 8, 7390 /* flags */ 0, 7391 }, 7392 #endif /* chips */ 7393 7394 #if defined(BCM_56970_A0) 7395 { /* SOC_FORMAT_INT_FT_IP2_X_TO_CMICM_BCM56970_A0fmt */ 7396 /* format FT_IP2_X_TO_CMICMfmt */ 7397 /* nFields */ 1, 7398 /* *fields */ soc_FT_IP2_X_TO_CMICM_BCM56960_A0fmt_fields, 7399 /* bits */ 8, 7400 /* flags */ 0, 7401 }, 7402 #endif /* chips */ 7403 7404 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 7405 { /* SOC_FORMAT_INT_FT_IP2_X_TO_IP0_EP2_Xfmt */ 7406 /* format FT_IP2_X_TO_IP0_EP2_Xfmt */ 7407 /* nFields */ 1, 7408 /* *fields */ soc_FT_IP2_X_TO_IP0_EP2_Xfmt_fields, 7409 /* bits */ 93, 7410 /* flags */ 0, 7411 }, 7412 #endif /* chips */ 7413 7414 #if defined(BCM_56370_A0) 7415 { /* SOC_FORMAT_INT_FT_IP2_X_TO_IP0_EP2_X_BCM56370_A0fmt */ 7416 /* format FT_IP2_X_TO_IP0_EP2_Xfmt */ 7417 /* nFields */ 1, 7418 /* *fields */ soc_FT_IP2_X_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 7419 /* bits */ 93, 7420 /* flags */ 0, 7421 }, 7422 #endif /* chips */ 7423 7424 #if defined(BCM_56770_A0) 7425 { /* SOC_FORMAT_INT_FT_IP2_X_TO_IP0_EP2_X_BCM56770_A0fmt */ 7426 /* format FT_IP2_X_TO_IP0_EP2_Xfmt */ 7427 /* nFields */ 1, 7428 /* *fields */ soc_FT_IP2_X_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 7429 /* bits */ 93, 7430 /* flags */ 0, 7431 }, 7432 #endif /* chips */ 7433 7434 #if defined(BCM_56870_A0) 7435 { /* SOC_FORMAT_INT_FT_IP2_X_TO_IP0_EP2_X_BCM56870_A0fmt */ 7436 /* format FT_IP2_X_TO_IP0_EP2_Xfmt */ 7437 /* nFields */ 1, 7438 /* *fields */ soc_FT_IP2_X_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 7439 /* bits */ 93, 7440 /* flags */ 0, 7441 }, 7442 #endif /* chips */ 7443 7444 #if defined(BCM_56960_A0) 7445 { /* SOC_FORMAT_INT_FT_IP2_X_TO_IP0_EP2_X_BCM56960_A0fmt */ 7446 /* format FT_IP2_X_TO_IP0_EP2_Xfmt */ 7447 /* nFields */ 1, 7448 /* *fields */ soc_FT_IP2_X_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 7449 /* bits */ 93, 7450 /* flags */ 0, 7451 }, 7452 #endif /* chips */ 7453 7454 #if defined(BCM_56965_A0) 7455 { /* SOC_FORMAT_INT_FT_IP2_X_TO_IP0_EP2_X_BCM56965_A0fmt */ 7456 /* format FT_IP2_X_TO_IP0_EP2_Xfmt */ 7457 /* nFields */ 1, 7458 /* *fields */ soc_FT_IP2_X_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 7459 /* bits */ 93, 7460 /* flags */ 0, 7461 }, 7462 #endif /* chips */ 7463 7464 #if defined(BCM_56970_A0) 7465 { /* SOC_FORMAT_INT_FT_IP2_X_TO_IP0_EP2_X_BCM56970_A0fmt */ 7466 /* format FT_IP2_X_TO_IP0_EP2_Xfmt */ 7467 /* nFields */ 1, 7468 /* *fields */ soc_FT_IP2_X_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 7469 /* bits */ 93, 7470 /* flags */ 0, 7471 }, 7472 #endif /* chips */ 7473 7474 #if defined(BCM_56850_A0) 7475 { /* SOC_FORMAT_INT_FT_IP2_Y_TO_CMICMfmt */ 7476 /* format FT_IP2_Y_TO_CMICMfmt */ 7477 /* nFields */ 1, 7478 /* *fields */ soc_FT_IP2_X_TO_CMICMfmt_fields, 7479 /* bits */ 8, 7480 /* flags */ 0, 7481 }, 7482 #endif /* chips */ 7483 7484 #if defined(BCM_56370_A0) 7485 { /* SOC_FORMAT_INT_FT_IP2_Y_TO_CMICM_BCM56370_A0fmt */ 7486 /* format FT_IP2_Y_TO_CMICMfmt */ 7487 /* nFields */ 1, 7488 /* *fields */ soc_FT_IP2_X_TO_CMICM_BCM56960_A0fmt_fields, 7489 /* bits */ 8, 7490 /* flags */ 0, 7491 }, 7492 #endif /* chips */ 7493 7494 #if defined(BCM_56770_A0) 7495 { /* SOC_FORMAT_INT_FT_IP2_Y_TO_CMICM_BCM56770_A0fmt */ 7496 /* format FT_IP2_Y_TO_CMICMfmt */ 7497 /* nFields */ 1, 7498 /* *fields */ soc_FT_IP2_X_TO_CMICM_BCM56960_A0fmt_fields, 7499 /* bits */ 8, 7500 /* flags */ 0, 7501 }, 7502 #endif /* chips */ 7503 7504 #if defined(BCM_56860_A0) 7505 { /* SOC_FORMAT_INT_FT_IP2_Y_TO_CMICM_BCM56860_A0fmt */ 7506 /* format FT_IP2_Y_TO_CMICMfmt */ 7507 /* nFields */ 1, 7508 /* *fields */ soc_FT_IP2_X_TO_CMICMfmt_fields, 7509 /* bits */ 8, 7510 /* flags */ 0, 7511 }, 7512 #endif /* chips */ 7513 7514 #if defined(BCM_56870_A0) 7515 { /* SOC_FORMAT_INT_FT_IP2_Y_TO_CMICM_BCM56870_A0fmt */ 7516 /* format FT_IP2_Y_TO_CMICMfmt */ 7517 /* nFields */ 1, 7518 /* *fields */ soc_FT_IP2_X_TO_CMICM_BCM56960_A0fmt_fields, 7519 /* bits */ 8, 7520 /* flags */ 0, 7521 }, 7522 #endif /* chips */ 7523 7524 #if defined(BCM_56960_A0) 7525 { /* SOC_FORMAT_INT_FT_IP2_Y_TO_CMICM_BCM56960_A0fmt */ 7526 /* format FT_IP2_Y_TO_CMICMfmt */ 7527 /* nFields */ 1, 7528 /* *fields */ soc_FT_IP2_X_TO_CMICM_BCM56960_A0fmt_fields, 7529 /* bits */ 8, 7530 /* flags */ 0, 7531 }, 7532 #endif /* chips */ 7533 7534 #if defined(BCM_56965_A0) 7535 { /* SOC_FORMAT_INT_FT_IP2_Y_TO_CMICM_BCM56965_A0fmt */ 7536 /* format FT_IP2_Y_TO_CMICMfmt */ 7537 /* nFields */ 1, 7538 /* *fields */ soc_FT_IP2_X_TO_CMICM_BCM56960_A0fmt_fields, 7539 /* bits */ 8, 7540 /* flags */ 0, 7541 }, 7542 #endif /* chips */ 7543 7544 #if defined(BCM_56970_A0) 7545 { /* SOC_FORMAT_INT_FT_IP2_Y_TO_CMICM_BCM56970_A0fmt */ 7546 /* format FT_IP2_Y_TO_CMICMfmt */ 7547 /* nFields */ 1, 7548 /* *fields */ soc_FT_IP2_X_TO_CMICM_BCM56960_A0fmt_fields, 7549 /* bits */ 8, 7550 /* flags */ 0, 7551 }, 7552 #endif /* chips */ 7553 7554 #if defined(BCM_56850_A0) 7555 { /* SOC_FORMAT_INT_FT_IP2_Y_TO_IP0_EP2_Xfmt */ 7556 /* format FT_IP2_Y_TO_IP0_EP2_Xfmt */ 7557 /* nFields */ 1, 7558 /* *fields */ soc_FT_IP2_X_TO_IP0_EP2_Xfmt_fields, 7559 /* bits */ 93, 7560 /* flags */ 0, 7561 }, 7562 #endif /* chips */ 7563 7564 #if defined(BCM_56370_A0) 7565 { /* SOC_FORMAT_INT_FT_IP2_Y_TO_IP0_EP2_X_BCM56370_A0fmt */ 7566 /* format FT_IP2_Y_TO_IP0_EP2_Xfmt */ 7567 /* nFields */ 1, 7568 /* *fields */ soc_FT_IP2_X_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 7569 /* bits */ 93, 7570 /* flags */ 0, 7571 }, 7572 #endif /* chips */ 7573 7574 #if defined(BCM_56770_A0) 7575 { /* SOC_FORMAT_INT_FT_IP2_Y_TO_IP0_EP2_X_BCM56770_A0fmt */ 7576 /* format FT_IP2_Y_TO_IP0_EP2_Xfmt */ 7577 /* nFields */ 1, 7578 /* *fields */ soc_FT_IP2_X_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 7579 /* bits */ 93, 7580 /* flags */ 0, 7581 }, 7582 #endif /* chips */ 7583 7584 #if defined(BCM_56860_A0) 7585 { /* SOC_FORMAT_INT_FT_IP2_Y_TO_IP0_EP2_X_BCM56860_A0fmt */ 7586 /* format FT_IP2_Y_TO_IP0_EP2_Xfmt */ 7587 /* nFields */ 1, 7588 /* *fields */ soc_FT_IP2_X_TO_IP0_EP2_Xfmt_fields, 7589 /* bits */ 93, 7590 /* flags */ 0, 7591 }, 7592 #endif /* chips */ 7593 7594 #if defined(BCM_56870_A0) 7595 { /* SOC_FORMAT_INT_FT_IP2_Y_TO_IP0_EP2_X_BCM56870_A0fmt */ 7596 /* format FT_IP2_Y_TO_IP0_EP2_Xfmt */ 7597 /* nFields */ 1, 7598 /* *fields */ soc_FT_IP2_X_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 7599 /* bits */ 93, 7600 /* flags */ 0, 7601 }, 7602 #endif /* chips */ 7603 7604 #if defined(BCM_56960_A0) 7605 { /* SOC_FORMAT_INT_FT_IP2_Y_TO_IP0_EP2_X_BCM56960_A0fmt */ 7606 /* format FT_IP2_Y_TO_IP0_EP2_Xfmt */ 7607 /* nFields */ 1, 7608 /* *fields */ soc_FT_IP2_X_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 7609 /* bits */ 93, 7610 /* flags */ 0, 7611 }, 7612 #endif /* chips */ 7613 7614 #if defined(BCM_56965_A0) 7615 { /* SOC_FORMAT_INT_FT_IP2_Y_TO_IP0_EP2_X_BCM56965_A0fmt */ 7616 /* format FT_IP2_Y_TO_IP0_EP2_Xfmt */ 7617 /* nFields */ 1, 7618 /* *fields */ soc_FT_IP2_X_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 7619 /* bits */ 93, 7620 /* flags */ 0, 7621 }, 7622 #endif /* chips */ 7623 7624 #if defined(BCM_56970_A0) 7625 { /* SOC_FORMAT_INT_FT_IP2_Y_TO_IP0_EP2_X_BCM56970_A0fmt */ 7626 /* format FT_IP2_Y_TO_IP0_EP2_Xfmt */ 7627 /* nFields */ 1, 7628 /* *fields */ soc_FT_IP2_X_TO_IP0_EP2_X_BCM56960_A0fmt_fields, 7629 /* bits */ 93, 7630 /* flags */ 0, 7631 }, 7632 #endif /* chips */ 7633 7634 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 7635 { /* SOC_FORMAT_INT_FT_IP45_SHARED_TO_CMICMfmt */ 7636 /* format FT_IP45_SHARED_TO_CMICMfmt */ 7637 /* nFields */ 4, 7638 /* *fields */ soc_FT_IP45_SHARED_TO_CMICMfmt_fields, 7639 /* bits */ 66, 7640 /* flags */ 0, 7641 }, 7642 #endif /* chips */ 7643 7644 #if defined(BCM_56370_A0) 7645 { /* SOC_FORMAT_INT_FT_IP45_SHARED_TO_CMICM_BCM56370_A0fmt */ 7646 /* format FT_IP45_SHARED_TO_CMICMfmt */ 7647 /* nFields */ 4, 7648 /* *fields */ soc_FT_IP45_SHARED_TO_CMICM_BCM56960_A0fmt_fields, 7649 /* bits */ 66, 7650 /* flags */ 0, 7651 }, 7652 #endif /* chips */ 7653 7654 #if defined(BCM_56770_A0) 7655 { /* SOC_FORMAT_INT_FT_IP45_SHARED_TO_CMICM_BCM56770_A0fmt */ 7656 /* format FT_IP45_SHARED_TO_CMICMfmt */ 7657 /* nFields */ 4, 7658 /* *fields */ soc_FT_IP45_SHARED_TO_CMICM_BCM56960_A0fmt_fields, 7659 /* bits */ 66, 7660 /* flags */ 0, 7661 }, 7662 #endif /* chips */ 7663 7664 #if defined(BCM_56870_A0) 7665 { /* SOC_FORMAT_INT_FT_IP45_SHARED_TO_CMICM_BCM56870_A0fmt */ 7666 /* format FT_IP45_SHARED_TO_CMICMfmt */ 7667 /* nFields */ 4, 7668 /* *fields */ soc_FT_IP45_SHARED_TO_CMICM_BCM56960_A0fmt_fields, 7669 /* bits */ 66, 7670 /* flags */ 0, 7671 }, 7672 #endif /* chips */ 7673 7674 #if defined(BCM_56960_A0) 7675 { /* SOC_FORMAT_INT_FT_IP45_SHARED_TO_CMICM_BCM56960_A0fmt */ 7676 /* format FT_IP45_SHARED_TO_CMICMfmt */ 7677 /* nFields */ 4, 7678 /* *fields */ soc_FT_IP45_SHARED_TO_CMICM_BCM56960_A0fmt_fields, 7679 /* bits */ 66, 7680 /* flags */ 0, 7681 }, 7682 #endif /* chips */ 7683 7684 #if defined(BCM_56965_A0) 7685 { /* SOC_FORMAT_INT_FT_IP45_SHARED_TO_CMICM_BCM56965_A0fmt */ 7686 /* format FT_IP45_SHARED_TO_CMICMfmt */ 7687 /* nFields */ 4, 7688 /* *fields */ soc_FT_IP45_SHARED_TO_CMICM_BCM56960_A0fmt_fields, 7689 /* bits */ 66, 7690 /* flags */ 0, 7691 }, 7692 #endif /* chips */ 7693 7694 #if defined(BCM_56970_A0) 7695 { /* SOC_FORMAT_INT_FT_IP45_SHARED_TO_CMICM_BCM56970_A0fmt */ 7696 /* format FT_IP45_SHARED_TO_CMICMfmt */ 7697 /* nFields */ 4, 7698 /* *fields */ soc_FT_IP45_SHARED_TO_CMICM_BCM56960_A0fmt_fields, 7699 /* bits */ 66, 7700 /* flags */ 0, 7701 }, 7702 #endif /* chips */ 7703 7704 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 7705 { /* SOC_FORMAT_INT_FT_IP45_SHARED_TO_IP0_EP2fmt */ 7706 /* format FT_IP45_SHARED_TO_IP0_EP2fmt */ 7707 /* nFields */ 2, 7708 /* *fields */ soc_FT_IP45_SHARED_TO_IP0_EP2fmt_fields, 7709 /* bits */ 33, 7710 /* flags */ 0, 7711 }, 7712 #endif /* chips */ 7713 7714 #if defined(BCM_56370_A0) 7715 { /* SOC_FORMAT_INT_FT_IP45_SHARED_TO_IP0_EP2_BCM56370_A0fmt */ 7716 /* format FT_IP45_SHARED_TO_IP0_EP2fmt */ 7717 /* nFields */ 2, 7718 /* *fields */ soc_FT_IP45_SHARED_TO_IP0_EP2_BCM56960_A0fmt_fields, 7719 /* bits */ 33, 7720 /* flags */ 0, 7721 }, 7722 #endif /* chips */ 7723 7724 #if defined(BCM_56770_A0) 7725 { /* SOC_FORMAT_INT_FT_IP45_SHARED_TO_IP0_EP2_BCM56770_A0fmt */ 7726 /* format FT_IP45_SHARED_TO_IP0_EP2fmt */ 7727 /* nFields */ 2, 7728 /* *fields */ soc_FT_IP45_SHARED_TO_IP0_EP2_BCM56960_A0fmt_fields, 7729 /* bits */ 33, 7730 /* flags */ 0, 7731 }, 7732 #endif /* chips */ 7733 7734 #if defined(BCM_56870_A0) 7735 { /* SOC_FORMAT_INT_FT_IP45_SHARED_TO_IP0_EP2_BCM56870_A0fmt */ 7736 /* format FT_IP45_SHARED_TO_IP0_EP2fmt */ 7737 /* nFields */ 2, 7738 /* *fields */ soc_FT_IP45_SHARED_TO_IP0_EP2_BCM56960_A0fmt_fields, 7739 /* bits */ 33, 7740 /* flags */ 0, 7741 }, 7742 #endif /* chips */ 7743 7744 #if defined(BCM_56960_A0) 7745 { /* SOC_FORMAT_INT_FT_IP45_SHARED_TO_IP0_EP2_BCM56960_A0fmt */ 7746 /* format FT_IP45_SHARED_TO_IP0_EP2fmt */ 7747 /* nFields */ 2, 7748 /* *fields */ soc_FT_IP45_SHARED_TO_IP0_EP2_BCM56960_A0fmt_fields, 7749 /* bits */ 33, 7750 /* flags */ 0, 7751 }, 7752 #endif /* chips */ 7753 7754 #if defined(BCM_56965_A0) 7755 { /* SOC_FORMAT_INT_FT_IP45_SHARED_TO_IP0_EP2_BCM56965_A0fmt */ 7756 /* format FT_IP45_SHARED_TO_IP0_EP2fmt */ 7757 /* nFields */ 2, 7758 /* *fields */ soc_FT_IP45_SHARED_TO_IP0_EP2_BCM56960_A0fmt_fields, 7759 /* bits */ 33, 7760 /* flags */ 0, 7761 }, 7762 #endif /* chips */ 7763 7764 #if defined(BCM_56970_A0) 7765 { /* SOC_FORMAT_INT_FT_IP45_SHARED_TO_IP0_EP2_BCM56970_A0fmt */ 7766 /* format FT_IP45_SHARED_TO_IP0_EP2fmt */ 7767 /* nFields */ 2, 7768 /* *fields */ soc_FT_IP45_SHARED_TO_IP0_EP2_BCM56960_A0fmt_fields, 7769 /* bits */ 33, 7770 /* flags */ 0, 7771 }, 7772 #endif /* chips */ 7773 7774 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 7775 { /* SOC_FORMAT_INT_FT_IP45_SHARED_TO_IP1_EP0fmt */ 7776 /* format FT_IP45_SHARED_TO_IP1_EP0fmt */ 7777 /* nFields */ 2, 7778 /* *fields */ soc_FT_IP45_SHARED_TO_IP1_EP0fmt_fields, 7779 /* bits */ 33, 7780 /* flags */ 0, 7781 }, 7782 #endif /* chips */ 7783 7784 #if defined(BCM_56370_A0) 7785 { /* SOC_FORMAT_INT_FT_IP45_SHARED_TO_IP1_EP0_BCM56370_A0fmt */ 7786 /* format FT_IP45_SHARED_TO_IP1_EP0fmt */ 7787 /* nFields */ 2, 7788 /* *fields */ soc_FT_IP45_SHARED_TO_IP1_EP0_BCM56960_A0fmt_fields, 7789 /* bits */ 33, 7790 /* flags */ 0, 7791 }, 7792 #endif /* chips */ 7793 7794 #if defined(BCM_56770_A0) 7795 { /* SOC_FORMAT_INT_FT_IP45_SHARED_TO_IP1_EP0_BCM56770_A0fmt */ 7796 /* format FT_IP45_SHARED_TO_IP1_EP0fmt */ 7797 /* nFields */ 2, 7798 /* *fields */ soc_FT_IP45_SHARED_TO_IP1_EP0_BCM56960_A0fmt_fields, 7799 /* bits */ 33, 7800 /* flags */ 0, 7801 }, 7802 #endif /* chips */ 7803 7804 #if defined(BCM_56870_A0) 7805 { /* SOC_FORMAT_INT_FT_IP45_SHARED_TO_IP1_EP0_BCM56870_A0fmt */ 7806 /* format FT_IP45_SHARED_TO_IP1_EP0fmt */ 7807 /* nFields */ 2, 7808 /* *fields */ soc_FT_IP45_SHARED_TO_IP1_EP0_BCM56960_A0fmt_fields, 7809 /* bits */ 33, 7810 /* flags */ 0, 7811 }, 7812 #endif /* chips */ 7813 7814 #if defined(BCM_56960_A0) 7815 { /* SOC_FORMAT_INT_FT_IP45_SHARED_TO_IP1_EP0_BCM56960_A0fmt */ 7816 /* format FT_IP45_SHARED_TO_IP1_EP0fmt */ 7817 /* nFields */ 2, 7818 /* *fields */ soc_FT_IP45_SHARED_TO_IP1_EP0_BCM56960_A0fmt_fields, 7819 /* bits */ 33, 7820 /* flags */ 0, 7821 }, 7822 #endif /* chips */ 7823 7824 #if defined(BCM_56965_A0) 7825 { /* SOC_FORMAT_INT_FT_IP45_SHARED_TO_IP1_EP0_BCM56965_A0fmt */ 7826 /* format FT_IP45_SHARED_TO_IP1_EP0fmt */ 7827 /* nFields */ 2, 7828 /* *fields */ soc_FT_IP45_SHARED_TO_IP1_EP0_BCM56960_A0fmt_fields, 7829 /* bits */ 33, 7830 /* flags */ 0, 7831 }, 7832 #endif /* chips */ 7833 7834 #if defined(BCM_56970_A0) 7835 { /* SOC_FORMAT_INT_FT_IP45_SHARED_TO_IP1_EP0_BCM56970_A0fmt */ 7836 /* format FT_IP45_SHARED_TO_IP1_EP0fmt */ 7837 /* nFields */ 2, 7838 /* *fields */ soc_FT_IP45_SHARED_TO_IP1_EP0_BCM56960_A0fmt_fields, 7839 /* bits */ 33, 7840 /* flags */ 0, 7841 }, 7842 #endif /* chips */ 7843 7844 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 7845 { /* SOC_FORMAT_INT_FT_IP5_X_TO_MMU0fmt */ 7846 /* format FT_IP5_X_TO_MMU0fmt */ 7847 /* nFields */ 2, 7848 /* *fields */ soc_FT_IP5_X_TO_MMU0fmt_fields, 7849 /* bits */ 993, 7850 /* flags */ 0, 7851 }, 7852 #endif /* chips */ 7853 7854 #if defined(BCM_56370_A0) 7855 { /* SOC_FORMAT_INT_FT_IP5_X_TO_MMU0_BCM56370_A0fmt */ 7856 /* format FT_IP5_X_TO_MMU0fmt */ 7857 /* nFields */ 2, 7858 /* *fields */ soc_FT_IP5_X_TO_MMU0_BCM56960_A0fmt_fields, 7859 /* bits */ 993, 7860 /* flags */ 0, 7861 }, 7862 #endif /* chips */ 7863 7864 #if defined(BCM_56770_A0) 7865 { /* SOC_FORMAT_INT_FT_IP5_X_TO_MMU0_BCM56770_A0fmt */ 7866 /* format FT_IP5_X_TO_MMU0fmt */ 7867 /* nFields */ 2, 7868 /* *fields */ soc_FT_IP5_X_TO_MMU0_BCM56960_A0fmt_fields, 7869 /* bits */ 993, 7870 /* flags */ 0, 7871 }, 7872 #endif /* chips */ 7873 7874 #if defined(BCM_56870_A0) 7875 { /* SOC_FORMAT_INT_FT_IP5_X_TO_MMU0_BCM56870_A0fmt */ 7876 /* format FT_IP5_X_TO_MMU0fmt */ 7877 /* nFields */ 2, 7878 /* *fields */ soc_FT_IP5_X_TO_MMU0_BCM56960_A0fmt_fields, 7879 /* bits */ 993, 7880 /* flags */ 0, 7881 }, 7882 #endif /* chips */ 7883 7884 #if defined(BCM_56960_A0) 7885 { /* SOC_FORMAT_INT_FT_IP5_X_TO_MMU0_BCM56960_A0fmt */ 7886 /* format FT_IP5_X_TO_MMU0fmt */ 7887 /* nFields */ 2, 7888 /* *fields */ soc_FT_IP5_X_TO_MMU0_BCM56960_A0fmt_fields, 7889 /* bits */ 993, 7890 /* flags */ 0, 7891 }, 7892 #endif /* chips */ 7893 7894 #if defined(BCM_56965_A0) 7895 { /* SOC_FORMAT_INT_FT_IP5_X_TO_MMU0_BCM56965_A0fmt */ 7896 /* format FT_IP5_X_TO_MMU0fmt */ 7897 /* nFields */ 2, 7898 /* *fields */ soc_FT_IP5_X_TO_MMU0_BCM56960_A0fmt_fields, 7899 /* bits */ 993, 7900 /* flags */ 0, 7901 }, 7902 #endif /* chips */ 7903 7904 #if defined(BCM_56970_A0) 7905 { /* SOC_FORMAT_INT_FT_IP5_X_TO_MMU0_BCM56970_A0fmt */ 7906 /* format FT_IP5_X_TO_MMU0fmt */ 7907 /* nFields */ 2, 7908 /* *fields */ soc_FT_IP5_X_TO_MMU0_BCM56960_A0fmt_fields, 7909 /* bits */ 993, 7910 /* flags */ 0, 7911 }, 7912 #endif /* chips */ 7913 7914 #if defined(BCM_56850_A0) 7915 { /* SOC_FORMAT_INT_FT_IP5_Y_TO_MMU0fmt */ 7916 /* format FT_IP5_Y_TO_MMU0fmt */ 7917 /* nFields */ 2, 7918 /* *fields */ soc_FT_IP5_X_TO_MMU0fmt_fields, 7919 /* bits */ 993, 7920 /* flags */ 0, 7921 }, 7922 #endif /* chips */ 7923 7924 #if defined(BCM_56370_A0) 7925 { /* SOC_FORMAT_INT_FT_IP5_Y_TO_MMU0_BCM56370_A0fmt */ 7926 /* format FT_IP5_Y_TO_MMU0fmt */ 7927 /* nFields */ 2, 7928 /* *fields */ soc_FT_IP5_X_TO_MMU0_BCM56960_A0fmt_fields, 7929 /* bits */ 993, 7930 /* flags */ 0, 7931 }, 7932 #endif /* chips */ 7933 7934 #if defined(BCM_56770_A0) 7935 { /* SOC_FORMAT_INT_FT_IP5_Y_TO_MMU0_BCM56770_A0fmt */ 7936 /* format FT_IP5_Y_TO_MMU0fmt */ 7937 /* nFields */ 2, 7938 /* *fields */ soc_FT_IP5_X_TO_MMU0_BCM56960_A0fmt_fields, 7939 /* bits */ 993, 7940 /* flags */ 0, 7941 }, 7942 #endif /* chips */ 7943 7944 #if defined(BCM_56860_A0) 7945 { /* SOC_FORMAT_INT_FT_IP5_Y_TO_MMU0_BCM56860_A0fmt */ 7946 /* format FT_IP5_Y_TO_MMU0fmt */ 7947 /* nFields */ 2, 7948 /* *fields */ soc_FT_IP5_X_TO_MMU0fmt_fields, 7949 /* bits */ 993, 7950 /* flags */ 0, 7951 }, 7952 #endif /* chips */ 7953 7954 #if defined(BCM_56870_A0) 7955 { /* SOC_FORMAT_INT_FT_IP5_Y_TO_MMU0_BCM56870_A0fmt */ 7956 /* format FT_IP5_Y_TO_MMU0fmt */ 7957 /* nFields */ 2, 7958 /* *fields */ soc_FT_IP5_X_TO_MMU0_BCM56960_A0fmt_fields, 7959 /* bits */ 993, 7960 /* flags */ 0, 7961 }, 7962 #endif /* chips */ 7963 7964 #if defined(BCM_56960_A0) 7965 { /* SOC_FORMAT_INT_FT_IP5_Y_TO_MMU0_BCM56960_A0fmt */ 7966 /* format FT_IP5_Y_TO_MMU0fmt */ 7967 /* nFields */ 2, 7968 /* *fields */ soc_FT_IP5_X_TO_MMU0_BCM56960_A0fmt_fields, 7969 /* bits */ 993, 7970 /* flags */ 0, 7971 }, 7972 #endif /* chips */ 7973 7974 #if defined(BCM_56965_A0) 7975 { /* SOC_FORMAT_INT_FT_IP5_Y_TO_MMU0_BCM56965_A0fmt */ 7976 /* format FT_IP5_Y_TO_MMU0fmt */ 7977 /* nFields */ 2, 7978 /* *fields */ soc_FT_IP5_X_TO_MMU0_BCM56960_A0fmt_fields, 7979 /* bits */ 993, 7980 /* flags */ 0, 7981 }, 7982 #endif /* chips */ 7983 7984 #if defined(BCM_56970_A0) 7985 { /* SOC_FORMAT_INT_FT_IP5_Y_TO_MMU0_BCM56970_A0fmt */ 7986 /* format FT_IP5_Y_TO_MMU0fmt */ 7987 /* nFields */ 2, 7988 /* *fields */ soc_FT_IP5_X_TO_MMU0_BCM56960_A0fmt_fields, 7989 /* bits */ 993, 7990 /* flags */ 0, 7991 }, 7992 #endif /* chips */ 7993 7994 #if defined(BCM_56770_A0) 7995 { /* SOC_FORMAT_INT_FT_LEARN_DATAfmt */ 7996 /* format FT_LEARN_DATAfmt */ 7997 /* nFields */ 8, 7998 /* *fields */ soc_FT_LEARN_DATAfmt_fields, 7999 /* bits */ 413, 8000 /* flags */ 0, 8001 }, 8002 #endif /* chips */ 8003 8004 #if defined(BCM_56770_A0) 8005 { /* SOC_FORMAT_INT_FT_LEARN_FIFO_REQfmt */ 8006 /* format FT_LEARN_FIFO_REQfmt */ 8007 /* nFields */ 5, 8008 /* *fields */ soc_FT_LEARN_FIFO_REQfmt_fields, 8009 /* bits */ 423, 8010 /* flags */ 0, 8011 }, 8012 #endif /* chips */ 8013 8014 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 8015 { /* SOC_FORMAT_INT_FT_MMU2_TO_CMICMfmt */ 8016 /* format FT_MMU2_TO_CMICMfmt */ 8017 /* nFields */ 1, 8018 /* *fields */ soc_FT_MMU2_TO_CMICMfmt_fields, 8019 /* bits */ 1, 8020 /* flags */ 0, 8021 }, 8022 #endif /* chips */ 8023 8024 #if defined(BCM_56370_A0) 8025 { /* SOC_FORMAT_INT_FT_MMU2_TO_CMICM_BCM56370_A0fmt */ 8026 /* format FT_MMU2_TO_CMICMfmt */ 8027 /* nFields */ 1, 8028 /* *fields */ soc_FT_MMU2_TO_CMICM_BCM56960_A0fmt_fields, 8029 /* bits */ 1, 8030 /* flags */ 0, 8031 }, 8032 #endif /* chips */ 8033 8034 #if defined(BCM_56770_A0) 8035 { /* SOC_FORMAT_INT_FT_MMU2_TO_CMICM_BCM56770_A0fmt */ 8036 /* format FT_MMU2_TO_CMICMfmt */ 8037 /* nFields */ 1, 8038 /* *fields */ soc_FT_MMU2_TO_CMICM_BCM56960_A0fmt_fields, 8039 /* bits */ 1, 8040 /* flags */ 0, 8041 }, 8042 #endif /* chips */ 8043 8044 #if defined(BCM_56870_A0) 8045 { /* SOC_FORMAT_INT_FT_MMU2_TO_CMICM_BCM56870_A0fmt */ 8046 /* format FT_MMU2_TO_CMICMfmt */ 8047 /* nFields */ 1, 8048 /* *fields */ soc_FT_MMU2_TO_CMICM_BCM56960_A0fmt_fields, 8049 /* bits */ 1, 8050 /* flags */ 0, 8051 }, 8052 #endif /* chips */ 8053 8054 #if defined(BCM_56960_A0) 8055 { /* SOC_FORMAT_INT_FT_MMU2_TO_CMICM_BCM56960_A0fmt */ 8056 /* format FT_MMU2_TO_CMICMfmt */ 8057 /* nFields */ 1, 8058 /* *fields */ soc_FT_MMU2_TO_CMICM_BCM56960_A0fmt_fields, 8059 /* bits */ 1, 8060 /* flags */ 0, 8061 }, 8062 #endif /* chips */ 8063 8064 #if defined(BCM_56965_A0) 8065 { /* SOC_FORMAT_INT_FT_MMU2_TO_CMICM_BCM56965_A0fmt */ 8066 /* format FT_MMU2_TO_CMICMfmt */ 8067 /* nFields */ 1, 8068 /* *fields */ soc_FT_MMU2_TO_CMICM_BCM56960_A0fmt_fields, 8069 /* bits */ 1, 8070 /* flags */ 0, 8071 }, 8072 #endif /* chips */ 8073 8074 #if defined(BCM_56970_A0) 8075 { /* SOC_FORMAT_INT_FT_MMU2_TO_CMICM_BCM56970_A0fmt */ 8076 /* format FT_MMU2_TO_CMICMfmt */ 8077 /* nFields */ 1, 8078 /* *fields */ soc_FT_MMU2_TO_CMICM_BCM56960_A0fmt_fields, 8079 /* bits */ 1, 8080 /* flags */ 0, 8081 }, 8082 #endif /* chips */ 8083 8084 #if defined(BCM_56850_A0) 8085 { /* SOC_FORMAT_INT_FT_MMU2_TO_IP45_SHAREDfmt */ 8086 /* format FT_MMU2_TO_IP45_SHAREDfmt */ 8087 /* nFields */ 1, 8088 /* *fields */ soc_FT_MMU2_TO_IP45_SHAREDfmt_fields, 8089 /* bits */ 24, 8090 /* flags */ 0, 8091 }, 8092 #endif /* chips */ 8093 8094 #if defined(BCM_56860_A0) 8095 { /* SOC_FORMAT_INT_FT_MMU2_TO_IP45_SHARED_BCM56860_A0fmt */ 8096 /* format FT_MMU2_TO_IP45_SHAREDfmt */ 8097 /* nFields */ 1, 8098 /* *fields */ soc_FT_MMU2_TO_IP45_SHARED_BCM56860_A0fmt_fields, 8099 /* bits */ 25, 8100 /* flags */ 0, 8101 }, 8102 #endif /* chips */ 8103 8104 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 8105 { /* SOC_FORMAT_INT_FT_MMU2_TO_PGW_CLfmt */ 8106 /* format FT_MMU2_TO_PGW_CLfmt */ 8107 /* nFields */ 3, 8108 /* *fields */ soc_FT_MMU2_TO_PGW_CLfmt_fields, 8109 /* bits */ 336, 8110 /* flags */ 0, 8111 }, 8112 #endif /* chips */ 8113 8114 #if defined(BCM_56370_A0) 8115 { /* SOC_FORMAT_INT_FT_MMU2_TO_PGW_CL_BCM56370_A0fmt */ 8116 /* format FT_MMU2_TO_PGW_CLfmt */ 8117 /* nFields */ 3, 8118 /* *fields */ soc_FT_MMU2_TO_PGW_CL_BCM56960_A0fmt_fields, 8119 /* bits */ 336, 8120 /* flags */ 0, 8121 }, 8122 #endif /* chips */ 8123 8124 #if defined(BCM_56770_A0) 8125 { /* SOC_FORMAT_INT_FT_MMU2_TO_PGW_CL_BCM56770_A0fmt */ 8126 /* format FT_MMU2_TO_PGW_CLfmt */ 8127 /* nFields */ 3, 8128 /* *fields */ soc_FT_MMU2_TO_PGW_CL_BCM56960_A0fmt_fields, 8129 /* bits */ 336, 8130 /* flags */ 0, 8131 }, 8132 #endif /* chips */ 8133 8134 #if defined(BCM_56870_A0) 8135 { /* SOC_FORMAT_INT_FT_MMU2_TO_PGW_CL_BCM56870_A0fmt */ 8136 /* format FT_MMU2_TO_PGW_CLfmt */ 8137 /* nFields */ 3, 8138 /* *fields */ soc_FT_MMU2_TO_PGW_CL_BCM56960_A0fmt_fields, 8139 /* bits */ 336, 8140 /* flags */ 0, 8141 }, 8142 #endif /* chips */ 8143 8144 #if defined(BCM_56960_A0) 8145 { /* SOC_FORMAT_INT_FT_MMU2_TO_PGW_CL_BCM56960_A0fmt */ 8146 /* format FT_MMU2_TO_PGW_CLfmt */ 8147 /* nFields */ 3, 8148 /* *fields */ soc_FT_MMU2_TO_PGW_CL_BCM56960_A0fmt_fields, 8149 /* bits */ 336, 8150 /* flags */ 0, 8151 }, 8152 #endif /* chips */ 8153 8154 #if defined(BCM_56965_A0) 8155 { /* SOC_FORMAT_INT_FT_MMU2_TO_PGW_CL_BCM56965_A0fmt */ 8156 /* format FT_MMU2_TO_PGW_CLfmt */ 8157 /* nFields */ 3, 8158 /* *fields */ soc_FT_MMU2_TO_PGW_CL_BCM56960_A0fmt_fields, 8159 /* bits */ 336, 8160 /* flags */ 0, 8161 }, 8162 #endif /* chips */ 8163 8164 #if defined(BCM_56970_A0) 8165 { /* SOC_FORMAT_INT_FT_MMU2_TO_PGW_CL_BCM56970_A0fmt */ 8166 /* format FT_MMU2_TO_PGW_CLfmt */ 8167 /* nFields */ 3, 8168 /* *fields */ soc_FT_MMU2_TO_PGW_CL_BCM56960_A0fmt_fields, 8169 /* bits */ 336, 8170 /* flags */ 0, 8171 }, 8172 #endif /* chips */ 8173 8174 #if defined(BCM_56640_A0) 8175 { /* SOC_FORMAT_INT_FT_OUT_BUSfmt */ 8176 /* format FT_OUT_BUSfmt */ 8177 /* nFields */ 15, 8178 /* *fields */ soc_FT_OUT_BUSfmt_fields, 8179 /* bits */ 81, 8180 /* flags */ 0, 8181 }, 8182 #endif /* chips */ 8183 8184 #if defined(BCM_56340_A0) 8185 { /* SOC_FORMAT_INT_FT_OUT_BUS_BCM56340_A0fmt */ 8186 /* format FT_OUT_BUSfmt */ 8187 /* nFields */ 15, 8188 /* *fields */ soc_FT_OUT_BUS_BCM56340_A0fmt_fields, 8189 /* bits */ 78, 8190 /* flags */ 0, 8191 }, 8192 #endif /* chips */ 8193 8194 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 8195 { /* SOC_FORMAT_INT_FT_PGW_CL_TO_MMU2fmt */ 8196 /* format FT_PGW_CL_TO_MMU2fmt */ 8197 /* nFields */ 1, 8198 /* *fields */ soc_FT_PGW_CL_TO_MMU2fmt_fields, 8199 /* bits */ 64, 8200 /* flags */ 0, 8201 }, 8202 #endif /* chips */ 8203 8204 #if defined(BCM_56370_A0) 8205 { /* SOC_FORMAT_INT_FT_PGW_CL_TO_MMU2_BCM56370_A0fmt */ 8206 /* format FT_PGW_CL_TO_MMU2fmt */ 8207 /* nFields */ 1, 8208 /* *fields */ soc_FT_PGW_CL_TO_MMU2_BCM56960_A0fmt_fields, 8209 /* bits */ 64, 8210 /* flags */ 0, 8211 }, 8212 #endif /* chips */ 8213 8214 #if defined(BCM_56770_A0) 8215 { /* SOC_FORMAT_INT_FT_PGW_CL_TO_MMU2_BCM56770_A0fmt */ 8216 /* format FT_PGW_CL_TO_MMU2fmt */ 8217 /* nFields */ 1, 8218 /* *fields */ soc_FT_PGW_CL_TO_MMU2_BCM56960_A0fmt_fields, 8219 /* bits */ 64, 8220 /* flags */ 0, 8221 }, 8222 #endif /* chips */ 8223 8224 #if defined(BCM_56870_A0) 8225 { /* SOC_FORMAT_INT_FT_PGW_CL_TO_MMU2_BCM56870_A0fmt */ 8226 /* format FT_PGW_CL_TO_MMU2fmt */ 8227 /* nFields */ 1, 8228 /* *fields */ soc_FT_PGW_CL_TO_MMU2_BCM56960_A0fmt_fields, 8229 /* bits */ 64, 8230 /* flags */ 0, 8231 }, 8232 #endif /* chips */ 8233 8234 #if defined(BCM_56960_A0) 8235 { /* SOC_FORMAT_INT_FT_PGW_CL_TO_MMU2_BCM56960_A0fmt */ 8236 /* format FT_PGW_CL_TO_MMU2fmt */ 8237 /* nFields */ 1, 8238 /* *fields */ soc_FT_PGW_CL_TO_MMU2_BCM56960_A0fmt_fields, 8239 /* bits */ 64, 8240 /* flags */ 0, 8241 }, 8242 #endif /* chips */ 8243 8244 #if defined(BCM_56965_A0) 8245 { /* SOC_FORMAT_INT_FT_PGW_CL_TO_MMU2_BCM56965_A0fmt */ 8246 /* format FT_PGW_CL_TO_MMU2fmt */ 8247 /* nFields */ 1, 8248 /* *fields */ soc_FT_PGW_CL_TO_MMU2_BCM56960_A0fmt_fields, 8249 /* bits */ 64, 8250 /* flags */ 0, 8251 }, 8252 #endif /* chips */ 8253 8254 #if defined(BCM_56970_A0) 8255 { /* SOC_FORMAT_INT_FT_PGW_CL_TO_MMU2_BCM56970_A0fmt */ 8256 /* format FT_PGW_CL_TO_MMU2fmt */ 8257 /* nFields */ 1, 8258 /* *fields */ soc_FT_PGW_CL_TO_MMU2_BCM56960_A0fmt_fields, 8259 /* bits */ 64, 8260 /* flags */ 0, 8261 }, 8262 #endif /* chips */ 8263 8264 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 8265 { /* SOC_FORMAT_INT_FT_PGW_X_TO_CMICMfmt */ 8266 /* format FT_PGW_X_TO_CMICMfmt */ 8267 /* nFields */ 5, 8268 /* *fields */ soc_FT_PGW_X_TO_CMICMfmt_fields, 8269 /* bits */ 67, 8270 /* flags */ 0, 8271 }, 8272 #endif /* chips */ 8273 8274 #if defined(BCM_56370_A0) 8275 { /* SOC_FORMAT_INT_FT_PGW_X_TO_CMICM_BCM56370_A0fmt */ 8276 /* format FT_PGW_X_TO_CMICMfmt */ 8277 /* nFields */ 5, 8278 /* *fields */ soc_FT_PGW_X_TO_CMICM_BCM56960_A0fmt_fields, 8279 /* bits */ 67, 8280 /* flags */ 0, 8281 }, 8282 #endif /* chips */ 8283 8284 #if defined(BCM_56770_A0) 8285 { /* SOC_FORMAT_INT_FT_PGW_X_TO_CMICM_BCM56770_A0fmt */ 8286 /* format FT_PGW_X_TO_CMICMfmt */ 8287 /* nFields */ 5, 8288 /* *fields */ soc_FT_PGW_X_TO_CMICM_BCM56960_A0fmt_fields, 8289 /* bits */ 67, 8290 /* flags */ 0, 8291 }, 8292 #endif /* chips */ 8293 8294 #if defined(BCM_56870_A0) 8295 { /* SOC_FORMAT_INT_FT_PGW_X_TO_CMICM_BCM56870_A0fmt */ 8296 /* format FT_PGW_X_TO_CMICMfmt */ 8297 /* nFields */ 5, 8298 /* *fields */ soc_FT_PGW_X_TO_CMICM_BCM56960_A0fmt_fields, 8299 /* bits */ 67, 8300 /* flags */ 0, 8301 }, 8302 #endif /* chips */ 8303 8304 #if defined(BCM_56960_A0) 8305 { /* SOC_FORMAT_INT_FT_PGW_X_TO_CMICM_BCM56960_A0fmt */ 8306 /* format FT_PGW_X_TO_CMICMfmt */ 8307 /* nFields */ 5, 8308 /* *fields */ soc_FT_PGW_X_TO_CMICM_BCM56960_A0fmt_fields, 8309 /* bits */ 67, 8310 /* flags */ 0, 8311 }, 8312 #endif /* chips */ 8313 8314 #if defined(BCM_56965_A0) 8315 { /* SOC_FORMAT_INT_FT_PGW_X_TO_CMICM_BCM56965_A0fmt */ 8316 /* format FT_PGW_X_TO_CMICMfmt */ 8317 /* nFields */ 5, 8318 /* *fields */ soc_FT_PGW_X_TO_CMICM_BCM56960_A0fmt_fields, 8319 /* bits */ 67, 8320 /* flags */ 0, 8321 }, 8322 #endif /* chips */ 8323 8324 #if defined(BCM_56970_A0) 8325 { /* SOC_FORMAT_INT_FT_PGW_X_TO_CMICM_BCM56970_A0fmt */ 8326 /* format FT_PGW_X_TO_CMICMfmt */ 8327 /* nFields */ 5, 8328 /* *fields */ soc_FT_PGW_X_TO_CMICM_BCM56960_A0fmt_fields, 8329 /* bits */ 67, 8330 /* flags */ 0, 8331 }, 8332 #endif /* chips */ 8333 8334 #if defined(BCM_56850_A0) || defined(BCM_56860_A0) 8335 { /* SOC_FORMAT_INT_FT_PGW_Y_TO_CMICMfmt */ 8336 /* format FT_PGW_Y_TO_CMICMfmt */ 8337 /* nFields */ 5, 8338 /* *fields */ soc_FT_PGW_Y_TO_CMICMfmt_fields, 8339 /* bits */ 67, 8340 /* flags */ 0, 8341 }, 8342 #endif /* chips */ 8343 8344 #if defined(BCM_56370_A0) 8345 { /* SOC_FORMAT_INT_FT_PGW_Y_TO_CMICM_BCM56370_A0fmt */ 8346 /* format FT_PGW_Y_TO_CMICMfmt */ 8347 /* nFields */ 5, 8348 /* *fields */ soc_FT_PGW_Y_TO_CMICM_BCM56960_A0fmt_fields, 8349 /* bits */ 67, 8350 /* flags */ 0, 8351 }, 8352 #endif /* chips */ 8353 8354 #if defined(BCM_56770_A0) 8355 { /* SOC_FORMAT_INT_FT_PGW_Y_TO_CMICM_BCM56770_A0fmt */ 8356 /* format FT_PGW_Y_TO_CMICMfmt */ 8357 /* nFields */ 5, 8358 /* *fields */ soc_FT_PGW_Y_TO_CMICM_BCM56960_A0fmt_fields, 8359 /* bits */ 67, 8360 /* flags */ 0, 8361 }, 8362 #endif /* chips */ 8363 8364 #if defined(BCM_56870_A0) 8365 { /* SOC_FORMAT_INT_FT_PGW_Y_TO_CMICM_BCM56870_A0fmt */ 8366 /* format FT_PGW_Y_TO_CMICMfmt */ 8367 /* nFields */ 5, 8368 /* *fields */ soc_FT_PGW_Y_TO_CMICM_BCM56960_A0fmt_fields, 8369 /* bits */ 67, 8370 /* flags */ 0, 8371 }, 8372 #endif /* chips */ 8373 8374 #if defined(BCM_56960_A0) 8375 { /* SOC_FORMAT_INT_FT_PGW_Y_TO_CMICM_BCM56960_A0fmt */ 8376 /* format FT_PGW_Y_TO_CMICMfmt */ 8377 /* nFields */ 5, 8378 /* *fields */ soc_FT_PGW_Y_TO_CMICM_BCM56960_A0fmt_fields, 8379 /* bits */ 67, 8380 /* flags */ 0, 8381 }, 8382 #endif /* chips */ 8383 8384 #if defined(BCM_56965_A0) 8385 { /* SOC_FORMAT_INT_FT_PGW_Y_TO_CMICM_BCM56965_A0fmt */ 8386 /* format FT_PGW_Y_TO_CMICMfmt */ 8387 /* nFields */ 5, 8388 /* *fields */ soc_FT_PGW_Y_TO_CMICM_BCM56960_A0fmt_fields, 8389 /* bits */ 67, 8390 /* flags */ 0, 8391 }, 8392 #endif /* chips */ 8393 8394 #if defined(BCM_56970_A0) 8395 { /* SOC_FORMAT_INT_FT_PGW_Y_TO_CMICM_BCM56970_A0fmt */ 8396 /* format FT_PGW_Y_TO_CMICMfmt */ 8397 /* nFields */ 5, 8398 /* *fields */ soc_FT_PGW_Y_TO_CMICM_BCM56960_A0fmt_fields, 8399 /* bits */ 67, 8400 /* flags */ 0, 8401 }, 8402 #endif /* chips */ 8403 8404 #if defined(BCM_56770_A0) 8405 { /* SOC_FORMAT_INT_FT_SER_CONTROLfmt */ 8406 /* format FT_SER_CONTROLfmt */ 8407 /* nFields */ 10, 8408 /* *fields */ soc_FT_SER_CONTROLfmt_fields, 8409 /* bits */ 12, 8410 /* flags */ 0, 8411 }, 8412 #endif /* chips */ 8413 8414 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 8415 { /* SOC_FORMAT_INT_FT_SESSION_COV_DEFSfmt */ 8416 /* format FT_SESSION_COV_DEFSfmt */ 8417 /* nFields */ 8, 8418 /* *fields */ soc_FT_SESSION_COV_DEFSfmt_fields, 8419 /* bits */ 22, 8420 /* flags */ 0, 8421 }, 8422 #endif /* chips */ 8423 8424 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 8425 { /* SOC_FORMAT_INT_FT_SM_HDR_ALLfmt */ 8426 /* format FT_SM_HDR_ALLfmt */ 8427 /* nFields */ 12, 8428 /* *fields */ soc_FT_SM_HDR_ALLfmt_fields, 8429 /* bits */ 70, 8430 /* flags */ 0, 8431 }, 8432 #endif /* chips */ 8433 8434 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 8435 { /* SOC_FORMAT_INT_FT_SM_HDR_IPfmt */ 8436 /* format FT_SM_HDR_IPfmt */ 8437 /* nFields */ 7, 8438 /* *fields */ soc_FT_SM_HDR_IPfmt_fields, 8439 /* bits */ 37, 8440 /* flags */ 0, 8441 }, 8442 #endif /* chips */ 8443 8444 #if defined(BCM_56860_A0) 8445 { /* SOC_FORMAT_INT_FT_TOP_REGS_TO_EP1fmt */ 8446 /* format FT_TOP_REGS_TO_EP1fmt */ 8447 /* nFields */ 1, 8448 /* *fields */ soc_FT_TOP_REGS_TO_EP1fmt_fields, 8449 /* bits */ 48, 8450 /* flags */ 0, 8451 }, 8452 #endif /* chips */ 8453 8454 #if defined(BCM_56770_A0) || defined(BCM_56870_A0) 8455 { /* SOC_FORMAT_INT_FWD1_0_DOPfmt */ 8456 /* format FWD1_0_DOPfmt */ 8457 /* nFields */ 9, 8458 /* *fields */ soc_FWD1_0_DOPfmt_fields, 8459 /* bits */ 64, 8460 /* flags */ 0, 8461 }, 8462 #endif /* chips */ 8463 8464 #if defined(BCM_56370_A0) 8465 { /* SOC_FORMAT_INT_FWD1_0_DOP_BCM56370_A0fmt */ 8466 /* format FWD1_0_DOPfmt */ 8467 /* nFields */ 9, 8468 /* *fields */ soc_FWD1_0_DOP_BCM56370_A0fmt_fields, 8469 /* bits */ 64, 8470 /* flags */ 0, 8471 }, 8472 #endif /* chips */ 8473 8474 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 8475 defined(BCM_56870_A0) 8476 { /* SOC_FORMAT_INT_FWD1_1_DOPfmt */ 8477 /* format FWD1_1_DOPfmt */ 8478 /* nFields */ 10, 8479 /* *fields */ soc_FWD1_1_DOPfmt_fields, 8480 /* bits */ 32, 8481 /* flags */ 0, 8482 }, 8483 #endif /* chips */ 8484 8485 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 8486 defined(BCM_56870_A0) 8487 { /* SOC_FORMAT_INT_FWD1_DROPS_DOPfmt */ 8488 /* format FWD1_DROPS_DOPfmt */ 8489 /* nFields */ 5, 8490 /* *fields */ soc_FWD1_DROPS_DOPfmt_fields, 8491 /* bits */ 32, 8492 /* flags */ 0, 8493 }, 8494 #endif /* chips */ 8495 8496 #if defined(BCM_56770_A0) || defined(BCM_56870_A0) 8497 { /* SOC_FORMAT_INT_FWD1_FWD_OBJ_DOPfmt */ 8498 /* format FWD1_FWD_OBJ_DOPfmt */ 8499 /* nFields */ 6, 8500 /* *fields */ soc_FWD1_FWD_OBJ_DOPfmt_fields, 8501 /* bits */ 64, 8502 /* flags */ 0, 8503 }, 8504 #endif /* chips */ 8505 8506 #if defined(BCM_56370_A0) 8507 { /* SOC_FORMAT_INT_FWD1_FWD_OBJ_DOP_BCM56370_A0fmt */ 8508 /* format FWD1_FWD_OBJ_DOPfmt */ 8509 /* nFields */ 6, 8510 /* *fields */ soc_FWD1_FWD_OBJ_DOP_BCM56370_A0fmt_fields, 8511 /* bits */ 64, 8512 /* flags */ 0, 8513 }, 8514 #endif /* chips */ 8515 8516 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 8517 defined(BCM_56870_A0) 8518 { /* SOC_FORMAT_INT_FWD2_0_DOPfmt */ 8519 /* format FWD2_0_DOPfmt */ 8520 /* nFields */ 4, 8521 /* *fields */ soc_FWD2_0_DOPfmt_fields, 8522 /* bits */ 32, 8523 /* flags */ 0, 8524 }, 8525 #endif /* chips */ 8526 8527 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 8528 defined(BCM_56870_A0) 8529 { /* SOC_FORMAT_INT_FWD2_ITAG_ISID_OR_VPNID_OR_VN_ID_DOPfmt */ 8530 /* format FWD2_ITAG_ISID_OR_VPNID_OR_VN_ID_DOPfmt */ 8531 /* nFields */ 2, 8532 /* *fields */ soc_FWD2_ITAG_ISID_OR_VPNID_OR_VN_ID_DOPfmt_fields, 8533 /* bits */ 32, 8534 /* flags */ 0, 8535 }, 8536 #endif /* chips */ 8537 8538 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 8539 defined(BCM_56870_A0) 8540 { /* SOC_FORMAT_INT_FWD2_MAPPING_COMPRESSION_RESULTS_DOPfmt */ 8541 /* format FWD2_MAPPING_COMPRESSION_RESULTS_DOPfmt */ 8542 /* nFields */ 12, 8543 /* *fields */ soc_FWD2_MAPPING_COMPRESSION_RESULTS_DOPfmt_fields, 8544 /* bits */ 32, 8545 /* flags */ 0, 8546 }, 8547 #endif /* chips */ 8548 8549 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 8550 defined(BCM_56870_A0) 8551 { /* SOC_FORMAT_INT_FWD_ATTRIBUTES_ACTION_SETfmt */ 8552 /* format FWD_ATTRIBUTES_ACTION_SETfmt */ 8553 /* nFields */ 3, 8554 /* *fields */ soc_FWD_ATTRIBUTES_ACTION_SETfmt_fields, 8555 /* bits */ 3, 8556 /* flags */ 0, 8557 }, 8558 #endif /* chips */ 8559 8560 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 8561 defined(BCM_56870_A0) 8562 { /* SOC_FORMAT_INT_FWD_DOMAIN_ACTION_SETfmt */ 8563 /* format FWD_DOMAIN_ACTION_SETfmt */ 8564 /* nFields */ 2, 8565 /* *fields */ soc_FWD_DOMAIN_ACTION_SETfmt_fields, 8566 /* bits */ 16, 8567 /* flags */ 0, 8568 }, 8569 #endif /* chips */ 8570 8571 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 8572 defined(BCM_56870_A0) 8573 { /* SOC_FORMAT_INT_FWD_DROP_VECTORfmt */ 8574 /* format FWD_DROP_VECTORfmt */ 8575 /* nFields */ 5, 8576 /* *fields */ soc_FWD_DROP_VECTORfmt_fields, 8577 /* bits */ 6, 8578 /* flags */ 0, 8579 }, 8580 #endif /* chips */ 8581