allformats_a.i (62270B)
1 /* 2 * DO NOT EDIT THIS FILE! 3 * This file is auto-generated from the registers file. 4 * Edits to this file will be lost when it is regenerated. 5 * 6 * 7 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 8 * 9 * Copyright 2007-2020 Broadcom Inc. All rights reserved. 10 * 11 * File: allformats_a.i 12 * Purpose: Independent format descriptions. 13 */ 14 15 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 16 { /* SOC_FORMAT_INT_ACK_BUS_CPfmt */ 17 /* format ACK_BUS_CPfmt */ 18 /* nFields */ 8, 19 /* *fields */ soc_ACK_BUS_CPfmt_fields, 20 /* bits */ 456, 21 /* flags */ 0, 22 }, 23 #endif /* chips */ 24 25 #if defined(BCM_56370_A0) 26 { /* SOC_FORMAT_INT_ACK_BUS_CP_BCM56370_A0fmt */ 27 /* format ACK_BUS_CPfmt */ 28 /* nFields */ 11, 29 /* *fields */ soc_ACK_BUS_CP_BCM56870_A0fmt_fields, 30 /* bits */ 143, 31 /* flags */ 0, 32 }, 33 #endif /* chips */ 34 35 #if defined(BCM_56770_A0) 36 { /* SOC_FORMAT_INT_ACK_BUS_CP_BCM56770_A0fmt */ 37 /* format ACK_BUS_CPfmt */ 38 /* nFields */ 11, 39 /* *fields */ soc_ACK_BUS_CP_BCM56870_A0fmt_fields, 40 /* bits */ 143, 41 /* flags */ 0, 42 }, 43 #endif /* chips */ 44 45 #if defined(BCM_56870_A0) 46 { /* SOC_FORMAT_INT_ACK_BUS_CP_BCM56870_A0fmt */ 47 /* format ACK_BUS_CPfmt */ 48 /* nFields */ 11, 49 /* *fields */ soc_ACK_BUS_CP_BCM56870_A0fmt_fields, 50 /* bits */ 143, 51 /* flags */ 0, 52 }, 53 #endif /* chips */ 54 55 #if defined(BCM_56960_A0) 56 { /* SOC_FORMAT_INT_ACK_BUS_CP_BCM56960_A0fmt */ 57 /* format ACK_BUS_CPfmt */ 58 /* nFields */ 11, 59 /* *fields */ soc_ACK_BUS_CP_BCM56960_A0fmt_fields, 60 /* bits */ 140, 61 /* flags */ 0, 62 }, 63 #endif /* chips */ 64 65 #if defined(BCM_56965_A0) 66 { /* SOC_FORMAT_INT_ACK_BUS_CP_BCM56965_A0fmt */ 67 /* format ACK_BUS_CPfmt */ 68 /* nFields */ 11, 69 /* *fields */ soc_ACK_BUS_CP_BCM56960_A0fmt_fields, 70 /* bits */ 140, 71 /* flags */ 0, 72 }, 73 #endif /* chips */ 74 75 #if defined(BCM_56970_A0) 76 { /* SOC_FORMAT_INT_ACK_BUS_CP_BCM56970_A0fmt */ 77 /* format ACK_BUS_CPfmt */ 78 /* nFields */ 11, 79 /* *fields */ soc_ACK_BUS_CP_BCM56960_A0fmt_fields, 80 /* bits */ 140, 81 /* flags */ 0, 82 }, 83 #endif /* chips */ 84 85 #if defined(BCM_56640_A0) 86 { /* SOC_FORMAT_INT_ACK_BUS_EXT_ADfmt */ 87 /* format ACK_BUS_EXT_ADfmt */ 88 /* nFields */ 3, 89 /* *fields */ soc_ACK_BUS_EXT_ADfmt_fields, 90 /* bits */ 216, 91 /* flags */ 0, 92 }, 93 #endif /* chips */ 94 95 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 96 { /* SOC_FORMAT_INT_ACK_BUS_MAC_LIMITfmt */ 97 /* format ACK_BUS_MAC_LIMITfmt */ 98 /* nFields */ 10, 99 /* *fields */ soc_ACK_BUS_MAC_LIMITfmt_fields, 100 /* bits */ 10, 101 /* flags */ 0, 102 }, 103 #endif /* chips */ 104 105 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 106 { /* SOC_FORMAT_INT_ACK_BUS_MAC_LIMIT_CPfmt */ 107 /* format ACK_BUS_MAC_LIMIT_CPfmt */ 108 /* nFields */ 4, 109 /* *fields */ soc_ACK_BUS_MAC_LIMIT_CPfmt_fields, 110 /* bits */ 6, 111 /* flags */ 0, 112 }, 113 #endif /* chips */ 114 115 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 116 { /* SOC_FORMAT_INT_ACK_BUS_MOD_FIFO_CPfmt */ 117 /* format ACK_BUS_MOD_FIFO_CPfmt */ 118 /* nFields */ 2, 119 /* *fields */ soc_ACK_BUS_MOD_FIFO_CPfmt_fields, 120 /* bits */ 4, 121 /* flags */ 0, 122 }, 123 #endif /* chips */ 124 125 #if defined(BCM_56370_A0) 126 { /* SOC_FORMAT_INT_ACK_BUS_MOD_FIFO_CP_BCM56370_A0fmt */ 127 /* format ACK_BUS_MOD_FIFO_CPfmt */ 128 /* nFields */ 2, 129 /* *fields */ soc_ACK_BUS_MOD_FIFO_CP_BCM56960_A0fmt_fields, 130 /* bits */ 4, 131 /* flags */ 0, 132 }, 133 #endif /* chips */ 134 135 #if defined(BCM_56770_A0) 136 { /* SOC_FORMAT_INT_ACK_BUS_MOD_FIFO_CP_BCM56770_A0fmt */ 137 /* format ACK_BUS_MOD_FIFO_CPfmt */ 138 /* nFields */ 2, 139 /* *fields */ soc_ACK_BUS_MOD_FIFO_CP_BCM56960_A0fmt_fields, 140 /* bits */ 4, 141 /* flags */ 0, 142 }, 143 #endif /* chips */ 144 145 #if defined(BCM_56870_A0) 146 { /* SOC_FORMAT_INT_ACK_BUS_MOD_FIFO_CP_BCM56870_A0fmt */ 147 /* format ACK_BUS_MOD_FIFO_CPfmt */ 148 /* nFields */ 2, 149 /* *fields */ soc_ACK_BUS_MOD_FIFO_CP_BCM56960_A0fmt_fields, 150 /* bits */ 4, 151 /* flags */ 0, 152 }, 153 #endif /* chips */ 154 155 #if defined(BCM_56960_A0) 156 { /* SOC_FORMAT_INT_ACK_BUS_MOD_FIFO_CP_BCM56960_A0fmt */ 157 /* format ACK_BUS_MOD_FIFO_CPfmt */ 158 /* nFields */ 2, 159 /* *fields */ soc_ACK_BUS_MOD_FIFO_CP_BCM56960_A0fmt_fields, 160 /* bits */ 4, 161 /* flags */ 0, 162 }, 163 #endif /* chips */ 164 165 #if defined(BCM_56965_A0) 166 { /* SOC_FORMAT_INT_ACK_BUS_MOD_FIFO_CP_BCM56965_A0fmt */ 167 /* format ACK_BUS_MOD_FIFO_CPfmt */ 168 /* nFields */ 2, 169 /* *fields */ soc_ACK_BUS_MOD_FIFO_CP_BCM56960_A0fmt_fields, 170 /* bits */ 4, 171 /* flags */ 0, 172 }, 173 #endif /* chips */ 174 175 #if defined(BCM_56970_A0) 176 { /* SOC_FORMAT_INT_ACK_BUS_MOD_FIFO_CP_BCM56970_A0fmt */ 177 /* format ACK_BUS_MOD_FIFO_CPfmt */ 178 /* nFields */ 2, 179 /* *fields */ soc_ACK_BUS_MOD_FIFO_CP_BCM56960_A0fmt_fields, 180 /* bits */ 4, 181 /* flags */ 0, 182 }, 183 #endif /* chips */ 184 185 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 186 { /* SOC_FORMAT_INT_ACK_BUS_PIPE_TBL0fmt */ 187 /* format ACK_BUS_PIPE_TBL0fmt */ 188 /* nFields */ 5, 189 /* *fields */ soc_ACK_BUS_PIPE_TBL0fmt_fields, 190 /* bits */ 132, 191 /* flags */ 0, 192 }, 193 #endif /* chips */ 194 195 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 196 { /* SOC_FORMAT_INT_ACK_BUS_PIPE_TBL1fmt */ 197 /* format ACK_BUS_PIPE_TBL1fmt */ 198 /* nFields */ 5, 199 /* *fields */ soc_ACK_BUS_PIPE_TBL1fmt_fields, 200 /* bits */ 89, 201 /* flags */ 0, 202 }, 203 #endif /* chips */ 204 205 #if defined(BCM_56640_A0) 206 { /* SOC_FORMAT_INT_ACK_BUS_PIPE_TBL2fmt */ 207 /* format ACK_BUS_PIPE_TBL2fmt */ 208 /* nFields */ 5, 209 /* *fields */ soc_ACK_BUS_PIPE_TBL2fmt_fields, 210 /* bits */ 173, 211 /* flags */ 0, 212 }, 213 #endif /* chips */ 214 215 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 216 { /* SOC_FORMAT_INT_ACK_BUS_PIPE_TBL3fmt */ 217 /* format ACK_BUS_PIPE_TBL3fmt */ 218 /* nFields */ 5, 219 /* *fields */ soc_ACK_BUS_PIPE_TBL3fmt_fields, 220 /* bits */ 96, 221 /* flags */ 0, 222 }, 223 #endif /* chips */ 224 225 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 226 { /* SOC_FORMAT_INT_ACK_BUS_PIPE_TBL4fmt */ 227 /* format ACK_BUS_PIPE_TBL4fmt */ 228 /* nFields */ 5, 229 /* *fields */ soc_ACK_BUS_PIPE_TBL4fmt_fields, 230 /* bits */ 118, 231 /* flags */ 0, 232 }, 233 #endif /* chips */ 234 235 #if defined(BCM_56340_A0) 236 { /* SOC_FORMAT_INT_ACK_BUS_PIPE_TBL2_BCM56340_A0fmt */ 237 /* format ACK_BUS_PIPE_TBL2fmt */ 238 /* nFields */ 5, 239 /* *fields */ soc_ACK_BUS_PIPE_TBL2_BCM56340_A0fmt_fields, 240 /* bits */ 173, 241 /* flags */ 0, 242 }, 243 #endif /* chips */ 244 245 #if defined(BCM_56640_A0) 246 { /* SOC_FORMAT_INT_ACK_DATA_EXT_AD_CPfmt */ 247 /* format ACK_DATA_EXT_AD_CPfmt */ 248 /* nFields */ 7, 249 /* *fields */ soc_ACK_DATA_EXT_AD_CPfmt_fields, 250 /* bits */ 210, 251 /* flags */ 0, 252 }, 253 #endif /* chips */ 254 255 #if defined(BCM_56640_A0) 256 { /* SOC_FORMAT_INT_ACK_DATA_EXT_L2fmt */ 257 /* format ACK_DATA_EXT_L2fmt */ 258 /* nFields */ 12, 259 /* *fields */ soc_ACK_DATA_EXT_L2fmt_fields, 260 /* bits */ 172, 261 /* flags */ 0, 262 }, 263 #endif /* chips */ 264 265 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 266 defined(BCM_56870_A0) || defined(BCM_56980_A0) || \ 267 defined(BCM_56980_B0) 268 { /* SOC_FORMAT_INT_ACTION_TABLEfmt */ 269 /* format ACTION_TABLEfmt */ 270 /* nFields */ 1, 271 /* *fields */ soc_ACTION_TABLEfmt_fields, 272 /* bits */ 64, 273 /* flags */ 0, 274 }, 275 #endif /* chips */ 276 277 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 278 defined(BCM_56870_A0) || defined(BCM_56980_A0) || \ 279 defined(BCM_56980_B0) 280 { /* SOC_FORMAT_INT_ACTION_TABLE_ECCfmt */ 281 /* format ACTION_TABLE_ECCfmt */ 282 /* nFields */ 5, 283 /* *fields */ soc_ACTION_TABLE_ECCfmt_fields, 284 /* bits */ 72, 285 /* flags */ 0, 286 }, 287 #endif /* chips */ 288 289 #if defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 290 defined(BCM_56450_B1) 291 { /* SOC_FORMAT_INT_ADM_TO_CLINKE_INFOfmt */ 292 /* format ADM_TO_CLINKE_INFOfmt */ 293 /* nFields */ 2, 294 /* *fields */ soc_ADM_TO_CLINKE_INFOfmt_fields, 295 /* bits */ 19, 296 /* flags */ 0, 297 }, 298 #endif /* chips */ 299 300 #if defined(BCM_56260_A0) 301 { /* SOC_FORMAT_INT_ADM_TO_CLINKE_INFO_BCM56260_A0fmt */ 302 /* format ADM_TO_CLINKE_INFOfmt */ 303 /* nFields */ 2, 304 /* *fields */ soc_ADM_TO_CLINKE_INFO_BCM56260_A0fmt_fields, 305 /* bits */ 17, 306 /* flags */ 0, 307 }, 308 #endif /* chips */ 309 310 #if defined(BCM_56260_B0) 311 { /* SOC_FORMAT_INT_ADM_TO_CLINKE_INFO_BCM56260_B0fmt */ 312 /* format ADM_TO_CLINKE_INFOfmt */ 313 /* nFields */ 2, 314 /* *fields */ soc_ADM_TO_CLINKE_INFO_BCM56260_A0fmt_fields, 315 /* bits */ 17, 316 /* flags */ 0, 317 }, 318 #endif /* chips */ 319 320 #if defined(BCM_56800_A0) 321 { /* SOC_FORMAT_INT_ADM_TO_ENQfmt */ 322 /* format ADM_TO_ENQfmt */ 323 /* nFields */ 5, 324 /* *fields */ soc_ADM_TO_ENQfmt_fields, 325 /* bits */ 15, 326 /* flags */ 0, 327 }, 328 #endif /* chips */ 329 330 #if defined(BCM_56334_A0) 331 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56334_A0fmt */ 332 /* format ADM_TO_ENQfmt */ 333 /* nFields */ 6, 334 /* *fields */ soc_ADM_TO_ENQ_BCM56624_A0fmt_fields, 335 /* bits */ 21, 336 /* flags */ 0, 337 }, 338 #endif /* chips */ 339 340 #if defined(BCM_56334_B0) 341 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56334_B0fmt */ 342 /* format ADM_TO_ENQfmt */ 343 /* nFields */ 6, 344 /* *fields */ soc_ADM_TO_ENQ_BCM56624_A0fmt_fields, 345 /* bits */ 21, 346 /* flags */ 0, 347 }, 348 #endif /* chips */ 349 350 #if defined(BCM_56340_A0) 351 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56340_A0fmt */ 352 /* format ADM_TO_ENQfmt */ 353 /* nFields */ 7, 354 /* *fields */ soc_ADM_TO_ENQ_BCM56640_A0fmt_fields, 355 /* bits */ 27, 356 /* flags */ 0, 357 }, 358 #endif /* chips */ 359 360 #if defined(BCM_56440_A0) 361 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56440_A0fmt */ 362 /* format ADM_TO_ENQfmt */ 363 /* nFields */ 7, 364 /* *fields */ soc_ADM_TO_ENQ_BCM56840_A0fmt_fields, 365 /* bits */ 25, 366 /* flags */ 0, 367 }, 368 #endif /* chips */ 369 370 #if defined(BCM_56440_B0) 371 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56440_B0fmt */ 372 /* format ADM_TO_ENQfmt */ 373 /* nFields */ 7, 374 /* *fields */ soc_ADM_TO_ENQ_BCM56840_A0fmt_fields, 375 /* bits */ 25, 376 /* flags */ 0, 377 }, 378 #endif /* chips */ 379 380 #if defined(BCM_56450_A0) 381 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56450_A0fmt */ 382 /* format ADM_TO_ENQfmt */ 383 /* nFields */ 7, 384 /* *fields */ soc_ADM_TO_ENQ_BCM56450_A0fmt_fields, 385 /* bits */ 25, 386 /* flags */ 0, 387 }, 388 #endif /* chips */ 389 390 #if defined(BCM_56450_B0) 391 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56450_B0fmt */ 392 /* format ADM_TO_ENQfmt */ 393 /* nFields */ 7, 394 /* *fields */ soc_ADM_TO_ENQ_BCM56450_A0fmt_fields, 395 /* bits */ 25, 396 /* flags */ 0, 397 }, 398 #endif /* chips */ 399 400 #if defined(BCM_56450_B1) 401 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56450_B1fmt */ 402 /* format ADM_TO_ENQfmt */ 403 /* nFields */ 7, 404 /* *fields */ soc_ADM_TO_ENQ_BCM56450_A0fmt_fields, 405 /* bits */ 25, 406 /* flags */ 0, 407 }, 408 #endif /* chips */ 409 410 #if defined(BCM_56524_A0) 411 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56524_A0fmt */ 412 /* format ADM_TO_ENQfmt */ 413 /* nFields */ 6, 414 /* *fields */ soc_ADM_TO_ENQ_BCM56624_A0fmt_fields, 415 /* bits */ 21, 416 /* flags */ 0, 417 }, 418 #endif /* chips */ 419 420 #if defined(BCM_56524_B0) 421 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56524_B0fmt */ 422 /* format ADM_TO_ENQfmt */ 423 /* nFields */ 6, 424 /* *fields */ soc_ADM_TO_ENQ_BCM56624_A0fmt_fields, 425 /* bits */ 21, 426 /* flags */ 0, 427 }, 428 #endif /* chips */ 429 430 #if defined(BCM_56560_A0) 431 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56560_A0fmt */ 432 /* format ADM_TO_ENQfmt */ 433 /* nFields */ 6, 434 /* *fields */ soc_ADM_TO_ENQ_BCM56560_A0fmt_fields, 435 /* bits */ 30, 436 /* flags */ 0, 437 }, 438 #endif /* chips */ 439 440 #if defined(BCM_56560_B0) 441 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56560_B0fmt */ 442 /* format ADM_TO_ENQfmt */ 443 /* nFields */ 6, 444 /* *fields */ soc_ADM_TO_ENQ_BCM56560_A0fmt_fields, 445 /* bits */ 30, 446 /* flags */ 0, 447 }, 448 #endif /* chips */ 449 450 #if defined(BCM_56624_A0) 451 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56624_A0fmt */ 452 /* format ADM_TO_ENQfmt */ 453 /* nFields */ 6, 454 /* *fields */ soc_ADM_TO_ENQ_BCM56624_A0fmt_fields, 455 /* bits */ 21, 456 /* flags */ 0, 457 }, 458 #endif /* chips */ 459 460 #if defined(BCM_56624_B0) 461 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56624_B0fmt */ 462 /* format ADM_TO_ENQfmt */ 463 /* nFields */ 6, 464 /* *fields */ soc_ADM_TO_ENQ_BCM56624_A0fmt_fields, 465 /* bits */ 21, 466 /* flags */ 0, 467 }, 468 #endif /* chips */ 469 470 #if defined(BCM_56634_A0) 471 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56634_A0fmt */ 472 /* format ADM_TO_ENQfmt */ 473 /* nFields */ 6, 474 /* *fields */ soc_ADM_TO_ENQ_BCM56624_A0fmt_fields, 475 /* bits */ 21, 476 /* flags */ 0, 477 }, 478 #endif /* chips */ 479 480 #if defined(BCM_56634_B0) 481 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56634_B0fmt */ 482 /* format ADM_TO_ENQfmt */ 483 /* nFields */ 6, 484 /* *fields */ soc_ADM_TO_ENQ_BCM56624_A0fmt_fields, 485 /* bits */ 21, 486 /* flags */ 0, 487 }, 488 #endif /* chips */ 489 490 #if defined(BCM_56640_A0) 491 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56640_A0fmt */ 492 /* format ADM_TO_ENQfmt */ 493 /* nFields */ 7, 494 /* *fields */ soc_ADM_TO_ENQ_BCM56640_A0fmt_fields, 495 /* bits */ 27, 496 /* flags */ 0, 497 }, 498 #endif /* chips */ 499 500 #if defined(BCM_56670_A0) 501 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56670_A0fmt */ 502 /* format ADM_TO_ENQfmt */ 503 /* nFields */ 6, 504 /* *fields */ soc_ADM_TO_ENQ_BCM56670_A0fmt_fields, 505 /* bits */ 26, 506 /* flags */ 0, 507 }, 508 #endif /* chips */ 509 510 #if defined(BCM_56670_B0) 511 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56670_B0fmt */ 512 /* format ADM_TO_ENQfmt */ 513 /* nFields */ 6, 514 /* *fields */ soc_ADM_TO_ENQ_BCM56670_A0fmt_fields, 515 /* bits */ 26, 516 /* flags */ 0, 517 }, 518 #endif /* chips */ 519 520 #if defined(BCM_56680_A0) 521 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56680_A0fmt */ 522 /* format ADM_TO_ENQfmt */ 523 /* nFields */ 6, 524 /* *fields */ soc_ADM_TO_ENQ_BCM56624_A0fmt_fields, 525 /* bits */ 21, 526 /* flags */ 0, 527 }, 528 #endif /* chips */ 529 530 #if defined(BCM_56680_B0) 531 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56680_B0fmt */ 532 /* format ADM_TO_ENQfmt */ 533 /* nFields */ 6, 534 /* *fields */ soc_ADM_TO_ENQ_BCM56624_A0fmt_fields, 535 /* bits */ 21, 536 /* flags */ 0, 537 }, 538 #endif /* chips */ 539 540 #if defined(BCM_56685_A0) 541 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56685_A0fmt */ 542 /* format ADM_TO_ENQfmt */ 543 /* nFields */ 6, 544 /* *fields */ soc_ADM_TO_ENQ_BCM56624_A0fmt_fields, 545 /* bits */ 21, 546 /* flags */ 0, 547 }, 548 #endif /* chips */ 549 550 #if defined(BCM_56685_B0) 551 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56685_B0fmt */ 552 /* format ADM_TO_ENQfmt */ 553 /* nFields */ 6, 554 /* *fields */ soc_ADM_TO_ENQ_BCM56624_A0fmt_fields, 555 /* bits */ 21, 556 /* flags */ 0, 557 }, 558 #endif /* chips */ 559 560 #if defined(BCM_56725_A0) 561 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56725_A0fmt */ 562 /* format ADM_TO_ENQfmt */ 563 /* nFields */ 8, 564 /* *fields */ soc_ADM_TO_ENQ_BCM56820_A0fmt_fields, 565 /* bits */ 19, 566 /* flags */ 0, 567 }, 568 #endif /* chips */ 569 570 #if defined(BCM_56820_A0) 571 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56820_A0fmt */ 572 /* format ADM_TO_ENQfmt */ 573 /* nFields */ 8, 574 /* *fields */ soc_ADM_TO_ENQ_BCM56820_A0fmt_fields, 575 /* bits */ 19, 576 /* flags */ 0, 577 }, 578 #endif /* chips */ 579 580 #if defined(BCM_56840_A0) 581 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56840_A0fmt */ 582 /* format ADM_TO_ENQfmt */ 583 /* nFields */ 7, 584 /* *fields */ soc_ADM_TO_ENQ_BCM56840_A0fmt_fields, 585 /* bits */ 25, 586 /* flags */ 0, 587 }, 588 #endif /* chips */ 589 590 #if defined(BCM_56840_B0) 591 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56840_B0fmt */ 592 /* format ADM_TO_ENQfmt */ 593 /* nFields */ 7, 594 /* *fields */ soc_ADM_TO_ENQ_BCM56840_A0fmt_fields, 595 /* bits */ 25, 596 /* flags */ 0, 597 }, 598 #endif /* chips */ 599 600 #if defined(BCM_56850_A0) 601 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56850_A0fmt */ 602 /* format ADM_TO_ENQfmt */ 603 /* nFields */ 6, 604 /* *fields */ soc_ADM_TO_ENQ_BCM56850_A0fmt_fields, 605 /* bits */ 28, 606 /* flags */ 0, 607 }, 608 #endif /* chips */ 609 610 #if defined(BCM_56860_A0) 611 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM56860_A0fmt */ 612 /* format ADM_TO_ENQfmt */ 613 /* nFields */ 6, 614 /* *fields */ soc_ADM_TO_ENQ_BCM56850_A0fmt_fields, 615 /* bits */ 28, 616 /* flags */ 0, 617 }, 618 #endif /* chips */ 619 620 #if defined(BCM_88732_A0) 621 { /* SOC_FORMAT_INT_ADM_TO_ENQ_BCM88732_A0fmt */ 622 /* format ADM_TO_ENQfmt */ 623 /* nFields */ 9, 624 /* *fields */ soc_ADM_TO_ENQ_BCM88732_A0fmt_fields, 625 /* bits */ 19, 626 /* flags */ 0, 627 }, 628 #endif /* chips */ 629 630 #if defined(BCM_56440_A0) || defined(BCM_56440_B0) 631 { /* SOC_FORMAT_INT_ADM_TO_ENQ_INFOfmt */ 632 /* format ADM_TO_ENQ_INFOfmt */ 633 /* nFields */ 16, 634 /* *fields */ soc_ADM_TO_ENQ_INFOfmt_fields, 635 /* bits */ 16, 636 /* flags */ 0, 637 }, 638 #endif /* chips */ 639 640 #if defined(BCM_56260_A0) 641 { /* SOC_FORMAT_INT_ADM_TO_ENQ_INFO_BCM56260_A0fmt */ 642 /* format ADM_TO_ENQ_INFOfmt */ 643 /* nFields */ 19, 644 /* *fields */ soc_ADM_TO_ENQ_INFO_BCM56260_A0fmt_fields, 645 /* bits */ 46, 646 /* flags */ 0, 647 }, 648 #endif /* chips */ 649 650 #if defined(BCM_56260_B0) 651 { /* SOC_FORMAT_INT_ADM_TO_ENQ_INFO_BCM56260_B0fmt */ 652 /* format ADM_TO_ENQ_INFOfmt */ 653 /* nFields */ 19, 654 /* *fields */ soc_ADM_TO_ENQ_INFO_BCM56260_A0fmt_fields, 655 /* bits */ 46, 656 /* flags */ 0, 657 }, 658 #endif /* chips */ 659 660 #if defined(BCM_56270_A0) 661 { /* SOC_FORMAT_INT_ADM_TO_ENQ_INFO_BCM56270_A0fmt */ 662 /* format ADM_TO_ENQ_INFOfmt */ 663 /* nFields */ 9, 664 /* *fields */ soc_ADM_TO_ENQ_INFO_BCM56270_A0fmt_fields, 665 /* bits */ 9, 666 /* flags */ 0, 667 }, 668 #endif /* chips */ 669 670 #if defined(BCM_56450_A0) 671 { /* SOC_FORMAT_INT_ADM_TO_ENQ_INFO_BCM56450_A0fmt */ 672 /* format ADM_TO_ENQ_INFOfmt */ 673 /* nFields */ 19, 674 /* *fields */ soc_ADM_TO_ENQ_INFO_BCM56450_A0fmt_fields, 675 /* bits */ 51, 676 /* flags */ 0, 677 }, 678 #endif /* chips */ 679 680 #if defined(BCM_56450_B0) 681 { /* SOC_FORMAT_INT_ADM_TO_ENQ_INFO_BCM56450_B0fmt */ 682 /* format ADM_TO_ENQ_INFOfmt */ 683 /* nFields */ 19, 684 /* *fields */ soc_ADM_TO_ENQ_INFO_BCM56450_A0fmt_fields, 685 /* bits */ 51, 686 /* flags */ 0, 687 }, 688 #endif /* chips */ 689 690 #if defined(BCM_56450_B1) 691 { /* SOC_FORMAT_INT_ADM_TO_ENQ_INFO_BCM56450_B1fmt */ 692 /* format ADM_TO_ENQ_INFOfmt */ 693 /* nFields */ 19, 694 /* *fields */ soc_ADM_TO_ENQ_INFO_BCM56450_A0fmt_fields, 695 /* bits */ 51, 696 /* flags */ 0, 697 }, 698 #endif /* chips */ 699 700 #if defined(BCM_56440_A0) 701 { /* SOC_FORMAT_INT_ADM_TO_IPCTR_D_RESOURCEfmt */ 702 /* format ADM_TO_IPCTR_D_RESOURCEfmt */ 703 /* nFields */ 26, 704 /* *fields */ soc_ADM_TO_IPCTR_D_RESOURCEfmt_fields, 705 /* bits */ 26, 706 /* flags */ 0, 707 }, 708 #endif /* chips */ 709 710 #if defined(BCM_56260_A0) 711 { /* SOC_FORMAT_INT_ADM_TO_IPCTR_D_RESOURCE_BCM56260_A0fmt */ 712 /* format ADM_TO_IPCTR_D_RESOURCEfmt */ 713 /* nFields */ 26, 714 /* *fields */ soc_ADM_TO_IPCTR_D_RESOURCE_BCM56260_A0fmt_fields, 715 /* bits */ 26, 716 /* flags */ 0, 717 }, 718 #endif /* chips */ 719 720 #if defined(BCM_56260_B0) 721 { /* SOC_FORMAT_INT_ADM_TO_IPCTR_D_RESOURCE_BCM56260_B0fmt */ 722 /* format ADM_TO_IPCTR_D_RESOURCEfmt */ 723 /* nFields */ 26, 724 /* *fields */ soc_ADM_TO_IPCTR_D_RESOURCE_BCM56260_A0fmt_fields, 725 /* bits */ 26, 726 /* flags */ 0, 727 }, 728 #endif /* chips */ 729 730 #if defined(BCM_56270_A0) 731 { /* SOC_FORMAT_INT_ADM_TO_IPCTR_D_RESOURCE_BCM56270_A0fmt */ 732 /* format ADM_TO_IPCTR_D_RESOURCEfmt */ 733 /* nFields */ 19, 734 /* *fields */ soc_ADM_TO_IPCTR_D_RESOURCE_BCM56270_A0fmt_fields, 735 /* bits */ 17, 736 /* flags */ 0, 737 }, 738 #endif /* chips */ 739 740 #if defined(BCM_56440_B0) 741 { /* SOC_FORMAT_INT_ADM_TO_IPCTR_D_RESOURCE_BCM56440_B0fmt */ 742 /* format ADM_TO_IPCTR_D_RESOURCEfmt */ 743 /* nFields */ 26, 744 /* *fields */ soc_ADM_TO_IPCTR_D_RESOURCEfmt_fields, 745 /* bits */ 26, 746 /* flags */ 0, 747 }, 748 #endif /* chips */ 749 750 #if defined(BCM_56450_A0) 751 { /* SOC_FORMAT_INT_ADM_TO_IPCTR_D_RESOURCE_BCM56450_A0fmt */ 752 /* format ADM_TO_IPCTR_D_RESOURCEfmt */ 753 /* nFields */ 26, 754 /* *fields */ soc_ADM_TO_IPCTR_D_RESOURCE_BCM56450_A0fmt_fields, 755 /* bits */ 26, 756 /* flags */ 0, 757 }, 758 #endif /* chips */ 759 760 #if defined(BCM_56450_B0) 761 { /* SOC_FORMAT_INT_ADM_TO_IPCTR_D_RESOURCE_BCM56450_B0fmt */ 762 /* format ADM_TO_IPCTR_D_RESOURCEfmt */ 763 /* nFields */ 26, 764 /* *fields */ soc_ADM_TO_IPCTR_D_RESOURCE_BCM56450_A0fmt_fields, 765 /* bits */ 26, 766 /* flags */ 0, 767 }, 768 #endif /* chips */ 769 770 #if defined(BCM_56450_B1) 771 { /* SOC_FORMAT_INT_ADM_TO_IPCTR_D_RESOURCE_BCM56450_B1fmt */ 772 /* format ADM_TO_IPCTR_D_RESOURCEfmt */ 773 /* nFields */ 26, 774 /* *fields */ soc_ADM_TO_IPCTR_D_RESOURCE_BCM56450_A0fmt_fields, 775 /* bits */ 26, 776 /* flags */ 0, 777 }, 778 #endif /* chips */ 779 780 #if defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 781 defined(BCM_56450_B1) 782 { /* SOC_FORMAT_INT_ADM_TO_THDI_QEN_PURGE_INFOfmt */ 783 /* format ADM_TO_THDI_QEN_PURGE_INFOfmt */ 784 /* nFields */ 1, 785 /* *fields */ soc_ADM_TO_THDI_QEN_PURGE_INFOfmt_fields, 786 /* bits */ 10, 787 /* flags */ 0, 788 }, 789 #endif /* chips */ 790 791 #if defined(BCM_56260_A0) 792 { /* SOC_FORMAT_INT_ADM_TO_THDI_QEN_PURGE_INFO_BCM56260_A0fmt */ 793 /* format ADM_TO_THDI_QEN_PURGE_INFOfmt */ 794 /* nFields */ 1, 795 /* *fields */ soc_ADM_TO_THDI_QEN_PURGE_INFO_BCM56260_A0fmt_fields, 796 /* bits */ 10, 797 /* flags */ 0, 798 }, 799 #endif /* chips */ 800 801 #if defined(BCM_56260_B0) 802 { /* SOC_FORMAT_INT_ADM_TO_THDI_QEN_PURGE_INFO_BCM56260_B0fmt */ 803 /* format ADM_TO_THDI_QEN_PURGE_INFOfmt */ 804 /* nFields */ 1, 805 /* *fields */ soc_ADM_TO_THDI_QEN_PURGE_INFO_BCM56260_A0fmt_fields, 806 /* bits */ 10, 807 /* flags */ 0, 808 }, 809 #endif /* chips */ 810 811 #if defined(BCM_56270_A0) 812 { /* SOC_FORMAT_INT_ADM_TO_THDI_QEN_PURGE_INFO_BCM56270_A0fmt */ 813 /* format ADM_TO_THDI_QEN_PURGE_INFOfmt */ 814 /* nFields */ 1, 815 /* *fields */ soc_ADM_TO_THDI_QEN_PURGE_INFO_BCM56260_A0fmt_fields, 816 /* bits */ 10, 817 /* flags */ 0, 818 }, 819 #endif /* chips */ 820 821 #if defined(BCM_56450_A0) || defined(BCM_56450_B0) || \ 822 defined(BCM_56450_B1) 823 { /* SOC_FORMAT_INT_ADM_TO_TOQ_EOPEfmt */ 824 /* format ADM_TO_TOQ_EOPEfmt */ 825 /* nFields */ 6, 826 /* *fields */ soc_ADM_TO_TOQ_EOPEfmt_fields, 827 /* bits */ 30, 828 /* flags */ 0, 829 }, 830 #endif /* chips */ 831 832 #if defined(BCM_56260_A0) 833 { /* SOC_FORMAT_INT_ADM_TO_TOQ_EOPE_BCM56260_A0fmt */ 834 /* format ADM_TO_TOQ_EOPEfmt */ 835 /* nFields */ 6, 836 /* *fields */ soc_ADM_TO_TOQ_EOPE_BCM56260_A0fmt_fields, 837 /* bits */ 27, 838 /* flags */ 0, 839 }, 840 #endif /* chips */ 841 842 #if defined(BCM_56260_B0) 843 { /* SOC_FORMAT_INT_ADM_TO_TOQ_EOPE_BCM56260_B0fmt */ 844 /* format ADM_TO_TOQ_EOPEfmt */ 845 /* nFields */ 6, 846 /* *fields */ soc_ADM_TO_TOQ_EOPE_BCM56260_A0fmt_fields, 847 /* bits */ 27, 848 /* flags */ 0, 849 }, 850 #endif /* chips */ 851 852 #if defined(BCM_56270_A0) 853 { /* SOC_FORMAT_INT_ADM_TO_TOQ_EOPE_BCM56270_A0fmt */ 854 /* format ADM_TO_TOQ_EOPEfmt */ 855 /* nFields */ 6, 856 /* *fields */ soc_ADM_TO_TOQ_EOPE_BCM56260_A0fmt_fields, 857 /* bits */ 27, 858 /* flags */ 0, 859 }, 860 #endif /* chips */ 861 862 #if defined(BCM_56800_A0) 863 { /* SOC_FORMAT_INT_AGING_CTR_S_RFfmt */ 864 /* format AGING_CTR_S_RFfmt */ 865 /* nFields */ 1, 866 /* *fields */ soc_AGING_CTR_S_RFfmt_fields, 867 /* bits */ 28, 868 /* flags */ 0, 869 }, 870 #endif /* chips */ 871 872 #if defined(BCM_88732_A0) 873 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_0fmt */ 874 /* format AGING_CTR_S_RF_0fmt */ 875 /* nFields */ 1, 876 /* *fields */ soc_AGING_CTR_S_RF_0fmt_fields, 877 /* bits */ 42, 878 /* flags */ 0, 879 }, 880 #endif /* chips */ 881 882 #if defined(BCM_88732_A0) 883 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_1fmt */ 884 /* format AGING_CTR_S_RF_1fmt */ 885 /* nFields */ 1, 886 /* *fields */ soc_AGING_CTR_S_RF_1fmt_fields, 887 /* bits */ 42, 888 /* flags */ 0, 889 }, 890 #endif /* chips */ 891 892 #if defined(BCM_88732_A0) 893 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_2fmt */ 894 /* format AGING_CTR_S_RF_2fmt */ 895 /* nFields */ 1, 896 /* *fields */ soc_AGING_CTR_S_RF_2fmt_fields, 897 /* bits */ 42, 898 /* flags */ 0, 899 }, 900 #endif /* chips */ 901 902 #if defined(BCM_88732_A0) 903 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_3fmt */ 904 /* format AGING_CTR_S_RF_3fmt */ 905 /* nFields */ 1, 906 /* *fields */ soc_AGING_CTR_S_RF_3fmt_fields, 907 /* bits */ 42, 908 /* flags */ 0, 909 }, 910 #endif /* chips */ 911 912 #if defined(BCM_56142_A0) 913 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56142_A0fmt */ 914 /* format AGING_CTR_S_RFfmt */ 915 /* nFields */ 1, 916 /* *fields */ soc_AGING_CTR_S_RF_BCM56142_A0fmt_fields, 917 /* bits */ 18, 918 /* flags */ 0, 919 }, 920 #endif /* chips */ 921 922 #if defined(BCM_56260_A0) 923 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56260_A0fmt */ 924 /* format AGING_CTR_S_RFfmt */ 925 /* nFields */ 1, 926 /* *fields */ soc_AGING_CTR_S_RF_BCM56960_A0fmt_fields, 927 /* bits */ 18, 928 /* flags */ 0, 929 }, 930 #endif /* chips */ 931 932 #if defined(BCM_56260_B0) 933 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56260_B0fmt */ 934 /* format AGING_CTR_S_RFfmt */ 935 /* nFields */ 1, 936 /* *fields */ soc_AGING_CTR_S_RF_BCM56960_A0fmt_fields, 937 /* bits */ 18, 938 /* flags */ 0, 939 }, 940 #endif /* chips */ 941 942 #if defined(BCM_56270_A0) 943 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56270_A0fmt */ 944 /* format AGING_CTR_S_RFfmt */ 945 /* nFields */ 1, 946 /* *fields */ soc_AGING_CTR_S_RF_BCM56960_A0fmt_fields, 947 /* bits */ 18, 948 /* flags */ 0, 949 }, 950 #endif /* chips */ 951 952 #if defined(BCM_56334_A0) 953 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56334_A0fmt */ 954 /* format AGING_CTR_S_RFfmt */ 955 /* nFields */ 1, 956 /* *fields */ soc_AGING_CTR_S_RF_BCM56334_A0fmt_fields, 957 /* bits */ 16, 958 /* flags */ 0, 959 }, 960 #endif /* chips */ 961 962 #if defined(BCM_56334_B0) 963 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56334_B0fmt */ 964 /* format AGING_CTR_S_RFfmt */ 965 /* nFields */ 1, 966 /* *fields */ soc_AGING_CTR_S_RF_BCM56334_A0fmt_fields, 967 /* bits */ 16, 968 /* flags */ 0, 969 }, 970 #endif /* chips */ 971 972 #if defined(BCM_56340_A0) 973 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56340_A0fmt */ 974 /* format AGING_CTR_S_RFfmt */ 975 /* nFields */ 1, 976 /* *fields */ soc_AGING_CTR_S_RF_BCM56640_A0fmt_fields, 977 /* bits */ 18, 978 /* flags */ 0, 979 }, 980 #endif /* chips */ 981 982 #if defined(BCM_56440_A0) 983 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56440_A0fmt */ 984 /* format AGING_CTR_S_RFfmt */ 985 /* nFields */ 1, 986 /* *fields */ soc_AGING_CTR_S_RF_BCM56624_A0fmt_fields, 987 /* bits */ 18, 988 /* flags */ 0, 989 }, 990 #endif /* chips */ 991 992 #if defined(BCM_56440_B0) 993 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56440_B0fmt */ 994 /* format AGING_CTR_S_RFfmt */ 995 /* nFields */ 1, 996 /* *fields */ soc_AGING_CTR_S_RF_BCM56624_A0fmt_fields, 997 /* bits */ 18, 998 /* flags */ 0, 999 }, 1000 #endif /* chips */ 1001 1002 #if defined(BCM_56450_A0) 1003 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56450_A0fmt */ 1004 /* format AGING_CTR_S_RFfmt */ 1005 /* nFields */ 1, 1006 /* *fields */ soc_AGING_CTR_S_RF_BCM56640_A0fmt_fields, 1007 /* bits */ 18, 1008 /* flags */ 0, 1009 }, 1010 #endif /* chips */ 1011 1012 #if defined(BCM_56450_B0) 1013 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56450_B0fmt */ 1014 /* format AGING_CTR_S_RFfmt */ 1015 /* nFields */ 1, 1016 /* *fields */ soc_AGING_CTR_S_RF_BCM56640_A0fmt_fields, 1017 /* bits */ 18, 1018 /* flags */ 0, 1019 }, 1020 #endif /* chips */ 1021 1022 #if defined(BCM_56450_B1) 1023 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56450_B1fmt */ 1024 /* format AGING_CTR_S_RFfmt */ 1025 /* nFields */ 1, 1026 /* *fields */ soc_AGING_CTR_S_RF_BCM56640_A0fmt_fields, 1027 /* bits */ 18, 1028 /* flags */ 0, 1029 }, 1030 #endif /* chips */ 1031 1032 #if defined(BCM_56524_A0) 1033 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56524_A0fmt */ 1034 /* format AGING_CTR_S_RFfmt */ 1035 /* nFields */ 1, 1036 /* *fields */ soc_AGING_CTR_S_RF_BCM56624_A0fmt_fields, 1037 /* bits */ 18, 1038 /* flags */ 0, 1039 }, 1040 #endif /* chips */ 1041 1042 #if defined(BCM_56524_B0) 1043 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56524_B0fmt */ 1044 /* format AGING_CTR_S_RFfmt */ 1045 /* nFields */ 1, 1046 /* *fields */ soc_AGING_CTR_S_RF_BCM56624_A0fmt_fields, 1047 /* bits */ 18, 1048 /* flags */ 0, 1049 }, 1050 #endif /* chips */ 1051 1052 #if defined(BCM_56560_A0) 1053 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56560_A0fmt */ 1054 /* format AGING_CTR_S_RFfmt */ 1055 /* nFields */ 1, 1056 /* *fields */ soc_AGING_CTR_S_RF_BCM56960_A0fmt_fields, 1057 /* bits */ 18, 1058 /* flags */ 0, 1059 }, 1060 #endif /* chips */ 1061 1062 #if defined(BCM_56560_B0) 1063 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56560_B0fmt */ 1064 /* format AGING_CTR_S_RFfmt */ 1065 /* nFields */ 1, 1066 /* *fields */ soc_AGING_CTR_S_RF_BCM56960_A0fmt_fields, 1067 /* bits */ 18, 1068 /* flags */ 0, 1069 }, 1070 #endif /* chips */ 1071 1072 #if defined(BCM_56624_A0) 1073 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56624_A0fmt */ 1074 /* format AGING_CTR_S_RFfmt */ 1075 /* nFields */ 1, 1076 /* *fields */ soc_AGING_CTR_S_RF_BCM56624_A0fmt_fields, 1077 /* bits */ 18, 1078 /* flags */ 0, 1079 }, 1080 #endif /* chips */ 1081 1082 #if defined(BCM_56624_B0) 1083 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56624_B0fmt */ 1084 /* format AGING_CTR_S_RFfmt */ 1085 /* nFields */ 1, 1086 /* *fields */ soc_AGING_CTR_S_RF_BCM56624_A0fmt_fields, 1087 /* bits */ 18, 1088 /* flags */ 0, 1089 }, 1090 #endif /* chips */ 1091 1092 #if defined(BCM_56634_A0) 1093 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56634_A0fmt */ 1094 /* format AGING_CTR_S_RFfmt */ 1095 /* nFields */ 1, 1096 /* *fields */ soc_AGING_CTR_S_RF_BCM56624_A0fmt_fields, 1097 /* bits */ 18, 1098 /* flags */ 0, 1099 }, 1100 #endif /* chips */ 1101 1102 #if defined(BCM_56634_B0) 1103 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56634_B0fmt */ 1104 /* format AGING_CTR_S_RFfmt */ 1105 /* nFields */ 1, 1106 /* *fields */ soc_AGING_CTR_S_RF_BCM56624_A0fmt_fields, 1107 /* bits */ 18, 1108 /* flags */ 0, 1109 }, 1110 #endif /* chips */ 1111 1112 #if defined(BCM_56640_A0) 1113 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56640_A0fmt */ 1114 /* format AGING_CTR_S_RFfmt */ 1115 /* nFields */ 1, 1116 /* *fields */ soc_AGING_CTR_S_RF_BCM56640_A0fmt_fields, 1117 /* bits */ 18, 1118 /* flags */ 0, 1119 }, 1120 #endif /* chips */ 1121 1122 #if defined(BCM_56670_A0) 1123 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56670_A0fmt */ 1124 /* format AGING_CTR_S_RFfmt */ 1125 /* nFields */ 1, 1126 /* *fields */ soc_AGING_CTR_S_RF_BCM56960_A0fmt_fields, 1127 /* bits */ 18, 1128 /* flags */ 0, 1129 }, 1130 #endif /* chips */ 1131 1132 #if defined(BCM_56670_B0) 1133 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56670_B0fmt */ 1134 /* format AGING_CTR_S_RFfmt */ 1135 /* nFields */ 1, 1136 /* *fields */ soc_AGING_CTR_S_RF_BCM56960_A0fmt_fields, 1137 /* bits */ 18, 1138 /* flags */ 0, 1139 }, 1140 #endif /* chips */ 1141 1142 #if defined(BCM_56680_A0) 1143 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56680_A0fmt */ 1144 /* format AGING_CTR_S_RFfmt */ 1145 /* nFields */ 1, 1146 /* *fields */ soc_AGING_CTR_S_RF_BCM56624_A0fmt_fields, 1147 /* bits */ 18, 1148 /* flags */ 0, 1149 }, 1150 #endif /* chips */ 1151 1152 #if defined(BCM_56680_B0) 1153 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56680_B0fmt */ 1154 /* format AGING_CTR_S_RFfmt */ 1155 /* nFields */ 1, 1156 /* *fields */ soc_AGING_CTR_S_RF_BCM56624_A0fmt_fields, 1157 /* bits */ 18, 1158 /* flags */ 0, 1159 }, 1160 #endif /* chips */ 1161 1162 #if defined(BCM_56685_A0) 1163 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56685_A0fmt */ 1164 /* format AGING_CTR_S_RFfmt */ 1165 /* nFields */ 1, 1166 /* *fields */ soc_AGING_CTR_S_RF_BCM56624_A0fmt_fields, 1167 /* bits */ 18, 1168 /* flags */ 0, 1169 }, 1170 #endif /* chips */ 1171 1172 #if defined(BCM_56685_B0) 1173 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56685_B0fmt */ 1174 /* format AGING_CTR_S_RFfmt */ 1175 /* nFields */ 1, 1176 /* *fields */ soc_AGING_CTR_S_RF_BCM56624_A0fmt_fields, 1177 /* bits */ 18, 1178 /* flags */ 0, 1179 }, 1180 #endif /* chips */ 1181 1182 #if defined(BCM_56725_A0) 1183 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56725_A0fmt */ 1184 /* format AGING_CTR_S_RFfmt */ 1185 /* nFields */ 1, 1186 /* *fields */ soc_AGING_CTR_S_RFfmt_fields, 1187 /* bits */ 28, 1188 /* flags */ 0, 1189 }, 1190 #endif /* chips */ 1191 1192 #if defined(BCM_56820_A0) 1193 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56820_A0fmt */ 1194 /* format AGING_CTR_S_RFfmt */ 1195 /* nFields */ 1, 1196 /* *fields */ soc_AGING_CTR_S_RFfmt_fields, 1197 /* bits */ 28, 1198 /* flags */ 0, 1199 }, 1200 #endif /* chips */ 1201 1202 #if defined(BCM_56840_A0) 1203 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56840_A0fmt */ 1204 /* format AGING_CTR_S_RFfmt */ 1205 /* nFields */ 1, 1206 /* *fields */ soc_AGING_CTR_S_RF_BCM56624_A0fmt_fields, 1207 /* bits */ 18, 1208 /* flags */ 0, 1209 }, 1210 #endif /* chips */ 1211 1212 #if defined(BCM_56840_B0) 1213 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56840_B0fmt */ 1214 /* format AGING_CTR_S_RFfmt */ 1215 /* nFields */ 1, 1216 /* *fields */ soc_AGING_CTR_S_RF_BCM56624_A0fmt_fields, 1217 /* bits */ 18, 1218 /* flags */ 0, 1219 }, 1220 #endif /* chips */ 1221 1222 #if defined(BCM_56850_A0) 1223 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56850_A0fmt */ 1224 /* format AGING_CTR_S_RFfmt */ 1225 /* nFields */ 1, 1226 /* *fields */ soc_AGING_CTR_S_RF_BCM56640_A0fmt_fields, 1227 /* bits */ 18, 1228 /* flags */ 0, 1229 }, 1230 #endif /* chips */ 1231 1232 #if defined(BCM_56860_A0) 1233 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56860_A0fmt */ 1234 /* format AGING_CTR_S_RFfmt */ 1235 /* nFields */ 1, 1236 /* *fields */ soc_AGING_CTR_S_RF_BCM56640_A0fmt_fields, 1237 /* bits */ 18, 1238 /* flags */ 0, 1239 }, 1240 #endif /* chips */ 1241 1242 #if defined(BCM_56960_A0) 1243 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56960_A0fmt */ 1244 /* format AGING_CTR_S_RFfmt */ 1245 /* nFields */ 1, 1246 /* *fields */ soc_AGING_CTR_S_RF_BCM56960_A0fmt_fields, 1247 /* bits */ 18, 1248 /* flags */ 0, 1249 }, 1250 #endif /* chips */ 1251 1252 #if defined(BCM_56965_A0) 1253 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56965_A0fmt */ 1254 /* format AGING_CTR_S_RFfmt */ 1255 /* nFields */ 1, 1256 /* *fields */ soc_AGING_CTR_S_RF_BCM56960_A0fmt_fields, 1257 /* bits */ 18, 1258 /* flags */ 0, 1259 }, 1260 #endif /* chips */ 1261 1262 #if defined(BCM_56970_A0) 1263 { /* SOC_FORMAT_INT_AGING_CTR_S_RF_BCM56970_A0fmt */ 1264 /* format AGING_CTR_S_RFfmt */ 1265 /* nFields */ 1, 1266 /* *fields */ soc_AGING_CTR_S_RF_BCM56960_A0fmt_fields, 1267 /* bits */ 18, 1268 /* flags */ 0, 1269 }, 1270 #endif /* chips */ 1271 1272 #if defined(BCM_56800_A0) 1273 { /* SOC_FORMAT_INT_AGING_EXP_S_RFfmt */ 1274 /* format AGING_EXP_S_RFfmt */ 1275 /* nFields */ 1, 1276 /* *fields */ soc_AGING_EXP_S_RFfmt_fields, 1277 /* bits */ 28, 1278 /* flags */ 0, 1279 }, 1280 #endif /* chips */ 1281 1282 #if defined(BCM_88732_A0) 1283 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_0fmt */ 1284 /* format AGING_EXP_S_RF_0fmt */ 1285 /* nFields */ 1, 1286 /* *fields */ soc_AGING_EXP_S_RF_0fmt_fields, 1287 /* bits */ 42, 1288 /* flags */ 0, 1289 }, 1290 #endif /* chips */ 1291 1292 #if defined(BCM_88732_A0) 1293 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_1fmt */ 1294 /* format AGING_EXP_S_RF_1fmt */ 1295 /* nFields */ 1, 1296 /* *fields */ soc_AGING_EXP_S_RF_1fmt_fields, 1297 /* bits */ 42, 1298 /* flags */ 0, 1299 }, 1300 #endif /* chips */ 1301 1302 #if defined(BCM_88732_A0) 1303 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_2fmt */ 1304 /* format AGING_EXP_S_RF_2fmt */ 1305 /* nFields */ 1, 1306 /* *fields */ soc_AGING_EXP_S_RF_2fmt_fields, 1307 /* bits */ 42, 1308 /* flags */ 0, 1309 }, 1310 #endif /* chips */ 1311 1312 #if defined(BCM_88732_A0) 1313 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_3fmt */ 1314 /* format AGING_EXP_S_RF_3fmt */ 1315 /* nFields */ 1, 1316 /* *fields */ soc_AGING_EXP_S_RF_3fmt_fields, 1317 /* bits */ 42, 1318 /* flags */ 0, 1319 }, 1320 #endif /* chips */ 1321 1322 #if defined(BCM_56142_A0) 1323 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56142_A0fmt */ 1324 /* format AGING_EXP_S_RFfmt */ 1325 /* nFields */ 1, 1326 /* *fields */ soc_AGING_EXP_S_RF_BCM56142_A0fmt_fields, 1327 /* bits */ 8, 1328 /* flags */ 0, 1329 }, 1330 #endif /* chips */ 1331 1332 #if defined(BCM_56260_A0) 1333 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56260_A0fmt */ 1334 /* format AGING_EXP_S_RFfmt */ 1335 /* nFields */ 1, 1336 /* *fields */ soc_AGING_EXP_S_RF_BCM56960_A0fmt_fields, 1337 /* bits */ 8, 1338 /* flags */ 0, 1339 }, 1340 #endif /* chips */ 1341 1342 #if defined(BCM_56260_B0) 1343 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56260_B0fmt */ 1344 /* format AGING_EXP_S_RFfmt */ 1345 /* nFields */ 1, 1346 /* *fields */ soc_AGING_EXP_S_RF_BCM56960_A0fmt_fields, 1347 /* bits */ 8, 1348 /* flags */ 0, 1349 }, 1350 #endif /* chips */ 1351 1352 #if defined(BCM_56270_A0) 1353 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56270_A0fmt */ 1354 /* format AGING_EXP_S_RFfmt */ 1355 /* nFields */ 1, 1356 /* *fields */ soc_AGING_EXP_S_RF_BCM56960_A0fmt_fields, 1357 /* bits */ 8, 1358 /* flags */ 0, 1359 }, 1360 #endif /* chips */ 1361 1362 #if defined(BCM_56340_A0) 1363 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56340_A0fmt */ 1364 /* format AGING_EXP_S_RFfmt */ 1365 /* nFields */ 1, 1366 /* *fields */ soc_AGING_EXP_S_RF_BCM56640_A0fmt_fields, 1367 /* bits */ 8, 1368 /* flags */ 0, 1369 }, 1370 #endif /* chips */ 1371 1372 #if defined(BCM_56440_A0) 1373 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56440_A0fmt */ 1374 /* format AGING_EXP_S_RFfmt */ 1375 /* nFields */ 1, 1376 /* *fields */ soc_AGING_EXP_S_RF_BCM56624_A0fmt_fields, 1377 /* bits */ 8, 1378 /* flags */ 0, 1379 }, 1380 #endif /* chips */ 1381 1382 #if defined(BCM_56440_B0) 1383 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56440_B0fmt */ 1384 /* format AGING_EXP_S_RFfmt */ 1385 /* nFields */ 1, 1386 /* *fields */ soc_AGING_EXP_S_RF_BCM56624_A0fmt_fields, 1387 /* bits */ 8, 1388 /* flags */ 0, 1389 }, 1390 #endif /* chips */ 1391 1392 #if defined(BCM_56450_A0) 1393 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56450_A0fmt */ 1394 /* format AGING_EXP_S_RFfmt */ 1395 /* nFields */ 1, 1396 /* *fields */ soc_AGING_EXP_S_RF_BCM56640_A0fmt_fields, 1397 /* bits */ 8, 1398 /* flags */ 0, 1399 }, 1400 #endif /* chips */ 1401 1402 #if defined(BCM_56450_B0) 1403 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56450_B0fmt */ 1404 /* format AGING_EXP_S_RFfmt */ 1405 /* nFields */ 1, 1406 /* *fields */ soc_AGING_EXP_S_RF_BCM56640_A0fmt_fields, 1407 /* bits */ 8, 1408 /* flags */ 0, 1409 }, 1410 #endif /* chips */ 1411 1412 #if defined(BCM_56450_B1) 1413 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56450_B1fmt */ 1414 /* format AGING_EXP_S_RFfmt */ 1415 /* nFields */ 1, 1416 /* *fields */ soc_AGING_EXP_S_RF_BCM56640_A0fmt_fields, 1417 /* bits */ 8, 1418 /* flags */ 0, 1419 }, 1420 #endif /* chips */ 1421 1422 #if defined(BCM_56524_A0) 1423 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56524_A0fmt */ 1424 /* format AGING_EXP_S_RFfmt */ 1425 /* nFields */ 1, 1426 /* *fields */ soc_AGING_EXP_S_RF_BCM56624_A0fmt_fields, 1427 /* bits */ 8, 1428 /* flags */ 0, 1429 }, 1430 #endif /* chips */ 1431 1432 #if defined(BCM_56524_B0) 1433 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56524_B0fmt */ 1434 /* format AGING_EXP_S_RFfmt */ 1435 /* nFields */ 1, 1436 /* *fields */ soc_AGING_EXP_S_RF_BCM56624_A0fmt_fields, 1437 /* bits */ 8, 1438 /* flags */ 0, 1439 }, 1440 #endif /* chips */ 1441 1442 #if defined(BCM_56560_A0) 1443 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56560_A0fmt */ 1444 /* format AGING_EXP_S_RFfmt */ 1445 /* nFields */ 1, 1446 /* *fields */ soc_AGING_EXP_S_RF_BCM56960_A0fmt_fields, 1447 /* bits */ 8, 1448 /* flags */ 0, 1449 }, 1450 #endif /* chips */ 1451 1452 #if defined(BCM_56560_B0) 1453 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56560_B0fmt */ 1454 /* format AGING_EXP_S_RFfmt */ 1455 /* nFields */ 1, 1456 /* *fields */ soc_AGING_EXP_S_RF_BCM56960_A0fmt_fields, 1457 /* bits */ 8, 1458 /* flags */ 0, 1459 }, 1460 #endif /* chips */ 1461 1462 #if defined(BCM_56624_A0) 1463 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56624_A0fmt */ 1464 /* format AGING_EXP_S_RFfmt */ 1465 /* nFields */ 1, 1466 /* *fields */ soc_AGING_EXP_S_RF_BCM56624_A0fmt_fields, 1467 /* bits */ 8, 1468 /* flags */ 0, 1469 }, 1470 #endif /* chips */ 1471 1472 #if defined(BCM_56624_B0) 1473 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56624_B0fmt */ 1474 /* format AGING_EXP_S_RFfmt */ 1475 /* nFields */ 1, 1476 /* *fields */ soc_AGING_EXP_S_RF_BCM56624_A0fmt_fields, 1477 /* bits */ 8, 1478 /* flags */ 0, 1479 }, 1480 #endif /* chips */ 1481 1482 #if defined(BCM_56634_A0) 1483 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56634_A0fmt */ 1484 /* format AGING_EXP_S_RFfmt */ 1485 /* nFields */ 1, 1486 /* *fields */ soc_AGING_EXP_S_RF_BCM56624_A0fmt_fields, 1487 /* bits */ 8, 1488 /* flags */ 0, 1489 }, 1490 #endif /* chips */ 1491 1492 #if defined(BCM_56634_B0) 1493 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56634_B0fmt */ 1494 /* format AGING_EXP_S_RFfmt */ 1495 /* nFields */ 1, 1496 /* *fields */ soc_AGING_EXP_S_RF_BCM56624_A0fmt_fields, 1497 /* bits */ 8, 1498 /* flags */ 0, 1499 }, 1500 #endif /* chips */ 1501 1502 #if defined(BCM_56640_A0) 1503 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56640_A0fmt */ 1504 /* format AGING_EXP_S_RFfmt */ 1505 /* nFields */ 1, 1506 /* *fields */ soc_AGING_EXP_S_RF_BCM56640_A0fmt_fields, 1507 /* bits */ 8, 1508 /* flags */ 0, 1509 }, 1510 #endif /* chips */ 1511 1512 #if defined(BCM_56670_A0) 1513 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56670_A0fmt */ 1514 /* format AGING_EXP_S_RFfmt */ 1515 /* nFields */ 1, 1516 /* *fields */ soc_AGING_EXP_S_RF_BCM56960_A0fmt_fields, 1517 /* bits */ 8, 1518 /* flags */ 0, 1519 }, 1520 #endif /* chips */ 1521 1522 #if defined(BCM_56670_B0) 1523 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56670_B0fmt */ 1524 /* format AGING_EXP_S_RFfmt */ 1525 /* nFields */ 1, 1526 /* *fields */ soc_AGING_EXP_S_RF_BCM56960_A0fmt_fields, 1527 /* bits */ 8, 1528 /* flags */ 0, 1529 }, 1530 #endif /* chips */ 1531 1532 #if defined(BCM_56680_A0) 1533 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56680_A0fmt */ 1534 /* format AGING_EXP_S_RFfmt */ 1535 /* nFields */ 1, 1536 /* *fields */ soc_AGING_EXP_S_RF_BCM56624_A0fmt_fields, 1537 /* bits */ 8, 1538 /* flags */ 0, 1539 }, 1540 #endif /* chips */ 1541 1542 #if defined(BCM_56680_B0) 1543 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56680_B0fmt */ 1544 /* format AGING_EXP_S_RFfmt */ 1545 /* nFields */ 1, 1546 /* *fields */ soc_AGING_EXP_S_RF_BCM56624_A0fmt_fields, 1547 /* bits */ 8, 1548 /* flags */ 0, 1549 }, 1550 #endif /* chips */ 1551 1552 #if defined(BCM_56685_A0) 1553 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56685_A0fmt */ 1554 /* format AGING_EXP_S_RFfmt */ 1555 /* nFields */ 1, 1556 /* *fields */ soc_AGING_EXP_S_RF_BCM56624_A0fmt_fields, 1557 /* bits */ 8, 1558 /* flags */ 0, 1559 }, 1560 #endif /* chips */ 1561 1562 #if defined(BCM_56685_B0) 1563 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56685_B0fmt */ 1564 /* format AGING_EXP_S_RFfmt */ 1565 /* nFields */ 1, 1566 /* *fields */ soc_AGING_EXP_S_RF_BCM56624_A0fmt_fields, 1567 /* bits */ 8, 1568 /* flags */ 0, 1569 }, 1570 #endif /* chips */ 1571 1572 #if defined(BCM_56725_A0) 1573 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56725_A0fmt */ 1574 /* format AGING_EXP_S_RFfmt */ 1575 /* nFields */ 1, 1576 /* *fields */ soc_AGING_EXP_S_RF_BCM56820_A0fmt_fields, 1577 /* bits */ 14, 1578 /* flags */ 0, 1579 }, 1580 #endif /* chips */ 1581 1582 #if defined(BCM_56820_A0) 1583 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56820_A0fmt */ 1584 /* format AGING_EXP_S_RFfmt */ 1585 /* nFields */ 1, 1586 /* *fields */ soc_AGING_EXP_S_RF_BCM56820_A0fmt_fields, 1587 /* bits */ 14, 1588 /* flags */ 0, 1589 }, 1590 #endif /* chips */ 1591 1592 #if defined(BCM_56840_A0) 1593 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56840_A0fmt */ 1594 /* format AGING_EXP_S_RFfmt */ 1595 /* nFields */ 1, 1596 /* *fields */ soc_AGING_EXP_S_RF_BCM56624_A0fmt_fields, 1597 /* bits */ 8, 1598 /* flags */ 0, 1599 }, 1600 #endif /* chips */ 1601 1602 #if defined(BCM_56840_B0) 1603 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56840_B0fmt */ 1604 /* format AGING_EXP_S_RFfmt */ 1605 /* nFields */ 1, 1606 /* *fields */ soc_AGING_EXP_S_RF_BCM56624_A0fmt_fields, 1607 /* bits */ 8, 1608 /* flags */ 0, 1609 }, 1610 #endif /* chips */ 1611 1612 #if defined(BCM_56850_A0) 1613 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56850_A0fmt */ 1614 /* format AGING_EXP_S_RFfmt */ 1615 /* nFields */ 1, 1616 /* *fields */ soc_AGING_EXP_S_RF_BCM56640_A0fmt_fields, 1617 /* bits */ 8, 1618 /* flags */ 0, 1619 }, 1620 #endif /* chips */ 1621 1622 #if defined(BCM_56860_A0) 1623 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56860_A0fmt */ 1624 /* format AGING_EXP_S_RFfmt */ 1625 /* nFields */ 1, 1626 /* *fields */ soc_AGING_EXP_S_RF_BCM56640_A0fmt_fields, 1627 /* bits */ 8, 1628 /* flags */ 0, 1629 }, 1630 #endif /* chips */ 1631 1632 #if defined(BCM_56960_A0) 1633 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56960_A0fmt */ 1634 /* format AGING_EXP_S_RFfmt */ 1635 /* nFields */ 1, 1636 /* *fields */ soc_AGING_EXP_S_RF_BCM56960_A0fmt_fields, 1637 /* bits */ 8, 1638 /* flags */ 0, 1639 }, 1640 #endif /* chips */ 1641 1642 #if defined(BCM_56965_A0) 1643 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56965_A0fmt */ 1644 /* format AGING_EXP_S_RFfmt */ 1645 /* nFields */ 1, 1646 /* *fields */ soc_AGING_EXP_S_RF_BCM56960_A0fmt_fields, 1647 /* bits */ 8, 1648 /* flags */ 0, 1649 }, 1650 #endif /* chips */ 1651 1652 #if defined(BCM_56970_A0) 1653 { /* SOC_FORMAT_INT_AGING_EXP_S_RF_BCM56970_A0fmt */ 1654 /* format AGING_EXP_S_RFfmt */ 1655 /* nFields */ 1, 1656 /* *fields */ soc_AGING_EXP_S_RF_BCM56960_A0fmt_fields, 1657 /* bits */ 8, 1658 /* flags */ 0, 1659 }, 1660 #endif /* chips */ 1661 1662 #if defined(BCM_56980_A0) || defined(BCM_56980_B0) 1663 { /* SOC_FORMAT_INT_ALPM1_DATAfmt */ 1664 /* format ALPM1_DATAfmt */ 1665 /* nFields */ 10, 1666 /* *fields */ soc_ALPM1_DATAfmt_fields, 1667 /* bits */ 42, 1668 /* flags */ 0, 1669 }, 1670 #endif /* chips */ 1671 1672 #if defined(BCM_56980_A0) || defined(BCM_56980_B0) 1673 { /* SOC_FORMAT_INT_ALPM2_DATAfmt */ 1674 /* format ALPM2_DATAfmt */ 1675 /* nFields */ 12, 1676 /* *fields */ soc_ALPM2_DATAfmt_fields, 1677 /* bits */ 56, 1678 /* flags */ 0, 1679 }, 1680 #endif /* chips */ 1681 1682 #if defined(BCM_56980_A0) || defined(BCM_56980_B0) 1683 { /* SOC_FORMAT_INT_ALPM_KEY_MUX_FORMATfmt */ 1684 /* format ALPM_KEY_MUX_FORMATfmt */ 1685 /* nFields */ 18, 1686 /* *fields */ soc_ALPM_KEY_MUX_FORMATfmt_fields, 1687 /* bits */ 271, 1688 /* flags */ 0, 1689 }, 1690 #endif /* chips */ 1691 1692 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 1693 defined(BCM_56870_A0) 1694 { /* SOC_FORMAT_INT_ARP_HDRfmt */ 1695 /* format ARP_HDRfmt */ 1696 /* nFields */ 9, 1697 /* *fields */ soc_ARP_HDRfmt_fields, 1698 /* bits */ 224, 1699 /* flags */ 0, 1700 }, 1701 #endif /* chips */ 1702 1703 #if defined(BCM_56770_A0) || defined(BCM_56870_A0) 1704 { /* SOC_FORMAT_INT_ASSIGNED_VNTAG_ETAG_DOPfmt */ 1705 /* format ASSIGNED_VNTAG_ETAG_DOPfmt */ 1706 /* nFields */ 6, 1707 /* *fields */ soc_ASSIGNED_VNTAG_ETAG_DOPfmt_fields, 1708 /* bits */ 64, 1709 /* flags */ 0, 1710 }, 1711 #endif /* chips */ 1712 1713 #if defined(BCM_56370_A0) 1714 { /* SOC_FORMAT_INT_ASSIGNED_VNTAG_ETAG_DOP_BCM56370_A0fmt */ 1715 /* format ASSIGNED_VNTAG_ETAG_DOPfmt */ 1716 /* nFields */ 6, 1717 /* *fields */ soc_ASSIGNED_VNTAG_ETAG_DOP_BCM56370_A0fmt_fields, 1718 /* bits */ 64, 1719 /* flags */ 0, 1720 }, 1721 #endif /* chips */ 1722 1723 #if defined(BCM_56980_A0) || defined(BCM_56980_B0) 1724 { /* SOC_FORMAT_INT_ASSOC_DATA_FULLfmt */ 1725 /* format ASSOC_DATA_FULLfmt */ 1726 /* nFields */ 9, 1727 /* *fields */ soc_ASSOC_DATA_FULLfmt_fields, 1728 /* bits */ 46, 1729 /* flags */ 0, 1730 }, 1731 #endif /* chips */ 1732 1733 #if defined(BCM_56980_A0) || defined(BCM_56980_B0) 1734 { /* SOC_FORMAT_INT_ASSOC_DATA_REDUCEDfmt */ 1735 /* format ASSOC_DATA_REDUCEDfmt */ 1736 /* nFields */ 2, 1737 /* *fields */ soc_ASSOC_DATA_REDUCEDfmt_fields, 1738 /* bits */ 16, 1739 /* flags */ 0, 1740 }, 1741 #endif /* chips */ 1742 1743 #if defined(BCM_56370_A0) || defined(BCM_56770_A0) || \ 1744 defined(BCM_56870_A0) 1745 { /* SOC_FORMAT_INT_AUX_HDR_BITMAP_DOPfmt */ 1746 /* format AUX_HDR_BITMAP_DOPfmt */ 1747 /* nFields */ 3, 1748 /* *fields */ soc_AUX_HDR_BITMAP_DOPfmt_fields, 1749 /* bits */ 32, 1750 /* flags */ 0, 1751 }, 1752 #endif /* chips */ 1753 1754 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 1755 { /* SOC_FORMAT_INT_AXP_CH_INBUF_CWfmt */ 1756 /* format AXP_CH_INBUF_CWfmt */ 1757 /* nFields */ 5, 1758 /* *fields */ soc_AXP_CH_INBUF_CWfmt_fields, 1759 /* bits */ 10, 1760 /* flags */ 0, 1761 }, 1762 #endif /* chips */ 1763 1764 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 1765 { /* SOC_FORMAT_INT_AXP_CH_OUTBUF_CWfmt */ 1766 /* format AXP_CH_OUTBUF_CWfmt */ 1767 /* nFields */ 7, 1768 /* *fields */ soc_AXP_CH_OUTBUF_CWfmt_fields, 1769 /* bits */ 15, 1770 /* flags */ 0, 1771 }, 1772 #endif /* chips */ 1773 1774 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 1775 { /* SOC_FORMAT_INT_AXP_IP_CTLfmt */ 1776 /* format AXP_IP_CTLfmt */ 1777 /* nFields */ 8, 1778 /* *fields */ soc_AXP_IP_CTLfmt_fields, 1779 /* bits */ 19, 1780 /* flags */ 0, 1781 }, 1782 #endif /* chips */ 1783 1784 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 1785 { /* SOC_FORMAT_INT_AXP_IP_DATAfmt */ 1786 /* format AXP_IP_DATAfmt */ 1787 /* nFields */ 1, 1788 /* *fields */ soc_AXP_IP_DATAfmt_fields, 1789 /* bits */ 416, 1790 /* flags */ 0, 1791 }, 1792 #endif /* chips */ 1793 1794 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 1795 { /* SOC_FORMAT_INT_AXP_META_DATA_COMMONfmt */ 1796 /* format AXP_META_DATA_COMMONfmt */ 1797 /* nFields */ 31, 1798 /* *fields */ soc_AXP_META_DATA_COMMONfmt_fields, 1799 /* bits */ 128, 1800 /* flags */ 0, 1801 }, 1802 #endif /* chips */ 1803 1804 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 1805 { /* SOC_FORMAT_INT_AXP_META_DATA_SM_NLFfmt */ 1806 /* format AXP_META_DATA_SM_NLFfmt */ 1807 /* nFields */ 16, 1808 /* *fields */ soc_AXP_META_DATA_SM_NLFfmt_fields, 1809 /* bits */ 224, 1810 /* flags */ 0, 1811 }, 1812 #endif /* chips */ 1813 1814 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 1815 { /* SOC_FORMAT_INT_AXP_META_DATA_WRX_NLFfmt */ 1816 /* format AXP_META_DATA_WRX_NLFfmt */ 1817 /* nFields */ 6, 1818 /* *fields */ soc_AXP_META_DATA_WRX_NLFfmt_fields, 1819 /* bits */ 160, 1820 /* flags */ 0, 1821 }, 1822 #endif /* chips */ 1823 1824 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 1825 { /* SOC_FORMAT_INT_AXP_META_DATA_WTX_NLFfmt */ 1826 /* format AXP_META_DATA_WTX_NLFfmt */ 1827 /* nFields */ 10, 1828 /* *fields */ soc_AXP_META_DATA_WTX_NLFfmt_fields, 1829 /* bits */ 192, 1830 /* flags */ 0, 1831 }, 1832 #endif /* chips */ 1833 1834 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 1835 { /* SOC_FORMAT_INT_AXP_NLF_CTLfmt */ 1836 /* format AXP_NLF_CTLfmt */ 1837 /* nFields */ 5, 1838 /* *fields */ soc_AXP_NLF_CTLfmt_fields, 1839 /* bits */ 9, 1840 /* flags */ 0, 1841 }, 1842 #endif /* chips */ 1843 1844 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 1845 { /* SOC_FORMAT_INT_AXP_NLF_DATAfmt */ 1846 /* format AXP_NLF_DATAfmt */ 1847 /* nFields */ 9, 1848 /* *fields */ soc_AXP_NLF_DATAfmt_fields, 1849 /* bits */ 256, 1850 /* flags */ 0, 1851 }, 1852 #endif /* chips */ 1853 1854 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 1855 { /* SOC_FORMAT_INT_AXP_NLF_INFOfmt */ 1856 /* format AXP_NLF_INFOfmt */ 1857 /* nFields */ 1, 1858 /* *fields */ soc_AXP_NLF_INFOfmt_fields, 1859 /* bits */ 1, 1860 /* flags */ 0, 1861 }, 1862 #endif /* chips */ 1863 1864 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 1865 { /* SOC_FORMAT_INT_AXP_NLF_SYSTEM_INfmt */ 1866 /* format AXP_NLF_SYSTEM_INfmt */ 1867 /* nFields */ 1, 1868 /* *fields */ soc_AXP_NLF_SYSTEM_INfmt_fields, 1869 /* bits */ 4, 1870 /* flags */ 0, 1871 }, 1872 #endif /* chips */ 1873 1874 #if defined(BCM_56440_A0) 1875 { /* SOC_FORMAT_INT_AXP_SHAPEfmt */ 1876 /* format AXP_SHAPEfmt */ 1877 /* nFields */ 8, 1878 /* *fields */ soc_AXP_SHAPEfmt_fields, 1879 /* bits */ 49, 1880 /* flags */ 0, 1881 }, 1882 #endif /* chips */ 1883 1884 #if defined(BCM_56440_B0) 1885 { /* SOC_FORMAT_INT_AXP_SHAPE_BCM56440_B0fmt */ 1886 /* format AXP_SHAPEfmt */ 1887 /* nFields */ 8, 1888 /* *fields */ soc_AXP_SHAPEfmt_fields, 1889 /* bits */ 49, 1890 /* flags */ 0, 1891 }, 1892 #endif /* chips */ 1893 1894 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 1895 { /* SOC_FORMAT_INT_AXP_SM_EGRESS_LOOPBACK_HEADERfmt */ 1896 /* format AXP_SM_EGRESS_LOOPBACK_HEADERfmt */ 1897 /* nFields */ 21, 1898 /* *fields */ soc_AXP_SM_EGRESS_LOOPBACK_HEADERfmt_fields, 1899 /* bits */ 336, 1900 /* flags */ 0, 1901 }, 1902 #endif /* chips */ 1903 1904 #if defined(BCM_56640_A0) 1905 { /* SOC_FORMAT_INT_AXP_SM_INGRESS_METADATA_HEADERfmt */ 1906 /* format AXP_SM_INGRESS_METADATA_HEADERfmt */ 1907 /* nFields */ 16, 1908 /* *fields */ soc_AXP_META_DATA_SM_NLFfmt_fields, 1909 /* bits */ 224, 1910 /* flags */ 0, 1911 }, 1912 #endif /* chips */ 1913 1914 #if defined(BCM_56340_A0) 1915 { /* SOC_FORMAT_INT_AXP_SM_INGRESS_METADATA_HEADER_BCM56340_A0fmt */ 1916 /* format AXP_SM_INGRESS_METADATA_HEADERfmt */ 1917 /* nFields */ 16, 1918 /* *fields */ soc_AXP_META_DATA_SM_NLFfmt_fields, 1919 /* bits */ 224, 1920 /* flags */ 0, 1921 }, 1922 #endif /* chips */ 1923 1924 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 1925 { /* SOC_FORMAT_INT_AXP_TO_IP_MDHfmt */ 1926 /* format AXP_TO_IP_MDHfmt */ 1927 /* nFields */ 31, 1928 /* *fields */ soc_AXP_TO_IP_MDHfmt_fields, 1929 /* bits */ 128, 1930 /* flags */ 0, 1931 }, 1932 #endif /* chips */ 1933 1934 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 1935 { /* SOC_FORMAT_INT_AXP_WRX_EGRESS_LOOPBACK_HEADERfmt */ 1936 /* format AXP_WRX_EGRESS_LOOPBACK_HEADERfmt */ 1937 /* nFields */ 27, 1938 /* *fields */ soc_AXP_WRX_EGRESS_LOOPBACK_HEADERfmt_fields, 1939 /* bits */ 128, 1940 /* flags */ 0, 1941 }, 1942 #endif /* chips */ 1943 1944 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 1945 { /* SOC_FORMAT_INT_AXP_WTX_DPfmt */ 1946 /* format AXP_WTX_DPfmt */ 1947 /* nFields */ 1, 1948 /* *fields */ soc_AXP_WTX_DPfmt_fields, 1949 /* bits */ 96, 1950 /* flags */ 0, 1951 }, 1952 #endif /* chips */ 1953 1954 #if defined(BCM_56340_A0) || defined(BCM_56640_A0) 1955 { /* SOC_FORMAT_INT_AXP_WTX_WCTLfmt */ 1956 /* format AXP_WTX_WCTLfmt */ 1957 /* nFields */ 4, 1958 /* *fields */ soc_AXP_WTX_WCTLfmt_fields, 1959 /* bits */ 7, 1960 /* flags */ 0, 1961 }, 1962 #endif /* chips */ 1963