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tomahawk3_set_tdm.c (4567B)

      1 /*
      2  * 
      3  * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file.
      4  * 
      5  * Copyright 2007-2019 Broadcom Inc. All rights reserved.
      6  *
      7  * File:        tomahawk3_set_tdm.c
      8  * Purpose:
      9  * Requires:
     10  */
     11 
     12 
     13 #include <shared/bsl.h>
     14 #include <soc/tdm/core/tdm_top.h>
     15 
     16 #include <soc/defs.h>
     17 #include <soc/mem.h>
     18 
     19 #if defined(BCM_TOMAHAWK3_SUPPORT)
     20 
     21 #include <soc/init/tomahawk3_set_tdm.h>
     22 
     23 
     24 /*** START SDK API COMMON CODE ***/
     25 
     26 
     27 /*! @fn int soc_tomahawk3_set_tdm_tbl(int unit, soc_port_schedule_state_t *port_schedule_state)
     28  *  @param unit Chip unit number.
     29  *  @param port_resource Pointer to a soc_port_resource_t struct variable.
     30  *  @brief API to calculate TDM table
     31  */
     32 int
     33 soc_tomahawk3_set_tdm_tbl(int unit, soc_port_schedule_state_t *port_schedule_state)
     34 {
     35     int pipe;
     36 
     37     for (pipe = 0; pipe < SOC_MAX_NUM_PIPES; pipe++) {
     38         soc_tomahawk3_set_tdm_tbl_per_pipe(pipe, port_schedule_state);
     39     }
     40 
     41     return SOC_E_NONE;
     42 }
     43 
     44 
     45 /*! @fn void soc_tomahawk3_set_tdm_tbl_per_pipe(int pipe_num, soc_port_schedule_state_t *port_schedule_state)
     46  *  @param pipe_num pipe number 0:7
     47  *  @param port_resource Pointer to a soc_port_resource_t struct variable.
     48  *  @brief API to calculate TDM table pe rpipe
     49  */
     50 void
     51 soc_tomahawk3_set_tdm_tbl_per_pipe(int pipe_num, soc_port_schedule_state_t *port_schedule_state)
     52 {
     53     int phy_port, slot;
     54     int port_slot_pos_table[_TH3_TDM_LENGTH];
     55     int port_sched_table[_TH3_TDM_LENGTH];
     56     int dev_port, dev_port_start, dev_port_end;
     57     soc_port_map_type_t *port_map;
     58 
     59     /* intialize port_sched_table[] with `NUM_EXT_PORTS*/
     60     for (slot = 0; slot < _TH3_TDM_LENGTH; slot++) {
     61         port_sched_table[slot] = SOC_MAX_NUM_PORTS;
     62     }
     63 
     64     if (pipe_num == 0) {
     65         dev_port_start =  1;
     66         dev_port_end   = _TH3_GDEV_PORTS_PER_PIPE;
     67     } else {
     68         dev_port_start = _TH3_DEV_PORTS_PER_PIPE * pipe_num;
     69         dev_port_end   = dev_port_start + _TH3_GDEV_PORTS_PER_PIPE - 1;
     70     }
     71 
     72     if (0 == port_schedule_state->is_flexport) { /* init time */
     73         port_map = &port_schedule_state->in_port_map;
     74     } else {                 /* flexport time */
     75         port_map = &port_schedule_state->out_port_map;
     76     }
     77 
     78     for (dev_port = dev_port_start; dev_port <= dev_port_end; dev_port++) {
     79         if (port_map->log_port_speed[dev_port] > 0) { /* port enabled */
     80             phy_port = port_map->port_l2p_mapping[dev_port];
     81             soc_tomahawk3_set_tdm_slot_pos_tbl(phy_port, 
     82                 port_map->log_port_speed[dev_port], port_slot_pos_table);
     83             for (slot = 0; slot < _TH3_TDM_LENGTH; slot++) {
     84                 if (port_slot_pos_table[slot] == 1) {
     85                    port_sched_table[slot] = phy_port;
     86                 }
     87             }
     88         }
     89     }
     90 
     91     /* Special slot */
     92     port_sched_table[_TH3_TDM_LENGTH - 1] = SOC_MAX_NUM_PORTS + 1;
     93 
     94     /* Populate port_schedule_state calendars */
     95     port_schedule_state->tdm_ingress_schedule_pipe[pipe_num].tdm_schedule_slice[0].cal_len = _TH3_TDM_LENGTH;
     96     port_schedule_state->tdm_egress_schedule_pipe[pipe_num].tdm_schedule_slice[0].cal_len = _TH3_TDM_LENGTH;
     97     for (slot = 0; slot < _TH3_TDM_LENGTH; slot++) {
     98         port_schedule_state->tdm_ingress_schedule_pipe[pipe_num].tdm_schedule_slice[0].linerate_schedule[slot] =
     99                       port_sched_table[slot];
    100         port_schedule_state->tdm_egress_schedule_pipe[pipe_num].tdm_schedule_slice[0].linerate_schedule[slot] =
    101                       port_sched_table[slot];
    102     }
    103 }
    104 
    105 
    106 
    107 /*! @fn int soc_tomahawk3_set_tdm_slot_pos_tbl(int phy_port, int speed, int *slot_pos_tbl)
    108  */
    109 int
    110 soc_tomahawk3_set_tdm_slot_pos_tbl(int phy_port, int speed, int *slot_pos_tbl)
    111 {
    112     int pm_mapping[_TH3_PORTS_PER_PBLK] = {0,4,2,6,1,5,3,7};
    113     int slot, subport, pm_num, num_50g_slots, pm_slot;
    114 
    115     for (slot = 0; slot < _TH3_TDM_LENGTH; slot++) {
    116         slot_pos_tbl[slot] = 0;
    117     }
    118 
    119     if (speed > 0) { /* port enabled */
    120         subport = (phy_port - 1) % _TH3_PORTS_PER_PBLK;
    121         pm_num = (phy_port - 1) / _TH3_PORTS_PER_PBLK;
    122         pm_num = pm_num % _TH3_PBLKS_PER_PIPE; /* that's local pm within a pipe 0:3 */
    123         num_50g_slots = (speed + SPEED_40G) / SPEED_50G;
    124         for (slot = 0; slot < num_50g_slots; slot++) {
    125             /* get the right slot position within pm */
    126             pm_slot = pm_mapping[subport + slot];
    127             slot_pos_tbl[(pm_slot * _TH3_PBLKS_PER_PIPE) + pm_num] = 1;
    128         }
    129     }
    130 
    131     return SOC_E_NONE;
    132 }
    133 
    134 
    135 /*** END SDK API COMMON CODE ***/
    136 
    137 #endif /* BCM_TOMAHAWK3_SUPPORT */