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bondoptions.c (10001B)


      1 /*
      2  * 
      3  * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file.
      4  * 
      5  * Copyright 2007-2019 Broadcom Inc. All rights reserved.
      6  *
      7  * File:        bondoptions.c
      8  * Purpose:     Populates Tomahawk2 Bond Options Info.
      9  * Requires:    SOC Common Bond Options Initializer.
     10  */
     11 
     12 #include <shared/bsl.h>
     13 
     14 #include <soc/defs.h>
     15 
     16 #ifdef BCM_TOMAHAWK2_SUPPORT
     17 
     18 #include <shared/bitop.h>
     19 #include <soc/iproc.h>
     20 #include <soc/tomahawk2.h>
     21 #include <soc/bondoptions.h>
     22 
     23 /*
     24  * Function to conver to Core Clock frequency encodings to
     25  * real core clock frequencies.
     26  */
     27 STATIC int
     28 _soc_tomahawk2_bond_option_to_core_clk_freq(int unit, int val)
     29 {
     30     int freq;
     31 
     32     switch (val) {
     33     case 0x0:
     34         freq = 1700;
     35         break;
     36     case 0x1:
     37         freq = 1675;
     38         break;
     39     case 0x2:
     40         freq = 1525;
     41         break;
     42     case 0x3:
     43         freq = 1425;
     44         break;
     45     case 0x4:
     46         freq = 1325;
     47         break;
     48     case 0x5:
     49         freq = 1275;
     50         break;
     51     case 0x6:
     52         freq = 1225;
     53         break;
     54     case 0x7:
     55         freq = 1125;
     56         break;
     57     case 0x8:
     58         freq = 1050;
     59         break;
     60     case 0x9:
     61         freq = 950;
     62         break;
     63     case 0xa:
     64         freq = 850;
     65         break;
     66     default:
     67         freq = 1700;
     68         break;
     69     }
     70 
     71     return freq;
     72 }
     73 
     74 /*
     75  * Function to conver to Dpp Clk Ratio encodings to
     76  * real dpp clk ratio
     77  */
     78 STATIC int
     79 _soc_tomahawk2_bond_option_to_dpp_clk_ratio(int unit, int val)
     80 {
     81     int ratio;
     82 
     83     switch (val) {
     84     case 0x1:
     85         /* 3:2 */
     86         ratio = 15;
     87         break;
     88     case 0x2:
     89         /* 2:1 */
     90         ratio = 20;
     91         break;
     92     case 0x3:
     93         /* 1:1 */
     94         ratio = 10;
     95         break;
     96     default:
     97         /* 3:2 */
     98         ratio = 15;
     99         break;
    100     }
    101 
    102     return ratio;
    103 }
    104 
    105 /*
    106  * Function to conver to AVS encodings to
    107  * real voltages.
    108  * unit is 0.1 mV.
    109  */
    110 STATIC int
    111 _soc_tomahawk2_bond_option_to_avs_status(int unit, int val)
    112 {
    113     int vol;
    114 
    115     switch (val) {
    116     case 0x62:
    117         vol = 10000;
    118         break;
    119     case 0x66:
    120         vol = 9750;
    121         break;
    122     case 0x6a:
    123         vol = 9500;
    124         break;
    125     case 0x6e:
    126         vol = 9250;
    127         break;
    128     case 0x72:
    129         vol = 9000;
    130         break;
    131     default:
    132         vol = 9500;
    133         break;
    134     }
    135 
    136     return vol;
    137 }
    138 
    139 
    140 /*
    141  * Function to initialize the bondoptions cache based on the
    142  * Bond Info read from the relevant registers.
    143  */
    144 int
    145 soc_tomahawk2_bond_info_init(int unit)
    146 {
    147     soc_bond_info_t *bond_info = SOC_BOND_INFO(unit);
    148     uint32 addr, val;
    149     int i, bit_val;
    150 
    151     soc_reg_t soc_th2_bond_info_regs[] = {
    152         DMU_PCU_OTP_CONFIG_0r,
    153         DMU_PCU_OTP_CONFIG_1r,
    154         DMU_PCU_OTP_CONFIG_2r,
    155         DMU_PCU_OTP_CONFIG_3r,
    156         DMU_PCU_OTP_CONFIG_4r,
    157         DMU_PCU_OTP_CONFIG_5r,
    158         DMU_PCU_OTP_CONFIG_6r,
    159         DMU_PCU_OTP_CONFIG_7r,
    160         DMU_PCU_OTP_CONFIG_8r,
    161         DMU_PCU_OTP_CONFIG_9r,
    162         DMU_PCU_OTP_CONFIG_10r,
    163         DMU_PCU_OTP_CONFIG_11r,
    164         DMU_PCU_OTP_CONFIG_12r,
    165         DMU_PCU_OTP_CONFIG_13r,
    166         DMU_PCU_OTP_CONFIG_14r,
    167         DMU_PCU_OTP_CONFIG_15r,
    168         DMU_PCU_OTP_CONFIG_16r,
    169         DMU_PCU_OTP_CONFIG_17r,
    170         DMU_PCU_OTP_CONFIG_18r,
    171         DMU_PCU_OTP_CONFIG_19r,
    172         DMU_PCU_OTP_CONFIG_20r,
    173         DMU_PCU_OTP_CONFIG_21r,
    174         DMU_PCU_OTP_CONFIG_22r,
    175         DMU_PCU_OTP_CONFIG_23r,
    176         DMU_PCU_OTP_CONFIG_24r,
    177         DMU_PCU_OTP_CONFIG_25r,
    178         DMU_PCU_OTP_CONFIG_26r,
    179         DMU_PCU_OTP_CONFIG_27r,
    180         DMU_PCU_OTP_CONFIG_28r,
    181         DMU_PCU_OTP_CONFIG_29r,
    182         DMU_PCU_OTP_CONFIG_30r,
    183         DMU_PCU_OTP_CONFIG_31r
    184     };
    185     int reg_num = COUNTOF(soc_th2_bond_info_regs);
    186     SHR_BITDCL bond_info_regval[_SHR_BITDCLSIZE(COUNTOF(soc_th2_bond_info_regs) * 32)] = {0};
    187 
    188     int feature_enables[][3] = {
    189         /* Bit */ /* Bool Invert? */ /* Feature Enum */ /* Desc */
    190         {276, 1, socBondInfoFeatureNoTimeSync    },  /* TS_1588_BC_ENABLE    */
    191         {277, 1, socBondInfoFeatureUc0Active     },  /* IPROC_CPU0_ENABLE    */
    192         {278, 1, socBondInfoFeatureUc1Active     },  /* IPROC_CPU1_ENABLE    */
    193         {279, 1, socBondInfoFeatureNoPipe_2_3    },  /* PIPE2_PIPE3_ENABLE   */
    194         {609, 1, socBondInfoFeatureNoCutThru     },  /* CUT_THRU_ENABLE      */
    195         {612, 1, socBondInfoFeatureNoExactMatch  },  /* UFT_ACL_MATCH_ENABLE */
    196         {617, 1, socBondInfoFeatureNoVxlan       },  /* VXLAN_ENABLE         */
    197         {618, 1, socBondInfoFeatureNoL3          },  /* L3_ENABLE            */
    198         {619, 1, socBondInfoFeatureNoEfp         },  /* EFP_ENABLE           */
    199         {620, 1, socBondInfoFeatureNoIfp         },  /* IFP_ENABLE           */
    200         {621, 1, socBondInfoFeatureNoVfp         },  /* VFP_ENABLE           */
    201         {622, 1, socBondInfoFeatureNoLpm         },  /* LPM_ENABLE           */
    202         {623, 1, socBondInfoFeatureNoUftBank0    },  /* UFT_BANK_0_ENABLE    */
    203         {624, 1, socBondInfoFeatureNoUftBank1    },  /* UFT_BANK_1_ENABLE    */
    204         {625, 1, socBondInfoFeatureNoUftBank2    },  /* UFT_BANK_2_ENABLE    */
    205         {626, 1, socBondInfoFeatureNoUftBank3    },  /* UFT_BANK_3_ENABLE    */
    206         {691, 1, socBondInfoFeatureNoMpls        },  /* MPLS_ENABLE          */
    207         {692, 1, socBondInfoFeatureNoMplsFrr     },  /* MPLS_FRR_ENABLE      */
    208         {693, 1, socBondInfoFeatureNoAlpm        },  /* L3_ALPM_ENABLE       */
    209         {694, 1, socBondInfoFeatureNoDynamicLoadBalancing},  /* DLB_ENABLE     */
    210         {695, 1, socBondInfoFeatureNoDynamicAlternatePath},  /* DYNAMIC_ALTERNATE_PATH_ENABLE */
    211         {696, 1, socBondInfoFeatureNoPstats},        /* PSTATS_ENABLE        */
    212         {697, 1, socBondInfoFeatureNoTCB},           /* TCB_ENABLE           */
    213         {698, 1, socBondInfoFeatureNoTimestamp   },  /* TIMESTAMP_ENABLE     */
    214         {-1,  0, -1                              }   /* Always last          */
    215     };
    216 
    217     for (i = 0; i < reg_num; i++) {
    218         addr = soc_reg_addr(unit, soc_th2_bond_info_regs[i], REG_PORT_ANY, 0);
    219         soc_iproc_getreg(unit, addr, &val);
    220         SHR_BITCOPY_RANGE(bond_info_regval, i * 32, &val, 0, 32);
    221     }
    222 
    223     SOC_BOND_OPTIONS_COPY(bond_info->rev_id, uint16, bond_info_regval, 0, 7);
    224     SOC_BOND_OPTIONS_COPY(bond_info->dev_id, uint16, bond_info_regval, 8, 23);
    225     SOC_BOND_OPTIONS_COPY(bond_info->device_skew, uint32, bond_info_regval, 24, 27);
    226     SOC_BOND_OPTIONS_COPY(bond_info->mb_bank_num, uint32, bond_info_regval, 28, 31);
    227 
    228     /* Max Core Clock Frequency */
    229     SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 32, 35);
    230     bond_info->max_core_freq = _soc_tomahawk2_bond_option_to_core_clk_freq(unit, val);
    231 
    232     /* Default Core Clock Frequency */
    233     SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 36, 39);
    234     bond_info->default_core_freq = _soc_tomahawk2_bond_option_to_core_clk_freq(unit, val);
    235 
    236     /* Dpp Clk To Core Clk Ratio */
    237     SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 40, 41);
    238     bond_info->dpp_clk_ratio = _soc_tomahawk2_bond_option_to_dpp_clk_ratio(unit, val);
    239 
    240     /* AVS Status */
    241     SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 280, 287);
    242     bond_info->avs_status = _soc_tomahawk2_bond_option_to_avs_status(unit, val);
    243 
    244     /* TSC */
    245     /* OTP tsc_disabled may be impacted by TOP_TSC_ENABLE
    246     SHR_BITCOPY_RANGE(bond_info->tsc_disabled, 0, bond_info_regval, 288, 65);
    247     */
    248     SHR_BITCOPY_RANGE(bond_info->force_hg, 0, bond_info_regval, 353, 64);
    249     SHR_BITCOPY_RANGE(bond_info->tsc_max_speed, 0, bond_info_regval, 417, 128);
    250     SHR_BITCOPY_RANGE(bond_info->tsc_sr_only, 0, bond_info_regval, 545, 64);
    251     SHR_BITCOPY_RANGE(bond_info->tsc_in_loop, 0, bond_info_regval, 627, 64);
    252 
    253     /* IFP Slice Depth */
    254     SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 610, 611);
    255     if (val == 0x1) {
    256         SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureIfpSlice1k5);
    257     } else if (val == 0x2) {
    258         SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureIfpSlice3k);
    259     } else if (val == 0x3) {
    260         SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureIfpSlice6k);
    261     }
    262 
    263     /* LPM Size */
    264     SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 613, 614);
    265     if (val == 0x1) {
    266         SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureLpm2k);
    267     } else if (val == 0x2) {
    268         SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureLpm8k);
    269     } else if (val == 0x3) {
    270         SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureLpm16k);
    271     }
    272 
    273     /* Next-hop Size */
    274     SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 615, 616);
    275     if (val == 0x1) {
    276         SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureNextHop16k);
    277     } else if (val == 0x2) {
    278         SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureNextHop32k);
    279     } else if (val == 0x3) {
    280         SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureNextHop48k);
    281     }
    282 
    283     for (i = 0; i < (COUNTOF(feature_enables) - 1); i++) {
    284         bit_val = SHR_BITGET(bond_info_regval, feature_enables[i][0]);
    285         if (feature_enables[i][1]) {
    286             /* Boolean invert  */
    287             bit_val = !bit_val;
    288         }
    289 
    290         if (bit_val) {
    291             SOC_BOND_INFO_FEATURE_SET(unit, feature_enables[i][2]);
    292         }
    293     }
    294 
    295 
    296     if (bond_info->dev_id == 0xb972) {
    297         /* 56972 special setting */
    298         if (soc_property_get(unit, spn_BCM56972_RIOT_32X100, 0)) {
    299             /* 32x100G with Riot
    300              * Set additional 4 ports to loopback
    301              */
    302             SHR_BITSET(bond_info->tsc_in_loop, 1);
    303             SHR_BITSET(bond_info->tsc_in_loop, 17);
    304             SHR_BITSET(bond_info->tsc_in_loop, 47);
    305             SHR_BITSET(bond_info->tsc_in_loop, 63);
    306         } else {
    307             /* 36x100G */
    308             SHR_BITCOPY_RANGE(bond_info->tsc_disabled, 0,
    309                               bond_info->tsc_in_loop, 0, 64);
    310             SHR_BITCLR_RANGE(bond_info->tsc_in_loop, 0, 64);
    311         }
    312     }
    313 
    314     return SOC_E_NONE;
    315 }
    316 
    317 #endif /* BCM_TOMAHAWK2_SUPPORT */
    318