tdm_td2p_parse.c (12038B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * $All Rights Reserved.$ 7 * 8 * TDM chip based printing and parsing functions 9 */ 10 #ifdef _TDM_STANDALONE 11 #include <tdm_top.h> 12 #else 13 #include <soc/tdm/core/tdm_top.h> 14 #endif 15 16 17 /** 18 @name: tdm_td2p_print_tbl 19 @param: 20 21 Prints PGW TDM main calendar 22 */ 23 void 24 tdm_td2p_print_tbl(int *cal, int len, const char* name, int id) 25 { 26 int idx; 27 28 for (idx=0; idx<len; idx++) { 29 TDM_PRINT4("TDM: Pipe %d, %s, Slot -- #%03d, Port -- #%0d\n", id, name, idx, cal[idx]); 30 } 31 } 32 33 34 /** 35 @name: tdm_td2p_print_tbl_ovs 36 @param: 37 38 Prints PGW TDM calendar oversub scheduling groups 39 */ 40 void 41 tdm_td2p_print_tbl_ovs(int *cal, int *spc, int len, const char* name, int id) 42 { 43 int idx; 44 45 for (idx=0; idx<len; idx++) { 46 TDM_PRINT5("TDM: Pipe %d, %s, Slot -- #%03d, Port -- %3d, Spacing -- %3d\n", id, name, idx, cal[idx], spc[idx]); 47 } 48 } 49 50 51 /** 52 @name: tdm_td2p_print_quad 53 @param: 54 */ 55 void 56 tdm_td2p_print_quad(enum port_speed_e *speed, enum port_state_e *state, int len, int idx_start, int idx_end) 57 { 58 int iter, iter2; 59 60 if (idx_start>0 && idx_end<=len){ 61 TDM_BIG_BAR 62 TDM_PRINT0("TDM: --- Pipe Config ---: "); 63 for (iter=idx_start; iter<=idx_end; iter++) { 64 if ((((iter-1)%16)==0)) { 65 TDM_PRINT0("\nTDM: "); 66 } 67 TDM_PRINT1("{%03d}\t",(iter)); 68 if (iter%16==0) { 69 TDM_PRINT0("\nTDM: "); 70 for (iter2=(iter-16); iter2<iter; iter2++) { 71 TDM_PRINT1(" %3d \t", speed[iter2+1]/1000); 72 } 73 TDM_PRINT0("\nTDM: "); 74 for (iter2=(iter-16); iter2<iter; iter2++) { 75 if (iter2%4==0){ 76 if(speed[iter2+1]/1000>0){ 77 switch ((PSBMP_LP_MASK & state[iter2])) { 78 case 1: 79 TDM_PRINT0("LINE \t --- \t --- \t --- \t"); 80 break; 81 case 2: 82 TDM_PRINT0("OVSB \t --- \t --- \t --- \t"); 83 break; 84 default: 85 TDM_PRINT0(" \t \t \t \t"); 86 break; 87 } 88 } 89 else{ 90 TDM_PRINT0(" \t \t \t \t"); 91 } 92 } 93 } 94 TDM_PRINT0("\nTDM: "); 95 for (iter2=(iter-16); iter2<iter; iter2++) { 96 if(iter2%4==0){ 97 if(speed[iter2+1]/1000>0){ 98 switch(( PSBMP_ENCAP_HIGIG & state[iter2])){ 99 case 0: 100 TDM_PRINT0(" EN \t --- \t --- \t --- \t"); 101 break; 102 case 4: 103 TDM_PRINT0(" HG \t --- \t --- \t --- \t"); 104 break; 105 default: 106 TDM_PRINT0(" \t \t \t \t"); 107 break; 108 } 109 } 110 else{ 111 TDM_PRINT0(" \t \t \t \t"); 112 } 113 } 114 } 115 } 116 } 117 TDM_PRINT0("\n"); 118 TDM_BIG_BAR 119 } 120 121 } 122 123 124 125 126 /** 127 @name: tdm_td2p_parse_mmu_tdm_tbl 128 @param: 129 */ 130 int 131 tdm_td2p_parse_mmu_tdm_tbl( tdm_mod_t *_tdm ) 132 { 133 const char *name; 134 int j, k=256, m=0, oversub=BOOL_FALSE, 135 *mmu_tdm_tbl, *mmu_tdm_ovs_1, *mmu_tdm_ovs_2, *mmu_tdm_ovs_3, *mmu_tdm_ovs_4, *mmu_tdm_ovs_5, *mmu_tdm_ovs_6, 136 bw=_tdm->_chip_data.soc_pkg.clk_freq, 137 mgmt_bw=_tdm->_chip_data.soc_pkg.soc_vars.td2p.mgmtbw; 138 tdm_calendar_t *cal; 139 140 switch (_tdm->_core_data.vars_pkg.cal_id) { 141 case 0: cal=(&(_tdm->_chip_data.cal_0)); break; 142 case 1: cal=(&(_tdm->_chip_data.cal_1)); break; 143 case 2: cal=(&(_tdm->_chip_data.cal_2)); break; 144 case 3: cal=(&(_tdm->_chip_data.cal_3)); break; 145 case 4: cal=(&(_tdm->_chip_data.cal_4)); break; 146 case 5: cal=(&(_tdm->_chip_data.cal_5)); break; 147 case 6: cal=(&(_tdm->_chip_data.cal_6)); break; 148 case 7: cal=(&(_tdm->_chip_data.cal_7)); break; 149 default: 150 TDM_PRINT1("Invalid calendar ID - %0d\n",_tdm->_core_data.vars_pkg.cal_id); 151 return (TDM_EXEC_CORE_SIZE+1); 152 } 153 switch (_tdm->_core_data.vars_pkg.cal_id) { 154 case 4: name = "X-PIPE"; break; 155 case 5: name = "Y-PIPE"; break; 156 default: name = "UNKNOWN"; break; 157 } 158 mmu_tdm_tbl = cal->cal_main; 159 mmu_tdm_ovs_1 = cal->cal_grp[0]; 160 mmu_tdm_ovs_2 = cal->cal_grp[1]; 161 mmu_tdm_ovs_3 = cal->cal_grp[2]; 162 mmu_tdm_ovs_4 = cal->cal_grp[3]; 163 mmu_tdm_ovs_5 = cal->cal_grp[4]; 164 mmu_tdm_ovs_6 = cal->cal_grp[5]; 165 166 for (j=0; j<16; j++) { 167 if (mmu_tdm_ovs_1[j]!=TD2P_NUM_EXT_PORTS || mmu_tdm_ovs_2[j]!=TD2P_NUM_EXT_PORTS || mmu_tdm_ovs_3[j]!=TD2P_NUM_EXT_PORTS || mmu_tdm_ovs_4[j]!=TD2P_NUM_EXT_PORTS) { 168 oversub=BOOL_TRUE; 169 } 170 } 171 /* Allocate slots for MGMT, CMIC/LPBK, ANCL and RERESH among available TD2P_ANCL_TOKENs */ 172 for (j=0; j<k; j++) { 173 if (mmu_tdm_tbl[j]!=TD2P_ANCL_TOKEN) { 174 TDM_PRINT3("PIPE: %s, MMU TDM TABLE, element #%0d, contains physical port #%0d\n", name, j, mmu_tdm_tbl[j]); 175 } 176 else { 177 TDM_PRINT2("PIPE: %s, MMU TDM TABLE, element #%0d, CONTAINS ACCESSORY TOKEN - assigned as ", name, j); 178 m++; 179 if (bw==760) { 180 if (oversub==BOOL_FALSE) { 181 if (_tdm->_core_data.vars_pkg.cal_id==TD2P_XPIPE_CAL_ID) { 182 if (mgmt_bw==0) { 183 switch (m) { 184 case 1: case 3: case 5: case 7: 185 TD2P_CMIC(j) 186 case 2: case 4: case 6: case 8: 187 TD2P_ANCL(j) 188 } 189 } 190 else if (mgmt_bw==4) { 191 switch (m) { 192 case 1: 193 TD2P_MM13(j) 194 case 3: 195 TD2P_MM14(j) 196 case 5: 197 TD2P_MM15(j) 198 case 7: 199 TD2P_MM16(j) 200 case 2: case 6: 201 TD2P_ANCL(j) 202 case 4: case 8: 203 TD2P_CMIC(j) 204 } 205 } 206 else if (mgmt_bw==1) { 207 switch (m) { 208 case 2: case 4: case 6: case 8: 209 TD2P_MM13(j) 210 case 1: case 5: 211 TD2P_ANCL(j) 212 case 3: case 7: 213 TD2P_REFR(j) 214 } 215 } 216 } 217 else if (_tdm->_core_data.vars_pkg.cal_id==TD2P_YPIPE_CAL_ID) { 218 switch (m) { 219 case 1: case 3: case 5: case 7: 220 TD2P_LPBK(j) 221 case 2: case 4: case 6: case 8: 222 TD2P_ANCL(j) 223 } 224 } 225 } 226 else if (oversub==BOOL_TRUE) { 227 if (_tdm->_core_data.vars_pkg.cal_id==TD2P_XPIPE_CAL_ID) { 228 if (mgmt_bw==0) { 229 switch (m) { 230 case 1: case 3: case 6: 231 TD2P_CMIC(j) 232 case 2: case 4: case 5: case 7: case 8: 233 TD2P_ANCL(j) 234 } 235 } 236 else if (mgmt_bw==4) { 237 switch (m) { 238 case 1: 239 TD2P_MM13(j) 240 case 3: 241 TD2P_MM14(j) 242 case 5: 243 TD2P_MM15(j) 244 case 7: 245 TD2P_MM16(j) 246 case 2: case 4: case 6: 247 TD2P_ANCL(j) 248 case 8: 249 TD2P_CMIC(j) 250 } 251 } 252 else if (mgmt_bw==1) { 253 TDM_PRINT0("UNSUPPORTED\n"); 254 } 255 } 256 else if (_tdm->_core_data.vars_pkg.cal_id==TD2P_YPIPE_CAL_ID) { 257 switch (m) 258 { 259 case 1: case 3: case 6: 260 TD2P_LPBK(j) 261 case 2: case 4: case 5: case 7: case 8: 262 TD2P_ANCL(j) 263 } 264 } 265 } 266 } 267 else if (bw==608 || bw==609) { 268 if (_tdm->_core_data.vars_pkg.cal_id==TD2P_XPIPE_CAL_ID) { 269 if (mgmt_bw==0) { 270 switch (m) { 271 case 1: case 3: case 5: case 7: case 9: 272 TD2P_CMIC(j) 273 case 2: case 4: case 6: case 8: case 10: 274 TD2P_ANCL(j) 275 } 276 } 277 else if (mgmt_bw==4) { 278 switch (m) { 279 case 1: 280 TD2P_MM13(j) 281 case 3: 282 TD2P_MM14(j) 283 case 6: 284 TD2P_MM15(j) 285 case 8: 286 TD2P_MM16(j) 287 case 2: case 5: case 9: 288 TD2P_ANCL(j) 289 case 4: case 7: case 10: 290 TD2P_CMIC(j) 291 } 292 } 293 else if (mgmt_bw==1) { 294 switch (m) { 295 case 2: case 4: case 7: case 9: 296 TD2P_MM13(j) 297 case 1: case 3: case 5: case 6: case 8: 298 TD2P_ANCL(j) 299 case 10: 300 TD2P_CMIC(j) 301 } 302 } 303 } 304 else if (_tdm->_core_data.vars_pkg.cal_id==TD2P_YPIPE_CAL_ID) { 305 switch (m) { 306 case 1: case 3: case 5: case 7: case 9: 307 TD2P_LPBK(j) 308 case 2: case 4: case 6: case 8: case 10: 309 TD2P_ANCL(j) 310 } 311 } 312 } 313 else if (bw==517 || bw==518) { 314 if (oversub==BOOL_FALSE) { 315 if (_tdm->_core_data.vars_pkg.cal_id==TD2P_XPIPE_CAL_ID) { 316 if (mgmt_bw==0) { 317 switch (m) { 318 case 1: case 3: case 5: case 7: 319 TD2P_CMIC(j) 320 case 2: case 4: case 6: case 8: 321 TD2P_ANCL(j) 322 } 323 } 324 else if (mgmt_bw==4) { 325 switch (m) { 326 case 1: 327 TD2P_MM13(j) 328 case 3: 329 TD2P_MM14(j) 330 case 5: 331 TD2P_MM15(j) 332 case 7: 333 TD2P_MM16(j) 334 case 2: case 6: 335 TD2P_ANCL(j) 336 case 4: case 8: 337 TD2P_CMIC(j) 338 } 339 } 340 else if (mgmt_bw==1) { 341 switch (m) { 342 case 2: case 4: case 6: case 8: 343 TD2P_MM13(j) 344 case 1: case 5: 345 TD2P_ANCL(j) 346 case 3: case 7: 347 TD2P_REFR(j) 348 } 349 } 350 } 351 else if (_tdm->_core_data.vars_pkg.cal_id==TD2P_YPIPE_CAL_ID) { 352 switch (m) { 353 case 1: case 3: case 5: case 7: 354 TD2P_LPBK(j) 355 case 2: case 4: case 6: case 8: 356 TD2P_ANCL(j) 357 } 358 } 359 } 360 else if (oversub==BOOL_TRUE) { 361 if (_tdm->_core_data.vars_pkg.cal_id==TD2P_XPIPE_CAL_ID) { 362 if (mgmt_bw==0) { 363 switch (m) { 364 case 1: case 3: case 6: 365 TD2P_CMIC(j) 366 case 2: case 4: case 5: case 7: case 8: 367 TD2P_ANCL(j) 368 } 369 } 370 else if (mgmt_bw==4) { 371 switch (m) { 372 case 1: 373 TD2P_MM13(j) 374 case 3: 375 TD2P_MM14(j) 376 case 5: 377 TD2P_MM15(j) 378 case 7: 379 TD2P_MM16(j) 380 case 2: case 4: case 6: 381 TD2P_ANCL(j) 382 case 8: 383 TD2P_CMIC(j) 384 } 385 } 386 else if (mgmt_bw==1) { 387 TDM_PRINT0("UNSUPPORTED\n"); 388 } 389 } 390 else if (_tdm->_core_data.vars_pkg.cal_id==TD2P_YPIPE_CAL_ID) { 391 switch (m) { 392 case 1: case 3: case 6: 393 TD2P_LPBK(j) 394 case 2: case 4: case 5: case 7: case 8: 395 TD2P_ANCL(j) 396 } 397 } 398 } 399 } 400 else if (bw==415 || bw==416) { 401 if (_tdm->_core_data.vars_pkg.cal_id==TD2P_XPIPE_CAL_ID) { 402 if (mgmt_bw==0) { 403 switch (m) { 404 case 1: case 3: case 5: case 7: case 9: 405 TD2P_CMIC(j) 406 case 2: case 4: case 6: case 8: case 10: 407 TD2P_ANCL(j) 408 } 409 } 410 else if (mgmt_bw==4) { 411 switch (m) { 412 case 1: 413 TD2P_MM13(j) 414 case 3: 415 TD2P_MM14(j) 416 case 6: 417 TD2P_MM15(j) 418 case 8: 419 TD2P_MM16(j) 420 case 2: case 5: case 9: 421 TD2P_ANCL(j) 422 case 4: case 7: case 10: 423 TD2P_CMIC(j) 424 } 425 } 426 /* DOUBLE CHECK, MING: 8 slots are supposed to be allocated to mgmt */ 427 else if (mgmt_bw==1) { 428 switch (m) { 429 case 2: case 4: case 7: case 9: 430 TD2P_MM13(j) 431 case 1: case 3: case 5: case 6: case 8: 432 TD2P_ANCL(j) 433 case 10: 434 TD2P_CMIC(j) 435 } 436 } 437 } 438 else if (_tdm->_core_data.vars_pkg.cal_id==TD2P_YPIPE_CAL_ID) { 439 switch (m) { 440 case 1: case 3: case 5: case 7: case 9: 441 TD2P_LPBK(j) 442 case 2: case 4: case 6: case 8: case 10: 443 TD2P_ANCL(j) 444 } 445 } 446 } 447 else { 448 TDM_PRINT0("INVALID PARAMETERS\n"); 449 } 450 } 451 } 452 453 for (j=0; j<TD2P_OS_VBS_GRP_LEN; j++) { 454 TDM_PRINT3("PIPE: %s, MMU OVS BUCKET 0, element #%0d, contains physical port #%0d\n", name, j, mmu_tdm_ovs_1[j]); 455 } 456 for (j=0; j<TD2P_OS_VBS_GRP_LEN; j++) { 457 TDM_PRINT3("PIPE: %s, MMU OVS BUCKET 1, element #%0d, contains physical port #%0d\n", name, j, mmu_tdm_ovs_2[j]); 458 } 459 for (j=0; j<TD2P_OS_VBS_GRP_LEN; j++) { 460 TDM_PRINT3("PIPE: %s, MMU OVS BUCKET 2, element #%0d, contains physical port #%0d\n", name, j, mmu_tdm_ovs_3[j]); 461 } 462 for (j=0; j<TD2P_OS_VBS_GRP_LEN; j++) { 463 TDM_PRINT3("PIPE: %s, MMU OVS BUCKET 3, element #%0d, contains physical port #%0d\n", name, j, mmu_tdm_ovs_4[j]); 464 } 465 for (j=0; j<TD2P_OS_VBS_GRP_LEN; j++) { 466 TDM_PRINT3("PIPE: %s, MMU OVS BUCKET 4, element #%0d, contains physical port #%0d\n", name, j, mmu_tdm_ovs_5[j]); 467 } 468 for (j=0; j<TD2P_OS_VBS_GRP_LEN; j++) { 469 TDM_PRINT3("PIPE: %s, MMU OVS BUCKET 5, element #%0d, contains physical port #%0d\n", name, j, mmu_tdm_ovs_6[j]); 470 } 471 472 473 _tdm->_core_data.vars_pkg.pipe++; 474 return ( ( _tdm->_core_exec[TDM_CORE_EXEC__POST]( _tdm ) ) ); 475 }