tdm_th2_parse.c (18714B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * $All Rights Reserved.$ 7 * 8 * TDM chip based printing and parsing functions 9 */ 10 #ifdef _TDM_STANDALONE 11 #include <tdm_top.h> 12 #else 13 #include <soc/tdm/core/tdm_top.h> 14 #endif 15 16 17 /** 18 @name: tdm_th2_parse_pipe 19 @param: 20 21 Parses pipe config from class structs 22 */ 23 void 24 tdm_th2_parse_pipe( tdm_mod_t *_tdm ) 25 { 26 int iter, iter2; 27 28 /* Summarize the port config in this quadrant */ 29 TDM_PRINT0("TDM: --- Pipe Config ---: "); 30 for (iter=_tdm->_chip_data.soc_pkg.soc_vars.th2.pipe_start; iter<=_tdm->_chip_data.soc_pkg.soc_vars.th2.pipe_end; iter++) { 31 if ((((iter-1)%16)==0)) { 32 TDM_PRINT0("\nTDM: "); 33 } 34 TDM_PRINT1("{%03d}\t",iter); 35 if (iter%16==0) { 36 TDM_PRINT0("\nTDM: "); 37 for (iter2=(iter-16); iter2<iter; iter2++) { 38 TDM_PRINT1("%d\t",_tdm->_chip_data.soc_pkg.speed[iter2+1]); 39 } 40 TDM_PRINT0("\nTDM: "); 41 for (iter2=(iter-16); iter2<iter; iter2++) { 42 if ((iter2-1)%TH2_NUM_PM_LNS==0) { 43 switch (_tdm->_chip_data.soc_pkg.state[iter2-1]) { 44 case PORT_STATE__LINERATE: 45 case PORT_STATE__LINERATE_HG: 46 TDM_PRINT0("LINE\t---\t---\t---\t"); 47 break; 48 case PORT_STATE__OVERSUB: 49 case PORT_STATE__OVERSUB_HG: 50 TDM_PRINT0("OVSB\t---\t---\t---\t"); 51 break; 52 default: 53 break; 54 } 55 } 56 } 57 TDM_PRINT0("\nTDM: "); 58 for (iter2=(iter-16); iter2<iter; iter2++) { 59 if ((iter2-1)%TH2_NUM_PM_LNS==0) { 60 switch (_tdm->_chip_data.soc_pkg.state[iter2-1]) { 61 case PORT_STATE__LINERATE_HG: case PORT_STATE__OVERSUB_HG: 62 TDM_PRINT0("HIGIG2\t---\t---\t---\t"); 63 break; 64 case PORT_STATE__LINERATE: case PORT_STATE__OVERSUB: 65 TDM_PRINT0("ETHRNT\t---\t---\t---\t"); 66 break; 67 default: 68 break; 69 } 70 } 71 } 72 } 73 } 74 TDM_PRINT0("\n"); 75 TDM_BIG_BAR 76 } 77 78 79 /** 80 @name: tdm_th2_parse_tdm_tbl 81 @param: 82 83 Postprocesses TDM calendar tokenized entries 84 */ 85 int 86 tdm_th2_parse_tdm_tbl( tdm_mod_t *_tdm ) 87 { 88 int j, m; 89 tdm_calendar_t cal_idb, cal_mmu; 90 91 switch(_tdm->_core_data.vars_pkg.cal_id) { 92 case 0: cal_idb=_tdm->_chip_data.cal_0; cal_mmu=_tdm->_chip_data.cal_4; break; 93 case 1: cal_idb=_tdm->_chip_data.cal_1; cal_mmu=_tdm->_chip_data.cal_5; break; 94 case 2: cal_idb=_tdm->_chip_data.cal_2; cal_mmu=_tdm->_chip_data.cal_6; break; 95 case 3: cal_idb=_tdm->_chip_data.cal_3; cal_mmu=_tdm->_chip_data.cal_7; break; 96 default: 97 TDM_PRINT1("Invalid calendar ID - %0d\n",_tdm->_core_data.vars_pkg.cal_id); 98 return (TDM_EXEC_CORE_SIZE+1); 99 } 100 TDM_COPY(cal_mmu.cal_main, cal_idb.cal_main, sizeof(int)*512); 101 m=0; 102 for (j=0; j<(_tdm->_chip_data.soc_pkg.lr_idx_limit+_tdm->_chip_data.soc_pkg.tvec_size); j++) { 103 if (cal_idb.cal_main[j]!=TH2_ANCL_TOKEN) { 104 TDM_PRINT3("TDM: PIPE %d, IDB TDM TABLE, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_main[j]); 105 } 106 else { 107 TDM_PRINT2("TDM: PIPE %d, IDB TDM TABLE, element #%0d, CONTAINS ACCESSORY TOKEN - assigned as ",_tdm->_core_data.vars_pkg.pipe,j); 108 m++; 109 switch (_tdm->_core_data.vars_pkg.pipe) { 110 case 0: 111 switch (m) { 112 case 1: case 3: case 6: case 8: 113 TH2_CMIC(j,cal_idb.cal_main) 114 case 2: case 7: 115 TH2_LPB0(j,cal_idb.cal_main) 116 case 4: case 9: 117 TH2_IDLE(j,cal_idb.cal_main) 118 case 5: 119 TH2_OPT1(j,cal_idb.cal_main) 120 case 10: 121 TH2_NULL(j,cal_idb.cal_main) 122 } 123 break; 124 case 1: 125 switch (m) { 126 case 1: case 3: case 6: case 8: 127 TH2_MGM1(j,cal_idb.cal_main) 128 case 2: case 7: 129 TH2_LPB1(j,cal_idb.cal_main) 130 case 4: case 9: 131 TH2_IDLE(j,cal_idb.cal_main) 132 case 5: 133 TH2_OPT1(j,cal_idb.cal_main) 134 case 10: 135 TH2_NULL(j,cal_idb.cal_main) 136 } 137 break; 138 case 2: 139 switch (m) { 140 case 1: case 3: case 6: case 8: 141 TH2_MGM2(j,cal_idb.cal_main) 142 case 2: case 7: 143 TH2_LPB2(j,cal_idb.cal_main) 144 case 4: case 9: 145 TH2_IDLE(j,cal_idb.cal_main) 146 case 5: 147 TH2_OPT1(j,cal_idb.cal_main) 148 case 10: 149 TH2_NULL(j,cal_idb.cal_main) 150 } 151 break; 152 case 3: 153 switch (m) { 154 case 1: case 3: case 6: case 8: 155 TH2_OPT1(j,cal_idb.cal_main) 156 case 2: case 7: 157 TH2_LPB3(j,cal_idb.cal_main) 158 case 4: case 9: 159 TH2_IDLE(j,cal_idb.cal_main) 160 case 5: 161 TH2_OPT1(j,cal_idb.cal_main) 162 case 10: 163 TH2_NULL(j,cal_idb.cal_main) 164 } 165 break; 166 } 167 } 168 } 169 m=0; 170 for (j=0; j<(_tdm->_chip_data.soc_pkg.lr_idx_limit+_tdm->_chip_data.soc_pkg.tvec_size); j++) { 171 if (cal_mmu.cal_main[j]!=TH2_ANCL_TOKEN) { 172 TDM_PRINT3("TDM: PIPE %d, MMU TDM TABLE, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_mmu.cal_main[j]); 173 } 174 else { 175 TDM_PRINT2("TDM: PIPE %d, MMU TDM TABLE, element #%0d, CONTAINS ACCESSORY TOKEN - assigned as ",_tdm->_core_data.vars_pkg.pipe,j); 176 m++; 177 switch (_tdm->_core_data.vars_pkg.pipe) { 178 case 0: 179 switch (m) { 180 case 1: case 3: case 6: case 8: 181 TH2_CMIC(j,cal_mmu.cal_main) 182 case 4: case 10: 183 TH2_LPB0(j,cal_mmu.cal_main) 184 case 2: case 5: case 9: 185 TH2_NULL(j,cal_mmu.cal_main) 186 case 7: 187 TH2_IDLE(j,cal_mmu.cal_main) 188 } 189 break; 190 case 1: 191 switch (m) { 192 case 1: case 3: case 6: case 8: 193 TH2_MGM1(j,cal_mmu.cal_main) 194 case 4: case 10: 195 TH2_LPB1(j,cal_mmu.cal_main) 196 case 2: case 5: case 9: 197 TH2_NULL(j,cal_mmu.cal_main) 198 case 7: 199 TH2_IDLE(j,cal_mmu.cal_main) 200 } 201 break; 202 case 2: 203 switch (m) { 204 case 1: case 3: case 6: case 8: 205 TH2_MGM2(j,cal_mmu.cal_main) 206 case 4: case 10: 207 TH2_LPB2(j,cal_mmu.cal_main) 208 case 2: case 5: case 9: 209 TH2_NULL(j,cal_mmu.cal_main) 210 case 7: 211 TH2_IDLE(j,cal_mmu.cal_main) 212 } 213 break; 214 case 3: 215 switch (m) { 216 case 1: case 3: case 6: case 8: 217 TH2_OPT1(j,cal_mmu.cal_main) 218 case 4: case 10: 219 TH2_LPB3(j,cal_mmu.cal_main) 220 case 2: case 5: case 9: 221 TH2_NULL(j,cal_mmu.cal_main) 222 case 7: 223 TH2_IDLE(j,cal_mmu.cal_main) 224 } 225 break; 226 } 227 } 228 } 229 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 230 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 0, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[0][j]); 231 } 232 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 233 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 1, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[1][j]); 234 } 235 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 236 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 2, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[2][j]); 237 } 238 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 239 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 3, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[3][j]); 240 } 241 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 242 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 4, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[4][j]); 243 } 244 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 245 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 5, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[5][j]); 246 } 247 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 248 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 6, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[6][j]); 249 } 250 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 251 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 7, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[7][j]); 252 } 253 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 254 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 8, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[8][j]); 255 } 256 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 257 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 9, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[9][j]); 258 } 259 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 260 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 10, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[10][j]); 261 } 262 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 263 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 11, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[11][j]); 264 } 265 266 267 TDM_PRINT1("\nTDM: PIPE %d, OVS GROUPs 0:11\n",_tdm->_core_data.vars_pkg.pipe); 268 for (j=0; j< TH2_OS_VBS_GRP_NUM; j++) { 269 if ((j %(TH2_OS_VBS_GRP_NUM/2))==0) { TDM_PRINT1("\n HALF PIPE %d", j/(TH2_OS_VBS_GRP_NUM/2) );} 270 TDM_PRINT1("\nOVS_CAL[%d]:\t", j); 271 for (m=0; m< TH2_OS_VBS_GRP_LEN; m++) { 272 TDM_PRINT1("%d\t", cal_idb.cal_grp[j][m]); 273 } 274 } 275 TDM_PRINT0("\n\n"); 276 277 278 TDM_PRINT1("\nTDM: PIPE %d, PKT SCHEDULER HALF PIPE 0\n",_tdm->_core_data.vars_pkg.pipe); 279 for (j=0; j<SHAPING_GRP_LEN; j++) { 280 if (j%16==0) { TDM_PRINT2("\n %3d : %3d\t", j, j+15);} 281 TDM_PRINT1("\t%d",cal_idb.cal_grp[SHAPING_GRP_IDX_0][j]); 282 } 283 TDM_PRINT0("\n\n"); 284 TDM_PRINT1("\nTDM: PIPE %d, PKT SCHEDULER HALF PIPE 1\n",_tdm->_core_data.vars_pkg.pipe); 285 for (j=0; j<SHAPING_GRP_LEN; j++) { 286 if (j%16==0) { TDM_PRINT2("\n %3d : %3d\t", j, j+15);} 287 TDM_PRINT1("\t%d",cal_idb.cal_grp[SHAPING_GRP_IDX_1][j]); 288 } 289 TDM_PRINT0("\n\n"); 290 291 292 return ( _tdm->_chip_exec[TDM_CHIP_EXEC__POST]( _tdm ) ); 293 } 294 295 296 297 298 /** 299 @name: tdm_th2_parse_tdm_tbl_new 300 @param: 301 302 Postprocesses TDM calendar tokenized entries 303 */ 304 int 305 tdm_th2_parse_tdm_tbl_new( tdm_mod_t *_tdm ) 306 { 307 int j, m; 308 tdm_calendar_t cal_idb, cal_mmu; 309 310 switch(_tdm->_core_data.vars_pkg.cal_id) { 311 case 0: cal_idb=_tdm->_chip_data.cal_0; cal_mmu=_tdm->_chip_data.cal_4; break; 312 case 1: cal_idb=_tdm->_chip_data.cal_1; cal_mmu=_tdm->_chip_data.cal_5; break; 313 case 2: cal_idb=_tdm->_chip_data.cal_2; cal_mmu=_tdm->_chip_data.cal_6; break; 314 case 3: cal_idb=_tdm->_chip_data.cal_3; cal_mmu=_tdm->_chip_data.cal_7; break; 315 default: 316 TDM_PRINT1("Invalid calendar ID - %0d\n",_tdm->_core_data.vars_pkg.cal_id); 317 return (TDM_EXEC_CORE_SIZE+1); 318 } 319 TDM_COPY(cal_mmu.cal_main, cal_idb.cal_main, sizeof(int)*512); 320 m=0; 321 for (j=0; j<(_tdm->_chip_data.soc_pkg.lr_idx_limit+_tdm->_chip_data.soc_pkg.tvec_size); j++) { 322 if (cal_idb.cal_main[j] < TH2_ANCL_TOKEN) { 323 TDM_PRINT3("TDM: PIPE %d, IDB TDM TABLE, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_main[j]); 324 } 325 else { 326 TDM_PRINT2("TDM: PIPE %d, IDB TDM TABLE, element #%0d, CONTAINS ACCESSORY TOKEN - assigned as ",_tdm->_core_data.vars_pkg.pipe,j); 327 switch (_tdm->_core_data.vars_pkg.pipe) { 328 case 0: 329 /* CPU token */ 330 if (cal_idb.cal_main[j]==TH2_ANCL_TOKEN) { 331 TH2_CMIC(j,cal_idb.cal_main) 332 } 333 /* LBK 0 token */ 334 if (cal_idb.cal_main[j]==(TH2_ANCL_TOKEN+1)) { 335 TH2_LPB0(j,cal_idb.cal_main) 336 } 337 break; 338 case 1: 339 /* MGM 1 token */ 340 if (cal_idb.cal_main[j]==TH2_ANCL_TOKEN) { 341 TH2_MGM1(j,cal_idb.cal_main) 342 } 343 /* LBK 1 token */ 344 if (cal_idb.cal_main[j]==(TH2_ANCL_TOKEN+1)) { 345 TH2_LPB1(j,cal_idb.cal_main) 346 } 347 break; 348 case 2: 349 /* MGM 2 token */ 350 if (cal_idb.cal_main[j]==TH2_ANCL_TOKEN) { 351 TH2_MGM2(j,cal_idb.cal_main) 352 } 353 /* LBK 2 token */ 354 if (cal_idb.cal_main[j]==(TH2_ANCL_TOKEN+1)) { 355 TH2_LPB2(j,cal_idb.cal_main) 356 } 357 break; 358 case 3: 359 /* No MGM in PIPE 3; SPARE tokens */ 360 if (cal_idb.cal_main[j]==TH2_ANCL_TOKEN) { 361 if ((!_tdm->_core_data.vars_pkg.os_enable) && _tdm->_core_data.vars_pkg.lr_enable) { 362 TH2_IDLE(j,cal_idb.cal_main) 363 } else { 364 cal_idb.cal_main[j] = TH2_OVSB_TOKEN; 365 TDM_PRINT0("OVS TOKEN\n"); 366 break; 367 } 368 } 369 /* LBK 2 token */ 370 if (cal_idb.cal_main[j]==(TH2_ANCL_TOKEN+1)) { 371 TH2_LPB3(j,cal_idb.cal_main) 372 } 373 break; 374 default : 375 TDM_PRINT1("Invalid calendar ID - %0d\n",_tdm->_core_data.vars_pkg.cal_id); 376 return (TDM_EXEC_CORE_SIZE+1); 377 } 378 /* OPPT, IDLE, NULL tokens */ 379 if (cal_idb.cal_main[j]==(TH2_ANCL_TOKEN+2)) { 380 switch (m) { 381 case 0: case 2: 382 TH2_IDLE(j,cal_idb.cal_main) 383 case 1: 384 TH2_OPT1(j,cal_idb.cal_main) 385 case 3: 386 TH2_NULL(j,cal_idb.cal_main) 387 } 388 m++; 389 } 390 } 391 } 392 393 394 m=0; 395 for (j=0; j<(_tdm->_chip_data.soc_pkg.lr_idx_limit+_tdm->_chip_data.soc_pkg.tvec_size); j++) { 396 if (cal_mmu.cal_main[j] < TH2_ANCL_TOKEN) { 397 TDM_PRINT3("TDM: PIPE %d, MMU TDM TABLE, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_mmu.cal_main[j]); 398 } 399 else { 400 TDM_PRINT2("TDM: PIPE %d, MMU TDM TABLE, element #%0d, CONTAINS ACCESSORY TOKEN - assigned as ",_tdm->_core_data.vars_pkg.pipe,j); 401 switch (_tdm->_core_data.vars_pkg.pipe) { 402 case 0: 403 /* CPU token */ 404 if (cal_mmu.cal_main[j]==TH2_ANCL_TOKEN) { 405 TH2_CMIC(j,cal_mmu.cal_main) 406 } 407 /* LBK 0 token */ 408 if (cal_mmu.cal_main[j]==(TH2_ANCL_TOKEN+1)) { 409 TH2_LPB0(j,cal_mmu.cal_main) 410 } 411 break; 412 case 1: 413 /* MGM 1 token */ 414 if (cal_mmu.cal_main[j]==TH2_ANCL_TOKEN) { 415 TH2_MGM1(j,cal_mmu.cal_main) 416 } 417 /* LBK 1 token */ 418 if (cal_mmu.cal_main[j]==(TH2_ANCL_TOKEN+1)) { 419 TH2_LPB1(j,cal_mmu.cal_main) 420 } 421 break; 422 case 2: 423 /* MGM 2 token */ 424 if (cal_mmu.cal_main[j]==TH2_ANCL_TOKEN) { 425 TH2_MGM2(j,cal_mmu.cal_main) 426 } 427 /* LBK 2 token */ 428 if (cal_mmu.cal_main[j]==(TH2_ANCL_TOKEN+1)) { 429 TH2_LPB2(j,cal_mmu.cal_main) 430 } 431 break; 432 case 3: 433 /* No MGM in PIPE 3; SPARE tokens */ 434 if (cal_mmu.cal_main[j]==TH2_ANCL_TOKEN) { 435 if ((!_tdm->_core_data.vars_pkg.os_enable) && _tdm->_core_data.vars_pkg.lr_enable) { 436 TH2_IDLE(j,cal_mmu.cal_main) 437 } else { 438 cal_mmu.cal_main[j] = TH2_OVSB_TOKEN; 439 TDM_PRINT0("OVS TOKEN\n"); 440 break; 441 } 442 } 443 /* LBK 2 token */ 444 if (cal_mmu.cal_main[j]==(TH2_ANCL_TOKEN+1)) { 445 TH2_LPB3(j,cal_mmu.cal_main) 446 } 447 break; 448 default : 449 TDM_PRINT1("Invalid calendar ID - %0d\n",_tdm->_core_data.vars_pkg.cal_id); 450 return (TDM_EXEC_CORE_SIZE+1); 451 } 452 /* OPPT, IDLE, NULL tokens */ 453 if (cal_mmu.cal_main[j]==(TH2_ANCL_TOKEN+2)) { 454 switch (m) { 455 case 0: case 2: case 3: 456 TH2_NULL(j,cal_mmu.cal_main) 457 case 1: 458 TH2_IDLE(j,cal_mmu.cal_main) 459 default : 460 TDM_PRINT1("Invalid ANCL_TOKEN index m=%d\n",m); 461 } 462 m++; 463 } 464 } 465 } 466 467 468 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 469 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 0, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[0][j]); 470 } 471 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 472 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 1, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[1][j]); 473 } 474 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 475 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 2, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[2][j]); 476 } 477 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 478 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 3, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[3][j]); 479 } 480 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 481 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 4, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[4][j]); 482 } 483 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 484 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 5, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[5][j]); 485 } 486 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 487 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 6, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[6][j]); 488 } 489 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 490 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 7, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[7][j]); 491 } 492 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 493 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 8, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[8][j]); 494 } 495 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 496 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 9, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[9][j]); 497 } 498 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 499 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 10, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[10][j]); 500 } 501 for (j=0; j<TH2_OS_VBS_GRP_LEN; j++) { 502 TDM_PRINT3("TDM: PIPE %d, OVS GROUP 11, element #%0d, contains physical port #%0d\n",_tdm->_core_data.vars_pkg.pipe,j,cal_idb.cal_grp[11][j]); 503 } 504 505 506 TDM_PRINT1("\nTDM: PIPE %d, IDB TDM main calendar\n",_tdm->_core_data.vars_pkg.pipe); 507 for (j=0; j<(_tdm->_chip_data.soc_pkg.lr_idx_limit+_tdm->_chip_data.soc_pkg.tvec_size); j++) { 508 if (j%32==0) { TDM_PRINT2("\n %3d : %3d\t", j, j+31);} 509 TDM_PRINT1("%5d",cal_idb.cal_main[j]); 510 } 511 TDM_PRINT0("\n\n"); 512 513 TDM_PRINT1("\nTDM: PIPE %d, MMU TDM main calendar\n",_tdm->_core_data.vars_pkg.pipe); 514 for (j=0; j<(_tdm->_chip_data.soc_pkg.lr_idx_limit+_tdm->_chip_data.soc_pkg.tvec_size); j++) { 515 if (j%32==0) { TDM_PRINT2("\n %3d : %3d\t", j, j+31);} 516 TDM_PRINT1("%5d",cal_mmu.cal_main[j]); 517 } 518 TDM_PRINT0("\n\n"); 519 520 TDM_PRINT1("\nTDM: PIPE %d, OVS GROUPs 0:11\n",_tdm->_core_data.vars_pkg.pipe); 521 for (j=0; j< TH2_OS_VBS_GRP_NUM; j++) { 522 if ((j %(TH2_OS_VBS_GRP_NUM/2))==0) { TDM_PRINT1("\n HALF PIPE %d", j/(TH2_OS_VBS_GRP_NUM/2) );} 523 TDM_PRINT1("\nOVS_CAL[%d]:\t", j); 524 for (m=0; m< TH2_OS_VBS_GRP_LEN; m++) { 525 TDM_PRINT1("%d\t", cal_idb.cal_grp[j][m]); 526 } 527 } 528 TDM_PRINT0("\n\n"); 529 530 531 TDM_PRINT1("\nTDM: PIPE %d, PKT SCHEDULER HALF PIPE 0\n",_tdm->_core_data.vars_pkg.pipe); 532 for (j=0; j<SHAPING_GRP_LEN; j++) { 533 if (j%16==0) { TDM_PRINT2("\n %3d : %3d\t", j, j+15);} 534 TDM_PRINT1("\t%d",cal_idb.cal_grp[SHAPING_GRP_IDX_0][j]); 535 } 536 TDM_PRINT0("\n\n"); 537 TDM_PRINT1("\nTDM: PIPE %d, PKT SCHEDULER HALF PIPE 1\n",_tdm->_core_data.vars_pkg.pipe); 538 for (j=0; j<SHAPING_GRP_LEN; j++) { 539 if (j%16==0) { TDM_PRINT2("\n %3d : %3d\t", j, j+15);} 540 TDM_PRINT1("\t%d",cal_idb.cal_grp[SHAPING_GRP_IDX_1][j]); 541 } 542 TDM_PRINT0("\n\n"); 543 544 TDM_PRINT1("\nTDM: PIPE %d, PM_NUM to PBLK_ID MAP \nPM:PBLK_ID",_tdm->_core_data.vars_pkg.pipe); 545 for (j=(16*_tdm->_core_data.vars_pkg.cal_id); j<(16*(_tdm->_core_data.vars_pkg.cal_id+1)); j++) { 546 TDM_PRINT2("\t %2d:%2d",j, _tdm->_chip_data.soc_pkg.soc_vars.th2.pm_num_to_pblk[j]); 547 } 548 TDM_PRINT0("\n\n"); 549 550 return ( _tdm->_chip_exec[TDM_CHIP_EXEC__POST]( _tdm ) ); 551 }