tdm_hx5_proc.c (6320B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * $All Rights Reserved.$ 7 * 8 * TDM chip operations 9 */ 10 #ifdef _TDM_STANDALONE 11 #include <tdm_top.h> 12 #else 13 #include <soc/tdm/core/tdm_top.h> 14 #endif 15 16 17 /** 18 @name: tdm_hx5_proc_cal_ancl 19 @param: 20 21 Allocate ancillary slots with matched speed rates accordingly 22 */ 23 int 24 tdm_hx5_proc_cal_ancl(tdm_mod_t *_tdm) 25 { 26 int i, j, k, k_prev, k_idx, idx_up, idx_dn, result=PASS; 27 int param_lr_limit, param_ancl_num, param_cal_len, 28 param_token_empty, param_token_ancl, 29 param_lr_en; 30 int *param_cal_main; 31 32 param_lr_limit = _tdm->_chip_data.soc_pkg.lr_idx_limit; 33 param_ancl_num = _tdm->_chip_data.soc_pkg.tvec_size; 34 param_cal_len = param_lr_limit + param_ancl_num; 35 param_token_empty = _tdm->_chip_data.soc_pkg.num_ext_ports; 36 param_token_ancl = _tdm->_chip_data.soc_pkg.soc_vars.ancl_token; 37 param_lr_en = _tdm->_core_data.vars_pkg.lr_enable; 38 39 /* allocate ANCL slots */ 40 TDM_SEL_CAL(_tdm->_core_data.vars_pkg.cal_id,param_cal_main); 41 if (param_ancl_num>0){ 42 TDM_PRINT1("TDM: Allocate %d ANCL slots\n\n", param_ancl_num); 43 if (param_lr_en==BOOL_TRUE){ 44 k = 0; 45 for (j=0; j<param_ancl_num; j++){ 46 idx_up = 0; 47 idx_dn = 0; 48 k_idx = 0; 49 k_prev = k; 50 if (j==(param_ancl_num-1)){ 51 k = param_cal_len - 1; 52 } else { 53 k = k_prev + ((param_cal_len-k_prev)/(param_ancl_num-j)) -1; 54 } 55 for (i=k; i>0 && i<param_cal_len; i--){ 56 if (param_cal_main[i]==param_token_empty){ 57 idx_up = i; 58 break; 59 } 60 } 61 for (i=k; i<param_cal_len; i++){ 62 if (param_cal_main[i]==param_token_empty){ 63 idx_dn = i; 64 break; 65 } 66 } 67 if (idx_up>0 || idx_dn>0){ 68 if (idx_up>0 && idx_dn>0){ 69 k_idx = ((k-idx_up)<(idx_dn-k))?(idx_up):(idx_dn); 70 } else if (idx_up>0){ 71 k_idx = idx_up; 72 } else if (idx_dn>0){ 73 k_idx = idx_dn; 74 } 75 } 76 if (k_idx==0){ 77 for (i=(param_cal_len-1); i>0; i--){ 78 if (param_cal_main[i]==param_token_empty){ 79 k_idx = i; 80 break; 81 } 82 } 83 } 84 if (k_idx>0 && k_idx<param_cal_len){ 85 param_cal_main[k_idx] = param_token_ancl; 86 TDM_PRINT2("TDM: Allocate %d-th ANCL slot at index #%03d\n", 87 j+1, k_idx); 88 } else { 89 TDM_WARN1("TDM: Failed in %d-th ANCL slot allocation\n",j); 90 result = FAIL; 91 } 92 } 93 } else { 94 k_prev = 0; 95 for (j=0; j<param_ancl_num; j++){ 96 k_idx = k_prev + ((param_cal_len-k_prev)/(param_ancl_num-j)) - 1; 97 param_cal_main[k_idx] = param_token_ancl; 98 k_prev= k_idx+1; 99 TDM_PRINT1("TDM: Allocate ANCL slot at index #%03d\n", 100 k_idx); 101 } 102 } 103 TDM_SML_BAR 104 } 105 106 return result; 107 } 108 109 110 /** 111 @name: tdm_hx5_proc_cal_idle 112 @param: 113 114 Allocate idle slots with matched speed rates accordingly 115 */ 116 int 117 tdm_hx5_proc_cal_idle( tdm_mod_t *_tdm ) 118 { 119 int i, result=PASS; 120 int param_lr_limit, param_ancl_num, param_cal_len, 121 param_token_empty, param_token_ovsb, 122 param_token_idl1, param_token_idl2, 123 param_os_en; 124 int *param_cal_main; 125 126 param_lr_limit = _tdm->_chip_data.soc_pkg.lr_idx_limit; 127 param_ancl_num = _tdm->_chip_data.soc_pkg.tvec_size; 128 param_cal_len = param_lr_limit + param_ancl_num; 129 param_token_empty = _tdm->_chip_data.soc_pkg.num_ext_ports; 130 param_token_ovsb = _tdm->_chip_data.soc_pkg.soc_vars.ovsb_token; 131 param_token_idl1 = _tdm->_chip_data.soc_pkg.soc_vars.idl1_token; 132 param_token_idl2 = _tdm->_chip_data.soc_pkg.soc_vars.idl2_token; 133 param_os_en = _tdm->_core_data.vars_pkg.os_enable; 134 135 TDM_SEL_CAL(_tdm->_core_data.vars_pkg.cal_id,param_cal_main); 136 137 if (param_os_en==BOOL_TRUE){ 138 for (i=0; i<param_cal_len; i++){ 139 if (param_cal_main[i]==param_token_empty){ 140 param_cal_main[i] = param_token_ovsb; 141 } 142 } 143 } 144 else { 145 for (i=0; i<param_cal_len; i++){ 146 if (param_cal_main[i]==param_token_empty){ 147 if ((i%2)==0){ 148 param_cal_main[i] = param_token_idl1; 149 } 150 else { 151 param_cal_main[i] = param_token_idl2; 152 } 153 } 154 } 155 } 156 157 return result; 158 } 159 160 161 /** 162 @name: tdm_hx5_proc_cal_lr 163 @param: 164 165 Allocate linerate slots with matched speed rates accordingly 166 */ 167 int 168 tdm_hx5_proc_cal_lr( tdm_mod_t *_tdm ) 169 { 170 int result=PASS; 171 172 /* pre-allocation */ 173 if(_tdm->_core_exec[TDM_CORE_EXEC__VMAP_PREALLOC](_tdm)!=PASS){ 174 result = FAIL; 175 } 176 /* allocation */ 177 if (result == PASS) { 178 if(_tdm->_core_exec[TDM_CORE_EXEC__VMAP_ALLOC](_tdm)!=PASS){ 179 result = FAIL; 180 } 181 } 182 183 return result; 184 } 185 186 187 /** 188 @name: tdm_hx5_proc_cal 189 @param: 190 191 Allocate slots for linerate/oversub/ancl ports with matched speed rates accordingly 192 */ 193 int 194 tdm_hx5_proc_cal(tdm_mod_t *_tdm) 195 { 196 /* allocate LINERATE slots */ 197 if(tdm_hx5_proc_cal_lr(_tdm)!=PASS){ 198 return (TDM_EXEC_CORE_SIZE+1); 199 } 200 /* allocate ANCILLARY slots */ 201 if(tdm_hx5_proc_cal_ancl(_tdm)!=PASS){ 202 return (TDM_EXEC_CORE_SIZE+1); 203 } 204 /* allocate IDLE/OVSB slots */ 205 if(tdm_hx5_proc_cal_idle(_tdm)!=PASS){ 206 return (TDM_EXEC_CORE_SIZE+1); 207 } 208 209 return ( _tdm->_core_exec[TDM_CORE_EXEC__SCHEDULER](_tdm) ); 210 }