tcam.c (73290B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * File: tcam.c 8 */ 9 10 #include <soc/debug.h> 11 #include <soc/error.h> 12 #include <soc/drv.h> 13 #include <soc/mem.h> 14 #include <soc/er_tcam.h> 15 #ifdef BCM_TRIUMPH3_SUPPORT 16 #include <soc/triumph3.h> 17 #endif 18 19 /* 20 * seer_config_ext_table_config (an actual config value?) 21 * min_blk_num_acl (always 0?) 22 * max_blk_num_acl 23 * min_blk_num_lpm (always "max_blk_num_acl + 1"?) 24 * max_blk_num_lpm (always max block?) 25 * The nstart is calculated as: 26 * nstart = nse_table_start / relative entry size 27 * Assuming that the tcam is always partitioned into 2 tables, with 28 * a 144-bit table goes from address 0, the only configuration parameter would 29 * number of blocks in it. 30 * min_blk_num_lpm = nse_144_blk_cnt; 31 * nstart_72b_table = nse_144_blk_cnt * entries_per_block 32 */ 33 34 #ifdef BCM_TRIUMPH_SUPPORT 35 STATIC int 36 soc_triumph_tcam_init(int unit) 37 { 38 #ifdef BCM_TRIUMPH3_SUPPORT 39 if (SOC_IS_TRIUMPH3(unit)) { 40 return tr3_tcam_init(unit); 41 } 42 #endif 43 return tr_tcam_init_type1(unit); 44 } 45 46 STATIC int 47 soc_triumph_tcam_write_entry(int unit, int part, int index, 48 uint32 *mask, uint32 *data) 49 { 50 #ifdef BCM_TRIUMPH3_SUPPORT 51 if (SOC_IS_TRIUMPH3(unit)) { 52 return soc_tr3_tcam_write_entry(unit, part, index, mask, data, 1); 53 } 54 #endif 55 return soc_tr_tcam_type1_write_entry(unit, part, index, mask, data); 56 } 57 58 STATIC int 59 soc_triumph_tcam_read_entry(int unit, int part, int index, 60 uint32 *mask, uint32 *data, int *valid) 61 { 62 #ifdef BCM_TRIUMPH3_SUPPORT 63 if (SOC_IS_TRIUMPH3(unit)) { 64 return soc_tr3_tcam_read_entry(unit, part, index, mask, data, valid); 65 } 66 #endif 67 return soc_tr_tcam_type1_read_entry(unit, part, index, mask, data, valid); 68 } 69 70 STATIC int 71 soc_triumph_tcam_search_entry(int unit, int part1, int part2, uint32 *data, 72 int *index1, int *index2) 73 { 74 #ifdef BCM_TRIUMPH3_SUPPORT 75 if (SOC_IS_TRIUMPH3(unit)) { 76 return soc_tr3_tcam_search_entry(unit, part1, part2, data, index1, 77 index2); 78 } 79 #endif 80 return soc_tr_tcam_type1_search_entry(unit, part1, part2, data, index1, 81 index2); 82 } 83 84 STATIC int 85 soc_triumph_tcam_write_reg(int unit, uint32 addr, uint32 d0_msb, uint32 d1, 86 uint32 d2_lsb) 87 { 88 #ifdef BCM_TRIUMPH3_SUPPORT 89 if (SOC_IS_TRIUMPH3(unit)) { 90 return soc_tr3_tcam_write_reg(unit, addr, d0_msb, d1, d2_lsb); 91 } 92 #endif 93 return soc_tr_tcam_type1_write_reg(unit, addr, d0_msb, d1, d2_lsb); 94 } 95 96 STATIC int 97 soc_triumph_tcam_read_reg(int unit, uint32 addr, uint32 *d0_msb, uint32 *d1, 98 uint32 *d2_lsb) 99 { 100 #ifdef BCM_TRIUMPH3_SUPPORT 101 if (SOC_IS_TRIUMPH3(unit)) { 102 return soc_tr3_tcam_read_reg(unit, addr, d0_msb, d1, d2_lsb); 103 } 104 #endif 105 return soc_tr_tcam_type1_read_reg(unit, addr, d0_msb, d1, d2_lsb); 106 } 107 108 STATIC int 109 soc_triumph_tcam_get_info(int u, int *type, int *subtype, int *dc_val, 110 soc_tcam_info_t **tcam_info) 111 { 112 soc_control_t *soc; 113 114 soc = SOC_CONTROL(u); 115 if (soc->tcam_info == NULL) { 116 return SOC_E_INIT; 117 } 118 119 if (type != NULL) { 120 *type = 1; 121 } 122 123 if (subtype != NULL) { 124 *subtype = ((soc_tcam_info_t *)soc->tcam_info)->subtype; 125 126 } 127 128 if (dc_val != NULL) { 129 *dc_val = 1; 130 } 131 132 if (tcam_info != NULL) { 133 *tcam_info = soc->tcam_info; 134 } 135 136 return SOC_E_NONE; 137 } 138 139 /* 140 * Partition to tcam memory name mapping 141 * TCAM_PARTITION_FWD_L2 EXT_L2_ENTRY_TCAM 142 * TCAM_PARTITION_FWD_IP4 EXT_IPV4_DEFIP_TCAM 143 * TCAM_PARTITION_FWD_IP6U EXT_IPV6_64_DEFIP_TCAM 144 * TCAM_PARTITION_FWD_IP6 EXT_IPV6_128_DEFIP_TCAM 145 * TCAM_PARTITION_ACL_L2 EXT_ACL288_TCAM (part 1) 146 * TCAM_PARTITION_ACL_IP4 EXT_ACL288_TCAM (part 2) 147 * TCAM_PARTITION_ACL_IP6S EXT_ACL360_TCAM_DATA, EXT_ACL360_TCAM_MASK 148 * TCAM_PARTITION_ACL_IP6F EXT_ACL432_TCAM_DATA, EXT_ACL432_TCAM_MASK (part 1) 149 * TCAM_PARTITION_ACL_L2C EXT_ACL144_TCAM (part 1) 150 * TCAM_PARTITION_ACL_IP4C EXT_ACL144_TCAM (part 2) 151 * TCAM_PARTITION_ACL_IP6C EXT_ACL144_TCAM (part 3) 152 * TCAM_PARTITION_ACL_L2IP4 EXT_ACL432_TCAM_DATA, EXT_ACL432_TCAM_MASK (part 2) 153 * TCAM_PARTITION_ACL_L2IP6 EXT_ACL432_TCAM_DATA, EXT_ACL432_TCAM_MASK (part 3) 154 * 155 * partition to assiciated data memory name mapping 156 * TCAM_PARTITION_FWD_L2 EXT_L2_ENTRY_DATA 157 * TCAM_PARTITION_FWD_IP4 EXT_DEFIP_DATA (part 1) 158 * TCAM_PARTITION_FWD_IP6U EXT_DEFIP_DATA (part 2) 159 * TCAM_PARTITION_FWD_IP6 EXT_DEFIP_DATA (part 3) 160 * TCAM_PARTITION_ACL_L2 EXT_FP_POLICY (part 1) 161 * TCAM_PARTITION_ACL_IP4 EXT_FP_POLICY (part 2) 162 * TCAM_PARTITION_ACL_IP6S EXT_FP_POLICY (part 3) 163 * TCAM_PARTITION_ACL_IP6F EXT_FP_POLICY (part 4) 164 * TCAM_PARTITION_ACL_L2C EXT_FP_POLICY (part 5) 165 * TCAM_PARTITION_ACL_IP4C EXT_FP_POLICY (part 6) 166 * TCAM_PARTITION_ACL_IP6C EXT_FP_POLICY (part 7) 167 * TCAM_PARTITION_ACL_L2IP4 EXT_FP_POLICY (part 8) 168 * TCAM_PARTITION_ACL_L2IP6 EXT_FP_POLICY (part 9) 169 * 170 * Note: if there are multiple partitions in a single memory table, logical 171 * index calculation does not count padded entries. For example if the 172 * system is configured to have 100 ACL_L2 entries and 4096 ACL_IP4 173 * entries. The corresponding logical index for ACL_L2 in EXT_FP_POLICY 174 * is from 0 to 99, and the logical index for ACL_IP4 in EXT_FP_POLICY 175 * is from 100 to 4195 instead of 4096 to 8191, 3996 padded ACL_L2 176 * entries in both TCAM and SRAM are not counted. 177 */ 178 STATIC int 179 soc_triumph_tcam_part_index_to_mem_index(int unit, 180 soc_tcam_partition_type_t part, 181 int part_index, 182 soc_mem_t mem, 183 int *mem_index) 184 { 185 soc_tcam_info_t *tcam_info; 186 soc_tcam_partition_t *partitions; 187 188 tcam_info = SOC_CONTROL(unit)->tcam_info; 189 if (tcam_info == NULL) { 190 return SOC_E_INIT; 191 } 192 partitions = tcam_info->partitions; 193 194 if (part_index >= partitions[part].num_entries) { 195 return SOC_E_PARAM; 196 } 197 198 switch (part) { 199 case TCAM_PARTITION_FWD_L2: 200 switch (mem) { 201 /* case EXT_L2_ENTRYm: this view does not support read/write operation */ 202 case EXT_L2_ENTRY_TCAMm: 203 case EXT_L2_ENTRY_DATAm: 204 *mem_index = part_index; 205 break; 206 case EXT_SRC_HIT_BITSm: 207 case EXT_SRC_HIT_BITS_L2m: 208 case EXT_DST_HIT_BITSm: 209 case EXT_DST_HIT_BITS_L2m: 210 *mem_index = part_index / 32; 211 break; 212 default: 213 return SOC_E_PARAM; 214 } 215 break; 216 case TCAM_PARTITION_FWD_IP4: 217 switch (mem) { 218 case EXT_IPV4_DEFIPm: 219 case EXT_IPV4_DEFIP_TCAMm: 220 case EXT_DEFIP_DATAm: 221 case EXT_DEFIP_DATA_IPV4m: 222 *mem_index = part_index; 223 break; 224 case EXT_SRC_HIT_BITS_IPV4m: 225 case EXT_DST_HIT_BITS_IPV4m: 226 *mem_index = part_index / 32; 227 break; 228 case EXT_SRC_HIT_BITSm: 229 case EXT_DST_HIT_BITSm: 230 *mem_index = 231 (partitions[TCAM_PARTITION_FWD_L2].num_entries + 31) / 32 + 232 part_index / 32; 233 break; 234 default: 235 return SOC_E_PARAM; 236 } 237 break; 238 case TCAM_PARTITION_FWD_IP6U: 239 switch (mem) { 240 case EXT_IPV6_64_DEFIPm: 241 case EXT_IPV6_64_DEFIP_TCAMm: 242 case EXT_DEFIP_DATA_IPV6_64m: 243 *mem_index = part_index; 244 break; 245 case EXT_SRC_HIT_BITS_IPV6_64m: 246 case EXT_DST_HIT_BITS_IPV6_64m: 247 *mem_index = part_index / 32; 248 break; 249 case EXT_DEFIP_DATAm: 250 *mem_index = partitions[TCAM_PARTITION_FWD_IP4].num_entries + 251 part_index; 252 break; 253 case EXT_SRC_HIT_BITSm: 254 case EXT_DST_HIT_BITSm: 255 *mem_index = 256 (partitions[TCAM_PARTITION_FWD_L2].num_entries + 31) / 32 + 257 (partitions[TCAM_PARTITION_FWD_IP4].num_entries + 31) / 32 + 258 part_index / 32; 259 break; 260 default: 261 return SOC_E_PARAM; 262 } 263 break; 264 case TCAM_PARTITION_FWD_IP6: 265 switch (mem) { 266 case EXT_IPV6_128_DEFIPm: 267 case EXT_IPV6_128_DEFIP_TCAMm: 268 case EXT_DEFIP_DATA_IPV6_128m: 269 *mem_index = part_index; 270 break; 271 case EXT_SRC_HIT_BITS_IPV6_128m: 272 case EXT_DST_HIT_BITS_IPV6_128m: 273 *mem_index = part_index / 32; 274 break; 275 case EXT_DEFIP_DATAm: 276 *mem_index = partitions[TCAM_PARTITION_FWD_IP4].num_entries + 277 partitions[TCAM_PARTITION_FWD_IP6U].num_entries + 278 part_index; 279 break; 280 case EXT_SRC_HIT_BITSm: 281 case EXT_DST_HIT_BITSm: 282 *mem_index = 283 (partitions[TCAM_PARTITION_FWD_L2].num_entries + 31) / 32 + 284 (partitions[TCAM_PARTITION_FWD_IP4].num_entries + 31) / 32 + 285 (partitions[TCAM_PARTITION_FWD_IP6U].num_entries + 31) / 32 + 286 part_index / 32; 287 break; 288 default: 289 return SOC_E_PARAM; 290 } 291 break; 292 case TCAM_PARTITION_ACL_L2: 293 switch (mem) { 294 case EXT_ACL288_TCAMm: 295 case EXT_ACL288_TCAM_L2m: 296 case EXT_FP_POLICYm: 297 case EXT_FP_POLICY_ACL288_L2m: 298 case EXT_FP_CNTRm: 299 case EXT_FP_CNTR_ACL288_L2m: 300 *mem_index = part_index; 301 break; 302 case EXT_FP_CNTR8m: 303 case EXT_FP_CNTR8_ACL288_L2m: 304 *mem_index = part_index / 8; 305 break; 306 default: 307 return SOC_E_PARAM; 308 } 309 break; 310 case TCAM_PARTITION_ACL_IP4: 311 switch (mem) { 312 case EXT_ACL288_TCAM_IPV4m: 313 case EXT_FP_POLICY_ACL288_IPV4m: 314 case EXT_FP_CNTR_ACL288_IPV4m: 315 *mem_index = part_index; 316 break; 317 case EXT_FP_CNTR8_ACL288_IPV4m: 318 *mem_index = part_index / 8; 319 break; 320 case EXT_ACL288_TCAMm: 321 case EXT_FP_POLICYm: 322 case EXT_FP_CNTRm: 323 *mem_index = partitions[TCAM_PARTITION_ACL_L2].num_entries + 324 part_index; 325 break; 326 case EXT_FP_CNTR8m: 327 *mem_index = 328 (partitions[TCAM_PARTITION_ACL_L2].num_entries + 7) / 8 + 329 part_index / 8; 330 break; 331 default: 332 return SOC_E_PARAM; 333 } 334 break; 335 case TCAM_PARTITION_ACL_IP6S: 336 switch (mem) { 337 case EXT_ACL360_TCAM_DATAm: 338 case EXT_ACL360_TCAM_DATA_IPV6_SHORTm: 339 case EXT_FP_POLICY_ACL360_IPV6_SHORTm: 340 case EXT_FP_CNTR_ACL360_IPV6_SHORTm: 341 *mem_index = part_index; 342 break; 343 case EXT_FP_CNTR8_ACL360_IPV6_SHORTm: 344 *mem_index = part_index / 8; 345 break; 346 case EXT_ACL360_TCAM_MASKm: 347 *mem_index = 0; 348 break; 349 case EXT_FP_POLICYm: 350 case EXT_FP_CNTRm: 351 *mem_index = partitions[TCAM_PARTITION_ACL_L2].num_entries + 352 partitions[TCAM_PARTITION_ACL_IP4].num_entries + 353 part_index; 354 break; 355 case EXT_FP_CNTR8m: 356 *mem_index = 357 (partitions[TCAM_PARTITION_ACL_L2].num_entries + 7) / 8 + 358 (partitions[TCAM_PARTITION_ACL_IP4].num_entries + 7) / 8 + 359 part_index / 8; 360 break; 361 default: 362 return SOC_E_PARAM; 363 } 364 break; 365 case TCAM_PARTITION_ACL_IP6F: 366 switch (mem) { 367 case EXT_ACL432_TCAM_DATAm: 368 case EXT_ACL432_TCAM_DATA_IPV6_LONGm: 369 case EXT_FP_POLICY_ACL432_IPV6_LONGm: 370 case EXT_FP_CNTR_ACL432_IPV6_LONGm: 371 *mem_index = part_index; 372 break; 373 case EXT_FP_CNTR8_ACL432_IPV6_LONGm: 374 *mem_index = part_index / 8; 375 break; 376 case EXT_ACL432_TCAM_MASKm: 377 *mem_index = 0; 378 break; 379 case EXT_FP_POLICYm: 380 case EXT_FP_CNTRm: 381 *mem_index = partitions[TCAM_PARTITION_ACL_L2].num_entries + 382 partitions[TCAM_PARTITION_ACL_IP4].num_entries + 383 partitions[TCAM_PARTITION_ACL_IP6S].num_entries + 384 part_index; 385 break; 386 case EXT_FP_CNTR8m: 387 *mem_index = 388 (partitions[TCAM_PARTITION_ACL_L2].num_entries + 7) / 8 + 389 (partitions[TCAM_PARTITION_ACL_IP4].num_entries + 7) / 8 + 390 (partitions[TCAM_PARTITION_ACL_IP6S].num_entries + 7) / 8 + 391 part_index / 8; 392 break; 393 default: 394 return SOC_E_PARAM; 395 } 396 break; 397 case TCAM_PARTITION_ACL_L2C: 398 switch (mem) { 399 case EXT_ACL144_TCAMm: 400 case EXT_ACL144_TCAM_L2m: 401 case EXT_FP_POLICY_ACL144_L2m: 402 case EXT_FP_CNTR_ACL144_L2m: 403 *mem_index = part_index; 404 break; 405 case EXT_FP_CNTR8_ACL144_L2m: 406 *mem_index = part_index / 8; 407 break; 408 case EXT_FP_POLICYm: 409 case EXT_FP_CNTRm: 410 *mem_index = partitions[TCAM_PARTITION_ACL_L2].num_entries + 411 partitions[TCAM_PARTITION_ACL_IP4].num_entries + 412 partitions[TCAM_PARTITION_ACL_IP6S].num_entries + 413 partitions[TCAM_PARTITION_ACL_IP6F].num_entries + 414 part_index; 415 break; 416 case EXT_FP_CNTR8m: 417 *mem_index = 418 (partitions[TCAM_PARTITION_ACL_L2].num_entries + 7) / 8 + 419 (partitions[TCAM_PARTITION_ACL_IP4].num_entries + 7) / 8 + 420 (partitions[TCAM_PARTITION_ACL_IP6S].num_entries + 7) / 8 + 421 (partitions[TCAM_PARTITION_ACL_IP6F].num_entries + 7) / 8 + 422 part_index / 8; 423 break; 424 default: 425 return SOC_E_PARAM; 426 } 427 break; 428 case TCAM_PARTITION_ACL_IP4C: 429 switch (mem) { 430 case EXT_ACL144_TCAM_IPV4m: 431 case EXT_FP_POLICY_ACL144_IPV4m: 432 case EXT_FP_CNTR_ACL144_IPV4m: 433 *mem_index = part_index; 434 break; 435 case EXT_FP_CNTR8_ACL144_IPV4m: 436 *mem_index = part_index / 8; 437 break; 438 case EXT_ACL144_TCAMm: 439 *mem_index = partitions[TCAM_PARTITION_ACL_L2C].num_entries + 440 part_index; 441 break; 442 case EXT_FP_POLICYm: 443 case EXT_FP_CNTRm: 444 *mem_index = partitions[TCAM_PARTITION_ACL_L2].num_entries + 445 partitions[TCAM_PARTITION_ACL_IP4].num_entries + 446 partitions[TCAM_PARTITION_ACL_IP6S].num_entries + 447 partitions[TCAM_PARTITION_ACL_IP6F].num_entries + 448 partitions[TCAM_PARTITION_ACL_L2C].num_entries + 449 part_index; 450 break; 451 case EXT_FP_CNTR8m: 452 *mem_index = 453 (partitions[TCAM_PARTITION_ACL_L2].num_entries + 7) / 8 + 454 (partitions[TCAM_PARTITION_ACL_IP4].num_entries + 7) / 8 + 455 (partitions[TCAM_PARTITION_ACL_IP6S].num_entries + 7) / 8 + 456 (partitions[TCAM_PARTITION_ACL_IP6F].num_entries + 7) / 8 + 457 (partitions[TCAM_PARTITION_ACL_L2C].num_entries + 7) / 8 + 458 part_index / 8; 459 break; 460 default: 461 return SOC_E_PARAM; 462 } 463 break; 464 case TCAM_PARTITION_ACL_IP6C: 465 switch (mem) { 466 case EXT_ACL144_TCAM_IPV6m: 467 case EXT_FP_POLICY_ACL144_IPV6m: 468 case EXT_FP_CNTR_ACL144_IPV6m: 469 *mem_index = part_index; 470 break; 471 case EXT_FP_CNTR8_ACL144_IPV6m: 472 *mem_index = part_index / 8; 473 break; 474 case EXT_ACL144_TCAMm: 475 *mem_index = partitions[TCAM_PARTITION_ACL_L2C].num_entries + 476 partitions[TCAM_PARTITION_ACL_IP4C].num_entries + 477 part_index; 478 break; 479 case EXT_FP_POLICYm: 480 case EXT_FP_CNTRm: 481 *mem_index = partitions[TCAM_PARTITION_ACL_L2].num_entries + 482 partitions[TCAM_PARTITION_ACL_IP4].num_entries + 483 partitions[TCAM_PARTITION_ACL_IP6S].num_entries + 484 partitions[TCAM_PARTITION_ACL_IP6F].num_entries + 485 partitions[TCAM_PARTITION_ACL_L2C].num_entries + 486 partitions[TCAM_PARTITION_ACL_IP4C].num_entries + 487 part_index; 488 break; 489 case EXT_FP_CNTR8m: 490 *mem_index = 491 (partitions[TCAM_PARTITION_ACL_L2].num_entries + 7) / 8 + 492 (partitions[TCAM_PARTITION_ACL_IP4].num_entries + 7) / 8 + 493 (partitions[TCAM_PARTITION_ACL_IP6S].num_entries + 7) / 8 + 494 (partitions[TCAM_PARTITION_ACL_IP6F].num_entries + 7) / 8 + 495 (partitions[TCAM_PARTITION_ACL_L2C].num_entries + 7) / 8 + 496 (partitions[TCAM_PARTITION_ACL_IP4C].num_entries + 7) / 8 + 497 part_index / 8; 498 break; 499 default: 500 return SOC_E_PARAM; 501 } 502 break; 503 case TCAM_PARTITION_ACL_L2IP4: 504 switch (mem) { 505 case EXT_ACL432_TCAM_DATA_L2_IPV4m: 506 case EXT_FP_POLICY_ACL432_L2_IPV4m: 507 case EXT_FP_CNTR_ACL432_L2_IPV4m: 508 *mem_index = part_index; 509 break; 510 case EXT_FP_CNTR8_ACL432_L2_IPV4m: 511 *mem_index = part_index / 8; 512 break; 513 case EXT_ACL432_TCAM_DATAm: 514 *mem_index = partitions[TCAM_PARTITION_ACL_IP6F].num_entries + 515 part_index; 516 break; 517 case EXT_ACL432_TCAM_MASKm: 518 *mem_index = 0; 519 break; 520 case EXT_FP_POLICYm: 521 case EXT_FP_CNTRm: 522 *mem_index = partitions[TCAM_PARTITION_ACL_L2].num_entries + 523 partitions[TCAM_PARTITION_ACL_IP4].num_entries + 524 partitions[TCAM_PARTITION_ACL_IP6S].num_entries + 525 partitions[TCAM_PARTITION_ACL_IP6F].num_entries + 526 partitions[TCAM_PARTITION_ACL_L2C].num_entries + 527 partitions[TCAM_PARTITION_ACL_IP4C].num_entries + 528 partitions[TCAM_PARTITION_ACL_IP6C].num_entries + 529 part_index; 530 break; 531 case EXT_FP_CNTR8m: 532 *mem_index = 533 (partitions[TCAM_PARTITION_ACL_L2].num_entries + 7) / 8 + 534 (partitions[TCAM_PARTITION_ACL_IP4].num_entries + 7) / 8 + 535 (partitions[TCAM_PARTITION_ACL_IP6S].num_entries + 7) / 8 + 536 (partitions[TCAM_PARTITION_ACL_IP6F].num_entries + 7) / 8 + 537 (partitions[TCAM_PARTITION_ACL_L2C].num_entries + 7) / 8 + 538 (partitions[TCAM_PARTITION_ACL_IP4C].num_entries + 7) / 8 + 539 (partitions[TCAM_PARTITION_ACL_IP6C].num_entries + 7) / 8 + 540 part_index / 8; 541 break; 542 default: 543 return SOC_E_PARAM; 544 } 545 break; 546 case TCAM_PARTITION_ACL_L2IP6: 547 switch (mem) { 548 case EXT_ACL432_TCAM_DATA_L2_IPV6m: 549 case EXT_FP_POLICY_ACL432_L2_IPV6m: 550 case EXT_FP_CNTR_ACL432_L2_IPV6m: 551 *mem_index = part_index; 552 break; 553 case EXT_FP_CNTR8_ACL432_L2_IPV6m: 554 *mem_index = part_index / 8; 555 break; 556 case EXT_ACL432_TCAM_DATAm: 557 *mem_index = partitions[TCAM_PARTITION_ACL_IP6F].num_entries + 558 partitions[TCAM_PARTITION_ACL_L2IP4].num_entries + 559 part_index; 560 break; 561 case EXT_ACL432_TCAM_MASKm: 562 *mem_index = 0; 563 break; 564 case EXT_FP_POLICYm: 565 case EXT_FP_CNTRm: 566 *mem_index = partitions[TCAM_PARTITION_ACL_L2].num_entries + 567 partitions[TCAM_PARTITION_ACL_IP4].num_entries + 568 partitions[TCAM_PARTITION_ACL_IP6S].num_entries + 569 partitions[TCAM_PARTITION_ACL_IP6F].num_entries + 570 partitions[TCAM_PARTITION_ACL_L2C].num_entries + 571 partitions[TCAM_PARTITION_ACL_IP4C].num_entries + 572 partitions[TCAM_PARTITION_ACL_IP6C].num_entries + 573 partitions[TCAM_PARTITION_ACL_L2IP4].num_entries + 574 part_index; 575 break; 576 case EXT_FP_CNTR8m: 577 *mem_index = 578 (partitions[TCAM_PARTITION_ACL_L2].num_entries + 7) / 8 + 579 (partitions[TCAM_PARTITION_ACL_IP4].num_entries + 7) / 8 + 580 (partitions[TCAM_PARTITION_ACL_IP6S].num_entries + 7) / 8 + 581 (partitions[TCAM_PARTITION_ACL_IP6F].num_entries + 7) / 8 + 582 (partitions[TCAM_PARTITION_ACL_L2C].num_entries + 7) / 8 + 583 (partitions[TCAM_PARTITION_ACL_IP4C].num_entries + 7) / 8 + 584 (partitions[TCAM_PARTITION_ACL_IP6C].num_entries + 7) / 8 + 585 (partitions[TCAM_PARTITION_ACL_L2IP4].num_entries + 7) / 8 + 586 part_index / 8; 587 break; 588 default: 589 return SOC_E_PARAM; 590 } 591 break; 592 default: 593 return SOC_E_PARAM; 594 } 595 596 return SOC_E_NONE; 597 } 598 599 /* 600 * Following are a list of memory that may require index translation. 601 * These tables are addressed by the raw TCAM index of its corresponding 602 * TCAM table. 603 * 604 * EXT_SRC_HIT_BITS 605 * EXT_SRC_HIT_BITS_L2 (software view) 606 * EXT_SRC_HIT_BITS_IPV4 (software view) 607 * EXT_SRC_HIT_BITS_IPV6_64 (software view) 608 * EXT_SRC_HIT_BITS_IPV6_128 (software view) 609 * 610 * EXT_DST_HIT_BITS 611 * EXT_DST_HIT_BITS_L2 (software view) 612 * EXT_DST_HIT_BITS_IPV4 (software view) 613 * EXT_DST_HIT_BITS_IPV6_64 (software view) 614 * EXT_DST_HIT_BITS_IPV6_128 (software view) 615 * 616 * EXT_L2_ENTRY (TCAM + SRAM + HBIT combine view, no read/write support) 617 * EXT_L2_ENTRY_TCAM 618 * EXT_L2_ENTRY_DATA 619 * 620 * EXT_IPV4_DEFIP (TCAM + SRAM + HBIT combine view) 621 * EXT_IPV6_64_DEFIP (TCAM + SRAM + HBIT combine view) 622 * EXT_IPV6_128_DEFIP (TCAM + SRAM + HBIT combine view) 623 * 624 * EXT_IPV4_DEFIP_TCAM 625 * EXT_IPV6_64_DEFIP_TCAM 626 * EXT_IPV6_128_DEFIP_TCAM 627 * 628 * EXT_DEFIP_DATA 629 * EXT_DEFIP_DATA_IPV4 (software view) 630 * EXT_DEFIP_DATA_IPV6_64 (software view) 631 * EXT_DEFIP_DATA_IPV6_128 (software view) 632 * 633 * EXT_ACL144_TCAM 634 * EXT_ACL288_TCAM 635 * EXT_ACL360_TCAM_DATA 636 * EXT_ACL360_TCAM_MASK (has only 1 entry) 637 * EXT_ACL432_TCAM_DATA 638 * EXT_ACL432_TCAM_MASK (has only 1 entry) 639 * 640 * EXT_ACL288_TCAM_L2 (software view) 641 * EXT_ACL288_TCAM_IPV4 (software view) 642 * EXT_ACL360_TCAM_DATA_IPV6_SHORT (software view) 643 * EXT_ACL432_TCAM_DATA_IPV6_LONG (software view) 644 * EXT_ACL144_TCAM_L2 (software view) 645 * EXT_ACL144_TCAM_IPV4 (software view) 646 * EXT_ACL144_TCAM_IPV6 (software view) 647 * EXT_ACL432_TCAM_DATA_L2_IPV4 (software view) 648 * EXT_ACL432_TCAM_DATA_L2_IPV6 (software view) 649 * 650 * EXT_FP_POLICY 651 * EXT_FP_POLICY_ACL288_L2 (software view) 652 * EXT_FP_POLICY_ACL288_IPV4 (software view) 653 * EXT_FP_POLICY_ACL360_IPV6_SHORT (software view) 654 * EXT_FP_POLICY_ACL432_IPV6_LONG (software view) 655 * EXT_FP_POLICY_ACL144_L2 (software view) 656 * EXT_FP_POLICY_ACL144_IPV4 (software view) 657 * EXT_FP_POLICY_ACL144_IPV6 (software view) 658 * EXT_FP_POLICY_ACL432_L2_IPV4 (software view) 659 * EXT_FP_POLICY_ACL432_L2_IPV6 (software view) 660 * 661 * EXT_FP_CNTR 662 * EXT_FP_CNTR_ACL288_L2 (software view) 663 * EXT_FP_CNTR_ACL288_IPV4 (software view) 664 * EXT_FP_CNTR_ACL360_IPV6_SHORT (software view) 665 * EXT_FP_CNTR_ACL432_IPV6_LONG (software view) 666 * EXT_FP_CNTR_ACL144_L2 (software view) 667 * EXT_FP_CNTR_ACL144_IPV4 (software view) 668 * EXT_FP_CNTR_ACL144_IPV6 (software view) 669 * EXT_FP_CNTR_ACL432_L2_IPV4 (software view) 670 * EXT_FP_CNTR_ACL432_L2_IPV6 (software view) 671 * 672 * EXT_FP_CNTR8 673 * EXT_FP_CNTR8_ACL288_L2 (software view) 674 * EXT_FP_CNTR8_ACL288_IPV4 (software view) 675 * EXT_FP_CNTR8_ACL360_IPV6_SHORT (software view) 676 * EXT_FP_CNTR8_ACL432_IPV6_LONG (software view) 677 * EXT_FP_CNTR8_ACL144_L2 (software view) 678 * EXT_FP_CNTR8_ACL144_IPV4 (software view) 679 * EXT_FP_CNTR8_ACL144_IPV6 (software view) 680 * EXT_FP_CNTR8_ACL432_L2_IPV4 (software view) 681 * EXT_FP_CNTR8_ACL432_L2_IPV6 (software view) 682 */ 683 684 STATIC int 685 soc_triumph_tcam_mem_index_to_raw_index(int unit, soc_mem_t mem, 686 int mem_index, soc_mem_t *real_mem, 687 int *raw_index) 688 { 689 soc_tcam_info_t *tcam_info; 690 soc_tcam_partition_t *partitions; 691 int part; 692 int entries_per_index; 693 694 /* convert the software invented table to real table */ 695 switch (mem) { 696 case EXT_DEFIP_DATA_IPV4m: 697 case EXT_DEFIP_DATA_IPV6_64m: 698 case EXT_DEFIP_DATA_IPV6_128m: 699 *real_mem = EXT_DEFIP_DATAm; 700 break; 701 case EXT_SRC_HIT_BITS_L2m: 702 case EXT_SRC_HIT_BITS_IPV4m: 703 case EXT_SRC_HIT_BITS_IPV6_64m: 704 case EXT_SRC_HIT_BITS_IPV6_128m: 705 *real_mem = EXT_SRC_HIT_BITSm; 706 break; 707 case EXT_DST_HIT_BITS_L2m: 708 case EXT_DST_HIT_BITS_IPV4m: 709 case EXT_DST_HIT_BITS_IPV6_64m: 710 case EXT_DST_HIT_BITS_IPV6_128m: 711 *real_mem = EXT_DST_HIT_BITSm; 712 break; 713 case EXT_ACL144_TCAM_L2m: 714 case EXT_ACL144_TCAM_IPV4m: 715 case EXT_ACL144_TCAM_IPV6m: 716 *real_mem = EXT_ACL144_TCAMm; 717 break; 718 case EXT_ACL288_TCAM_L2m: 719 case EXT_ACL288_TCAM_IPV4m: 720 *real_mem = EXT_ACL288_TCAMm; 721 break; 722 case EXT_ACL360_TCAM_DATA_IPV6_SHORTm: 723 *real_mem = EXT_ACL360_TCAM_DATAm; 724 break; 725 case EXT_ACL432_TCAM_DATA_IPV6_LONGm: 726 case EXT_ACL432_TCAM_DATA_L2_IPV4m: 727 case EXT_ACL432_TCAM_DATA_L2_IPV6m: 728 *real_mem = EXT_ACL432_TCAM_DATAm; 729 break; 730 case EXT_FP_POLICY_ACL288_L2m: 731 case EXT_FP_POLICY_ACL288_IPV4m: 732 case EXT_FP_POLICY_ACL360_IPV6_SHORTm: 733 case EXT_FP_POLICY_ACL432_IPV6_LONGm: 734 case EXT_FP_POLICY_ACL144_L2m: 735 case EXT_FP_POLICY_ACL144_IPV4m: 736 case EXT_FP_POLICY_ACL144_IPV6m: 737 case EXT_FP_POLICY_ACL432_L2_IPV4m: 738 case EXT_FP_POLICY_ACL432_L2_IPV6m: 739 *real_mem = EXT_FP_POLICYm; 740 break; 741 case EXT_FP_CNTR_ACL288_L2m: 742 case EXT_FP_CNTR_ACL288_IPV4m: 743 case EXT_FP_CNTR_ACL360_IPV6_SHORTm: 744 case EXT_FP_CNTR_ACL432_IPV6_LONGm: 745 case EXT_FP_CNTR_ACL144_L2m: 746 case EXT_FP_CNTR_ACL144_IPV4m: 747 case EXT_FP_CNTR_ACL144_IPV6m: 748 case EXT_FP_CNTR_ACL432_L2_IPV4m: 749 case EXT_FP_CNTR_ACL432_L2_IPV6m: 750 *real_mem = EXT_FP_CNTRm; 751 break; 752 case EXT_FP_CNTR8_ACL288_L2m: 753 case EXT_FP_CNTR8_ACL288_IPV4m: 754 case EXT_FP_CNTR8_ACL360_IPV6_SHORTm: 755 case EXT_FP_CNTR8_ACL432_IPV6_LONGm: 756 case EXT_FP_CNTR8_ACL144_L2m: 757 case EXT_FP_CNTR8_ACL144_IPV4m: 758 case EXT_FP_CNTR8_ACL144_IPV6m: 759 case EXT_FP_CNTR8_ACL432_L2_IPV4m: 760 case EXT_FP_CNTR8_ACL432_L2_IPV6m: 761 *real_mem = EXT_FP_CNTR8m; 762 break; 763 case EXT_L2_ENTRYm: 764 case EXT_L2_ENTRY_TCAMm: 765 case EXT_L2_ENTRY_DATAm: 766 case EXT_IPV4_DEFIPm: 767 case EXT_IPV4_DEFIP_TCAMm: 768 case EXT_IPV6_64_DEFIPm: 769 case EXT_IPV6_64_DEFIP_TCAMm: 770 case EXT_IPV6_64_TCAMm: 771 case EXT_IPV6_128_DEFIPm: 772 case EXT_IPV6_128_DEFIP_TCAMm: 773 case EXT_DEFIP_DATAm: 774 case EXT_SRC_HIT_BITSm: 775 case EXT_DST_HIT_BITSm: 776 case EXT_ACL144_TCAMm: 777 case EXT_ACL288_TCAMm: 778 case EXT_ACL360_TCAM_DATAm: 779 case EXT_ACL432_TCAM_DATAm: 780 case EXT_FP_POLICYm: 781 case EXT_FP_CNTRm: 782 case EXT_FP_CNTR8m: 783 *real_mem = mem; 784 break; 785 default: 786 *real_mem = mem; 787 *raw_index = mem_index; 788 return SOC_E_NONE; 789 } 790 791 tcam_info = SOC_CONTROL(unit)->tcam_info; 792 if (tcam_info == NULL) { 793 return SOC_E_INIT; 794 } 795 partitions = tcam_info->partitions; 796 part = TCAM_PARTITION_RAW; 797 entries_per_index = 1; 798 799 if (*real_mem == EXT_SRC_HIT_BITSm || *real_mem == EXT_DST_HIT_BITSm) { 800 entries_per_index = 32; 801 } else if (*real_mem == EXT_FP_CNTR8m) { 802 entries_per_index = 8; 803 } 804 805 /* find partition and calculate logical index within partition */ 806 switch (mem) { 807 case EXT_L2_ENTRYm: 808 case EXT_L2_ENTRY_TCAMm: 809 case EXT_L2_ENTRY_DATAm: 810 case EXT_SRC_HIT_BITS_L2m: 811 case EXT_DST_HIT_BITS_L2m: 812 part = TCAM_PARTITION_FWD_L2; 813 break; 814 case EXT_IPV4_DEFIPm: 815 case EXT_IPV4_DEFIP_TCAMm: 816 case EXT_DEFIP_DATA_IPV4m: 817 case EXT_SRC_HIT_BITS_IPV4m: 818 case EXT_DST_HIT_BITS_IPV4m: 819 part = TCAM_PARTITION_FWD_IP4; 820 break; 821 case EXT_IPV6_64_DEFIPm: 822 case EXT_IPV6_64_DEFIP_TCAMm: 823 case EXT_DEFIP_DATA_IPV6_64m: 824 case EXT_SRC_HIT_BITS_IPV6_64m: 825 case EXT_DST_HIT_BITS_IPV6_64m: 826 part = TCAM_PARTITION_FWD_IP6U; 827 break; 828 case EXT_IPV6_128_DEFIPm: 829 case EXT_IPV6_128_DEFIP_TCAMm: 830 case EXT_DEFIP_DATA_IPV6_128m: 831 case EXT_SRC_HIT_BITS_IPV6_128m: 832 case EXT_DST_HIT_BITS_IPV6_128m: 833 part = TCAM_PARTITION_FWD_IP6; 834 break; 835 case EXT_DEFIP_DATAm: 836 for (part = TCAM_PARTITION_FWD_IP4; part < TCAM_PARTITION_FWD_IP6; 837 part++) { 838 if (mem_index < partitions[part].num_entries) { 839 break; 840 } 841 mem_index -= partitions[part].num_entries; 842 } 843 break; 844 case EXT_SRC_HIT_BITSm: 845 case EXT_DST_HIT_BITSm: 846 for (part = TCAM_PARTITION_FWD_L2; part < TCAM_PARTITION_FWD_IP6; 847 part++) { 848 if (mem_index < (partitions[part].num_entries + 31) / 32) { 849 break; 850 } 851 mem_index -= (partitions[part].num_entries + 31) / 32; 852 } 853 break; 854 case EXT_ACL144_TCAMm: 855 if (mem_index < partitions[TCAM_PARTITION_ACL_L2C].num_entries) { 856 part = TCAM_PARTITION_ACL_L2C; 857 break; 858 } 859 mem_index -= partitions[TCAM_PARTITION_ACL_L2C].num_entries; 860 if (mem_index < partitions[TCAM_PARTITION_ACL_IP4C].num_entries) { 861 part = TCAM_PARTITION_ACL_IP4C; 862 break; 863 } 864 mem_index -= partitions[TCAM_PARTITION_ACL_IP4C].num_entries; 865 part = TCAM_PARTITION_ACL_IP6C; 866 break; 867 case EXT_ACL288_TCAMm: 868 if (mem_index < partitions[TCAM_PARTITION_ACL_L2].num_entries) { 869 part = TCAM_PARTITION_ACL_L2; 870 break; 871 } 872 mem_index -= partitions[TCAM_PARTITION_ACL_L2].num_entries; 873 part = TCAM_PARTITION_ACL_IP4; 874 break; 875 case EXT_ACL360_TCAM_DATAm: 876 part = TCAM_PARTITION_ACL_IP6S; 877 break; 878 case EXT_ACL432_TCAM_DATAm: 879 if (mem_index < partitions[TCAM_PARTITION_ACL_IP6F].num_entries) { 880 part = TCAM_PARTITION_ACL_IP6F; 881 break; 882 } 883 mem_index -= partitions[TCAM_PARTITION_ACL_IP6F].num_entries; 884 if (mem_index < partitions[TCAM_PARTITION_ACL_L2IP4].num_entries) { 885 part = TCAM_PARTITION_ACL_L2IP4; 886 break; 887 } 888 mem_index -= partitions[TCAM_PARTITION_ACL_L2IP4].num_entries; 889 part = TCAM_PARTITION_ACL_L2IP6; 890 break; 891 case EXT_FP_POLICYm: 892 case EXT_FP_CNTRm: 893 for (part = TCAM_PARTITION_ACL_L2; part < TCAM_PARTITION_ACL_L2IP6; 894 part++) { 895 if (mem_index < partitions[part].num_entries) { 896 break; 897 } 898 mem_index -= partitions[part].num_entries; 899 } 900 break; 901 case EXT_FP_CNTR8m: 902 for (part = TCAM_PARTITION_ACL_L2; part < TCAM_PARTITION_ACL_L2IP6; 903 part++) { 904 if (mem_index < (partitions[part].num_entries + 7) / 8) { 905 break; 906 } 907 mem_index -= (partitions[part].num_entries + 7) / 8; 908 } 909 break; 910 case EXT_ACL288_TCAM_L2m: 911 case EXT_FP_POLICY_ACL288_L2m: 912 case EXT_FP_CNTR_ACL288_L2m: 913 case EXT_FP_CNTR8_ACL288_L2m: 914 part = TCAM_PARTITION_ACL_L2; 915 break; 916 case EXT_ACL288_TCAM_IPV4m: 917 case EXT_FP_POLICY_ACL288_IPV4m: 918 case EXT_FP_CNTR_ACL288_IPV4m: 919 case EXT_FP_CNTR8_ACL288_IPV4m: 920 part = TCAM_PARTITION_ACL_IP4; 921 break; 922 case EXT_ACL360_TCAM_DATA_IPV6_SHORTm: 923 case EXT_FP_POLICY_ACL360_IPV6_SHORTm: 924 case EXT_FP_CNTR_ACL360_IPV6_SHORTm: 925 case EXT_FP_CNTR8_ACL360_IPV6_SHORTm: 926 part = TCAM_PARTITION_ACL_IP6S; 927 break; 928 case EXT_ACL432_TCAM_DATA_IPV6_LONGm: 929 case EXT_FP_POLICY_ACL432_IPV6_LONGm: 930 case EXT_FP_CNTR_ACL432_IPV6_LONGm: 931 case EXT_FP_CNTR8_ACL432_IPV6_LONGm: 932 part = TCAM_PARTITION_ACL_IP6F; 933 break; 934 case EXT_ACL144_TCAM_L2m: 935 case EXT_FP_POLICY_ACL144_L2m: 936 case EXT_FP_CNTR_ACL144_L2m: 937 case EXT_FP_CNTR8_ACL144_L2m: 938 part = TCAM_PARTITION_ACL_L2C; 939 break; 940 case EXT_ACL144_TCAM_IPV4m: 941 case EXT_FP_POLICY_ACL144_IPV4m: 942 case EXT_FP_CNTR_ACL144_IPV4m: 943 case EXT_FP_CNTR8_ACL144_IPV4m: 944 part = TCAM_PARTITION_ACL_IP4C; 945 break; 946 case EXT_ACL144_TCAM_IPV6m: 947 case EXT_FP_POLICY_ACL144_IPV6m: 948 case EXT_FP_CNTR_ACL144_IPV6m: 949 case EXT_FP_CNTR8_ACL144_IPV6m: 950 part = TCAM_PARTITION_ACL_IP6C; 951 break; 952 case EXT_ACL432_TCAM_DATA_L2_IPV4m: 953 case EXT_FP_POLICY_ACL432_L2_IPV4m: 954 case EXT_FP_CNTR_ACL432_L2_IPV4m: 955 case EXT_FP_CNTR8_ACL432_L2_IPV4m: 956 part = TCAM_PARTITION_ACL_L2IP4; 957 break; 958 case EXT_ACL432_TCAM_DATA_L2_IPV6m: 959 case EXT_FP_POLICY_ACL432_L2_IPV6m: 960 case EXT_FP_CNTR_ACL432_L2_IPV6m: 961 case EXT_FP_CNTR8_ACL432_L2_IPV6m: 962 part = TCAM_PARTITION_ACL_L2IP6; 963 break; 964 default: 965 return SOC_E_INTERNAL; 966 } 967 968 *raw_index = partitions[part].tcam_base + 969 (mem_index * entries_per_index << partitions[part].tcam_width_shift); 970 971 return SOC_E_NONE; 972 } 973 #endif 974 975 #ifdef BCM_TRIUMPH3_SUPPORT 976 STATIC int 977 soc_triumph3_tcam_part_index_to_mem_index(int unit, 978 soc_tcam_partition_type_t part, 979 int part_index, 980 soc_mem_t mem, 981 int *mem_index) 982 { 983 soc_tcam_info_t *tcam_info; 984 soc_tcam_partition_t *partitions; 985 986 tcam_info = SOC_CONTROL(unit)->tcam_info; 987 if (tcam_info == NULL) { 988 return SOC_E_INIT; 989 } 990 partitions = tcam_info->partitions; 991 992 if (part_index >= partitions[part].num_entries) { 993 return SOC_E_PARAM; 994 } 995 996 997 998 999 switch (part) { 1000 case TCAM_PARTITION_FWD_L2: 1001 switch (mem) { 1002 case EXT_L2_ENTRY_TCAMm: 1003 case EXT_L2_ENTRY_DATAm: 1004 case EXT_L2_ENTRY_DATA_ONLYm: 1005 case EXT_L2_ENTRY_DATA_ONLY_WIDEm: 1006 case EXT_L2_ENTRY_1m: 1007 case EXT_L2_ENTRY_2m: 1008 *mem_index = part_index; 1009 break; 1010 case EXT_SRC_HIT_BITSm: 1011 case EXT_SRC_HIT_BITS_L2m: 1012 case EXT_DST_HIT_BITSm: 1013 case EXT_DST_HIT_BITS_L2m: 1014 case EXT_LOC_SRC_HBITSm: 1015 #ifdef sw_view 1016 case EXT_LOC_SRC_HIT_BITS_L2m: 1017 #endif 1018 *mem_index = part_index / 32; 1019 break; 1020 default: 1021 return SOC_E_PARAM; 1022 } 1023 break; 1024 /* for now all IP entries share the same partition */ 1025 case TCAM_PARTITION_FWD_IP4: 1026 switch (mem) { 1027 case EXT_IPV4_DEFIPm: 1028 #if 0 /* not there for tr3 */ 1029 case EXT_IPV4_DEFIP_TCAMm: 1030 #endif 1031 case EXT_DEFIP_DATAm: 1032 case EXT_DEFIP_DATA_IPV4m: 1033 /* need aliases for V4 and V6es here */ 1034 case EXT_L3_UCAST_DATAm: 1035 case EXT_L3_UCAST_DATA_WIDEm: 1036 case EXT_IPV4_TCAMm: 1037 case EXT_IPV4_UCASTm: 1038 case EXT_IPV4_UCAST_WIDEm: 1039 *mem_index = part_index; 1040 break; 1041 case EXT_SRC_HIT_BITS_IPV4m: 1042 case EXT_DST_HIT_BITS_IPV4m: 1043 *mem_index = part_index / 32; 1044 break; 1045 case EXT_SRC_HIT_BITSm: 1046 case EXT_DST_HIT_BITSm: 1047 *mem_index = 1048 (partitions[TCAM_PARTITION_FWD_L2].num_entries + 31) / 32 + 1049 part_index / 32; 1050 break; 1051 default: 1052 return SOC_E_PARAM; 1053 } 1054 break; 1055 case TCAM_PARTITION_FWD_IP6U: 1056 switch (mem) { 1057 case EXT_IPV6_64_DEFIPm: 1058 case EXT_IPV6_64_TCAMm: 1059 case EXT_DEFIP_DATA_IPV6_64m: 1060 *mem_index = part_index; 1061 break; 1062 case EXT_SRC_HIT_BITS_IPV6_64m: 1063 case EXT_DST_HIT_BITS_IPV6_64m: 1064 *mem_index = part_index / 32; 1065 break; 1066 case EXT_DEFIP_DATAm: 1067 *mem_index = partitions[TCAM_PARTITION_FWD_IP4].num_entries + 1068 part_index; 1069 break; 1070 case EXT_SRC_HIT_BITSm: 1071 case EXT_DST_HIT_BITSm: 1072 *mem_index = 1073 (partitions[TCAM_PARTITION_FWD_L2].num_entries + 31) / 32 + 1074 (partitions[TCAM_PARTITION_FWD_IP4].num_entries + 31) / 32 + 1075 part_index / 32; 1076 break; 1077 default: 1078 return SOC_E_PARAM; 1079 } 1080 break; 1081 case TCAM_PARTITION_FWD_IP6: 1082 switch (mem) { 1083 case EXT_IPV6_128_DEFIPm: 1084 #if 0 1085 case EXT_IPV6_128_DEFIP_TCAMm: 1086 #endif 1087 case EXT_IPV6_128_TCAMm: 1088 case EXT_DEFIP_DATA_IPV6_128m: 1089 *mem_index = part_index; 1090 break; 1091 case EXT_SRC_HIT_BITS_IPV6_128m: 1092 case EXT_DST_HIT_BITS_IPV6_128m: 1093 *mem_index = part_index / 32; 1094 break; 1095 case EXT_DEFIP_DATAm: 1096 case EXT_L3_UCAST_DATAm: 1097 case EXT_L3_UCAST_DATA_WIDEm: 1098 case EXT_IPV6_128_UCASTm: 1099 case EXT_IPV6_128_UCAST_WIDEm: 1100 *mem_index = partitions[TCAM_PARTITION_FWD_IP4].num_entries + 1101 partitions[TCAM_PARTITION_FWD_IP6U].num_entries + 1102 part_index; 1103 break; 1104 case EXT_SRC_HIT_BITSm: 1105 case EXT_DST_HIT_BITSm: 1106 *mem_index = 1107 (partitions[TCAM_PARTITION_FWD_L2].num_entries + 31) / 32 + 1108 (partitions[TCAM_PARTITION_FWD_IP4].num_entries + 31) / 32 + 1109 (partitions[TCAM_PARTITION_FWD_IP6U].num_entries + 31) / 32 + 1110 part_index / 32; 1111 break; 1112 default: 1113 return SOC_E_PARAM; 1114 } 1115 break; 1116 case TCAM_PARTITION_ACL_L2: 1117 switch (mem) { 1118 case EXT_ACL320_TCAMm: 1119 #ifdef sw_view 1120 case EXT_ACL320_TCAM_L2m: 1121 #endif 1122 case EXT_FP_POLICY_1Xm: 1123 case EXT_FP_POLICY_2Xm: 1124 case EXT_FP_POLICY_3Xm: 1125 case EXT_FP_POLICY_4Xm: 1126 case EXT_FP_POLICY_6Xm: 1127 #ifdef sw_view 1128 case EXT_FP_POLICY_ACL320_L2m: 1129 #endif 1130 *mem_index = part_index; 1131 break; 1132 default: 1133 return SOC_E_PARAM; 1134 } 1135 break; 1136 case TCAM_PARTITION_ACL_IP4: 1137 switch (mem) { 1138 #ifdef sw_view 1139 case EXT_ACL320_TCAM_IPV4m: 1140 case EXT_FP_POLICY_ACL320_IPV4m: 1141 *mem_index = part_index; 1142 break; 1143 #endif 1144 case EXT_ACL320_TCAMm: 1145 case EXT_FP_POLICY_1Xm: 1146 case EXT_FP_POLICY_2Xm: 1147 case EXT_FP_POLICY_3Xm: 1148 case EXT_FP_POLICY_4Xm: 1149 case EXT_FP_POLICY_6Xm: 1150 #if 0 1151 case EXT_FP_CNTRm: 1152 #endif 1153 *mem_index = partitions[TCAM_PARTITION_ACL_L2].num_entries + 1154 part_index; 1155 break; 1156 #if 0 1157 case EXT_FP_CNTR8m: 1158 *mem_index = 1159 (partitions[TCAM_PARTITION_ACL_L2].num_entries + 7) / 8 + 1160 part_index / 8; 1161 break; 1162 1163 1164 1165 1166 #endif 1167 default: 1168 return SOC_E_PARAM; 1169 } 1170 break; 1171 case TCAM_PARTITION_ACL_IP6S: 1172 switch (mem) { 1173 case EXT_ACL480_TCAM_DATAm: 1174 #ifdef sw_view 1175 case EXT_ACL480_TCAM_DATA_IPV6_SHORTm: 1176 case EXT_FP_POLICY_ACL480_IPV6_SHORTm: 1177 #endif 1178 *mem_index = part_index; 1179 break; 1180 case EXT_ACL480_TCAM_MASKm: 1181 *mem_index = 0; 1182 break; 1183 case EXT_FP_POLICY_1Xm: 1184 case EXT_FP_POLICY_2Xm: 1185 case EXT_FP_POLICY_3Xm: 1186 case EXT_FP_POLICY_4Xm: 1187 case EXT_FP_POLICY_6Xm: 1188 #if 0 1189 case EXT_FP_CNTRm: 1190 *mem_index = partitions[TCAM_PARTITION_ACL_L2].num_entries + 1191 partitions[TCAM_PARTITION_ACL_IP4].num_entries + 1192 part_index; 1193 break; 1194 case EXT_FP_CNTR8m: 1195 *mem_index = 1196 (partitions[TCAM_PARTITION_ACL_L2].num_entries + 7) / 8 + 1197 (partitions[TCAM_PARTITION_ACL_IP4].num_entries + 7) / 8 + 1198 part_index / 8; 1199 break; 1200 #endif 1201 default: 1202 return SOC_E_PARAM; 1203 } 1204 break; 1205 case TCAM_PARTITION_ACL_IP6F: 1206 switch (mem) { 1207 case EXT_ACL480_TCAM_DATAm: 1208 #ifdef sw_view 1209 case EXT_ACL480_TCAM_DATA_IPV6_LONGm: 1210 case EXT_FP_POLICY_ACL480_IPV6_LONGm: 1211 #endif 1212 *mem_index = part_index; 1213 break; 1214 case EXT_ACL480_TCAM_MASKm: 1215 *mem_index = 0; 1216 break; 1217 case EXT_FP_POLICY_1Xm: 1218 case EXT_FP_POLICY_2Xm: 1219 case EXT_FP_POLICY_3Xm: 1220 case EXT_FP_POLICY_4Xm: 1221 case EXT_FP_POLICY_6Xm: 1222 1223 *mem_index = partitions[TCAM_PARTITION_ACL_L2].num_entries + 1224 partitions[TCAM_PARTITION_ACL_IP4].num_entries + 1225 partitions[TCAM_PARTITION_ACL_IP6S].num_entries + 1226 part_index; 1227 break; 1228 default: 1229 return SOC_E_PARAM; 1230 } 1231 break; 1232 case TCAM_PARTITION_ACL_L2C: 1233 switch (mem) { 1234 case EXT_ACL160_TCAMm: 1235 #ifdef sw_view 1236 case EXT_ACL160_TCAM_L2m: 1237 case EXT_FP_POLICY_ACL160_L2m: 1238 case EXT_FP_CNTR_ACL160_L2m: 1239 #endif 1240 *mem_index = part_index; 1241 break; 1242 case EXT_FP_POLICY_1Xm: 1243 case EXT_FP_POLICY_2Xm: 1244 case EXT_FP_POLICY_3Xm: 1245 case EXT_FP_POLICY_4Xm: 1246 case EXT_FP_POLICY_6Xm: 1247 *mem_index = partitions[TCAM_PARTITION_ACL_L2].num_entries + 1248 partitions[TCAM_PARTITION_ACL_IP4].num_entries + 1249 partitions[TCAM_PARTITION_ACL_IP6S].num_entries + 1250 partitions[TCAM_PARTITION_ACL_IP6F].num_entries + 1251 part_index; 1252 break; 1253 default: 1254 return SOC_E_PARAM; 1255 } 1256 break; 1257 case TCAM_PARTITION_ACL_IP4C: 1258 switch (mem) { 1259 #ifdef sw_view 1260 case EXT_ACL160_TCAM_IPV4m: 1261 case EXT_FP_POLICY_ACL160_IPV4m: 1262 *mem_index = part_index; 1263 break; 1264 #endif 1265 case EXT_ACL160_TCAMm: 1266 *mem_index = partitions[TCAM_PARTITION_ACL_L2C].num_entries + 1267 part_index; 1268 break; 1269 case EXT_FP_POLICY_1Xm: 1270 case EXT_FP_POLICY_2Xm: 1271 case EXT_FP_POLICY_3Xm: 1272 case EXT_FP_POLICY_4Xm: 1273 case EXT_FP_POLICY_6Xm: 1274 *mem_index = partitions[TCAM_PARTITION_ACL_L2].num_entries + 1275 partitions[TCAM_PARTITION_ACL_IP4].num_entries + 1276 partitions[TCAM_PARTITION_ACL_IP6S].num_entries + 1277 partitions[TCAM_PARTITION_ACL_IP6F].num_entries + 1278 partitions[TCAM_PARTITION_ACL_L2C].num_entries + 1279 part_index; 1280 break; 1281 default: 1282 return SOC_E_PARAM; 1283 } 1284 break; 1285 case TCAM_PARTITION_ACL_IP6C: 1286 switch (mem) { 1287 #ifdef sw_view 1288 case EXT_ACL160_TCAM_IPV6m: 1289 case EXT_FP_POLICY_ACL160_IPV6m: 1290 *mem_index = part_index; 1291 break; 1292 #endif 1293 case EXT_ACL160_TCAMm: 1294 *mem_index = partitions[TCAM_PARTITION_ACL_L2C].num_entries + 1295 partitions[TCAM_PARTITION_ACL_IP4C].num_entries + 1296 part_index; 1297 break; 1298 case EXT_FP_POLICY_1Xm: 1299 case EXT_FP_POLICY_2Xm: 1300 case EXT_FP_POLICY_3Xm: 1301 case EXT_FP_POLICY_4Xm: 1302 case EXT_FP_POLICY_6Xm: 1303 *mem_index = partitions[TCAM_PARTITION_ACL_L2].num_entries + 1304 partitions[TCAM_PARTITION_ACL_IP4].num_entries + 1305 partitions[TCAM_PARTITION_ACL_IP6S].num_entries + 1306 partitions[TCAM_PARTITION_ACL_IP6F].num_entries + 1307 partitions[TCAM_PARTITION_ACL_L2C].num_entries + 1308 partitions[TCAM_PARTITION_ACL_IP4C].num_entries + 1309 part_index; 1310 break; 1311 default: 1312 return SOC_E_PARAM; 1313 } 1314 break; 1315 case TCAM_PARTITION_ACL_L2IP4: 1316 switch (mem) { 1317 #ifdef sw_view 1318 case EXT_ACL480_TCAM_DATA_L2_IPV4m: 1319 case EXT_FP_POLICY_ACL480_L2_IPV4m: 1320 *mem_index = part_index; 1321 break; 1322 #endif 1323 case EXT_ACL480_TCAM_DATAm: 1324 *mem_index = partitions[TCAM_PARTITION_ACL_IP6F].num_entries + 1325 part_index; 1326 break; 1327 case EXT_ACL480_TCAM_MASKm: 1328 *mem_index = 0; 1329 break; 1330 case EXT_FP_POLICY_1Xm: 1331 case EXT_FP_POLICY_2Xm: 1332 case EXT_FP_POLICY_3Xm: 1333 case EXT_FP_POLICY_4Xm: 1334 case EXT_FP_POLICY_6Xm: 1335 *mem_index = partitions[TCAM_PARTITION_ACL_L2].num_entries + 1336 partitions[TCAM_PARTITION_ACL_IP4].num_entries + 1337 partitions[TCAM_PARTITION_ACL_IP6S].num_entries + 1338 partitions[TCAM_PARTITION_ACL_IP6F].num_entries + 1339 partitions[TCAM_PARTITION_ACL_L2C].num_entries + 1340 partitions[TCAM_PARTITION_ACL_IP4C].num_entries + 1341 partitions[TCAM_PARTITION_ACL_IP6C].num_entries + 1342 part_index; 1343 break; 1344 default: 1345 return SOC_E_PARAM; 1346 } 1347 break; 1348 case TCAM_PARTITION_ACL_L2IP6: 1349 switch (mem) { 1350 #ifdef sw_view 1351 case EXT_ACL480_TCAM_DATA_L2_IPV6m: 1352 case EXT_FP_POLICY_ACL432_L2_IPV6m: 1353 *mem_index = part_index; 1354 break; 1355 #endif 1356 case EXT_ACL480_TCAM_DATAm: 1357 *mem_index = partitions[TCAM_PARTITION_ACL_IP6F].num_entries + 1358 partitions[TCAM_PARTITION_ACL_L2IP4].num_entries + 1359 part_index; 1360 break; 1361 case EXT_ACL480_TCAM_MASKm: 1362 *mem_index = 0; 1363 break; 1364 case EXT_FP_POLICY_1Xm: 1365 case EXT_FP_POLICY_2Xm: 1366 case EXT_FP_POLICY_3Xm: 1367 case EXT_FP_POLICY_4Xm: 1368 case EXT_FP_POLICY_6Xm: 1369 *mem_index = partitions[TCAM_PARTITION_ACL_L2].num_entries + 1370 partitions[TCAM_PARTITION_ACL_IP4].num_entries + 1371 partitions[TCAM_PARTITION_ACL_IP6S].num_entries + 1372 partitions[TCAM_PARTITION_ACL_IP6F].num_entries + 1373 partitions[TCAM_PARTITION_ACL_L2C].num_entries + 1374 partitions[TCAM_PARTITION_ACL_IP4C].num_entries + 1375 partitions[TCAM_PARTITION_ACL_IP6C].num_entries + 1376 partitions[TCAM_PARTITION_ACL_L2IP4].num_entries + 1377 part_index; 1378 break; 1379 default: 1380 return SOC_E_PARAM; 1381 } 1382 break; 1383 default: 1384 return SOC_E_PARAM; 1385 } 1386 1387 return SOC_E_NONE; 1388 } 1389 1390 #define QT 1 1391 1392 STATIC int 1393 soc_triumph3_tcam_mem_index_to_raw_index(int unit, soc_mem_t mem, 1394 int mem_index, soc_mem_t *real_mem, 1395 int *raw_index) 1396 { 1397 soc_tcam_info_t *tcam_info; 1398 soc_tcam_partition_t *partitions; 1399 int part; 1400 int entries_per_index=0; 1401 int tcam_base_override=0; 1402 1403 /* convert the software invented table to real table */ 1404 switch (mem) { 1405 case EXT_L2_ENTRY_TCAM_WIDEm: 1406 *real_mem = EXT_L2_ENTRY_TCAMm; 1407 break; 1408 case EXT_DEFIP_DATA_IPV4m: 1409 case EXT_DEFIP_DATA_IPV6_64m: 1410 case EXT_DEFIP_DATA_IPV6_128m: 1411 *real_mem = EXT_DEFIP_DATAm; 1412 break; 1413 case EXT_L3_UCAST_DATA_IPV4m: 1414 case EXT_L3_UCAST_DATA_IPV6_128m: 1415 *real_mem = EXT_L3_UCAST_DATAm; 1416 break; 1417 case EXT_L3_UCAST_DATA_WIDE_IPV4m: 1418 case EXT_L3_UCAST_DATA_WIDE_IPV6_128m: 1419 *real_mem = EXT_L3_UCAST_DATA_WIDEm; 1420 break; 1421 case EXT_SRC_HIT_BITS_IPV6_128_UCASTm: 1422 case EXT_SRC_HIT_BITS_IPV6_128_UCAST_WIDEm: 1423 /* coverity[unterminated_case] */ 1424 case EXT_SRC_HIT_BITS_IPV6_128m: 1425 entries_per_index = 64; 1426 case EXT_SRC_HIT_BITS_L2m: 1427 case EXT_SRC_HIT_BITS_L2_WIDEm: 1428 case EXT_SRC_HIT_BITS_IPV4_UCASTm: 1429 case EXT_SRC_HIT_BITS_IPV4_UCAST_WIDEm: 1430 case EXT_SRC_HIT_BITS_IPV4m: 1431 case EXT_SRC_HIT_BITS_IPV6_64m: 1432 *real_mem = EXT_SRC_HBITSm; 1433 break; 1434 case EXT_DST_HIT_BITS_IPV6_128_UCASTm: 1435 case EXT_DST_HIT_BITS_IPV6_128_UCAST_WIDEm: 1436 /* coverity[unterminated_case] */ 1437 case EXT_DST_HIT_BITS_IPV6_128m: 1438 entries_per_index = 64; 1439 case EXT_DST_HIT_BITS_L2m: 1440 case EXT_DST_HIT_BITS_L2_WIDEm: 1441 case EXT_DST_HIT_BITS_IPV4_UCASTm: 1442 case EXT_DST_HIT_BITS_IPV4_UCAST_WIDEm: 1443 case EXT_DST_HIT_BITS_IPV4m: 1444 case EXT_DST_HIT_BITS_IPV6_64m: 1445 *real_mem = EXT_DST_HBITSm; 1446 break; 1447 case EXT_LOC_SRC_HIT_BITS_L2m: 1448 case EXT_LOC_SRC_HIT_BITS_L2_WIDEm: 1449 *real_mem = EXT_LOC_SRC_HBITSm; 1450 break; 1451 case EXT_ACL144_TCAM_L2m: 1452 case EXT_ACL144_TCAM_IPV4m: 1453 case EXT_ACL144_TCAM_IPV6m: 1454 *real_mem = EXT_ACL160_TCAMm; 1455 break; 1456 case EXT_ACL288_TCAM_L2m: 1457 case EXT_ACL288_TCAM_IPV4m: 1458 case EXT_ACL432_TCAM_DATA_L2_IPV4m: 1459 *real_mem = EXT_ACL320_TCAMm; 1460 break; 1461 case EXT_ACL360_TCAM_DATA_IPV6_SHORTm: 1462 case EXT_ACL432_TCAM_DATA_IPV6_LONGm: 1463 case EXT_ACL432_TCAM_DATA_L2_IPV6m: 1464 *real_mem = EXT_ACL480_TCAM_DATAm; 1465 break; 1466 case EXT_FP_POLICY_ACL288_L2_1Xm: 1467 case EXT_FP_POLICY_ACL288_IPV4_1Xm: 1468 case EXT_FP_POLICY_ACL360_IPV6_SHORT_1Xm: 1469 case EXT_FP_POLICY_ACL432_IPV6_LONG_1Xm: 1470 case EXT_FP_POLICY_ACL144_L2_1Xm: 1471 case EXT_FP_POLICY_ACL144_IPV4_1Xm: 1472 case EXT_FP_POLICY_ACL144_IPV6_1Xm: 1473 case EXT_FP_POLICY_ACL432_L2_IPV4_1Xm: 1474 case EXT_FP_POLICY_ACL432_L2_IPV6_1Xm: 1475 case EXT_ACL480_FP_POLICY_1Xm: 1476 case EXT_ACL320_FP_POLICY_1Xm: 1477 case EXT_ACL160_FP_POLICY_1Xm: 1478 case EXT_ACL80_FP_POLICY_1Xm: 1479 *real_mem = EXT_FP_POLICY_1Xm; 1480 break; 1481 case EXT_FP_POLICY_ACL288_L2_2Xm: 1482 case EXT_FP_POLICY_ACL288_IPV4_2Xm: 1483 case EXT_FP_POLICY_ACL360_IPV6_SHORT_2Xm: 1484 case EXT_FP_POLICY_ACL432_IPV6_LONG_2Xm: 1485 case EXT_FP_POLICY_ACL144_L2_2Xm: 1486 case EXT_FP_POLICY_ACL144_IPV4_2Xm: 1487 case EXT_FP_POLICY_ACL144_IPV6_2Xm: 1488 case EXT_FP_POLICY_ACL432_L2_IPV4_2Xm: 1489 case EXT_FP_POLICY_ACL432_L2_IPV6_2Xm: 1490 case EXT_ACL480_FP_POLICY_2Xm: 1491 case EXT_ACL320_FP_POLICY_2Xm: 1492 case EXT_ACL160_FP_POLICY_2Xm: 1493 case EXT_ACL80_FP_POLICY_2Xm: 1494 *real_mem = EXT_FP_POLICY_2Xm; 1495 break; 1496 case EXT_FP_POLICY_ACL288_L2_3Xm: 1497 case EXT_FP_POLICY_ACL288_IPV4_3Xm: 1498 case EXT_FP_POLICY_ACL360_IPV6_SHORT_3Xm: 1499 case EXT_FP_POLICY_ACL432_IPV6_LONG_3Xm: 1500 case EXT_FP_POLICY_ACL144_L2_3Xm: 1501 case EXT_FP_POLICY_ACL144_IPV4_3Xm: 1502 case EXT_FP_POLICY_ACL144_IPV6_3Xm: 1503 case EXT_FP_POLICY_ACL432_L2_IPV4_3Xm: 1504 case EXT_FP_POLICY_ACL432_L2_IPV6_3Xm: 1505 case EXT_ACL480_FP_POLICY_3Xm: 1506 case EXT_ACL320_FP_POLICY_3Xm: 1507 case EXT_ACL160_FP_POLICY_3Xm: 1508 case EXT_ACL80_FP_POLICY_3Xm: 1509 *real_mem = EXT_FP_POLICY_3Xm; 1510 break; 1511 case EXT_FP_POLICY_ACL288_L2_4Xm: 1512 case EXT_FP_POLICY_ACL288_IPV4_4Xm: 1513 case EXT_FP_POLICY_ACL360_IPV6_SHORT_4Xm: 1514 case EXT_FP_POLICY_ACL432_IPV6_LONG_4Xm: 1515 case EXT_FP_POLICY_ACL144_L2_4Xm: 1516 case EXT_FP_POLICY_ACL144_IPV4_4Xm: 1517 case EXT_FP_POLICY_ACL144_IPV6_4Xm: 1518 case EXT_FP_POLICY_ACL432_L2_IPV4_4Xm: 1519 case EXT_FP_POLICY_ACL432_L2_IPV6_4Xm: 1520 case EXT_ACL480_FP_POLICY_4Xm: 1521 case EXT_ACL320_FP_POLICY_4Xm: 1522 case EXT_ACL160_FP_POLICY_4Xm: 1523 case EXT_ACL80_FP_POLICY_4Xm: 1524 *real_mem = EXT_FP_POLICY_4Xm; 1525 break; 1526 case EXT_FP_POLICY_ACL288_L2_6Xm: 1527 case EXT_FP_POLICY_ACL288_IPV4_6Xm: 1528 case EXT_FP_POLICY_ACL360_IPV6_SHORT_6Xm: 1529 case EXT_FP_POLICY_ACL432_IPV6_LONG_6Xm: 1530 case EXT_FP_POLICY_ACL144_L2_6Xm: 1531 case EXT_FP_POLICY_ACL144_IPV4_6Xm: 1532 case EXT_FP_POLICY_ACL144_IPV6_6Xm: 1533 case EXT_FP_POLICY_ACL432_L2_IPV4_6Xm: 1534 case EXT_FP_POLICY_ACL432_L2_IPV6_6Xm: 1535 case EXT_ACL480_FP_POLICY_6Xm: 1536 case EXT_ACL320_FP_POLICY_6Xm: 1537 case EXT_ACL160_FP_POLICY_6Xm: 1538 case EXT_ACL80_FP_POLICY_6Xm: 1539 *real_mem = EXT_FP_POLICY_6Xm; 1540 break; 1541 case EXT_TCAM_VBIT_L2_ENTRY_1m: 1542 case EXT_TCAM_VBIT_L2_ENTRY_2m: 1543 case EXT_TCAM_VBIT_DEFIP_IPV4m: 1544 case EXT_TCAM_VBIT_DEFIP_IPV6_64m: 1545 case EXT_TCAM_VBIT_DEFIP_IPV6_128m: 1546 case EXT_TCAM_VBIT_IPV4_UCASTm: 1547 case EXT_TCAM_VBIT_IPV4_UCAST_WIDEm: 1548 case EXT_TCAM_VBIT_IPV6_128_UCASTm: 1549 case EXT_TCAM_VBIT_IPV6_128_UCAST_WIDEm: 1550 case EXT_TCAM_VBIT_ACL480m: 1551 case EXT_TCAM_VBIT_ACL320m: 1552 case EXT_TCAM_VBIT_ACL160m: 1553 case EXT_TCAM_VBIT_ACL80m: 1554 *real_mem = EXT_TCAM_VBITm; 1555 break; 1556 case EXT_IPV4_DEFIP_TCAMm: 1557 case EXT_IPV4_UCAST_TCAMm: 1558 case EXT_IPV4_UCAST_WIDE_TCAMm: 1559 *real_mem = EXT_IPV4_TCAMm; 1560 break; 1561 case EXT_IPV6_64_DEFIP_TCAMm: 1562 *real_mem = EXT_IPV6_64_TCAMm; 1563 break; 1564 case EXT_IPV6_128_DEFIP_TCAMm: 1565 case EXT_IPV6_128_UCAST_TCAMm: 1566 case EXT_IPV6_128_UCAST_WIDE_TCAMm: 1567 *real_mem = EXT_IPV6_128_TCAMm; 1568 break; 1569 1570 case EXT_L2_ENTRY_TCAMm: 1571 case EXT_L2_ENTRY_DATA_ONLYm: 1572 case EXT_L2_ENTRY_DATA_ONLY_WIDEm: 1573 case EXT_L2_ENTRY_1m: 1574 case EXT_L2_ENTRY_2m: 1575 case EXT_IPV4_DEFIPm: 1576 case EXT_IPV4_TCAMm: 1577 case EXT_IPV4_UCASTm: 1578 case EXT_IPV4_UCAST_WIDEm: 1579 case EXT_IPV6_64_DEFIPm: 1580 case EXT_IPV6_64_TCAMm: 1581 case EXT_IPV6_128_DEFIPm: 1582 case EXT_IPV6_128_UCASTm: 1583 case EXT_IPV6_128_UCAST_WIDEm: 1584 case EXT_IPV6_128_TCAMm: 1585 case EXT_DEFIP_DATAm: 1586 case EXT_L3_UCAST_DATAm: 1587 case EXT_L3_UCAST_DATA_WIDEm: 1588 case EXT_SRC_HBITSm: 1589 case EXT_DST_HBITSm: 1590 case EXT_LOC_SRC_HBITSm: 1591 case EXT_ACL80_TCAMm: 1592 case EXT_ACL160_TCAMm: 1593 case EXT_ACL320_TCAMm: 1594 case EXT_ACL480_TCAM_MASKm: 1595 case EXT_ACL480_TCAM_DATAm: 1596 case EXT_FP_POLICY_1Xm: 1597 case EXT_FP_POLICY_2Xm: 1598 case EXT_FP_POLICY_3Xm: 1599 case EXT_FP_POLICY_4Xm: 1600 case EXT_FP_POLICY_6Xm: 1601 1602 *real_mem = mem; 1603 break; 1604 1605 case EXT_ACL432_TCAM_MASKm: 1606 case EXT_ACL360_TCAM_MASKm: 1607 case EXT_ACL360_TCAM_MASK_IPV6_SHORTm: 1608 case EXT_ACL432_TCAM_MASK_IPV6_LONGm: 1609 case EXT_ACL432_TCAM_MASK_L2_IPV6m: 1610 *real_mem = EXT_ACL480_TCAM_MASKm; 1611 *raw_index = 0; 1612 return SOC_E_NONE; 1613 1614 default: 1615 *real_mem = mem; 1616 *raw_index = mem_index; 1617 return SOC_E_NONE; 1618 } 1619 1620 tcam_info = SOC_CONTROL(unit)->tcam_info; 1621 if (tcam_info == NULL) { 1622 /* special case for debug:*/ 1623 if (mem == *real_mem) { 1624 return SOC_E_NONE; 1625 } 1626 return SOC_E_INIT; 1627 } 1628 partitions = tcam_info->partitions; 1629 part = TCAM_PARTITION_RAW; 1630 if (entries_per_index == 0) { 1631 entries_per_index = 1; 1632 1633 switch (*real_mem) { 1634 case EXT_SRC_HBITSm: 1635 case EXT_DST_HBITSm: 1636 case EXT_LOC_SRC_HBITSm: 1637 case EXT_TCAM_VBITm: 1638 case EXT_TCAM_VBIT_L2_ENTRY_1m: 1639 case EXT_TCAM_VBIT_L2_ENTRY_2m: 1640 case EXT_TCAM_VBIT_IPV4_UCASTm: 1641 case EXT_TCAM_VBIT_IPV4_UCAST_WIDEm: 1642 case EXT_TCAM_VBIT_DEFIP_IPV6_64m: 1643 case EXT_TCAM_VBIT_ACL80m: 1644 entries_per_index = 32; 1645 break; 1646 case EXT_TCAM_VBIT_IPV6_128_UCASTm: 1647 case EXT_TCAM_VBIT_IPV6_128_UCAST_WIDEm: 1648 case EXT_TCAM_VBIT_DEFIP_IPV6_128m: 1649 case EXT_TCAM_VBIT_ACL160m: 1650 entries_per_index = 64; 1651 break; 1652 case EXT_TCAM_VBIT_ACL320m: 1653 entries_per_index = 128; 1654 break; 1655 case EXT_TCAM_VBIT_ACL480m: 1656 entries_per_index = 256; 1657 break; 1658 default: 1659 break; 1660 } 1661 } 1662 1663 /* find partition and calculate logical index within partition */ 1664 switch (mem) { 1665 case EXT_IPV4_UCASTm: 1666 case EXT_IPV4_UCAST_TCAMm: 1667 case EXT_L3_UCAST_DATA_IPV4m: 1668 case EXT_SRC_HIT_BITS_IPV4_UCASTm: 1669 case EXT_DST_HIT_BITS_IPV4_UCASTm: 1670 case EXT_TCAM_VBIT_IPV4_UCASTm: 1671 part = TCAM_PARTITION_FWD_IP4_UCAST; 1672 break; 1673 case EXT_IPV4_UCAST_WIDEm: 1674 case EXT_IPV4_UCAST_WIDE_TCAMm: 1675 case EXT_L3_UCAST_DATA_WIDE_IPV4m: 1676 case EXT_SRC_HIT_BITS_IPV4_UCAST_WIDEm: 1677 case EXT_DST_HIT_BITS_IPV4_UCAST_WIDEm: 1678 case EXT_TCAM_VBIT_IPV4_UCAST_WIDEm: 1679 part = TCAM_PARTITION_FWD_IP4_UCAST_WIDE; 1680 break; 1681 case EXT_IPV4_DEFIPm: 1682 case EXT_IPV4_DEFIP_TCAMm: 1683 part = TCAM_PARTITION_FWD_IP4; 1684 break; 1685 case EXT_IPV6_128_UCASTm: 1686 case EXT_IPV6_128_UCAST_TCAMm: 1687 case EXT_L3_UCAST_DATA_IPV6_128m: 1688 case EXT_SRC_HIT_BITS_IPV6_128_UCASTm: 1689 case EXT_DST_HIT_BITS_IPV6_128_UCASTm: 1690 case EXT_TCAM_VBIT_IPV6_128_UCASTm: 1691 part = TCAM_PARTITION_FWD_IP6_128_UCAST; 1692 break; 1693 case EXT_IPV6_128_UCAST_WIDEm: 1694 case EXT_IPV6_128_UCAST_WIDE_TCAMm: 1695 case EXT_L3_UCAST_DATA_WIDE_IPV6_128m: 1696 case EXT_SRC_HIT_BITS_IPV6_128_UCAST_WIDEm: 1697 case EXT_DST_HIT_BITS_IPV6_128_UCAST_WIDEm: 1698 case EXT_TCAM_VBIT_IPV6_128_UCAST_WIDEm: 1699 part = TCAM_PARTITION_FWD_IP6_128_UCAST_WIDE; 1700 break; 1701 case EXT_L3_UCAST_DATAm: 1702 part = TCAM_PARTITION_FWD_IP4_UCAST; 1703 if (mem_index < partitions[part].num_entries) { 1704 break; 1705 } 1706 mem_index -= partitions[part].num_entries; 1707 part = TCAM_PARTITION_FWD_IP6_128_UCAST; 1708 break; 1709 case EXT_L3_UCAST_DATA_WIDEm: 1710 part = TCAM_PARTITION_FWD_IP4_UCAST_WIDE; 1711 if (mem_index < partitions[part].num_entries) { 1712 break; 1713 } 1714 mem_index -= partitions[part].num_entries; 1715 part = TCAM_PARTITION_FWD_IP6_128_UCAST_WIDE; 1716 break; 1717 case EXT_L2_ENTRY_1m: 1718 case EXT_L2_ENTRY_TCAMm: 1719 case EXT_L2_ENTRY_DATA_ONLYm: 1720 case EXT_SRC_HIT_BITS_L2m: 1721 case EXT_DST_HIT_BITS_L2m: 1722 case EXT_LOC_SRC_HIT_BITS_L2m: 1723 case EXT_TCAM_VBIT_L2_ENTRY_1m: 1724 part = TCAM_PARTITION_FWD_L2; 1725 break; 1726 case EXT_L2_ENTRY_2m: 1727 case EXT_L2_ENTRY_TCAM_WIDEm: 1728 case EXT_L2_ENTRY_DATA_ONLY_WIDEm: 1729 case EXT_SRC_HIT_BITS_L2_WIDEm: 1730 case EXT_DST_HIT_BITS_L2_WIDEm: 1731 case EXT_LOC_SRC_HIT_BITS_L2_WIDEm: 1732 case EXT_TCAM_VBIT_L2_ENTRY_2m: 1733 part = TCAM_PARTITION_FWD_L2_WIDE; 1734 break; 1735 case EXT_DEFIP_DATA_IPV4m: 1736 case EXT_SRC_HIT_BITS_IPV4m: 1737 case EXT_DST_HIT_BITS_IPV4m: 1738 case EXT_TCAM_VBIT_DEFIP_IPV4m: 1739 part = TCAM_PARTITION_FWD_IP4; 1740 break; 1741 case EXT_IPV6_64_DEFIPm: 1742 case EXT_IPV6_64_DEFIP_TCAMm: 1743 case EXT_IPV6_64_TCAMm: 1744 case EXT_DEFIP_DATA_IPV6_64m: 1745 case EXT_SRC_HIT_BITS_IPV6_64m: 1746 case EXT_DST_HIT_BITS_IPV6_64m: 1747 case EXT_TCAM_VBIT_DEFIP_IPV6_64m: 1748 part = TCAM_PARTITION_FWD_IP6U; 1749 break; 1750 case EXT_IPV6_128_DEFIPm: 1751 case EXT_IPV6_128_DEFIP_TCAMm: 1752 case EXT_DEFIP_DATA_IPV6_128m: 1753 case EXT_SRC_HIT_BITS_IPV6_128m: 1754 case EXT_DST_HIT_BITS_IPV6_128m: 1755 case EXT_TCAM_VBIT_DEFIP_IPV6_128m: 1756 part = TCAM_PARTITION_FWD_IP6; 1757 break; 1758 case EXT_DEFIP_DATAm: 1759 part = TCAM_PARTITION_FWD_IP4; 1760 if (mem_index < partitions[part].num_entries) { 1761 break; 1762 } 1763 mem_index -= partitions[part].num_entries; 1764 part = TCAM_PARTITION_FWD_IP6U; 1765 if (mem_index < partitions[part].num_entries) { 1766 break; 1767 } 1768 mem_index -= partitions[part].num_entries; 1769 part = TCAM_PARTITION_FWD_IP6; 1770 break; 1771 case EXT_LOC_SRC_HBITSm: 1772 if (mem_index < partitions[TCAM_PARTITION_FWD_L2].num_entries) { 1773 part = TCAM_PARTITION_FWD_L2; 1774 } else { 1775 mem_index -= (partitions[TCAM_PARTITION_FWD_L2].num_entries+31)/32; 1776 part = TCAM_PARTITION_FWD_L2_WIDE; 1777 } 1778 break; 1779 case EXT_SRC_HBITSm: 1780 case EXT_DST_HBITSm: 1781 for (part = TCAM_PARTITION_FWD_L2; part < TCAM_PARTITION_FWD_IP6; 1782 part++) { 1783 if (mem_index < (partitions[part].num_entries + 31) / 32) { 1784 break; 1785 } 1786 mem_index -= (partitions[part].num_entries + 31) / 32; 1787 } 1788 break; 1789 case EXT_IPV4_TCAMm: 1790 for (part = TCAM_PARTITION_FWD_IP4_UCAST; part < TCAM_PARTITION_FWD_IP4; 1791 part++) { 1792 if (mem_index < partitions[part].num_entries) { 1793 break; 1794 } 1795 mem_index -= partitions[part].num_entries; 1796 } 1797 break; 1798 case EXT_IPV6_128_TCAMm: 1799 for (part = TCAM_PARTITION_FWD_IP6_128_UCAST; 1800 part < TCAM_PARTITION_FWD_IP6; part++) { 1801 if (mem_index < partitions[part].num_entries) { 1802 break; 1803 } 1804 mem_index -= partitions[part].num_entries; 1805 } 1806 break; 1807 case EXT_ACL480_TCAM_MASKm: 1808 case EXT_ACL480_TCAM_DATAm: 1809 part = TCAM_PARTITION_ACL480; 1810 break; 1811 /* coverity[dead_error_begin : FALSE] */ 1812 case EXT_ACL144_TCAMm: 1813 if (mem_index < partitions[TCAM_PARTITION_ACL_L2C].num_entries) { 1814 part = TCAM_PARTITION_ACL_L2C; 1815 break; 1816 } 1817 mem_index -= partitions[TCAM_PARTITION_ACL_L2C].num_entries; 1818 if (mem_index < partitions[TCAM_PARTITION_ACL_IP4C].num_entries) { 1819 part = TCAM_PARTITION_ACL_IP4C; 1820 break; 1821 } 1822 mem_index -= partitions[TCAM_PARTITION_ACL_IP4C].num_entries; 1823 part = TCAM_PARTITION_ACL_IP6C; 1824 break; 1825 /* coverity[dead_error_begin : FALSE] */ 1826 case EXT_ACL288_TCAMm: 1827 if (mem_index < partitions[TCAM_PARTITION_ACL_L2].num_entries) { 1828 part = TCAM_PARTITION_ACL_L2; 1829 break; 1830 } 1831 mem_index -= partitions[TCAM_PARTITION_ACL_L2].num_entries; 1832 part = TCAM_PARTITION_ACL_IP4; 1833 break; 1834 /* coverity[dead_error_begin : FALSE] */ 1835 case EXT_ACL360_TCAM_DATAm: 1836 part = TCAM_PARTITION_ACL_IP6S; 1837 break; 1838 /* coverity[dead_error_begin : FALSE] */ 1839 case EXT_ACL432_TCAM_DATAm: 1840 if (mem_index < partitions[TCAM_PARTITION_ACL_IP6F].num_entries) { 1841 part = TCAM_PARTITION_ACL_IP6F; 1842 break; 1843 } 1844 mem_index -= partitions[TCAM_PARTITION_ACL_IP6F].num_entries; 1845 if (mem_index < partitions[TCAM_PARTITION_ACL_L2IP4].num_entries) { 1846 part = TCAM_PARTITION_ACL_L2IP4; 1847 break; 1848 } 1849 mem_index -= partitions[TCAM_PARTITION_ACL_L2IP4].num_entries; 1850 part = TCAM_PARTITION_ACL_L2IP6; 1851 break; 1852 case EXT_ACL480_FP_POLICY_1Xm: 1853 case EXT_ACL480_FP_POLICY_2Xm: 1854 case EXT_ACL480_FP_POLICY_3Xm: 1855 case EXT_ACL480_FP_POLICY_4Xm: 1856 case EXT_ACL480_FP_POLICY_6Xm: 1857 part = TCAM_PARTITION_ACL480; 1858 break; 1859 case EXT_ACL320_FP_POLICY_1Xm: 1860 case EXT_ACL320_FP_POLICY_2Xm: 1861 case EXT_ACL320_FP_POLICY_3Xm: 1862 case EXT_ACL320_FP_POLICY_4Xm: 1863 case EXT_ACL320_FP_POLICY_6Xm: 1864 case EXT_ACL320_TCAMm: 1865 part = TCAM_PARTITION_ACL320; 1866 break; 1867 case EXT_ACL160_FP_POLICY_1Xm: 1868 case EXT_ACL160_FP_POLICY_2Xm: 1869 case EXT_ACL160_FP_POLICY_3Xm: 1870 case EXT_ACL160_FP_POLICY_4Xm: 1871 case EXT_ACL160_FP_POLICY_6Xm: 1872 case EXT_ACL160_TCAMm: 1873 part = TCAM_PARTITION_ACL160; 1874 break; 1875 case EXT_ACL80_FP_POLICY_1Xm: 1876 case EXT_ACL80_FP_POLICY_2Xm: 1877 case EXT_ACL80_FP_POLICY_3Xm: 1878 case EXT_ACL80_FP_POLICY_4Xm: 1879 case EXT_ACL80_FP_POLICY_6Xm: 1880 case EXT_ACL80_TCAMm: 1881 part = TCAM_PARTITION_ACL80; 1882 break; 1883 case EXT_FP_POLICY_1Xm: 1884 case EXT_FP_POLICY_2Xm: 1885 case EXT_FP_POLICY_3Xm: 1886 case EXT_FP_POLICY_4Xm: 1887 case EXT_FP_POLICY_6Xm: 1888 #if 1 1889 for (part = TCAM_PARTITION_ACL80; part <= TCAM_PARTITION_ACL480; part++) 1890 { 1891 if (mem_index < partitions[part].num_entries) { 1892 break; 1893 } 1894 mem_index -= partitions[part].num_entries; 1895 } 1896 #else 1897 part = TCAM_PARTITION_ACL480; 1898 #endif 1899 break; 1900 case EXT_ACL288_TCAM_L2m: 1901 case EXT_FP_POLICY_ACL288_L2_1Xm: 1902 case EXT_FP_POLICY_ACL288_L2_2Xm: 1903 case EXT_FP_POLICY_ACL288_L2_3Xm: 1904 case EXT_FP_POLICY_ACL288_L2_4Xm: 1905 case EXT_FP_POLICY_ACL288_L2_6Xm: 1906 part = TCAM_PARTITION_ACL_L2; 1907 break; 1908 case EXT_ACL288_TCAM_IPV4m: 1909 case EXT_FP_POLICY_ACL288_IPV4_1Xm: 1910 case EXT_FP_POLICY_ACL288_IPV4_2Xm: 1911 case EXT_FP_POLICY_ACL288_IPV4_3Xm: 1912 case EXT_FP_POLICY_ACL288_IPV4_4Xm: 1913 case EXT_FP_POLICY_ACL288_IPV4_6Xm: 1914 part = TCAM_PARTITION_ACL_IP4; 1915 break; 1916 case EXT_ACL360_TCAM_DATA_IPV6_SHORTm: 1917 case EXT_FP_POLICY_ACL360_IPV6_SHORT_1Xm: 1918 case EXT_FP_POLICY_ACL360_IPV6_SHORT_2Xm: 1919 case EXT_FP_POLICY_ACL360_IPV6_SHORT_3Xm: 1920 case EXT_FP_POLICY_ACL360_IPV6_SHORT_4Xm: 1921 case EXT_FP_POLICY_ACL360_IPV6_SHORT_6Xm: 1922 part = TCAM_PARTITION_ACL_IP6S; 1923 break; 1924 case EXT_ACL432_TCAM_DATA_IPV6_LONGm: 1925 case EXT_FP_POLICY_ACL432_IPV6_LONG_1Xm: 1926 case EXT_FP_POLICY_ACL432_IPV6_LONG_2Xm: 1927 case EXT_FP_POLICY_ACL432_IPV6_LONG_3Xm: 1928 case EXT_FP_POLICY_ACL432_IPV6_LONG_4Xm: 1929 case EXT_FP_POLICY_ACL432_IPV6_LONG_6Xm: 1930 part = TCAM_PARTITION_ACL_IP6F; 1931 break; 1932 case EXT_ACL144_TCAM_L2m: 1933 case EXT_FP_POLICY_ACL144_L2_1Xm: 1934 case EXT_FP_POLICY_ACL144_L2_2Xm: 1935 case EXT_FP_POLICY_ACL144_L2_3Xm: 1936 case EXT_FP_POLICY_ACL144_L2_4Xm: 1937 case EXT_FP_POLICY_ACL144_L2_6Xm: 1938 part = TCAM_PARTITION_ACL_L2C; 1939 break; 1940 case EXT_ACL144_TCAM_IPV4m: 1941 case EXT_FP_POLICY_ACL144_IPV4_1Xm: 1942 case EXT_FP_POLICY_ACL144_IPV4_2Xm: 1943 case EXT_FP_POLICY_ACL144_IPV4_3Xm: 1944 case EXT_FP_POLICY_ACL144_IPV4_4Xm: 1945 case EXT_FP_POLICY_ACL144_IPV4_6Xm: 1946 part = TCAM_PARTITION_ACL_IP4C; 1947 break; 1948 case EXT_ACL144_TCAM_IPV6m: 1949 case EXT_FP_POLICY_ACL144_IPV6_1Xm: 1950 case EXT_FP_POLICY_ACL144_IPV6_2Xm: 1951 case EXT_FP_POLICY_ACL144_IPV6_3Xm: 1952 case EXT_FP_POLICY_ACL144_IPV6_4Xm: 1953 case EXT_FP_POLICY_ACL144_IPV6_6Xm: 1954 part = TCAM_PARTITION_ACL_IP6C; 1955 break; 1956 case EXT_ACL432_TCAM_DATA_L2_IPV4m: 1957 case EXT_FP_POLICY_ACL432_L2_IPV4_1Xm: 1958 case EXT_FP_POLICY_ACL432_L2_IPV4_2Xm: 1959 case EXT_FP_POLICY_ACL432_L2_IPV4_3Xm: 1960 case EXT_FP_POLICY_ACL432_L2_IPV4_4Xm: 1961 case EXT_FP_POLICY_ACL432_L2_IPV4_6Xm: 1962 part = TCAM_PARTITION_ACL_L2IP4; 1963 break; 1964 case EXT_ACL432_TCAM_DATA_L2_IPV6m: 1965 case EXT_FP_POLICY_ACL432_L2_IPV6_1Xm: 1966 case EXT_FP_POLICY_ACL432_L2_IPV6_2Xm: 1967 case EXT_FP_POLICY_ACL432_L2_IPV6_3Xm: 1968 case EXT_FP_POLICY_ACL432_L2_IPV6_4Xm: 1969 case EXT_FP_POLICY_ACL432_L2_IPV6_6Xm: 1970 part = TCAM_PARTITION_ACL_L2IP6; 1971 break; 1972 default: 1973 return SOC_E_INTERNAL; 1974 } 1975 1976 #ifdef QT 1977 /* coverity[dead_error_line] */ 1978 *raw_index = (tcam_base_override ? tcam_base_override : 1979 partitions[part].tcam_base) + 1980 (mem_index * entries_per_index << 1981 partitions[part].tcam_width_shift); 1982 #else 1983 *raw_index = partitions[part].tcam_base + 1984 (mem_index * entries_per_index << partitions[part].tcam_width_shift); 1985 #endif 1986 1987 return SOC_E_NONE; 1988 } 1989 1990 /* currently needed only for ext_l2_entry_1 an ext_l2_entry_2 */ 1991 int 1992 soc_triumph3_tcam_raw_index_to_mem_index(int unit, int raw_index, 1993 soc_mem_t *mem, int *mem_index) 1994 { 1995 /* EXT_l2_ENTRY_1 is always first memory */ 1996 if (raw_index <= soc_mem_index_max(unit, EXT_L2_ENTRY_1m)) { 1997 *mem = EXT_L2_ENTRY_1m; 1998 *mem_index = raw_index; 1999 return SOC_E_NONE; 2000 } 2001 raw_index -= soc_mem_index_count(unit, EXT_L2_ENTRY_1m); 2002 if (raw_index <= soc_mem_index_max(unit, EXT_L2_ENTRY_2m)) { 2003 *mem = EXT_L2_ENTRY_2m; 2004 *mem_index = raw_index; 2005 return SOC_E_NONE; 2006 } 2007 /* no other memories supported for now */ 2008 return SOC_E_FAIL; 2009 } 2010 #endif /* BCM_TRIUMPH3_SUPPORT */ 2011 2012 int 2013 soc_tcam_init(int unit) 2014 { 2015 #ifdef BCM_TRIUMPH_SUPPORT 2016 if (soc_feature(unit, soc_feature_esm_support)) { 2017 return soc_triumph_tcam_init(unit); 2018 } 2019 #endif 2020 return SOC_E_UNAVAIL; 2021 } 2022 2023 int 2024 soc_tcam_read_entry(int unit, int part, int index, uint32 *mask, uint32 *data, 2025 int *valid) 2026 { 2027 #ifdef BCM_TRIUMPH_SUPPORT 2028 if (soc_feature(unit, soc_feature_esm_support)) { 2029 return soc_triumph_tcam_read_entry(unit, part, index, mask, data, 2030 valid); 2031 } 2032 #endif 2033 return SOC_E_UNAVAIL; 2034 } 2035 2036 int 2037 soc_tcam_write_entry(int unit, int part, int index, uint32 *mask, uint32 *data) 2038 { 2039 #ifdef BCM_TRIUMPH_SUPPORT 2040 if (soc_feature(unit, soc_feature_esm_support)) { 2041 return soc_triumph_tcam_write_entry(unit, part, index, mask, data); 2042 } 2043 #endif 2044 return SOC_E_UNAVAIL; 2045 } 2046 2047 int 2048 soc_tcam_set_valid(int unit, int part, int index, int valid) 2049 { 2050 #ifdef BCM_TRIUMPH_SUPPORT 2051 if (soc_feature(unit, soc_feature_esm_support)) { 2052 return SOC_E_NONE; 2053 } 2054 #endif 2055 return SOC_E_UNAVAIL; 2056 } 2057 2058 int 2059 soc_tcam_search_entry(int unit, int part1, int part2, uint32 *data, 2060 int *index1, int *index2) 2061 { 2062 #ifdef BCM_TRIUMPH_SUPPORT 2063 if (soc_feature(unit, soc_feature_esm_support)) { 2064 return soc_triumph_tcam_search_entry(unit, part1, part2, data, index1, 2065 index2); 2066 } 2067 #endif 2068 return SOC_E_UNAVAIL; 2069 } 2070 2071 int 2072 soc_tcam_write_ib(int unit, uint32 addr, uint32 data) 2073 { 2074 return SOC_E_UNAVAIL; 2075 } 2076 2077 int 2078 soc_tcam_write_ima(int unit, uint32 addr, uint32 d0_msb, uint32 d1_lsb) 2079 { 2080 return SOC_E_UNAVAIL; 2081 } 2082 2083 int 2084 soc_tcam_read_ima(int unit, uint32 addr, uint32 *d0_msb, uint32 *d1_lsb) 2085 { 2086 return SOC_E_UNAVAIL; 2087 } 2088 2089 int 2090 soc_tcam_write_dbreg(int unit, uint32 addr, uint32 d0_msb, uint32 d1, 2091 uint32 d2_lsb) 2092 { 2093 #ifdef BCM_TRIUMPH_SUPPORT 2094 if (soc_feature(unit, soc_feature_esm_support)) { 2095 return soc_triumph_tcam_write_reg(unit, addr, d0_msb, d1, d2_lsb); 2096 } 2097 #endif 2098 return SOC_E_UNAVAIL; 2099 } 2100 2101 int 2102 soc_tcam_read_dbreg(int unit, uint32 addr, uint32 *d0_msb, uint32 *d1, 2103 uint32 *d2_lsb) 2104 { 2105 #ifdef BCM_TRIUMPH_SUPPORT 2106 if (soc_feature(unit, soc_feature_esm_support)) { 2107 return soc_triumph_tcam_read_reg(unit, addr, d0_msb, d1, d2_lsb); 2108 } 2109 #endif 2110 return SOC_E_UNAVAIL; 2111 } 2112 2113 int 2114 soc_tcam_get_info(int unit, int *type, int *subtype, int *dc_val, 2115 soc_tcam_info_t **tcam_info) 2116 { 2117 #ifdef BCM_TRIUMPH_SUPPORT 2118 if (soc_feature(unit, soc_feature_esm_support)) { 2119 return soc_triumph_tcam_get_info(unit, type, subtype, dc_val, 2120 tcam_info); 2121 } 2122 #endif 2123 return SOC_E_UNAVAIL; 2124 } 2125 2126 int 2127 soc_tcam_get_part_size(int unit, soc_tcam_partition_type_t part, 2128 int *num_entries, int *num_entries_include_pad) 2129 { 2130 #if defined(BCM_TRIUMPH_SUPPORT) 2131 if (soc_feature(unit, soc_feature_esm_support)) { 2132 soc_tcam_partition_t *partitions; 2133 2134 partitions = 2135 ((soc_tcam_info_t *)SOC_CONTROL(unit)->tcam_info)->partitions; 2136 2137 if (part < TCAM_PARTITION_RAW || part >= TCAM_PARTITION_COUNT) { 2138 return SOC_E_PARAM; 2139 } 2140 if (num_entries != NULL) { 2141 *num_entries = partitions[part].num_entries; 2142 } 2143 if (num_entries_include_pad != NULL) { 2144 *num_entries_include_pad = 2145 partitions[part].num_entries_include_pad; 2146 } 2147 return SOC_E_NONE; 2148 } 2149 #endif 2150 return SOC_E_UNAVAIL; 2151 } 2152 2153 int 2154 soc_tcam_part_index_to_mem_index(int unit, soc_tcam_partition_type_t part, 2155 int part_index, soc_mem_t mem, int *mem_index) 2156 { 2157 #ifdef BCM_TRIUMPH_SUPPORT 2158 if (soc_feature(unit, soc_feature_esm_support)) { 2159 #ifdef BCM_TRIUMPH3_SUPPORT 2160 if (SOC_IS_TRIUMPH3(unit)) { 2161 return soc_triumph3_tcam_part_index_to_mem_index(unit, part, part_index, 2162 mem, mem_index); 2163 } 2164 #endif 2165 return soc_triumph_tcam_part_index_to_mem_index(unit, part, part_index, 2166 mem, mem_index); 2167 } 2168 #endif 2169 return SOC_E_UNAVAIL; 2170 } 2171 2172 int 2173 soc_tcam_mem_index_to_raw_index(int unit, soc_mem_t mem, int mem_index, 2174 soc_mem_t *real_mem, int *raw_index) 2175 { 2176 #ifdef BCM_TRIUMPH_SUPPORT 2177 if (soc_feature(unit, soc_feature_esm_support)) { 2178 #ifdef BCM_TRIUMPH3_SUPPORT 2179 if (SOC_IS_TRIUMPH3(unit)) { 2180 return soc_triumph3_tcam_mem_index_to_raw_index(unit, mem, mem_index, 2181 real_mem, raw_index); 2182 } 2183 #endif 2184 return soc_triumph_tcam_mem_index_to_raw_index(unit, mem, mem_index, 2185 real_mem, raw_index); 2186 } 2187 #endif 2188 return SOC_E_UNAVAIL; 2189 } 2190 2191 /* Given an external tcam index, map the raw index to an esm memory.*/ 2192 int 2193 soc_tcam_raw_index_to_mem_index(int unit, int raw_index, soc_mem_t *mem, 2194 int *mem_index) 2195 { 2196 #ifdef BCM_TRIUMPH_SUPPORT 2197 if (soc_feature(unit, soc_feature_esm_support)) { 2198 #ifdef BCM_TRIUMPH3_SUPPORT 2199 if (SOC_IS_TRIUMPH3(unit)) { 2200 return soc_triumph3_tcam_raw_index_to_mem_index(unit, raw_index, 2201 mem, mem_index); 2202 } 2203 #endif 2204 } 2205 #endif 2206 return SOC_E_UNAVAIL; 2207 }