cosq.c (86305B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * MMU/Cosq soc routines 8 */ 9 10 #include <sal/core/libc.h> 11 #include <shared/bsl.h> 12 #include <soc/debug.h> 13 #include <soc/util.h> 14 #include <soc/mem.h> 15 #include <soc/debug.h> 16 17 #if defined(BCM_KATANA2_SUPPORT) 18 #include <soc/katana2.h> 19 20 #if defined(BCM_SABER2_SUPPORT) 21 #include <soc/saber2.h> 22 23 #if defined(BCM_METROLITE_SUPPORT) 24 #include <soc/metrolite.h> 25 #include <bcm_int/esw/subport.h> 26 #include <bcm_int/esw/katana2.h> 27 #endif 28 #endif 29 30 #define _SOC_COE_PORT_TYPE_CASCADED 4 31 #define _SOC_COE_PORT_TYPE_CASCADED_LINKPHY 0 32 #define _SOC_COE_PORT_TYPE_CASCADED_SUBTAG 1 33 34 typedef struct lp_lls_reg_s { 35 soc_reg_t reg; 36 soc_field_t field1; 37 soc_field_t field2; 38 soc_field_t field3; 39 soc_field_t field4; 40 } lp_lls_reg_t; 41 42 lp_lls_reg_t lp_stream_map[] = { 43 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_001_000r, S1_MAPPING_DST_000f, 44 S1_MAPPING_DST_001f, 45 INVALIDf, 46 INVALIDf }, 47 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_003_002r, S1_MAPPING_DST_002f, 48 S1_MAPPING_DST_003f, 49 INVALIDf, 50 INVALIDf }, 51 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_005_004r, S1_MAPPING_DST_004f, 52 S1_MAPPING_DST_005f, 53 INVALIDf, 54 INVALIDf }, 55 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_007_006r, S1_MAPPING_DST_006f, 56 S1_MAPPING_DST_007f, 57 INVALIDf, 58 INVALIDf }, 59 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_009_008r, S1_MAPPING_DST_008f, 60 S1_MAPPING_DST_009f, 61 INVALIDf, 62 INVALIDf }, 63 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_011_010r, S1_MAPPING_DST_010f, 64 S1_MAPPING_DST_011f, 65 INVALIDf, 66 INVALIDf }, 67 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_013_012r, S1_MAPPING_DST_012f, 68 S1_MAPPING_DST_013f, 69 INVALIDf, 70 INVALIDf }, 71 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_015_014r, S1_MAPPING_DST_014f, 72 S1_MAPPING_DST_015f, 73 INVALIDf, 74 INVALIDf }, 75 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_017_016r, S1_MAPPING_DST_016f, 76 S1_MAPPING_DST_017f, 77 INVALIDf, 78 INVALIDf }, 79 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_019_018r, S1_MAPPING_DST_018f, 80 S1_MAPPING_DST_019f, 81 INVALIDf, 82 INVALIDf }, 83 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_021_020r, S1_MAPPING_DST_020f, 84 S1_MAPPING_DST_021f, 85 INVALIDf, 86 INVALIDf }, 87 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_023_022r, S1_MAPPING_DST_022f, 88 S1_MAPPING_DST_023f, 89 INVALIDf, 90 INVALIDf }, 91 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_025_024r, S1_MAPPING_DST_024f, 92 S1_MAPPING_DST_025f, 93 INVALIDf, 94 INVALIDf }, 95 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_027_026r, S1_MAPPING_DST_026f, 96 S1_MAPPING_DST_027f, 97 INVALIDf, 98 INVALIDf }, 99 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_029_028r, S1_MAPPING_DST_028f, 100 S1_MAPPING_DST_029f, 101 INVALIDf, 102 INVALIDf }, 103 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_031_030r, S1_MAPPING_DST_030f, 104 S1_MAPPING_DST_031f, 105 INVALIDf, 106 INVALIDf }, 107 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_033_032r, S1_MAPPING_DST_032f, 108 S1_MAPPING_DST_033f, 109 INVALIDf, 110 INVALIDf }, 111 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_035_034r, S1_MAPPING_DST_034f, 112 S1_MAPPING_DST_035f, 113 INVALIDf, 114 INVALIDf }, 115 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_037_036r, S1_MAPPING_DST_036f, 116 S1_MAPPING_DST_037f, 117 INVALIDf, 118 INVALIDf }, 119 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_039_038r, S1_MAPPING_DST_038f, 120 S1_MAPPING_DST_039f, 121 INVALIDf, 122 INVALIDf }, 123 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_041_040r, S1_MAPPING_DST_040f, 124 S1_MAPPING_DST_041f, 125 INVALIDf, 126 INVALIDf }, 127 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_043_042r, S1_MAPPING_DST_042f, 128 S1_MAPPING_DST_043f, 129 INVALIDf, 130 INVALIDf }, 131 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_045_044r, S1_MAPPING_DST_044f, 132 S1_MAPPING_DST_045f, 133 INVALIDf, 134 INVALIDf }, 135 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_047_046r, S1_MAPPING_DST_046f, 136 S1_MAPPING_DST_047f, 137 INVALIDf, 138 INVALIDf }, 139 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_049_048r, S1_MAPPING_DST_048f, 140 S1_MAPPING_DST_049f, 141 INVALIDf, 142 INVALIDf }, 143 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_051_050r, S1_MAPPING_DST_050f, 144 S1_MAPPING_DST_051f, 145 INVALIDf, 146 INVALIDf }, 147 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_053_052r, S1_MAPPING_DST_052f, 148 S1_MAPPING_DST_053f, 149 INVALIDf, 150 INVALIDf }, 151 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_055_054r, S1_MAPPING_DST_054f, 152 S1_MAPPING_DST_055f, 153 INVALIDf, 154 INVALIDf }, 155 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_057_056r, S1_MAPPING_DST_056f, 156 S1_MAPPING_DST_057f, 157 INVALIDf, 158 INVALIDf }, 159 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_059_058r, S1_MAPPING_DST_058f, 160 S1_MAPPING_DST_059f, 161 INVALIDf, 162 INVALIDf }, 163 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_061_060r, S1_MAPPING_DST_060f, 164 S1_MAPPING_DST_061f, 165 INVALIDf, 166 INVALIDf }, 167 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_063_062r, S1_MAPPING_DST_062f, 168 S1_MAPPING_DST_063f, 169 INVALIDf, 170 INVALIDf }, 171 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_065_064r, S1_MAPPING_DST_064f, 172 S1_MAPPING_DST_065f, 173 INVALIDf, 174 INVALIDf }, 175 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_067_066r, S1_MAPPING_DST_066f, 176 S1_MAPPING_DST_067f, 177 INVALIDf, 178 INVALIDf }, 179 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_069_068r, S1_MAPPING_DST_068f, 180 S1_MAPPING_DST_069f, 181 INVALIDf, 182 INVALIDf }, 183 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_071_070r, S1_MAPPING_DST_070f, 184 S1_MAPPING_DST_071f, 185 INVALIDf, 186 INVALIDf }, 187 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_073_072r, S1_MAPPING_DST_072f, 188 S1_MAPPING_DST_073f, 189 INVALIDf, 190 INVALIDf }, 191 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_075_074r, S1_MAPPING_DST_074f, 192 S1_MAPPING_DST_075f, 193 INVALIDf, 194 INVALIDf }, 195 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_077_076r, S1_MAPPING_DST_076f, 196 S1_MAPPING_DST_077f, 197 INVALIDf, 198 INVALIDf }, 199 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_079_078r, S1_MAPPING_DST_078f, 200 S1_MAPPING_DST_079f, 201 INVALIDf, 202 INVALIDf }, 203 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_081_080r, S1_MAPPING_DST_080f, 204 S1_MAPPING_DST_081f, 205 INVALIDf, 206 INVALIDf }, 207 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_083_082r, S1_MAPPING_DST_082f, 208 S1_MAPPING_DST_083f, 209 INVALIDf, 210 INVALIDf }, 211 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_085_084r, S1_MAPPING_DST_084f, 212 S1_MAPPING_DST_085f, 213 INVALIDf, 214 INVALIDf }, 215 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_087_086r, S1_MAPPING_DST_086f, 216 S1_MAPPING_DST_087f, 217 INVALIDf, 218 INVALIDf }, 219 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_089_088r, S1_MAPPING_DST_088f, 220 S1_MAPPING_DST_089f, 221 INVALIDf, 222 INVALIDf }, 223 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_091_090r, S1_MAPPING_DST_090f, 224 S1_MAPPING_DST_091f, 225 INVALIDf, 226 INVALIDf }, 227 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_093_092r, S1_MAPPING_DST_092f, 228 S1_MAPPING_DST_093f, 229 INVALIDf, 230 INVALIDf }, 231 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_095_094r, S1_MAPPING_DST_094f, 232 S1_MAPPING_DST_095f, 233 INVALIDf, 234 INVALIDf }, 235 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_097_096r, S1_MAPPING_DST_096f, 236 S1_MAPPING_DST_097f, 237 INVALIDf, 238 INVALIDf }, 239 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_099_098r, S1_MAPPING_DST_098f, 240 S1_MAPPING_DST_099f, 241 INVALIDf, 242 INVALIDf }, 243 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_101_100r, S1_MAPPING_DST_100f, 244 S1_MAPPING_DST_101f, 245 INVALIDf, 246 INVALIDf }, 247 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_103_102r, S1_MAPPING_DST_102f, 248 S1_MAPPING_DST_103f, 249 INVALIDf, 250 INVALIDf }, 251 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_105_104r, S1_MAPPING_DST_104f, 252 S1_MAPPING_DST_105f, 253 INVALIDf, 254 INVALIDf }, 255 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_107_106r, S1_MAPPING_DST_106f, 256 S1_MAPPING_DST_107f, 257 INVALIDf, 258 INVALIDf }, 259 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_109_108r, S1_MAPPING_DST_108f, 260 S1_MAPPING_DST_109f, 261 INVALIDf, 262 INVALIDf }, 263 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_111_110r, S1_MAPPING_DST_110f, 264 S1_MAPPING_DST_111f, 265 INVALIDf, 266 INVALIDf }, 267 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_113_112r, S1_MAPPING_DST_112f, 268 S1_MAPPING_DST_113f, 269 INVALIDf, 270 INVALIDf }, 271 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_115_114r, S1_MAPPING_DST_114f, 272 S1_MAPPING_DST_115f, 273 INVALIDf, 274 INVALIDf }, 275 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_117_116r, S1_MAPPING_DST_116f, 276 S1_MAPPING_DST_117f, 277 INVALIDf, 278 INVALIDf }, 279 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_119_118r, S1_MAPPING_DST_118f, 280 S1_MAPPING_DST_119f, 281 INVALIDf, 282 INVALIDf }, 283 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_121_120r, S1_MAPPING_DST_120f, 284 S1_MAPPING_DST_121f, 285 INVALIDf, 286 INVALIDf }, 287 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_123_122r, S1_MAPPING_DST_122f, 288 S1_MAPPING_DST_123f, 289 INVALIDf, 290 INVALIDf }, 291 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_125_124r, S1_MAPPING_DST_124f, 292 S1_MAPPING_DST_125f, 293 INVALIDf, 294 INVALIDf }, 295 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_127_126r, S1_MAPPING_DST_126f, 296 S1_MAPPING_DST_127f, 297 INVALIDf, 298 INVALIDf }, 299 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_129_128r, S1_MAPPING_DST_128f, 300 S1_MAPPING_DST_129f, 301 INVALIDf, 302 INVALIDf }, 303 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_131_130r, S1_MAPPING_DST_130f, 304 S1_MAPPING_DST_131f, 305 INVALIDf, 306 INVALIDf }, 307 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_133_132r, S1_MAPPING_DST_132f, 308 S1_MAPPING_DST_133f, 309 INVALIDf, 310 INVALIDf }, 311 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_135_134r, S1_MAPPING_DST_134f, 312 S1_MAPPING_DST_135f, 313 INVALIDf, 314 INVALIDf }, 315 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_137_136r, S1_MAPPING_DST_136f, 316 S1_MAPPING_DST_137f, 317 INVALIDf, 318 INVALIDf }, 319 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_139_138r, S1_MAPPING_DST_138f, 320 S1_MAPPING_DST_139f, 321 INVALIDf, 322 INVALIDf }, 323 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_141_140r, S1_MAPPING_DST_140f, 324 S1_MAPPING_DST_141f, 325 INVALIDf, 326 INVALIDf }, 327 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_143_142r, S1_MAPPING_DST_142f, 328 S1_MAPPING_DST_143f, 329 INVALIDf, 330 INVALIDf }, 331 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_145_144r, S1_MAPPING_DST_144f, 332 S1_MAPPING_DST_145f, 333 INVALIDf, 334 INVALIDf }, 335 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_147_146r, S1_MAPPING_DST_146f, 336 S1_MAPPING_DST_147f, 337 INVALIDf, 338 INVALIDf }, 339 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_149_148r, S1_MAPPING_DST_148f, 340 S1_MAPPING_DST_149f, 341 INVALIDf, 342 INVALIDf }, 343 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_151_150r, S1_MAPPING_DST_150f, 344 S1_MAPPING_DST_151f, 345 INVALIDf, 346 INVALIDf }, 347 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_153_152r, S1_MAPPING_DST_152f, 348 S1_MAPPING_DST_153f, 349 INVALIDf, 350 INVALIDf }, 351 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_155_154r, S1_MAPPING_DST_154f, 352 S1_MAPPING_DST_155f, 353 INVALIDf, 354 INVALIDf }, 355 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_157_156r, S1_MAPPING_DST_156f, 356 S1_MAPPING_DST_157f, 357 INVALIDf, 358 INVALIDf }, 359 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_159_158r, S1_MAPPING_DST_158f, 360 S1_MAPPING_DST_159f, 361 INVALIDf, 362 INVALIDf }, 363 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_161_160r, S1_MAPPING_DST_160f, 364 S1_MAPPING_DST_161f, 365 INVALIDf, 366 INVALIDf }, 367 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_163_162r, S1_MAPPING_DST_162f, 368 S1_MAPPING_DST_163f, 369 INVALIDf, 370 INVALIDf }, 371 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_165_164r, S1_MAPPING_DST_164f, 372 S1_MAPPING_DST_165f, 373 INVALIDf, 374 INVALIDf }, 375 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_167_166r, S1_MAPPING_DST_166f, 376 S1_MAPPING_DST_167f, 377 INVALIDf, 378 INVALIDf }, 379 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_169_168r, S1_MAPPING_DST_168f, 380 S1_MAPPING_DST_169f, 381 INVALIDf, 382 INVALIDf }, 383 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_171_170r, S1_MAPPING_DST_170f, 384 S1_MAPPING_DST_171f, 385 INVALIDf, 386 INVALIDf }, 387 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_173_172r, S1_MAPPING_DST_172f, 388 S1_MAPPING_DST_173f, 389 INVALIDf, 390 INVALIDf }, 391 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_175_174r, S1_MAPPING_DST_174f, 392 S1_MAPPING_DST_175f, 393 INVALIDf, 394 INVALIDf }, 395 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_177_176r, S1_MAPPING_DST_176f, 396 S1_MAPPING_DST_177f, 397 INVALIDf, 398 INVALIDf }, 399 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_179_178r, S1_MAPPING_DST_178f, 400 S1_MAPPING_DST_179f, 401 INVALIDf, 402 INVALIDf }, 403 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_181_180r, S1_MAPPING_DST_180f, 404 S1_MAPPING_DST_181f, 405 INVALIDf, 406 INVALIDf }, 407 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_183_182r, S1_MAPPING_DST_182f, 408 S1_MAPPING_DST_183f, 409 INVALIDf, 410 INVALIDf }, 411 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_185_184r, S1_MAPPING_DST_184f, 412 S1_MAPPING_DST_185f, 413 INVALIDf, 414 INVALIDf }, 415 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_187_186r, S1_MAPPING_DST_186f, 416 S1_MAPPING_DST_187f, 417 INVALIDf, 418 INVALIDf }, 419 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_189_188r, S1_MAPPING_DST_188f, 420 S1_MAPPING_DST_189f, 421 INVALIDf, 422 INVALIDf }, 423 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_191_190r, S1_MAPPING_DST_190f, 424 S1_MAPPING_DST_191f, 425 INVALIDf, 426 INVALIDf }, 427 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_193_192r, S1_MAPPING_DST_192f, 428 S1_MAPPING_DST_193f, 429 INVALIDf, 430 INVALIDf }, 431 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_195_194r, S1_MAPPING_DST_194f, 432 S1_MAPPING_DST_195f, 433 INVALIDf, 434 INVALIDf }, 435 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_197_196r, S1_MAPPING_DST_196f, 436 S1_MAPPING_DST_197f, 437 INVALIDf, 438 INVALIDf }, 439 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_199_198r, S1_MAPPING_DST_198f, 440 S1_MAPPING_DST_199f, 441 INVALIDf, 442 INVALIDf }, 443 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_201_200r, S1_MAPPING_DST_200f, 444 S1_MAPPING_DST_201f, 445 INVALIDf, 446 INVALIDf }, 447 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_203_202r, S1_MAPPING_DST_202f, 448 S1_MAPPING_DST_203f, 449 INVALIDf, 450 INVALIDf }, 451 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_205_204r, S1_MAPPING_DST_204f, 452 S1_MAPPING_DST_205f, 453 INVALIDf, 454 INVALIDf }, 455 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_207_206r, S1_MAPPING_DST_206f, 456 S1_MAPPING_DST_207f, 457 INVALIDf, 458 INVALIDf }, 459 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_209_208r, S1_MAPPING_DST_208f, 460 S1_MAPPING_DST_209f, 461 INVALIDf, 462 INVALIDf }, 463 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_211_210r, S1_MAPPING_DST_210f, 464 S1_MAPPING_DST_211f, 465 INVALIDf, 466 INVALIDf }, 467 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_213_212r, S1_MAPPING_DST_212f, 468 S1_MAPPING_DST_213f, 469 INVALIDf, 470 INVALIDf }, 471 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_215_214r, S1_MAPPING_DST_214f, 472 S1_MAPPING_DST_215f, 473 INVALIDf, 474 INVALIDf }, 475 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_217_216r, S1_MAPPING_DST_216f, 476 S1_MAPPING_DST_217f, 477 INVALIDf, 478 INVALIDf }, 479 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_219_218r, S1_MAPPING_DST_218f, 480 S1_MAPPING_DST_219f, 481 INVALIDf, 482 INVALIDf }, 483 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_221_220r, S1_MAPPING_DST_220f, 484 S1_MAPPING_DST_221f, 485 INVALIDf, 486 INVALIDf }, 487 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_223_222r, S1_MAPPING_DST_222f, 488 S1_MAPPING_DST_223f, 489 INVALIDf, 490 INVALIDf }, 491 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_225_224r, S1_MAPPING_DST_224f, 492 S1_MAPPING_DST_225f, 493 INVALIDf, 494 INVALIDf }, 495 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_227_226r, S1_MAPPING_DST_226f, 496 S1_MAPPING_DST_227f, 497 INVALIDf, 498 INVALIDf }, 499 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_229_228r, S1_MAPPING_DST_228f, 500 S1_MAPPING_DST_229f, 501 INVALIDf, 502 INVALIDf }, 503 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_231_230r, S1_MAPPING_DST_230f, 504 S1_MAPPING_DST_231f, 505 INVALIDf, 506 INVALIDf }, 507 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_233_232r, S1_MAPPING_DST_232f, 508 S1_MAPPING_DST_233f, 509 INVALIDf, 510 INVALIDf }, 511 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_235_234r, S1_MAPPING_DST_234f, 512 S1_MAPPING_DST_235f, 513 INVALIDf, 514 INVALIDf }, 515 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_237_236r, S1_MAPPING_DST_236f, 516 S1_MAPPING_DST_237f, 517 INVALIDf, 518 INVALIDf }, 519 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_239_238r, S1_MAPPING_DST_238f, 520 S1_MAPPING_DST_239f, 521 INVALIDf, 522 INVALIDf }, 523 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_241_240r, S1_MAPPING_DST_240f, 524 S1_MAPPING_DST_241f, 525 INVALIDf, 526 INVALIDf }, 527 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_243_242r, S1_MAPPING_DST_242f, 528 S1_MAPPING_DST_243f, 529 INVALIDf, 530 INVALIDf }, 531 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_245_244r, S1_MAPPING_DST_244f, 532 S1_MAPPING_DST_245f, 533 INVALIDf, 534 INVALIDf }, 535 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_247_246r, S1_MAPPING_DST_246f, 536 S1_MAPPING_DST_247f, 537 INVALIDf, 538 INVALIDf }, 539 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_249_248r, S1_MAPPING_DST_248f, 540 S1_MAPPING_DST_249f, 541 INVALIDf, 542 INVALIDf }, 543 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_251_250r, S1_MAPPING_DST_250f, 544 S1_MAPPING_DST_251f, 545 INVALIDf, 546 INVALIDf }, 547 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_253_252r, S1_MAPPING_DST_252f, 548 S1_MAPPING_DST_253f, 549 INVALIDf, 550 INVALIDf }, 551 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_255_254r, S1_MAPPING_DST_254f, 552 S1_MAPPING_DST_255f, 553 INVALIDf, 554 INVALIDf }, 555 }; 556 557 lp_lls_reg_t port_lp_enable[] = { 558 { INVALIDr, INVALIDf, INVALIDf ,INVALIDf, INVALIDf}, 559 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_01f, INVALIDf, 560 INVALIDf, INVALIDf }, 561 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_02f, INVALIDf, 562 INVALIDf, INVALIDf }, 563 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_03f, INVALIDf, 564 INVALIDf, INVALIDf }, 565 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_04f, INVALIDf, 566 INVALIDf, INVALIDf }, 567 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_05f, INVALIDf, 568 INVALIDf, INVALIDf }, 569 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_06f, INVALIDf, 570 INVALIDf, INVALIDf }, 571 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_07f, INVALIDf, 572 INVALIDf, INVALIDf }, 573 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_08f, INVALIDf, 574 INVALIDf, INVALIDf }, 575 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_09f, INVALIDf, 576 INVALIDf, INVALIDf }, 577 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_10f, INVALIDf, 578 INVALIDf, INVALIDf }, 579 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_11f, INVALIDf, 580 INVALIDf, INVALIDf }, 581 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_12f, INVALIDf, 582 INVALIDf, INVALIDf }, 583 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_13f, INVALIDf, 584 INVALIDf, INVALIDf }, 585 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_14f, INVALIDf, 586 INVALIDf, INVALIDf }, 587 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_15f, INVALIDf, 588 INVALIDf, INVALIDf }, 589 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_16f, INVALIDf, 590 INVALIDf, INVALIDf }, 591 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_17f, INVALIDf, 592 INVALIDf, INVALIDf }, 593 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_18f, INVALIDf, 594 INVALIDf, INVALIDf }, 595 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_19f, INVALIDf, 596 INVALIDf, INVALIDf }, 597 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_20f, INVALIDf, 598 INVALIDf, INVALIDf }, 599 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_21f, INVALIDf, 600 INVALIDf, INVALIDf }, 601 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_22f, INVALIDf, 602 INVALIDf, INVALIDf }, 603 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_23f, INVALIDf, 604 INVALIDf, INVALIDf }, 605 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_24f, INVALIDf, 606 INVALIDf, INVALIDf }, 607 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_25f, INVALIDf, 608 INVALIDf, INVALIDf }, 609 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_26f, INVALIDf, 610 INVALIDf, INVALIDf }, 611 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_27f, INVALIDf, 612 INVALIDf, INVALIDf }, 613 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_28f, INVALIDf, 614 INVALIDf, INVALIDf }, 615 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_29f, INVALIDf, 616 INVALIDf, INVALIDf }, 617 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_30f, INVALIDf, 618 INVALIDf, INVALIDf }, 619 { LLS_PORT_COE_LINKPHY_ENABLE_LOWERr, LINKPHY_ENABLE_31f, INVALIDf, 620 INVALIDf, INVALIDf }, 621 { LLS_PORT_COE_LINKPHY_ENABLE_UPPERr, LINKPHY_ENABLE_32f, INVALIDf, 622 INVALIDf, INVALIDf }, 623 { LLS_PORT_COE_LINKPHY_ENABLE_UPPERr, LINKPHY_ENABLE_33f, INVALIDf, 624 INVALIDf, INVALIDf }, 625 { LLS_PORT_COE_LINKPHY_ENABLE_UPPERr, LINKPHY_ENABLE_34f, INVALIDf, 626 INVALIDf, INVALIDf }, 627 { LLS_PORT_COE_LINKPHY_ENABLE_UPPERr, LINKPHY_ENABLE_35f, INVALIDf, 628 INVALIDf, INVALIDf }, 629 { LLS_PORT_COE_LINKPHY_ENABLE_UPPERr, LINKPHY_ENABLE_36f, INVALIDf, 630 INVALIDf, INVALIDf }, 631 { LLS_PORT_COE_LINKPHY_ENABLE_UPPERr, LINKPHY_ENABLE_37f, INVALIDf, 632 INVALIDf, INVALIDf }, 633 { LLS_PORT_COE_LINKPHY_ENABLE_UPPERr, LINKPHY_ENABLE_38f, INVALIDf, 634 INVALIDf, INVALIDf }, 635 { LLS_PORT_COE_LINKPHY_ENABLE_UPPERr, LINKPHY_ENABLE_39f, INVALIDf, 636 INVALIDf, INVALIDf }, 637 { LLS_PORT_COE_LINKPHY_ENABLE_UPPERr, LINKPHY_ENABLE_40f, INVALIDf, 638 INVALIDf, INVALIDf }, 639 }; 640 641 lp_lls_reg_t port_lp_config[] = { 642 { INVALIDr, INVALIDf, INVALIDf, INVALIDf, INVALIDf }, 643 { LLS_PORT_01_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 644 { LLS_PORT_02_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 645 { LLS_PORT_03_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 646 { LLS_PORT_04_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 647 { LLS_PORT_05_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 648 { LLS_PORT_06_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 649 { LLS_PORT_07_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 650 { LLS_PORT_08_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 651 { LLS_PORT_09_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 652 { LLS_PORT_10_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 653 { LLS_PORT_11_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 654 { LLS_PORT_12_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 655 { LLS_PORT_13_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 656 { LLS_PORT_14_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 657 { LLS_PORT_15_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 658 { LLS_PORT_16_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 659 { LLS_PORT_17_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 660 { LLS_PORT_18_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 661 { LLS_PORT_19_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 662 { LLS_PORT_20_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 663 { LLS_PORT_21_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 664 { LLS_PORT_22_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 665 { LLS_PORT_23_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 666 { LLS_PORT_24_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 667 { LLS_PORT_25_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 668 { LLS_PORT_26_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 669 { LLS_PORT_27_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 670 { LLS_PORT_28_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 671 { LLS_PORT_29_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 672 { LLS_PORT_30_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 673 { LLS_PORT_31_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 674 { LLS_PORT_32_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 675 { LLS_PORT_33_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 676 { LLS_PORT_34_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 677 { LLS_PORT_35_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 678 { LLS_PORT_36_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 679 { LLS_PORT_37_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 680 { LLS_PORT_38_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 681 { LLS_PORT_39_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 682 { LLS_PORT_40_LINKPHY_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 683 }; 684 685 #if defined(BCM_SABER2_SUPPORT) 686 lp_lls_reg_t sb2_lp_stream_map[] = { 687 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_003_000r, S1_MAPPING_DST_000f, 688 S1_MAPPING_DST_001f, 689 S1_MAPPING_DST_002f, 690 S1_MAPPING_DST_003f }, 691 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_007_004r, S1_MAPPING_DST_004f, 692 S1_MAPPING_DST_005f, 693 S1_MAPPING_DST_006f, 694 S1_MAPPING_DST_007f }, 695 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_011_008r, S1_MAPPING_DST_008f, 696 S1_MAPPING_DST_009f, 697 S1_MAPPING_DST_010f, 698 S1_MAPPING_DST_011f }, 699 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_015_012r, S1_MAPPING_DST_012f, 700 S1_MAPPING_DST_013f, 701 S1_MAPPING_DST_014f, 702 S1_MAPPING_DST_015f }, 703 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_019_016r, S1_MAPPING_DST_016f, 704 S1_MAPPING_DST_017f, 705 S1_MAPPING_DST_018f, 706 S1_MAPPING_DST_019f }, 707 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_023_020r, S1_MAPPING_DST_020f, 708 S1_MAPPING_DST_021f, 709 S1_MAPPING_DST_022f, 710 S1_MAPPING_DST_023f }, 711 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_027_024r, S1_MAPPING_DST_024f, 712 S1_MAPPING_DST_025f, 713 S1_MAPPING_DST_026f, 714 S1_MAPPING_DST_027f }, 715 { LLS_LINKPHY_CONFIG_DST_STREAM_TO_S1_MAPPING_031_028r, S1_MAPPING_DST_028f, 716 S1_MAPPING_DST_029f, 717 S1_MAPPING_DST_030f, 718 S1_MAPPING_DST_031f }, 719 720 }; 721 722 lp_lls_reg_t sb2_port_lp_enable[] = { 723 { INVALIDr, INVALIDf, INVALIDf ,INVALIDf, INVALIDf}, 724 { LLS_PORT_COE_ENABLEr, COE_ENABLE_01f, INVALIDf, INVALIDf, INVALIDf }, 725 { LLS_PORT_COE_ENABLEr, COE_ENABLE_02f, INVALIDf, INVALIDf, INVALIDf }, 726 { LLS_PORT_COE_ENABLEr, COE_ENABLE_03f, INVALIDf, INVALIDf, INVALIDf }, 727 { LLS_PORT_COE_ENABLEr, COE_ENABLE_04f, INVALIDf, INVALIDf, INVALIDf }, 728 { LLS_PORT_COE_ENABLEr, COE_ENABLE_05f, INVALIDf, INVALIDf, INVALIDf }, 729 { LLS_PORT_COE_ENABLEr, COE_ENABLE_06f, INVALIDf, INVALIDf, INVALIDf }, 730 { LLS_PORT_COE_ENABLEr, COE_ENABLE_07f, INVALIDf, INVALIDf, INVALIDf }, 731 { LLS_PORT_COE_ENABLEr, COE_ENABLE_08f, INVALIDf, INVALIDf, INVALIDf }, 732 { LLS_PORT_COE_ENABLEr, COE_ENABLE_09f, INVALIDf, INVALIDf, INVALIDf }, 733 { LLS_PORT_COE_ENABLEr, COE_ENABLE_10f, INVALIDf, INVALIDf, INVALIDf }, 734 { LLS_PORT_COE_ENABLEr, COE_ENABLE_11f, INVALIDf, INVALIDf, INVALIDf }, 735 { LLS_PORT_COE_ENABLEr, COE_ENABLE_12f, INVALIDf, INVALIDf, INVALIDf }, 736 { LLS_PORT_COE_ENABLEr, COE_ENABLE_13f, INVALIDf, INVALIDf, INVALIDf }, 737 { LLS_PORT_COE_ENABLEr, COE_ENABLE_14f, INVALIDf, INVALIDf, INVALIDf }, 738 { LLS_PORT_COE_ENABLEr, COE_ENABLE_15f, INVALIDf, INVALIDf, INVALIDf }, 739 { LLS_PORT_COE_ENABLEr, COE_ENABLE_16f, INVALIDf, INVALIDf, INVALIDf }, 740 { LLS_PORT_COE_ENABLEr, COE_ENABLE_17f, INVALIDf, INVALIDf, INVALIDf }, 741 { LLS_PORT_COE_ENABLEr, COE_ENABLE_18f, INVALIDf, INVALIDf, INVALIDf }, 742 { LLS_PORT_COE_ENABLEr, COE_ENABLE_19f, INVALIDf, INVALIDf, INVALIDf }, 743 { LLS_PORT_COE_ENABLEr, COE_ENABLE_20f, INVALIDf, INVALIDf, INVALIDf }, 744 { LLS_PORT_COE_ENABLEr, COE_ENABLE_21f, INVALIDf, INVALIDf, INVALIDf }, 745 { LLS_PORT_COE_ENABLEr, COE_ENABLE_22f, INVALIDf, INVALIDf, INVALIDf }, 746 { LLS_PORT_COE_ENABLEr, COE_ENABLE_23f, INVALIDf, INVALIDf, INVALIDf }, 747 { LLS_PORT_COE_ENABLEr, COE_ENABLE_24f, INVALIDf, INVALIDf, INVALIDf }, 748 { LLS_PORT_COE_ENABLEr, COE_ENABLE_25f, INVALIDf, INVALIDf, INVALIDf }, 749 { LLS_PORT_COE_ENABLEr, COE_ENABLE_26f, INVALIDf, INVALIDf, INVALIDf }, 750 { LLS_PORT_COE_ENABLEr, COE_ENABLE_27f, INVALIDf, INVALIDf, INVALIDf }, 751 { LLS_PORT_COE_ENABLEr, COE_ENABLE_28f, INVALIDf, INVALIDf, INVALIDf }, 752 }; 753 754 lp_lls_reg_t sb2_port_lp_config[] = { 755 { INVALIDr, INVALIDf, INVALIDf, INVALIDf, INVALIDf }, 756 { LLS_PORT_01_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 757 { LLS_PORT_02_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 758 { LLS_PORT_03_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 759 { LLS_PORT_04_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 760 { LLS_PORT_05_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 761 { LLS_PORT_06_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 762 { LLS_PORT_07_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 763 { LLS_PORT_08_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 764 { LLS_PORT_09_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 765 { LLS_PORT_10_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 766 { LLS_PORT_11_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 767 { LLS_PORT_12_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 768 { LLS_PORT_13_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 769 { LLS_PORT_14_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 770 { LLS_PORT_15_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 771 { LLS_PORT_16_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 772 { LLS_PORT_17_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 773 { LLS_PORT_18_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 774 { LLS_PORT_19_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 775 { LLS_PORT_20_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 776 { LLS_PORT_21_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 777 { LLS_PORT_22_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 778 { LLS_PORT_23_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 779 { LLS_PORT_24_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 780 { LLS_PORT_25_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 781 { LLS_PORT_26_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 782 { LLS_PORT_27_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 783 { LLS_PORT_28_COE_CONFIGr, START_S1f, END_S1f, INVALIDf, INVALIDf }, 784 }; 785 786 #endif 787 788 int 789 _soc_kt2_cosq_stream_mapping_set(int unit) 790 { 791 uint32 i, rval; 792 lp_lls_reg_t *map_reg; 793 soc_reg_t sched_regs[] = { 794 LLS_LINKPHY_CONFIG_SEL_SPRI_S1_IN_S0_31_0r, 795 LLS_LINKPHY_CONFIG_SEL_SPRI_S1_IN_S0_63_32r, 796 LLS_LINKPHY_CONFIG_SEL_SPRI_S1_IN_S0_95_64r, 797 LLS_LINKPHY_CONFIG_SEL_SPRI_S1_IN_S0_127_96r 798 }; 799 soc_field_t sched_fields[] = { 800 SEL_SPRI_S1_IN_S0_31_0f, 801 SEL_SPRI_S1_IN_S0_63_32f, 802 SEL_SPRI_S1_IN_S0_95_64f, 803 SEL_SPRI_S1_IN_S0_127_96f 804 }; 805 806 map_reg = lp_stream_map; 807 for (i = 0; i < 128; i++) { 808 rval = 0; 809 soc_reg_field_set(unit, map_reg[i].reg, &rval, 810 map_reg[i].field1, (i * 2)); 811 soc_reg_field_set(unit, map_reg[i].reg, &rval, 812 map_reg[i].field2, ((i * 2) + 1)); 813 SOC_IF_ERROR_RETURN 814 (soc_reg32_set(unit, map_reg[i].reg, REG_PORT_ANY, 0, rval)); 815 } 816 817 /* set the streams in spri by default */ 818 for (i = 0; i < 4; i++) { 819 SOC_IF_ERROR_RETURN 820 (soc_reg32_get(unit,sched_regs[i], REG_PORT_ANY, 0, &rval)); 821 soc_reg_field_set(unit, sched_regs[i], &rval, sched_fields[i], 822 0xFFFFFFFF); 823 SOC_IF_ERROR_RETURN 824 (soc_reg32_set(unit, sched_regs[i], REG_PORT_ANY, 0, rval)); 825 } 826 827 return SOC_E_NONE; 828 } 829 830 #if defined (BCM_SABER2_SUPPORT) 831 int 832 _soc_sb2_cosq_stream_mapping_set(int unit) 833 { 834 uint32 i, rval, num_reg = 8; 835 lp_lls_reg_t *map_reg; 836 837 map_reg = sb2_lp_stream_map; 838 #if defined (BCM_METROLITE_SUPPORT) 839 if (SOC_IS_METROLITE(unit)) { 840 num_reg = 6; 841 } 842 #endif 843 for (i = 0; i < num_reg; i++) { 844 rval = 0; 845 soc_reg_field_set(unit, map_reg[i].reg, &rval, 846 map_reg[i].field1, (i * 4)); 847 soc_reg_field_set(unit, map_reg[i].reg, &rval, 848 map_reg[i].field2, ((i * 4) + 1)); 849 soc_reg_field_set(unit, map_reg[i].reg, &rval, 850 map_reg[i].field3, ((i * 4) + 2)); 851 soc_reg_field_set(unit, map_reg[i].reg, &rval, 852 map_reg[i].field4, ((i * 4) + 3)); 853 SOC_IF_ERROR_RETURN 854 (soc_reg32_set(unit, map_reg[i].reg, REG_PORT_ANY, 0, rval)); 855 } 856 #if defined (BCM_METROLITE_SUPPORT) 857 if (SOC_IS_METROLITE(unit)) { 858 return SOC_E_NONE; 859 } 860 #endif 861 862 SOC_IF_ERROR_RETURN(READ_LLS_LINKPHY_CONFIG_SEL_SPRI_S1_IN_S0r(unit, &rval)); 863 soc_reg_field_set(unit, LLS_LINKPHY_CONFIG_SEL_SPRI_S1_IN_S0r, &rval, 864 SEL_SPRI_S1_IN_S0f, 0xFFFF); 865 SOC_IF_ERROR_RETURN(WRITE_LLS_LINKPHY_CONFIG_SEL_SPRI_S1_IN_S0r(unit, rval)); 866 867 return SOC_E_NONE; 868 } 869 #endif 870 871 int 872 soc_kt2_cosq_stream_mapping_set(int unit) 873 { 874 875 #if defined (BCM_SABER2_SUPPORT) 876 if(SOC_IS_SABER2(unit)) { 877 SOC_IF_ERROR_RETURN(_soc_sb2_cosq_stream_mapping_set(unit)); 878 } else 879 #endif 880 if (SOC_IS_KATANA2(unit)) { 881 SOC_IF_ERROR_RETURN(_soc_kt2_cosq_stream_mapping_set(unit)); 882 } 883 return SOC_E_NONE; 884 } 885 886 int 887 _soc_kt2_cosq_s0_sched_set(int unit, int hw_index, int mode) 888 { 889 int reg_id; 890 uint32 rval, sched_mode; 891 soc_reg_t sched_regs[] = { 892 LLS_LINKPHY_CONFIG_SEL_SPRI_S1_IN_S0_31_0r, 893 LLS_LINKPHY_CONFIG_SEL_SPRI_S1_IN_S0_63_32r, 894 LLS_LINKPHY_CONFIG_SEL_SPRI_S1_IN_S0_95_64r, 895 LLS_LINKPHY_CONFIG_SEL_SPRI_S1_IN_S0_127_96r 896 }; 897 soc_field_t sched_fields[] = { 898 SEL_SPRI_S1_IN_S0_31_0f, 899 SEL_SPRI_S1_IN_S0_63_32f, 900 SEL_SPRI_S1_IN_S0_95_64f, 901 SEL_SPRI_S1_IN_S0_127_96f 902 }; 903 reg_id = hw_index / 32; 904 905 if (reg_id > 3) { 906 return SOC_E_PARAM; 907 } 908 909 SOC_IF_ERROR_RETURN 910 (soc_reg32_get(unit, sched_regs[reg_id], REG_PORT_ANY, 0, &rval)); 911 sched_mode = soc_reg_field_get(unit, sched_regs[reg_id], rval, 912 sched_fields[reg_id]); 913 if (mode) { 914 sched_mode |= (1 << (hw_index % 32)); 915 } else { 916 sched_mode &= ~(1 << (hw_index % 32)); 917 } 918 soc_reg_field_set(unit, sched_regs[reg_id], &rval, sched_fields[reg_id], 919 sched_mode); 920 SOC_IF_ERROR_RETURN 921 (soc_reg32_set(unit, sched_regs[reg_id], REG_PORT_ANY, 0, rval)); 922 923 return SOC_E_NONE; 924 } 925 926 int 927 _soc_sb2_cosq_s0_sched_set(int unit, int hw_index, int mode) 928 { 929 uint32 rval, sched_mode; 930 931 SOC_IF_ERROR_RETURN(soc_reg32_get(unit, 932 LLS_LINKPHY_CONFIG_SEL_SPRI_S1_IN_S0r, 933 REG_PORT_ANY, 0, &rval)); 934 935 sched_mode = soc_reg_field_get(unit, 936 LLS_LINKPHY_CONFIG_SEL_SPRI_S1_IN_S0r, 937 rval, SEL_SPRI_S1_IN_S0f); 938 939 if (mode) { 940 sched_mode |= (1 << hw_index); 941 } else { 942 sched_mode &= ~(1 << hw_index); 943 } 944 945 soc_reg_field_set(unit, LLS_LINKPHY_CONFIG_SEL_SPRI_S1_IN_S0r, 946 &rval, SEL_SPRI_S1_IN_S0f, sched_mode); 947 948 SOC_IF_ERROR_RETURN(soc_reg32_set(unit, 949 LLS_LINKPHY_CONFIG_SEL_SPRI_S1_IN_S0r, 950 REG_PORT_ANY, 0, rval)); 951 952 return SOC_E_NONE; 953 } 954 955 int 956 soc_kt2_cosq_s0_sched_set(int unit, int hw_index, int mode) 957 { 958 959 #if defined (BCM_METROLITE_SUPPORT) 960 if (SOC_IS_METROLITE(unit)) { 961 return SOC_E_NONE; 962 } 963 #endif 964 #if defined(BCM_SABER2_SUPPORT) 965 if(SOC_IS_SABER2(unit)) { 966 SOC_IF_ERROR_RETURN(_soc_sb2_cosq_s0_sched_set(unit, hw_index, mode)); 967 } else 968 #endif 969 if (SOC_IS_KATANA2(unit)) { 970 SOC_IF_ERROR_RETURN(_soc_kt2_cosq_s0_sched_set(unit, hw_index, mode)); 971 } 972 973 return SOC_E_NONE; 974 } 975 976 int 977 _soc_sb2_cosq_s0_sched_get(int unit, int hw_index, soc_kt2_sched_mode_e *mode) 978 { 979 uint32 rval, sched_mode; 980 981 SOC_IF_ERROR_RETURN(soc_reg32_get(unit, 982 LLS_LINKPHY_CONFIG_SEL_SPRI_S1_IN_S0r, 983 REG_PORT_ANY, 0, &rval)); 984 985 sched_mode = soc_reg_field_get(unit, 986 LLS_LINKPHY_CONFIG_SEL_SPRI_S1_IN_S0r, 987 rval, SEL_SPRI_S1_IN_S0f); 988 989 *mode = (sched_mode & (1 << hw_index)) ? SOC_KT2_SCHED_MODE_STRICT : 990 SOC_KT2_SCHED_MODE_WRR; 991 return SOC_E_NONE; 992 } 993 994 int 995 _soc_kt2_cosq_s0_sched_get(int unit, int hw_index, soc_kt2_sched_mode_e *mode) 996 { 997 int reg_id; 998 uint32 rval, sched_mode; 999 soc_reg_t sched_regs[] = { 1000 LLS_LINKPHY_CONFIG_SEL_SPRI_S1_IN_S0_31_0r, 1001 LLS_LINKPHY_CONFIG_SEL_SPRI_S1_IN_S0_63_32r, 1002 LLS_LINKPHY_CONFIG_SEL_SPRI_S1_IN_S0_95_64r, 1003 LLS_LINKPHY_CONFIG_SEL_SPRI_S1_IN_S0_127_96r 1004 }; 1005 soc_field_t sched_fields[] = { 1006 SEL_SPRI_S1_IN_S0_31_0f, 1007 SEL_SPRI_S1_IN_S0_63_32f, 1008 SEL_SPRI_S1_IN_S0_95_64f, 1009 SEL_SPRI_S1_IN_S0_127_96f 1010 }; 1011 reg_id = hw_index / 32; 1012 1013 if (reg_id > 3) { 1014 return SOC_E_PARAM; 1015 } 1016 1017 SOC_IF_ERROR_RETURN 1018 (soc_reg32_get(unit, sched_regs[reg_id], REG_PORT_ANY, 0, &rval)); 1019 sched_mode = soc_reg_field_get(unit, sched_regs[reg_id], rval, 1020 sched_fields[reg_id]); 1021 *mode = (sched_mode & (1 << (hw_index % 32))) ? SOC_KT2_SCHED_MODE_STRICT : 1022 SOC_KT2_SCHED_MODE_WRR; 1023 1024 return SOC_E_NONE; 1025 } 1026 1027 int 1028 soc_kt2_cosq_s0_sched_get(int unit, int hw_index, soc_kt2_sched_mode_e *mode) 1029 { 1030 if (!mode) { 1031 return SOC_E_PARAM; 1032 } 1033 #if defined(BCM_SABER2_SUPPORT) 1034 if(SOC_IS_SABER2(unit)) { 1035 SOC_IF_ERROR_RETURN(_soc_sb2_cosq_s0_sched_get(unit, hw_index, mode)); 1036 } else 1037 #endif 1038 if (SOC_IS_KATANA2(unit)) { 1039 SOC_IF_ERROR_RETURN(_soc_kt2_cosq_s0_sched_get(unit, hw_index, mode)); 1040 } 1041 return SOC_E_NONE; 1042 } 1043 1044 int 1045 soc_kt2_cosq_port_coe_linkphy_status_set(int unit, soc_port_t port, int enable) 1046 { 1047 uint32 rval, max_valid_index = KT2_MAX_PHYSICAL_PORTS; 1048 lp_lls_reg_t *port_reg = port_lp_enable; 1049 soc_info_t *si = &SOC_INFO(unit); 1050 1051 #if defined(BCM_METROLITE_SUPPORT) 1052 if(SOC_IS_METROLITE(unit)) { 1053 port_reg = sb2_port_lp_enable; 1054 max_valid_index = ML_MAX_PHYSICAL_PORTS; 1055 } else 1056 #endif 1057 #if defined(BCM_SABER2_SUPPORT) 1058 if(SOC_IS_SABER2(unit)) { 1059 port_reg = sb2_port_lp_enable; 1060 max_valid_index = SB2_MAX_PHYSICAL_PORTS; 1061 } 1062 #endif 1063 1064 if ((port_reg[port].reg != INVALIDr) && (port <= max_valid_index)) { 1065 SOC_IF_ERROR_RETURN 1066 (soc_reg32_get(unit, port_reg[port].reg, REG_PORT_ANY, 0, &rval)); 1067 soc_reg_field_set(unit, port_reg[port].reg, &rval, 1068 port_reg[port].field1, enable ? 1 : 0); 1069 SOC_IF_ERROR_RETURN 1070 (soc_reg32_set(unit, port_reg[port].reg, REG_PORT_ANY, 0, rval)); 1071 1072 /* Set the port as LinkPhy only if the port in question is a part of 1073 the linkphy_pbm */ 1074 if (SOC_PBMP_MEMBER(si->linkphy_pbm, port)) { 1075 if (SOC_REG_IS_VALID(unit, DEQ_EFIFO_CFGr)) { 1076 rval = 0; 1077 SOC_IF_ERROR_RETURN(READ_DEQ_EFIFO_CFGr(unit, port, &rval)); 1078 soc_reg_field_set(unit, DEQ_EFIFO_CFGr, &rval, 1079 EGRESS_FIFO_LINK_PHYf, enable ? 1 : 0); 1080 SOC_IF_ERROR_RETURN(WRITE_DEQ_EFIFO_CFGr(unit, port, rval)); 1081 } 1082 } 1083 } else { 1084 return SOC_E_PARAM; 1085 } 1086 1087 return SOC_E_NONE; 1088 } 1089 1090 int 1091 soc_kt2_cosq_two_s1s_in_s0_config_set(int unit, soc_port_t port, int enable) 1092 { 1093 lp_lls_reg_t *port_reg = port_lp_config; 1094 uint32 rval = 0; 1095 1096 #if defined (BCM_SABER2_SUPPORT) 1097 if (SOC_IS_SABER2(unit)) { 1098 uint32 two_s1s_in_s0_bmp = 0; 1099 1100 if (SOC_REG_IS_VALID(unit, LLS_TWO_S1S_IN_S0_CONFIGr)) { 1101 SOC_IF_ERROR_RETURN(READ_LLS_TWO_S1S_IN_S0_CONFIGr(unit, 1102 &rval)); 1103 two_s1s_in_s0_bmp = soc_reg_field_get(unit, 1104 LLS_TWO_S1S_IN_S0_CONFIGr, 1105 rval, TWO_S1S_IN_S0f); 1106 if (enable) { 1107 two_s1s_in_s0_bmp |= (1 << (port - 1)); 1108 } else { 1109 two_s1s_in_s0_bmp &= ~(1 << (port - 1)); 1110 } 1111 1112 soc_reg_field_set(unit, LLS_TWO_S1S_IN_S0_CONFIGr, 1113 &rval, TWO_S1S_IN_S0f, 1114 (two_s1s_in_s0_bmp & 0xf)); 1115 SOC_IF_ERROR_RETURN(WRITE_LLS_TWO_S1S_IN_S0_CONFIGr(unit, 1116 rval)); 1117 } 1118 } else 1119 #endif 1120 { 1121 SOC_IF_ERROR_RETURN 1122 (soc_reg32_get(unit, port_reg[port].reg, REG_PORT_ANY, 0, &rval)); 1123 if (SOC_REG_FIELD_VALID(unit, port_reg[port].reg, TWO_S1S_IN_S0f)) { 1124 soc_reg_field_set(unit, port_reg[port].reg, &rval, 1125 TWO_S1S_IN_S0f, enable); 1126 } 1127 SOC_IF_ERROR_RETURN 1128 (soc_reg32_set(unit, port_reg[port].reg, REG_PORT_ANY, 0, rval)); 1129 } 1130 1131 return SOC_E_NONE; 1132 } 1133 1134 uint32 1135 soc_kt2_cosq_two_s1s_in_s0_config_get(int unit, soc_port_t port) 1136 { 1137 lp_lls_reg_t *port_reg = port_lp_config; 1138 uint32 rval = 0; 1139 1140 #if defined (BCM_METROLITE_SUPPORT) 1141 if (SOC_IS_METROLITE(unit)) { 1142 return rval; 1143 } 1144 #endif 1145 #if defined (BCM_SABER2_SUPPORT) 1146 if (SOC_IS_SABER2(unit)) { 1147 uint32 two_s1s_in_s0_bmp = 0; 1148 SOC_IF_ERROR_RETURN(READ_LLS_TWO_S1S_IN_S0_CONFIGr(unit, 1149 &rval)); 1150 two_s1s_in_s0_bmp = soc_reg_field_get(unit, 1151 LLS_TWO_S1S_IN_S0_CONFIGr, 1152 rval, TWO_S1S_IN_S0f); 1153 1154 return (two_s1s_in_s0_bmp & (1 << (port - 1))); 1155 } else 1156 #endif 1157 { 1158 SOC_IF_ERROR_RETURN 1159 (soc_reg32_get(unit, port_reg[port].reg, REG_PORT_ANY, 0, &rval)); 1160 if (SOC_REG_FIELD_VALID(unit, port_reg[port].reg, TWO_S1S_IN_S0f)) { 1161 return (soc_reg_field_get(unit, port_reg[port].reg, rval, 1162 TWO_S1S_IN_S0f)); 1163 } 1164 } 1165 1166 return 0; 1167 } 1168 1169 int 1170 soc_kt2_cosq_s1_range_set(int unit, soc_port_t port, 1171 int start_s1, int end_s1, int type) 1172 { 1173 uint32 rval = 0, max_port = KT2_MAX_PHYSICAL_PORTS; 1174 lp_lls_reg_t *port_reg = port_lp_config; 1175 #if defined(BCM_SABER2_SUPPORT) 1176 uint32 lp_enable_config = 0, lp_enable_bmp = 0; 1177 #endif 1178 1179 #if defined (BCM_METROLITE_SUPPORT) 1180 if (SOC_IS_METROLITE(unit)) { 1181 max_port = ML_MAX_PHYSICAL_PORTS; 1182 port_reg = sb2_port_lp_config; 1183 } else 1184 #endif 1185 #if defined(BCM_SABER2_SUPPORT) 1186 if(SOC_IS_SABER2(unit)) { 1187 max_port = SB2_MAX_PHYSICAL_PORTS; 1188 port_reg = sb2_port_lp_config; 1189 } 1190 #endif 1191 1192 if ((port_reg[port].reg != INVALIDr) && (port <= max_port)) { 1193 soc_reg_field_set(unit, port_reg[port].reg, &rval, 1194 port_reg[port].field1, start_s1); 1195 soc_reg_field_set(unit, port_reg[port].reg, &rval, 1196 port_reg[port].field2, end_s1); 1197 1198 #if defined(BCM_SABER2_SUPPORT) 1199 if (SOC_IS_SABER2(unit)) { 1200 SOC_IF_ERROR_RETURN(READ_LLS_LINK_PHY_ENABLED_CONFIGr(unit, 1201 &lp_enable_config)); 1202 lp_enable_bmp = soc_reg_field_get(unit, 1203 LLS_LINK_PHY_ENABLED_CONFIGr, 1204 lp_enable_config, LINKPHY_ENABLEDf); 1205 if (type) { 1206 /* Set the port in the bitmap. */ 1207 lp_enable_bmp |= ((1 << (port - 1)) & 0xF); 1208 } else { 1209 /* Reset the port in the bitmap. */ 1210 lp_enable_bmp &= ~((1 << (port - 1)) & 0xF); 1211 } 1212 soc_reg_field_set(unit, LLS_LINK_PHY_ENABLED_CONFIGr, 1213 &lp_enable_config, LINKPHY_ENABLEDf, 1214 lp_enable_bmp); 1215 SOC_IF_ERROR_RETURN(WRITE_LLS_LINK_PHY_ENABLED_CONFIGr(unit, 1216 lp_enable_config)); 1217 #if defined(BCM_METROLITE_SUPPORT) 1218 if (SOC_IS_METROLITE(unit)) { 1219 soc_reg_field_set(unit, TOQ_LINKPHY_ENABLEr, 1220 &lp_enable_config, CFG_PORT_LINK_PHY_ENf, 1221 (lp_enable_bmp << 1)); 1222 SOC_IF_ERROR_RETURN(WRITE_TOQ_LINKPHY_ENABLEr(unit, 1223 lp_enable_config)); 1224 } 1225 #endif 1226 } 1227 #endif 1228 if (SOC_REG_FIELD_VALID(unit, port_reg[port].reg, LINKPHY_ENABLEDf)) { 1229 soc_reg_field_set(unit, port_reg[port].reg, &rval, 1230 LINKPHY_ENABLEDf, type); 1231 } 1232 1233 SOC_IF_ERROR_RETURN 1234 (soc_reg32_set(unit, port_reg[port].reg, REG_PORT_ANY, 0, rval)); 1235 1236 SOC_IF_ERROR_RETURN(soc_kt2_cosq_two_s1s_in_s0_config_set(unit, port, 1237 type)); 1238 } else { 1239 return SOC_E_PARAM; 1240 } 1241 1242 return SOC_E_NONE; 1243 } 1244 1245 int 1246 soc_kt2_cosq_repl_map_set(int unit, soc_port_t port, 1247 int start, int end, int enable) 1248 { 1249 mmu_repl_map_tbl_entry_t map_entry; 1250 uint32 pp_port; 1251 int i, min_index = SOC_INFO(unit).pp_port_index_min; 1252 1253 #if defined (BCM_METROLITE_SUPPORT) 1254 int pp_port_free = 0; 1255 pbmp_t pp_port_unused_bitmap; 1256 SOC_PBMP_ASSIGN(pp_port_unused_bitmap, SOC_PORT_PP_BITMAP(unit, port)); 1257 #endif 1258 1259 for (i = start; i <= end; i++) { 1260 sal_memset(&map_entry, 0, sizeof(mmu_repl_map_tbl_entry_t)); 1261 if (enable) { 1262 #if defined (BCM_METROLITE_SUPPORT) 1263 if (soc_feature(unit, soc_feature_discontinuous_pp_port)) { 1264 SOC_PBMP_ITER(pp_port_unused_bitmap, pp_port_free) { 1265 pp_port = pp_port_free; 1266 SOC_PBMP_PORT_REMOVE(pp_port_unused_bitmap, pp_port_free); 1267 break; 1268 } 1269 } else 1270 #endif 1271 { 1272 pp_port = (i + min_index); 1273 } 1274 soc_MMU_REPL_MAP_TBLm_field_set(unit, &map_entry, 1275 DEST_PPPf, &pp_port); 1276 } 1277 SOC_IF_ERROR_RETURN(WRITE_MMU_REPL_MAP_TBLm(unit, 1278 MEM_BLOCK_ALL, i, &map_entry)); 1279 } 1280 1281 return SOC_E_NONE; 1282 } 1283 1284 int 1285 soc_kt2_cosq_lp_repl_map_set(int unit, int stream, uint32 pp_port, int enable) 1286 { 1287 mmu_repl_map_tbl_entry_t map_entry; 1288 uint32 pp_port_local = pp_port; 1289 1290 sal_memset(&map_entry, 0, sizeof(mmu_repl_map_tbl_entry_t)); 1291 1292 if (enable) { 1293 soc_MMU_REPL_MAP_TBLm_field_set(unit, &map_entry, 1294 DEST_PPPf, &pp_port_local); 1295 } 1296 SOC_IF_ERROR_RETURN(WRITE_MMU_REPL_MAP_TBLm(unit, 1297 MEM_BLOCK_ALL, stream, &map_entry)); 1298 1299 return SOC_E_NONE; 1300 } 1301 1302 STATIC int 1303 _soc_kt2_port_get_cascaded_mode(int unit, int port, int *mode) { 1304 soc_mem_t mem = EGR_PHYSICAL_PORTm; 1305 int port_type; 1306 uint32 entry[SOC_MAX_MEM_WORDS]; 1307 int rv = SOC_E_NONE; 1308 1309 if (!mode) { 1310 return SOC_E_PARAM; 1311 } 1312 *mode = -1; 1313 1314 rv = soc_mem_read(unit, mem, MEM_BLOCK_ALL, port, &entry); 1315 if (rv) { 1316 LOG_CLI((BSL_META_U(unit, 1317 "Failed to read memory %d at index: %d\n"), mem, port)); 1318 return rv; 1319 } 1320 1321 port_type = soc_mem_field32_get(unit, mem, entry, PORT_TYPEf); 1322 if (port_type != _SOC_COE_PORT_TYPE_CASCADED) { 1323 return SOC_E_CONFIG; 1324 } 1325 *mode = soc_mem_field32_get(unit, mem, entry, CASCADED_PORT_TYPEf); 1326 return SOC_E_NONE; 1327 } 1328 1329 STATIC 1330 int _bcm_kt2_is_active_cascaded_port(int unit, soc_port_t port) 1331 { 1332 int cascaded_mode = -1, rv = 0; 1333 rv = _soc_kt2_port_get_cascaded_mode(unit, port, &cascaded_mode); 1334 if ((rv == SOC_E_NONE) && 1335 ((cascaded_mode == _SOC_COE_PORT_TYPE_CASCADED_LINKPHY) || 1336 (cascaded_mode == _SOC_COE_PORT_TYPE_CASCADED_SUBTAG))) { 1337 return TRUE; 1338 } 1339 return FALSE; 1340 } 1341 1342 int 1343 soc_kt2_sched_get_node_config(int unit, soc_port_t port, int level, int index, 1344 int *pnum_spri, int *pfirst_child, 1345 int *pfirst_mc_child, uint32 *pucmap, 1346 uint32 *pspmap) 1347 { 1348 uint32 entry[SOC_MAX_MEM_WORDS]; 1349 soc_mem_t mem; 1350 uint32 num_spri = 0, ucmap = 0, f1, f2; 1351 int first_child = -1, first_mc_child = -1, ii; 1352 int sp_vec = soc_feature(unit, soc_feature_vector_based_spri); 1353 soc_info_t *si; 1354 #if defined BCM_METROLITE_SUPPORT 1355 int phy_port; 1356 #endif 1357 1358 *pspmap = 0; 1359 1360 si = &SOC_INFO(unit); 1361 1362 if (SOC_PBMP_MEMBER(si->linkphy_pbm, port)) { 1363 mem = _SOC_KT2_NODE_CONFIG_LINKPHY_MEM(level); 1364 if (level == _SOC_KT2_COSQ_NODE_LVL_S0) { 1365 /* 1366 * S0 config - two S1 model per S0 1367 */ 1368 *pnum_spri = 2; 1369 *pfirst_child = index * 2; 1370 *pspmap = 3; 1371 *pfirst_mc_child = *pucmap = 0; 1372 return SOC_E_NONE; 1373 1374 } 1375 if (level == _SOC_KT2_COSQ_NODE_LVL_S1) { 1376 /* 1377 * S1 level scheduling nodes 1378 * each S1 is connected to only one L0 1379 * S1 and L0 node address are same 1380 */ 1381 1382 *pnum_spri = 1; 1383 *pfirst_child = index; 1384 *pspmap = 1; 1385 *pfirst_mc_child = *pucmap = 0; 1386 return SOC_E_NONE; 1387 1388 } 1389 } else { 1390 mem = _SOC_KT2_NODE_CONFIG_MEM(level); 1391 } 1392 1393 #if defined BCM_METROLITE_SUPPORT 1394 if (soc_feature(unit, soc_feature_discontinuous_pp_port)) { 1395 phy_port = soc_ml_pp_port_get_port(unit, port); 1396 if ((phy_port != -1) && _bcm_kt2_is_active_cascaded_port(unit, phy_port) && 1397 level == SOC_KT2_NODE_LVL_ROOT) { 1398 mem = LLS_S1_CONFIGm ; 1399 } 1400 } else 1401 #endif 1402 { 1403 if (port >= SOC_INFO(unit).pp_port_index_min && level == SOC_KT2_NODE_LVL_ROOT) { 1404 mem = LLS_S1_CONFIGm ; 1405 } 1406 } 1407 1408 if (mem == INVALIDm) { 1409 return SOC_E_INTERNAL; 1410 } 1411 SOC_IF_ERROR_RETURN(soc_mem_read(unit, mem, MEM_BLOCK_ALL, index, &entry)); 1412 if (sp_vec) { 1413 f1 = soc_mem_field32_get(unit, mem, &entry, P_NUM_SPRIf); 1414 f2 = soc_mem_field32_get(unit, mem, &entry, P_VECT_SPRI_7_4f); 1415 *pspmap = f1 | (f2 << 4); 1416 for (ii = 0; ii < 32; ii++) { 1417 if ((1 << ii) & *pspmap) { 1418 num_spri++; 1419 } 1420 } 1421 } else { 1422 num_spri = soc_mem_field32_get(unit, mem, &entry, P_NUM_SPRIf); 1423 } 1424 1425 if (mem == LLS_L1_CONFIGm) { 1426 first_child = soc_mem_field32_get(unit, mem, &entry, P_START_UC_SPRIf); 1427 first_mc_child = soc_mem_field32_get(unit, mem, 1428 &entry, P_START_MC_SPRIf) + 1024; 1429 ucmap = soc_mem_field32_get(unit, mem, &entry, P_SPRI_SELECTf); 1430 } else { 1431 first_child = soc_mem_field32_get(unit, mem, &entry, P_START_SPRIf); 1432 first_mc_child = 0; 1433 } 1434 1435 if (num_spri == 0) { 1436 ucmap = 0; 1437 } 1438 1439 if (pnum_spri) { 1440 *pnum_spri = num_spri; 1441 } 1442 1443 if (pucmap) { 1444 *pucmap = ucmap; 1445 } 1446 1447 if (pfirst_child) { 1448 *pfirst_child = first_child; 1449 } 1450 1451 if (pfirst_mc_child) { 1452 *pfirst_mc_child = first_mc_child; 1453 } 1454 return SOC_E_NONE; 1455 } 1456 1457 int 1458 soc_kt2_sched_weight_get(int unit, soc_port_t port, int level, int index, int *weight) 1459 { 1460 soc_mem_t mem_weight; 1461 soc_info_t *si; 1462 uint32 entry[SOC_MAX_MEM_WORDS]; 1463 1464 si = &SOC_INFO(unit); 1465 1466 if (SOC_PBMP_MEMBER(si->linkphy_pbm, port)) { 1467 mem_weight = _SOC_KT2_NODE_WIEGHT_LINKPHY_MEM(level); 1468 } else { 1469 mem_weight = _SOC_KT2_NODE_WIEGHT_MEM(level); 1470 } 1471 1472 SOC_IF_ERROR_RETURN 1473 (soc_mem_read(unit, mem_weight, MEM_BLOCK_ALL, index, &entry)); 1474 1475 *weight = soc_mem_field32_get(unit, mem_weight, &entry, C_WEIGHTf); 1476 1477 LOG_INFO(BSL_LS_SOC_COSQ, 1478 (BSL_META_U(unit, 1479 "sched_weight_get L%d index=%d wt=%d\n"), 1480 level, index, *weight)); 1481 return SOC_E_NONE; 1482 } 1483 1484 int 1485 soc_kt2_cosq_get_sched_mode(int unit, soc_port_t port, int level, int index, 1486 soc_kt2_sched_mode_e *pmode, int *weight) 1487 { 1488 uint32 entry[SOC_MAX_MEM_WORDS]; 1489 soc_mem_t mem; 1490 soc_kt2_sched_mode_e mode = SOC_KT2_SCHED_MODE_UNKNOWN; 1491 soc_info_t *si; 1492 #if defined BCM_METROLITE_SUPPORT 1493 int level_iter; 1494 #endif 1495 si = &SOC_INFO(unit); 1496 1497 /* S0 nodes are always in RR mode */ 1498 if ((SOC_PBMP_MEMBER(si->linkphy_pbm, port)) && 1499 (level == _SOC_KT2_COSQ_NODE_LVL_S0)) { 1500 if (pmode) { 1501 *pmode = SOC_KT2_SCHED_MODE_WRR; 1502 } 1503 if (weight) { 1504 *weight = 1; 1505 } 1506 return SOC_E_NONE; 1507 } 1508 1509 /* get S1 nodes scheduling */ 1510 if ((SOC_PBMP_MEMBER(si->linkphy_pbm, port)) && 1511 (level == _SOC_KT2_COSQ_NODE_LVL_S1)) { 1512 SOC_IF_ERROR_RETURN(soc_kt2_cosq_s0_sched_get(unit, index, pmode)); 1513 return SOC_E_NONE; 1514 } 1515 SOC_IF_ERROR_RETURN(soc_kt2_sched_weight_get(unit, port, level, index, weight)); 1516 if (*weight == 0) { 1517 mode = SOC_KT2_SCHED_MODE_STRICT; 1518 } else { 1519 if (SOC_PBMP_MEMBER(si->linkphy_pbm, port)) { 1520 mem = _SOC_KT2_NODE_CONFIG_LINKPHY_MEM(_SOC_KT2_COSQ_NODE_LVL_ROOT); 1521 } else { 1522 mem = _SOC_KT2_NODE_CONFIG_MEM(SOC_KT2_NODE_LVL_ROOT); 1523 } 1524 1525 #if defined BCM_METROLITE_SUPPORT 1526 if (soc_feature(unit, soc_feature_discontinuous_pp_port)) { 1527 if (_SOC_IS_PP_PORT_LINKPHY_SUBTAG(unit, port)) { 1528 level_iter = level; 1529 while(level_iter != SOC_KT2_NODE_LVL_ROOT) { 1530 mem = _SOC_KT2_NODE_PARENT_MEM(level_iter); 1531 SOC_IF_ERROR_RETURN( 1532 soc_mem_read(unit, mem, MEM_BLOCK_ALL, index, &entry)); 1533 index = soc_mem_field32_get(unit, mem, entry, C_PARENTf); 1534 level_iter--; 1535 } 1536 mem = LLS_S1_CONFIGm ; 1537 } else { 1538 index = port; 1539 } 1540 } else 1541 #endif 1542 { 1543 if (port >= SOC_INFO(unit).pp_port_index_min){ 1544 mem = LLS_S1_CONFIGm; 1545 } 1546 index = port; 1547 } 1548 1549 SOC_IF_ERROR_RETURN( 1550 soc_mem_read(unit, mem, MEM_BLOCK_ALL, index, &entry)); 1551 if (soc_mem_field32_get(unit, mem, entry, PACKET_MODE_WRR_ACCOUNTING_ENABLEf)) { 1552 mode = SOC_KT2_SCHED_MODE_WRR; 1553 } else { 1554 mode = SOC_KT2_SCHED_MODE_WDRR; 1555 } 1556 } 1557 1558 if (pmode) { 1559 *pmode = mode; 1560 } 1561 1562 return SOC_E_NONE; 1563 } 1564 1565 int soc_kt2_get_child_type(int unit, soc_port_t port, int level, 1566 int *child_type) 1567 { 1568 *child_type = -1; 1569 1570 if (level == SOC_KT2_NODE_LVL_ROOT) { 1571 *child_type = SOC_KT2_NODE_LVL_L0; 1572 } else if (level == SOC_KT2_NODE_LVL_L0) { 1573 *child_type = SOC_KT2_NODE_LVL_L1; 1574 } else if (level == SOC_KT2_NODE_LVL_L1) { 1575 *child_type = SOC_KT2_NODE_LVL_L2; 1576 } 1577 return SOC_E_NONE; 1578 } 1579 1580 1581 int _soc_kt2_invalid_parent_index(int unit, int level) 1582 { 1583 int index_max = 0; 1584 1585 switch (level) { 1586 case SOC_KT2_NODE_LVL_ROOT: 1587 index_max = 0; 1588 break; 1589 case SOC_KT2_NODE_LVL_L0: 1590 index_max = (1 << soc_mem_field_length(unit, LLS_L0_PARENTm, C_PARENTf)) - 1; 1591 break; 1592 case SOC_KT2_NODE_LVL_L1: 1593 index_max = (1 << soc_mem_field_length(unit, LLS_L1_PARENTm, C_PARENTf)) - 1; 1594 break; 1595 case SOC_KT2_NODE_LVL_L2: 1596 index_max = (1 << soc_mem_field_length(unit, LLS_L2_PARENTm, C_PARENTf)) - 1; 1597 break; 1598 default: 1599 break; 1600 1601 } 1602 1603 return index_max; 1604 } 1605 1606 #define INVALID_PARENT(unit, level) _soc_kt2_invalid_parent_index((unit),(level)) 1607 1608 /* Programming all the entries with the Invalid Parent Pointer */ 1609 int 1610 _soc_katana2_mmu_set_invalid_parent(int unit) 1611 { 1612 int level, index_max, index; 1613 soc_mem_t mem; 1614 uint32 entry[SOC_MAX_MEM_WORDS]; 1615 1616 for (level = SOC_KT2_NODE_LVL_L0; level <= SOC_KT2_NODE_LVL_L2; 1617 level++) { 1618 mem = _SOC_KT2_NODE_PARENT_MEM(level); 1619 /* coverity[negative_returns : FALSE] */ 1620 index_max = soc_mem_index_max(unit, mem); 1621 for (index = 0; index <= index_max; index++) { 1622 SOC_IF_ERROR_RETURN 1623 (soc_mem_read(unit, mem, MEM_BLOCK_ALL, index, &entry)); 1624 soc_mem_field32_set(unit, mem, entry, 1625 C_PARENTf, INVALID_PARENT(unit, level)); 1626 SOC_IF_ERROR_RETURN 1627 (soc_mem_write(unit, mem, MEM_BLOCK_ALL, index, &entry)); 1628 } 1629 } 1630 return SOC_E_NONE; 1631 } 1632 1633 STATIC int 1634 _soc_kt2_dump_sched_at(int unit, int port, int level, int offset, int hw_index) 1635 { 1636 soc_info_t *si = &SOC_INFO(unit); 1637 int num_spri, first_child, first_mc_child, rv, cindex; 1638 uint32 ucmap, spmap; 1639 soc_kt2_sched_mode_e sched_mode; 1640 soc_mem_t mem; 1641 int index_max, ii, ci, child_level; 1642 int wt = 0, num_child; 1643 uint32 entry[SOC_MAX_MEM_WORDS]; 1644 char *lvl_name[] = { "Root", "L0", "L1", "L2" }; 1645 char *sched_modes[] = {"X", "SP", "WRR", "WDRR"}; 1646 int ctype = 0; 1647 int mcstart = 0; 1648 #if defined BCM_METROLITE_SUPPORT 1649 int phy_port = -1; 1650 #endif 1651 1652 if ((level >= SOC_KT2_NODE_LVL_L0) && (hw_index == INVALID_PARENT(unit, level))) { 1653 return SOC_E_NONE; 1654 } 1655 /* get sched config */ 1656 SOC_IF_ERROR_RETURN( 1657 soc_kt2_sched_get_node_config(unit, port, level, hw_index, 1658 &num_spri, &first_child, &first_mc_child, &ucmap, &spmap)); 1659 sched_mode = 0; 1660 if (level != SOC_KT2_NODE_LVL_ROOT) { 1661 SOC_IF_ERROR_RETURN( 1662 soc_kt2_cosq_get_sched_mode(unit, port, level, hw_index, &sched_mode, &wt)); 1663 } 1664 1665 if (level == SOC_KT2_NODE_LVL_L1) { 1666 LOG_CLI((BSL_META_U(unit, 1667 " %s.%d : INDEX=%d NUM_SP=%d FC=%d FMC=%d " 1668 "UCMAP=0x%08x SPMAP=0x%08x MODE=%s WT=%d\n"), 1669 lvl_name[level], offset, hw_index, num_spri, 1670 first_child, first_mc_child, ucmap, spmap, 1671 sched_modes[sched_mode], wt)); 1672 } else { 1673 LOG_CLI((BSL_META_U(unit, 1674 " %s.%d : INDEX=%d NUM_SPRI=%d FC=%d " 1675 "SPMAP=0x%08x MODE=%s Wt=%d\n"), 1676 lvl_name[level], offset, hw_index, num_spri, first_child, 1677 spmap, sched_modes[sched_mode], wt)); 1678 } 1679 if (port != 0 && first_child == 0) { 1680 return SOC_E_NONE; 1681 } 1682 1683 soc_kt2_get_child_type(unit, port, level, &child_level); 1684 mem = _SOC_KT2_NODE_PARENT_MEM(child_level); 1685 1686 if(mem == INVALIDm) { 1687 return SOC_E_INTERNAL; 1688 } 1689 index_max = soc_mem_index_max(unit, mem); 1690 1691 num_child = 0; 1692 for (ii = 0, ci = 0; ii < index_max; ii++) { 1693 rv = soc_mem_read(unit, mem, MEM_BLOCK_ALL, ii, &entry); 1694 if (rv) { 1695 LOG_CLI((BSL_META_U(unit, 1696 "Failed to read memory at index: %d\n"), ii)); 1697 break; 1698 } 1699 1700 cindex = soc_mem_field32_get(unit, mem, entry, C_PARENTf); 1701 1702 if (cindex == INVALID_PARENT(unit, child_level)) { 1703 continue; 1704 } 1705 1706 if (child_level == SOC_KT2_NODE_LVL_L0){ 1707 /*The ctype value gives the parent type of this l0 node 1708 if the ctype is 1 the its parent is physical port 1709 If its 0 then the parent is subport . 1710 */ 1711 ctype = soc_mem_field32_get(unit, mem, entry, C_TYPEf); 1712 if(!ctype ) 1713 { 1714 #if defined BCM_METROLITE_SUPPORT 1715 if (soc_feature(unit, soc_feature_discontinuous_pp_port)) { 1716 phy_port = soc_ml_pp_port_get_port(unit, port); 1717 if ((phy_port != -1) && 1718 !_bcm_kt2_is_active_cascaded_port(unit, phy_port)) { 1719 continue; 1720 } 1721 } else 1722 #endif 1723 { 1724 if(port < si->cpu_hg_index) { 1725 continue; 1726 } 1727 } 1728 } 1729 else { 1730 #if defined BCM_METROLITE_SUPPORT 1731 if (soc_feature(unit, soc_feature_discontinuous_pp_port)) { 1732 phy_port = soc_ml_pp_port_get_port(unit, port); 1733 if ((phy_port != -1) && 1734 _bcm_kt2_is_active_cascaded_port(unit, phy_port)) { 1735 continue; 1736 } 1737 } else 1738 #endif 1739 { 1740 if(port >= si->cpu_hg_index) { 1741 continue; 1742 } 1743 } 1744 } 1745 } 1746 1747 if (cindex == hw_index) { 1748 if (child_level == SOC_KT2_NODE_LVL_L2) { 1749 SOC_IF_ERROR_RETURN(soc_kt2_cosq_get_sched_mode(unit, port, 1750 SOC_KT2_NODE_LVL_L2, ii, &sched_mode, &wt)); 1751 if (SOC_IS_SABER2(unit)) { 1752 mcstart = 512; 1753 } else { 1754 mcstart = 2048 ; 1755 } 1756 LOG_CLI((BSL_META_U(unit, 1757 " L2.%s INDEX=%d Mode=%s WEIGHT=%d\n"), 1758 ((ii < mcstart) ? "uc" : "mc"), 1759 ii, sched_modes[sched_mode], wt)); 1760 } else { 1761 _soc_kt2_dump_sched_at(unit, port, child_level, ci, ii); 1762 ci += 1; 1763 } 1764 num_child += 1; 1765 } 1766 } 1767 if (num_child == 0) { 1768 LOG_CLI((BSL_META_U(unit, 1769 "*** No children \n"))); 1770 } 1771 return SOC_E_NONE; 1772 } 1773 1774 int soc_kt2_dump_port_lls(int unit, int port,int subport) 1775 { 1776 soc_info_t *si = &SOC_INFO(unit); 1777 int rv, cascaded_mode = -1; 1778 #if defined BCM_METROLITE_SUPPORT 1779 _bcm_kt2_subport_info_t info; 1780 int s1; 1781 #endif 1782 1783 if (!subport) { 1784 LOG_CLI((BSL_META_U(unit, 1785 "-------%s (LLS)------\n"), SOC_PORT_NAME(unit, (port)))); 1786 #if defined BCM_METROLITE_SUPPORT 1787 if (soc_feature(unit, soc_feature_discontinuous_pp_port)) { 1788 if (_bcm_kt2_is_active_cascaded_port(unit, port)) { 1789 return SOC_E_NONE; 1790 } 1791 } 1792 #endif 1793 _soc_kt2_dump_sched_at(unit, port, SOC_KT2_NODE_LVL_ROOT, 0, port); 1794 } 1795 else { 1796 LOG_CLI((BSL_META_U(unit, 1797 "-------%s subport %d (LLS)------\n"),SOC_PORT_NAME(unit, 1798 (port)), subport)); 1799 #if defined BCM_METROLITE_SUPPORT 1800 if (soc_feature(unit, soc_feature_discontinuous_pp_port)) { 1801 if (!_bcm_kt2_is_active_cascaded_port(unit, port)) { 1802 return SOC_E_NONE; 1803 } 1804 } else 1805 #endif 1806 { 1807 rv = _soc_kt2_port_get_cascaded_mode(unit, port, &cascaded_mode); 1808 if ((rv != 0) || (cascaded_mode == _SOC_COE_PORT_TYPE_CASCADED_LINKPHY)) { 1809 return SOC_E_NONE; 1810 } 1811 } 1812 1813 1814 #if defined BCM_METROLITE_SUPPORT 1815 if (soc_feature(unit, soc_feature_discontinuous_pp_port)) { 1816 SOC_IF_ERROR_RETURN 1817 (bcm_kt2_subport_pp_port_subport_info_get(unit, subport, 1818 &info)); 1819 if (info.port_type == _BCM_KT2_SUBPORT_TYPE_SUBTAG) { 1820 BCM_IF_ERROR_RETURN 1821 (bcm_kt2_subport_pp_port_s1_index_get(unit, subport, &s1)); 1822 1823 _soc_kt2_dump_sched_at(unit, subport, SOC_KT2_NODE_LVL_ROOT, 0, 1824 s1); 1825 } 1826 } else 1827 #endif 1828 { 1829 /* lls_s1_config is 128 entries long so reducing 42 from the subport number*/ 1830 _soc_kt2_dump_sched_at(unit, subport, SOC_KT2_NODE_LVL_ROOT, 0, 1831 (subport - si->cpu_hg_index)); 1832 } 1833 } 1834 1835 return SOC_E_NONE; 1836 } 1837 1838 #endif /* defined(BCM_KATANA2_SUPPORT) */