avs.c (3871B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * File: avs.c 8 * Purpose: 9 * Requires: 10 */ 11 12 #include <shared/bsl.h> 13 14 #ifdef INCLUDE_AVS 15 #include <soc/avs.h> 16 #include <soc/i2c.h> 17 18 #define SOC_AVS_HR3_NUMBER_OF_CENTRALS 36 19 #define SOC_AVS_HR3_CENTRAL_XBMP0 0x0 20 #define SOC_AVS_HR3_CENTRAL_XBMP1 0xFFFFFFF0 21 #define SOC_AVS_HR3_FIRST_CENTRAL 0 22 23 #define SOC_AVS_HR3_NUMBER_OF_REMOTES 11 24 #define SOC_AVS_HR3_REMOTE_XBMP0 0x0 25 #define SOC_AVS_HR3_FIRST_REMOTE 0 26 27 #define SOC_AVS_HR3_VMIN_AVS SOC_AVS_DEFAULT_VMIN_AVS 28 #define SOC_AVS_HR3_VMAX_AVS SOC_AVS_DEFAULT_VMAX_AVS 29 #define SOC_AVS_HR3_VMARGIN_HIGH SOC_AVS_DEFAULT_VMARGIN_HIGH 30 #define SOC_AVS_HR3_VMARGIN_LOW SOC_AVS_DEFAULT_VMARGIN_LOW 31 32 33 34 static soc_avs_reg_info_t _hr3_osc_cen_init_list[]={ 35 /* AVS_REG_HW_MNTR_ENABLE_DEFAULT_CEN_ROSC_0r */ 36 {AVS_REG_HW_MNTR_ENABLE_DEFAULT_CEN_ROSC_0r,CEN_ROSC_ENABLE_DEFAULTf}, 37 {AVS_REG_HW_MNTR_ENABLE_DEFAULT_CEN_ROSC_1r,CEN_ROSC_ENABLE_DEFAULTf}, 38 {-1,-1}, 39 }; 40 41 static soc_avs_reg_info_t _hr3_osc_cen_thr_en_list[]={ 42 {AVS_REG_ROSC_THRESHOLD_1_CEN_ROSC_THRESHOLD1_EN_0r,IRQ_ENf}, 43 {AVS_REG_ROSC_THRESHOLD_1_CEN_ROSC_THRESHOLD1_EN_1r,IRQ_ENf}, 44 {AVS_REG_ROSC_THRESHOLD_2_CEN_ROSC_THRESHOLD2_EN_0r,IRQ_ENf}, 45 {AVS_REG_ROSC_THRESHOLD_2_CEN_ROSC_THRESHOLD2_EN_1r,IRQ_ENf}, 46 {-1,-1}, 47 }; 48 49 /* reset osc measurement */ 50 static soc_avs_reg_info_t _hr3_osc_seq_reset_list[]={ 51 {AVS_REG_HW_MNTR_MEASUREMENTS_INIT_CEN_ROSC_0r,M_INIT_CEN_ROSCf}, 52 {AVS_REG_HW_MNTR_MEASUREMENTS_INIT_CEN_ROSC_1r,M_INIT_CEN_ROSCf}, 53 {AVS_REG_HW_MNTR_MEASUREMENTS_INIT_RMT_ROSC_0r,M_INIT_RMT_ROSCf}, 54 {-1,-1} 55 }; 56 57 int 58 _soc_hr3_avs_info_init(int unit, soc_avs_info_t *avs_info) 59 { 60 61 if (avs_info == NULL) { 62 return (SOC_E_PARAM); 63 } 64 65 avs_info->num_centrals = SOC_AVS_HR3_NUMBER_OF_CENTRALS; 66 avs_info->cent_xbmp[0] = SOC_AVS_HR3_CENTRAL_XBMP0; 67 avs_info->cent_xbmp[1] = SOC_AVS_HR3_CENTRAL_XBMP1; 68 avs_info->first_cent = SOC_AVS_HR3_FIRST_CENTRAL; 69 70 avs_info->num_remotes = SOC_AVS_HR3_NUMBER_OF_REMOTES; 71 avs_info->rmt_xbmp[0] = SOC_AVS_HR3_REMOTE_XBMP0; 72 avs_info->first_rmt = SOC_AVS_HR3_FIRST_REMOTE; 73 74 avs_info->vmin_avs = SOC_AVS_INT(SOC_AVS_HR3_VMIN_AVS); 75 avs_info->vmax_avs = SOC_AVS_INT(SOC_AVS_HR3_VMAX_AVS); 76 avs_info->vmargin_low = SOC_AVS_INT(SOC_AVS_HR3_VMARGIN_LOW); 77 avs_info->vmargin_high = SOC_AVS_INT(SOC_AVS_HR3_VMARGIN_HIGH); 78 79 avs_info->rosc_count_mode = SOC_AVS_ROSC_COUNT_MODE_1EDGE; 80 avs_info->ref_clk_freq = 25; 81 avs_info->measurement_time_control = 127; 82 avs_info->osc_cen_init_info = _hr3_osc_cen_init_list; 83 avs_info->osc_cen_thr_en_info = _hr3_osc_cen_thr_en_list; 84 avs_info->osc_seq_reset_info = _hr3_osc_seq_reset_list; 85 86 avs_info->avs_flags = SOC_AVS_INFO_F_SET_THRESHOLDS | 87 SOC_AVS_INFO_F_RSOC_THRESHOLD_CACHE; 88 89 #ifdef BCM_SBUSDMA_SUPPORT 90 if (soc_feature(unit, soc_feature_sbusdma)) { 91 avs_info->avs_flags |= SOC_AVS_INFO_F_RSOC_COUNT_DMA; 92 avs_info->cen_osc_reg = AVS_REG_RO_REGISTERS_0_CEN_ROSC_STATUSr; 93 avs_info->rmt_osc_reg = AVS_REG_PMB_SLAVE_AVS_ROSC_COUNTr; 94 } 95 #endif 96 return SOC_E_NONE; 97 } 98 99 int 100 _soc_hr3_avs_info_deinit(int unit) 101 { 102 103 int rv = SOC_E_NONE; 104 105 return rv; 106 } 107 108 soc_avs_functions_t _hr3_avs_functions; 109 110 int 111 soc_hr3_avs_init(int unit) 112 { 113 /* register avs functions*/ 114 memset(&_hr3_avs_functions, 0, sizeof(soc_avs_functions_t)); 115 _hr3_avs_functions.info_init = &_soc_hr3_avs_info_init; 116 _hr3_avs_functions.info_deinit = &_soc_hr3_avs_info_deinit; 117 #if 0 118 _hr3_avs_functions.voltage_set = NULL; 119 _hr3_avs_functions.voltage_get = NULL; 120 #endif 121 soc_avs_function_register(unit, &_hr3_avs_functions); 122 return 0; 123 } 124 #endif /* INCLUDE_AVS */