bondoptions.c (13335B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * File: bondoptions.c 8 * Purpose: Populates Apache Bond Options Info. 9 * Requires: SOC Common Bond Options Initializer. 10 */ 11 12 #include <shared/bsl.h> 13 14 #include <soc/defs.h> 15 16 #ifdef BCM_APACHE_SUPPORT 17 18 #include <soc/apache.h> 19 #include <soc/bondoptions.h> 20 21 #include <shared/bitop.h> 22 #include <soc/iproc.h> 23 24 /* 25 * Function to conver to Core Clock frequency encodings to 26 * real core clock frequencies. 27 */ 28 STATIC int 29 _soc_apache_bond_option_to_core_clk_freq(int unit, int val) 30 { 31 int freq; 32 33 switch (val) { 34 case 0x0: 35 freq = 841; 36 break; 37 case 0x1: 38 freq = 793; 39 break; 40 case 0x2: 41 freq = 575; 42 break; 43 case 0x3: 44 freq = 510; 45 break; 46 case 0x4: 47 freq = 435; 48 break; 49 default: 50 freq = 793; 51 /* unknown max frequency */ 52 break; 53 } 54 55 return freq; 56 } 57 58 59 /* 60 * Function to initialize the bondoptions cache based on the 61 * Bond Info read from the relevant registers. 62 */ 63 int 64 soc_apache_bond_info_init(int unit) 65 { 66 67 int i, bit_val; 68 uint32 val, addr; 69 soc_bond_info_t *bond_info = SOC_BOND_INFO(unit); 70 soc_reg_t soc_apache_bond_info_regs[] = { 71 USER_OTP_BONDOPTION_31_0_REGr, 72 USER_OTP_BONDOPTION_63_32_REGr, 73 USER_OTP_BONDOPTION_95_64_REGr, 74 USER_OTP_BONDOPTION_127_96_REGr, 75 USER_OTP_BONDOPTION_159_128_REGr, 76 USER_OTP_BONDOPTION_191_160_REGr, 77 USER_OTP_BONDOPTION_223_192_REGr, 78 USER_OTP_BONDOPTION_255_224_REGr, 79 USER_OTP_BONDOPTION_287_256_REGr, 80 USER_OTP_BONDOPTION_319_288_REGr, 81 USER_OTP_BONDOPTION_351_320_REGr, 82 USER_OTP_BONDOPTION_383_352_REGr, 83 USER_OTP_BONDOPTION_415_384_REGr, 84 USER_OTP_BONDOPTION_447_416_REGr, 85 USER_OTP_BONDOPTION_479_448_REGr, 86 USER_OTP_BONDOPTION_511_480_REGr 87 }; 88 89 int reg_num = COUNTOF(soc_apache_bond_info_regs); 90 SHR_BITDCL bond_info_regval[_SHR_BITDCLSIZE(COUNTOF(soc_apache_bond_info_regs) * 32)] = {0}; 91 92 int feature_enables[][3] = { 93 /* Bit */ /* Bool Invert? */ /* Feature Enum */ /* Desc */ 94 {154, 1, socBondInfoFeatureEfp512HalfSlice }, /* EFP_SLICE_DEPTH */ 95 {159, 1, socBondInfoFeatureVfp512HalfSlice }, /* VFP_SLICE_DEPTH */ 96 {164, 1, socBondInfoFeatureIfpSliceHalf }, /* FP_DEPTH */ 97 {177, 1, socBondInfoFeatureNoL3 }, /* L3_ENABLE */ 98 {178, 1, socBondInfoFeatureNoAlpm }, /* ALPM_ENABLE */ 99 {179, 1, socBondInfoFeatureNoL3Tunnel }, /* L3_TUNNEL_ENABLE */ 100 {180, 1, socBondInfoFeatureNoStaticNat }, /* STATIC_NAT_ENABLE */ 101 {181, 1, socBondInfoFeatureNoVxlan }, /* VXLAN_ENABLE */ 102 {182, 1, socBondInfoFeatureNoL2Gre }, /* L2_GRE_ENABLE */ 103 {183, 1, socBondInfoFeatureNoFcoe }, /* FCOE_ENABLE */ 104 {190, 1, socBondInfoFeatureNoOsubCT }, /* OVERSUB_CT_ENABLE */ 105 {191, 1, socBondInfoFeatureNoTimeSync }, /* TS_1588_BC_ENABLE */ 106 {256, 0, socBondInfoFeatureSramPwrDwn }, /* SRAM_PWRDWN */ 107 {351, 0, socBondInfoFeatureNoCutThru }, /* MMU_DISABLE_CT */ 108 {354, 1, socBondInfoFeatureNoRiot }, /* RIOT_ENABLE */ 109 {355, 1, socBondInfoFeatureNoTrill }, /* TRILL_ENABLE */ 110 {356, 1, socBondInfoFeatureNoMim }, /* MIM_ENABLE */ 111 {357, 1, socBondInfoFeatureNoEcmp }, /* ECMP_ENABLE */ 112 {359, 1, socBondInfoFeatureNoMpls }, /* MPLS_ENABLE */ 113 {372, 1, socBondInfoFeatureNoHgProxyCoe }, /* COE_ENABLE */ 114 {372, 1, socBondInfoFeatureNoCoeVlanPause }, /* COE_VLAN_PAUSE_ENABLE*/ 115 {373, 1, socBondInfoFeatureNoCoeSubtag8100 }, /* SUBPORT_8100_ENABLE */ 116 {374, 1, socBondInfoFeatureNoFpOam }, /* OAM_ENABLE */ 117 {377, 1, socBondInfoFeatureNoEtherTm }, /* ETM_ENABLE */ 118 119 {215, 0, socBondInfoFeatureNoServiceMeter }, /* SVM */ 120 {216, 0, socBondInfoFeatureNoOamTrueUpMep }, /* OAM TRUE UPMEP */ 121 {218, 0, socBondInfoFeatureNoEpRedirectV2 }, /* EP REDIRECT V2.0 */ 122 {219, 0, socBondInfoFeatureNoMultiLevelProt}, /* MULTI LEVEL PROT */ 123 {220, 0, socBondInfoFeatureNoFpSat }, /* FP-SAT (SAT Hooks) */ 124 {221, 0, socBondInfoFeatureNoSegmentRouting}, /* Segment Routing */ 125 {222, 0, socBondInfoFeatureNoCAUI10Support }, /* CAUI10 Support */ 126 {223, 0, socBondInfoFeatureHqos3Levels }, /* HQOS 3 levels Support*/ 127 {224, 0, socBondInfoFeatureNoQCN }, /* QCN */ 128 {225, 0, socBondInfoFeatureNoECN }, /* ECN */ 129 {226, 0, socBondInfoFeatureNoDMVoq }, /* DMVOQ */ 130 {227, 0, socBondInfoFeatureNoDPVoq }, /* DPVOQ */ 131 132 {-1, 0, -1 } /* Always last */ 133 }; 134 135 for (i = 0; i < reg_num; i++) { 136 addr = soc_reg_addr(unit, soc_apache_bond_info_regs[i], REG_PORT_ANY, 0); 137 soc_iproc_getreg(unit, addr, &val); 138 SHR_BITCOPY_RANGE(bond_info_regval, (i * 32), &val, 0, 32); 139 } 140 141 SOC_BOND_OPTIONS_COPY(bond_info->rev_id, uint16, bond_info_regval, 0, 7); 142 SOC_BOND_OPTIONS_COPY(bond_info->dev_id, uint16, bond_info_regval, 8, 23); 143 SOC_BOND_OPTIONS_COPY(bond_info->device_skew, uint32, bond_info_regval, 24, 27); 144 145 /* Max Core Clock Frequency */ 146 SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 33, 35); 147 bond_info->max_core_freq = _soc_apache_bond_option_to_core_clk_freq(unit, val); 148 149 /* Default Core Clock Frequency */ 150 SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 36, 38); 151 bond_info->default_core_freq = _soc_apache_bond_option_to_core_clk_freq(unit, val); 152 153 /* SPI Code Size */ 154 SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 297, 298); 155 if (val == 0x0) { 156 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureSpiCodeSize32KB); 157 } else if (val == 0x1) { 158 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureSpiCodeSize64KB); 159 } else if (val == 0x2) { 160 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureSpiCodeSize128KB); 161 } else { 162 /* unknown spi code size */ 163 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureSpiCodeSize64KB); 164 } 165 166 /* MMU Buffers */ 167 SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 31, 32); 168 if (val == 0x0) { 169 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureMmu12Mb); 170 } else if (val == 0x1) { 171 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureMmu9Mb); 172 } else if (val == 0x2) { 173 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureMmu6Mb); 174 } else { 175 /* unknown mmu size */ 176 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureMmu12Mb); 177 } 178 179 /* MMU IPMC Size */ 180 SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 352, 353); 181 if (val == 0x0) { 182 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureIpmcDisabled); 183 } else if (val == 0x1) { 184 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureIpmc8k); 185 } else if (val == 0x2) { 186 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureIpmc4k); 187 } else { 188 /* unknown mmu size */ 189 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureIpmc8k); 190 } 191 192 /* VRF Size */ 193 SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 360, 361); 194 if (val == 0x0) { 195 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureVrf1k); 196 } else if (val == 0x1) { 197 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureVrf2k); 198 } else if (val == 0x2) { 199 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureVrf4k); 200 } else { 201 /* unknown vrf size */ 202 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureVrf4k); 203 } 204 205 206 /* L3_IIF Size */ 207 SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 362, 362); 208 if (val == 0x0) { 209 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureL3Iif8k); 210 } else { 211 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureL3Iif12k); 212 } 213 214 215 /* UFT Size */ 216 SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 363, 363); 217 if (val == 0x0) { 218 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureUft128k); 219 } else { 220 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureUft256k); 221 } 222 223 /* RTS MC Enable */ 224 SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 375, 376); 225 if (val & 0x1) { 226 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureUc0Active); 227 } 228 if (val & 0x2) { 229 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureUc1Active); 230 } 231 232 /* PKG_TYPE */ 233 SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 396, 397); 234 if (val == 0x0) { 235 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureApachePkg42p5mm); 236 } else if (val == 0x1) { 237 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureApachePkg50mmTDpCompat); 238 } else if (val == 0x2) { 239 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureApachePkg50mmTD2pCompat); 240 } else { 241 /* unknown package type */ 242 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureApachePkg42p5mm); 243 } 244 245 246 247 248 /* ALPM (2) */ 249 SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 217, 217); 250 if (val == 0x1) { 251 SOC_BOND_INFO_FEATURE_CLEAR(unit, socBondInfoFeatureNoAlpm); 252 } 253 254 /* L3_EIF Size */ 255 SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 231, 232); 256 if (val == 0x0) { 257 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureL3Intf12k); 258 } else { 259 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureL3Intf8k); 260 } 261 262 /* L3_NEXTHOP Size */ 263 SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 233, 234); 264 if (val == 0x0) { 265 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureL3NHop32k); 266 } else { 267 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureL3NHop8k); 268 } 269 270 /* L3_VRF Size (2) */ 271 SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 235, 236); 272 if (val == 0x1) { 273 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureVrf16); 274 } 275 276 /* L3_HOST */ 277 SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 237, 238); 278 if (val == 0x1) { 279 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureL3HostMax4k); 280 } 281 282 /* L2_IF (SVP) */ 283 SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 239, 240); 284 if (val == 0x1) { 285 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureSVP4k); 286 } 287 288 /* L2_MC */ 289 SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 241, 242); 290 if (val == 0x1) { 291 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureL2mc4k); 292 } 293 294 /* COS Profile */ 295 SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 243, 244); 296 if (val == 0x0) { 297 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureApacheCoSProfile0); 298 } else if (val == 0x1) { 299 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureApacheCoSProfile1); 300 } else if (val == 0x2) { 301 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureApacheCoSProfile2); 302 } 303 304 /* Family */ 305 SOC_BOND_OPTIONS_COPY(val, uint32, bond_info_regval, 245, 246); 306 if (val == 0x0) { 307 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureFamilyMaverick); 308 } else if (val == 0x1) { 309 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureFamilyFirebolt5); 310 } else if (val == 0x2) { 311 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureFamilyApache); 312 } else if (val == 0x3) { 313 SOC_BOND_INFO_FEATURE_SET(unit, socBondInfoFeatureFamilyRanger2Plus); 314 } 315 316 317 318 319 SOC_BOND_OPTIONS_COPY(bond_info->ifp_slice_map, uint32, bond_info_regval, 165, 176); 320 SOC_BOND_OPTIONS_COPY(bond_info->efp_slice_map, uint32, bond_info_regval, 155, 158); 321 SOC_BOND_OPTIONS_COPY(bond_info->vfp_slice_map, uint32, bond_info_regval, 160, 163); 322 SOC_BOND_OPTIONS_COPY(bond_info->clmac_map, uint32, bond_info_regval, 184, 189); 323 SOC_BOND_OPTIONS_COPY(bond_info->xlmac_map, uint32, bond_info_regval, 275, 292); 324 SOC_BOND_OPTIONS_COPY(bond_info->tsce_max_2p5g, uint32, bond_info_regval, 378, 391); 325 SOC_BOND_OPTIONS_COPY(bond_info->tscf_max_11g, uint32, bond_info_regval, 392, 395); 326 SOC_BOND_OPTIONS_COPY(bond_info->tsc_force_hg, uint32, bond_info_regval, 192, 209); 327 SOC_BOND_OPTIONS_COPY(bond_info->tsc_enable, uint32, bond_info_regval, 257, 274); 328 SOC_BOND_OPTIONS_COPY(bond_info->defip_cam_map, uint32, bond_info_regval, 364, 371); 329 330 for(i = 0; i < COUNTOF(feature_enables); i++) { 331 bit_val = SHR_BITGET(bond_info_regval, feature_enables[i][0]); 332 if (feature_enables[i][1]) { 333 /* Boolean invert */ 334 bit_val = !bit_val; 335 } 336 337 if (bit_val) { 338 SOC_BOND_INFO_FEATURE_SET(unit, feature_enables[i][2]); 339 } 340 } 341 342 return SOC_E_NONE; 343 } 344 345 #endif /* BCM_APACHE_SUPPORT */ 346