dcb.c (467609B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * File: dcb.c 8 * Purpose: DCB manipulation routines 9 * Provide a uniform means of manipulation of DMA control blocks 10 * that is independent of the actual DCB format used in any 11 * particular chip. 12 */ 13 14 #include <shared/bsl.h> 15 16 #include <soc/types.h> 17 #include <soc/drv.h> 18 #include <soc/dcb.h> 19 #include <soc/dcbformats.h> 20 #include <soc/higig.h> 21 #include <soc/dma.h> 22 #include <soc/debug.h> 23 #include <soc/cm.h> 24 #include <soc/rx.h> 25 #include <shared/bsl.h> 26 27 28 #if defined(BCM_ESW_SUPPORT) || defined(BCM_PETRA_SUPPORT) || defined(BCM_DNX_SUPPORT) 29 30 #define GETHDRFUNCEXPR(_dt, _name, _expr) \ 31 static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ 32 ep_to_cpu_hdr##_dt##_t *h = (ep_to_cpu_hdr##_dt##_t *)hdr; \ 33 return _expr; \ 34 } 35 #define GETHDRFUNCFIELD(_dt, _name, _field) \ 36 GETHDRFUNCEXPR(_dt, _name, h->_field) 37 #define GETHDRFUNCERR(_dt, _name) \ 38 static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ 39 COMPILER_REFERENCE(hdr); \ 40 ep_to_cpu_hdr_funcerr(_dt, #_name "_get"); \ 41 return 0; \ 42 } 43 #define GETHDRFUNCNULL(_dt, _name) \ 44 static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ 45 COMPILER_REFERENCE(hdr); \ 46 return 0; \ 47 } 48 #define GETHDRPTREXPR(_dt, _name, _expr) \ 49 static uint32 * ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ 50 ep_to_cpu_hdr##_dt##_t *h = (ep_to_cpu_hdr##_dt##_t *)hdr; \ 51 return _expr; \ 52 } 53 #define GETHDRPTRERR(_dt, _name) \ 54 static uint32 * ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ 55 COMPILER_REFERENCE(hdr); \ 56 ep_to_cpu_hdr_funcerr(_dt, #_name "_get"); \ 57 return NULL; \ 58 } 59 #define GETHDRFUNCUNITEXPR(_dt, _name, _expr) \ 60 static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) { \ 61 ep_to_cpu_hdr##_dt##_t *h = (ep_to_cpu_hdr##_dt##_t *)hdr; \ 62 COMPILER_REFERENCE(unit); \ 63 return _expr; \ 64 } 65 #define GETHDRFUNCUNITFIELD(_dt, _name, _field) \ 66 GETHDRFUNCUNITEXPR(_dt, _name, h->_field) 67 #define GETHDRFUNCUNITERR(_dt, _name) \ 68 static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) { \ 69 COMPILER_REFERENCE(unit); \ 70 COMPILER_REFERENCE(hdr); \ 71 ep_to_cpu_hdr_funcerr(_dt, #_name "_get"); \ 72 return 0; \ 73 } 74 #define SETHDRFUNCEXPR(_dt, _name, _arg, _expr) \ 75 static void ep_to_cpu_hdr##_dt##_##_name##_set(void *hdr, _arg) { \ 76 ep_to_cpu_hdr##_dt##_t *h = (ep_to_cpu_hdr##_dt##_t *)hdr; \ 77 _expr; \ 78 } 79 #define SETHDRFUNCFIELD(_dt, _name, _field, _arg, _expr) \ 80 SETHDRFUNCEXPR(_dt, _name, _arg, h->_field = _expr) 81 #define SETHDRFUNCERR(_dt, _name, _type) \ 82 static void ep_to_cpu_hdr##_dt##_##_name##_set(void *hdr, _type val) { \ 83 COMPILER_REFERENCE(hdr); \ 84 COMPILER_REFERENCE(val); \ 85 ep_to_cpu_hdr_funcerr(_dt, #_name "_set"); \ 86 } 87 #define SETHDRFUNCNULL(_dt, _name) \ 88 static uint32 ep_to_cpu_hdr##_dt##_##_name##_set(void *hdr, uint32 val) { \ 89 COMPILER_REFERENCE(hdr); \ 90 return 0; \ 91 } 92 #define SETHDRFUNCEXPRIGNORE(_dt, _name, _arg, _expr) \ 93 SETHDRFUNCEXPR(_dt, _name, _arg, COMPILER_REFERENCE(h)) 94 #if defined(LE_HOST) 95 #define GETHDRHGFUNCEXPR(_dt, _name, _expr) \ 96 static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ 97 ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr; \ 98 uint32 hgh[3]; \ 99 soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hgh[0]; \ 100 hgh[0] = soc_htonl(hd->mh0); \ 101 hgh[1] = soc_htonl(hd->mh1); \ 102 hgh[2] = soc_htonl(hd->mh2); \ 103 return _expr; \ 104 } 105 #else 106 #define GETHDRHGFUNCEXPR(_dt, _name, _expr) \ 107 static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ 108 ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr; \ 109 soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hd->mh0; \ 110 return _expr; \ 111 } 112 #endif 113 #define GETHDRHGFUNCFIELD(_dt, _name, _field) \ 114 GETHDRHGFUNCEXPR(_dt, _name, h->hgp_overlay1._field) 115 116 #if defined(LE_HOST) 117 #define GETHDRHG2FUNCEXPR(_dt, _name, _expr) \ 118 static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ 119 ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr; \ 120 uint32 hgh[4]; \ 121 soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hgh[0]; \ 122 hgh[0] = soc_htonl(hd->mh0); \ 123 hgh[1] = soc_htonl(hd->mh1); \ 124 hgh[2] = soc_htonl(hd->mh2); \ 125 hgh[3] = soc_htonl(hd->mh3); \ 126 return _expr; \ 127 } 128 #else 129 #define GETHDRHG2FUNCEXPR(_dt, _name, _expr) \ 130 static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ 131 ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr; \ 132 soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hd->mh0; \ 133 return _expr; \ 134 } 135 #endif 136 #define GETHDRHG2FUNCFIELD(_dt, _name, _field) \ 137 GETHDRHG2FUNCEXPR(_dt, _name, h->ppd_overlay1._field) 138 139 #if defined(LE_HOST) 140 #define GETHDRHGFUNCUNITEXPR(_dt, _name, _expr) \ 141 static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) { \ 142 ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr; \ 143 uint32 hgh[3]; \ 144 soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hgh[0]; \ 145 COMPILER_REFERENCE(unit); \ 146 hgh[0] = soc_htonl(hd->mh0); \ 147 hgh[1] = soc_htonl(hd->mh1); \ 148 hgh[2] = soc_htonl(hd->mh2); \ 149 return _expr; \ 150 } 151 #else 152 #define GETHDRHGFUNCUNITEXPR(_dt, _name, _expr) \ 153 static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) { \ 154 ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)dcb; \ 155 soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hd->mh0; \ 156 COMPILER_REFERENCE(unit); \ 157 return _expr; \ 158 } 159 #endif 160 161 #if defined(LE_HOST) 162 #define GETHDRHG2FUNCUNITEXPR(_dt, _name, _expr) \ 163 static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) { \ 164 ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr; \ 165 uint32 hgh[4]; \ 166 soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hgh[0]; \ 167 COMPILER_REFERENCE(unit); \ 168 hgh[0] = soc_htonl(hd->mh0); \ 169 hgh[1] = soc_htonl(hd->mh1); \ 170 hgh[2] = soc_htonl(hd->mh2); \ 171 hgh[3] = soc_htonl(hd->mh3); \ 172 return _expr; \ 173 } 174 #else 175 #define GETHDRHG2FUNCUNITEXPR(_dt, _name, _expr) \ 176 static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) { \ 177 ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr; \ 178 soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hd->mh0; \ 179 COMPILER_REFERENCE(unit); \ 180 return _expr; \ 181 } 182 #endif 183 184 /* 185 * Short cuts for generating dcb support functions. 186 * Most support functions are just setting or getting a field 187 * in the appropriate dcb structure or doing a simple expression 188 * based on a couple of fields. 189 * GETFUNCFIELD - get a field from DCB 190 * SETFUNCFIELD - set a field in DCB 191 * SETFUNCERR - dummy handler for field that does not exist for 192 * a descriptor type 193 * GETFUNCERR - dummy handler for field that does not exist for 194 * a descriptor type 195 */ 196 #define GETFUNCEXPR(_dt, _name, _expr) \ 197 static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) { \ 198 dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ 199 return _expr; \ 200 } 201 #define GETFUNCFIELD(_dt, _name, _field) \ 202 GETFUNCEXPR(_dt, _name, d->_field) 203 #define GETFUNCERR(_dt, _name) \ 204 static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) { \ 205 COMPILER_REFERENCE(dcb); \ 206 dcb0_funcerr(_dt, #_name "_get"); \ 207 return 0; \ 208 } 209 #define GETFUNCNULL(_dt, _name) \ 210 static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) { \ 211 COMPILER_REFERENCE(dcb); \ 212 return 0; \ 213 } 214 #define GETPTREXPR(_dt, _name, _expr) \ 215 static uint32 * dcb##_dt##_##_name##_get(dcb_t *dcb) { \ 216 dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ 217 return _expr; \ 218 } 219 #define GETPTRERR(_dt, _name) \ 220 static uint32 * dcb##_dt##_##_name##_get(dcb_t *dcb) { \ 221 COMPILER_REFERENCE(dcb); \ 222 dcb0_funcerr(_dt, #_name "_get"); \ 223 return NULL; \ 224 } 225 #define GETFUNCUNITEXPR(_dt, _name, _expr) \ 226 static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) { \ 227 dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ 228 COMPILER_REFERENCE(unit); \ 229 return _expr; \ 230 } 231 #define GETFUNCUNITFIELD(_dt, _name, _field) \ 232 GETFUNCUNITEXPR(_dt, _name, d->_field) 233 #define GETFUNCUNITERR(_dt, _name) \ 234 static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) { \ 235 COMPILER_REFERENCE(unit); \ 236 COMPILER_REFERENCE(dcb); \ 237 dcb0_funcerr(_dt, #_name "_get"); \ 238 return 0; \ 239 } 240 #define SETFUNCEXPR(_dt, _name, _arg, _expr) \ 241 static void dcb##_dt##_##_name##_set(dcb_t *dcb, _arg) { \ 242 dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ 243 _expr; \ 244 } 245 #define SETFUNCFIELD(_dt, _name, _field, _arg, _expr) \ 246 SETFUNCEXPR(_dt, _name, _arg, d->_field = _expr) 247 #define SETFUNCERR(_dt, _name, _type) \ 248 static void dcb##_dt##_##_name##_set(dcb_t *dcb, _type val) { \ 249 COMPILER_REFERENCE(dcb); \ 250 COMPILER_REFERENCE(val); \ 251 dcb0_funcerr(_dt, #_name "_set"); \ 252 } 253 #define SETFUNCNULL(_dt, _name) \ 254 static uint32 dcb##_dt##_##_name##_set(dcb_t *dcb,uint32 val) { \ 255 COMPILER_REFERENCE(dcb); \ 256 return 0; \ 257 } 258 259 #define SETFUNCEXPRIGNORE(_dt, _name, _arg, _expr) \ 260 SETFUNCEXPR(_dt, _name, _arg, COMPILER_REFERENCE(d)) 261 #if defined(LE_HOST) 262 #define GETHGFUNCEXPR(_dt, _name, _expr) \ 263 static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) { \ 264 dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ 265 uint32 hgh[3]; \ 266 soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hgh[0]; \ 267 hgh[0] = soc_htonl(d->mh0); \ 268 hgh[1] = soc_htonl(d->mh1); \ 269 hgh[2] = soc_htonl(d->mh2); \ 270 return _expr; \ 271 } 272 #else 273 #define GETHGFUNCEXPR(_dt, _name, _expr) \ 274 static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) { \ 275 dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ 276 soc_higig_hdr_t *h = (soc_higig_hdr_t *)&d->mh0; \ 277 return _expr; \ 278 } 279 #endif 280 #define GETHGFUNCFIELD(_dt, _name, _field) \ 281 GETHGFUNCEXPR(_dt, _name, h->hgp_overlay1._field) 282 283 #if defined(LE_HOST) 284 #define GETHG2FUNCEXPR(_dt, _name, _expr) \ 285 static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) { \ 286 dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ 287 uint32 hgh[4]; \ 288 soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hgh[0]; \ 289 hgh[0] = soc_htonl(d->mh0); \ 290 hgh[1] = soc_htonl(d->mh1); \ 291 hgh[2] = soc_htonl(d->mh2); \ 292 hgh[3] = soc_htonl(d->mh3); \ 293 return _expr; \ 294 } 295 #else 296 #define GETHG2FUNCEXPR(_dt, _name, _expr) \ 297 static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) { \ 298 dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ 299 soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&d->mh0; \ 300 return _expr; \ 301 } 302 #endif 303 #define GETHG2FUNCFIELD(_dt, _name, _field) \ 304 GETHG2FUNCEXPR(_dt, _name, h->ppd_overlay1._field) 305 306 #if defined(LE_HOST) 307 #define GETHGFUNCUNITEXPR(_dt, _name, _expr) \ 308 static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) { \ 309 dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ 310 uint32 hgh[3]; \ 311 soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hgh[0]; \ 312 COMPILER_REFERENCE(unit); \ 313 hgh[0] = soc_htonl(d->mh0); \ 314 hgh[1] = soc_htonl(d->mh1); \ 315 hgh[2] = soc_htonl(d->mh2); \ 316 return _expr; \ 317 } 318 #else 319 #define GETHGFUNCUNITEXPR(_dt, _name, _expr) \ 320 static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) { \ 321 dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ 322 soc_higig_hdr_t *h = (soc_higig_hdr_t *)&d->mh0; \ 323 COMPILER_REFERENCE(unit); \ 324 return _expr; \ 325 } 326 #endif 327 328 #if defined(LE_HOST) 329 #define GETHG2FUNCUNITEXPR(_dt, _name, _expr) \ 330 static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) { \ 331 dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ 332 uint32 hgh[4]; \ 333 soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hgh[0]; \ 334 COMPILER_REFERENCE(unit); \ 335 hgh[0] = soc_htonl(d->mh0); \ 336 hgh[1] = soc_htonl(d->mh1); \ 337 hgh[2] = soc_htonl(d->mh2); \ 338 hgh[3] = soc_htonl(d->mh3); \ 339 return _expr; \ 340 } 341 #else 342 #define GETHG2FUNCUNITEXPR(_dt, _name, _expr) \ 343 static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) { \ 344 dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ 345 soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&d->mh0; \ 346 COMPILER_REFERENCE(unit); \ 347 return _expr; \ 348 } 349 #endif 350 351 /* 352 * This is a standard function used to generate a debug message whenever 353 * the code tries to access a field not present in the specific DCB 354 */ 355 static void 356 dcb0_funcerr(int dt, char *name) 357 { 358 LOG_ERROR(BSL_LS_SOC_COMMON, 359 (BSL_META("ERROR: dcb%d_%s called\n"), dt, name)); 360 } 361 /* the addr related functions are the same for all dcb types */ 362 void 363 dcb0_addr_set(int unit, dcb_t *dcb, sal_vaddr_t addr) 364 { 365 uint32 *d = (uint32 *)dcb; 366 367 if (addr == 0) { 368 *d = 0; 369 } else { 370 *d = soc_cm_l2p(unit, (void *)addr); 371 } 372 } 373 374 sal_vaddr_t 375 dcb0_addr_get(int unit, dcb_t *dcb) 376 { 377 uint32 *d = (uint32 *)dcb; 378 379 if (*d == 0) { 380 return (sal_vaddr_t)0; 381 } else { 382 return (sal_vaddr_t)soc_cm_p2l(unit, *d); 383 } 384 } 385 386 sal_paddr_t 387 dcb0_paddr_get(dcb_t *dcb) 388 { 389 uint32 *d = (uint32 *)dcb; 390 391 return (sal_paddr_t)*d; 392 } 393 394 #if defined(BCM_HERCULES_SUPPORT) 395 SETFUNCERR(0, hg, uint32) 396 GETFUNCERR(0, hg) 397 SETFUNCERR(0, stat, uint32) 398 GETFUNCERR(0, stat) 399 SETFUNCERR(0, purge, uint32) 400 GETFUNCERR(0, purge) 401 GETPTRERR(0, mhp) 402 GETFUNCERR(0, outer_vid) 403 GETFUNCERR(0, outer_pri) 404 GETFUNCERR(0, outer_cfi) 405 GETFUNCERR(0, rx_outer_tag_action) 406 GETFUNCERR(0, inner_vid) 407 GETFUNCERR(0, inner_pri) 408 GETFUNCERR(0, inner_cfi) 409 GETFUNCERR(0, rx_inner_tag_action) 410 GETFUNCNULL(0, rx_bpdu) 411 GETFUNCNULL(0, rx_l3_intf) 412 GETFUNCNULL(0, rx_decap_tunnel) 413 #endif 414 415 416 /* 417 * Function: 418 * dcb0_rx_reason_map_get 419 * Purpose: 420 * Return the RX reason map for a series of DCB types. 421 * Parameters: 422 * dcb_op - DCB operations 423 * dcb - dma control block 424 * Returns: 425 * RX reason map pointer 426 * Notes: 427 * Function made global to resolve compiler link issue. 428 */ 429 static soc_rx_reason_t * 430 dcb0_rx_reason_map_get(dcb_op_t *dcb_op, dcb_t *dcb) 431 { 432 COMPILER_REFERENCE(dcb); 433 434 return dcb_op->rx_reason_maps[0]; 435 } 436 437 /* 438 * Function: 439 * dcb0_rx_reasons_get 440 * Purpose: 441 * Map the hardware reason bits from 'dcb' into the set 442 * of "reasons". 443 * Parameters: 444 * dcb_op - DCB operations 445 * dcb - dma control block 446 * reasons - set of "reasons", socRxReason* 447 */ 448 void 449 dcb0_rx_reasons_get(dcb_op_t *dcb_op, dcb_t *dcb, soc_rx_reasons_t *reasons) 450 { 451 soc_rx_reason_t *map; 452 uint32 reason; 453 uint32 mask; 454 int i; 455 456 SOC_RX_REASON_CLEAR_ALL(*reasons); 457 458 map = dcb_op->rx_reason_map_get(dcb_op, dcb); 459 if (map == NULL) { 460 return; 461 } 462 463 reason = dcb_op->rx_reason_get(dcb); 464 mask = 1; 465 for (i = 0; i < 32; i++) { 466 if ((mask & reason)) { 467 SOC_RX_REASON_SET(*reasons, map[i]); 468 } 469 mask <<= 1; 470 } 471 472 reason = dcb_op->rx_reason_hi_get(dcb); 473 mask = 1; 474 for (i = 0; i < 32; i++) { 475 if ((mask & reason)) { 476 SOC_RX_REASON_SET(*reasons, map[i + 32]); 477 } 478 mask <<= 1; 479 } 480 481 /* BPDU bit should be a reason, paste it in here */ 482 if (dcb_op->rx_bpdu_get(dcb)) { 483 SOC_RX_REASON_SET(*reasons, socRxReasonBpdu); 484 } 485 486 return; 487 } 488 489 #ifdef BROADCOM_DEBUG 490 491 static char *_dcb_reason_names[socRxReasonCount] = SOC_RX_REASON_NAMES_INITIALIZER; 492 493 static void 494 dcb0_reason_dump(int unit, dcb_t *dcb, char *prefix) 495 { 496 soc_rx_reason_t *map; 497 uint32 reason = SOC_DCB_RX_REASON_GET(unit, dcb); 498 uint32 mask = 1; 499 int i; 500 501 map = SOC_DCB(unit)->rx_reason_map_get(SOC_DCB(unit), dcb); 502 if (map == NULL) { 503 return; 504 } 505 506 for (i=0; i < 32; i++) { 507 if ((mask & reason)) { 508 LOG_CLI((BSL_META_U(unit, 509 "%s\treason bit %d: %s\n"), prefix, i, 510 _dcb_reason_names[map[i]])); 511 } 512 mask <<= 1; 513 } 514 515 reason = SOC_DCB_RX_REASON_HI_GET(unit, dcb); 516 mask = 1; 517 518 for (i=0; i < 32; i++) { 519 if ((mask & reason)) { 520 LOG_CLI((BSL_META_U(unit, 521 "%s\treason bit %d: %s\n"), prefix, i + 32, 522 _dcb_reason_names[map[i + 32]])); 523 } 524 mask <<= 1; 525 } 526 } 527 528 529 #if defined(BCM_HERCULES_SUPPORT) 530 static void 531 dcb0_dump(int unit, dcb_t *dcb, char *prefix, int tx) 532 { 533 uint32 *p; 534 int i, size; 535 char ps[((DCB_MAX_SIZE/sizeof(uint32))*9)+1]; 536 537 p = (uint32 *)dcb; 538 size = SOC_DCB_SIZE(unit) / sizeof(uint32); 539 for (i = 0; i < size; i++) { 540 sal_sprintf(&ps[i*9], "%08x ", p[i]); 541 } 542 LOG_CLI((BSL_META_U(unit, 543 "%s\t%s\n"), prefix, ps)); 544 LOG_CLI((BSL_META_U(unit, 545 "%s\ttype %d %sdone %ssg %schain %sreload\n"), 546 prefix, 547 SOC_DCB_TYPE(unit), 548 SOC_DCB_DONE_GET(unit, dcb) ? "" : "!", 549 SOC_DCB_SG_GET(unit, dcb) ? "" : "!", 550 SOC_DCB_CHAIN_GET(unit, dcb) ? "" : "!", 551 SOC_DCB_RELOAD_GET(unit, dcb) ? "" : "!")); 552 dcb0_reason_dump(unit, dcb, prefix); 553 LOG_CLI((BSL_META_U(unit, 554 "%s\taddr %p reqcount %d xfercount %d\n"), 555 prefix, 556 (void *)SOC_DCB_ADDR_GET(unit, dcb), 557 SOC_DCB_REQCOUNT_GET(unit, dcb), 558 SOC_DCB_XFERCOUNT_GET(unit, dcb))); 559 560 if (tx) { 561 LOG_CLI((BSL_META_U(unit, 562 "%s\tl2pbm %x utbpm %x l3bpm %x %scrc cos %d\n"), 563 prefix, 564 SOC_DCB_TX_L2PBM_GET(unit, dcb), 565 SOC_DCB_TX_UTPBM_GET(unit, dcb), 566 SOC_DCB_TX_L3PBM_GET(unit, dcb), 567 SOC_DCB_TX_CRC_GET(unit, dcb) ? "" : "!", 568 SOC_DCB_TX_COS_GET(unit, dcb))); 569 570 if (SOC_IS_XGS(unit)) { 571 if (SOC_IS_XGS_SWITCH(unit)) { 572 LOG_CLI((BSL_META_U(unit, 573 "%s\tdest-modport %d.%d opcode %d\n"), 574 prefix, 575 SOC_DCB_TX_DESTMOD_GET(unit, dcb), 576 SOC_DCB_TX_DESTPORT_GET(unit, dcb), 577 SOC_DCB_TX_OPCODE_GET(unit, dcb))); 578 } 579 } 580 } else { 581 LOG_CLI((BSL_META_U(unit, 582 "%s\t%sstart %send %serror %scrc cos %d ingport %d reason %#x\n"), 583 prefix, 584 SOC_DCB_RX_START_GET(unit, dcb) ? "" : "!", 585 SOC_DCB_RX_END_GET(unit, dcb) ? "" : "!", 586 SOC_DCB_RX_ERROR_GET(unit, dcb) ? "" : "!", 587 SOC_DCB_RX_CRC_GET(unit, dcb) ? "" : "!", 588 SOC_DCB_RX_COS_GET(unit, dcb), 589 SOC_DCB_RX_INGPORT_GET(unit, dcb), 590 SOC_DCB_RX_REASON_GET(unit, dcb))); 591 if (SOC_IS_XGS(unit)) { 592 LOG_CLI((BSL_META_U(unit, 593 "%s\tsrc-modport %d.%d dest-modport %d.%d\n"), 594 prefix, 595 SOC_DCB_RX_SRCMOD_GET(unit, dcb), 596 SOC_DCB_RX_SRCPORT_GET(unit, dcb), 597 SOC_DCB_RX_DESTMOD_GET(unit, dcb), 598 SOC_DCB_RX_DESTPORT_GET(unit, dcb))); 599 LOG_CLI((BSL_META_U(unit, 600 "%s\thg-opcode %d prio %d mcast %d\n"), 601 prefix, 602 SOC_DCB_RX_OPCODE_GET(unit, dcb), 603 SOC_DCB_RX_PRIO_GET(unit, dcb), 604 SOC_DCB_RX_MCAST_GET(unit, dcb))); 605 } 606 } 607 } 608 #endif 609 #endif /* BROADCOM_DEBUG */ 610 611 #if defined(BCM_HERCULES_SUPPORT) 612 /* 613 * DCB Type 2 Support 614 */ 615 616 static soc_rx_reason_t 617 dcb2_rx_reason_map[] = { 618 socRxReasonFilterMatch, /* Offset 0 */ 619 socRxReasonCpuLearn, /* Offset 1 */ 620 socRxReasonSourceRoute, /* Offset 2 */ 621 socRxReasonDestLookupFail, /* Offset 3 */ 622 socRxReasonControl, /* Offset 4 */ 623 socRxReasonIp, /* Offset 5 */ 624 socRxReasonInvalid, /* Offset 6 */ 625 socRxReasonIpOptionVersion, /* Offset 7 */ 626 socRxReasonIpmc, /* Offset 8 */ 627 socRxReasonTtl, /* Offset 9 */ 628 socRxReasonBroadcast, /* Offset 10 */ 629 socRxReasonMulticast, /* Offset 11 */ 630 socRxReasonIgmp, /* Offset 12 */ 631 socRxReasonInvalid, /* Offset 13 */ 632 socRxReasonInvalid, /* Offset 14 */ 633 socRxReasonInvalid, /* Offset 15 */ 634 socRxReasonInvalid, /* Offset 16 */ 635 socRxReasonInvalid, /* Offset 17 */ 636 socRxReasonInvalid, /* Offset 18 */ 637 socRxReasonInvalid, /* Offset 19 */ 638 socRxReasonInvalid, /* Offset 20 */ 639 socRxReasonInvalid, /* Offset 21 */ 640 socRxReasonInvalid, /* Offset 22 */ 641 socRxReasonInvalid, /* Offset 23 */ 642 socRxReasonInvalid, /* Offset 24 */ 643 socRxReasonInvalid, /* Offset 25 */ 644 socRxReasonInvalid, /* Offset 26 */ 645 socRxReasonInvalid, /* Offset 27 */ 646 socRxReasonInvalid, /* Offset 28 */ 647 socRxReasonInvalid, /* Offset 29 */ 648 socRxReasonInvalid, /* Offset 30 */ 649 socRxReasonInvalid, /* Offset 31 */ 650 }; 651 652 static soc_rx_reason_t *dcb2_rx_reason_maps[] = { 653 dcb2_rx_reason_map, 654 NULL 655 }; 656 657 static void 658 dcb2_init(dcb_t *dcb) 659 { 660 uint32 *d = (uint32 *)dcb; 661 662 d[0] = d[1] = d[2] = d[3] = d[4] = d[5] = d[6] = d[7] = 0; 663 } 664 665 static int 666 dcb2_addtx(dv_t *dv, sal_vaddr_t addr, uint32 count, 667 pbmp_t l2pbm, pbmp_t utpbm, pbmp_t l3pbm, uint32 flags, uint32 *hgh) 668 { 669 dcb2_t *d; 670 uint32 *di; 671 uint32 paddr; 672 673 d = (dcb2_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); 674 675 if (addr) { 676 paddr = soc_cm_l2p(dv->dv_unit, (void *)addr); 677 } else { 678 paddr = 0; 679 } 680 681 if (dv->dv_vcnt > 0 && (dv->dv_flags & DV_F_COMBINE_DCB) && 682 (d[-1].c_sg != 0) && 683 (d[-1].addr + d[-1].c_count) == paddr && 684 d[-1].c_count + count <= DCB_MAX_REQCOUNT) { 685 d[-1].c_count += count; 686 return dv->dv_cnt - dv->dv_vcnt; 687 } 688 689 if (dv->dv_vcnt >= dv->dv_cnt) { 690 return SOC_E_FULL; 691 } 692 if (dv->dv_vcnt > 0) { /* chain off previous dcb */ 693 d[-1].c_chain = 1; 694 } 695 696 di = (uint32 *)d; 697 di[0] = di[1] = di[2] = di[3] = di[4] = di[5] = di[6] = di[7] = 0; 698 699 d->addr = paddr; 700 d->c_count = count; 701 d->c_sg = 1; 702 d->c_cos = SOC_DMA_COS_GET(flags); 703 d->c_crc = SOC_DMA_CRC_GET(flags) ? 704 DCB_STRATA_CRC_REGEN : DCB_STRATA_CRC_LEAVE; 705 d->l2ports = SOC_PBMP_WORD_GET(l2pbm, 0); 706 d->utports = SOC_PBMP_WORD_GET(utpbm, 0); 707 d->l3ports = SOC_PBMP_WORD_GET(l3pbm, 0); 708 709 dv->dv_vcnt += 1; 710 return dv->dv_cnt - dv->dv_vcnt; 711 } 712 713 static int 714 dcb2_addrx(dv_t *dv, sal_vaddr_t addr, uint32 count, uint32 flags) 715 { 716 dcb2_t *d; 717 uint32 *di; 718 719 d = (dcb2_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); 720 721 if (dv->dv_vcnt > 0) { /* chain off previous dcb */ 722 d[-1].c_chain = 1; 723 } 724 725 di = (uint32 *)d; 726 di[0] = di[1] = di[2] = di[3] = di[4] = di[5] = di[6] = di[7] = 0; 727 728 if (addr) { 729 d->addr = soc_cm_l2p(dv->dv_unit, (void *)addr); 730 } 731 d->c_count = count; 732 d->c_sg = 1; 733 d->c_cos = SOC_DMA_COS_GET(flags); 734 d->c_crc = SOC_DMA_CRC_GET(flags) ? 735 DCB_STRATA_CRC_REGEN : DCB_STRATA_CRC_LEAVE; 736 737 dv->dv_vcnt += 1; 738 return dv->dv_cnt - dv->dv_vcnt; 739 } 740 741 static uint32 742 dcb2_intrinfo(int unit, dcb_t *dcb, int tx, uint32 *count) 743 { 744 dcb2_t *d = (dcb2_t *)dcb; 745 uint32 f; 746 747 if (!d->s2valid) { 748 return 0; 749 } 750 f = SOC_DCB_INFO_DONE; 751 if (tx) { 752 if (!d->c_sg) { 753 f |= SOC_DCB_INFO_PKTEND; 754 } 755 } else { 756 if (d->end) { 757 f |= SOC_DCB_INFO_PKTEND; 758 } 759 } 760 *count = d->count; 761 return f; 762 } 763 764 static uint32 765 dcb2_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg) 766 { 767 dcb2_t *d = (dcb2_t *)dcb; 768 769 COMPILER_REFERENCE(dt_mode); 770 COMPILER_REFERENCE(ingport_is_hg); 771 772 return d->untagged; 773 } 774 775 SETFUNCFIELD(2, reqcount, c_count, uint32 count, count) 776 GETFUNCFIELD(2, reqcount, c_count) 777 GETFUNCFIELD(2, xfercount, count) 778 SETFUNCFIELD(2, done, s2valid, int val, val ? 1 : 0) 779 GETFUNCFIELD(2, done, s2valid) 780 SETFUNCFIELD(2, sg, c_sg, int val, val ? 1 : 0) 781 GETFUNCFIELD(2, sg, c_sg) 782 SETFUNCFIELD(2, chain, c_chain, int val, val ? 1 : 0) 783 GETFUNCFIELD(2, chain, c_chain) 784 SETFUNCFIELD(2, reload, c_reload, int val, val ? 1 : 0) 785 GETFUNCFIELD(2, reload, c_reload) 786 SETFUNCERR(2, desc_intr, int) 787 GETFUNCERR(2, desc_intr) 788 SETFUNCFIELD(2, tx_l2pbm, l2ports, pbmp_t pbm, SOC_PBMP_WORD_GET(pbm, 0)) 789 SETFUNCFIELD(2, tx_utpbm, utports, pbmp_t pbm, SOC_PBMP_WORD_GET(pbm, 0)) 790 SETFUNCFIELD(2, tx_l3pbm, l3ports, pbmp_t pbm, SOC_PBMP_WORD_GET(pbm, 0)) 791 SETFUNCFIELD(2, tx_crc, c_crc, int val, 792 val ? DCB_STRATA_CRC_REGEN : DCB_STRATA_CRC_LEAVE) 793 SETFUNCFIELD(2, tx_cos, c_cos, int val, val) 794 SETFUNCERR(2, tx_destmod, uint32) 795 SETFUNCERR(2, tx_destport, uint32) 796 SETFUNCERR(2, tx_opcode, uint32) 797 SETFUNCERR(2, tx_srcmod, uint32) 798 SETFUNCERR(2, tx_srcport, uint32) 799 SETFUNCERR(2, tx_prio, uint32) 800 SETFUNCERR(2, tx_pfm, uint32) 801 GETFUNCEXPR(2, rx_crc, d->crc == DCB_STRATA_CRC_REGEN) 802 GETFUNCFIELD(2, rx_cos, cos) 803 GETFUNCERR(2, rx_destmod) 804 GETFUNCERR(2, rx_destport) 805 GETFUNCERR(2, rx_opcode) 806 GETFUNCERR(2, rx_classtag) 807 GETFUNCFIELD(2, rx_matchrule, match_rule) 808 GETFUNCFIELD(2, rx_start, start) 809 GETFUNCFIELD(2, rx_end, end) 810 GETFUNCEXPR(2, rx_error, d->optim == DCB_STRATA_OPTIM_PURGE) 811 GETFUNCERR(2, rx_prio) 812 GETFUNCFIELD(2, rx_reason, reason) 813 GETFUNCNULL(2, rx_reason_hi) 814 GETFUNCFIELD(2, rx_ingport, srcport) 815 GETFUNCFIELD(2, rx_srcport, srcport) 816 GETFUNCERR(2, rx_srcmod) 817 GETFUNCERR(2, rx_mcast) 818 GETFUNCERR(2, rx_vclabel) 819 GETFUNCERR(2, rx_mirror) 820 GETFUNCERR(2, rx_timestamp) 821 GETFUNCERR(2, rx_timestamp_upper) 822 GETFUNCNULL(2, rx_switch_drop) 823 GETFUNCNULL(2, olp_encap_oam_pkt) 824 GETFUNCNULL(2, read_ecc_error) 825 GETFUNCNULL(2, desc_remaining) 826 SETFUNCNULL(2, desc_remaining) 827 GETFUNCNULL(2, desc_status) 828 SETFUNCNULL(2, desc_status) 829 GETFUNCNULL(2, match_id_lo) 830 GETFUNCNULL(2, match_id_hi) 831 GETFUNCNULL(2, forwarding_type) 832 GETFUNCNULL(2, forwarding_zone_id) 833 834 #ifdef BROADCOM_DEBUG 835 GETFUNCFIELD(2, tx_l2pbm, l2ports) 836 GETFUNCFIELD(2, tx_utpbm, utports) 837 GETFUNCFIELD(2, tx_l3pbm, l3ports) 838 GETFUNCFIELD(2, tx_crc, c_crc) 839 GETFUNCFIELD(2, tx_cos, c_cos) 840 GETFUNCERR(2, tx_destmod) 841 GETFUNCERR(2, tx_destport) 842 GETFUNCERR(2, tx_opcode) 843 GETFUNCERR(2, tx_srcmod) 844 GETFUNCERR(2, tx_srcport) 845 GETFUNCERR(2, tx_prio) 846 GETFUNCERR(2, tx_pfm) 847 #endif /* BROADCOM_DEBUG */ 848 849 #ifdef PLISIM /* these routines are only used by pcid */ 850 static void dcb2_status_init(dcb_t *dcb) 851 { 852 uint32 *d = (uint32 *)dcb; 853 854 d[5] = d[6] = d[7] = 0; 855 } 856 SETFUNCFIELD(2, xfercount, count, uint32 count, count) 857 SETFUNCFIELD(2, rx_start, start, int val, val ? 1 : 0) 858 SETFUNCFIELD(2, rx_end, end, int val, val ? 1 : 0) 859 SETFUNCFIELD(2, rx_error, optim, int val, val ? DCB_STRATA_OPTIM_PURGE : 0) 860 SETFUNCFIELD(2, rx_crc, crc, int val, val ? DCB_STRATA_CRC_REGEN : 0) 861 #endif /* PLISIM */ 862 863 dcb_op_t dcb2_op = { 864 2, 865 sizeof(dcb2_t), 866 dcb2_rx_reason_maps, 867 dcb0_rx_reason_map_get, 868 dcb0_rx_reasons_get, 869 dcb2_init, 870 dcb2_addtx, 871 dcb2_addrx, 872 dcb2_intrinfo, 873 dcb2_reqcount_set, 874 dcb2_reqcount_get, 875 dcb2_xfercount_get, 876 dcb0_addr_set, 877 dcb0_addr_get, 878 dcb0_paddr_get, 879 dcb2_done_set, 880 dcb2_done_get, 881 dcb2_sg_set, 882 dcb2_sg_get, 883 dcb2_chain_set, 884 dcb2_chain_get, 885 dcb2_reload_set, 886 dcb2_reload_get, 887 dcb2_desc_intr_set, 888 dcb2_desc_intr_get, 889 dcb2_tx_l2pbm_set, 890 dcb2_tx_utpbm_set, 891 dcb2_tx_l3pbm_set, 892 dcb2_tx_crc_set, 893 dcb2_tx_cos_set, 894 dcb2_tx_destmod_set, 895 dcb2_tx_destport_set, 896 dcb2_tx_opcode_set, 897 dcb2_tx_srcmod_set, 898 dcb2_tx_srcport_set, 899 dcb2_tx_prio_set, 900 dcb2_tx_pfm_set, 901 dcb2_rx_untagged_get, 902 dcb2_rx_crc_get, 903 dcb2_rx_cos_get, 904 dcb2_rx_destmod_get, 905 dcb2_rx_destport_get, 906 dcb2_rx_opcode_get, 907 dcb2_rx_classtag_get, 908 dcb2_rx_matchrule_get, 909 dcb2_rx_start_get, 910 dcb2_rx_end_get, 911 dcb2_rx_error_get, 912 dcb2_rx_prio_get, 913 dcb2_rx_reason_get, 914 dcb2_rx_reason_hi_get, 915 dcb2_rx_ingport_get, 916 dcb2_rx_srcport_get, 917 dcb2_rx_srcmod_get, 918 dcb2_rx_mcast_get, 919 dcb2_rx_vclabel_get, 920 dcb2_rx_mirror_get, 921 dcb2_rx_timestamp_get, 922 dcb2_rx_timestamp_upper_get, 923 dcb0_hg_set, 924 dcb0_hg_get, 925 dcb0_stat_set, 926 dcb0_stat_get, 927 dcb0_purge_set, 928 dcb0_purge_get, 929 dcb0_mhp_get, 930 dcb0_outer_vid_get, 931 dcb0_outer_pri_get, 932 dcb0_outer_cfi_get, 933 dcb0_rx_outer_tag_action_get, 934 dcb0_inner_vid_get, 935 dcb0_inner_pri_get, 936 dcb0_inner_cfi_get, 937 dcb0_rx_inner_tag_action_get, 938 dcb0_rx_bpdu_get, 939 dcb0_rx_l3_intf_get, 940 dcb0_rx_decap_tunnel_get, 941 dcb2_rx_switch_drop_get, 942 dcb2_olp_encap_oam_pkt_get, 943 dcb2_read_ecc_error_get, 944 dcb2_desc_remaining_get, 945 dcb2_desc_remaining_set, 946 dcb2_desc_status_get, 947 dcb2_desc_status_set, 948 dcb2_match_id_lo_get, 949 dcb2_match_id_hi_get, 950 dcb2_forwarding_type_get, 951 dcb2_forwarding_zone_id_get, 952 #ifdef BROADCOM_DEBUG 953 dcb2_tx_l2pbm_get, 954 dcb2_tx_utpbm_get, 955 dcb2_tx_l3pbm_get, 956 dcb2_tx_crc_get, 957 dcb2_tx_cos_get, 958 dcb2_tx_destmod_get, 959 dcb2_tx_destport_get, 960 dcb2_tx_opcode_get, 961 dcb2_tx_srcmod_get, 962 dcb2_tx_srcport_get, 963 dcb2_tx_prio_get, 964 dcb2_tx_pfm_get, 965 966 dcb0_dump, 967 dcb0_reason_dump, 968 #endif /* BROADCOM_DEBUG */ 969 #ifdef PLISIM 970 dcb2_status_init, 971 dcb2_xfercount_set, 972 dcb2_rx_start_set, 973 dcb2_rx_end_set, 974 dcb2_rx_error_set, 975 dcb2_rx_crc_set, 976 NULL, 977 #endif 978 NULL, 979 }; 980 981 #endif /* BCM_HERCULES_SUPPORT */ 982 983 #if defined(BCM_HERCULES_SUPPORT) 984 static soc_rx_reason_t 985 dcb3_rx_reason_map[] = { 986 socRxReasonUnknownVlan, /* Offset 0 */ 987 socRxReasonL2SourceMiss, /* Offset 1 */ 988 socRxReasonL2DestMiss, /* Offset 2 */ 989 socRxReasonL2Move, /* Offset 3 */ 990 socRxReasonL2Cpu, /* Offset 4 */ 991 #if 1 992 socRxReasonInvalid, /* Offset 5 */ 993 socRxReasonInvalid, /* Offset 6 */ 994 #endif 995 socRxReasonL3SourceMiss, /* Offset 7 */ 996 socRxReasonL3DestMiss, /* Offset 8 */ 997 socRxReasonL3SourceMove, /* Offset 9 */ 998 socRxReasonMcastMiss, /* Offset 10 */ 999 socRxReasonIpMcastMiss, /* Offset 11 */ 1000 socRxReasonFilterMatch, /* Offset 12 */ 1001 socRxReasonL3HeaderError, /* Offset 13 */ 1002 socRxReasonProtocol, /* Offset 14 */ 1003 socRxReasonInvalid, /* Offset 15 */ 1004 socRxReasonInvalid, /* Offset 16 */ 1005 socRxReasonInvalid, /* Offset 17 */ 1006 socRxReasonInvalid, /* Offset 18 */ 1007 socRxReasonInvalid, /* Offset 19 */ 1008 socRxReasonInvalid, /* Offset 20 */ 1009 socRxReasonInvalid, /* Offset 21 */ 1010 socRxReasonInvalid, /* Offset 22 */ 1011 socRxReasonInvalid, /* Offset 23 */ 1012 socRxReasonInvalid, /* Offset 24 */ 1013 socRxReasonInvalid, /* Offset 25 */ 1014 socRxReasonInvalid, /* Offset 26 */ 1015 socRxReasonInvalid, /* Offset 27 */ 1016 socRxReasonInvalid, /* Offset 28 */ 1017 socRxReasonInvalid, /* Offset 29 */ 1018 socRxReasonInvalid, /* Offset 30 */ 1019 socRxReasonInvalid, /* Offset 31 */ 1020 }; 1021 1022 static soc_rx_reason_t *dcb3_rx_reason_maps[] = { 1023 dcb3_rx_reason_map, 1024 NULL 1025 }; 1026 #endif 1027 1028 #ifdef BCM_HERCULES_SUPPORT 1029 /* 1030 * DCB Type 4 Support 1031 * The trick here is that the tx related functions use the dcb2 1032 * variations because hercules has a split personality. Type 2 to 1033 * transmit but type 4 to receive. We take advantage of the fact both 1034 * types are the same length. 1035 */ 1036 1037 static int 1038 dcb4_addrx(dv_t *dv, sal_vaddr_t addr, uint32 count, uint32 flags) 1039 { 1040 dcb4_t *d; 1041 uint32 *di; 1042 1043 d = (dcb4_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); 1044 1045 if (dv->dv_vcnt > 0) { /* chain off previous dcb */ 1046 d[-1].c_chain = 1; 1047 } 1048 1049 di = (uint32 *)d; 1050 di[0] = di[1] = di[2] = di[3] = di[4] = di[5] = di[6] = di[7] = 0; 1051 1052 if (addr) { 1053 d->addr = soc_cm_l2p(dv->dv_unit, (void *)addr); 1054 } 1055 d->c_count = count; 1056 d->c_sg = 1; 1057 d->c_cos = SOC_DMA_COS_GET(flags); 1058 d->c_crc = SOC_DMA_CRC_GET(flags) ? DCB_XGS_CRC_REGEN : DCB_XGS_CRC_LEAVE; 1059 1060 dv->dv_vcnt += 1; 1061 return dv->dv_cnt - dv->dv_vcnt; 1062 } 1063 1064 static uint32 1065 dcb4_intrinfo(int unit, dcb_t *dcb, int tx, uint32 *count) 1066 { 1067 dcb4_t *d = (dcb4_t *)dcb; 1068 uint32 f; 1069 1070 if (!d->s2valid) { 1071 return 0; 1072 } 1073 f = SOC_DCB_INFO_DONE; 1074 if (tx) { 1075 if (!d->c_sg) { 1076 f |= SOC_DCB_INFO_PKTEND; 1077 } 1078 } else { 1079 if (d->end) { 1080 f |= SOC_DCB_INFO_PKTEND; 1081 } 1082 } 1083 *count = d->count; 1084 return f; 1085 } 1086 1087 static uint32 1088 dcb4_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg) 1089 { 1090 COMPILER_REFERENCE(dcb); 1091 COMPILER_REFERENCE(dt_mode); 1092 COMPILER_REFERENCE(ingport_is_hg); 1093 1094 dcb0_funcerr(4, "rx_untagged_get"); 1095 1096 return 0; 1097 } 1098 1099 GETFUNCFIELD(4, rx_crc, crc) 1100 GETFUNCFIELD(4, rx_cos, cos) 1101 GETFUNCEXPR(4, rx_destmod, d->destmod_lo) 1102 GETFUNCFIELD(4, rx_destport, destport) 1103 GETFUNCFIELD(4, rx_opcode, opcode) 1104 GETFUNCFIELD(4, rx_classtag, class_tag) 1105 GETFUNCFIELD(4, rx_matchrule, match_rule) 1106 GETFUNCFIELD(4, rx_start, start) 1107 GETFUNCFIELD(4, rx_end, end) 1108 GETFUNCFIELD(4, rx_error, error) 1109 GETFUNCEXPR(4, rx_prio, ((d->prio_hi<<1) | d->prio_lo)) 1110 GETFUNCFIELD(4, rx_reason, reason) 1111 GETFUNCNULL(4, rx_reason_hi) 1112 GETFUNCFIELD(4, rx_ingport, ingport) 1113 GETFUNCERR(4, rx_srcport) 1114 GETFUNCFIELD(4, rx_srcmod, srcmod) 1115 GETFUNCEXPR(4, rx_mcast, ((d->destmod_lo<<5) | d->destport)) 1116 GETFUNCERR(4, rx_vclabel) 1117 GETFUNCERR(4, rx_mirror) 1118 GETFUNCERR(4, rx_timestamp) 1119 GETFUNCERR(4, rx_timestamp_upper) 1120 GETFUNCNULL(4, rx_switch_drop) 1121 GETFUNCNULL(4, olp_encap_oam_pkt) 1122 GETFUNCNULL(4, read_ecc_error) 1123 GETFUNCNULL(4, desc_remaining) 1124 SETFUNCNULL(4, desc_remaining) 1125 GETFUNCNULL(4, desc_status) 1126 SETFUNCNULL(4, desc_status) 1127 GETFUNCNULL(4, match_id_lo) 1128 GETFUNCNULL(4, match_id_hi) 1129 GETFUNCNULL(4, forwarding_type) 1130 GETFUNCNULL(4, forwarding_zone_id) 1131 1132 #ifdef PLISIM /* these routines are only used by pcid */ 1133 static void dcb4_status_init(dcb_t *dcb) 1134 { 1135 uint32 *d = (uint32 *)dcb; 1136 1137 d[5] = d[6] = d[7] = 0; 1138 } 1139 SETFUNCFIELD(4, rx_start, start, int val, val ? 1 : 0) 1140 SETFUNCFIELD(4, rx_end, end, int val, val ? 1 : 0) 1141 SETFUNCFIELD(4, rx_error, error, int val, val ? 1 : 0) 1142 SETFUNCFIELD(4, rx_crc, crc, int val, val ? 1 : 0) 1143 #endif /* PLISIM */ 1144 1145 dcb_op_t dcb4_op = { 1146 4, 1147 sizeof(dcb4_t), 1148 dcb3_rx_reason_maps, 1149 dcb0_rx_reason_map_get, 1150 dcb0_rx_reasons_get, 1151 dcb2_init, 1152 dcb2_addtx, 1153 dcb4_addrx, 1154 dcb4_intrinfo, 1155 dcb2_reqcount_set, /* 2 and 4 are the same */ 1156 dcb2_reqcount_get, /* 2 and 4 are the same */ 1157 dcb2_xfercount_get, /* 2 and 4 are the same */ 1158 dcb0_addr_set, 1159 dcb0_addr_get, 1160 dcb0_paddr_get, 1161 dcb2_done_set, /* 2 and 4 are the same */ 1162 dcb2_done_get, /* 2 and 4 are the same */ 1163 dcb2_sg_set, /* 2 and 4 are the same */ 1164 dcb2_sg_get, /* 2 and 4 are the same */ 1165 dcb2_chain_set, /* 2 and 4 are the same */ 1166 dcb2_chain_get, /* 2 and 4 are the same */ 1167 dcb2_reload_set, /* 2 and 4 are the same */ 1168 dcb2_reload_get, /* 2 and 4 are the same */ 1169 dcb2_desc_intr_set, 1170 dcb2_desc_intr_get, 1171 dcb2_tx_l2pbm_set, 1172 dcb2_tx_utpbm_set, 1173 dcb2_tx_l3pbm_set, 1174 dcb2_tx_crc_set, 1175 dcb2_tx_cos_set, 1176 dcb2_tx_destmod_set, 1177 dcb2_tx_destport_set, 1178 dcb2_tx_opcode_set, 1179 dcb2_tx_srcmod_set, 1180 dcb2_tx_srcport_set, 1181 dcb2_tx_prio_set, 1182 dcb2_tx_pfm_set, 1183 dcb4_rx_untagged_get, 1184 dcb4_rx_crc_get, 1185 dcb4_rx_cos_get, 1186 dcb4_rx_destmod_get, 1187 dcb4_rx_destport_get, 1188 dcb4_rx_opcode_get, 1189 dcb4_rx_classtag_get, 1190 dcb4_rx_matchrule_get, 1191 dcb4_rx_start_get, 1192 dcb4_rx_end_get, 1193 dcb4_rx_error_get, 1194 dcb4_rx_prio_get, 1195 dcb4_rx_reason_get, 1196 dcb4_rx_reason_hi_get, 1197 dcb4_rx_ingport_get, 1198 dcb4_rx_srcport_get, 1199 dcb4_rx_srcmod_get, 1200 dcb4_rx_mcast_get, 1201 dcb4_rx_vclabel_get, 1202 dcb4_rx_mirror_get, 1203 dcb4_rx_timestamp_get, 1204 dcb4_rx_timestamp_upper_get, 1205 dcb0_hg_set, 1206 dcb0_hg_get, 1207 dcb0_stat_set, 1208 dcb0_stat_get, 1209 dcb0_purge_set, 1210 dcb0_purge_get, 1211 dcb0_mhp_get, 1212 dcb0_outer_vid_get, 1213 dcb0_outer_pri_get, 1214 dcb0_outer_cfi_get, 1215 dcb0_rx_outer_tag_action_get, 1216 dcb0_inner_vid_get, 1217 dcb0_inner_pri_get, 1218 dcb0_inner_cfi_get, 1219 dcb0_rx_inner_tag_action_get, 1220 dcb0_rx_bpdu_get, 1221 dcb0_rx_l3_intf_get, 1222 dcb0_rx_decap_tunnel_get, 1223 dcb4_rx_switch_drop_get, 1224 dcb4_olp_encap_oam_pkt_get, 1225 dcb4_read_ecc_error_get, 1226 dcb4_desc_remaining_get, 1227 dcb4_desc_remaining_set, 1228 dcb4_desc_status_get, 1229 dcb4_desc_status_set, 1230 dcb4_match_id_lo_get, 1231 dcb4_match_id_hi_get, 1232 dcb4_forwarding_type_get, 1233 dcb4_forwarding_zone_id_get, 1234 #ifdef BROADCOM_DEBUG 1235 dcb2_tx_l2pbm_get, 1236 dcb2_tx_utpbm_get, 1237 dcb2_tx_l3pbm_get, 1238 dcb2_tx_crc_get, 1239 dcb2_tx_cos_get, 1240 dcb2_tx_destmod_get, 1241 dcb2_tx_destport_get, 1242 dcb2_tx_opcode_get, 1243 dcb2_tx_srcmod_get, 1244 dcb2_tx_srcport_get, 1245 dcb2_tx_prio_get, 1246 dcb2_tx_pfm_get, 1247 1248 dcb0_dump, 1249 dcb0_reason_dump, 1250 #endif /* BROADCOM_DEBUG */ 1251 #ifdef PLISIM 1252 dcb4_status_init, 1253 dcb2_xfercount_set, /* 2 and 4 are the same */ 1254 dcb4_rx_start_set, 1255 dcb4_rx_end_set, 1256 dcb4_rx_error_set, 1257 dcb4_rx_crc_set, 1258 NULL, 1259 #endif 1260 NULL, 1261 }; 1262 1263 #endif /* BCM_HERCULES_SUPPORT */ 1264 1265 1266 #if defined(BCM_XGS3_SWITCH_SUPPORT) 1267 1268 #if defined(BCM_XGS3_SWITCH_SUPPORT) 1269 /* 1270 * DCB Type 9 Support 1271 */ 1272 1273 #ifdef BCM_FIREBOLT_SUPPORT 1274 static soc_rx_reason_t 1275 dcb9_rx_reason_map[] = { 1276 socRxReasonUnknownVlan, /* Offset 0 */ 1277 socRxReasonL2SourceMiss, /* Offset 1 */ 1278 socRxReasonL2DestMiss, /* Offset 2 */ 1279 socRxReasonL2Move, /* Offset 3 */ 1280 socRxReasonL2Cpu, /* Offset 4 */ 1281 socRxReasonSampleSource, /* Offset 5 */ 1282 socRxReasonSampleDest, /* Offset 6 */ 1283 socRxReasonL3SourceMiss, /* Offset 7 */ 1284 socRxReasonL3DestMiss, /* Offset 8 */ 1285 socRxReasonL3SourceMove, /* Offset 9 */ 1286 socRxReasonMcastMiss, /* Offset 10 */ 1287 socRxReasonIpMcastMiss, /* Offset 11 */ 1288 socRxReasonFilterMatch, /* Offset 12 */ 1289 socRxReasonL3HeaderError, /* Offset 13 */ 1290 socRxReasonProtocol, /* Offset 14 */ 1291 socRxReasonDosAttack, /* Offset 15 */ 1292 socRxReasonMartianAddr, /* Offset 16 */ 1293 socRxReasonTunnelError, /* Offset 17 */ 1294 socRxReasonL2MtuFail, /* Offset 18 */ 1295 socRxReasonIcmpRedirect, /* Offset 19 */ 1296 socRxReasonL3Slowpath, /* Offset 20 */ 1297 socRxReasonInvalid, /* Offset 21 */ 1298 socRxReasonInvalid, /* Offset 22 */ 1299 socRxReasonInvalid, /* Offset 23 */ 1300 socRxReasonInvalid, /* Offset 24 */ 1301 socRxReasonInvalid, /* Offset 25 */ 1302 socRxReasonInvalid, /* Offset 26 */ 1303 socRxReasonInvalid, /* Offset 27 */ 1304 socRxReasonInvalid, /* Offset 28 */ 1305 socRxReasonInvalid, /* Offset 29 */ 1306 socRxReasonInvalid, /* Offset 30 */ 1307 socRxReasonInvalid /* Offset 31 */ 1308 }; 1309 1310 static soc_rx_reason_t *dcb9_rx_reason_maps[] = { 1311 dcb9_rx_reason_map, 1312 NULL 1313 }; 1314 #endif /* BCM_FIREBOLT_SUPPORT */ 1315 1316 static void 1317 dcb9_init(dcb_t *dcb) 1318 { 1319 uint32 *d = (uint32 *)dcb; 1320 1321 d[0] = d[1] = d[2] = d[3] = d[4] = 0; 1322 d[5] = d[6] = d[7] = d[8] = d[9] = d[10] = 0; 1323 } 1324 1325 static int 1326 dcb9_addtx(dv_t *dv, sal_vaddr_t addr, uint32 count, 1327 pbmp_t l2pbm, pbmp_t utpbm, pbmp_t l3pbm, uint32 flags, uint32 *hgh) 1328 { 1329 dcb9_t *d; /* DCB */ 1330 uint32 *di; /* DCB integer pointer */ 1331 uint32 paddr; /* Packet buffer physical address */ 1332 1333 d = (dcb9_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); 1334 1335 if (addr) { 1336 paddr = soc_cm_l2p(dv->dv_unit, (void *)addr); 1337 } else { 1338 paddr = 0; 1339 } 1340 1341 if (dv->dv_vcnt > 0 && (dv->dv_flags & DV_F_COMBINE_DCB) && 1342 (d[-1].c_sg != 0) && 1343 (d[-1].addr + d[-1].c_count) == paddr && 1344 d[-1].c_count + count <= DCB_MAX_REQCOUNT) { 1345 d[-1].c_count += count; 1346 return dv->dv_cnt - dv->dv_vcnt; 1347 } 1348 1349 if (dv->dv_vcnt >= dv->dv_cnt) { 1350 return SOC_E_FULL; 1351 } 1352 if (dv->dv_vcnt > 0) { /* chain off previous dcb */ 1353 d[-1].c_chain = 1; 1354 } 1355 1356 di = (uint32 *)d; 1357 di[0] = di[1] = di[2] = di[3] = di[4] = 0; 1358 di[5] = di[6] = di[7] = di[8] = di[9] = di[10] = 0; 1359 1360 d->addr = paddr; 1361 d->c_count = count; 1362 d->c_sg = 1; 1363 1364 d->c_stat = 1; 1365 d->c_purge = SOC_DMA_PURGE_GET(flags); 1366 if (SOC_DMA_HG_GET(flags)) { 1367 #if defined(BCM_BRADLEY_SUPPORT) || defined(BCM_RAPTOR_SUPPORT) 1368 soc_higig_hdr_t *mh = (soc_higig_hdr_t *)hgh; 1369 if (mh->overlay1.start == SOC_HIGIG2_START) { 1370 #if defined(BCM_BRADLEY_SUPPORT) 1371 dcb11_t *d11 = (dcb11_t *)d; 1372 #elif defined(BCM_RAPTOR_SUPPORT) 1373 dcb12_t *d11 = (dcb12_t *)d; 1374 #endif 1375 d11->mh3 = soc_ntohl(hgh[3]); 1376 } 1377 #endif /* BCM_BRADLEY_SUPPORT || BCM_RAPTOR_SUPPORT */ 1378 d->c_hg = 1; 1379 d->mh0 = soc_ntohl(hgh[0]); 1380 d->mh1 = soc_ntohl(hgh[1]); 1381 d->mh2 = soc_ntohl(hgh[2]); 1382 } 1383 1384 dv->dv_vcnt += 1; 1385 1386 return dv->dv_cnt - dv->dv_vcnt; 1387 } 1388 1389 static int 1390 dcb9_addrx(dv_t *dv, sal_vaddr_t addr, uint32 count, uint32 flags) 1391 { 1392 dcb9_t *d; /* DCB */ 1393 uint32 *di; /* DCB integer pointer */ 1394 1395 d = (dcb9_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); 1396 1397 if (dv->dv_vcnt > 0) { /* chain off previous dcb */ 1398 d[-1].c_chain = 1; 1399 } 1400 1401 di = (uint32 *)d; 1402 di[0] = di[1] = di[2] = di[3] = di[4] = 0; 1403 di[5] = di[6] = di[7] = di[8] = di[9] = di[10] = 0; 1404 1405 if (addr) { 1406 d->addr = soc_cm_l2p(dv->dv_unit, (void *)addr); 1407 } 1408 d->c_count = count; 1409 d->c_sg = 1; 1410 1411 dv->dv_vcnt += 1; 1412 return dv->dv_cnt - dv->dv_vcnt; 1413 } 1414 1415 static uint32 1416 dcb9_intrinfo(int unit, dcb_t *dcb, int tx, uint32 *count) 1417 { 1418 dcb9_t *d = (dcb9_t *)dcb; /* DCB */ 1419 uint32 f; /* SOC_DCB_INFO_* flags */ 1420 1421 if (!d->done) { 1422 return 0; 1423 } 1424 f = SOC_DCB_INFO_DONE; 1425 if (tx) { 1426 if (!d->c_sg) { 1427 f |= SOC_DCB_INFO_PKTEND; 1428 } 1429 } else { 1430 if (d->end) { 1431 f |= SOC_DCB_INFO_PKTEND; 1432 } 1433 } 1434 *count = d->count; 1435 return f; 1436 } 1437 1438 /* 1439 * Function: 1440 * dcb9_rx_untagged_get 1441 * Description: 1442 * When Firebolt/Firebolt_2 are in double tagging mode: 1443 * - If incoming front-panel packet is double tagged, 1444 * d->ingress_untagged = 0, 1445 * h->hgp_overlay1.ingress_tagged = 1, d->add_vid = 0. 1446 * - If incoming front-panel packet is single outer tagged, 1447 * d->ingress_untagged = 0, 1448 * h->hgp_overlay1.ingress_tagged = 0, d->add_vid = 0. 1449 * - If incoming front-panel packet is single inner tagged, 1450 * d->ingress_untagged = 0, 1451 * h->hgp_overlay1.ingress_tagged = 1, d->add_vid = 1. 1452 * - If incoming front-panel packet is untagged, 1453 * d->ingress_untagged = 1, 1454 * h->hgp_overlay1.ingress_tagged = 0, d->add_vid = 1. 1455 * - For an incoming Higig packet, 1456 * d->ingress_untagged = 0, 1457 * h->hgp_overlay1.ingress_tagged = 1 if the packet contains 1458 * an inner tag, 0 otherwise, 1459 * d->add_vid = 1. 1460 * 1461 * In single tagging mode: 1462 * - If incoming front-panel packet is tagged, 1463 * d->ingress_untagged = 0, 1464 * h->hgp_overlay1.ingress_tagged = 1, d->add_vid = 0. 1465 * - If incoming front-panel packet is untagged, 1466 * d->ingress_untagged = 1, 1467 * h->hgp_overlay1.ingress_tagged = 0, d->add_vid = 1. 1468 * - For an incoming Higig packet, 1469 * d->ingress_untagged = 0, 1470 * h->hgp_overlay1.ingress_tagged = 1 if the packet originally 1471 * ingressed the ingress chip's front-panel port with a tag, 1472 * 0 otherwise, 1473 * d->add_vid = 1. 1474 */ 1475 static uint32 1476 dcb9_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg) 1477 { 1478 dcb9_t *d = (dcb9_t *)dcb; 1479 uint32 hgh[3]; 1480 soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hgh[0]; 1481 1482 hgh[0] = soc_htonl(d->mh0); 1483 hgh[1] = soc_htonl(d->mh1); 1484 hgh[2] = soc_htonl(d->mh2); 1485 1486 return (dt_mode ? 1487 (ingport_is_hg ? 1488 (h->hgp_overlay1.ingress_tagged ? 0 : 2) : 1489 (h->hgp_overlay1.ingress_tagged ? 1490 (d->add_vid ? 1 : 0) : 1491 (d->add_vid ? 3 : 2))) : 1492 (h->hgp_overlay1.ingress_tagged ? 2 : 3)); 1493 } 1494 1495 SETFUNCFIELD(9, reqcount, c_count, uint32 count, count) 1496 GETFUNCFIELD(9, reqcount, c_count) 1497 GETFUNCFIELD(9, xfercount, count) 1498 /* addr_set, addr_get, paddr_get - Same as DCB 0 */ 1499 SETFUNCFIELD(9, done, done, int val, val ? 1 : 0) 1500 GETFUNCFIELD(9, done, done) 1501 SETFUNCFIELD(9, sg, c_sg, int val, val ? 1 : 0) 1502 GETFUNCFIELD(9, sg, c_sg) 1503 SETFUNCFIELD(9, chain, c_chain, int val, val ? 1 : 0) 1504 GETFUNCFIELD(9, chain, c_chain) 1505 SETFUNCFIELD(9, reload, c_reload, int val, val ? 1 : 0) 1506 GETFUNCFIELD(9, reload, c_reload) 1507 SETFUNCERR(9, desc_intr, int) 1508 GETFUNCERR(9, desc_intr) 1509 SETFUNCERR(9, tx_l2pbm, pbmp_t) 1510 SETFUNCERR(9, tx_utpbm, pbmp_t) 1511 SETFUNCERR(9, tx_l3pbm, pbmp_t) 1512 SETFUNCERR(9, tx_crc, int) 1513 SETFUNCERR(9, tx_cos, int) 1514 SETFUNCERR(9, tx_destmod, uint32) 1515 SETFUNCERR(9, tx_destport, uint32) 1516 SETFUNCERR(9, tx_opcode, uint32) 1517 SETFUNCERR(9, tx_srcmod, uint32) 1518 SETFUNCERR(9, tx_srcport, uint32) 1519 SETFUNCERR(9, tx_prio, uint32) 1520 SETFUNCERR(9, tx_pfm, uint32) 1521 GETFUNCFIELD(9, rx_start, start) 1522 GETFUNCFIELD(9, rx_end, end) 1523 GETFUNCFIELD(9, rx_error, error) 1524 /* Fields extracted from MH/PBI */ 1525 GETFUNCFIELD(9, rx_cos, cpu_cos) 1526 GETHGFUNCEXPR(9, rx_destmod, (h->overlay1.dst_mod | 1527 (h->hgp_overlay1.dst_mod_5 << 5))) 1528 GETHGFUNCFIELD(9, rx_destport, dst_port) 1529 GETHGFUNCFIELD(9, rx_opcode, opcode) 1530 GETHGFUNCFIELD(9, rx_prio, vlan_pri) /* outer_pri */ 1531 1532 #ifdef BCM_FIREBOLT_SUPPORT 1533 GETFUNCFIELD(9, rx_matchrule, match_rule) 1534 GETFUNCFIELD(9, rx_reason, reason) 1535 GETFUNCNULL(9, rx_reason_hi) 1536 GETFUNCFIELD(9, rx_ingport, srcport) 1537 GETFUNCERR(9, rx_vclabel) 1538 GETFUNCEXPR(9, rx_mirror, ((d->imirror) | (d->emirror))) 1539 GETFUNCERR(9, rx_timestamp) 1540 GETFUNCERR(9, rx_timestamp_upper) 1541 GETFUNCFIELD(9, outer_vid, outer_vid) 1542 GETFUNCFIELD(9, outer_pri, outer_pri) 1543 GETFUNCFIELD(9, outer_cfi, outer_cfi) 1544 #endif /* BCM_FIREBOLT_SUPPORT */ 1545 GETHGFUNCFIELD(9, rx_srcport, src_port) 1546 GETHGFUNCEXPR(9, rx_srcmod, (h->overlay1.src_mod | 1547 (h->hgp_overlay1.src_mod_5 << 5))) 1548 /* DCB 9 specific fields */ 1549 SETFUNCFIELD(9, hg, c_hg, uint32 hg, hg) 1550 GETFUNCFIELD(9, hg, c_hg) 1551 SETFUNCFIELD(9, stat, c_stat, uint32 stat, stat) 1552 GETFUNCFIELD(9, stat, c_stat) 1553 SETFUNCFIELD(9, purge, c_purge, uint32 purge, purge) 1554 GETFUNCFIELD(9, purge, c_purge) 1555 GETPTREXPR(9, mhp, &(d->mh0)) 1556 GETFUNCNULL(9, rx_outer_tag_action) 1557 GETFUNCNULL(9, inner_vid) 1558 GETFUNCNULL(9, inner_pri) 1559 GETFUNCNULL(9, inner_cfi) 1560 GETFUNCNULL(9, rx_inner_tag_action) 1561 GETFUNCFIELD(9, rx_bpdu, bpdu) 1562 GETFUNCFIELD(9, rx_l3_intf, l3_intf) 1563 GETFUNCNULL(9, rx_decap_tunnel) 1564 1565 1566 #ifdef BCM_BRADLEY_SUPPORT 1567 static uint32 1568 dcb11_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg) 1569 { 1570 dcb11_t *d = (dcb11_t *)dcb; 1571 uint32 hgh[4]; 1572 soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hgh[0]; 1573 1574 COMPILER_REFERENCE(dt_mode); 1575 COMPILER_REFERENCE(ingport_is_hg); 1576 1577 hgh[0] = soc_htonl(d->mh0); 1578 hgh[1] = soc_htonl(d->mh1); 1579 hgh[2] = soc_htonl(d->mh2); 1580 hgh[3] = soc_htonl(d->mh3); 1581 1582 return (!h->ppd_overlay1.ingress_tagged); 1583 } 1584 1585 GETFUNCFIELD(11, rx_cos, cpu_cos) 1586 GETHG2FUNCFIELD(11, rx_destmod, dst_mod) 1587 GETHG2FUNCFIELD(11, rx_destport, dst_port) 1588 GETHG2FUNCEXPR(11, rx_srcport, h->ppd_overlay1.src_port | 1589 ((h->ppd_overlay1.ppd_type <= 1) ? 1590 (h->ppd_overlay1.src_t << 5) : 0)) 1591 GETHG2FUNCFIELD(11, rx_srcmod, src_mod) 1592 GETHG2FUNCFIELD(11, rx_opcode, opcode) 1593 GETHG2FUNCFIELD(11, rx_prio, vlan_pri) /* outer_pri */ 1594 GETFUNCFIELD(11, rx_matchrule, match_rule) 1595 GETFUNCEXPR(11, rx_reason, d->reason) 1596 GETFUNCNULL(11, rx_reason_hi) 1597 GETFUNCFIELD(11, rx_ingport, srcport) 1598 GETFUNCEXPR(11, rx_mirror, ((d->imirror) | (d->emirror))) 1599 GETFUNCERR(11, rx_timestamp) 1600 GETFUNCERR(11, rx_timestamp_upper) 1601 SETFUNCERR(11, stat, uint32) 1602 GETFUNCEXPR(11, stat, d->c_hg ^ d->c_hg) /* 0 */ 1603 SETFUNCERR(11, purge, uint32) 1604 GETFUNCEXPR(11, purge, d->c_hg ^ d->c_hg) /* 0 */ 1605 GETFUNCFIELD(11, outer_vid, outer_vid) 1606 GETFUNCFIELD(11, outer_pri, outer_pri) 1607 GETFUNCFIELD(11, outer_cfi, outer_cfi) 1608 GETFUNCFIELD(11, rx_bpdu, bpdu) 1609 GETFUNCFIELD(11, rx_l3_intf, l3_intf) 1610 #endif /* BCM_BRADLEY_SUPPORT */ 1611 1612 #if defined(BCM_RAPTOR_SUPPORT) 1613 static uint32 1614 dcb12_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg) 1615 { 1616 dcb12_t *d = (dcb12_t *)dcb; 1617 uint32 hgh[4]; 1618 soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hgh[0]; 1619 1620 COMPILER_REFERENCE(dt_mode); 1621 COMPILER_REFERENCE(ingport_is_hg); 1622 1623 hgh[0] = soc_htonl(d->mh0); 1624 hgh[1] = soc_htonl(d->mh1); 1625 hgh[2] = soc_htonl(d->mh2); 1626 hgh[3] = soc_htonl(d->mh3); 1627 1628 return (!h->ppd_overlay1.ingress_tagged); 1629 } 1630 1631 GETHG2FUNCFIELD(12, rx_destmod, dst_mod) 1632 GETHG2FUNCFIELD(12, rx_destport, dst_port) 1633 GETHG2FUNCFIELD(12, rx_opcode, opcode) 1634 GETHG2FUNCFIELD(12, rx_prio, vlan_pri) /* outer_pri */ 1635 GETHG2FUNCFIELD(12, rx_srcport, src_port) 1636 GETHG2FUNCFIELD(12, rx_srcmod, src_mod) 1637 GETFUNCFIELD(12, rx_ingport, srcport) 1638 GETFUNCFIELD(12, rx_crc, regen_crc) 1639 GETFUNCFIELD(12, rx_cos, cpu_cos) 1640 GETFUNCFIELD(12, rx_matchrule, match_rule) 1641 GETFUNCFIELD(12, rx_reason, reason) 1642 GETFUNCNULL(12, rx_reason_hi) 1643 GETHG2FUNCEXPR(12, rx_mcast, ((h->ppd_overlay1.dst_mod << 8) | 1644 (h->ppd_overlay1.dst_port))) 1645 GETHG2FUNCEXPR(12, rx_vclabel, ((h->ppd_overlay1.vc_label_19_16 << 16) | 1646 (h->ppd_overlay1.vc_label_15_8 << 8) | 1647 (h->ppd_overlay1.vc_label_7_0))) 1648 GETHG2FUNCEXPR(12, rx_classtag, (h->ppd_overlay1.ppd_type != 1 ? 0 : 1649 (h->ppd_overlay2.ctag_hi << 8) | 1650 (h->ppd_overlay2.ctag_lo))) 1651 GETFUNCEXPR(12, rx_mirror, ((d->imirror) | (d->emirror))) 1652 GETFUNCERR(12, rx_timestamp) 1653 GETFUNCERR(12, rx_timestamp_upper) 1654 GETFUNCFIELD(12, outer_vid, outer_vid) 1655 GETFUNCFIELD(12, outer_pri, outer_pri) 1656 GETFUNCFIELD(12, outer_cfi, outer_cfi) 1657 GETFUNCFIELD(12, rx_bpdu, bpdu) 1658 #ifdef PLISIM 1659 SETFUNCFIELD(12, rx_crc, regen_crc, int val, val ? 1 : 0) 1660 SETFUNCFIELD(12, rx_ingport, srcport, int val, val) 1661 #endif /* PLISIM */ 1662 GETHG2FUNCFIELD(15, rx_destmod, dst_mod) 1663 GETHG2FUNCFIELD(15, rx_destport, dst_port) 1664 GETHG2FUNCFIELD(15, rx_opcode, opcode) 1665 GETHG2FUNCFIELD(15, rx_prio, vlan_pri) /* outer_pri */ 1666 GETHG2FUNCFIELD(15, rx_srcport, src_port) 1667 GETHG2FUNCFIELD(15, rx_srcmod, src_mod) 1668 GETFUNCFIELD(15, rx_ingport, srcport) 1669 GETFUNCFIELD(15, rx_crc, regen_crc) 1670 GETFUNCFIELD(15, rx_cos, cpu_cos) 1671 GETFUNCFIELD(15, rx_matchrule, match_rule) 1672 GETFUNCFIELD(15, rx_reason, reason) 1673 GETFUNCNULL(15, rx_reason_hi) 1674 GETHG2FUNCEXPR(15, rx_mcast, ((h->ppd_overlay1.dst_mod << 8) | 1675 (h->ppd_overlay1.dst_port))) 1676 GETHG2FUNCEXPR(15, rx_vclabel, ((h->ppd_overlay1.vc_label_19_16 << 16) | 1677 (h->ppd_overlay1.vc_label_15_8 << 8) | 1678 (h->ppd_overlay1.vc_label_7_0))) 1679 GETHG2FUNCEXPR(15, rx_classtag, (h->ppd_overlay1.ppd_type != 1 ? 0 : 1680 (h->ppd_overlay2.ctag_hi << 8) | 1681 (h->ppd_overlay2.ctag_lo))) 1682 GETFUNCEXPR(15, rx_mirror, ((d->imirror) | (d->emirror))) 1683 GETFUNCERR(15, rx_timestamp) 1684 GETFUNCERR(15, rx_timestamp_upper) 1685 GETFUNCFIELD(15, outer_vid, outer_vid) 1686 GETFUNCFIELD(15, outer_pri, outer_pri) 1687 GETFUNCFIELD(15, outer_cfi, outer_cfi) 1688 GETFUNCFIELD(15, rx_l3_intf, l3_intf) 1689 #ifdef PLISIM 1690 SETFUNCFIELD(15, rx_crc, regen_crc, int val, val ? 1 : 0) 1691 SETFUNCFIELD(15, rx_ingport, srcport, int val, val) 1692 #endif /* PLISIM */ 1693 #endif /* BCM_RAPTOR_SUPPORT */ 1694 1695 #if defined(BCM_FIREBOLT2_SUPPORT) || defined(BCM_FIREBOLT_SUPPORT) 1696 GETFUNCFIELD(13, outer_vid, outer_vid) 1697 GETFUNCFIELD(13, outer_pri, outer_pri) 1698 GETFUNCFIELD(13, outer_cfi, outer_cfi) 1699 1700 1701 /* 1702 * Function: 1703 * dcb13_rx_untagged_get 1704 * Description: 1705 * When Firebolt/Firebolt_2 are in double tagging mode: 1706 * - If incoming front-panel packet is double tagged, 1707 * d->ingress_untagged = 0, 1708 * h->hgp_overlay1.ingress_tagged = 1, d->add_vid = 0. 1709 * - If incoming front-panel packet is single outer tagged, 1710 * d->ingress_untagged = 0, 1711 * h->hgp_overlay1.ingress_tagged = 0, d->add_vid = 0. 1712 * - If incoming front-panel packet is single inner tagged, 1713 * d->ingress_untagged = 0, 1714 * h->hgp_overlay1.ingress_tagged = 1, d->add_vid = 1. 1715 * - If incoming front-panel packet is untagged, 1716 * d->ingress_untagged = 1, 1717 * h->hgp_overlay1.ingress_tagged = 0, d->add_vid = 1. 1718 * - For an incoming Higig packet, 1719 * d->ingress_untagged = 0, 1720 * h->hgp_overlay1.ingress_tagged = 1 if the packet contains 1721 * an inner tag, 0 otherwise, 1722 * d->add_vid = 1. 1723 * 1724 * In single tagging mode: 1725 * - If incoming front-panel packet is tagged, 1726 * d->ingress_untagged = 0, 1727 * h->hgp_overlay1.ingress_tagged = 1, d->add_vid = 0. 1728 * - If incoming front-panel packet is untagged, 1729 * d->ingress_untagged = 1, 1730 * h->hgp_overlay1.ingress_tagged = 0, d->add_vid = 1. 1731 * - For an incoming Higig packet, 1732 * d->ingress_untagged = 0, 1733 * h->hgp_overlay1.ingress_tagged = 1 if the packet originally 1734 * ingressed the ingress chip's front-panel port with a tag, 1735 * 0 otherwise, 1736 * d->add_vid = 1. 1737 * 1738 * When ClassTag is configured HiGiG overlay2 format is used and 1739 * it doesn't carry ingress_tagged, so use the DCB ingress_untagged 1740 * field to determine the tag. 1741 * 1742 * FB2 will have the below limitation in determining the tag values only 1743 * when ClassTag is configured: 1744 * 1. Outer tagged and double tagged will be shown as Doubled tagged packets and 1745 * 2. For packets coming on HighGig ports, tagging can't be determined. 1746 */ 1747 static uint32 1748 dcb13_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg) 1749 { 1750 dcb13_t *d = (dcb13_t *)dcb; 1751 uint32 hgh[3]; 1752 soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hgh[0]; 1753 1754 hgh[0] = soc_htonl(d->mh0); 1755 hgh[1] = soc_htonl(d->mh1); 1756 hgh[2] = soc_htonl(d->mh2); 1757 if(h->hgp_overlay1.hdr_format == 0) 1758 { 1759 return(dt_mode ? 1760 (ingport_is_hg ? 1761 (h->hgp_overlay1.ingress_tagged ? 0 : 2) : 1762 (h->hgp_overlay1.ingress_tagged ? 1763 (d->add_vid ? 1 : 0) : 1764 (d->add_vid ? 3 : 2))) : 1765 (h->hgp_overlay1.ingress_tagged ? 2 : 3)); 1766 } 1767 else 1768 { 1769 return(dt_mode ? 1770 (d->ingress_untagged ? (d->add_vid ? 3 : 2) : 1771 (d->add_vid ? 1 : 0)) : 1772 (d->ingress_untagged ? 3 : 2)); 1773 } 1774 } 1775 1776 #endif /* BCM_FIREBOLT2_SUPPORT || BCM_FIREBOLT_SUPPORT */ 1777 1778 #if defined(BCM_HAWKEYE_SUPPORT) 1779 static uint32 1780 dcb17_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg) 1781 { 1782 dcb17_t *d = (dcb17_t *)dcb; 1783 1784 COMPILER_REFERENCE(dt_mode); 1785 COMPILER_REFERENCE(ingport_is_hg); 1786 1787 return d->ingress_untagged; 1788 } 1789 1790 GETFUNCFIELD(17, rx_srcport, srcport) 1791 GETFUNCFIELD(17, rx_reason, reason) 1792 GETFUNCFIELD(17, rx_crc, regen_crc) 1793 GETFUNCFIELD(17, rx_cos, cpu_cos) 1794 GETFUNCNULL(17, rx_destmod) 1795 GETFUNCNULL(17, rx_destport) 1796 GETFUNCNULL(17, rx_opcode) 1797 GETFUNCNULL(17, rx_classtag) 1798 GETFUNCFIELD(17, rx_prio, outer_pri) 1799 GETFUNCNULL(17, rx_srcmod) 1800 GETFUNCNULL(17, rx_mcast) 1801 GETFUNCNULL(17, rx_vclabel) 1802 GETHG2FUNCEXPR(17, rx_timestamp, ((uint32 *)h)[1]) 1803 GETFUNCERR(17, rx_timestamp_upper) 1804 #endif /* BCM_HAWKEYE_SUPPORT */ 1805 1806 #ifdef BROADCOM_DEBUG 1807 GETFUNCERR(9, tx_l2pbm) 1808 GETFUNCERR(9, tx_utpbm) 1809 GETFUNCERR(9, tx_l3pbm) 1810 GETFUNCERR(9, tx_crc) 1811 GETFUNCERR(9, tx_cos) 1812 GETFUNCERR(9, tx_destmod) 1813 GETFUNCERR(9, tx_destport) 1814 GETFUNCERR(9, tx_opcode) 1815 GETFUNCERR(9, tx_srcmod) 1816 GETFUNCERR(9, tx_srcport) 1817 GETFUNCERR(9, tx_prio) 1818 GETFUNCERR(9, tx_pfm) 1819 #endif /* BROADCOM_DEBUG */ 1820 1821 static uint32 dcb9_rx_crc_get(dcb_t *dcb) { 1822 return 0; 1823 } 1824 1825 #if defined(LE_HOST) 1826 static uint32 dcb9_rx_classtag_get(dcb_t *dcb) 1827 { 1828 dcb9_t *d = (dcb9_t *)dcb; 1829 uint32 hgh[3]; 1830 soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hgh[0]; 1831 hgh[0] = soc_htonl(d->mh0); 1832 hgh[1] = soc_htonl(d->mh1); 1833 hgh[2] = soc_htonl(d->mh2); 1834 if (h->overlay1.hdr_format != 1) { /* return 0 if not overlay 2 format */ 1835 return 0; 1836 } 1837 return((h->overlay2.ctag_hi << 8) | (h->overlay2.ctag_lo << 0)); 1838 } 1839 1840 static uint32 dcb9_rx_mcast_get(dcb_t *dcb) 1841 { 1842 dcb9_t *d = (dcb9_t *)dcb; 1843 uint32 hgh[3]; 1844 soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hgh[0]; 1845 hgh[0] = soc_htonl(d->mh0); 1846 hgh[1] = soc_htonl(d->mh1); 1847 hgh[2] = soc_htonl(d->mh2); 1848 return((h->overlay1.dst_mod << 5) | (h->overlay1.dst_port << 0)); 1849 } 1850 #else 1851 static uint32 dcb9_rx_classtag_get(dcb_t *dcb) 1852 { 1853 dcb9_t *d = (dcb9_t *)dcb; 1854 soc_higig_hdr_t *h = (soc_higig_hdr_t *)&d->mh0; 1855 if (h->overlay1.hdr_format != 1) { /* return 0 if not overlay 2 format */ 1856 return 0; 1857 } 1858 return((h->overlay2.ctag_hi << 8) | (h->overlay2.ctag_lo << 0)); 1859 } 1860 1861 static uint32 dcb9_rx_mcast_get(dcb_t *dcb) 1862 { 1863 dcb9_t *d = (dcb9_t *)dcb; 1864 soc_higig_hdr_t *h = (soc_higig_hdr_t *)&d->mh0; 1865 return((h->overlay1.dst_mod << 5) | (h->overlay1.dst_port << 0)); 1866 } 1867 #endif 1868 1869 #ifdef PLISIM /* these routines are only used by pcid */ 1870 static void dcb9_status_init(dcb_t *dcb) 1871 { 1872 uint32 *d = (uint32 *)dcb; 1873 1874 d[5] = d[6] = d[7] = d[8] = d[9] = d[10] = 0; 1875 } 1876 SETFUNCFIELD(9, xfercount, count, uint32 count, count) 1877 SETFUNCFIELD(9, rx_start, start, int val, val ? 1 : 0) 1878 SETFUNCFIELD(9, rx_end, end, int val, val ? 1 : 0) 1879 SETFUNCFIELD(9, rx_error, error, int val, val ? 1 : 0) 1880 SETFUNCEXPRIGNORE(9, rx_crc, int val, ignore) 1881 #ifdef BCM_FIREBOLT_SUPPORT 1882 SETFUNCFIELD(9, rx_ingport, srcport, int val, val) 1883 #endif /* BCM_FIREBOLT_SUPPORT */ 1884 #ifdef BCM_BRADLEY_SUPPORT 1885 SETFUNCFIELD(11, rx_ingport, srcport, int val, val) 1886 #endif /* BCM_BRADLEY_SUPPORT */ 1887 #endif /* PLISIM */ 1888 1889 #ifdef BROADCOM_DEBUG 1890 static void 1891 dcb9_dump(int unit, dcb_t *dcb, char *prefix, int tx) 1892 { 1893 uint32 *p; 1894 int i, size; 1895 dcb9_t *d = (dcb9_t *)dcb; 1896 char ps[((DCB_MAX_SIZE/sizeof(uint32))*9)+1]; 1897 #if defined(LE_HOST) 1898 uint32 hgh[4]; 1899 uint8 *h = (uint8 *)&hgh[0]; 1900 1901 #if defined(BCM_BRADLEY_SUPPORT) || defined(BCM_RAPTOR_SUPPORT) 1902 #if defined(BCM_BRADLEY_SUPPORT) 1903 dcb11_t *d11 = (dcb11_t *)d; 1904 #elif defined(BCM_RAPTOR_SUPPORT) 1905 dcb12_t *d11 = (dcb12_t *)d; 1906 #endif 1907 hgh[3] = soc_htonl(d11->mh3); 1908 #endif 1909 hgh[0] = soc_htonl(d->mh0); 1910 hgh[1] = soc_htonl(d->mh1); 1911 hgh[2] = soc_htonl(d->mh2); 1912 #else 1913 uint8 *h = (uint8 *)&d->mh0; 1914 #endif 1915 1916 p = (uint32 *)dcb; 1917 size = SOC_DCB_SIZE(unit) / sizeof(uint32); 1918 for (i = 0; i < size; i++) { 1919 sal_sprintf(&ps[i*9], "%08x ", p[i]); 1920 } 1921 LOG_CLI((BSL_META_U(unit, 1922 "%s\t%s\n"), prefix, ps)); 1923 if ((SOC_DCB_HG_GET(unit, dcb)) || (SOC_DCB_RX_START_GET(unit, dcb))) { 1924 soc_dma_higig_dump(unit, prefix, h, 0, 0, NULL); 1925 } 1926 LOG_CLI((BSL_META_U(unit, 1927 "%s\ttype %d %ssg %schain %sreload %shg %sstat %spause %spurge\n"), 1928 prefix, 1929 SOC_DCB_TYPE(unit), 1930 SOC_DCB_SG_GET(unit, dcb) ? "" : "!", 1931 SOC_DCB_CHAIN_GET(unit, dcb) ? "" : "!", 1932 SOC_DCB_RELOAD_GET(unit, dcb) ? "" : "!", 1933 SOC_DCB_HG_GET(unit, dcb) ? "" : "!", 1934 SOC_DCB_STAT_GET(unit, dcb) ? "" : "!", 1935 d->c_pause ? "" : "!", 1936 SOC_DCB_PURGE_GET(unit, dcb) ? "" : "!")); 1937 LOG_CLI((BSL_META_U(unit, 1938 "%s\taddr %p reqcount %d xfercount %d\n"), 1939 prefix, 1940 (void *)SOC_DCB_ADDR_GET(unit, dcb), 1941 SOC_DCB_REQCOUNT_GET(unit, dcb), 1942 SOC_DCB_XFERCOUNT_GET(unit, dcb))); 1943 if (!tx) { 1944 LOG_CLI((BSL_META_U(unit, 1945 "%s\t%sdone %sstart %send %serror\n"), 1946 prefix, 1947 SOC_DCB_DONE_GET(unit, dcb) ? "" : "!", 1948 SOC_DCB_RX_START_GET(unit, dcb) ? "" : "!", 1949 SOC_DCB_RX_END_GET(unit, dcb) ? "" : "!", 1950 SOC_DCB_RX_ERROR_GET(unit, dcb) ? "" : "!")); 1951 } 1952 #ifdef BCM_FIREBOLT_SUPPORT 1953 if ((!tx) && (SOC_DCB_RX_START_GET(unit, dcb)) && 1954 (SOC_DCB_TYPE(unit) == 9)) { 1955 dcb0_reason_dump(unit, dcb, prefix); 1956 LOG_CLI((BSL_META_U(unit, 1957 "%s %sadd_vid %sbpdu %scell_error %schg_tos %semirror %simirror\n"), 1958 prefix, 1959 d->add_vid ? "" : "!", 1960 d->bpdu ? "" : "!", 1961 d->cell_error ? "" : "!", 1962 d->chg_tos ? "" : "!", 1963 d->emirror ? "" : "!", 1964 d->imirror ? "" : "!" 1965 )); 1966 LOG_CLI((BSL_META_U(unit, 1967 "%s %sl3ipmc %sl3only %sl3uc %spkt_aged %spurge_cell %ssrc_hg\n"), 1968 prefix, 1969 d->l3ipmc ? "" : "!", 1970 d->l3only ? "" : "!", 1971 d->l3uc ? "" : "!", 1972 d->pkt_aged ? "" : "!", 1973 d->purge_cell ? "" : "!", 1974 d->src_hg ? "" : "!" 1975 )); 1976 LOG_CLI((BSL_META_U(unit, 1977 "%s %sswitch_pkt %sregen_crc %sdecap_iptunnel %sing_untagged\n"), 1978 prefix, 1979 d->switch_pkt ? "" : "!", 1980 d->regen_crc ? "" : "!", 1981 d->decap_iptunnel ? "" : "!", 1982 d->ingress_untagged ? "" : "!" 1983 )); 1984 LOG_CLI((BSL_META_U(unit, 1985 "%s cpu_cos=%d cos=%d l3_intf=%d mtp_index=%d reason=%08x\n"), 1986 prefix, 1987 d->cpu_cos, 1988 d->cos, 1989 d->l3_intf, 1990 (d->mtp_index_hi << 2) | d->mtp_index_lo, 1991 d->reason 1992 )); 1993 LOG_CLI((BSL_META_U(unit, 1994 "%s match_rule=%d nh_index=%d\n"), 1995 prefix, 1996 d->match_rule, 1997 d->nh_index 1998 )); 1999 LOG_CLI((BSL_META_U(unit, 2000 "%s srcport=%d dscp=%d outer_pri=%d outer_cfi=%d outer_vid=%d\n"), 2001 prefix, 2002 d->srcport, 2003 (d->dscp_hi << 4) | d->dscp_lo, 2004 d->outer_pri, 2005 d->outer_cfi, 2006 d->outer_vid 2007 )); 2008 } 2009 #endif /* BCM_FIREBOLT_SUPPORT */ 2010 #ifdef BCM_BRADLEY_SUPPORT 2011 if ((!tx) && (SOC_DCB_RX_START_GET(unit, dcb)) && 2012 (SOC_DCB_TYPE(unit) == 11)) { 2013 dcb11_t *d = (dcb11_t *)dcb; 2014 dcb0_reason_dump(unit, dcb, prefix); 2015 LOG_CLI((BSL_META_U(unit, 2016 "%s %sadd_vid %sbpdu %scell_error %schg_tos %semirror %simirror\n"), 2017 prefix, 2018 d->add_vid ? "" : "!", 2019 d->bpdu ? "" : "!", 2020 d->cell_error ? "" : "!", 2021 d->chg_tos ? "" : "!", 2022 d->emirror ? "" : "!", 2023 d->imirror ? "" : "!" 2024 )); 2025 LOG_CLI((BSL_META_U(unit, 2026 "%s %sl3ipmc %sl3only %sl3uc %spkt_aged %spurge_cell %ssrc_hg\n"), 2027 prefix, 2028 d->l3ipmc ? "" : "!", 2029 d->l3only ? "" : "!", 2030 d->l3uc ? "" : "!", 2031 d->pkt_aged ? "" : "!", 2032 d->purge_cell ? "" : "!", 2033 d->src_hg ? "" : "!" 2034 )); 2035 LOG_CLI((BSL_META_U(unit, 2036 "%s %sswitch_pkt %sregen_crc %sdecap_iptunnel %sing_untagged\n"), 2037 prefix, 2038 d->switch_pkt ? "" : "!", 2039 d->regen_crc ? "" : "!", 2040 d->decap_iptunnel ? "" : "!", 2041 d->ingress_untagged ? "" : "!" 2042 )); 2043 LOG_CLI((BSL_META_U(unit, 2044 "%s cpu_cos=%d cos=%d l3_intf=%d mtp_index=%d reason=%08x\n"), 2045 prefix, 2046 d->cpu_cos, 2047 d->cos, 2048 d->l3_intf, 2049 d->mtp_index, 2050 d->reason 2051 )); 2052 LOG_CLI((BSL_META_U(unit, 2053 "%s match_rule=%d nh_index=%d hg_type=%d\n"), 2054 prefix, 2055 d->match_rule, 2056 d->nh_index, 2057 d->hg_type 2058 )); 2059 LOG_CLI((BSL_META_U(unit, 2060 "%s srcport=%d dscp=%d outer_pri=%d outer_cfi=%d outer_vid=%d\n"), 2061 prefix, 2062 d->srcport, 2063 d->dscp, 2064 d->outer_pri, 2065 d->outer_cfi, 2066 d->outer_vid 2067 )); 2068 } 2069 #endif /* BCM_BRADLEY_SUPPORT */ 2070 #if defined(BCM_RAPTOR_SUPPORT) 2071 if ((!tx) && (SOC_DCB_RX_START_GET(unit, dcb)) && 2072 (SOC_DCB_TYPE(unit) == 12)) { 2073 dcb12_t *d = (dcb12_t *)dcb; 2074 dcb0_reason_dump(unit, dcb, prefix); 2075 LOG_CLI((BSL_META_U(unit, 2076 "%s %sdo_not_change_ttl %sadd_vid %sbpdu %scell_error %schg_tos\n"), 2077 prefix, 2078 d->do_not_change_ttl ? "" : "!", 2079 d->add_vid ? "" : "!", 2080 d->bpdu ? "" : "!", 2081 d->cell_error ? "" : "!", 2082 d->chg_tos ? "" : "!" 2083 )); 2084 LOG_CLI((BSL_META_U(unit, 2085 "%s %sl3uc %spkt_aged %spurge_cell %ssrc_hg %semirror %simirror\n"), 2086 prefix, 2087 d->l3uc ? "" : "!", 2088 d->pkt_aged ? "" : "!", 2089 d->purge_cell ? "" : "!", 2090 d->src_hg ? "" : "!", 2091 d->emirror ? "" : "!", 2092 d->imirror ? "" : "!" 2093 )); 2094 LOG_CLI((BSL_META_U(unit, 2095 "%s %sswitch_pkt %sregen_crc %sdecap_iptunnel %sing_untagged\n"), 2096 prefix, 2097 d->switch_pkt ? "" : "!", 2098 d->regen_crc ? "" : "!", 2099 d->decap_iptunnel ? "" : "!", 2100 d->ingress_untagged ? "" : "!" 2101 )); 2102 LOG_CLI((BSL_META_U(unit, 2103 "%s cpu_cos=%d cos=%d mtp_index=%d reason=%08x\n"), 2104 prefix, 2105 d->cpu_cos, 2106 d->cos, 2107 d->mtp_index, 2108 d->reason 2109 )); 2110 LOG_CLI((BSL_META_U(unit, 2111 "%s match_rule=%d nh_index=%d\n"), 2112 prefix, 2113 d->match_rule, 2114 d->nh_index 2115 )); 2116 LOG_CLI((BSL_META_U(unit, 2117 "%s srcport=%d dscp=%d outer_pri=%d outer_cfi=%d outer_vid=%d\n"), 2118 prefix, 2119 d->srcport, 2120 d->dscp, 2121 d->outer_pri, 2122 d->outer_cfi, 2123 d->outer_vid 2124 )); 2125 } 2126 #endif /* BCM_RAPTOR_SUPPORT */ 2127 #if defined(BCM_FIREBOLT2_SUPPORT) || defined(BCM_FIREBOLT_SUPPORT) 2128 if ((!tx) && (SOC_DCB_RX_START_GET(unit, dcb)) && 2129 (SOC_DCB_TYPE(unit) == 13)) { 2130 dcb13_t *d = (dcb13_t *)dcb; 2131 dcb0_reason_dump(unit, dcb, prefix); 2132 LOG_CLI((BSL_META_U(unit, 2133 "%s %sadd_vid %sbpdu %scell_error %schg_tos %semirror %simirror\n"), 2134 prefix, 2135 d->add_vid ? "" : "!", 2136 d->bpdu ? "" : "!", 2137 d->cell_error ? "" : "!", 2138 d->chg_tos ? "" : "!", 2139 d->emirror ? "" : "!", 2140 d->imirror ? "" : "!" 2141 )); 2142 LOG_CLI((BSL_META_U(unit, 2143 "%s %sl3ipmc %sl3only %sl3uc %spkt_aged %spurge_cell %ssrc_hg\n"), 2144 prefix, 2145 d->l3ipmc ? "" : "!", 2146 d->l3only ? "" : "!", 2147 d->l3uc ? "" : "!", 2148 d->pkt_aged ? "" : "!", 2149 d->purge_cell ? "" : "!", 2150 d->src_hg ? "" : "!" 2151 )); 2152 LOG_CLI((BSL_META_U(unit, 2153 "%s %sswitch_pkt %sregen_crc %sdecap_iptunnel %sing_untagged\n"), 2154 prefix, 2155 d->switch_pkt ? "" : "!", 2156 d->regen_crc ? "" : "!", 2157 d->decap_iptunnel ? "" : "!", 2158 d->ingress_untagged ? "" : "!" 2159 )); 2160 LOG_CLI((BSL_META_U(unit, 2161 "%s %sivlan_add\n"), 2162 prefix, 2163 d->inner_vlan_add ? "" : "!" 2164 )); 2165 LOG_CLI((BSL_META_U(unit, 2166 "%s cpu_cos=%d cos=%d l3_intf=%d mtp_index=%d reason=%08x\n"), 2167 prefix, 2168 d->cpu_cos, 2169 d->cos, 2170 d->l3_intf, 2171 (d->mtp_index_hi << 2) | d->mtp_index_lo, 2172 d->reason 2173 )); 2174 LOG_CLI((BSL_META_U(unit, 2175 "%s match_rule=%d nh_index=%d\n"), 2176 prefix, 2177 d->match_rule, 2178 d->nh_index 2179 )); 2180 LOG_CLI((BSL_META_U(unit, 2181 "%s srcport=%d dscp=%d outer_pri=%d outer_cfi=%d outer_vid=%d\n"), 2182 prefix, 2183 d->srcport, 2184 (d->dscp_hi << 6) | d->dscp_lo, 2185 d->outer_pri, 2186 d->outer_cfi, 2187 d->outer_vid 2188 )); 2189 } 2190 #endif /* BCM_FIREBOLT2_SUPPORT || BCM_FIREBOLT_SUPPORT */ 2191 #ifdef BCM_RAPTOR_SUPPORT 2192 if ((!tx) && (SOC_DCB_RX_START_GET(unit, dcb)) && 2193 (SOC_DCB_TYPE(unit) == 15)) { 2194 dcb15_t *d = (dcb15_t *)dcb; 2195 dcb0_reason_dump(unit, dcb, prefix); 2196 LOG_CLI((BSL_META_U(unit, 2197 "%s %sadd_vid %sbpdu %scell_error %schg_tos %semirror %simirror\n"), 2198 prefix, 2199 d->add_vid ? "" : "!", 2200 d->bpdu ? "" : "!", 2201 d->cell_error ? "" : "!", 2202 d->chg_tos ? "" : "!", 2203 d->emirror ? "" : "!", 2204 d->imirror ? "" : "!" 2205 )); 2206 LOG_CLI((BSL_META_U(unit, 2207 "%s %sl3ipmc %sl3only %sl3uc %spkt_aged %spurge_cell %ssrc_hg\n"), 2208 prefix, 2209 d->l3ipmc ? "" : "!", 2210 d->l3only ? "" : "!", 2211 d->l3uc ? "" : "!", 2212 d->pkt_aged ? "" : "!", 2213 d->purge_cell ? "" : "!", 2214 d->src_hg ? "" : "!" 2215 )); 2216 LOG_CLI((BSL_META_U(unit, 2217 "%s %sswitch_pkt %sregen_crc %sdecap_iptunnel %sing_untagged\n"), 2218 prefix, 2219 d->switch_pkt ? "" : "!", 2220 d->regen_crc ? "" : "!", 2221 d->decap_iptunnel ? "" : "!", 2222 d->ingress_untagged ? "" : "!" 2223 )); 2224 LOG_CLI((BSL_META_U(unit, 2225 "%s cpu_cos=%d cos=%d l3_intf=%d mtp_index=%d reason=%08x\n"), 2226 prefix, 2227 d->cpu_cos, 2228 d->cos, 2229 d->l3_intf, 2230 d->mtp_index, 2231 d->reason 2232 )); 2233 LOG_CLI((BSL_META_U(unit, 2234 "%s match_rule=%d nh_index=%d\n"), 2235 prefix, 2236 d->match_rule, 2237 d->nh_index 2238 )); 2239 LOG_CLI((BSL_META_U(unit, 2240 "%s srcport=%d dscp=%d outer_pri=%d outer_cfi=%d outer_vid=%d\n"), 2241 prefix, 2242 d->srcport, 2243 d->dscp, 2244 d->outer_pri, 2245 d->outer_cfi, 2246 d->outer_vid 2247 )); 2248 } 2249 #endif /* BCM_RAPTOR_SUPPORT */ 2250 #ifdef BCM_SCORPION_SUPPORT 2251 if ((!tx) && (SOC_DCB_RX_START_GET(unit, dcb)) && 2252 (SOC_DCB_TYPE(unit) == 16)) { 2253 dcb16_t *d = (dcb16_t *)dcb; 2254 dcb0_reason_dump(unit, dcb, prefix); 2255 LOG_CLI((BSL_META_U(unit, 2256 "%s %sbpdu %scell_error %schg_tos %semirror %simirror\n"), 2257 prefix, 2258 d->bpdu ? "" : "!", 2259 d->cell_error ? "" : "!", 2260 d->chg_tos ? "" : "!", 2261 d->emirror ? "" : "!", 2262 d->imirror ? "" : "!" 2263 )); 2264 LOG_CLI((BSL_META_U(unit, 2265 "%s %sl3ipmc %sl3only %sl3uc %spkt_aged %spurge_cell %ssrc_hg\n"), 2266 prefix, 2267 d->l3ipmc ? "" : "!", 2268 d->l3only ? "" : "!", 2269 d->l3uc ? "" : "!", 2270 d->pkt_aged ? "" : "!", 2271 d->purge_cell ? "" : "!", 2272 d->src_hg ? "" : "!" 2273 )); 2274 LOG_CLI((BSL_META_U(unit, 2275 "%s %sswitch_pkt %sregen_crc %sdecap_iptunnel %sing_untagged\n"), 2276 prefix, 2277 d->switch_pkt ? "" : "!", 2278 d->regen_crc ? "" : "!", 2279 d->decap_iptunnel ? "" : "!", 2280 d->ingress_untagged ? "" : "!" 2281 )); 2282 LOG_CLI((BSL_META_U(unit, 2283 "%s cpu_cos=%d cos=%d l3_intf=%d mtp_index=%d reason=%08x\n"), 2284 prefix, 2285 d->cpu_cos, 2286 d->cos, 2287 d->l3_intf, 2288 d->mtp_index, 2289 d->reason 2290 )); 2291 LOG_CLI((BSL_META_U(unit, 2292 "%s match_rule=%d nh_index=%d hg_type=%d\n"), 2293 prefix, 2294 d->match_rule, 2295 d->nh_index, 2296 d->hg_type 2297 )); 2298 LOG_CLI((BSL_META_U(unit, 2299 "%s srcport=%d dscp=%d outer_pri=%d outer_cfi=%d outer_vid=%d\n"), 2300 prefix, 2301 d->srcport, 2302 d->dscp, 2303 d->outer_pri, 2304 d->outer_cfi, 2305 d->outer_vid 2306 )); 2307 } 2308 #endif /* BCM_SCORPION_SUPPORT */ 2309 #ifdef BCM_HAWKEYE_SUPPORT 2310 if ((!tx) && (SOC_DCB_RX_START_GET(unit, dcb)) && 2311 (SOC_DCB_TYPE(unit) == 17)) { 2312 dcb17_t *d = (dcb17_t *)dcb; 2313 dcb0_reason_dump(unit, dcb, prefix); 2314 LOG_CLI((BSL_META_U(unit, 2315 "%s %sadd_vid %sbpdu %scell_error %schg_tos %semirror %simirror\n"), 2316 prefix, 2317 d->add_vid ? "" : "!", 2318 d->bpdu ? "" : "!", 2319 d->cell_error ? "" : "!", 2320 d->chg_tos ? "" : "!", 2321 d->emirror ? "" : "!", 2322 d->imirror ? "" : "!" 2323 )); 2324 LOG_CLI((BSL_META_U(unit, 2325 "%s %sl3ipmc %sl3only %sl3uc %spkt_aged %spurge_cell %ssrc_hg\n"), 2326 prefix, 2327 d->l3ipmc ? "" : "!", 2328 d->l3only ? "" : "!", 2329 d->l3uc ? "" : "!", 2330 d->pkt_aged ? "" : "!", 2331 d->purge_cell ? "" : "!", 2332 d->src_hg ? "" : "!" 2333 )); 2334 LOG_CLI((BSL_META_U(unit, 2335 "%s %sswitch_pkt %sregen_crc %sdecap_iptunnel %sing_untagged\n"), 2336 prefix, 2337 d->switch_pkt ? "" : "!", 2338 d->regen_crc ? "" : "!", 2339 d->decap_iptunnel ? "" : "!", 2340 d->ingress_untagged ? "" : "!" 2341 )); 2342 LOG_CLI((BSL_META_U(unit, 2343 "%s cpu_cos=%d l3_intf=%d mtp_index=%d reason=%08x\n"), 2344 prefix, 2345 d->cpu_cos, 2346 d->l3_intf, 2347 d->mtp_index, 2348 d->reason 2349 )); 2350 LOG_CLI((BSL_META_U(unit, 2351 "%s match_rule=%d nh_index=%d\n"), 2352 prefix, 2353 d->match_rule, 2354 d->nh_index 2355 )); 2356 LOG_CLI((BSL_META_U(unit, 2357 "%s srcport=%d dscp=%d outer_pri=%d outer_cfi=%d outer_vid=%d\n"), 2358 prefix, 2359 d->srcport, 2360 d->dscp, 2361 d->outer_pri, 2362 d->outer_cfi, 2363 d->outer_vid 2364 )); 2365 } 2366 #endif /* BCM_HAWKEYE_SUPPORT */ 2367 #ifdef BCM_RAPTOR_SUPPORT 2368 if ((!tx) && (SOC_DCB_RX_START_GET(unit, dcb)) && 2369 (SOC_DCB_TYPE(unit) == 18)) { 2370 dcb18_t *d = (dcb18_t *)dcb; 2371 dcb0_reason_dump(unit, dcb, prefix); 2372 LOG_CLI((BSL_META_U(unit, 2373 "%s %sadd_vid %sbpdu %scell_error %schg_tos %semirror %simirror\n"), 2374 prefix, 2375 d->add_vid ? "" : "!", 2376 d->bpdu ? "" : "!", 2377 d->cell_error ? "" : "!", 2378 d->chg_tos ? "" : "!", 2379 d->emirror ? "" : "!", 2380 d->imirror ? "" : "!" 2381 )); 2382 LOG_CLI((BSL_META_U(unit, 2383 "%s %sl3ipmc %sl3only %sl3uc %spkt_aged %spurge_cell %ssrc_hg\n"), 2384 prefix, 2385 d->l3ipmc ? "" : "!", 2386 d->l3only ? "" : "!", 2387 d->l3uc ? "" : "!", 2388 d->pkt_aged ? "" : "!", 2389 d->purge_cell ? "" : "!", 2390 d->src_hg ? "" : "!" 2391 )); 2392 LOG_CLI((BSL_META_U(unit, 2393 "%s %sswitch_pkt %sregen_crc %sdecap_iptunnel %sing_untagged\n"), 2394 prefix, 2395 d->switch_pkt ? "" : "!", 2396 d->regen_crc ? "" : "!", 2397 d->decap_iptunnel ? "" : "!", 2398 d->ingress_untagged ? "" : "!" 2399 )); 2400 LOG_CLI((BSL_META_U(unit, 2401 "%s cpu_cos=%d cos=%d l3_intf=%d mtp_index=%d reason=%08x\n"), 2402 prefix, 2403 d->cpu_cos, 2404 d->cos, 2405 d->l3_intf, 2406 d->mtp_index, 2407 d->reason 2408 )); 2409 LOG_CLI((BSL_META_U(unit, 2410 "%s match_rule=%d nh_index=%d\n"), 2411 prefix, 2412 d->match_rule, 2413 d->nh_index 2414 )); 2415 LOG_CLI((BSL_META_U(unit, 2416 "%s srcport=%d dscp=%d outer_pri=%d outer_cfi=%d outer_vid=%d\n"), 2417 prefix, 2418 d->srcport, 2419 d->dscp, 2420 d->outer_pri, 2421 d->outer_cfi, 2422 d->outer_vid 2423 )); 2424 } 2425 #endif /* BCM_RAPTOR_SUPPORT */ 2426 } 2427 #endif /* BROADCOM_DEBUG */ 2428 2429 #ifdef BCM_FIREBOLT_SUPPORT 2430 GETFUNCNULL(9, rx_switch_drop) 2431 GETFUNCNULL(9, olp_encap_oam_pkt) 2432 GETFUNCNULL(9, read_ecc_error) 2433 GETFUNCNULL(9, desc_remaining) 2434 SETFUNCNULL(9, desc_remaining) 2435 GETFUNCNULL(9, desc_status) 2436 SETFUNCNULL(9, desc_status) 2437 GETFUNCNULL(9, match_id_lo) 2438 GETFUNCNULL(9, match_id_hi) 2439 GETFUNCNULL(9, forwarding_type) 2440 GETFUNCNULL(9, forwarding_zone_id) 2441 2442 dcb_op_t dcb9_op = { 2443 9, 2444 sizeof(dcb9_t), 2445 dcb9_rx_reason_maps, 2446 dcb0_rx_reason_map_get, 2447 dcb0_rx_reasons_get, 2448 dcb9_init, 2449 dcb9_addtx, 2450 dcb9_addrx, 2451 dcb9_intrinfo, 2452 dcb9_reqcount_set, 2453 dcb9_reqcount_get, 2454 dcb9_xfercount_get, 2455 dcb0_addr_set, 2456 dcb0_addr_get, 2457 dcb0_paddr_get, 2458 dcb9_done_set, 2459 dcb9_done_get, 2460 dcb9_sg_set, 2461 dcb9_sg_get, 2462 dcb9_chain_set, 2463 dcb9_chain_get, 2464 dcb9_reload_set, 2465 dcb9_reload_get, 2466 dcb9_desc_intr_set, 2467 dcb9_desc_intr_get, 2468 dcb9_tx_l2pbm_set, 2469 dcb9_tx_utpbm_set, 2470 dcb9_tx_l3pbm_set, 2471 dcb9_tx_crc_set, 2472 dcb9_tx_cos_set, 2473 dcb9_tx_destmod_set, 2474 dcb9_tx_destport_set, 2475 dcb9_tx_opcode_set, 2476 dcb9_tx_srcmod_set, 2477 dcb9_tx_srcport_set, 2478 dcb9_tx_prio_set, 2479 dcb9_tx_pfm_set, 2480 dcb9_rx_untagged_get, 2481 dcb9_rx_crc_get, 2482 dcb9_rx_cos_get, 2483 dcb9_rx_destmod_get, 2484 dcb9_rx_destport_get, 2485 dcb9_rx_opcode_get, 2486 dcb9_rx_classtag_get, 2487 dcb9_rx_matchrule_get, 2488 dcb9_rx_start_get, 2489 dcb9_rx_end_get, 2490 dcb9_rx_error_get, 2491 dcb9_rx_prio_get, 2492 dcb9_rx_reason_get, 2493 dcb9_rx_reason_hi_get, 2494 dcb9_rx_ingport_get, 2495 dcb9_rx_srcport_get, 2496 dcb9_rx_srcmod_get, 2497 dcb9_rx_mcast_get, 2498 dcb9_rx_vclabel_get, 2499 dcb9_rx_mirror_get, 2500 dcb9_rx_timestamp_get, 2501 dcb9_rx_timestamp_upper_get, 2502 dcb9_hg_set, 2503 dcb9_hg_get, 2504 dcb9_stat_set, 2505 dcb9_stat_get, 2506 dcb9_purge_set, 2507 dcb9_purge_get, 2508 dcb9_mhp_get, 2509 dcb9_outer_vid_get, 2510 dcb9_outer_pri_get, 2511 dcb9_outer_cfi_get, 2512 dcb9_rx_outer_tag_action_get, 2513 dcb9_inner_vid_get, 2514 dcb9_inner_pri_get, 2515 dcb9_inner_cfi_get, 2516 dcb9_rx_inner_tag_action_get, 2517 dcb9_rx_bpdu_get, 2518 dcb9_rx_l3_intf_get, 2519 dcb9_rx_decap_tunnel_get, 2520 dcb9_rx_switch_drop_get, 2521 dcb9_olp_encap_oam_pkt_get, 2522 dcb9_read_ecc_error_get, 2523 dcb9_desc_remaining_get, 2524 dcb9_desc_remaining_set, 2525 dcb9_desc_status_get, 2526 dcb9_desc_status_set, 2527 dcb9_match_id_lo_get, 2528 dcb9_match_id_hi_get, 2529 dcb9_forwarding_type_get, 2530 dcb9_forwarding_zone_id_get, 2531 #ifdef BROADCOM_DEBUG 2532 dcb9_tx_l2pbm_get, 2533 dcb9_tx_utpbm_get, 2534 dcb9_tx_l3pbm_get, 2535 dcb9_tx_crc_get, 2536 dcb9_tx_cos_get, 2537 dcb9_tx_destmod_get, 2538 dcb9_tx_destport_get, 2539 dcb9_tx_opcode_get, 2540 dcb9_tx_srcmod_get, 2541 dcb9_tx_srcport_get, 2542 dcb9_tx_prio_get, 2543 dcb9_tx_pfm_get, 2544 2545 dcb9_dump, 2546 dcb0_reason_dump, 2547 #endif /* BROADCOM_DEBUG */ 2548 #ifdef PLISIM 2549 dcb9_status_init, 2550 dcb9_xfercount_set, 2551 dcb9_rx_start_set, 2552 dcb9_rx_end_set, 2553 dcb9_rx_error_set, 2554 dcb9_rx_crc_set, 2555 dcb9_rx_ingport_set, 2556 #endif /* PLISIM */ 2557 NULL, 2558 }; 2559 #endif /* BCM_FIREBOLT_SUPPORT */ 2560 2561 #ifdef BCM_BRADLEY_SUPPORT 2562 static soc_rx_reason_t 2563 dcb11_rx_reason_map[] = { 2564 socRxReasonUnknownVlan, /* Offset 0 */ 2565 socRxReasonL2SourceMiss, /* Offset 1 */ 2566 socRxReasonL2DestMiss, /* Offset 2 */ 2567 socRxReasonL2Move, /* Offset 3 */ 2568 socRxReasonL2Cpu, /* Offset 4 */ 2569 socRxReasonSampleSource, /* Offset 5 */ 2570 socRxReasonSampleDest, /* Offset 6 */ 2571 socRxReasonL3SourceMiss, /* Offset 7 */ 2572 socRxReasonL3DestMiss, /* Offset 8 */ 2573 socRxReasonL3SourceMove, /* Offset 9 */ 2574 socRxReasonMcastMiss, /* Offset 10 */ 2575 socRxReasonIpMcastMiss, /* Offset 11 */ 2576 socRxReasonFilterMatch, /* Offset 12 */ 2577 socRxReasonL3HeaderError, /* Offset 13 */ 2578 socRxReasonProtocol, /* Offset 14 */ 2579 socRxReasonDosAttack, /* Offset 15 */ 2580 socRxReasonMartianAddr, /* Offset 16 */ 2581 socRxReasonTunnelError, /* Offset 17 */ 2582 socRxReasonL2MtuFail, /* Offset 18 */ 2583 socRxReasonIcmpRedirect, /* Offset 19 */ 2584 socRxReasonL3Slowpath, /* Offset 20 */ 2585 socRxReasonParityError, /* Offset 21 */ 2586 socRxReasonL3MtuFail, /* Offset 22 */ 2587 socRxReasonHigigHdrError, /* Offset 23 */ 2588 socRxReasonMcastIdxError, /* Offset 24 */ 2589 socRxReasonInvalid, /* Offset 25 */ 2590 socRxReasonInvalid, /* Offset 26 */ 2591 socRxReasonInvalid, /* Offset 27 */ 2592 socRxReasonInvalid, /* Offset 28 */ 2593 socRxReasonInvalid, /* Offset 29 */ 2594 socRxReasonInvalid, /* Offset 30 */ 2595 socRxReasonInvalid /* Offset 31 */ 2596 }; 2597 2598 static soc_rx_reason_t *dcb11_rx_reason_maps[] = { 2599 dcb11_rx_reason_map, 2600 NULL 2601 }; 2602 2603 GETFUNCNULL(11, rx_switch_drop) 2604 GETFUNCNULL(11, olp_encap_oam_pkt) 2605 GETFUNCNULL(11, read_ecc_error) 2606 GETFUNCNULL(11, desc_remaining) 2607 SETFUNCNULL(11, desc_remaining) 2608 GETFUNCNULL(11, desc_status) 2609 SETFUNCNULL(11, desc_status) 2610 GETFUNCNULL(11, match_id_lo) 2611 GETFUNCNULL(11, match_id_hi) 2612 GETFUNCNULL(11, forwarding_type) 2613 GETFUNCNULL(11, forwarding_zone_id) 2614 2615 dcb_op_t dcb11_op = { 2616 11, 2617 sizeof(dcb11_t), 2618 dcb11_rx_reason_maps, 2619 dcb0_rx_reason_map_get, 2620 dcb0_rx_reasons_get, 2621 dcb9_init, 2622 dcb9_addtx, 2623 dcb9_addrx, 2624 dcb9_intrinfo, 2625 dcb9_reqcount_set, 2626 dcb9_reqcount_get, 2627 dcb9_xfercount_get, 2628 dcb0_addr_set, 2629 dcb0_addr_get, 2630 dcb0_paddr_get, 2631 dcb9_done_set, 2632 dcb9_done_get, 2633 dcb9_sg_set, 2634 dcb9_sg_get, 2635 dcb9_chain_set, 2636 dcb9_chain_get, 2637 dcb9_reload_set, 2638 dcb9_reload_get, 2639 dcb9_desc_intr_set, 2640 dcb9_desc_intr_get, 2641 dcb9_tx_l2pbm_set, 2642 dcb9_tx_utpbm_set, 2643 dcb9_tx_l3pbm_set, 2644 dcb9_tx_crc_set, 2645 dcb9_tx_cos_set, 2646 dcb9_tx_destmod_set, 2647 dcb9_tx_destport_set, 2648 dcb9_tx_opcode_set, 2649 dcb9_tx_srcmod_set, 2650 dcb9_tx_srcport_set, 2651 dcb9_tx_prio_set, 2652 dcb9_tx_pfm_set, 2653 dcb11_rx_untagged_get, 2654 dcb9_rx_crc_get, 2655 dcb11_rx_cos_get, 2656 dcb11_rx_destmod_get, 2657 dcb11_rx_destport_get, 2658 dcb11_rx_opcode_get, 2659 dcb9_rx_classtag_get, 2660 dcb11_rx_matchrule_get, 2661 dcb9_rx_start_get, 2662 dcb9_rx_end_get, 2663 dcb9_rx_error_get, 2664 dcb11_rx_prio_get, 2665 dcb11_rx_reason_get, 2666 dcb11_rx_reason_hi_get, 2667 dcb11_rx_ingport_get, 2668 dcb11_rx_srcport_get, 2669 dcb11_rx_srcmod_get, 2670 dcb9_rx_mcast_get, 2671 dcb9_rx_vclabel_get, 2672 dcb11_rx_mirror_get, 2673 dcb11_rx_timestamp_get, 2674 dcb11_rx_timestamp_upper_get, 2675 dcb9_hg_set, 2676 dcb9_hg_get, 2677 dcb11_stat_set, 2678 dcb11_stat_get, 2679 dcb11_purge_set, 2680 dcb11_purge_get, 2681 dcb9_mhp_get, 2682 dcb11_outer_vid_get, 2683 dcb11_outer_pri_get, 2684 dcb11_outer_cfi_get, 2685 dcb9_rx_outer_tag_action_get, 2686 dcb9_inner_vid_get, 2687 dcb9_inner_pri_get, 2688 dcb9_inner_cfi_get, 2689 dcb9_rx_inner_tag_action_get, 2690 dcb11_rx_bpdu_get, 2691 dcb11_rx_l3_intf_get, 2692 dcb9_rx_decap_tunnel_get, 2693 dcb11_rx_switch_drop_get, 2694 dcb11_olp_encap_oam_pkt_get, 2695 dcb11_read_ecc_error_get, 2696 dcb11_desc_remaining_get, 2697 dcb11_desc_remaining_set, 2698 dcb11_desc_status_get, 2699 dcb11_desc_status_set, 2700 dcb11_match_id_lo_get, 2701 dcb11_match_id_hi_get, 2702 dcb11_forwarding_type_get, 2703 dcb11_forwarding_zone_id_get, 2704 #ifdef BROADCOM_DEBUG 2705 dcb9_tx_l2pbm_get, 2706 dcb9_tx_utpbm_get, 2707 dcb9_tx_l3pbm_get, 2708 dcb9_tx_crc_get, 2709 dcb9_tx_cos_get, 2710 dcb9_tx_destmod_get, 2711 dcb9_tx_destport_get, 2712 dcb9_tx_opcode_get, 2713 dcb9_tx_srcmod_get, 2714 dcb9_tx_srcport_get, 2715 dcb9_tx_prio_get, 2716 dcb9_tx_pfm_get, 2717 2718 dcb9_dump, 2719 dcb0_reason_dump, 2720 #endif /* BROADCOM_DEBUG */ 2721 #ifdef PLISIM 2722 dcb9_status_init, 2723 dcb9_xfercount_set, 2724 dcb9_rx_start_set, 2725 dcb9_rx_end_set, 2726 dcb9_rx_error_set, 2727 dcb9_rx_crc_set, 2728 dcb11_rx_ingport_set, 2729 #endif /* PLISIM */ 2730 NULL, 2731 }; 2732 #endif /* BCM_BRADLEY_SUPPORT */ 2733 2734 #if defined(BCM_RAPTOR_SUPPORT) 2735 static soc_rx_reason_t 2736 dcb12_rx_reason_map[] = { 2737 socRxReasonUnknownVlan, /* Offset 0 */ 2738 socRxReasonL2SourceMiss, /* Offset 1 */ 2739 socRxReasonL2DestMiss, /* Offset 2 */ 2740 socRxReasonL2Move, /* Offset 3 */ 2741 socRxReasonL2Cpu, /* Offset 4 */ 2742 socRxReasonSampleSource, /* Offset 5 */ 2743 socRxReasonSampleDest, /* Offset 6 */ 2744 socRxReasonL3SourceMiss, /* Offset 7 */ 2745 socRxReasonL3DestMiss, /* Offset 8 */ 2746 socRxReasonL3SourceMove, /* Offset 9 */ 2747 socRxReasonMcastMiss, /* Offset 10 */ 2748 socRxReasonIpMcastMiss, /* Offset 11 */ 2749 socRxReasonFilterMatch, /* Offset 12 */ 2750 socRxReasonL3HeaderError, /* Offset 13 */ 2751 socRxReasonProtocol, /* Offset 14 */ 2752 socRxReasonDosAttack, /* Offset 15 */ 2753 socRxReasonMartianAddr, /* Offset 16 */ 2754 socRxReasonTunnelError, /* Offset 17 */ 2755 socRxReasonL2MtuFail, /* Offset 18 */ 2756 socRxReasonIcmpRedirect, /* Offset 19 */ 2757 socRxReasonL3Slowpath, /* Offset 20 */ 2758 socRxReasonParityError, /* Offset 21 */ 2759 socRxReasonL3MtuFail, /* Offset 22 */ 2760 socRxReasonHigigHdrError, /* Offset 23 */ 2761 socRxReasonMcastIdxError, /* Offset 24 */ 2762 socRxReasonL2LearnLimit, /* Offset 25 */ 2763 socRxReasonInvalid, /* Offset 26 */ 2764 socRxReasonInvalid, /* Offset 27 */ 2765 socRxReasonInvalid, /* Offset 28 */ 2766 socRxReasonInvalid, /* Offset 29 */ 2767 socRxReasonInvalid, /* Offset 30 */ 2768 socRxReasonInvalid /* Offset 31 */ 2769 }; 2770 2771 static soc_rx_reason_t *dcb12_rx_reason_maps[] = { 2772 dcb12_rx_reason_map, 2773 NULL 2774 }; 2775 2776 GETFUNCNULL(12, rx_switch_drop) 2777 GETFUNCNULL(12, olp_encap_oam_pkt) 2778 GETFUNCNULL(12, read_ecc_error) 2779 GETFUNCNULL(12, desc_remaining) 2780 SETFUNCNULL(12, desc_remaining) 2781 GETFUNCNULL(12, desc_status) 2782 SETFUNCNULL(12, desc_status) 2783 GETFUNCNULL(12, match_id_lo) 2784 GETFUNCNULL(12, match_id_hi) 2785 GETFUNCNULL(12, forwarding_type) 2786 GETFUNCNULL(12, forwarding_zone_id) 2787 2788 dcb_op_t dcb12_op = { 2789 12, 2790 sizeof(dcb12_t), 2791 dcb12_rx_reason_maps, 2792 dcb0_rx_reason_map_get, 2793 dcb0_rx_reasons_get, 2794 dcb9_init, 2795 dcb9_addtx, 2796 dcb9_addrx, 2797 dcb9_intrinfo, 2798 dcb9_reqcount_set, 2799 dcb9_reqcount_get, 2800 dcb9_xfercount_get, 2801 dcb0_addr_set, 2802 dcb0_addr_get, 2803 dcb0_paddr_get, 2804 dcb9_done_set, 2805 dcb9_done_get, 2806 dcb9_sg_set, 2807 dcb9_sg_get, 2808 dcb9_chain_set, 2809 dcb9_chain_get, 2810 dcb9_reload_set, 2811 dcb9_reload_get, 2812 dcb9_desc_intr_set, 2813 dcb9_desc_intr_get, 2814 dcb9_tx_l2pbm_set, 2815 dcb9_tx_utpbm_set, 2816 dcb9_tx_l3pbm_set, 2817 dcb9_tx_crc_set, 2818 dcb9_tx_cos_set, 2819 dcb9_tx_destmod_set, 2820 dcb9_tx_destport_set, 2821 dcb9_tx_opcode_set, 2822 dcb9_tx_srcmod_set, 2823 dcb9_tx_srcport_set, 2824 dcb9_tx_prio_set, 2825 dcb9_tx_pfm_set, 2826 dcb12_rx_untagged_get, 2827 dcb12_rx_crc_get, 2828 dcb12_rx_cos_get, 2829 dcb12_rx_destmod_get, 2830 dcb12_rx_destport_get, 2831 dcb12_rx_opcode_get, 2832 dcb12_rx_classtag_get, 2833 dcb12_rx_matchrule_get, 2834 dcb9_rx_start_get, 2835 dcb9_rx_end_get, 2836 dcb9_rx_error_get, 2837 dcb12_rx_prio_get, 2838 dcb12_rx_reason_get, 2839 dcb12_rx_reason_hi_get, 2840 dcb12_rx_ingport_get, 2841 dcb12_rx_srcport_get, 2842 dcb12_rx_srcmod_get, 2843 dcb12_rx_mcast_get, 2844 dcb12_rx_vclabel_get, 2845 dcb12_rx_mirror_get, 2846 dcb12_rx_timestamp_get, 2847 dcb12_rx_timestamp_upper_get, 2848 dcb9_hg_set, 2849 dcb9_hg_get, 2850 dcb9_stat_set, 2851 dcb9_stat_get, 2852 dcb9_purge_set, 2853 dcb9_purge_get, 2854 dcb9_mhp_get, 2855 dcb12_outer_vid_get, 2856 dcb12_outer_pri_get, 2857 dcb12_outer_cfi_get, 2858 dcb9_rx_outer_tag_action_get, 2859 dcb9_inner_vid_get, 2860 dcb9_inner_pri_get, 2861 dcb9_inner_cfi_get, 2862 dcb9_rx_inner_tag_action_get, 2863 dcb12_rx_bpdu_get, 2864 dcb9_rx_l3_intf_get, 2865 dcb9_rx_decap_tunnel_get, 2866 dcb12_rx_switch_drop_get, 2867 dcb12_olp_encap_oam_pkt_get, 2868 dcb12_read_ecc_error_get, 2869 dcb12_desc_remaining_get, 2870 dcb12_desc_remaining_set, 2871 dcb12_desc_status_get, 2872 dcb12_desc_status_set, 2873 dcb12_match_id_lo_get, 2874 dcb12_match_id_hi_get, 2875 dcb12_forwarding_type_get, 2876 dcb12_forwarding_zone_id_get, 2877 #ifdef BROADCOM_DEBUG 2878 dcb9_tx_l2pbm_get, 2879 dcb9_tx_utpbm_get, 2880 dcb9_tx_l3pbm_get, 2881 dcb9_tx_crc_get, 2882 dcb9_tx_cos_get, 2883 dcb9_tx_destmod_get, 2884 dcb9_tx_destport_get, 2885 dcb9_tx_opcode_get, 2886 dcb9_tx_srcmod_get, 2887 dcb9_tx_srcport_get, 2888 dcb9_tx_prio_get, 2889 dcb9_tx_pfm_get, 2890 2891 dcb9_dump, 2892 dcb0_reason_dump, 2893 #endif /* BROADCOM_DEBUG */ 2894 #ifdef PLISIM 2895 dcb9_status_init, 2896 dcb9_xfercount_set, 2897 dcb9_rx_start_set, 2898 dcb9_rx_end_set, 2899 dcb9_rx_error_set, 2900 dcb12_rx_crc_set, 2901 dcb12_rx_ingport_set, 2902 #endif /* PLISIM */ 2903 NULL, 2904 }; 2905 #endif /* BCM_RAPTOR_SUPPORT */ 2906 2907 #if defined(BCM_FIREBOLT2_SUPPORT) || defined(BCM_FIREBOLT_SUPPORT) 2908 static soc_rx_reason_t 2909 dcb13_rx_reason_map[] = { 2910 socRxReasonUnknownVlan, /* Offset 0 */ 2911 socRxReasonL2SourceMiss, /* Offset 1 */ 2912 socRxReasonL2DestMiss, /* Offset 2 */ 2913 socRxReasonL2Move, /* Offset 3 */ 2914 socRxReasonL2Cpu, /* Offset 4 */ 2915 socRxReasonSampleSource, /* Offset 5 */ 2916 socRxReasonSampleDest, /* Offset 6 */ 2917 socRxReasonL3SourceMiss, /* Offset 7 */ 2918 socRxReasonL3DestMiss, /* Offset 8 */ 2919 socRxReasonL3SourceMove, /* Offset 9 */ 2920 socRxReasonMcastMiss, /* Offset 10 */ 2921 socRxReasonIpMcastMiss, /* Offset 11 */ 2922 socRxReasonFilterMatch, /* Offset 12 */ 2923 socRxReasonL3HeaderError, /* Offset 13 */ 2924 socRxReasonProtocol, /* Offset 14 */ 2925 socRxReasonDosAttack, /* Offset 15 */ 2926 socRxReasonMartianAddr, /* Offset 16 */ 2927 socRxReasonTunnelError, /* Offset 17 */ 2928 socRxReasonL2MtuFail, /* Offset 18 */ 2929 socRxReasonIcmpRedirect, /* Offset 19 */ 2930 socRxReasonL3Slowpath, /* Offset 20 */ 2931 socRxReasonParityError, /* Offset 21 */ 2932 socRxReasonL3MtuFail, /* Offset 22 */ 2933 socRxReasonHigigHdrError, /* Offset 23 */ 2934 socRxReasonVlanFilterMatch, /* Offset 24 */ 2935 socRxReasonInvalid, /* Offset 25 */ 2936 socRxReasonInvalid, /* Offset 26 */ 2937 socRxReasonInvalid, /* Offset 27 */ 2938 socRxReasonInvalid, /* Offset 28 */ 2939 socRxReasonInvalid, /* Offset 29 */ 2940 socRxReasonInvalid, /* Offset 30 */ 2941 socRxReasonInvalid /* Offset 31 */ 2942 }; 2943 2944 static soc_rx_reason_t *dcb13_rx_reason_maps[] = { 2945 dcb13_rx_reason_map, 2946 NULL 2947 }; 2948 2949 GETFUNCERR(13, rx_timestamp) 2950 GETFUNCERR(13, rx_timestamp_upper) 2951 GETFUNCNULL(13, rx_switch_drop) 2952 GETFUNCNULL(13, olp_encap_oam_pkt) 2953 GETFUNCNULL(13, read_ecc_error) 2954 GETFUNCNULL(13, desc_remaining) 2955 SETFUNCNULL(13, desc_remaining) 2956 GETFUNCNULL(13, desc_status) 2957 SETFUNCNULL(13, desc_status) 2958 GETFUNCNULL(13, match_id_lo) 2959 GETFUNCNULL(13, match_id_hi) 2960 GETFUNCNULL(13, forwarding_type) 2961 GETFUNCNULL(13, forwarding_zone_id) 2962 2963 dcb_op_t dcb13_op = { 2964 13, 2965 sizeof(dcb13_t), 2966 dcb13_rx_reason_maps, 2967 dcb0_rx_reason_map_get, 2968 dcb0_rx_reasons_get, 2969 dcb9_init, 2970 dcb9_addtx, 2971 dcb9_addrx, 2972 dcb9_intrinfo, 2973 dcb9_reqcount_set, 2974 dcb9_reqcount_get, 2975 dcb9_xfercount_get, 2976 dcb0_addr_set, 2977 dcb0_addr_get, 2978 dcb0_paddr_get, 2979 dcb9_done_set, 2980 dcb9_done_get, 2981 dcb9_sg_set, 2982 dcb9_sg_get, 2983 dcb9_chain_set, 2984 dcb9_chain_get, 2985 dcb9_reload_set, 2986 dcb9_reload_get, 2987 dcb9_desc_intr_set, 2988 dcb9_desc_intr_get, 2989 dcb9_tx_l2pbm_set, 2990 dcb9_tx_utpbm_set, 2991 dcb9_tx_l3pbm_set, 2992 dcb9_tx_crc_set, 2993 dcb9_tx_cos_set, 2994 dcb9_tx_destmod_set, 2995 dcb9_tx_destport_set, 2996 dcb9_tx_opcode_set, 2997 dcb9_tx_srcmod_set, 2998 dcb9_tx_srcport_set, 2999 dcb9_tx_prio_set, 3000 dcb9_tx_pfm_set, 3001 dcb13_rx_untagged_get, 3002 dcb9_rx_crc_get, 3003 dcb9_rx_cos_get, 3004 dcb9_rx_destmod_get, 3005 dcb9_rx_destport_get, 3006 dcb9_rx_opcode_get, 3007 dcb9_rx_classtag_get, 3008 dcb9_rx_matchrule_get, 3009 dcb9_rx_start_get, 3010 dcb9_rx_end_get, 3011 dcb9_rx_error_get, 3012 dcb9_rx_prio_get, 3013 dcb9_rx_reason_get, 3014 dcb9_rx_reason_hi_get, 3015 dcb9_rx_ingport_get, 3016 dcb9_rx_srcport_get, 3017 dcb9_rx_srcmod_get, 3018 dcb9_rx_mcast_get, 3019 dcb9_rx_vclabel_get, 3020 dcb9_rx_mirror_get, 3021 dcb13_rx_timestamp_get, 3022 dcb13_rx_timestamp_upper_get, 3023 dcb9_hg_set, 3024 dcb9_hg_get, 3025 dcb9_stat_set, 3026 dcb9_stat_get, 3027 dcb9_purge_set, 3028 dcb9_purge_get, 3029 dcb9_mhp_get, 3030 dcb13_outer_vid_get, 3031 dcb13_outer_pri_get, 3032 dcb13_outer_cfi_get, 3033 dcb9_rx_outer_tag_action_get, 3034 dcb9_inner_vid_get, 3035 dcb9_inner_pri_get, 3036 dcb9_inner_cfi_get, 3037 dcb9_rx_inner_tag_action_get, 3038 dcb9_rx_bpdu_get, 3039 dcb9_rx_l3_intf_get, 3040 dcb9_rx_decap_tunnel_get, 3041 dcb13_rx_switch_drop_get, 3042 dcb13_olp_encap_oam_pkt_get, 3043 dcb13_read_ecc_error_get, 3044 dcb13_desc_remaining_get, 3045 dcb13_desc_remaining_set, 3046 dcb13_desc_status_get, 3047 dcb13_desc_status_set, 3048 dcb13_match_id_lo_get, 3049 dcb13_match_id_hi_get, 3050 dcb13_forwarding_type_get, 3051 dcb13_forwarding_zone_id_get, 3052 #ifdef BROADCOM_DEBUG 3053 dcb9_tx_l2pbm_get, 3054 dcb9_tx_utpbm_get, 3055 dcb9_tx_l3pbm_get, 3056 dcb9_tx_crc_get, 3057 dcb9_tx_cos_get, 3058 dcb9_tx_destmod_get, 3059 dcb9_tx_destport_get, 3060 dcb9_tx_opcode_get, 3061 dcb9_tx_srcmod_get, 3062 dcb9_tx_srcport_get, 3063 dcb9_tx_prio_get, 3064 dcb9_tx_pfm_get, 3065 3066 dcb9_dump, 3067 dcb0_reason_dump, 3068 #endif /* BROADCOM_DEBUG */ 3069 #ifdef PLISIM 3070 dcb9_status_init, 3071 dcb9_xfercount_set, 3072 dcb9_rx_start_set, 3073 dcb9_rx_end_set, 3074 dcb9_rx_error_set, 3075 dcb9_rx_crc_set, 3076 dcb9_rx_ingport_set, 3077 #endif /* PLISIM */ 3078 NULL, 3079 }; 3080 #endif /* BCM_FIREBOLT2_SUPPORT || BCM_FIREBOLT_SUPPORT */ 3081 3082 #if defined(BCM_TRIUMPH_SUPPORT) || defined(BCM_SCORPION_SUPPORT) 3083 /* 3084 * DCB Type 14 Support 3085 */ 3086 3087 static soc_rx_reason_t 3088 dcb14_rx_reason_map[] = { 3089 socRxReasonUnknownVlan, /* Offset 0 */ 3090 socRxReasonL2SourceMiss, /* Offset 1 */ 3091 socRxReasonL2DestMiss, /* Offset 2 */ 3092 socRxReasonL2Move, /* Offset 3 */ 3093 socRxReasonL2Cpu, /* Offset 4 */ 3094 socRxReasonSampleSource, /* Offset 5 */ 3095 socRxReasonSampleDest, /* Offset 6 */ 3096 socRxReasonL3SourceMiss, /* Offset 7 */ 3097 socRxReasonL3DestMiss, /* Offset 8 */ 3098 socRxReasonL3SourceMove, /* Offset 9 */ 3099 socRxReasonMcastMiss, /* Offset 10 */ 3100 socRxReasonIpMcastMiss, /* Offset 11 */ 3101 socRxReasonFilterMatch, /* Offset 12 */ 3102 socRxReasonL3HeaderError, /* Offset 13 */ 3103 socRxReasonProtocol, /* Offset 14 */ 3104 socRxReasonDosAttack, /* Offset 15 */ 3105 socRxReasonMartianAddr, /* Offset 16 */ 3106 socRxReasonTunnelError, /* Offset 17 */ 3107 socRxReasonL2MtuFail, /* Offset 18 */ 3108 socRxReasonIcmpRedirect, /* Offset 19 */ 3109 socRxReasonL3Slowpath, /* Offset 20 */ 3110 socRxReasonParityError, /* Offset 21 */ 3111 socRxReasonL3MtuFail, /* Offset 22 */ 3112 socRxReasonHigigHdrError, /* Offset 23 */ 3113 socRxReasonMcastIdxError, /* Offset 24 */ 3114 socRxReasonVlanFilterMatch, /* Offset 25 */ 3115 socRxReasonClassBasedMove, /* Offset 26 */ 3116 socRxReasonL2LearnLimit, /* Offset 27 */ 3117 socRxReasonMplsLabelMiss, /* Offset 28 */ 3118 socRxReasonMplsInvalidAction, /* Offset 29 */ 3119 socRxReasonMplsInvalidPayload, /* Offset 30 */ 3120 socRxReasonMplsTtl, /* Offset 31 */ 3121 socRxReasonMplsSequenceNumber, /* Offset 32 */ 3122 socRxReasonL2NonUnicastMiss, /* Offset 33 */ 3123 socRxReasonNhop, /* Offset 34 */ 3124 socRxReasonInvalid, /* Offset 35 */ 3125 socRxReasonInvalid, /* Offset 36 */ 3126 socRxReasonInvalid, /* Offset 37 */ 3127 socRxReasonInvalid, /* Offset 38 */ 3128 socRxReasonInvalid, /* Offset 39 */ 3129 socRxReasonInvalid, /* Offset 40 */ 3130 socRxReasonInvalid, /* Offset 41 */ 3131 socRxReasonInvalid, /* Offset 42 */ 3132 socRxReasonInvalid, /* Offset 43 */ 3133 socRxReasonInvalid, /* Offset 44 */ 3134 socRxReasonInvalid, /* Offset 45 */ 3135 socRxReasonInvalid, /* Offset 46 */ 3136 socRxReasonInvalid, /* Offset 47 */ 3137 socRxReasonInvalid, /* Offset 48 */ 3138 socRxReasonInvalid, /* Offset 49 */ 3139 socRxReasonInvalid, /* Offset 50 */ 3140 socRxReasonInvalid, /* Offset 51 */ 3141 socRxReasonInvalid, /* Offset 52 */ 3142 socRxReasonInvalid, /* Offset 53 */ 3143 socRxReasonInvalid, /* Offset 54 */ 3144 socRxReasonInvalid, /* Offset 55 */ 3145 socRxReasonInvalid, /* Offset 56 */ 3146 socRxReasonInvalid, /* Offset 57 */ 3147 socRxReasonInvalid, /* Offset 58 */ 3148 socRxReasonInvalid, /* Offset 59 */ 3149 socRxReasonInvalid, /* Offset 60 */ 3150 socRxReasonInvalid, /* Offset 61 */ 3151 socRxReasonInvalid, /* Offset 62 */ 3152 socRxReasonInvalid /* Offset 63 */ 3153 }; 3154 3155 static soc_rx_reason_t *dcb14_rx_reason_maps[] = { 3156 dcb14_rx_reason_map, 3157 NULL 3158 }; 3159 3160 static void 3161 dcb14_init(dcb_t *dcb) 3162 { 3163 uint32 *d = (uint32 *)dcb; 3164 3165 d[0] = d[1] = d[2] = d[3] = d[4] = 0; 3166 d[5] = d[6] = d[7] = d[8] = d[9] = d[10] = 0; 3167 d[11] = d[12] = d[13] = d[14] = d[15] = 0; 3168 } 3169 3170 static int 3171 dcb14_addtx(dv_t *dv, sal_vaddr_t addr, uint32 count, 3172 pbmp_t l2pbm, pbmp_t utpbm, pbmp_t l3pbm, uint32 flags, uint32 *hgh) 3173 { 3174 dcb14_t *d; /* DCB */ 3175 uint32 *di; /* DCB integer pointer */ 3176 uint32 paddr; /* Packet buffer physical address */ 3177 int unaligned; 3178 int unaligned_bytes; 3179 uint8 *unaligned_buffer; 3180 uint8 *aligned_buffer; 3181 3182 d = (dcb14_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); 3183 3184 if (addr) { 3185 paddr = soc_cm_l2p(dv->dv_unit, (void *)addr); 3186 } else { 3187 paddr = 0; 3188 } 3189 3190 if (dv->dv_vcnt > 0 && (dv->dv_flags & DV_F_COMBINE_DCB) && 3191 (d[-1].c_sg != 0) && 3192 (d[-1].addr + d[-1].c_count) == paddr && 3193 d[-1].c_count + count <= DCB_MAX_REQCOUNT) { 3194 d[-1].c_count += count; 3195 return dv->dv_cnt - dv->dv_vcnt; 3196 } 3197 3198 /* 3199 * A few chip revisions do not support 128 byte PCI bursts 3200 * correctly if the address is not word-aligned. In case 3201 * we encounter an unaligned address, we consume an extra 3202 * DCB to correct the alignment. 3203 */ 3204 do { 3205 if (dv->dv_vcnt >= dv->dv_cnt) { 3206 return SOC_E_FULL; 3207 } 3208 if (dv->dv_vcnt > 0) { /* chain off previous dcb */ 3209 d[-1].c_chain = 1; 3210 } 3211 3212 di = (uint32 *)d; 3213 di[0] = di[1] = di[2] = di[3] = di[4] = 0; 3214 di[5] = di[6] = di[7] = di[8] = di[9] = di[10] = 0; 3215 di[11] = di[12] = di[13] = di[14] = di[15] = 0; 3216 3217 d->addr = paddr; 3218 d->c_count = count; 3219 d->c_sg = 1; 3220 3221 d->c_stat = 1; 3222 d->c_purge = SOC_DMA_PURGE_GET(flags); 3223 if (SOC_DMA_HG_GET(flags)) { 3224 soc_higig_hdr_t *mh = (soc_higig_hdr_t *)hgh; 3225 if (mh->overlay1.start == SOC_HIGIG2_START) { 3226 d->mh3 = soc_ntohl(hgh[3]); 3227 } 3228 d->c_hg = 1; 3229 d->mh0 = soc_ntohl(hgh[0]); 3230 d->mh1 = soc_ntohl(hgh[1]); 3231 d->mh2 = soc_ntohl(hgh[2]); 3232 d->mh3 = soc_ntohl(hgh[3]); 3233 } 3234 3235 unaligned = 0; 3236 if (soc_feature(dv->dv_unit, soc_feature_pkt_tx_align)) { 3237 if (paddr & 0x3) { 3238 unaligned_bytes = 4 - (paddr & 0x3); 3239 unaligned_buffer = (uint8 *)addr; 3240 aligned_buffer = SOC_DV_TX_ALIGN(dv, dv->dv_vcnt); 3241 aligned_buffer[0] = unaligned_buffer[0]; 3242 aligned_buffer[1] = unaligned_buffer[1]; 3243 aligned_buffer[2] = unaligned_buffer[2]; 3244 d->addr = soc_cm_l2p(dv->dv_unit, aligned_buffer); 3245 if (count > 3) { 3246 d->c_count = unaligned_bytes; 3247 paddr += unaligned_bytes; 3248 count -= unaligned_bytes; 3249 unaligned = 1; 3250 } 3251 } 3252 } 3253 3254 dv->dv_vcnt += 1; 3255 3256 d = (dcb14_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); 3257 } while (unaligned); 3258 3259 return dv->dv_cnt - dv->dv_vcnt; 3260 } 3261 3262 static int 3263 dcb14_addrx(dv_t *dv, sal_vaddr_t addr, uint32 count, uint32 flags) 3264 { 3265 dcb14_t *d; /* DCB */ 3266 uint32 *di; /* DCB integer pointer */ 3267 3268 d = (dcb14_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); 3269 3270 if (dv->dv_vcnt > 0) { /* chain off previous dcb */ 3271 d[-1].c_chain = 1; 3272 } 3273 3274 di = (uint32 *)d; 3275 di[0] = di[1] = di[2] = di[3] = di[4] = 0; 3276 di[5] = di[6] = di[7] = di[8] = di[9] = di[10] = 0; 3277 di[11] = di[12] = di[13] = di[14] = di[15] = 0; 3278 3279 if (addr) { 3280 d->addr = soc_cm_l2p(dv->dv_unit, (void *)addr); 3281 } 3282 d->c_count = count; 3283 d->c_sg = 1; 3284 3285 dv->dv_vcnt += 1; 3286 return dv->dv_cnt - dv->dv_vcnt; 3287 } 3288 3289 static uint32 3290 dcb14_intrinfo(int unit, dcb_t *dcb, int tx, uint32 *count) 3291 { 3292 dcb14_t *d = (dcb14_t *)dcb; /* DCB */ 3293 uint32 f; /* SOC_DCB_INFO_* flags */ 3294 3295 if (!d->done) { 3296 return 0; 3297 } 3298 f = SOC_DCB_INFO_DONE; 3299 if (tx) { 3300 if (!d->c_sg) { 3301 f |= SOC_DCB_INFO_PKTEND; 3302 } 3303 } else { 3304 if (d->end) { 3305 f |= SOC_DCB_INFO_PKTEND; 3306 } 3307 } 3308 *count = d->count; 3309 return f; 3310 } 3311 3312 3313 static uint32 3314 dcb14_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg) 3315 { 3316 dcb14_t *d = (dcb14_t *)dcb; 3317 3318 COMPILER_REFERENCE(dt_mode); 3319 3320 return (ingport_is_hg ? 3321 ((d->itag_status) ? 0 : 2) : 3322 ((d->itag_status & 0x2) ? 3323 ((d->itag_status & 0x1) ? 0 : 2) : 3324 ((d->itag_status & 0x1) ? 1 : 3))); 3325 } 3326 3327 SETFUNCFIELD(14, reqcount, c_count, uint32 count, count) 3328 GETFUNCFIELD(14, reqcount, c_count) 3329 GETFUNCFIELD(14, xfercount, count) 3330 /* addr_set, addr_get, paddr_get - Same as DCB 0 */ 3331 SETFUNCFIELD(14, done, done, int val, val ? 1 : 0) 3332 GETFUNCFIELD(14, done, done) 3333 SETFUNCFIELD(14, sg, c_sg, int val, val ? 1 : 0) 3334 GETFUNCFIELD(14, sg, c_sg) 3335 SETFUNCFIELD(14, chain, c_chain, int val, val ? 1 : 0) 3336 GETFUNCFIELD(14, chain, c_chain) 3337 SETFUNCFIELD(14, reload, c_reload, int val, val ? 1 : 0) 3338 GETFUNCFIELD(14, reload, c_reload) 3339 SETFUNCERR(14, tx_l2pbm, pbmp_t) 3340 SETFUNCERR(14, tx_utpbm, pbmp_t) 3341 SETFUNCERR(14, tx_l3pbm, pbmp_t) 3342 SETFUNCERR(14, tx_crc, int) 3343 SETFUNCERR(14, tx_cos, int) 3344 SETFUNCERR(14, tx_destmod, uint32) 3345 SETFUNCERR(14, tx_destport, uint32) 3346 SETFUNCERR(14, tx_opcode, uint32) 3347 SETFUNCERR(14, tx_srcmod, uint32) 3348 SETFUNCERR(14, tx_srcport, uint32) 3349 SETFUNCERR(14, tx_prio, uint32) 3350 SETFUNCERR(14, tx_pfm, uint32) 3351 GETFUNCFIELD(14, rx_start, start) 3352 GETFUNCFIELD(14, rx_end, end) 3353 GETFUNCFIELD(14, rx_error, error) 3354 GETFUNCFIELD(14, rx_cos, cpu_cos) 3355 /* Fields extracted from MH/PBI */ 3356 GETHG2FUNCFIELD(14, rx_destmod, dst_mod) 3357 GETHG2FUNCFIELD(14, rx_destport, dst_port) 3358 GETHG2FUNCFIELD(14, rx_srcmod, src_mod) 3359 GETHG2FUNCFIELD(14, rx_srcport, src_port) 3360 GETHG2FUNCFIELD(14, rx_opcode, opcode) 3361 GETHG2FUNCFIELD(14, rx_prio, vlan_pri) /* outer_pri */ 3362 GETHG2FUNCEXPR(14, rx_mcast, ((h->ppd_overlay1.dst_mod << 8) | 3363 (h->ppd_overlay1.dst_port))) 3364 GETHG2FUNCEXPR(14, rx_vclabel, ((h->ppd_overlay1.vc_label_19_16 << 16) | 3365 (h->ppd_overlay1.vc_label_15_8 << 8) | 3366 (h->ppd_overlay1.vc_label_7_0))) 3367 GETHG2FUNCEXPR(14, rx_classtag, (h->ppd_overlay1.ppd_type != 1 ? 0 : 3368 (h->ppd_overlay2.ctag_hi << 8) | 3369 (h->ppd_overlay2.ctag_lo))) 3370 GETFUNCFIELD(14, rx_matchrule, match_rule) 3371 GETFUNCFIELD(14, rx_reason, reason) 3372 GETFUNCFIELD(14, rx_reason_hi, reason_hi) 3373 GETFUNCFIELD(14, rx_ingport, srcport) 3374 GETFUNCEXPR(14, rx_mirror, ((d->imirror) | (d->emirror))) 3375 GETFUNCERR(14, rx_timestamp) 3376 GETFUNCERR(14, rx_timestamp_upper) 3377 SETFUNCFIELD(14, hg, c_hg, uint32 hg, hg) 3378 GETFUNCFIELD(14, hg, c_hg) 3379 SETFUNCFIELD(14, stat, c_stat, uint32 stat, stat) 3380 GETFUNCFIELD(14, stat, c_stat) 3381 SETFUNCFIELD(14, purge, c_purge, uint32 purge, purge) 3382 GETFUNCFIELD(14, purge, c_purge) 3383 GETFUNCFIELD(14, outer_vid, outer_vid) 3384 GETFUNCFIELD(14, outer_pri, outer_pri) 3385 GETFUNCFIELD(14, outer_cfi, outer_cfi) 3386 GETFUNCFIELD(14, rx_outer_tag_action, otag_action) 3387 GETFUNCFIELD(14, rx_inner_tag_action, itag_action) 3388 GETFUNCFIELD(14, rx_bpdu, bpdu) 3389 GETFUNCFIELD(14, rx_l3_intf, l3_intf) 3390 GETFUNCNULL(14, rx_switch_drop) 3391 GETFUNCNULL(14, olp_encap_oam_pkt) 3392 GETFUNCNULL(14, read_ecc_error) 3393 GETFUNCNULL(14, desc_remaining) 3394 SETFUNCNULL(14, desc_remaining) 3395 GETFUNCNULL(14, desc_status) 3396 SETFUNCNULL(14, desc_status) 3397 GETFUNCNULL(14, match_id_lo) 3398 GETFUNCNULL(14, match_id_hi) 3399 GETFUNCNULL(14, forwarding_type) 3400 GETFUNCNULL(14, forwarding_zone_id) 3401 3402 #ifdef BROADCOM_DEBUG 3403 GETFUNCERR(14, tx_l2pbm) 3404 GETFUNCERR(14, tx_utpbm) 3405 GETFUNCERR(14, tx_l3pbm) 3406 GETFUNCERR(14, tx_crc) 3407 GETFUNCERR(14, tx_cos) 3408 GETFUNCERR(14, tx_destmod) 3409 GETFUNCERR(14, tx_destport) 3410 GETFUNCERR(14, tx_opcode) 3411 GETFUNCERR(14, tx_srcmod) 3412 GETFUNCERR(14, tx_srcport) 3413 GETFUNCERR(14, tx_prio) 3414 GETFUNCERR(14, tx_pfm) 3415 #endif /* BROADCOM_DEBUG */ 3416 3417 static uint32 dcb14_rx_crc_get(dcb_t *dcb) { 3418 return 0; 3419 } 3420 3421 #ifdef PLISIM /* these routines are only used by pcid */ 3422 static void dcb14_status_init(dcb_t *dcb) 3423 { 3424 uint32 *d = (uint32 *)dcb; 3425 3426 d[5] = d[6] = d[7] = d[8] = d[9] = d[10] = 0; 3427 d[11] = d[12] = d[13] = d[14] = d[15] = 0; 3428 } 3429 SETFUNCFIELD(14, xfercount, count, uint32 count, count) 3430 SETFUNCFIELD(14, rx_start, start, int val, val ? 1 : 0) 3431 SETFUNCFIELD(14, rx_end, end, int val, val ? 1 : 0) 3432 SETFUNCFIELD(14, rx_error, error, int val, val ? 1 : 0) 3433 SETFUNCEXPRIGNORE(14, rx_crc, int val, ignore) 3434 SETFUNCFIELD(14, rx_ingport, srcport, int val, val) 3435 #endif /* PLISIM */ 3436 3437 #ifdef BROADCOM_DEBUG 3438 static void 3439 dcb14_dump(int unit, dcb_t *dcb, char *prefix, int tx) 3440 { 3441 uint32 *p; 3442 int i, size; 3443 dcb14_t *d = (dcb14_t *)dcb; 3444 char ps[((DCB_MAX_SIZE/sizeof(uint32))*9)+1]; 3445 #if defined(LE_HOST) 3446 uint32 hgh[4]; 3447 uint8 *h = (uint8 *)&hgh[0]; 3448 3449 hgh[0] = soc_htonl(d->mh0); 3450 hgh[1] = soc_htonl(d->mh1); 3451 hgh[2] = soc_htonl(d->mh2); 3452 hgh[3] = soc_htonl(d->mh3); 3453 #else 3454 uint8 *h = (uint8 *)&d->mh0; 3455 #endif 3456 3457 p = (uint32 *)dcb; 3458 size = SOC_DCB_SIZE(unit) / sizeof(uint32); 3459 for (i = 0; i < size; i++) { 3460 sal_sprintf(&ps[i*9], "%08x ", p[i]); 3461 } 3462 LOG_CLI((BSL_META_U(unit, 3463 "%s\t%s\n"), prefix, ps)); 3464 if ((SOC_DCB_HG_GET(unit, dcb)) || (SOC_DCB_RX_START_GET(unit, dcb))) { 3465 soc_dma_higig_dump(unit, prefix, h, 0, 0, NULL); 3466 } 3467 LOG_CLI((BSL_META_U(unit, 3468 "%s\ttype %d %ssg %schain %sreload %shg %sstat %spause %spurge\n"), 3469 prefix, 3470 SOC_DCB_TYPE(unit), 3471 SOC_DCB_SG_GET(unit, dcb) ? "" : "!", 3472 SOC_DCB_CHAIN_GET(unit, dcb) ? "" : "!", 3473 SOC_DCB_RELOAD_GET(unit, dcb) ? "" : "!", 3474 SOC_DCB_HG_GET(unit, dcb) ? "" : "!", 3475 SOC_DCB_STAT_GET(unit, dcb) ? "" : "!", 3476 d->c_pause ? "" : "!", 3477 SOC_DCB_PURGE_GET(unit, dcb) ? "" : "!")); 3478 LOG_CLI((BSL_META_U(unit, 3479 "%s\taddr %p reqcount %d xfercount %d\n"), 3480 prefix, 3481 (void *)SOC_DCB_ADDR_GET(unit, dcb), 3482 SOC_DCB_REQCOUNT_GET(unit, dcb), 3483 SOC_DCB_XFERCOUNT_GET(unit, dcb))); 3484 if (!tx) { 3485 LOG_CLI((BSL_META_U(unit, 3486 "%s\t%sdone %sstart %send %serror\n"), 3487 prefix, 3488 SOC_DCB_DONE_GET(unit, dcb) ? "" : "!", 3489 SOC_DCB_RX_START_GET(unit, dcb) ? "" : "!", 3490 SOC_DCB_RX_END_GET(unit, dcb) ? "" : "!", 3491 SOC_DCB_RX_ERROR_GET(unit, dcb) ? "" : "!")); 3492 } 3493 if ((!tx) && (SOC_DCB_RX_START_GET(unit, dcb))) { 3494 dcb0_reason_dump(unit, dcb, prefix); 3495 LOG_CLI((BSL_META_U(unit, 3496 "%s %sdo_not_change_ttl %sbpdu %scell_error %schg_tos %semirror %simirror\n"), 3497 prefix, 3498 d->do_not_change_ttl ? "" : "!", 3499 d->bpdu ? "" : "!", 3500 d->cell_error ? "" : "!", 3501 d->chg_tos ? "" : "!", 3502 d->emirror ? "" : "!", 3503 d->imirror ? "" : "!" 3504 )); 3505 LOG_CLI((BSL_META_U(unit, 3506 "%s %sl3ipmc %sl3only %sl3uc %spkt_aged %spurge_cell %ssrc_hg\n"), 3507 prefix, 3508 d->l3ipmc ? "" : "!", 3509 d->l3only ? "" : "!", 3510 d->l3uc ? "" : "!", 3511 d->pkt_aged ? "" : "!", 3512 d->purge_cell ? "" : "!", 3513 d->src_hg ? "" : "!" 3514 )); 3515 LOG_CLI((BSL_META_U(unit, 3516 "%s %sswitch_pkt %sregen_crc %sdecap_iptunnel %sing_untagged\n"), 3517 prefix, 3518 d->switch_pkt ? "" : "!", 3519 d->regen_crc ? "" : "!", 3520 d->decap_iptunnel ? "" : "!", 3521 d->ingress_untagged ? "" : "!" 3522 )); 3523 LOG_CLI((BSL_META_U(unit, 3524 "%s cpu_cos=%d cos=%d l3_intf=%d mtp_index=%d reason=%08x_%08x\n"), 3525 prefix, 3526 d->cpu_cos, 3527 d->cos, 3528 d->l3_intf, 3529 d->mtp_index, 3530 d->reason_hi, 3531 d->reason 3532 )); 3533 LOG_CLI((BSL_META_U(unit, 3534 "%s match_rule=%d nh_index=%d hg_type=%d em_mtp_index=%d\n"), 3535 prefix, 3536 d->match_rule, 3537 d->nh_index, 3538 d->hg_type, 3539 d->em_mtp_index 3540 )); 3541 LOG_CLI((BSL_META_U(unit, 3542 "%s srcport=%d dscp=%d outer_pri=%d outer_cfi=%d outer_vid=%d\n"), 3543 prefix, 3544 d->srcport, 3545 d->dscp, 3546 d->outer_pri, 3547 d->outer_cfi, 3548 d->outer_vid 3549 )); 3550 LOG_CLI((BSL_META_U(unit, 3551 "%s hgi=%d itag_status=%d otag_action=%d itag_action=%d\n"), 3552 prefix, 3553 d->hgi, 3554 d->itag_status, 3555 d->otag_action, 3556 d->itag_action 3557 )); 3558 } 3559 } 3560 #endif /* BROADCOM_DEBUG */ 3561 dcb_op_t dcb14_op = { 3562 14, 3563 sizeof(dcb14_t), 3564 dcb14_rx_reason_maps, 3565 dcb0_rx_reason_map_get, 3566 dcb0_rx_reasons_get, 3567 dcb14_init, 3568 dcb14_addtx, 3569 dcb14_addrx, 3570 dcb14_intrinfo, 3571 dcb14_reqcount_set, 3572 dcb14_reqcount_get, 3573 dcb14_xfercount_get, 3574 dcb0_addr_set, 3575 dcb0_addr_get, 3576 dcb0_paddr_get, 3577 dcb14_done_set, 3578 dcb14_done_get, 3579 dcb14_sg_set, 3580 dcb14_sg_get, 3581 dcb14_chain_set, 3582 dcb14_chain_get, 3583 dcb14_reload_set, 3584 dcb14_reload_get, 3585 dcb9_desc_intr_set, 3586 dcb9_desc_intr_get, 3587 dcb14_tx_l2pbm_set, 3588 dcb14_tx_utpbm_set, 3589 dcb14_tx_l3pbm_set, 3590 dcb14_tx_crc_set, 3591 dcb14_tx_cos_set, 3592 dcb14_tx_destmod_set, 3593 dcb14_tx_destport_set, 3594 dcb14_tx_opcode_set, 3595 dcb14_tx_srcmod_set, 3596 dcb14_tx_srcport_set, 3597 dcb14_tx_prio_set, 3598 dcb14_tx_pfm_set, 3599 dcb14_rx_untagged_get, 3600 dcb14_rx_crc_get, 3601 dcb14_rx_cos_get, 3602 dcb14_rx_destmod_get, 3603 dcb14_rx_destport_get, 3604 dcb14_rx_opcode_get, 3605 dcb14_rx_classtag_get, 3606 dcb14_rx_matchrule_get, 3607 dcb14_rx_start_get, 3608 dcb14_rx_end_get, 3609 dcb14_rx_error_get, 3610 dcb14_rx_prio_get, 3611 dcb14_rx_reason_get, 3612 dcb14_rx_reason_hi_get, 3613 dcb14_rx_ingport_get, 3614 dcb14_rx_srcport_get, 3615 dcb14_rx_srcmod_get, 3616 dcb14_rx_mcast_get, 3617 dcb14_rx_vclabel_get, 3618 dcb14_rx_mirror_get, 3619 dcb14_rx_timestamp_get, 3620 dcb14_rx_timestamp_upper_get, 3621 dcb14_hg_set, 3622 dcb14_hg_get, 3623 dcb14_stat_set, 3624 dcb14_stat_get, 3625 dcb14_purge_set, 3626 dcb14_purge_get, 3627 dcb9_mhp_get, 3628 dcb14_outer_vid_get, 3629 dcb14_outer_pri_get, 3630 dcb14_outer_cfi_get, 3631 dcb14_rx_outer_tag_action_get, 3632 dcb9_inner_vid_get, 3633 dcb9_inner_pri_get, 3634 dcb9_inner_cfi_get, 3635 dcb14_rx_inner_tag_action_get, 3636 dcb14_rx_bpdu_get, 3637 dcb14_rx_l3_intf_get, 3638 dcb9_rx_decap_tunnel_get, 3639 dcb14_rx_switch_drop_get, 3640 dcb14_olp_encap_oam_pkt_get, 3641 dcb14_read_ecc_error_get, 3642 dcb14_desc_remaining_get, 3643 dcb14_desc_remaining_set, 3644 dcb14_desc_status_get, 3645 dcb14_desc_status_set, 3646 dcb14_match_id_lo_get, 3647 dcb14_match_id_hi_get, 3648 dcb14_forwarding_type_get, 3649 dcb14_forwarding_zone_id_get, 3650 #ifdef BROADCOM_DEBUG 3651 dcb14_tx_l2pbm_get, 3652 dcb14_tx_utpbm_get, 3653 dcb14_tx_l3pbm_get, 3654 dcb14_tx_crc_get, 3655 dcb14_tx_cos_get, 3656 dcb14_tx_destmod_get, 3657 dcb14_tx_destport_get, 3658 dcb14_tx_opcode_get, 3659 dcb14_tx_srcmod_get, 3660 dcb14_tx_srcport_get, 3661 dcb14_tx_prio_get, 3662 dcb14_tx_pfm_get, 3663 3664 dcb14_dump, 3665 dcb0_reason_dump, 3666 #endif /* BROADCOM_DEBUG */ 3667 #ifdef PLISIM 3668 dcb14_status_init, 3669 dcb14_xfercount_set, 3670 dcb14_rx_start_set, 3671 dcb14_rx_end_set, 3672 dcb14_rx_error_set, 3673 dcb14_rx_crc_set, 3674 dcb14_rx_ingport_set, 3675 #endif /* PLISIM */ 3676 NULL, 3677 }; 3678 #endif /* BCM_TRIUMPH_SUPPORT */ 3679 3680 #if defined(BCM_RAPTOR_SUPPORT) 3681 GETFUNCNULL(15, rx_switch_drop) 3682 GETFUNCNULL(15, olp_encap_oam_pkt) 3683 GETFUNCNULL(15, read_ecc_error) 3684 GETFUNCNULL(15, desc_remaining) 3685 SETFUNCNULL(15, desc_remaining) 3686 GETFUNCNULL(15, desc_status) 3687 SETFUNCNULL(15, desc_status) 3688 GETFUNCNULL(15, match_id_lo) 3689 GETFUNCNULL(15, match_id_hi) 3690 GETFUNCNULL(15, forwarding_type) 3691 GETFUNCNULL(15, forwarding_zone_id) 3692 3693 dcb_op_t dcb15_op = { 3694 15, 3695 sizeof(dcb15_t), 3696 dcb12_rx_reason_maps, 3697 dcb0_rx_reason_map_get, 3698 dcb0_rx_reasons_get, 3699 dcb9_init, 3700 dcb9_addtx, 3701 dcb9_addrx, 3702 dcb9_intrinfo, 3703 dcb9_reqcount_set, 3704 dcb9_reqcount_get, 3705 dcb9_xfercount_get, 3706 dcb0_addr_set, 3707 dcb0_addr_get, 3708 dcb0_paddr_get, 3709 dcb9_done_set, 3710 dcb9_done_get, 3711 dcb9_sg_set, 3712 dcb9_sg_get, 3713 dcb9_chain_set, 3714 dcb9_chain_get, 3715 dcb9_reload_set, 3716 dcb9_reload_get, 3717 dcb9_desc_intr_set, 3718 dcb9_desc_intr_get, 3719 dcb9_tx_l2pbm_set, 3720 dcb9_tx_utpbm_set, 3721 dcb9_tx_l3pbm_set, 3722 dcb9_tx_crc_set, 3723 dcb9_tx_cos_set, 3724 dcb9_tx_destmod_set, 3725 dcb9_tx_destport_set, 3726 dcb9_tx_opcode_set, 3727 dcb9_tx_srcmod_set, 3728 dcb9_tx_srcport_set, 3729 dcb9_tx_prio_set, 3730 dcb9_tx_pfm_set, 3731 dcb12_rx_untagged_get, 3732 dcb15_rx_crc_get, 3733 dcb15_rx_cos_get, 3734 dcb15_rx_destmod_get, 3735 dcb15_rx_destport_get, 3736 dcb15_rx_opcode_get, 3737 dcb15_rx_classtag_get, 3738 dcb15_rx_matchrule_get, 3739 dcb9_rx_start_get, 3740 dcb9_rx_end_get, 3741 dcb9_rx_error_get, 3742 dcb15_rx_prio_get, 3743 dcb15_rx_reason_get, 3744 dcb15_rx_reason_hi_get, 3745 dcb15_rx_ingport_get, 3746 dcb15_rx_srcport_get, 3747 dcb15_rx_srcmod_get, 3748 dcb15_rx_mcast_get, 3749 dcb15_rx_vclabel_get, 3750 dcb15_rx_mirror_get, 3751 dcb15_rx_timestamp_get, 3752 dcb15_rx_timestamp_upper_get, 3753 dcb9_hg_set, 3754 dcb9_hg_get, 3755 dcb9_stat_set, 3756 dcb9_stat_get, 3757 dcb9_purge_set, 3758 dcb9_purge_get, 3759 dcb9_mhp_get, 3760 dcb15_outer_vid_get, 3761 dcb15_outer_pri_get, 3762 dcb15_outer_cfi_get, 3763 dcb9_rx_outer_tag_action_get, 3764 dcb9_inner_vid_get, 3765 dcb9_inner_pri_get, 3766 dcb9_inner_cfi_get, 3767 dcb9_rx_inner_tag_action_get, 3768 dcb12_rx_bpdu_get, 3769 dcb15_rx_l3_intf_get, 3770 dcb9_rx_decap_tunnel_get, 3771 dcb15_rx_switch_drop_get, 3772 dcb15_olp_encap_oam_pkt_get, 3773 dcb15_read_ecc_error_get, 3774 dcb15_desc_remaining_get, 3775 dcb15_desc_remaining_set, 3776 dcb15_desc_status_get, 3777 dcb15_desc_status_set, 3778 dcb15_match_id_lo_get, 3779 dcb15_match_id_hi_get, 3780 dcb15_forwarding_type_get, 3781 dcb15_forwarding_zone_id_get, 3782 #ifdef BROADCOM_DEBUG 3783 dcb9_tx_l2pbm_get, 3784 dcb9_tx_utpbm_get, 3785 dcb9_tx_l3pbm_get, 3786 dcb9_tx_crc_get, 3787 dcb9_tx_cos_get, 3788 dcb9_tx_destmod_get, 3789 dcb9_tx_destport_get, 3790 dcb9_tx_opcode_get, 3791 dcb9_tx_srcmod_get, 3792 dcb9_tx_srcport_get, 3793 dcb9_tx_prio_get, 3794 dcb9_tx_pfm_get, 3795 3796 dcb9_dump, 3797 dcb0_reason_dump, 3798 #endif /* BROADCOM_DEBUG */ 3799 #ifdef PLISIM 3800 dcb9_status_init, 3801 dcb9_xfercount_set, 3802 dcb9_rx_start_set, 3803 dcb9_rx_end_set, 3804 dcb9_rx_error_set, 3805 dcb15_rx_crc_set, 3806 dcb15_rx_ingport_set, 3807 #endif /* PLISIM */ 3808 NULL, 3809 }; 3810 #endif /* BCM_RAPTOR_SUPPORT */ 3811 3812 #ifdef BCM_SCORPION_SUPPORT 3813 static soc_rx_reason_t 3814 dcb16_rx_reason_map[] = { 3815 socRxReasonUnknownVlan, /* Offset 0 */ 3816 socRxReasonL2SourceMiss, /* Offset 1 */ 3817 socRxReasonL2DestMiss, /* Offset 2 */ 3818 socRxReasonL2Move, /* Offset 3 */ 3819 socRxReasonL2Cpu, /* Offset 4 */ 3820 socRxReasonSampleSource, /* Offset 5 */ 3821 socRxReasonSampleDest, /* Offset 6 */ 3822 socRxReasonL3SourceMiss, /* Offset 7 */ 3823 socRxReasonL3DestMiss, /* Offset 8 */ 3824 socRxReasonL3SourceMove, /* Offset 9 */ 3825 socRxReasonMcastMiss, /* Offset 10 */ 3826 socRxReasonIpMcastMiss, /* Offset 11 */ 3827 socRxReasonFilterMatch, /* Offset 12 */ 3828 socRxReasonL3HeaderError, /* Offset 13 */ 3829 socRxReasonProtocol, /* Offset 14 */ 3830 socRxReasonDosAttack, /* Offset 15 */ 3831 socRxReasonMartianAddr, /* Offset 16 */ 3832 socRxReasonTunnelError, /* Offset 17 */ 3833 socRxReasonL2MtuFail, /* Offset 18 */ 3834 socRxReasonIcmpRedirect, /* Offset 19 */ 3835 socRxReasonL3Slowpath, /* Offset 20 */ 3836 socRxReasonParityError, /* Offset 21 */ 3837 socRxReasonL3MtuFail, /* Offset 22 */ 3838 socRxReasonHigigHdrError, /* Offset 23 */ 3839 socRxReasonMcastIdxError, /* Offset 24 */ 3840 socRxReasonVlanFilterMatch, /* Offset 25 */ 3841 socRxReasonClassBasedMove, /* Offset 26 */ 3842 socRxReasonL2LearnLimit, /* Offset 27 */ 3843 socRxReasonL2NonUnicastMiss, /* Offset 28 */ 3844 socRxReasonNhop, /* Offset 29 */ 3845 socRxReasonInvalid, /* Offset 30 */ 3846 socRxReasonInvalid /* Offset 31 */ 3847 }; 3848 3849 static soc_rx_reason_t *dcb16_rx_reason_maps[] = { 3850 dcb16_rx_reason_map, 3851 NULL 3852 }; 3853 3854 GETFUNCERR(16, rx_timestamp) 3855 GETFUNCERR(16, rx_timestamp_upper) 3856 GETFUNCNULL(16, rx_switch_drop) 3857 GETFUNCNULL(16, olp_encap_oam_pkt) 3858 GETFUNCNULL(16, read_ecc_error) 3859 GETFUNCNULL(16, desc_remaining) 3860 SETFUNCNULL(16, desc_remaining) 3861 GETFUNCNULL(16, desc_status) 3862 SETFUNCNULL(16, desc_status) 3863 GETFUNCNULL(16, match_id_lo) 3864 GETFUNCNULL(16, match_id_hi) 3865 GETFUNCNULL(16, forwarding_type) 3866 GETFUNCNULL(16, forwarding_zone_id) 3867 3868 dcb_op_t dcb16_op = { 3869 16, 3870 sizeof(dcb16_t), 3871 dcb16_rx_reason_maps, 3872 dcb0_rx_reason_map_get, 3873 dcb0_rx_reasons_get, 3874 dcb14_init, 3875 dcb14_addtx, 3876 dcb14_addrx, 3877 dcb14_intrinfo, 3878 dcb14_reqcount_set, 3879 dcb14_reqcount_get, 3880 dcb14_xfercount_get, 3881 dcb0_addr_set, 3882 dcb0_addr_get, 3883 dcb0_paddr_get, 3884 dcb14_done_set, 3885 dcb14_done_get, 3886 dcb14_sg_set, 3887 dcb14_sg_get, 3888 dcb14_chain_set, 3889 dcb14_chain_get, 3890 dcb14_reload_set, 3891 dcb14_reload_get, 3892 dcb9_desc_intr_set, 3893 dcb9_desc_intr_get, 3894 dcb14_tx_l2pbm_set, 3895 dcb14_tx_utpbm_set, 3896 dcb14_tx_l3pbm_set, 3897 dcb14_tx_crc_set, 3898 dcb14_tx_cos_set, 3899 dcb14_tx_destmod_set, 3900 dcb14_tx_destport_set, 3901 dcb14_tx_opcode_set, 3902 dcb14_tx_srcmod_set, 3903 dcb14_tx_srcport_set, 3904 dcb14_tx_prio_set, 3905 dcb14_tx_pfm_set, 3906 dcb14_rx_untagged_get, 3907 dcb14_rx_crc_get, 3908 dcb14_rx_cos_get, 3909 dcb14_rx_destmod_get, 3910 dcb14_rx_destport_get, 3911 dcb14_rx_opcode_get, 3912 dcb9_rx_classtag_get, 3913 dcb14_rx_matchrule_get, 3914 dcb14_rx_start_get, 3915 dcb14_rx_end_get, 3916 dcb14_rx_error_get, 3917 dcb14_rx_prio_get, 3918 dcb14_rx_reason_get, 3919 dcb9_rx_reason_hi_get, 3920 dcb14_rx_ingport_get, 3921 dcb14_rx_srcport_get, 3922 dcb14_rx_srcmod_get, 3923 dcb9_rx_mcast_get, 3924 dcb14_rx_vclabel_get, 3925 dcb14_rx_mirror_get, 3926 dcb16_rx_timestamp_get, 3927 dcb16_rx_timestamp_upper_get, 3928 dcb14_hg_set, 3929 dcb14_hg_get, 3930 dcb14_stat_set, 3931 dcb14_stat_get, 3932 dcb14_purge_set, 3933 dcb14_purge_get, 3934 dcb9_mhp_get, 3935 dcb14_outer_vid_get, 3936 dcb14_outer_pri_get, 3937 dcb14_outer_cfi_get, 3938 dcb14_rx_outer_tag_action_get, 3939 dcb9_inner_vid_get, 3940 dcb9_inner_pri_get, 3941 dcb9_inner_cfi_get, 3942 dcb14_rx_inner_tag_action_get, 3943 dcb14_rx_bpdu_get, 3944 dcb14_rx_l3_intf_get, 3945 dcb9_rx_decap_tunnel_get, 3946 dcb16_rx_switch_drop_get, 3947 dcb16_olp_encap_oam_pkt_get, 3948 dcb16_read_ecc_error_get, 3949 dcb16_desc_remaining_get, 3950 dcb16_desc_remaining_set, 3951 dcb16_desc_status_get, 3952 dcb16_desc_status_set, 3953 dcb16_match_id_lo_get, 3954 dcb16_match_id_hi_get, 3955 dcb16_forwarding_type_get, 3956 dcb16_forwarding_zone_id_get, 3957 #ifdef BROADCOM_DEBUG 3958 dcb14_tx_l2pbm_get, 3959 dcb14_tx_utpbm_get, 3960 dcb14_tx_l3pbm_get, 3961 dcb14_tx_crc_get, 3962 dcb14_tx_cos_get, 3963 dcb14_tx_destmod_get, 3964 dcb14_tx_destport_get, 3965 dcb14_tx_opcode_get, 3966 dcb14_tx_srcmod_get, 3967 dcb14_tx_srcport_get, 3968 dcb14_tx_prio_get, 3969 dcb14_tx_pfm_get, 3970 3971 dcb14_dump, 3972 dcb0_reason_dump, 3973 #endif /* BROADCOM_DEBUG */ 3974 #ifdef PLISIM 3975 dcb14_status_init, 3976 dcb14_xfercount_set, 3977 dcb14_rx_start_set, 3978 dcb14_rx_end_set, 3979 dcb14_rx_error_set, 3980 dcb14_rx_crc_set, 3981 dcb14_rx_ingport_set, 3982 #endif /* PLISIM */ 3983 NULL, 3984 }; 3985 #endif /* BCM_SCORPION_SUPPORT */ 3986 3987 #if defined(BCM_HAWKEYE_SUPPORT) 3988 3989 static soc_rx_reason_t 3990 dcb17_rx_reason_map[] = { 3991 socRxReasonUnknownVlan, /* Offset 0 */ 3992 socRxReasonL2SourceMiss, /* Offset 1 */ 3993 socRxReasonL2DestMiss, /* Offset 2 */ 3994 socRxReasonL2Move, /* Offset 3 */ 3995 socRxReasonL2Cpu, /* Offset 4 */ 3996 socRxReasonSampleSource, /* Offset 5 */ 3997 socRxReasonSampleDest, /* Offset 6 */ 3998 socRxReasonL3SourceMiss, /* Offset 7 */ 3999 socRxReasonL3DestMiss, /* Offset 8 */ 4000 socRxReasonL3SourceMove, /* Offset 9 */ 4001 socRxReasonMcastMiss, /* Offset 10 */ 4002 socRxReasonIpMcastMiss, /* Offset 11 */ 4003 socRxReasonFilterMatch, /* Offset 12 */ 4004 socRxReasonL3HeaderError, /* Offset 13 */ 4005 socRxReasonProtocol, /* Offset 14 */ 4006 socRxReasonDosAttack, /* Offset 15 */ 4007 socRxReasonMartianAddr, /* Offset 16 */ 4008 socRxReasonTunnelError, /* Offset 17 */ 4009 socRxReasonL2MtuFail, /* Offset 18 */ 4010 socRxReasonIcmpRedirect, /* Offset 19 */ 4011 socRxReasonL3Slowpath, /* Offset 20 */ 4012 socRxReasonParityError, /* Offset 21 */ 4013 socRxReasonL3MtuFail, /* Offset 22 */ 4014 socRxReasonHigigHdrError, /* Offset 23 */ 4015 socRxReasonMcastIdxError, /* Offset 24 */ 4016 socRxReasonL2LearnLimit, /* Offset 25 */ 4017 socRxReasonTimeSync, /* Offset 26 */ 4018 socRxReasonEAVData, /* Offset 27 */ 4019 socRxReasonInvalid, /* Offset 28 */ 4020 socRxReasonInvalid, /* Offset 29 */ 4021 socRxReasonInvalid, /* Offset 30 */ 4022 socRxReasonInvalid /* Offset 31 */ 4023 }; 4024 4025 static soc_rx_reason_t *dcb17_rx_reason_maps[] = { 4026 dcb17_rx_reason_map, 4027 NULL, 4028 }; 4029 4030 GETFUNCNULL(17, rx_switch_drop) 4031 GETFUNCNULL(17, olp_encap_oam_pkt) 4032 GETFUNCNULL(17, read_ecc_error) 4033 GETFUNCNULL(17, desc_remaining) 4034 SETFUNCNULL(17, desc_remaining) 4035 GETFUNCNULL(17, desc_status) 4036 SETFUNCNULL(17, desc_status) 4037 GETFUNCNULL(17, match_id_lo) 4038 GETFUNCNULL(17, match_id_hi) 4039 GETFUNCNULL(17, forwarding_type) 4040 GETFUNCNULL(17, forwarding_zone_id) 4041 4042 dcb_op_t dcb17_op = { 4043 17, 4044 sizeof(dcb17_t), 4045 dcb17_rx_reason_maps, 4046 dcb0_rx_reason_map_get, 4047 dcb0_rx_reasons_get, 4048 dcb9_init, 4049 dcb9_addtx, 4050 dcb9_addrx, 4051 dcb9_intrinfo, 4052 dcb9_reqcount_set, 4053 dcb9_reqcount_get, 4054 dcb9_xfercount_get, 4055 dcb0_addr_set, 4056 dcb0_addr_get, 4057 dcb0_paddr_get, 4058 dcb9_done_set, 4059 dcb9_done_get, 4060 dcb9_sg_set, 4061 dcb9_sg_get, 4062 dcb9_chain_set, 4063 dcb9_chain_get, 4064 dcb9_reload_set, 4065 dcb9_reload_get, 4066 dcb9_desc_intr_set, 4067 dcb9_desc_intr_get, 4068 dcb9_tx_l2pbm_set, 4069 dcb9_tx_utpbm_set, 4070 dcb9_tx_l3pbm_set, 4071 dcb9_tx_crc_set, 4072 dcb9_tx_cos_set, 4073 dcb9_tx_destmod_set, 4074 dcb9_tx_destport_set, 4075 dcb9_tx_opcode_set, 4076 dcb9_tx_srcmod_set, 4077 dcb9_tx_srcport_set, 4078 dcb9_tx_prio_set, 4079 dcb9_tx_pfm_set, 4080 dcb17_rx_untagged_get, 4081 dcb17_rx_crc_get, 4082 dcb17_rx_cos_get, 4083 dcb17_rx_destmod_get, 4084 dcb17_rx_destport_get, 4085 dcb17_rx_opcode_get, 4086 dcb17_rx_classtag_get, 4087 dcb15_rx_matchrule_get, 4088 dcb9_rx_start_get, 4089 dcb9_rx_end_get, 4090 dcb9_rx_error_get, 4091 dcb17_rx_prio_get, 4092 dcb17_rx_reason_get, 4093 dcb15_rx_reason_hi_get, 4094 dcb15_rx_ingport_get, 4095 dcb17_rx_srcport_get, 4096 dcb17_rx_srcmod_get, 4097 dcb17_rx_mcast_get, 4098 dcb17_rx_vclabel_get, 4099 dcb15_rx_mirror_get, 4100 dcb17_rx_timestamp_get, 4101 dcb17_rx_timestamp_upper_get, 4102 dcb9_hg_set, 4103 dcb9_hg_get, 4104 dcb9_stat_set, 4105 dcb9_stat_get, 4106 dcb9_purge_set, 4107 dcb9_purge_get, 4108 dcb9_mhp_get, 4109 dcb15_outer_vid_get, 4110 dcb15_outer_pri_get, 4111 dcb15_outer_cfi_get, 4112 dcb9_rx_outer_tag_action_get, 4113 dcb9_inner_vid_get, 4114 dcb9_inner_pri_get, 4115 dcb9_inner_cfi_get, 4116 dcb9_rx_inner_tag_action_get, 4117 dcb12_rx_bpdu_get, 4118 dcb15_rx_l3_intf_get, 4119 dcb9_rx_decap_tunnel_get, 4120 dcb17_rx_switch_drop_get, 4121 dcb17_olp_encap_oam_pkt_get, 4122 dcb17_read_ecc_error_get, 4123 dcb17_desc_remaining_get, 4124 dcb17_desc_remaining_set, 4125 dcb17_desc_status_get, 4126 dcb17_desc_status_set, 4127 dcb17_match_id_lo_get, 4128 dcb17_match_id_hi_get, 4129 dcb17_forwarding_type_get, 4130 dcb17_forwarding_zone_id_get, 4131 #ifdef BROADCOM_DEBUG 4132 dcb9_tx_l2pbm_get, 4133 dcb9_tx_utpbm_get, 4134 dcb9_tx_l3pbm_get, 4135 dcb9_tx_crc_get, 4136 dcb9_tx_cos_get, 4137 dcb9_tx_destmod_get, 4138 dcb9_tx_destport_get, 4139 dcb9_tx_opcode_get, 4140 dcb9_tx_srcmod_get, 4141 dcb9_tx_srcport_get, 4142 dcb9_tx_prio_get, 4143 dcb9_tx_pfm_get, 4144 4145 dcb9_dump, 4146 dcb0_reason_dump, 4147 #endif /* BROADCOM_DEBUG */ 4148 #ifdef PLISIM 4149 dcb9_status_init, 4150 dcb9_xfercount_set, 4151 dcb9_rx_start_set, 4152 dcb9_rx_end_set, 4153 dcb9_rx_error_set, 4154 dcb15_rx_crc_set, 4155 dcb15_rx_ingport_set, 4156 #endif /* PLISIM */ 4157 NULL, 4158 }; 4159 #endif /* BCM_HAWKEYE_SUPPORT */ 4160 4161 #if defined(BCM_RAPTOR_SUPPORT) 4162 GETFUNCERR(18, rx_timestamp) 4163 GETFUNCERR(18, rx_timestamp_upper) 4164 GETFUNCFIELD(18, rx_matchrule, match_rule) 4165 GETFUNCNULL(18, rx_switch_drop) 4166 GETFUNCNULL(18, olp_encap_oam_pkt) 4167 GETFUNCNULL(18, read_ecc_error) 4168 GETFUNCNULL(18, desc_remaining) 4169 SETFUNCNULL(18, desc_remaining) 4170 GETFUNCNULL(18, desc_status) 4171 SETFUNCNULL(18, desc_status) 4172 GETFUNCNULL(18, match_id_lo) 4173 GETFUNCNULL(18, match_id_hi) 4174 GETFUNCNULL(18, forwarding_type) 4175 GETFUNCNULL(18, forwarding_zone_id) 4176 4177 dcb_op_t dcb18_op = { 4178 18, 4179 sizeof(dcb18_t), 4180 dcb12_rx_reason_maps, 4181 dcb0_rx_reason_map_get, 4182 dcb0_rx_reasons_get, 4183 dcb9_init, 4184 dcb9_addtx, 4185 dcb9_addrx, 4186 dcb9_intrinfo, 4187 dcb9_reqcount_set, 4188 dcb9_reqcount_get, 4189 dcb9_xfercount_get, 4190 dcb0_addr_set, 4191 dcb0_addr_get, 4192 dcb0_paddr_get, 4193 dcb9_done_set, 4194 dcb9_done_get, 4195 dcb9_sg_set, 4196 dcb9_sg_get, 4197 dcb9_chain_set, 4198 dcb9_chain_get, 4199 dcb9_reload_set, 4200 dcb9_reload_get, 4201 dcb9_desc_intr_set, 4202 dcb9_desc_intr_get, 4203 dcb9_tx_l2pbm_set, 4204 dcb9_tx_utpbm_set, 4205 dcb9_tx_l3pbm_set, 4206 dcb9_tx_crc_set, 4207 dcb9_tx_cos_set, 4208 dcb9_tx_destmod_set, 4209 dcb9_tx_destport_set, 4210 dcb9_tx_opcode_set, 4211 dcb9_tx_srcmod_set, 4212 dcb9_tx_srcport_set, 4213 dcb9_tx_prio_set, 4214 dcb9_tx_pfm_set, 4215 dcb12_rx_untagged_get, 4216 dcb15_rx_crc_get, 4217 dcb15_rx_cos_get, 4218 dcb15_rx_destmod_get, 4219 dcb15_rx_destport_get, 4220 dcb15_rx_opcode_get, 4221 dcb15_rx_classtag_get, 4222 dcb18_rx_matchrule_get, 4223 dcb9_rx_start_get, 4224 dcb9_rx_end_get, 4225 dcb9_rx_error_get, 4226 dcb15_rx_prio_get, 4227 dcb15_rx_reason_get, 4228 dcb15_rx_reason_hi_get, 4229 dcb15_rx_ingport_get, 4230 dcb15_rx_srcport_get, 4231 dcb15_rx_srcmod_get, 4232 dcb15_rx_mcast_get, 4233 dcb15_rx_vclabel_get, 4234 dcb15_rx_mirror_get, 4235 dcb18_rx_timestamp_get, 4236 dcb18_rx_timestamp_upper_get, 4237 dcb9_hg_set, 4238 dcb9_hg_get, 4239 dcb9_stat_set, 4240 dcb9_stat_get, 4241 dcb9_purge_set, 4242 dcb9_purge_get, 4243 dcb9_mhp_get, 4244 dcb15_outer_vid_get, 4245 dcb15_outer_pri_get, 4246 dcb15_outer_cfi_get, 4247 dcb9_rx_outer_tag_action_get, 4248 dcb9_inner_vid_get, 4249 dcb9_inner_pri_get, 4250 dcb9_inner_cfi_get, 4251 dcb9_rx_inner_tag_action_get, 4252 dcb12_rx_bpdu_get, 4253 dcb15_rx_l3_intf_get, 4254 dcb9_rx_decap_tunnel_get, 4255 dcb18_rx_switch_drop_get, 4256 dcb18_olp_encap_oam_pkt_get, 4257 dcb18_read_ecc_error_get, 4258 dcb18_desc_remaining_get, 4259 dcb18_desc_remaining_set, 4260 dcb18_desc_status_get, 4261 dcb18_desc_status_set, 4262 dcb18_match_id_lo_get, 4263 dcb18_match_id_hi_get, 4264 dcb18_forwarding_type_get, 4265 dcb18_forwarding_zone_id_get, 4266 #ifdef BROADCOM_DEBUG 4267 dcb9_tx_l2pbm_get, 4268 dcb9_tx_utpbm_get, 4269 dcb9_tx_l3pbm_get, 4270 dcb9_tx_crc_get, 4271 dcb9_tx_cos_get, 4272 dcb9_tx_destmod_get, 4273 dcb9_tx_destport_get, 4274 dcb9_tx_opcode_get, 4275 dcb9_tx_srcmod_get, 4276 dcb9_tx_srcport_get, 4277 dcb9_tx_prio_get, 4278 dcb9_tx_pfm_get, 4279 4280 dcb9_dump, 4281 dcb0_reason_dump, 4282 #endif /* BROADCOM_DEBUG */ 4283 #ifdef PLISIM 4284 dcb9_status_init, 4285 dcb9_xfercount_set, 4286 dcb9_rx_start_set, 4287 dcb9_rx_end_set, 4288 dcb9_rx_error_set, 4289 dcb15_rx_crc_set, 4290 dcb15_rx_ingport_set, 4291 #endif /* PLISIM */ 4292 NULL, 4293 }; 4294 #endif /* BCM_RAPTOR_SUPPORT */ 4295 #endif /* BCM_XGS3_SWITCH_SUPPORT */ 4296 4297 #if defined(BCM_TRIUMPH2_SUPPORT) || defined(BCM_SHADOW_SUPPORT) 4298 /* 4299 * DCB Type 19 Support 4300 */ 4301 static soc_rx_reason_t 4302 dcb19_rx_reason_map[] = { 4303 socRxReasonUnknownVlan, /* Offset 0 */ 4304 socRxReasonL2SourceMiss, /* Offset 1 */ 4305 socRxReasonL2DestMiss, /* Offset 2 */ 4306 socRxReasonL2Move, /* Offset 3 */ 4307 socRxReasonL2Cpu, /* Offset 4 */ 4308 socRxReasonSampleSource, /* Offset 5 */ 4309 socRxReasonSampleDest, /* Offset 6 */ 4310 socRxReasonL3SourceMiss, /* Offset 7 */ 4311 socRxReasonL3DestMiss, /* Offset 8 */ 4312 socRxReasonL3SourceMove, /* Offset 9 */ 4313 socRxReasonMcastMiss, /* Offset 10 */ 4314 socRxReasonIpMcastMiss, /* Offset 11 */ 4315 socRxReasonFilterMatch, /* Offset 12 */ 4316 socRxReasonL3HeaderError, /* Offset 13 */ 4317 socRxReasonProtocol, /* Offset 14 */ 4318 socRxReasonDosAttack, /* Offset 15 */ 4319 socRxReasonMartianAddr, /* Offset 16 */ 4320 socRxReasonTunnelError, /* Offset 17 */ 4321 socRxReasonL2MtuFail, /* Offset 18 */ 4322 socRxReasonIcmpRedirect, /* Offset 19 */ 4323 socRxReasonL3Slowpath, /* Offset 20 */ 4324 socRxReasonParityError, /* Offset 21 */ 4325 socRxReasonL3MtuFail, /* Offset 22 */ 4326 socRxReasonHigigHdrError, /* Offset 23 */ 4327 socRxReasonMcastIdxError, /* Offset 24 */ 4328 socRxReasonVlanFilterMatch, /* Offset 25 */ 4329 socRxReasonClassBasedMove, /* Offset 26 */ 4330 socRxReasonL2LearnLimit, /* Offset 27 */ 4331 socRxReasonMplsLabelMiss, /* Offset 28 */ 4332 socRxReasonMplsInvalidAction, /* Offset 29 */ 4333 socRxReasonMplsInvalidPayload, /* Offset 30 */ 4334 socRxReasonMplsTtl, /* Offset 31 */ 4335 socRxReasonMplsSequenceNumber, /* Offset 32 */ 4336 socRxReasonL2NonUnicastMiss, /* Offset 33 */ 4337 socRxReasonNhop, /* Offset 34 */ 4338 socRxReasonMplsCtrlWordError, /* Offset 35 */ 4339 socRxReasonIpfixRateViolation, /* Offset 36 */ 4340 socRxReasonWlanDot1xDrop, /* Offset 37 */ 4341 socRxReasonWlanSlowpath, /* Offset 38 */ 4342 socRxReasonWlanClientError, /* Offset 39 */ 4343 socRxReasonEncapHigigError, /* Offset 40 */ 4344 socRxReasonTimeSync, /* Offset 41 */ 4345 socRxReasonOAMSlowpath, /* Offset 42 */ 4346 socRxReasonOAMError, /* Offset 43 */ 4347 socRxReasonL3AddrBindFail, /* Offset 44 */ 4348 socRxReasonInvalid, /* Offset 45 */ 4349 socRxReasonInvalid, /* Offset 46 */ 4350 socRxReasonInvalid, /* Offset 47 */ 4351 socRxReasonInvalid, /* Offset 48 */ 4352 socRxReasonInvalid, /* Offset 49 */ 4353 socRxReasonInvalid, /* Offset 50 */ 4354 socRxReasonInvalid, /* Offset 51 */ 4355 socRxReasonInvalid, /* Offset 52 */ 4356 socRxReasonInvalid, /* Offset 53 */ 4357 socRxReasonInvalid, /* Offset 54 */ 4358 socRxReasonInvalid, /* Offset 55 */ 4359 socRxReasonInvalid, /* Offset 56 */ 4360 socRxReasonInvalid, /* Offset 57 */ 4361 socRxReasonInvalid, /* Offset 58 */ 4362 socRxReasonInvalid, /* Offset 59 */ 4363 socRxReasonInvalid, /* Offset 60 */ 4364 socRxReasonInvalid, /* Offset 61 */ 4365 socRxReasonInvalid, /* Offset 62 */ 4366 socRxReasonInvalid /* Offset 63 */ 4367 }; 4368 4369 static soc_rx_reason_t 4370 dcb19_rx_egr_reason_map[] = { 4371 socRxReasonUnknownVlan, /* Offset 0 */ 4372 socRxReasonStp, /* Offset 1 */ 4373 socRxReasonVlanTranslate, /* Offset 2 new */ 4374 socRxReasonTunnelError, /* Offset 3 */ 4375 socRxReasonIpmc, /* Offset 4 */ 4376 socRxReasonL3HeaderError, /* Offset 5 */ 4377 socRxReasonTtl, /* Offset 6 */ 4378 socRxReasonL2MtuFail, /* Offset 7 */ 4379 socRxReasonHigigHdrError, /* Offset 8 */ 4380 socRxReasonSplitHorizon, /* Offset 9 */ 4381 socRxReasonL2Move, /* Offset 10 */ 4382 socRxReasonFilterMatch, /* Offset 11 */ 4383 socRxReasonL2SourceMiss, /* Offset 12 */ 4384 socRxReasonInvalid, /* Offset 13 */ 4385 socRxReasonInvalid, /* Offset 14 */ 4386 socRxReasonInvalid, /* Offset 15 */ 4387 socRxReasonInvalid, /* Offset 16 */ 4388 socRxReasonInvalid, /* Offset 17 */ 4389 socRxReasonInvalid, /* Offset 18 */ 4390 socRxReasonInvalid, /* Offset 19 */ 4391 socRxReasonInvalid, /* Offset 20 */ 4392 socRxReasonInvalid, /* Offset 21 */ 4393 socRxReasonInvalid, /* Offset 22 */ 4394 socRxReasonInvalid, /* Offset 23 */ 4395 socRxReasonInvalid, /* Offset 24 */ 4396 socRxReasonInvalid, /* Offset 25 */ 4397 socRxReasonInvalid, /* Offset 26 */ 4398 socRxReasonInvalid, /* Offset 27 */ 4399 socRxReasonInvalid, /* Offset 28 */ 4400 socRxReasonInvalid, /* Offset 29 */ 4401 socRxReasonInvalid, /* Offset 30 */ 4402 socRxReasonInvalid, /* Offset 31 */ 4403 socRxReasonInvalid, /* Offset 32 */ 4404 socRxReasonInvalid, /* Offset 33 */ 4405 socRxReasonInvalid, /* Offset 34 */ 4406 socRxReasonInvalid, /* Offset 35 */ 4407 socRxReasonInvalid, /* Offset 36 */ 4408 socRxReasonInvalid, /* Offset 37 */ 4409 socRxReasonInvalid, /* Offset 38 */ 4410 socRxReasonInvalid, /* Offset 39 */ 4411 socRxReasonInvalid, /* Offset 40 */ 4412 socRxReasonInvalid, /* Offset 41 */ 4413 socRxReasonInvalid, /* Offset 42 */ 4414 socRxReasonInvalid, /* Offset 43 */ 4415 socRxReasonInvalid, /* Offset 44 */ 4416 socRxReasonInvalid, /* Offset 45 */ 4417 socRxReasonInvalid, /* Offset 46 */ 4418 socRxReasonInvalid, /* Offset 47 */ 4419 socRxReasonInvalid, /* Offset 48 */ 4420 socRxReasonInvalid, /* Offset 49 */ 4421 socRxReasonInvalid, /* Offset 50 */ 4422 socRxReasonInvalid, /* Offset 51 */ 4423 socRxReasonInvalid, /* Offset 52 */ 4424 socRxReasonInvalid, /* Offset 53 */ 4425 socRxReasonInvalid, /* Offset 54 */ 4426 socRxReasonInvalid, /* Offset 55 */ 4427 socRxReasonInvalid, /* Offset 56 */ 4428 socRxReasonInvalid, /* Offset 57 */ 4429 socRxReasonInvalid, /* Offset 58 */ 4430 socRxReasonInvalid, /* Offset 59 */ 4431 socRxReasonInvalid, /* Offset 60 */ 4432 socRxReasonInvalid, /* Offset 61 */ 4433 socRxReasonInvalid, /* Offset 62 */ 4434 socRxReasonInvalid /* Offset 63 */ 4435 }; 4436 4437 static soc_rx_reason_t *dcb19_rx_reason_maps[] = { 4438 dcb19_rx_reason_map, 4439 dcb19_rx_egr_reason_map, 4440 NULL 4441 }; 4442 4443 4444 /* 4445 * Function: 4446 * dcb19_rx_reason_map_get 4447 * Purpose: 4448 * Return the RX reason map for a DCB type 19. 4449 * Parameters: 4450 * dcb_op - DCB operations 4451 * dcb - dma control block 4452 * Returns: 4453 * RX reason map pointer 4454 */ 4455 static soc_rx_reason_t * 4456 dcb19_rx_reason_map_get(dcb_op_t *dcb_op, dcb_t *dcb) 4457 { 4458 dcb19_t *d = (dcb19_t *)dcb; 4459 4460 if (d->egr_cpu_copy) { 4461 return dcb19_rx_egr_reason_map; 4462 } 4463 4464 return dcb19_rx_reason_map; 4465 } 4466 4467 static void 4468 dcb19_init(dcb_t *dcb) 4469 { 4470 uint32 *d = (uint32 *)dcb; 4471 4472 d[0] = d[1] = d[2] = d[3] = d[4] = 0; 4473 d[5] = d[6] = d[7] = d[8] = d[9] = d[10] = 0; 4474 d[11] = d[12] = d[13] = d[14] = d[15] = 0; 4475 } 4476 4477 static int 4478 dcb19_addtx(dv_t *dv, sal_vaddr_t addr, uint32 count, 4479 pbmp_t l2pbm, pbmp_t utpbm, pbmp_t l3pbm, uint32 flags, uint32 *hgh) 4480 { 4481 dcb19_t *d; /* DCB */ 4482 uint32 *di; /* DCB integer pointer */ 4483 uint32 paddr; /* Packet buffer physical address */ 4484 int unaligned; 4485 int unaligned_bytes; 4486 uint8 *unaligned_buffer; 4487 uint8 *aligned_buffer; 4488 4489 d = (dcb19_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); 4490 4491 if (addr) { 4492 paddr = soc_cm_l2p(dv->dv_unit, (void *)addr); 4493 } else { 4494 paddr = 0; 4495 } 4496 4497 if (dv->dv_vcnt > 0 && (dv->dv_flags & DV_F_COMBINE_DCB) && 4498 (d[-1].c_sg != 0) && 4499 (d[-1].addr + d[-1].c_count) == paddr && 4500 d[-1].c_count + count <= DCB_MAX_REQCOUNT) { 4501 d[-1].c_count += count; 4502 return dv->dv_cnt - dv->dv_vcnt; 4503 } 4504 4505 /* 4506 * A few chip revisions do not support 128 byte PCI bursts 4507 * correctly if the address is not word-aligned. In case 4508 * we encounter an unaligned address, we consume an extra 4509 * DCB to correct the alignment. 4510 */ 4511 do { 4512 if (dv->dv_vcnt >= dv->dv_cnt) { 4513 return SOC_E_FULL; 4514 } 4515 if (dv->dv_vcnt > 0) { /* chain off previous dcb */ 4516 d[-1].c_chain = 1; 4517 } 4518 4519 di = (uint32 *)d; 4520 di[0] = di[1] = di[2] = di[3] = di[4] = 0; 4521 di[5] = di[6] = di[7] = di[8] = di[9] = di[10] = 0; 4522 di[11] = di[12] = di[13] = di[14] = di[15] = 0; 4523 4524 d->addr = paddr; 4525 d->c_count = count; 4526 d->c_sg = 1; 4527 4528 d->c_stat = 1; 4529 d->c_purge = SOC_DMA_PURGE_GET(flags); 4530 if (SOC_DMA_HG_GET(flags)) { 4531 soc_higig_hdr_t *mh = (soc_higig_hdr_t *)hgh; 4532 if (mh->overlay1.start == SOC_HIGIG2_START) { 4533 d->mh3 = soc_ntohl(hgh[3]); 4534 } 4535 d->c_hg = 1; 4536 d->mh0 = soc_ntohl(hgh[0]); 4537 d->mh1 = soc_ntohl(hgh[1]); 4538 d->mh2 = soc_ntohl(hgh[2]); 4539 d->mh3 = soc_ntohl(hgh[3]); 4540 } 4541 4542 unaligned = 0; 4543 if (soc_feature(dv->dv_unit, soc_feature_pkt_tx_align)) { 4544 if (paddr & 0x3) { 4545 unaligned_bytes = 4 - (paddr & 0x3); 4546 unaligned_buffer = (uint8 *)addr; 4547 aligned_buffer = SOC_DV_TX_ALIGN(dv, dv->dv_vcnt); 4548 aligned_buffer[0] = unaligned_buffer[0]; 4549 aligned_buffer[1] = unaligned_buffer[1]; 4550 aligned_buffer[2] = unaligned_buffer[2]; 4551 d->addr = soc_cm_l2p(dv->dv_unit, aligned_buffer); 4552 if (count > 3) { 4553 d->c_count = unaligned_bytes; 4554 paddr += unaligned_bytes; 4555 count -= unaligned_bytes; 4556 unaligned = 1; 4557 } 4558 } 4559 } 4560 4561 dv->dv_vcnt += 1; 4562 4563 d = (dcb19_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); 4564 4565 } while (unaligned); 4566 4567 return dv->dv_cnt - dv->dv_vcnt; 4568 } 4569 4570 static int 4571 dcb19_addrx(dv_t *dv, sal_vaddr_t addr, uint32 count, uint32 flags) 4572 { 4573 dcb19_t *d; /* DCB */ 4574 uint32 *di; /* DCB integer pointer */ 4575 4576 d = (dcb19_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); 4577 4578 if (dv->dv_vcnt > 0) { /* chain off previous dcb */ 4579 d[-1].c_chain = 1; 4580 } 4581 4582 di = (uint32 *)d; 4583 di[0] = di[1] = di[2] = di[3] = di[4] = 0; 4584 di[5] = di[6] = di[7] = di[8] = di[9] = di[10] = 0; 4585 di[11] = di[12] = di[13] = di[14] = di[15] = 0; 4586 4587 if (addr) { 4588 d->addr = soc_cm_l2p(dv->dv_unit, (void *)addr); 4589 } 4590 d->c_count = count; 4591 d->c_sg = 1; 4592 4593 dv->dv_vcnt += 1; 4594 return dv->dv_cnt - dv->dv_vcnt; 4595 } 4596 4597 static uint32 4598 dcb19_intrinfo(int unit, dcb_t *dcb, int tx, uint32 *count) 4599 { 4600 dcb19_t *d = (dcb19_t *)dcb; /* DCB */ 4601 uint32 f; /* SOC_DCB_INFO_* flags */ 4602 4603 if (!d->done) { 4604 return 0; 4605 } 4606 f = SOC_DCB_INFO_DONE; 4607 if (tx) { 4608 if (!d->c_sg) { 4609 f |= SOC_DCB_INFO_PKTEND; 4610 } 4611 } else { 4612 if (d->end) { 4613 f |= SOC_DCB_INFO_PKTEND; 4614 } 4615 } 4616 *count = d->count; 4617 return f; 4618 } 4619 4620 static uint32 4621 dcb19_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg) 4622 { 4623 dcb19_t *d = (dcb19_t *)dcb; 4624 4625 COMPILER_REFERENCE(dt_mode); 4626 4627 return (ingport_is_hg ? 4628 ((d->itag_status) ? 0 : 2) : 4629 ((d->itag_status & 0x2) ? 4630 ((d->itag_status & 0x1) ? 0 : 2) : 4631 ((d->itag_status & 0x1) ? 1 : 3))); 4632 } 4633 4634 SETFUNCFIELD(19, reqcount, c_count, uint32 count, count) 4635 GETFUNCFIELD(19, reqcount, c_count) 4636 GETFUNCFIELD(19, xfercount, count) 4637 /* addr_set, addr_get, paddr_get - Same as DCB 0 */ 4638 SETFUNCFIELD(19, done, done, int val, val ? 1 : 0) 4639 GETFUNCFIELD(19, done, done) 4640 SETFUNCFIELD(19, sg, c_sg, int val, val ? 1 : 0) 4641 GETFUNCFIELD(19, sg, c_sg) 4642 SETFUNCFIELD(19, chain, c_chain, int val, val ? 1 : 0) 4643 GETFUNCFIELD(19, chain, c_chain) 4644 SETFUNCFIELD(19, reload, c_reload, int val, val ? 1 : 0) 4645 GETFUNCFIELD(19, reload, c_reload) 4646 SETFUNCERR(19, desc_intr, int) 4647 GETFUNCERR(19, desc_intr) 4648 SETFUNCERR(19, tx_l2pbm, pbmp_t) 4649 SETFUNCERR(19, tx_utpbm, pbmp_t) 4650 SETFUNCERR(19, tx_l3pbm, pbmp_t) 4651 SETFUNCERR(19, tx_crc, int) 4652 SETFUNCERR(19, tx_cos, int) 4653 SETFUNCERR(19, tx_destmod, uint32) 4654 SETFUNCERR(19, tx_destport, uint32) 4655 SETFUNCERR(19, tx_opcode, uint32) 4656 SETFUNCERR(19, tx_srcmod, uint32) 4657 SETFUNCERR(19, tx_srcport, uint32) 4658 SETFUNCERR(19, tx_prio, uint32) 4659 SETFUNCERR(19, tx_pfm, uint32) 4660 GETFUNCFIELD(19, rx_start, start) 4661 GETFUNCFIELD(19, rx_end, end) 4662 GETFUNCFIELD(19, rx_error, error) 4663 GETFUNCFIELD(19, rx_cos, cpu_cos) 4664 /* Fields extracted from MH/PBI */ 4665 GETHG2FUNCFIELD(19, rx_destmod, dst_mod) 4666 GETHG2FUNCFIELD(19, rx_destport, dst_port) 4667 GETHG2FUNCFIELD(19, rx_srcmod, src_mod) 4668 GETHG2FUNCFIELD(19, rx_srcport, src_port) 4669 GETHG2FUNCFIELD(19, rx_opcode, opcode) 4670 GETHG2FUNCFIELD(19, rx_prio, vlan_pri) /* outer_pri */ 4671 GETHG2FUNCEXPR(19, rx_mcast, ((h->ppd_overlay1.dst_mod << 8) | 4672 (h->ppd_overlay1.dst_port))) 4673 GETHG2FUNCEXPR(19, rx_vclabel, ((h->ppd_overlay1.vc_label_19_16 << 16) | 4674 (h->ppd_overlay1.vc_label_15_8 << 8) | 4675 (h->ppd_overlay1.vc_label_7_0))) 4676 GETHG2FUNCEXPR(19, rx_classtag, (h->ppd_overlay1.ppd_type != 1 ? 0 : 4677 (h->ppd_overlay2.ctag_hi << 8) | 4678 (h->ppd_overlay2.ctag_lo))) 4679 GETFUNCFIELD(19, rx_matchrule, match_rule) 4680 GETFUNCFIELD(19, rx_reason, reason) 4681 GETFUNCFIELD(19, rx_reason_hi, reason_hi) 4682 GETFUNCFIELD(19, rx_ingport, srcport) 4683 GETFUNCEXPR(19, rx_mirror, ((d->imirror) | (d->emirror))) 4684 GETFUNCFIELD(19, rx_timestamp, timestamp) 4685 GETFUNCERR(19, rx_timestamp_upper) 4686 SETFUNCFIELD(19, hg, c_hg, uint32 hg, hg) 4687 GETFUNCFIELD(19, hg, c_hg) 4688 SETFUNCFIELD(19, stat, c_stat, uint32 stat, stat) 4689 GETFUNCFIELD(19, stat, c_stat) 4690 SETFUNCFIELD(19, purge, c_purge, uint32 purge, purge) 4691 GETFUNCFIELD(19, purge, c_purge) 4692 GETPTREXPR(19, mhp, &(d->mh0)) 4693 GETFUNCFIELD(19, outer_vid, outer_vid) 4694 GETFUNCFIELD(19, outer_pri, outer_pri) 4695 GETFUNCFIELD(19, outer_cfi, outer_cfi) 4696 GETFUNCFIELD(19, rx_outer_tag_action, otag_action) 4697 GETFUNCFIELD(19, inner_vid, inner_vid) 4698 GETFUNCFIELD(19, inner_pri, inner_pri) 4699 GETFUNCFIELD(19, inner_cfi, inner_cfi) 4700 GETFUNCFIELD(19, rx_inner_tag_action, itag_action) 4701 GETFUNCFIELD(19, rx_bpdu, bpdu) 4702 GETFUNCEXPR(19, rx_l3_intf, ((d->replicated) ? (d->l3_intf) : 4703 (((d->l3_intf) & 0x3fff) + 4704 _SHR_L3_EGRESS_IDX_MIN))) 4705 GETFUNCNULL(19, rx_decap_tunnel) 4706 GETFUNCNULL(19, rx_switch_drop) 4707 GETFUNCNULL(19, olp_encap_oam_pkt) 4708 GETFUNCNULL(19, read_ecc_error) 4709 GETFUNCNULL(19, desc_remaining) 4710 SETFUNCNULL(19, desc_remaining) 4711 GETFUNCNULL(19, desc_status) 4712 SETFUNCNULL(19, desc_status) 4713 GETFUNCNULL(19, match_id_lo) 4714 GETFUNCNULL(19, match_id_hi) 4715 GETFUNCNULL(19, forwarding_type) 4716 GETFUNCNULL(19, forwarding_zone_id) 4717 4718 #ifdef BROADCOM_DEBUG 4719 GETFUNCERR(19, tx_l2pbm) 4720 GETFUNCERR(19, tx_utpbm) 4721 GETFUNCERR(19, tx_l3pbm) 4722 GETFUNCERR(19, tx_crc) 4723 GETFUNCERR(19, tx_cos) 4724 GETFUNCERR(19, tx_destmod) 4725 GETFUNCERR(19, tx_destport) 4726 GETFUNCERR(19, tx_opcode) 4727 GETFUNCERR(19, tx_srcmod) 4728 GETFUNCERR(19, tx_srcport) 4729 GETFUNCERR(19, tx_prio) 4730 GETFUNCERR(19, tx_pfm) 4731 #endif /* BROADCOM_DEBUG */ 4732 4733 static uint32 dcb19_rx_crc_get(dcb_t *dcb) { 4734 return 0; 4735 } 4736 4737 #ifdef PLISIM /* these routines are only used by pcid */ 4738 static void dcb19_status_init(dcb_t *dcb) 4739 { 4740 uint32 *d = (uint32 *)dcb; 4741 4742 d[5] = d[6] = d[7] = d[8] = d[9] = d[10] = 0; 4743 d[11] = d[12] = d[13] = d[14] = d[15] = 0; 4744 } 4745 SETFUNCFIELD(19, xfercount, count, uint32 count, count) 4746 SETFUNCFIELD(19, rx_start, start, int val, val ? 1 : 0) 4747 SETFUNCFIELD(19, rx_end, end, int val, val ? 1 : 0) 4748 SETFUNCFIELD(19, rx_error, error, int val, val ? 1 : 0) 4749 SETFUNCEXPRIGNORE(19, rx_crc, int val, ignore) 4750 SETFUNCFIELD(19, rx_ingport, srcport, int val, val) 4751 #endif /* PLISIM */ 4752 4753 #ifdef BROADCOM_DEBUG 4754 static void 4755 dcb19_dump(int unit, dcb_t *dcb, char *prefix, int tx) 4756 { 4757 uint32 *p; 4758 int i, size; 4759 dcb19_t *d = (dcb19_t *)dcb; 4760 char ps[((DCB_MAX_SIZE/sizeof(uint32))*9)+1]; 4761 #if defined(LE_HOST) 4762 uint32 hgh[4]; 4763 uint8 *h = (uint8 *)&hgh[0]; 4764 4765 hgh[0] = soc_htonl(d->mh0); 4766 hgh[1] = soc_htonl(d->mh1); 4767 hgh[2] = soc_htonl(d->mh2); 4768 hgh[3] = soc_htonl(d->mh3); 4769 #else 4770 uint8 *h = (uint8 *)&d->mh0; 4771 #endif 4772 4773 p = (uint32 *)dcb; 4774 size = SOC_DCB_SIZE(unit) / sizeof(uint32); 4775 for (i = 0; i < size; i++) { 4776 sal_sprintf(&ps[i*9], "%08x ", p[i]); 4777 } 4778 LOG_CLI((BSL_META_U(unit, 4779 "%s\t%s\n"), prefix, ps)); 4780 if ((SOC_DCB_HG_GET(unit, dcb)) || (SOC_DCB_RX_START_GET(unit, dcb))) { 4781 soc_dma_higig_dump(unit, prefix, h, 0, 0, NULL); 4782 } 4783 LOG_CLI((BSL_META_U(unit, 4784 "%s\ttype %d %ssg %schain %sreload %shg %sstat %spause %spurge\n"), 4785 prefix, 4786 SOC_DCB_TYPE(unit), 4787 SOC_DCB_SG_GET(unit, dcb) ? "" : "!", 4788 SOC_DCB_CHAIN_GET(unit, dcb) ? "" : "!", 4789 SOC_DCB_RELOAD_GET(unit, dcb) ? "" : "!", 4790 SOC_DCB_HG_GET(unit, dcb) ? "" : "!", 4791 SOC_DCB_STAT_GET(unit, dcb) ? "" : "!", 4792 d->c_pause ? "" : "!", 4793 SOC_DCB_PURGE_GET(unit, dcb) ? "" : "!")); 4794 LOG_CLI((BSL_META_U(unit, 4795 "%s\taddr %p reqcount %d xfercount %d\n"), 4796 prefix, 4797 (void *)SOC_DCB_ADDR_GET(unit, dcb), 4798 SOC_DCB_REQCOUNT_GET(unit, dcb), 4799 SOC_DCB_XFERCOUNT_GET(unit, dcb))); 4800 if (!tx) { 4801 LOG_CLI((BSL_META_U(unit, 4802 "%s\t%sdone %sstart %send %serror\n"), 4803 prefix, 4804 SOC_DCB_DONE_GET(unit, dcb) ? "" : "!", 4805 SOC_DCB_RX_START_GET(unit, dcb) ? "" : "!", 4806 SOC_DCB_RX_END_GET(unit, dcb) ? "" : "!", 4807 SOC_DCB_RX_ERROR_GET(unit, dcb) ? "" : "!")); 4808 } 4809 if ((!tx) && (SOC_DCB_RX_START_GET(unit, dcb))) { 4810 dcb0_reason_dump(unit, dcb, prefix); 4811 LOG_CLI((BSL_META_U(unit, 4812 "%s %sdo_not_change_ttl %sbpdu %sl3routed %schg_tos %semirror %simirror\n"), 4813 prefix, 4814 d->do_not_change_ttl ? "" : "!", 4815 d->bpdu ? "" : "!", 4816 d->l3routed ? "" : "!", 4817 d->chg_tos ? "" : "!", 4818 d->emirror ? "" : "!", 4819 d->imirror ? "" : "!" 4820 )); 4821 LOG_CLI((BSL_META_U(unit, 4822 "%s %sreplicated %sl3only %soam_pkt %segr_cpu_copy %strue_egr_mirror %ssrc_hg\n"), 4823 prefix, 4824 d->replicated ? "" : "!", 4825 d->l3only ? "" : "!", 4826 d->oam_pkt ? "" : "!", 4827 d->egr_cpu_copy ? "" : "!", 4828 d->true_egr_mirror ? "" : "!", 4829 d->src_hg ? "" : "!" 4830 )); 4831 LOG_CLI((BSL_META_U(unit, 4832 "%s %sswitch_pkt %sregen_crc %sservice_tag %sing_untagged\n"), 4833 prefix, 4834 d->switch_pkt ? "" : "!", 4835 d->regen_crc ? "" : "!", 4836 d->service_tag ? "" : "!", 4837 !(((soc_higig2_hdr_t *)h)->ppd_overlay1.ingress_tagged) ? "" : "!" 4838 )); 4839 LOG_CLI((BSL_META_U(unit, 4840 "%s cpu_cos=%d cos=%d l3_intf=%d mtp_index=%d reason=%08x_%08x\n"), 4841 prefix, 4842 d->cpu_cos, 4843 d->cos, 4844 d->l3_intf, 4845 d->mtp_index, 4846 d->reason_hi, 4847 d->reason 4848 )); 4849 LOG_CLI((BSL_META_U(unit, 4850 "%s match_rule=%d hg_type=%d mtp_index=%d decap_tunnel_type=%d\n"), 4851 prefix, 4852 d->match_rule, 4853 d->hg_type, 4854 d->mtp_index, 4855 d->decap_tunnel_type 4856 )); 4857 LOG_CLI((BSL_META_U(unit, 4858 "%s srcport=%d dscp=%d outer_pri=%d outer_cfi=%d outer_vid=%d\n"), 4859 prefix, 4860 d->srcport, 4861 d->dscp, 4862 d->outer_pri, 4863 d->outer_cfi, 4864 d->outer_vid 4865 )); 4866 LOG_CLI((BSL_META_U(unit, 4867 "%s orig_dstport=%d inner_pri=%d inner_cfi=%d inner_vid=%d\n"), 4868 prefix, 4869 d->orig_dstport, 4870 d->inner_pri, 4871 d->inner_cfi, 4872 d->inner_vid 4873 )); 4874 LOG_CLI((BSL_META_U(unit, 4875 "%s hgi=%d itag_status=%d otag_action=%d itag_action=%d\n"), 4876 prefix, 4877 d->hgi, 4878 d->itag_status, 4879 d->otag_action, 4880 d->itag_action 4881 )); 4882 } 4883 } 4884 #endif /* BROADCOM_DEBUG */ 4885 4886 dcb_op_t dcb19_op = { 4887 19, 4888 sizeof(dcb19_t), 4889 dcb19_rx_reason_maps, 4890 dcb19_rx_reason_map_get, 4891 dcb0_rx_reasons_get, 4892 dcb19_init, 4893 dcb19_addtx, 4894 dcb19_addrx, 4895 dcb19_intrinfo, 4896 dcb19_reqcount_set, 4897 dcb19_reqcount_get, 4898 dcb19_xfercount_get, 4899 dcb0_addr_set, 4900 dcb0_addr_get, 4901 dcb0_paddr_get, 4902 dcb19_done_set, 4903 dcb19_done_get, 4904 dcb19_sg_set, 4905 dcb19_sg_get, 4906 dcb19_chain_set, 4907 dcb19_chain_get, 4908 dcb19_reload_set, 4909 dcb19_reload_get, 4910 dcb19_desc_intr_set, 4911 dcb19_desc_intr_get, 4912 dcb19_tx_l2pbm_set, 4913 dcb19_tx_utpbm_set, 4914 dcb19_tx_l3pbm_set, 4915 dcb19_tx_crc_set, 4916 dcb19_tx_cos_set, 4917 dcb19_tx_destmod_set, 4918 dcb19_tx_destport_set, 4919 dcb19_tx_opcode_set, 4920 dcb19_tx_srcmod_set, 4921 dcb19_tx_srcport_set, 4922 dcb19_tx_prio_set, 4923 dcb19_tx_pfm_set, 4924 dcb19_rx_untagged_get, 4925 dcb19_rx_crc_get, 4926 dcb19_rx_cos_get, 4927 dcb19_rx_destmod_get, 4928 dcb19_rx_destport_get, 4929 dcb19_rx_opcode_get, 4930 dcb19_rx_classtag_get, 4931 dcb19_rx_matchrule_get, 4932 dcb19_rx_start_get, 4933 dcb19_rx_end_get, 4934 dcb19_rx_error_get, 4935 dcb19_rx_prio_get, 4936 dcb19_rx_reason_get, 4937 dcb19_rx_reason_hi_get, 4938 dcb19_rx_ingport_get, 4939 dcb19_rx_srcport_get, 4940 dcb19_rx_srcmod_get, 4941 dcb19_rx_mcast_get, 4942 dcb19_rx_vclabel_get, 4943 dcb19_rx_mirror_get, 4944 dcb19_rx_timestamp_get, 4945 dcb19_rx_timestamp_upper_get, 4946 dcb19_hg_set, 4947 dcb19_hg_get, 4948 dcb19_stat_set, 4949 dcb19_stat_get, 4950 dcb19_purge_set, 4951 dcb19_purge_get, 4952 dcb19_mhp_get, 4953 dcb19_outer_vid_get, 4954 dcb19_outer_pri_get, 4955 dcb19_outer_cfi_get, 4956 dcb19_rx_outer_tag_action_get, 4957 dcb19_inner_vid_get, 4958 dcb19_inner_pri_get, 4959 dcb19_inner_cfi_get, 4960 dcb19_rx_inner_tag_action_get, 4961 dcb19_rx_bpdu_get, 4962 dcb19_rx_l3_intf_get, 4963 dcb19_rx_decap_tunnel_get, 4964 dcb19_rx_switch_drop_get, 4965 dcb19_olp_encap_oam_pkt_get, 4966 dcb19_read_ecc_error_get, 4967 dcb19_desc_remaining_get, 4968 dcb19_desc_remaining_set, 4969 dcb19_desc_status_get, 4970 dcb19_desc_status_set, 4971 dcb19_match_id_lo_get, 4972 dcb19_match_id_hi_get, 4973 dcb19_forwarding_type_get, 4974 dcb19_forwarding_zone_id_get, 4975 #ifdef BROADCOM_DEBUG 4976 dcb19_tx_l2pbm_get, 4977 dcb19_tx_utpbm_get, 4978 dcb19_tx_l3pbm_get, 4979 dcb19_tx_crc_get, 4980 dcb19_tx_cos_get, 4981 dcb19_tx_destmod_get, 4982 dcb19_tx_destport_get, 4983 dcb19_tx_opcode_get, 4984 dcb19_tx_srcmod_get, 4985 dcb19_tx_srcport_get, 4986 dcb19_tx_prio_get, 4987 dcb19_tx_pfm_get, 4988 4989 dcb19_dump, 4990 dcb0_reason_dump, 4991 #endif /* BROADCOM_DEBUG */ 4992 #ifdef PLISIM 4993 dcb19_status_init, 4994 dcb19_xfercount_set, 4995 dcb19_rx_start_set, 4996 dcb19_rx_end_set, 4997 dcb19_rx_error_set, 4998 dcb19_rx_crc_set, 4999 dcb19_rx_ingport_set, 5000 #endif /* PLISIM */ 5001 NULL, 5002 }; 5003 #endif /* BCM_TRIUMPH2_SUPPORT || BCM_SHADOW_SUPPORT */ 5004 5005 #if defined(BCM_ENDURO_SUPPORT) || defined(BCM_HURRICANE_SUPPORT) 5006 /* 5007 * DCB Type 20 Support 5008 */ 5009 5010 static soc_rx_reason_t 5011 dcb20_rx_reason_map[] = { 5012 socRxReasonUnknownVlan, /* Offset 0 */ 5013 socRxReasonL2SourceMiss, /* Offset 1 */ 5014 socRxReasonL2DestMiss, /* Offset 2 */ 5015 socRxReasonL2Move, /* Offset 3 */ 5016 socRxReasonL2Cpu, /* Offset 4 */ 5017 socRxReasonSampleSource, /* Offset 5 */ 5018 socRxReasonSampleDest, /* Offset 6 */ 5019 socRxReasonL3SourceMiss, /* Offset 7 */ 5020 socRxReasonL3DestMiss, /* Offset 8 */ 5021 socRxReasonL3SourceMove, /* Offset 9 */ 5022 socRxReasonMcastMiss, /* Offset 10 */ 5023 socRxReasonIpMcastMiss, /* Offset 11 */ 5024 socRxReasonFilterMatch, /* Offset 12 */ 5025 socRxReasonL3HeaderError, /* Offset 13 */ 5026 socRxReasonProtocol, /* Offset 14 */ 5027 socRxReasonDosAttack, /* Offset 15 */ 5028 socRxReasonMartianAddr, /* Offset 16 */ 5029 socRxReasonTunnelError, /* Offset 17 */ 5030 socRxReasonL2MtuFail, /* Offset 18 */ 5031 socRxReasonIcmpRedirect, /* Offset 19 */ 5032 socRxReasonL3Slowpath, /* Offset 20 */ 5033 socRxReasonParityError, /* Offset 21 */ 5034 socRxReasonL3MtuFail, /* Offset 22 */ 5035 socRxReasonHigigHdrError, /* Offset 23 */ 5036 socRxReasonMcastIdxError, /* Offset 24 */ 5037 socRxReasonVlanFilterMatch, /* Offset 25 */ 5038 socRxReasonClassBasedMove, /* Offset 26 */ 5039 socRxReasonL2LearnLimit, /* Offset 27 */ 5040 socRxReasonMplsLabelMiss, /* Offset 28 */ 5041 socRxReasonMplsInvalidAction, /* Offset 29 */ 5042 socRxReasonMplsInvalidPayload, /* Offset 30 */ 5043 socRxReasonMplsTtl, /* Offset 31 */ 5044 socRxReasonMplsSequenceNumber, /* Offset 32 */ 5045 socRxReasonL2NonUnicastMiss, /* Offset 33 */ 5046 socRxReasonNhop, /* Offset 34 */ 5047 socRxReasonMplsCtrlWordError, /* Offset 35 */ 5048 socRxReasonTimeSync, /* Offset 36 */ 5049 socRxReasonOAMSlowpath, /* Offset 37 */ 5050 socRxReasonOAMError, /* Offset 38 */ 5051 socRxReasonOAMLMDM, /* Offset 39 */ 5052 socRxReasonInvalid, /* Offset 40 */ 5053 socRxReasonInvalid, /* Offset 41 */ 5054 socRxReasonInvalid, /* Offset 42 */ 5055 socRxReasonInvalid, /* Offset 43 */ 5056 socRxReasonInvalid, /* Offset 44 */ 5057 socRxReasonInvalid, /* Offset 45 */ 5058 socRxReasonInvalid, /* Offset 46 */ 5059 socRxReasonInvalid, /* Offset 47 */ 5060 socRxReasonInvalid, /* Offset 48 */ 5061 socRxReasonInvalid, /* Offset 49 */ 5062 socRxReasonInvalid, /* Offset 50 */ 5063 socRxReasonInvalid, /* Offset 51 */ 5064 socRxReasonInvalid, /* Offset 52 */ 5065 socRxReasonInvalid, /* Offset 53 */ 5066 socRxReasonInvalid, /* Offset 54 */ 5067 socRxReasonInvalid, /* Offset 55 */ 5068 socRxReasonInvalid, /* Offset 56 */ 5069 socRxReasonInvalid, /* Offset 57 */ 5070 socRxReasonInvalid, /* Offset 58 */ 5071 socRxReasonInvalid, /* Offset 59 */ 5072 socRxReasonInvalid, /* Offset 60 */ 5073 socRxReasonInvalid, /* Offset 61 */ 5074 socRxReasonInvalid, /* Offset 62 */ 5075 socRxReasonInvalid /* Offset 63 */ 5076 }; 5077 5078 static soc_rx_reason_t *dcb20_rx_reason_maps[] = { 5079 dcb20_rx_reason_map, 5080 NULL 5081 }; 5082 5083 5084 #ifdef BROADCOM_DEBUG 5085 static void 5086 dcb20_dump(int unit, dcb_t *dcb, char *prefix, int tx) 5087 { 5088 uint32 *p; 5089 int i, size; 5090 dcb20_t *d = (dcb20_t *)dcb; 5091 char ps[((DCB_MAX_SIZE/sizeof(uint32))*9)+1]; 5092 #if defined(LE_HOST) 5093 uint32 hgh[4]; 5094 uint8 *h = (uint8 *)&hgh[0]; 5095 5096 hgh[0] = soc_htonl(d->mh0); 5097 hgh[1] = soc_htonl(d->mh1); 5098 hgh[2] = soc_htonl(d->mh2); 5099 hgh[3] = soc_htonl(d->mh3); 5100 #else 5101 uint8 *h = (uint8 *)&d->mh0; 5102 #endif 5103 5104 p = (uint32 *)dcb; 5105 size = SOC_DCB_SIZE(unit) / sizeof(uint32); 5106 for (i = 0; i < size; i++) { 5107 sal_sprintf(&ps[i*9], "%08x ", p[i]); 5108 } 5109 LOG_CLI((BSL_META_U(unit, 5110 "%s\t%s\n"), prefix, ps)); 5111 if ((SOC_DCB_HG_GET(unit, dcb)) || (SOC_DCB_RX_START_GET(unit, dcb))) { 5112 soc_dma_higig_dump(unit, prefix, h, 0, 0, NULL); 5113 } 5114 LOG_CLI((BSL_META_U(unit, 5115 "%s\ttype %d %ssg %schain %sreload %shg %sstat %spause %spurge\n"), 5116 prefix, 5117 SOC_DCB_TYPE(unit), 5118 SOC_DCB_SG_GET(unit, dcb) ? "" : "!", 5119 SOC_DCB_CHAIN_GET(unit, dcb) ? "" : "!", 5120 SOC_DCB_RELOAD_GET(unit, dcb) ? "" : "!", 5121 SOC_DCB_HG_GET(unit, dcb) ? "" : "!", 5122 SOC_DCB_STAT_GET(unit, dcb) ? "" : "!", 5123 d->c_pause ? "" : "!", 5124 SOC_DCB_PURGE_GET(unit, dcb) ? "" : "!")); 5125 LOG_CLI((BSL_META_U(unit, 5126 "%s\taddr %p reqcount %d xfercount %d\n"), 5127 prefix, 5128 (void *)SOC_DCB_ADDR_GET(unit, dcb), 5129 SOC_DCB_REQCOUNT_GET(unit, dcb), 5130 SOC_DCB_XFERCOUNT_GET(unit, dcb))); 5131 if (!tx) { 5132 LOG_CLI((BSL_META_U(unit, 5133 "%s\t%sdone %sstart %send %serror\n"), 5134 prefix, 5135 SOC_DCB_DONE_GET(unit, dcb) ? "" : "!", 5136 SOC_DCB_RX_START_GET(unit, dcb) ? "" : "!", 5137 SOC_DCB_RX_END_GET(unit, dcb) ? "" : "!", 5138 SOC_DCB_RX_ERROR_GET(unit, dcb) ? "" : "!")); 5139 } 5140 if ((!tx) && (SOC_DCB_RX_START_GET(unit, dcb))) { 5141 dcb0_reason_dump(unit, dcb, prefix); 5142 LOG_CLI((BSL_META_U(unit, 5143 "%s %sdo_not_change_ttl %sbpdu %sl3routed %schg_tos %semirror %simirror\n"), 5144 prefix, 5145 d->do_not_change_ttl ? "" : "!", 5146 d->bpdu ? "" : "!", 5147 d->l3routed ? "" : "!", 5148 d->chg_tos ? "" : "!", 5149 d->emirror ? "" : "!", 5150 d->imirror ? "" : "!" 5151 )); 5152 LOG_CLI((BSL_META_U(unit, 5153 "%s %sreplicated %sl3only %ssrc_hg im_mtp_index=%d em_mtp_index=%d\n"), 5154 prefix, 5155 d->replicated ? "" : "!", 5156 d->l3only ? "" : "!", 5157 d->src_hg ? "" : "!", 5158 d->im_mtp_index, 5159 d->em_mtp_index 5160 )); 5161 LOG_CLI((BSL_META_U(unit, 5162 "%s %sswitch_pkt %sregen_crc %sservice_tag %sing_untagged\n"), 5163 prefix, 5164 d->switch_pkt ? "" : "!", 5165 d->regen_crc ? "" : "!", 5166 d->service_tag ? "" : "!", 5167 !(((soc_higig2_hdr_t *)h)->ppd_overlay1.ingress_tagged) ? "" : "!" 5168 )); 5169 LOG_CLI((BSL_META_U(unit, 5170 "%s cpu_cos=%d cos=%d l3_intf=%d reason=%08x_%08x\n"), 5171 prefix, 5172 d->cpu_cos, 5173 d->cos, 5174 d->nhop_index, 5175 d->reason_hi, 5176 d->reason 5177 )); 5178 LOG_CLI((BSL_META_U(unit, 5179 "%s match_rule=%d hg_type=%d decap_tunnel_type=%d\n"), 5180 prefix, 5181 d->match_rule, 5182 d->hg_type, 5183 d->decap_tunnel_type 5184 )); 5185 LOG_CLI((BSL_META_U(unit, 5186 "%s srcport=%d dscp=%d outer_pri=%d outer_cfi=%d outer_vid=%d\n"), 5187 prefix, 5188 d->srcport, 5189 d->dscp, 5190 d->outer_pri, 5191 d->outer_cfi, 5192 d->outer_vid 5193 )); 5194 LOG_CLI((BSL_META_U(unit, 5195 "%s inner_pri=%d inner_cfi=%d inner_vid=%d\n"), 5196 prefix, 5197 d->inner_pri, 5198 d->inner_cfi, 5199 d->inner_vid 5200 )); 5201 LOG_CLI((BSL_META_U(unit, 5202 "%s hgi=%d itag_status=%d otag_action=%d itag_action=%d\n"), 5203 prefix, 5204 d->hgi, 5205 d->itag_status, 5206 d->otag_action, 5207 d->itag_action 5208 )); 5209 } 5210 } 5211 #endif /* BROADCOM_DEBUG */ 5212 5213 GETFUNCFIELD(20, rx_matchrule, match_rule) 5214 GETFUNCFIELD(20, rx_timestamp, timestamp) 5215 GETFUNCFIELD(20, rx_timestamp_upper, timestamp_upper) 5216 GETFUNCNULL(20, rx_switch_drop) 5217 GETFUNCNULL(20, olp_encap_oam_pkt) 5218 GETFUNCNULL(20, read_ecc_error) 5219 GETFUNCNULL(20, desc_remaining) 5220 SETFUNCNULL(20, desc_remaining) 5221 GETFUNCNULL(20, desc_status) 5222 SETFUNCNULL(20, desc_status) 5223 GETFUNCNULL(20, match_id_lo) 5224 GETFUNCNULL(20, match_id_hi) 5225 GETFUNCNULL(20, forwarding_type) 5226 GETFUNCNULL(20, forwarding_zone_id) 5227 5228 dcb_op_t dcb20_op = { 5229 20, 5230 sizeof(dcb20_t), 5231 dcb20_rx_reason_maps, 5232 dcb0_rx_reason_map_get, 5233 dcb0_rx_reasons_get, 5234 dcb19_init, 5235 dcb19_addtx, 5236 dcb19_addrx, 5237 dcb19_intrinfo, 5238 dcb19_reqcount_set, 5239 dcb19_reqcount_get, 5240 dcb19_xfercount_get, 5241 dcb0_addr_set, 5242 dcb0_addr_get, 5243 dcb0_paddr_get, 5244 dcb19_done_set, 5245 dcb19_done_get, 5246 dcb19_sg_set, 5247 dcb19_sg_get, 5248 dcb19_chain_set, 5249 dcb19_chain_get, 5250 dcb19_reload_set, 5251 dcb19_reload_get, 5252 dcb19_desc_intr_set, 5253 dcb19_desc_intr_get, 5254 dcb19_tx_l2pbm_set, 5255 dcb19_tx_utpbm_set, 5256 dcb19_tx_l3pbm_set, 5257 dcb19_tx_crc_set, 5258 dcb19_tx_cos_set, 5259 dcb19_tx_destmod_set, 5260 dcb19_tx_destport_set, 5261 dcb19_tx_opcode_set, 5262 dcb19_tx_srcmod_set, 5263 dcb19_tx_srcport_set, 5264 dcb19_tx_prio_set, 5265 dcb19_tx_pfm_set, 5266 dcb19_rx_untagged_get, 5267 dcb19_rx_crc_get, 5268 dcb19_rx_cos_get, 5269 dcb19_rx_destmod_get, 5270 dcb19_rx_destport_get, 5271 dcb19_rx_opcode_get, 5272 dcb19_rx_classtag_get, 5273 dcb20_rx_matchrule_get, 5274 dcb19_rx_start_get, 5275 dcb19_rx_end_get, 5276 dcb19_rx_error_get, 5277 dcb19_rx_prio_get, 5278 dcb19_rx_reason_get, 5279 dcb19_rx_reason_hi_get, 5280 dcb19_rx_ingport_get, 5281 dcb19_rx_srcport_get, 5282 dcb19_rx_srcmod_get, 5283 dcb19_rx_mcast_get, 5284 dcb19_rx_vclabel_get, 5285 dcb19_rx_mirror_get, 5286 dcb20_rx_timestamp_get, 5287 dcb20_rx_timestamp_upper_get, 5288 dcb19_hg_set, 5289 dcb19_hg_get, 5290 dcb19_stat_set, 5291 dcb19_stat_get, 5292 dcb19_purge_set, 5293 dcb19_purge_get, 5294 dcb19_mhp_get, 5295 dcb19_outer_vid_get, 5296 dcb19_outer_pri_get, 5297 dcb19_outer_cfi_get, 5298 dcb19_rx_outer_tag_action_get, 5299 dcb19_inner_vid_get, 5300 dcb19_inner_pri_get, 5301 dcb19_inner_cfi_get, 5302 dcb19_rx_inner_tag_action_get, 5303 dcb19_rx_bpdu_get, 5304 dcb9_rx_l3_intf_get, 5305 dcb19_rx_decap_tunnel_get, 5306 dcb20_rx_switch_drop_get, 5307 dcb20_olp_encap_oam_pkt_get, 5308 dcb20_read_ecc_error_get, 5309 dcb20_desc_remaining_get, 5310 dcb20_desc_remaining_set, 5311 dcb20_desc_status_get, 5312 dcb20_desc_status_set, 5313 dcb20_match_id_lo_get, 5314 dcb20_match_id_hi_get, 5315 dcb20_forwarding_type_get, 5316 dcb20_forwarding_zone_id_get, 5317 #ifdef BROADCOM_DEBUG 5318 dcb19_tx_l2pbm_get, 5319 dcb19_tx_utpbm_get, 5320 dcb19_tx_l3pbm_get, 5321 dcb19_tx_crc_get, 5322 dcb19_tx_cos_get, 5323 dcb19_tx_destmod_get, 5324 dcb19_tx_destport_get, 5325 dcb19_tx_opcode_get, 5326 dcb19_tx_srcmod_get, 5327 dcb19_tx_srcport_get, 5328 dcb19_tx_prio_get, 5329 dcb19_tx_pfm_get, 5330 5331 dcb20_dump, 5332 dcb0_reason_dump, 5333 #endif /* BROADCOM_DEBUG */ 5334 #ifdef PLISIM 5335 dcb19_status_init, 5336 dcb19_xfercount_set, 5337 dcb19_rx_start_set, 5338 dcb19_rx_end_set, 5339 dcb19_rx_error_set, 5340 dcb19_rx_crc_set, 5341 dcb19_rx_ingport_set, 5342 #endif /* PLISIM */ 5343 NULL, 5344 }; 5345 #endif /* BCM_ENDURO_SUPPORT || BCM_HURRICANE_SUPPORT */ 5346 5347 #if defined(BCM_TRIDENT_SUPPORT) 5348 /* 5349 * DCB Type 21 Support 5350 */ 5351 5352 static soc_rx_reason_t 5353 dcb21_rx_reason_map[] = { 5354 socRxReasonUnknownVlan, /* Offset 0 */ 5355 socRxReasonL2SourceMiss, /* Offset 1 */ 5356 socRxReasonL2DestMiss, /* Offset 2 */ 5357 socRxReasonL2Move, /* Offset 3 */ 5358 socRxReasonL2Cpu, /* Offset 4 */ 5359 socRxReasonSampleSource, /* Offset 5 */ 5360 socRxReasonSampleDest, /* Offset 6 */ 5361 socRxReasonL3SourceMiss, /* Offset 7 */ 5362 socRxReasonL3DestMiss, /* Offset 8 */ 5363 socRxReasonL3SourceMove, /* Offset 9 */ 5364 socRxReasonMcastMiss, /* Offset 10 */ 5365 socRxReasonIpMcastMiss, /* Offset 11 */ 5366 socRxReasonFilterMatch, /* Offset 12 */ 5367 socRxReasonL3HeaderError, /* Offset 13 */ 5368 socRxReasonProtocol, /* Offset 14 */ 5369 socRxReasonDosAttack, /* Offset 15 */ 5370 socRxReasonMartianAddr, /* Offset 16 */ 5371 socRxReasonTunnelError, /* Offset 17 */ 5372 socRxReasonMirror, /* Offset 18 */ 5373 socRxReasonIcmpRedirect, /* Offset 19 */ 5374 socRxReasonL3Slowpath, /* Offset 20 */ 5375 socRxReasonParityError, /* Offset 21 */ 5376 socRxReasonL3MtuFail, /* Offset 22 */ 5377 socRxReasonHigigHdrError, /* Offset 23 */ 5378 socRxReasonMcastIdxError, /* Offset 24 */ 5379 socRxReasonVlanFilterMatch, /* Offset 25 */ 5380 socRxReasonClassBasedMove, /* Offset 26 */ 5381 socRxReasonL3AddrBindFail, /* Offset 27 */ 5382 socRxReasonMplsLabelMiss, /* Offset 28 */ 5383 socRxReasonMplsInvalidAction, /* Offset 29 */ 5384 socRxReasonMplsInvalidPayload, /* Offset 30 */ 5385 socRxReasonMplsTtl, /* Offset 31 */ 5386 socRxReasonMplsSequenceNumber, /* Offset 32 */ 5387 socRxReasonL2NonUnicastMiss, /* Offset 33 */ 5388 socRxReasonNhop, /* Offset 34 */ 5389 socRxReasonMplsCtrlWordError, /* Offset 35 */ 5390 socRxReasonStation, /* Offset 36 */ 5391 socRxReasonNiv, /* Offset 37 */ 5392 socRxReasonNiv, /* Offset 38 */ 5393 socRxReasonNiv, /* Offset 39 */ 5394 socRxReasonEncapHigigError, /* Offset 40 */ 5395 socRxReasonTimeSync, /* Offset 41 */ 5396 socRxReasonOAMSlowpath, /* Offset 42 */ 5397 socRxReasonOAMError, /* Offset 43 */ 5398 socRxReasonTrill, /* Offset 44 */ 5399 socRxReasonTrill, /* Offset 45 */ 5400 socRxReasonTrill, /* Offset 46 */ 5401 socRxReasonInvalid, /* Offset 47 */ 5402 socRxReasonInvalid, /* Offset 48 */ 5403 socRxReasonInvalid, /* Offset 49 */ 5404 socRxReasonInvalid, /* Offset 50 */ 5405 socRxReasonInvalid, /* Offset 51 */ 5406 socRxReasonInvalid, /* Offset 52 */ 5407 socRxReasonInvalid, /* Offset 53 */ 5408 socRxReasonInvalid, /* Offset 54 */ 5409 socRxReasonInvalid, /* Offset 55 */ 5410 socRxReasonInvalid, /* Offset 56 */ 5411 socRxReasonInvalid, /* Offset 57 */ 5412 socRxReasonInvalid, /* Offset 58 */ 5413 socRxReasonInvalid, /* Offset 59 */ 5414 socRxReasonInvalid, /* Offset 60 */ 5415 socRxReasonInvalid, /* Offset 61 */ 5416 socRxReasonInvalid, /* Offset 62 */ 5417 socRxReasonInvalid /* Offset 63 */ 5418 }; 5419 /* From FORMAT NIV_CPU_OPCODE_ENCODING */ 5420 static soc_rx_reason_t dcb21_rx_reason_niv_encoding_map[] = { 5421 socRxReasonNiv, /* 0: NO_ERRORS 5422 * Base field, must match the entries above */ 5423 socRxReasonNivPrioDrop, /* 1:DOT1P_ADMITTANCE_DISCARD */ 5424 socRxReasonNivInterfaceMiss, /* 2:VIF_LOOKUP_MISS */ 5425 socRxReasonNivRpfFail, /* 3:RPF_LOOKUP_MISS */ 5426 socRxReasonNivTagInvalid, /* 4:VNTAG_FORMAT_ERROR */ 5427 socRxReasonNivTagDrop, /* 5:VNTAG_PRESENT_DROP */ 5428 socRxReasonNivUntagDrop, /* 6:VNTAG_NOT_PRESENT_DROP */ 5429 socRxReasonInvalid, /* Offset 7 */ 5430 socRxReasonInvalid, /* Offset 8 */ 5431 socRxReasonInvalid, /* Offset 9 */ 5432 socRxReasonInvalid, /* Offset 10 */ 5433 socRxReasonInvalid, /* Offset 11 */ 5434 socRxReasonInvalid, /* Offset 12 */ 5435 socRxReasonInvalid, /* Offset 13 */ 5436 socRxReasonInvalid, /* Offset 14 */ 5437 socRxReasonInvalid, /* Offset 15 */ 5438 socRxReasonInvalid, /* Offset 16 */ 5439 socRxReasonInvalid, /* Offset 17 */ 5440 socRxReasonInvalid, /* Offset 18 */ 5441 socRxReasonInvalid, /* Offset 19 */ 5442 socRxReasonInvalid, /* Offset 20 */ 5443 socRxReasonInvalid, /* Offset 21 */ 5444 socRxReasonInvalid, /* Offset 22 */ 5445 socRxReasonInvalid, /* Offset 23 */ 5446 socRxReasonInvalid, /* Offset 24 */ 5447 socRxReasonInvalid, /* Offset 25 */ 5448 socRxReasonInvalid, /* Offset 26 */ 5449 socRxReasonInvalid, /* Offset 27 */ 5450 socRxReasonInvalid, /* Offset 28 */ 5451 socRxReasonInvalid, /* Offset 29 */ 5452 socRxReasonInvalid, /* Offset 30 */ 5453 socRxReasonInvalid, /* Offset 31 */ 5454 socRxReasonInvalid, /* Offset 32 */ 5455 socRxReasonInvalid, /* Offset 33 */ 5456 socRxReasonInvalid, /* Offset 34 */ 5457 socRxReasonInvalid, /* Offset 35 */ 5458 socRxReasonInvalid, /* Offset 36 */ 5459 socRxReasonInvalid, /* Offset 37 */ 5460 socRxReasonInvalid, /* Offset 38 */ 5461 socRxReasonInvalid, /* Offset 39 */ 5462 socRxReasonInvalid, /* Offset 40 */ 5463 socRxReasonInvalid, /* Offset 41 */ 5464 socRxReasonInvalid, /* Offset 42 */ 5465 socRxReasonInvalid, /* Offset 43 */ 5466 socRxReasonInvalid, /* Offset 44 */ 5467 socRxReasonInvalid, /* Offset 45 */ 5468 socRxReasonInvalid, /* Offset 46 */ 5469 socRxReasonInvalid, /* Offset 47 */ 5470 socRxReasonInvalid, /* Offset 48 */ 5471 socRxReasonInvalid, /* Offset 49 */ 5472 socRxReasonInvalid, /* Offset 50 */ 5473 socRxReasonInvalid, /* Offset 51 */ 5474 socRxReasonInvalid, /* Offset 52 */ 5475 socRxReasonInvalid, /* Offset 53 */ 5476 socRxReasonInvalid, /* Offset 54 */ 5477 socRxReasonInvalid, /* Offset 55 */ 5478 socRxReasonInvalid, /* Offset 56 */ 5479 socRxReasonInvalid, /* Offset 57 */ 5480 socRxReasonInvalid, /* Offset 58 */ 5481 socRxReasonInvalid, /* Offset 59 */ 5482 socRxReasonInvalid, /* Offset 60 */ 5483 socRxReasonInvalid, /* Offset 61 */ 5484 socRxReasonInvalid, /* Offset 62 */ 5485 socRxReasonInvalid /* Offset 63 */ 5486 }; 5487 /* From FORMAT TRILL_CPU_OPCODE_ENCODING */ 5488 static soc_rx_reason_t dcb21_rx_reason_trill_encoding_map[] = { 5489 socRxReasonTrill, /* 0:NO_ERRORS 5490 * Base field, must match the entries above */ 5491 socRxReasonTrillInvalid, /* 1:TRILL_HDR_ERROR */ 5492 socRxReasonTrillMiss, /* 2:TRILL_LOOKUP_MISS */ 5493 socRxReasonTrillRpfFail, /* 3:TRILL_RPF_CHECK_FAIL */ 5494 socRxReasonTrillSlowpath, /* 4:TRILL_SLOWPATH */ 5495 socRxReasonTrillCoreIsIs, /* 5:TRILL_CORE_IS_IS_PKT */ 5496 socRxReasonTrillTtl, /* 6:TRILL_HOP_COUNT_CHECK_FAIL */ 5497 socRxReasonInvalid, /* Offset 7 */ 5498 socRxReasonInvalid, /* Offset 8 */ 5499 socRxReasonInvalid, /* Offset 9 */ 5500 socRxReasonInvalid, /* Offset 10 */ 5501 socRxReasonInvalid, /* Offset 11 */ 5502 socRxReasonInvalid, /* Offset 12 */ 5503 socRxReasonInvalid, /* Offset 13 */ 5504 socRxReasonInvalid, /* Offset 14 */ 5505 socRxReasonInvalid, /* Offset 15 */ 5506 socRxReasonInvalid, /* Offset 16 */ 5507 socRxReasonInvalid, /* Offset 17 */ 5508 socRxReasonInvalid, /* Offset 18 */ 5509 socRxReasonInvalid, /* Offset 19 */ 5510 socRxReasonInvalid, /* Offset 20 */ 5511 socRxReasonInvalid, /* Offset 21 */ 5512 socRxReasonInvalid, /* Offset 22 */ 5513 socRxReasonInvalid, /* Offset 23 */ 5514 socRxReasonInvalid, /* Offset 24 */ 5515 socRxReasonInvalid, /* Offset 25 */ 5516 socRxReasonInvalid, /* Offset 26 */ 5517 socRxReasonInvalid, /* Offset 27 */ 5518 socRxReasonInvalid, /* Offset 28 */ 5519 socRxReasonInvalid, /* Offset 29 */ 5520 socRxReasonInvalid, /* Offset 30 */ 5521 socRxReasonInvalid, /* Offset 31 */ 5522 socRxReasonInvalid, /* Offset 32 */ 5523 socRxReasonInvalid, /* Offset 33 */ 5524 socRxReasonInvalid, /* Offset 34 */ 5525 socRxReasonInvalid, /* Offset 35 */ 5526 socRxReasonInvalid, /* Offset 36 */ 5527 socRxReasonInvalid, /* Offset 37 */ 5528 socRxReasonInvalid, /* Offset 38 */ 5529 socRxReasonInvalid, /* Offset 39 */ 5530 socRxReasonInvalid, /* Offset 40 */ 5531 socRxReasonInvalid, /* Offset 41 */ 5532 socRxReasonInvalid, /* Offset 42 */ 5533 socRxReasonInvalid, /* Offset 43 */ 5534 socRxReasonInvalid, /* Offset 44 */ 5535 socRxReasonInvalid, /* Offset 45 */ 5536 socRxReasonInvalid, /* Offset 46 */ 5537 socRxReasonInvalid, /* Offset 47 */ 5538 socRxReasonInvalid, /* Offset 48 */ 5539 socRxReasonInvalid, /* Offset 49 */ 5540 socRxReasonInvalid, /* Offset 50 */ 5541 socRxReasonInvalid, /* Offset 51 */ 5542 socRxReasonInvalid, /* Offset 52 */ 5543 socRxReasonInvalid, /* Offset 53 */ 5544 socRxReasonInvalid, /* Offset 54 */ 5545 socRxReasonInvalid, /* Offset 55 */ 5546 socRxReasonInvalid, /* Offset 56 */ 5547 socRxReasonInvalid, /* Offset 57 */ 5548 socRxReasonInvalid, /* Offset 58 */ 5549 socRxReasonInvalid, /* Offset 59 */ 5550 socRxReasonInvalid, /* Offset 60 */ 5551 socRxReasonInvalid, /* Offset 61 */ 5552 socRxReasonInvalid, /* Offset 62 */ 5553 socRxReasonInvalid /* Offset 63 */ 5554 }; 5555 static soc_rx_reason_t *dcb21_rx_reason_maps[] = { 5556 dcb21_rx_reason_map, 5557 dcb21_rx_reason_niv_encoding_map, 5558 dcb21_rx_reason_trill_encoding_map, 5559 NULL 5560 }; 5561 static _shr_rx_decap_tunnel_t dcb21_rx_decap_tunnel_map[] = { 5562 _SHR_RX_DECAP_NONE, 5563 _SHR_RX_DECAP_ACCESS_SVP, 5564 _SHR_RX_DECAP_MIM, 5565 _SHR_RX_DECAP_L2GRE, 5566 _SHR_RX_DECAP_VXLAN, 5567 _SHR_RX_DECAP_AMT, 5568 _SHR_RX_DECAP_IP, 5569 _SHR_RX_DECAP_TRILL, 5570 _SHR_RX_DECAP_L2MPLS_1LABEL, 5571 _SHR_RX_DECAP_L2MPLS_2LABEL, 5572 _SHR_RX_DECAP_L2MPLS_1LABELCW, 5573 _SHR_RX_DECAP_L2MPLS_2LABELCW, 5574 _SHR_RX_DECAP_L3MPLS_1LABEL, 5575 _SHR_RX_DECAP_L3MPLS_2LABEL, 5576 _SHR_RX_DECAP_L3MPLS_1LABELCW, 5577 _SHR_RX_DECAP_L3MPLS_2LABELCW 5578 }; 5579 static uint32 dcb21_rx_decap_tunnel_get(dcb_t *dcb) { 5580 dcb21_t *d = (dcb21_t *)dcb; 5581 /* Check for array bounds */ 5582 if ( (d->decap_tunnel_type < 5583 (sizeof (dcb21_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) { 5584 return (uint32)dcb21_rx_decap_tunnel_map[d->decap_tunnel_type]; 5585 } 5586 return (uint32)_SHR_RX_DECAP_NONE; 5587 } 5588 GETFUNCEXPR(21, rx_mirror, (d->reason & (1 << 18))) 5589 GETFUNCEXPR(21, rx_l3_intf, ((d->replicated) ? (d->l3_intf) : 5590 (((d->l3_intf) & 0x4000) ? /* TD+ NHI */ 5591 (((d->l3_intf) & 0x3fff) + _SHR_L3_EGRESS_IDX_MIN) : 5592 ((d->l3_intf) & 0x2000) ? /* TD NHI */ 5593 (((d->l3_intf) & 0x1fff) + _SHR_L3_EGRESS_IDX_MIN) : 5594 (d->l3_intf)))) 5595 GETFUNCNULL(21, rx_switch_drop) 5596 GETFUNCNULL(21, olp_encap_oam_pkt) 5597 GETFUNCNULL(21, read_ecc_error) 5598 GETFUNCNULL(21, desc_remaining) 5599 SETFUNCNULL(21, desc_remaining) 5600 GETFUNCNULL(21, desc_status) 5601 SETFUNCNULL(21, desc_status) 5602 GETFUNCNULL(21, match_id_lo) 5603 GETFUNCNULL(21, match_id_hi) 5604 GETFUNCNULL(21, forwarding_type) 5605 GETFUNCNULL(21, forwarding_zone_id) 5606 5607 5608 static void 5609 dcb21_rx_reasons_get(dcb_op_t *dcb_op, dcb_t *dcb, soc_rx_reasons_t *reasons) 5610 { 5611 soc_rx_reason_t *map, *encoding_map; 5612 uint32 opcode[2], encoding[3]; 5613 uint32 bit_val; 5614 int word_idx, bit_idx, opcode_idx, map_idx, word_count; 5615 int enc_bit = 0; 5616 5617 SOC_RX_REASON_CLEAR_ALL(*reasons); 5618 5619 opcode[0] = dcb_op->rx_reason_get(dcb); 5620 opcode[1] = dcb_op->rx_reason_hi_get(dcb); 5621 word_count = 2; 5622 sal_memset(encoding, 0, sizeof(encoding)); 5623 map = dcb_op->rx_reason_map_get(dcb_op, dcb); 5624 for (word_idx = 0; word_idx < word_count; word_idx++) { 5625 for (bit_idx = 0; bit_idx < 32; bit_idx++) { 5626 opcode_idx = word_idx * 32 + bit_idx; 5627 bit_val = opcode[word_idx] & (1 << bit_idx) ? 1 : 0; 5628 for (map_idx = 0; ; map_idx++) { 5629 encoding_map = dcb_op->rx_reason_maps[1 + map_idx]; 5630 if (encoding_map == NULL) { 5631 break; 5632 } 5633 if (map[opcode_idx] != encoding_map[0]) { 5634 continue; 5635 } 5636 if (opcode_idx == 0 || map[opcode_idx - 1] != encoding_map[0]) { 5637 enc_bit = 0; 5638 } 5639 encoding[map_idx] |= bit_val << enc_bit; 5640 enc_bit++; 5641 break; 5642 } 5643 if (encoding_map == NULL && bit_val) { 5644 SOC_RX_REASON_SET(*reasons, map[opcode_idx]); 5645 } 5646 } 5647 } 5648 5649 for (map_idx = 0; ; map_idx++) { 5650 encoding_map = dcb_op->rx_reason_maps[1 + map_idx]; 5651 if (encoding_map == NULL) { 5652 break; 5653 } 5654 if (encoding[map_idx] != socRxReasonInvalid) { 5655 SOC_RX_REASON_SET(*reasons, encoding_map[encoding[map_idx]]); 5656 } 5657 } 5658 5659 /* BPDU bit should be a reason, paste it in here */ 5660 if (dcb_op->rx_bpdu_get(dcb)) { 5661 SOC_RX_REASON_SET(*reasons, socRxReasonBpdu); 5662 } 5663 5664 return; 5665 } 5666 5667 #ifdef BROADCOM_DEBUG 5668 static void 5669 dcb21_dump(int unit, dcb_t *dcb, char *prefix, int tx) 5670 { 5671 uint32 *p; 5672 int i, size; 5673 dcb21_t *d = (dcb21_t *)dcb; 5674 char ps[((DCB_MAX_SIZE/sizeof(uint32))*9)+1]; 5675 #if defined(LE_HOST) 5676 uint32 hgh[4]; 5677 uint8 *h = (uint8 *)&hgh[0]; 5678 5679 hgh[0] = soc_htonl(d->mh0); 5680 hgh[1] = soc_htonl(d->mh1); 5681 hgh[2] = soc_htonl(d->mh2); 5682 hgh[3] = soc_htonl(d->mh3); 5683 #else 5684 uint8 *h = (uint8 *)&d->mh0; 5685 #endif 5686 5687 p = (uint32 *)dcb; 5688 size = SOC_DCB_SIZE(unit) / sizeof(uint32); 5689 for (i = 0; i < size; i++) { 5690 sal_sprintf(&ps[i*9], "%08x ", p[i]); 5691 } 5692 LOG_CLI((BSL_META_U(unit, 5693 "%s\t%s\n"), prefix, ps)); 5694 if ((SOC_DCB_HG_GET(unit, dcb)) || (SOC_DCB_RX_START_GET(unit, dcb))) { 5695 soc_dma_higig_dump(unit, prefix, h, 0, 0, NULL); 5696 } 5697 LOG_CLI((BSL_META_U(unit, 5698 "%s\ttype %d %schain %ssg %sreload %shg %sstat %spause " 5699 " %spurge\n"), 5700 prefix, 5701 SOC_DCB_TYPE(unit), 5702 SOC_DCB_CHAIN_GET(unit, dcb) ? "" : "!", 5703 SOC_DCB_SG_GET(unit, dcb) ? "" : "!", 5704 SOC_DCB_RELOAD_GET(unit, dcb) ? "" : "!", 5705 SOC_DCB_HG_GET(unit, dcb) ? "" : "!", 5706 SOC_DCB_STAT_GET(unit, dcb) ? "" : "!", 5707 d->c_pause ? "" : "!", 5708 SOC_DCB_PURGE_GET(unit, dcb) ? "" : "!")); 5709 LOG_CLI((BSL_META_U(unit, 5710 "%s\taddr %p reqcount %d xfercount %d\n"), 5711 prefix, 5712 (void *)SOC_DCB_ADDR_GET(unit, dcb), 5713 SOC_DCB_REQCOUNT_GET(unit, dcb), 5714 SOC_DCB_XFERCOUNT_GET(unit, dcb))); 5715 if (!tx) { 5716 LOG_CLI((BSL_META_U(unit, 5717 "%s\t%sdone %serror %sstart %send\n"), 5718 prefix, 5719 SOC_DCB_DONE_GET(unit, dcb) ? "" : "!", 5720 SOC_DCB_RX_ERROR_GET(unit, dcb) ? "" : "!", 5721 SOC_DCB_RX_START_GET(unit, dcb) ? "" : "!", 5722 SOC_DCB_RX_END_GET(unit, dcb) ? "" : "!")); 5723 } 5724 5725 if (tx || !SOC_DCB_RX_START_GET(unit, dcb)) { 5726 return; 5727 } 5728 5729 dcb0_reason_dump(unit, dcb, prefix); 5730 LOG_CLI((BSL_META_U(unit, 5731 "%s\t%schg_tos %sregen_crc %schg_ecn %smcq %svfi_valid" 5732 " %sdvp_nhi_sel\n"), 5733 prefix, 5734 d->chg_tos ? "" : "!", 5735 d->regen_crc ? "" : "!", 5736 d->chg_ecn ? "" : "!", 5737 d->mcq ? "" : "!", 5738 d->vfi_valid ? "" : "!", 5739 d->dvp_nhi_sel ? "" : "!")); 5740 LOG_CLI((BSL_META_U(unit, 5741 "%s\t%sservice_tag %sswitch_pkt %shg_type %ssrc_hg\n"), 5742 prefix, 5743 d->service_tag ? "" : "!", 5744 d->switch_pkt ? "" : "!", 5745 d->hg_type ? "" : "!", 5746 d->src_hg ? "" : "!")); 5747 LOG_CLI((BSL_META_U(unit, 5748 "%s\t%sl3routed %sl3only %sreplicated %sdo_not_change_ttl" 5749 " %sbpdu\n"), 5750 prefix, 5751 d->l3routed ? "" : "!", 5752 d->l3only ? "" : "!", 5753 d->replicated ? "" : "!", 5754 d->do_not_change_ttl ? "" : "!", 5755 d->bpdu ? "" : "!")); 5756 LOG_CLI((BSL_META_U(unit, 5757 "%s\t%soam_pkt %seh_tm %shg2_ext_hdr %sall_switch_drop\n"), 5758 prefix, 5759 d->oam_pkt ? "" : "!", 5760 d->eh_tm ? "" : "!", 5761 d->hg2_ext_hdr ? "" : "!", 5762 d->all_switch_drop ? "" : "!")); 5763 LOG_CLI((BSL_META_U(unit, 5764 "%s\treason=%08x_%08x timestamp=%d srcport=%d\n"), 5765 prefix, 5766 d->reason_hi, 5767 d->reason, 5768 d->timestamp, 5769 d->srcport)); 5770 LOG_CLI((BSL_META_U(unit, 5771 "%s\tcpu_cos=%d uc_cos=%d mc_cos1=%d mc_cos2=%d hgi=%d\n"), 5772 prefix, 5773 d->cpu_cos, 5774 d->uc_cos, 5775 d->mc_cos1, 5776 d->mc_cos2, 5777 d->hgi)); 5778 LOG_CLI((BSL_META_U(unit, 5779 "%s\touter_vid=%d outer_cfi=%d outer_pri=%d otag_action=%d" 5780 " vntag_action=%d\n"), 5781 prefix, 5782 d->outer_vid, 5783 d->outer_cfi, 5784 d->outer_pri, 5785 d->otag_action, 5786 d->vntag_action)); 5787 LOG_CLI((BSL_META_U(unit, 5788 "%s\tinner_vid=%d inner_cfi=%d inner_pri=%d itag_action=%d" 5789 " itag_status=%d\n"), 5790 prefix, 5791 d->inner_vid, 5792 d->inner_cfi, 5793 d->inner_pri, 5794 d->itag_action, 5795 d->itag_status)); 5796 LOG_CLI((BSL_META_U(unit, 5797 "%s\tdscp=%d ecn=%d\n"), 5798 prefix, 5799 d->dscp, 5800 d->ecn)); 5801 LOG_CLI((BSL_META_U(unit, 5802 "%s\tnext_pass_cp=%d eh_seg_sel=%d eh_tag_type=%d " 5803 " eh_queue_tag=%d\n"), 5804 prefix, 5805 d->next_pass_cp, 5806 d->eh_seg_sel, 5807 d->eh_tag_type, 5808 d->eh_queue_tag)); 5809 LOG_CLI((BSL_META_U(unit, 5810 "%s\tdecap_tunnel_type=%d vfi=%d l3_intf=%d match_rule=%d" 5811 " mtp_ind=%d\n"), 5812 prefix, 5813 d->decap_tunnel_type, 5814 d->vfi, 5815 d->l3_intf, 5816 d->match_rule, 5817 d->mtp_index)); 5818 } 5819 #endif /* BROADCOM_DEBUG */ 5820 5821 dcb_op_t dcb21_op = { 5822 21, 5823 sizeof(dcb21_t), 5824 dcb21_rx_reason_maps, 5825 dcb0_rx_reason_map_get, 5826 dcb21_rx_reasons_get, 5827 dcb19_init, 5828 dcb19_addtx, 5829 dcb19_addrx, 5830 dcb19_intrinfo, 5831 dcb19_reqcount_set, 5832 dcb19_reqcount_get, 5833 dcb19_xfercount_get, 5834 dcb0_addr_set, 5835 dcb0_addr_get, 5836 dcb0_paddr_get, 5837 dcb19_done_set, 5838 dcb19_done_get, 5839 dcb19_sg_set, 5840 dcb19_sg_get, 5841 dcb19_chain_set, 5842 dcb19_chain_get, 5843 dcb19_reload_set, 5844 dcb19_reload_get, 5845 dcb19_desc_intr_set, 5846 dcb19_desc_intr_get, 5847 dcb19_tx_l2pbm_set, 5848 dcb19_tx_utpbm_set, 5849 dcb19_tx_l3pbm_set, 5850 dcb19_tx_crc_set, 5851 dcb19_tx_cos_set, 5852 dcb19_tx_destmod_set, 5853 dcb19_tx_destport_set, 5854 dcb19_tx_opcode_set, 5855 dcb19_tx_srcmod_set, 5856 dcb19_tx_srcport_set, 5857 dcb19_tx_prio_set, 5858 dcb19_tx_pfm_set, 5859 dcb19_rx_untagged_get, 5860 dcb19_rx_crc_get, 5861 dcb19_rx_cos_get, 5862 dcb19_rx_destmod_get, 5863 dcb19_rx_destport_get, 5864 dcb19_rx_opcode_get, 5865 dcb19_rx_classtag_get, 5866 dcb19_rx_matchrule_get, 5867 dcb19_rx_start_get, 5868 dcb19_rx_end_get, 5869 dcb19_rx_error_get, 5870 dcb19_rx_prio_get, 5871 dcb19_rx_reason_get, 5872 dcb19_rx_reason_hi_get, 5873 dcb19_rx_ingport_get, 5874 dcb19_rx_srcport_get, 5875 dcb19_rx_srcmod_get, 5876 dcb19_rx_mcast_get, 5877 dcb19_rx_vclabel_get, 5878 dcb21_rx_mirror_get, 5879 dcb19_rx_timestamp_get, 5880 dcb19_rx_timestamp_upper_get, 5881 dcb19_hg_set, 5882 dcb19_hg_get, 5883 dcb19_stat_set, 5884 dcb19_stat_get, 5885 dcb19_purge_set, 5886 dcb19_purge_get, 5887 dcb19_mhp_get, 5888 dcb19_outer_vid_get, 5889 dcb19_outer_pri_get, 5890 dcb19_outer_cfi_get, 5891 dcb19_rx_outer_tag_action_get, 5892 dcb19_inner_vid_get, 5893 dcb19_inner_pri_get, 5894 dcb19_inner_cfi_get, 5895 dcb19_rx_inner_tag_action_get, 5896 dcb19_rx_bpdu_get, 5897 dcb21_rx_l3_intf_get, 5898 dcb21_rx_decap_tunnel_get, 5899 dcb21_rx_switch_drop_get, 5900 dcb21_olp_encap_oam_pkt_get, 5901 dcb21_read_ecc_error_get, 5902 dcb21_desc_remaining_get, 5903 dcb21_desc_remaining_set, 5904 dcb21_desc_status_get, 5905 dcb21_desc_status_set, 5906 dcb21_match_id_lo_get, 5907 dcb21_match_id_hi_get, 5908 dcb21_forwarding_type_get, 5909 dcb21_forwarding_zone_id_get, 5910 #ifdef BROADCOM_DEBUG 5911 dcb19_tx_l2pbm_get, 5912 dcb19_tx_utpbm_get, 5913 dcb19_tx_l3pbm_get, 5914 dcb19_tx_crc_get, 5915 dcb19_tx_cos_get, 5916 dcb19_tx_destmod_get, 5917 dcb19_tx_destport_get, 5918 dcb19_tx_opcode_get, 5919 dcb19_tx_srcmod_get, 5920 dcb19_tx_srcport_get, 5921 dcb19_tx_prio_get, 5922 dcb19_tx_pfm_get, 5923 5924 dcb21_dump, 5925 dcb0_reason_dump, 5926 #endif /* BROADCOM_DEBUG */ 5927 #ifdef PLISIM 5928 dcb19_status_init, 5929 dcb19_xfercount_set, 5930 dcb19_rx_start_set, 5931 dcb19_rx_end_set, 5932 dcb19_rx_error_set, 5933 dcb19_rx_crc_set, 5934 dcb19_rx_ingport_set, 5935 #endif /* PLISIM */ 5936 NULL, 5937 }; 5938 #endif /* BCM_TRIDENT_SUPPORT */ 5939 5940 #if defined(BCM_SHADOW_SUPPORT) 5941 /* 5942 * DCB Type 22 Support 5943 */ 5944 5945 static soc_rx_reason_t 5946 dcb22_rx_reason_map[] = { 5947 socRxReasonUnknownVlan, /* Offset 0 */ 5948 socRxReasonFilterMatch, /* Offset 1 */ 5949 socRxReasonL3HeaderError, /* Offset 2 */ 5950 socRxReasonProtocol, /* Offset 3 */ 5951 socRxReasonDosAttack, /* Offset 4 */ 5952 socRxReasonMartianAddr, /* Offset 5 */ 5953 socRxReasonParityError, /* Offset 6 */ 5954 socRxReasonHigigHdrError, /* Offset 7 */ 5955 socRxReasonTimeSync, /* Offset 8 */ 5956 socRxReasonHigigHdrError, /* Offset 9 */ 5957 socRxReasonInvalid, /* Offset 10 */ 5958 socRxReasonInvalid, /* Offset 11 */ 5959 socRxReasonInvalid, /* Offset 12 */ 5960 socRxReasonInvalid, /* Offset 13 */ 5961 socRxReasonInvalid, /* Offset 14 */ 5962 socRxReasonInvalid, /* Offset 15 */ 5963 socRxReasonInvalid, /* Offset 16 */ 5964 socRxReasonInvalid, /* Offset 17 */ 5965 socRxReasonInvalid, /* Offset 18 */ 5966 socRxReasonInvalid, /* Offset 19 */ 5967 socRxReasonInvalid, /* Offset 20 */ 5968 socRxReasonInvalid, /* Offset 21 */ 5969 socRxReasonInvalid, /* Offset 22 */ 5970 socRxReasonInvalid, /* Offset 23 */ 5971 socRxReasonInvalid, /* Offset 24 */ 5972 socRxReasonInvalid, /* Offset 25 */ 5973 socRxReasonInvalid, /* Offset 26 */ 5974 socRxReasonInvalid, /* Offset 27 */ 5975 socRxReasonInvalid, /* Offset 28 */ 5976 socRxReasonInvalid, /* Offset 29 */ 5977 socRxReasonInvalid, /* Offset 30 */ 5978 socRxReasonInvalid, /* Offset 31 */ 5979 socRxReasonInvalid, /* Offset 32 */ 5980 socRxReasonInvalid, /* Offset 33 */ 5981 socRxReasonInvalid, /* Offset 34 */ 5982 socRxReasonInvalid, /* Offset 35 */ 5983 socRxReasonInvalid, /* Offset 36 */ 5984 socRxReasonInvalid, /* Offset 37 */ 5985 socRxReasonInvalid, /* Offset 38 */ 5986 socRxReasonInvalid, /* Offset 39 */ 5987 socRxReasonInvalid, /* Offset 40 */ 5988 socRxReasonInvalid, /* Offset 41 */ 5989 socRxReasonInvalid, /* Offset 42 */ 5990 socRxReasonInvalid, /* Offset 43 */ 5991 socRxReasonInvalid, /* Offset 44 */ 5992 socRxReasonInvalid, /* Offset 45 */ 5993 socRxReasonInvalid, /* Offset 46 */ 5994 socRxReasonInvalid, /* Offset 47 */ 5995 socRxReasonInvalid, /* Offset 48 */ 5996 socRxReasonInvalid, /* Offset 49 */ 5997 socRxReasonInvalid, /* Offset 50 */ 5998 socRxReasonInvalid, /* Offset 51 */ 5999 socRxReasonInvalid, /* Offset 52 */ 6000 socRxReasonInvalid, /* Offset 53 */ 6001 socRxReasonInvalid, /* Offset 54 */ 6002 socRxReasonInvalid, /* Offset 55 */ 6003 socRxReasonInvalid, /* Offset 56 */ 6004 socRxReasonInvalid, /* Offset 57 */ 6005 socRxReasonInvalid, /* Offset 58 */ 6006 socRxReasonInvalid, /* Offset 59 */ 6007 socRxReasonInvalid, /* Offset 60 */ 6008 socRxReasonInvalid, /* Offset 61 */ 6009 socRxReasonInvalid, /* Offset 62 */ 6010 socRxReasonInvalid /* Offset 63 */ 6011 }; 6012 6013 static soc_rx_reason_t *dcb22_rx_reason_maps[] = { 6014 dcb22_rx_reason_map, 6015 NULL 6016 }; 6017 6018 #ifdef BROADCOM_DEBUG 6019 static void 6020 dcb22_dump(int unit, dcb_t *dcb, char *prefix, int tx) 6021 { 6022 uint32 *p; 6023 int i, size; 6024 dcb22_t *d = (dcb22_t *)dcb; 6025 char ps[((DCB_MAX_SIZE/sizeof(uint32))*9)+1]; 6026 #if defined(LE_HOST) 6027 uint32 hgh[4]; 6028 uint8 *h = (uint8 *)&hgh[0]; 6029 6030 hgh[0] = soc_htonl(d->mh0); 6031 hgh[1] = soc_htonl(d->mh1); 6032 hgh[2] = soc_htonl(d->mh2); 6033 hgh[3] = soc_htonl(d->mh3); 6034 #else 6035 uint8 *h = (uint8 *)&d->mh0; 6036 #endif 6037 6038 p = (uint32 *)dcb; 6039 size = SOC_DCB_SIZE(unit) / sizeof(uint32); 6040 for (i = 0; i < size; i++) { 6041 sal_sprintf(&ps[i*9], "%08x ", p[i]); 6042 } 6043 LOG_CLI((BSL_META_U(unit, 6044 "%s\t%s\n"), prefix, ps)); 6045 if ((SOC_DCB_HG_GET(unit, dcb)) || (SOC_DCB_RX_START_GET(unit, dcb))) { 6046 soc_dma_higig_dump(unit, prefix, h, 0, 0, NULL); 6047 } 6048 LOG_CLI((BSL_META_U(unit, 6049 "%s\ttype %d %ssg %schain %sreload %shg %sstat %spause %spurge\n"), 6050 prefix, 6051 SOC_DCB_TYPE(unit), 6052 SOC_DCB_SG_GET(unit, dcb) ? "" : "!", 6053 SOC_DCB_CHAIN_GET(unit, dcb) ? "" : "!", 6054 SOC_DCB_RELOAD_GET(unit, dcb) ? "" : "!", 6055 SOC_DCB_HG_GET(unit, dcb) ? "" : "!", 6056 SOC_DCB_STAT_GET(unit, dcb) ? "" : "!", 6057 d->c_pause ? "" : "!", 6058 SOC_DCB_PURGE_GET(unit, dcb) ? "" : "!")); 6059 LOG_CLI((BSL_META_U(unit, 6060 "%s\taddr %p reqcount %d xfercount %d\n"), 6061 prefix, 6062 (void *)SOC_DCB_ADDR_GET(unit, dcb), 6063 SOC_DCB_REQCOUNT_GET(unit, dcb), 6064 SOC_DCB_XFERCOUNT_GET(unit, dcb))); 6065 if (!tx) { 6066 LOG_CLI((BSL_META_U(unit, 6067 "%s\t%sdone %sstart %send %serror\n"), 6068 prefix, 6069 SOC_DCB_DONE_GET(unit, dcb) ? "" : "!", 6070 SOC_DCB_RX_START_GET(unit, dcb) ? "" : "!", 6071 SOC_DCB_RX_END_GET(unit, dcb) ? "" : "!", 6072 SOC_DCB_RX_ERROR_GET(unit, dcb) ? "" : "!")); 6073 } 6074 if ((!tx) && (SOC_DCB_RX_START_GET(unit, dcb))) { 6075 dcb0_reason_dump(unit, dcb, prefix); 6076 } 6077 } 6078 #endif /* BROADCOM_DEBUG */ 6079 6080 GETFUNCFIELD(22, rx_matchrule, match_rule) 6081 GETFUNCFIELD(22, rx_timestamp_lo, timestamp_lo) 6082 GETFUNCFIELD(22, rx_timestamp_hi, timestamp_hi) 6083 GETFUNCFIELD(22, rx_outer_tag_action, otag_action) 6084 GETFUNCNULL(22, rx_inner_tag_action) 6085 GETFUNCNULL(22, rx_switch_drop) 6086 GETFUNCNULL(22, olp_encap_oam_pkt) 6087 GETFUNCNULL(22, read_ecc_error) 6088 GETFUNCNULL(22, desc_remaining) 6089 SETFUNCNULL(22, desc_remaining) 6090 GETFUNCNULL(22, desc_status) 6091 SETFUNCNULL(22, desc_status) 6092 GETFUNCNULL(22, match_id_lo) 6093 GETFUNCNULL(22, match_id_hi) 6094 GETFUNCNULL(22, forwarding_type) 6095 GETFUNCNULL(22, forwarding_zone_id) 6096 6097 dcb_op_t dcb22_op = { 6098 22, 6099 sizeof(dcb22_t), 6100 dcb22_rx_reason_maps, 6101 dcb0_rx_reason_map_get, 6102 dcb0_rx_reasons_get, 6103 dcb19_init, 6104 dcb19_addtx, 6105 dcb19_addrx, 6106 dcb19_intrinfo, 6107 dcb19_reqcount_set, 6108 dcb19_reqcount_get, 6109 dcb19_xfercount_get, 6110 dcb0_addr_set, 6111 dcb0_addr_get, 6112 dcb0_paddr_get, 6113 dcb19_done_set, 6114 dcb19_done_get, 6115 dcb19_sg_set, 6116 dcb19_sg_get, 6117 dcb19_chain_set, 6118 dcb19_chain_get, 6119 dcb19_reload_set, 6120 dcb19_reload_get, 6121 dcb19_desc_intr_set, 6122 dcb19_desc_intr_get, 6123 dcb19_tx_l2pbm_set, 6124 dcb19_tx_utpbm_set, 6125 dcb19_tx_l3pbm_set, 6126 dcb19_tx_crc_set, 6127 dcb19_tx_cos_set, 6128 dcb19_tx_destmod_set, 6129 dcb19_tx_destport_set, 6130 dcb19_tx_opcode_set, 6131 dcb19_tx_srcmod_set, 6132 dcb19_tx_srcport_set, 6133 dcb19_tx_prio_set, 6134 dcb19_tx_pfm_set, 6135 dcb19_rx_untagged_get, 6136 dcb19_rx_crc_get, 6137 dcb19_rx_cos_get, 6138 dcb19_rx_destmod_get, 6139 dcb19_rx_destport_get, 6140 dcb19_rx_opcode_get, 6141 dcb19_rx_classtag_get, 6142 dcb22_rx_matchrule_get, 6143 dcb19_rx_start_get, 6144 dcb19_rx_end_get, 6145 dcb19_rx_error_get, 6146 dcb19_rx_prio_get, 6147 dcb19_rx_reason_get, 6148 dcb19_rx_reason_hi_get, 6149 dcb19_rx_ingport_get, 6150 dcb19_rx_srcport_get, 6151 dcb19_rx_srcmod_get, 6152 dcb19_rx_mcast_get, 6153 dcb19_rx_vclabel_get, 6154 dcb19_rx_mirror_get, 6155 dcb22_rx_timestamp_lo_get, 6156 dcb22_rx_timestamp_hi_get, 6157 dcb19_hg_set, 6158 dcb19_hg_get, 6159 dcb19_stat_set, 6160 dcb19_stat_get, 6161 dcb19_purge_set, 6162 dcb19_purge_get, 6163 dcb19_mhp_get, 6164 dcb19_outer_vid_get, 6165 dcb19_outer_pri_get, 6166 dcb19_outer_cfi_get, 6167 dcb22_rx_outer_tag_action_get, 6168 dcb19_inner_vid_get, 6169 dcb19_inner_pri_get, 6170 dcb19_inner_cfi_get, 6171 dcb22_rx_inner_tag_action_get, 6172 dcb19_rx_bpdu_get, 6173 dcb9_rx_l3_intf_get, 6174 dcb19_rx_decap_tunnel_get, 6175 dcb22_rx_switch_drop_get, 6176 dcb22_olp_encap_oam_pkt_get, 6177 dcb22_read_ecc_error_get, 6178 dcb22_desc_remaining_get, 6179 dcb22_desc_remaining_set, 6180 dcb22_desc_status_get, 6181 dcb22_desc_status_set, 6182 dcb22_match_id_lo_get, 6183 dcb22_match_id_hi_get, 6184 dcb22_forwarding_type_get, 6185 dcb22_forwarding_zone_id_get, 6186 #ifdef BROADCOM_DEBUG 6187 dcb19_tx_l2pbm_get, 6188 dcb19_tx_utpbm_get, 6189 dcb19_tx_l3pbm_get, 6190 dcb19_tx_crc_get, 6191 dcb19_tx_cos_get, 6192 dcb19_tx_destmod_get, 6193 dcb19_tx_destport_get, 6194 dcb19_tx_opcode_get, 6195 dcb19_tx_srcmod_get, 6196 dcb19_tx_srcport_get, 6197 dcb19_tx_prio_get, 6198 dcb19_tx_pfm_get, 6199 6200 dcb22_dump, 6201 dcb0_reason_dump, 6202 #endif /* BROADCOM_DEBUG */ 6203 #ifdef PLISIM 6204 dcb19_status_init, 6205 dcb19_xfercount_set, 6206 dcb19_rx_start_set, 6207 dcb19_rx_end_set, 6208 dcb19_rx_error_set, 6209 dcb19_rx_crc_set, 6210 dcb19_rx_ingport_set, 6211 #endif /* PLISIM */ 6212 }; 6213 #endif /* BCM_SHADOW_SUPPORT */ 6214 6215 #if defined(BCM_TRIUMPH3_SUPPORT) || defined(BCM_KATANA_SUPPORT) || \ 6216 defined(BCM_TRIDENT2_SUPPORT) || defined(BCM_GREYHOUND_SUPPORT) 6217 /* 6218 * DCB Type 23 Support 6219 */ 6220 static soc_rx_reason_t 6221 dcb23_rx_reason_map_ip_0[] = { /* IP Overlay 0 */ 6222 socRxReasonUnknownVlan, /* Offset 0 */ 6223 socRxReasonL2SourceMiss, /* Offset 1 */ 6224 socRxReasonL2DestMiss, /* Offset 2 */ 6225 socRxReasonL2Move, /* Offset 3 */ 6226 socRxReasonL2Cpu, /* Offset 4 */ 6227 socRxReasonSampleSource, /* Offset 5 */ 6228 socRxReasonSampleDest, /* Offset 6 */ 6229 socRxReasonL3SourceMiss, /* Offset 7 */ 6230 socRxReasonL3DestMiss, /* Offset 8 */ 6231 socRxReasonL3SourceMove, /* Offset 9 */ 6232 socRxReasonMcastMiss, /* Offset 10 */ 6233 socRxReasonIpMcastMiss, /* Offset 11 */ 6234 socRxReasonL3HeaderError, /* Offset 12 */ 6235 socRxReasonProtocol, /* Offset 13 */ 6236 socRxReasonDosAttack, /* Offset 14 */ 6237 socRxReasonMartianAddr, /* Offset 15 */ 6238 socRxReasonTunnelError, /* Offset 16 */ 6239 socRxReasonMirror, /* Offset 17 */ 6240 socRxReasonIcmpRedirect, /* Offset 18 */ 6241 socRxReasonL3Slowpath, /* Offset 19 */ 6242 socRxReasonL3MtuFail, /* Offset 20 */ 6243 socRxReasonMcastIdxError, /* Offset 21 */ 6244 socRxReasonVlanFilterMatch, /* Offset 22 */ 6245 socRxReasonClassBasedMove, /* Offset 23 */ 6246 socRxReasonL3AddrBindFail, /* Offset 24 */ 6247 socRxReasonMplsLabelMiss, /* Offset 25 */ 6248 socRxReasonMplsInvalidAction, /* Offset 26 */ 6249 socRxReasonMplsInvalidPayload, /* Offset 27 */ 6250 socRxReasonMplsTtl, /* Offset 28 */ 6251 socRxReasonMplsSequenceNumber, /* Offset 29 */ 6252 socRxReasonL2NonUnicastMiss, /* Offset 30 */ 6253 socRxReasonNhop, /* Offset 31 */ 6254 socRxReasonStation, /* Offset 32 */ 6255 socRxReasonVlanTranslate, /* Offset 33 */ 6256 socRxReasonTimeSync, /* Offset 34 */ 6257 socRxReasonOAMSlowpath, /* Offset 35 */ 6258 socRxReasonOAMError, /* Offset 36 */ 6259 socRxReasonIpfixRateViolation, /* Offset 37 */ 6260 socRxReasonL2LearnLimit, /* Offset 38 */ 6261 socRxReasonEncapHigigError, /* Offset 39 */ 6262 socRxReasonRegexMatch, /* Offset 40 */ 6263 socRxReasonOAMLMDM, /* Offset 41 */ 6264 socRxReasonBfd, /* Offset 42 */ 6265 socRxReasonBfdSlowpath, /* Offset 43 */ 6266 socRxReasonFailoverDrop, /* Offset 44 */ 6267 socRxReasonTrillName, /* Offset 45 */ 6268 socRxReasonTrillTtl, /* Offset 46 */ 6269 socRxReasonTrillCoreIsIs, /* Offset 47 */ 6270 socRxReasonTrillSlowpath, /* Offset 48 */ 6271 socRxReasonTrillRpfFail, /* Offset 49 */ 6272 socRxReasonTrillMiss, /* Offset 50 */ 6273 socRxReasonTrillInvalid, /* Offset 51 */ 6274 socRxReasonNivUntagDrop, /* Offset 52 */ 6275 socRxReasonNivTagDrop, /* Offset 53 */ 6276 socRxReasonNivTagInvalid, /* Offset 54 */ 6277 socRxReasonNivRpfFail, /* Offset 55 */ 6278 socRxReasonNivInterfaceMiss, /* Offset 56 */ 6279 socRxReasonNivPrioDrop, /* Offset 57 */ 6280 socRxReasonParityError, /* Offset 58 */ 6281 socRxReasonHigigHdrError, /* Offset 59 */ 6282 socRxReasonFilterMatch, /* Offset 60 */ 6283 socRxReasonL2GreSipMiss, /* Offset 61 */ 6284 socRxReasonL2GreVpnIdMiss, /* Offset 62 */ 6285 socRxReasonInvalid /* Offset 63 */ 6286 }; 6287 6288 static soc_rx_reason_t 6289 dcb23_rx_reason_map_ip_1[] = { /* IP Overlay 1 */ 6290 socRxReasonUnknownVlan, /* Offset 0 */ 6291 socRxReasonL2SourceMiss, /* Offset 1 */ 6292 socRxReasonL2DestMiss, /* Offset 2 */ 6293 socRxReasonL2Move, /* Offset 3 */ 6294 socRxReasonL2Cpu, /* Offset 4 */ 6295 socRxReasonSampleSource, /* Offset 5 */ 6296 socRxReasonSampleDest, /* Offset 6 */ 6297 socRxReasonL3SourceMiss, /* Offset 7 */ 6298 socRxReasonL3DestMiss, /* Offset 8 */ 6299 socRxReasonL3SourceMove, /* Offset 9 */ 6300 socRxReasonMcastMiss, /* Offset 10 */ 6301 socRxReasonIpMcastMiss, /* Offset 11 */ 6302 socRxReasonL3HeaderError, /* Offset 12 */ 6303 socRxReasonProtocol, /* Offset 13 */ 6304 socRxReasonDosAttack, /* Offset 14 */ 6305 socRxReasonMartianAddr, /* Offset 15 */ 6306 socRxReasonTunnelError, /* Offset 16 */ 6307 socRxReasonMirror, /* Offset 17 */ 6308 socRxReasonIcmpRedirect, /* Offset 18 */ 6309 socRxReasonL3Slowpath, /* Offset 19 */ 6310 socRxReasonL3MtuFail, /* Offset 20 */ 6311 socRxReasonMcastIdxError, /* Offset 21 */ 6312 socRxReasonVlanFilterMatch, /* Offset 22 */ 6313 socRxReasonClassBasedMove, /* Offset 23 */ 6314 socRxReasonL3AddrBindFail, /* Offset 24 */ 6315 socRxReasonMplsLabelMiss, /* Offset 25 */ 6316 socRxReasonMplsInvalidAction, /* Offset 26 */ 6317 socRxReasonMplsInvalidPayload, /* Offset 27 */ 6318 socRxReasonMplsTtl, /* Offset 28 */ 6319 socRxReasonMplsSequenceNumber, /* Offset 29 */ 6320 socRxReasonL2NonUnicastMiss, /* Offset 30 */ 6321 socRxReasonNhop, /* Offset 31 */ 6322 socRxReasonStation, /* Offset 32 */ 6323 socRxReasonVlanTranslate, /* Offset 33 */ 6324 socRxReasonTimeSync, /* Offset 34 */ 6325 socRxReasonOAMSlowpath, /* Offset 35 */ 6326 socRxReasonOAMError, /* Offset 36 */ 6327 socRxReasonIpfixRateViolation, /* Offset 37 */ 6328 socRxReasonL2LearnLimit, /* Offset 38 */ 6329 socRxReasonEncapHigigError, /* Offset 39 */ 6330 socRxReasonRegexMatch, /* Offset 40 */ 6331 socRxReasonOAMLMDM, /* Offset 41 */ 6332 socRxReasonBfd, /* Offset 42 */ 6333 socRxReasonBfdSlowpath, /* Offset 43 */ 6334 socRxReasonFailoverDrop, /* Offset 44 */ 6335 socRxReasonWlanSlowpathKeepalive, /* Offset 45 */ 6336 socRxReasonWlanTunnelError, /* Offset 46 */ 6337 socRxReasonWlanSlowpath, /* Offset 47 */ 6338 socRxReasonWlanDot1xDrop, /* Offset 48 */ 6339 socRxReasonMplsReservedEntropyLabel, /* Offset 49 */ 6340 socRxReasonCongestionCnmProxy, /* Offset 50 */ 6341 socRxReasonCongestionCnmProxyError, /* Offset 51 */ 6342 socRxReasonCongestionCnm, /* Offset 52 */ 6343 socRxReasonMplsUnknownAch, /* Offset 53 */ 6344 socRxReasonMplsLookupsExceeded, /* Offset 54 */ 6345 socRxReasonMplsIllegalReservedLabel, /* Offset 55 */ 6346 socRxReasonMplsRouterAlertLabel, /* Offset 56 */ 6347 socRxReasonInvalid, /* Offset 57 */ 6348 socRxReasonParityError, /* Offset 58 */ 6349 socRxReasonHigigHdrError, /* Offset 59 */ 6350 socRxReasonFilterMatch, /* Offset 60 */ 6351 socRxReasonL2GreSipMiss, /* Offset 61 */ 6352 socRxReasonL2GreVpnIdMiss, /* Offset 62 */ 6353 socRxReasonInvalid /* Offset 63 */ 6354 }; 6355 6356 static soc_rx_reason_t 6357 dcb23_rx_reason_map_ep[] = { 6358 socRxReasonUnknownVlan, /* Offset 0 */ 6359 socRxReasonStp, /* Offset 1 */ 6360 socRxReasonVlanTranslate, /* Offset 2 new */ 6361 socRxReasonTunnelError, /* Offset 3 */ 6362 socRxReasonIpmc, /* Offset 4 */ 6363 socRxReasonL3HeaderError, /* Offset 5 */ 6364 socRxReasonTtl, /* Offset 6 */ 6365 socRxReasonL2MtuFail, /* Offset 7 */ 6366 socRxReasonHigigHdrError, /* Offset 8 */ 6367 socRxReasonSplitHorizon, /* Offset 9 */ 6368 socRxReasonNivPrune, /* Offset 10 */ 6369 socRxReasonVirtualPortPrune, /* Offset 11 */ 6370 socRxReasonFilterMatch, /* Offset 12 */ 6371 socRxReasonNonUnicastDrop, /* Offset 13 */ 6372 socRxReasonTrillPacketPortMismatch, /* Offset 14 */ 6373 socRxReasonInvalid, /* Offset 15 */ 6374 socRxReasonInvalid, /* Offset 16 */ 6375 socRxReasonInvalid, /* Offset 17 */ 6376 socRxReasonInvalid, /* Offset 18 */ 6377 socRxReasonInvalid, /* Offset 19 */ 6378 socRxReasonInvalid, /* Offset 20 */ 6379 socRxReasonInvalid, /* Offset 21 */ 6380 socRxReasonInvalid, /* Offset 22 */ 6381 socRxReasonInvalid, /* Offset 23 */ 6382 socRxReasonInvalid, /* Offset 24 */ 6383 socRxReasonInvalid, /* Offset 25 */ 6384 socRxReasonInvalid, /* Offset 26 */ 6385 socRxReasonInvalid, /* Offset 27 */ 6386 socRxReasonInvalid, /* Offset 28 */ 6387 socRxReasonInvalid, /* Offset 29 */ 6388 socRxReasonInvalid, /* Offset 30 */ 6389 socRxReasonInvalid, /* Offset 31 */ 6390 socRxReasonInvalid, /* Offset 32 */ 6391 socRxReasonInvalid, /* Offset 33 */ 6392 socRxReasonInvalid, /* Offset 34 */ 6393 socRxReasonInvalid, /* Offset 35 */ 6394 socRxReasonInvalid, /* Offset 36 */ 6395 socRxReasonInvalid, /* Offset 37 */ 6396 socRxReasonInvalid, /* Offset 38 */ 6397 socRxReasonInvalid, /* Offset 39 */ 6398 socRxReasonInvalid, /* Offset 40 */ 6399 socRxReasonInvalid, /* Offset 41 */ 6400 socRxReasonInvalid, /* Offset 42 */ 6401 socRxReasonInvalid, /* Offset 43 */ 6402 socRxReasonInvalid, /* Offset 44 */ 6403 socRxReasonInvalid, /* Offset 45 */ 6404 socRxReasonInvalid, /* Offset 46 */ 6405 socRxReasonInvalid, /* Offset 47 */ 6406 socRxReasonInvalid, /* Offset 48 */ 6407 socRxReasonInvalid, /* Offset 49 */ 6408 socRxReasonInvalid, /* Offset 50 */ 6409 socRxReasonInvalid, /* Offset 51 */ 6410 socRxReasonInvalid, /* Offset 52 */ 6411 socRxReasonInvalid, /* Offset 53 */ 6412 socRxReasonInvalid, /* Offset 54 */ 6413 socRxReasonInvalid, /* Offset 55 */ 6414 socRxReasonInvalid, /* Offset 56 */ 6415 socRxReasonInvalid, /* Offset 57 */ 6416 socRxReasonInvalid, /* Offset 58 */ 6417 socRxReasonInvalid, /* Offset 59 */ 6418 socRxReasonInvalid, /* Offset 60 */ 6419 socRxReasonInvalid, /* Offset 61 */ 6420 socRxReasonInvalid, /* Offset 62 */ 6421 socRxReasonInvalid /* Offset 63 */ 6422 }; 6423 6424 static soc_rx_reason_t 6425 dcb23_rx_reason_map_nlf[] = { 6426 socRxReasonRegexAction, /* Offset 0 */ 6427 socRxReasonWlanClientMove, /* Offset 1 */ 6428 socRxReasonWlanSourcePortMiss, /* Offset 2 */ 6429 socRxReasonWlanClientError, /* Offset 3 */ 6430 socRxReasonWlanClientSourceMiss, /* Offset 4 */ 6431 socRxReasonWlanClientDestMiss, /* Offset 5 */ 6432 socRxReasonWlanMtu, /* Offset 6 */ 6433 socRxReasonInvalid, /* Offset 7 */ 6434 socRxReasonInvalid, /* Offset 8 */ 6435 socRxReasonInvalid, /* Offset 9 */ 6436 socRxReasonInvalid, /* Offset 10 */ 6437 socRxReasonInvalid, /* Offset 11 */ 6438 socRxReasonInvalid, /* Offset 12 */ 6439 socRxReasonInvalid, /* Offset 13 */ 6440 socRxReasonInvalid, /* Offset 14 */ 6441 socRxReasonInvalid, /* Offset 15 */ 6442 socRxReasonInvalid, /* Offset 16 */ 6443 socRxReasonInvalid, /* Offset 17 */ 6444 socRxReasonInvalid, /* Offset 18 */ 6445 socRxReasonInvalid, /* Offset 19 */ 6446 socRxReasonInvalid, /* Offset 20 */ 6447 socRxReasonInvalid, /* Offset 21 */ 6448 socRxReasonInvalid, /* Offset 22 */ 6449 socRxReasonInvalid, /* Offset 23 */ 6450 socRxReasonInvalid, /* Offset 24 */ 6451 socRxReasonInvalid, /* Offset 25 */ 6452 socRxReasonInvalid, /* Offset 26 */ 6453 socRxReasonInvalid, /* Offset 27 */ 6454 socRxReasonInvalid, /* Offset 28 */ 6455 socRxReasonInvalid, /* Offset 29 */ 6456 socRxReasonInvalid, /* Offset 30 */ 6457 socRxReasonInvalid, /* Offset 31 */ 6458 socRxReasonInvalid, /* Offset 32 */ 6459 socRxReasonInvalid, /* Offset 33 */ 6460 socRxReasonInvalid, /* Offset 34 */ 6461 socRxReasonInvalid, /* Offset 35 */ 6462 socRxReasonInvalid, /* Offset 36 */ 6463 socRxReasonInvalid, /* Offset 37 */ 6464 socRxReasonInvalid, /* Offset 38 */ 6465 socRxReasonInvalid, /* Offset 39 */ 6466 socRxReasonInvalid, /* Offset 40 */ 6467 socRxReasonInvalid, /* Offset 41 */ 6468 socRxReasonInvalid, /* Offset 42 */ 6469 socRxReasonInvalid, /* Offset 43 */ 6470 socRxReasonInvalid, /* Offset 44 */ 6471 socRxReasonInvalid, /* Offset 45 */ 6472 socRxReasonInvalid, /* Offset 46 */ 6473 socRxReasonInvalid, /* Offset 47 */ 6474 socRxReasonInvalid, /* Offset 48 */ 6475 socRxReasonInvalid, /* Offset 49 */ 6476 socRxReasonInvalid, /* Offset 50 */ 6477 socRxReasonInvalid, /* Offset 51 */ 6478 socRxReasonInvalid, /* Offset 52 */ 6479 socRxReasonInvalid, /* Offset 53 */ 6480 socRxReasonInvalid, /* Offset 54 */ 6481 socRxReasonInvalid, /* Offset 55 */ 6482 socRxReasonInvalid, /* Offset 56 */ 6483 socRxReasonInvalid, /* Offset 57 */ 6484 socRxReasonInvalid, /* Offset 58 */ 6485 socRxReasonInvalid, /* Offset 59 */ 6486 socRxReasonInvalid, /* Offset 60 */ 6487 socRxReasonInvalid, /* Offset 61 */ 6488 socRxReasonInvalid, /* Offset 62 */ 6489 socRxReasonInvalid /* Offset 63 */ 6490 }; 6491 6492 static soc_rx_reason_t *dcb23_rx_reason_maps[] = { 6493 dcb23_rx_reason_map_ip_0, 6494 dcb23_rx_reason_map_ip_1, 6495 dcb23_rx_reason_map_ep, 6496 dcb23_rx_reason_map_nlf, 6497 NULL 6498 }; 6499 6500 6501 /* 6502 * Function: 6503 * dcb23_rx_reason_map_get 6504 * Purpose: 6505 * Return the RX reason map for DCB 23 type. 6506 * Parameters: 6507 * dcb_op - DCB operations 6508 * dcb - dma control block 6509 * Returns: 6510 * RX reason map pointer 6511 */ 6512 static soc_rx_reason_t * 6513 dcb23_rx_reason_map_get(dcb_op_t *dcb_op, dcb_t *dcb) 6514 { 6515 soc_rx_reason_t *map = NULL; 6516 dcb23_t *d = (dcb23_t *)dcb; 6517 6518 switch (d->word4.overlay1.cpu_opcode_type) { 6519 case SOC_CPU_OPCODE_TYPE_IP_0: 6520 map = dcb23_rx_reason_map_ip_0; 6521 break; 6522 case SOC_CPU_OPCODE_TYPE_IP_1: 6523 map = dcb23_rx_reason_map_ip_1; 6524 break; 6525 case SOC_CPU_OPCODE_TYPE_EP: 6526 map = dcb23_rx_reason_map_ep; 6527 break; 6528 case SOC_CPU_OPCODE_TYPE_NLF: 6529 map = dcb23_rx_reason_map_nlf; 6530 break; 6531 default: 6532 /* Unknown reason type */ 6533 break; 6534 } 6535 6536 return map; 6537 } 6538 6539 static _shr_rx_decap_tunnel_t dcb23_rx_decap_tunnel_map[] = { 6540 _SHR_RX_DECAP_NONE, 6541 _SHR_RX_DECAP_ACCESS_SVP, 6542 _SHR_RX_DECAP_MIM, 6543 _SHR_RX_DECAP_WTP2AC, 6544 _SHR_RX_DECAP_AC2AC, 6545 _SHR_RX_DECAP_AMT, 6546 _SHR_RX_DECAP_IP, 6547 _SHR_RX_DECAP_TRILL, 6548 _SHR_RX_DECAP_L2MPLS_1LABEL, 6549 _SHR_RX_DECAP_L2MPLS_1LABELCW, 6550 _SHR_RX_DECAP_L3MPLS_1LABEL, 6551 _SHR_RX_DECAP_L3MPLS_1LABELCW, 6552 _SHR_RX_DECAP_NONE, 6553 _SHR_RX_DECAP_L2GRE 6554 }; 6555 static uint32 dcb23_rx_decap_tunnel_get(dcb_t *dcb) { 6556 dcb23_t *d = (dcb23_t *)dcb; 6557 uint32 decap_tunnel_type = d->word11.overlay1.decap_tunnel_type; 6558 /* Check for array bounds */ 6559 if ( (decap_tunnel_type < 6560 (sizeof (dcb23_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) { 6561 return (uint32)dcb23_rx_decap_tunnel_map[decap_tunnel_type]; 6562 } 6563 return (uint32)_SHR_RX_DECAP_NONE; 6564 } 6565 6566 static uint32 6567 dcb23_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg) 6568 { 6569 dcb23_t *d = (dcb23_t *)dcb; 6570 uint32 hgh[4]; 6571 soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hgh[0]; 6572 COMPILER_REFERENCE(dt_mode); 6573 6574 hgh[0] = soc_htonl(d->mh0); 6575 hgh[1] = soc_htonl(d->mh1); 6576 hgh[2] = soc_htonl(d->mh2); 6577 hgh[3] = soc_htonl(d->mh3); 6578 6579 return ((ingport_is_hg && 6580 ((h->ppd_overlay1.ppd_type == 0) || 6581 (h->ppd_overlay1.ppd_type == 1))) ? 6582 ((d->itag_status) ? 0 : 2) : 6583 ((d->itag_status & 0x2) ? 6584 ((d->itag_status & 0x1) ? 0 : 2) : 6585 ((d->itag_status & 0x1) ? 1 : 3))); 6586 6587 6588 } 6589 6590 GETFUNCFIELD(23, xfercount, count) 6591 GETFUNCFIELD(23, rx_cos, word4.overlay1.queue_num) 6592 6593 /* Fields extracted from MH/PBI */ 6594 GETHG2FUNCFIELD(23, rx_destmod, dst_mod) 6595 GETHG2FUNCFIELD(23, rx_destport, dst_port) 6596 GETHG2FUNCFIELD(23, rx_srcmod, src_mod) 6597 GETHG2FUNCFIELD(23, rx_srcport, src_port) 6598 GETHG2FUNCFIELD(23, rx_opcode, opcode) 6599 GETHG2FUNCFIELD(23, rx_prio, vlan_pri) /* outer_pri */ 6600 GETHG2FUNCEXPR(23, rx_mcast, ((h->ppd_overlay1.dst_mod << 8) | 6601 (h->ppd_overlay1.dst_port))) 6602 GETHG2FUNCEXPR(23, rx_vclabel, ((h->ppd_overlay1.vc_label_19_16 << 16) | 6603 (h->ppd_overlay1.vc_label_15_8 << 8) | 6604 (h->ppd_overlay1.vc_label_7_0))) 6605 GETHG2FUNCEXPR(23, rx_classtag, (h->ppd_overlay1.ppd_type != 1 ? 0 : 6606 (h->ppd_overlay2.ctag_hi << 8) | 6607 (h->ppd_overlay2.ctag_lo))) 6608 GETFUNCFIELD(23, rx_matchrule, match_rule) 6609 GETFUNCFIELD(23, rx_reason, reason) 6610 GETFUNCFIELD(23, rx_reason_hi, reason_hi) 6611 GETFUNCFIELD(23, rx_ingport, srcport) 6612 GETFUNCEXPR(23, rx_mirror, ((SOC_CPU_OPCODE_TYPE_IP_0 == 6613 d->word4.overlay1.cpu_opcode_type) ? 6614 (d->reason & (1 << 17)) : 0)) 6615 GETFUNCFIELD(23, rx_timestamp, word12.overlay1.timestamp) 6616 GETFUNCFIELD(23, rx_timestamp_upper, word14.overlay1.timestamp_hi) 6617 GETPTREXPR(23, mhp, &(d->mh0)) 6618 GETFUNCFIELD(23, outer_vid, word4.overlay1.outer_vid) 6619 GETFUNCFIELD(23, outer_pri, word11.overlay1.outer_pri) 6620 GETFUNCFIELD(23, outer_cfi, word11.overlay1.outer_cfi) 6621 GETFUNCFIELD(23, rx_outer_tag_action, otag_action) 6622 GETFUNCFIELD(23, inner_vid, word11.overlay1.inner_vid) 6623 GETFUNCFIELD(23, inner_pri, inner_pri) 6624 GETFUNCFIELD(23, inner_cfi, word11.overlay1.inner_cfi) 6625 GETFUNCFIELD(23, rx_inner_tag_action, itag_action) 6626 GETFUNCFIELD(23, rx_bpdu, bpdu) 6627 GETFUNCEXPR(23, rx_l3_intf, ((d->replicated) ? (d->repl_nhi) : 6628 (((d->repl_nhi) & 0x40000) ? /* TR3 NHI */ 6629 (((d->repl_nhi) & 0x3ffff) + _SHR_L3_EGRESS_IDX_MIN) : 6630 ((d->repl_nhi) & 0x4000) ? /* HX4 NHI */ 6631 (((d->repl_nhi) & 0x3fff) + _SHR_L3_EGRESS_IDX_MIN) : 6632 (d->repl_nhi)))) 6633 GETFUNCFIELD(23, rx_switch_drop, all_switch_drop) 6634 GETFUNCNULL(23, olp_encap_oam_pkt) 6635 GETFUNCNULL(23, read_ecc_error) 6636 GETFUNCNULL(23, desc_remaining) 6637 SETFUNCNULL(23, desc_remaining) 6638 GETFUNCNULL(23, desc_status) 6639 SETFUNCNULL(23, desc_status) 6640 GETFUNCNULL(23, match_id_lo) 6641 GETFUNCNULL(23, match_id_hi) 6642 GETFUNCNULL(23, forwarding_type) 6643 GETFUNCNULL(23, forwarding_zone_id) 6644 6645 #ifdef PLISIM /* these routines are only used by pcid */ 6646 static void dcb23_status_init(dcb_t *dcb) 6647 { 6648 uint32 *d = (uint32 *)dcb; 6649 6650 d[2] = d[3] = d[4] = d[5] = d[10] = 0; 6651 d[11] = d[12] = d[13] = d[14] = d[15] = 0; 6652 } 6653 SETFUNCFIELD(23, rx_ingport, srcport, int val, val) 6654 #endif /* PLISIM */ 6655 6656 #ifdef BROADCOM_DEBUG 6657 static void 6658 dcb23_dump(int unit, dcb_t *dcb, char *prefix, int tx) 6659 { 6660 uint32 *p; 6661 int i, size; 6662 dcb19_t *dtx = (dcb19_t *)dcb; /* Fake out for different TX MH */ 6663 dcb23_t *d = (dcb23_t *)dcb; 6664 char ps[((DCB_MAX_SIZE/sizeof(uint32))*9)+1]; 6665 uint8 *h; 6666 #if defined(LE_HOST) 6667 uint32 hgh[4]; 6668 h = (uint8 *)&hgh[0]; 6669 6670 if (tx) { 6671 hgh[0] = soc_htonl(dtx->mh0); 6672 hgh[1] = soc_htonl(dtx->mh1); 6673 hgh[2] = soc_htonl(dtx->mh2); 6674 hgh[3] = soc_htonl(dtx->mh3); 6675 } else { 6676 hgh[0] = soc_htonl(d->mh0); 6677 hgh[1] = soc_htonl(d->mh1); 6678 hgh[2] = soc_htonl(d->mh2); 6679 hgh[3] = soc_htonl(d->mh3); 6680 } 6681 #else 6682 if (tx) { 6683 h = (uint8 *)&dtx->mh0; 6684 } else { 6685 h = (uint8 *)&d->mh0; 6686 } 6687 #endif 6688 6689 p = (uint32 *)dcb; 6690 size = SOC_DCB_SIZE(unit) / sizeof(uint32); 6691 for (i = 0; i < size; i++) { 6692 sal_sprintf(&ps[i*9], "%08x ", p[i]); 6693 } 6694 LOG_CLI((BSL_META_U(unit, 6695 "%s\t%s\n"), prefix, ps)); 6696 if ((SOC_DCB_HG_GET(unit, dcb)) || (SOC_DCB_RX_START_GET(unit, dcb))) { 6697 soc_dma_higig_dump(unit, prefix, h, 0, 0, NULL); 6698 } 6699 LOG_CLI((BSL_META_U(unit, 6700 "%s\ttype %d %schain %ssg %sreload %shg %sstat %spause " 6701 " %spurge\n"), 6702 prefix, 6703 SOC_DCB_TYPE(unit), 6704 SOC_DCB_CHAIN_GET(unit, dcb) ? "" : "!", 6705 SOC_DCB_SG_GET(unit, dcb) ? "" : "!", 6706 SOC_DCB_RELOAD_GET(unit, dcb) ? "" : "!", 6707 SOC_DCB_HG_GET(unit, dcb) ? "" : "!", 6708 SOC_DCB_STAT_GET(unit, dcb) ? "" : "!", 6709 d->c_pause ? "" : "!", 6710 SOC_DCB_PURGE_GET(unit, dcb) ? "" : "!")); 6711 LOG_CLI((BSL_META_U(unit, 6712 "%s\taddr %p reqcount %d xfercount %d\n"), 6713 prefix, 6714 (void *)SOC_DCB_ADDR_GET(unit, dcb), 6715 SOC_DCB_REQCOUNT_GET(unit, dcb), 6716 SOC_DCB_XFERCOUNT_GET(unit, dcb))); 6717 if (!tx) { 6718 LOG_CLI((BSL_META_U(unit, 6719 "%s\t%sdone %serror %sstart %send\n"), 6720 prefix, 6721 SOC_DCB_DONE_GET(unit, dcb) ? "" : "!", 6722 SOC_DCB_RX_ERROR_GET(unit, dcb) ? "" : "!", 6723 SOC_DCB_RX_START_GET(unit, dcb) ? "" : "!", 6724 SOC_DCB_RX_END_GET(unit, dcb) ? "" : "!")); 6725 } 6726 6727 if (tx || !SOC_DCB_RX_START_GET(unit, dcb)) { 6728 return; 6729 } 6730 6731 dcb0_reason_dump(unit, dcb, prefix); 6732 LOG_CLI((BSL_META_U(unit, 6733 "%s\t%schg_tos %sregen_crc %schg_ecn %svfi_valid" 6734 " %sdvp_nhi_sel\n"), 6735 prefix, 6736 d->word11.overlay1.chg_tos ? "" : "!", 6737 d->regen_crc ? "" : "!", 6738 d->chg_ecn ? "" : "!", 6739 d->vfi_valid ? "" : "!", 6740 d->dvp_nhi_sel ? "" : "!")); 6741 LOG_CLI((BSL_META_U(unit, 6742 "%s\t%sservice_tag %sswitch_pkt %shg_type %ssrc_hg\n"), 6743 prefix, 6744 d->service_tag ? "" : "!", 6745 d->switch_pkt ? "" : "!", 6746 d->hg_type ? "" : "!", 6747 d->src_hg ? "" : "!")); 6748 LOG_CLI((BSL_META_U(unit, 6749 "%s\t%sl3routed %sl3only %sreplicated %sdo_not_change_ttl" 6750 " %sbpdu\n"), 6751 prefix, 6752 d->l3routed ? "" : "!", 6753 d->l3only ? "" : "!", 6754 d->replicated ? "" : "!", 6755 d->do_not_change_ttl ? "" : "!", 6756 d->bpdu ? "" : "!")); 6757 LOG_CLI((BSL_META_U(unit, 6758 "%s\t%shg2_ext_hdr\n"), 6759 prefix, 6760 d->hg2_ext_hdr ? "" : "!")); 6761 if (d->hg2_ext_hdr) { 6762 LOG_CLI((BSL_META_U(unit, 6763 "%s\tHigig2 Extension: queue_tag=%04x %stm tag_type=%d" 6764 " seg_sel=%d\n"), 6765 prefix, 6766 d->word14.overlay2.eh_queue_tag, 6767 (d->word14.overlay2.eh_tm) ? "" : "!", 6768 d->word14.overlay2.eh_tag_type, 6769 d->word14.overlay2.eh_seg_sel)); 6770 } 6771 LOG_CLI((BSL_META_U(unit, 6772 "%s\treason_type=%d reason=%08x_%08x ts_type=%d" 6773 " timestamp=%08x_%08x"), 6774 prefix, 6775 d->word4.overlay1.cpu_opcode_type, 6776 d->reason_hi, 6777 d->reason, 6778 d->timestamp_type, 6779 d->word14.overlay1.timestamp_hi, 6780 d->word12.overlay1.timestamp)); 6781 LOG_CLI((BSL_META_U(unit, 6782 "%s\tsrcport=%d cpu_cos=%d hgi=%d lb_pkt_type=%d" 6783 " repl_nhi=%05x\n"), 6784 prefix, 6785 d->word4.overlay1.queue_num, 6786 d->hgi, 6787 d->loopback_pkt_type, 6788 d->srcport, 6789 d->repl_nhi)); 6790 LOG_CLI((BSL_META_U(unit, 6791 "%s\touter_vid=%d outer_cfi=%d outer_pri=%d otag_action=%d" 6792 " vntag_action=%d\n"), 6793 prefix, 6794 d->word4.overlay1.outer_vid, 6795 d->word11.overlay1.outer_cfi, 6796 d->word11.overlay1.outer_pri, 6797 d->otag_action, 6798 d->word11.overlay1.vntag_action)); 6799 LOG_CLI((BSL_META_U(unit, 6800 "%s\tinner_vid=%d inner_cfi=%d inner_pri=%d itag_action=%d" 6801 " itag_status=%d\n"), 6802 prefix, 6803 d->word11.overlay1.inner_vid, 6804 d->word11.overlay1.inner_cfi, 6805 d->inner_pri, 6806 d->itag_action, 6807 d->itag_status)); 6808 LOG_CLI((BSL_META_U(unit, 6809 "%s\tdscp=%d ecn=%d %sspecial_pkt %sall_switch_drop\n"), 6810 prefix, 6811 d->word11.overlay1.dscp, 6812 d->ecn, 6813 d->special_pkt ? "" : "!", 6814 d->all_switch_drop ? "" : "!")); 6815 LOG_CLI((BSL_META_U(unit, 6816 "%s\tdecap_tunnel_type=%d vfi=%d match_rule=%d" 6817 " mtp_ind=%d\n"), 6818 prefix, 6819 d->word11.overlay1.decap_tunnel_type, 6820 d->word12.overlay2.vfi, 6821 d->match_rule, 6822 d->mtp_index)); 6823 } 6824 #endif /* BROADCOM_DEBUG */ 6825 6826 dcb_op_t dcb23_op = { 6827 23, 6828 sizeof(dcb23_t), 6829 dcb23_rx_reason_maps, 6830 dcb23_rx_reason_map_get, 6831 dcb0_rx_reasons_get, 6832 dcb19_init, 6833 dcb19_addtx, 6834 dcb19_addrx, 6835 dcb19_intrinfo, 6836 dcb19_reqcount_set, 6837 dcb19_reqcount_get, 6838 dcb23_xfercount_get, 6839 dcb0_addr_set, 6840 dcb0_addr_get, 6841 dcb0_paddr_get, 6842 dcb19_done_set, 6843 dcb19_done_get, 6844 dcb19_sg_set, 6845 dcb19_sg_get, 6846 dcb19_chain_set, 6847 dcb19_chain_get, 6848 dcb19_reload_set, 6849 dcb19_reload_get, 6850 dcb19_desc_intr_set, 6851 dcb19_desc_intr_get, 6852 dcb19_tx_l2pbm_set, 6853 dcb19_tx_utpbm_set, 6854 dcb19_tx_l3pbm_set, 6855 dcb19_tx_crc_set, 6856 dcb19_tx_cos_set, 6857 dcb19_tx_destmod_set, 6858 dcb19_tx_destport_set, 6859 dcb19_tx_opcode_set, 6860 dcb19_tx_srcmod_set, 6861 dcb19_tx_srcport_set, 6862 dcb19_tx_prio_set, 6863 dcb19_tx_pfm_set, 6864 dcb23_rx_untagged_get, 6865 dcb19_rx_crc_get, 6866 dcb23_rx_cos_get, 6867 dcb23_rx_destmod_get, 6868 dcb23_rx_destport_get, 6869 dcb23_rx_opcode_get, 6870 dcb23_rx_classtag_get, 6871 dcb23_rx_matchrule_get, 6872 dcb19_rx_start_get, 6873 dcb19_rx_end_get, 6874 dcb19_rx_error_get, 6875 dcb23_rx_prio_get, 6876 dcb23_rx_reason_get, 6877 dcb23_rx_reason_hi_get, 6878 dcb23_rx_ingport_get, 6879 dcb23_rx_srcport_get, 6880 dcb23_rx_srcmod_get, 6881 dcb23_rx_mcast_get, 6882 dcb23_rx_vclabel_get, 6883 dcb23_rx_mirror_get, 6884 dcb23_rx_timestamp_get, 6885 dcb23_rx_timestamp_upper_get, 6886 dcb19_hg_set, 6887 dcb19_hg_get, 6888 dcb19_stat_set, 6889 dcb19_stat_get, 6890 dcb19_purge_set, 6891 dcb19_purge_get, 6892 dcb23_mhp_get, 6893 dcb23_outer_vid_get, 6894 dcb23_outer_pri_get, 6895 dcb23_outer_cfi_get, 6896 dcb23_rx_outer_tag_action_get, 6897 dcb23_inner_vid_get, 6898 dcb23_inner_pri_get, 6899 dcb23_inner_cfi_get, 6900 dcb23_rx_inner_tag_action_get, 6901 dcb23_rx_bpdu_get, 6902 dcb23_rx_l3_intf_get, 6903 dcb23_rx_decap_tunnel_get, 6904 dcb23_rx_switch_drop_get, 6905 dcb23_olp_encap_oam_pkt_get, 6906 dcb23_read_ecc_error_get, 6907 dcb23_desc_remaining_get, 6908 dcb23_desc_remaining_set, 6909 dcb23_desc_status_get, 6910 dcb23_desc_status_set, 6911 dcb23_match_id_lo_get, 6912 dcb23_match_id_hi_get, 6913 dcb23_forwarding_type_get, 6914 dcb23_forwarding_zone_id_get, 6915 #ifdef BROADCOM_DEBUG 6916 dcb19_tx_l2pbm_get, 6917 dcb19_tx_utpbm_get, 6918 dcb19_tx_l3pbm_get, 6919 dcb19_tx_crc_get, 6920 dcb19_tx_cos_get, 6921 dcb19_tx_destmod_get, 6922 dcb19_tx_destport_get, 6923 dcb19_tx_opcode_get, 6924 dcb19_tx_srcmod_get, 6925 dcb19_tx_srcport_get, 6926 dcb19_tx_prio_get, 6927 dcb19_tx_pfm_get, 6928 6929 dcb23_dump, 6930 dcb0_reason_dump, 6931 #endif /* BROADCOM_DEBUG */ 6932 #ifdef PLISIM 6933 dcb23_status_init, 6934 dcb19_xfercount_set, 6935 dcb19_rx_start_set, 6936 dcb19_rx_end_set, 6937 dcb19_rx_error_set, 6938 dcb19_rx_crc_set, 6939 dcb23_rx_ingport_set, 6940 #endif /* PLISIM */ 6941 NULL, 6942 }; 6943 #endif /* BCM_TRIUMPH3_SUPPORT */ 6944 6945 #if defined(BCM_KATANA_SUPPORT) 6946 /* 6947 * DCB Type 24 Support 6948 */ 6949 6950 static soc_rx_reason_t 6951 dcb24_rx_reason_map[] = { 6952 socRxReasonUnknownVlan, /* Offset 0 */ 6953 socRxReasonL2SourceMiss, /* Offset 1 */ 6954 socRxReasonL2DestMiss, /* Offset 2 */ 6955 socRxReasonL2Move, /* Offset 3 */ 6956 socRxReasonL2Cpu, /* Offset 4 */ 6957 socRxReasonSampleSource, /* Offset 5 */ 6958 socRxReasonSampleDest, /* Offset 6 */ 6959 socRxReasonL3SourceMiss, /* Offset 7 */ 6960 socRxReasonL3DestMiss, /* Offset 8 */ 6961 socRxReasonL3SourceMove, /* Offset 9 */ 6962 socRxReasonMcastMiss, /* Offset 10 */ 6963 socRxReasonIpMcastMiss, /* Offset 11 */ 6964 socRxReasonFilterMatch, /* Offset 12 */ 6965 socRxReasonL3HeaderError, /* Offset 13 */ 6966 socRxReasonProtocol, /* Offset 14 */ 6967 socRxReasonDosAttack, /* Offset 15 */ 6968 socRxReasonMartianAddr, /* Offset 16 */ 6969 socRxReasonTunnelError, /* Offset 17 */ 6970 socRxReasonMirror, /* Offset 18 */ 6971 socRxReasonIcmpRedirect, /* Offset 19 */ 6972 socRxReasonL3Slowpath, /* Offset 20 */ 6973 socRxReasonParityError, /* Offset 21 */ 6974 socRxReasonL3MtuFail, /* Offset 22 */ 6975 socRxReasonHigigHdrError, /* Offset 23 */ 6976 socRxReasonMcastIdxError, /* Offset 24 */ 6977 socRxReasonVlanFilterMatch, /* Offset 25 */ 6978 socRxReasonClassBasedMove, /* Offset 26 */ 6979 socRxReasonL3AddrBindFail, /* Offset 27 */ 6980 socRxReasonMplsLabelMiss, /* Offset 28 */ 6981 socRxReasonMplsInvalidAction, /* Offset 29 */ 6982 socRxReasonMplsInvalidPayload, /* Offset 30 */ 6983 socRxReasonMplsTtl, /* Offset 31 */ 6984 socRxReasonMplsSequenceNumber, /* Offset 32 */ 6985 socRxReasonL2NonUnicastMiss, /* Offset 33 */ 6986 socRxReasonNhop, /* Offset 34 */ 6987 socRxReasonBfdSlowpath, /* Offset 35 */ 6988 socRxReasonStation, /* Offset 36 */ 6989 socRxReasonNiv, /* Offset 37 */ 6990 socRxReasonNiv, /* Offset 38 */ 6991 socRxReasonNiv, /* Offset 39 */ 6992 socRxReasonVlanTranslate, /* Offset 40 */ 6993 socRxReasonTimeSync, /* Offset 41 */ 6994 socRxReasonOAMSlowpath, /* Offset 42 */ 6995 socRxReasonOAMError, /* Offset 43 */ 6996 socRxReasonOAMLMDM, /* Offset 44 */ 6997 socRxReasonL2LearnLimit, /* Offset 45 */ 6998 socRxReasonBfd, /* Offset 46 */ 6999 socRxReasonInvalid, /* Offset 47 */ 7000 socRxReasonInvalid, /* Offset 48 */ 7001 socRxReasonInvalid, /* Offset 49 */ 7002 socRxReasonInvalid, /* Offset 50 */ 7003 socRxReasonInvalid, /* Offset 51 */ 7004 socRxReasonInvalid, /* Offset 52 */ 7005 socRxReasonInvalid, /* Offset 53 */ 7006 socRxReasonInvalid, /* Offset 54 */ 7007 socRxReasonInvalid, /* Offset 55 */ 7008 socRxReasonInvalid, /* Offset 56 */ 7009 socRxReasonInvalid, /* Offset 57 */ 7010 socRxReasonInvalid, /* Offset 58 */ 7011 socRxReasonInvalid, /* Offset 59 */ 7012 socRxReasonInvalid, /* Offset 60 */ 7013 socRxReasonInvalid, /* Offset 61 */ 7014 socRxReasonInvalid, /* Offset 62 */ 7015 socRxReasonInvalid /* Offset 63 */ 7016 }; 7017 7018 static soc_rx_reason_t *dcb24_rx_reason_maps[] = { 7019 dcb24_rx_reason_map, 7020 NULL 7021 }; 7022 7023 static int 7024 dcb24_addrx(dv_t *dv, sal_vaddr_t addr, uint32 count, uint32 flags) 7025 { 7026 dcb24_t *d; /* DCB */ 7027 uint32 *di; /* DCB integer pointer */ 7028 7029 d = (dcb24_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); 7030 7031 if (dv->dv_vcnt > 0) { /* chain off previous dcb */ 7032 d[-1].c_chain = 1; 7033 } 7034 7035 di = (uint32 *)d; 7036 di[0] = di[1] = di[2] = di[3] = di[4] = 0; 7037 di[5] = di[6] = di[7] = di[8] = di[9] = di[10] = 0; 7038 di[11] = di[12] = di[13] = di[14] = di[15] = 0; 7039 7040 if (addr) { 7041 d->addr = soc_cm_l2p(dv->dv_unit, (void *)addr); 7042 } 7043 d->c_count = count; 7044 d->c_sg = 1; 7045 7046 dv->dv_vcnt += 1; 7047 return dv->dv_cnt - dv->dv_vcnt; 7048 } 7049 7050 static _shr_rx_decap_tunnel_t dcb24_rx_decap_tunnel_map[] = { 7051 _SHR_RX_DECAP_NONE, 7052 _SHR_RX_DECAP_ACCESS_SVP, 7053 _SHR_RX_DECAP_MIM, 7054 _SHR_RX_DECAP_NONE, 7055 _SHR_RX_DECAP_NONE, 7056 _SHR_RX_DECAP_NONE, 7057 _SHR_RX_DECAP_IP, 7058 _SHR_RX_DECAP_NONE, 7059 _SHR_RX_DECAP_L2MPLS_1LABEL, 7060 _SHR_RX_DECAP_L2MPLS_1LABELCW, 7061 _SHR_RX_DECAP_L3MPLS_1LABEL, 7062 _SHR_RX_DECAP_L3MPLS_1LABELCW, 7063 }; 7064 static uint32 dcb24_rx_decap_tunnel_get(dcb_t *dcb) { 7065 dcb24_t *d = (dcb24_t *)dcb; 7066 uint32 decap_tunnel_type = d->word11.overlay1.decap_tunnel_type; 7067 /* Check for array bounds */ 7068 if ( (decap_tunnel_type < 7069 (sizeof (dcb24_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) { 7070 return (uint32)dcb24_rx_decap_tunnel_map[decap_tunnel_type]; 7071 } 7072 return (uint32)_SHR_RX_DECAP_NONE; 7073 } 7074 GETFUNCEXPR(24, rx_mirror, (d->reason & (1 << 18))) 7075 GETFUNCEXPR(24, rx_l3_intf, ((d->replicated) ? (d->repl_nhi) : 7076 (((d->repl_nhi) & 0x1fff) + 7077 _SHR_L3_EGRESS_IDX_MIN))) 7078 7079 #ifdef BROADCOM_DEBUG 7080 static void 7081 dcb24_dump(int unit, dcb_t *dcb, char *prefix, int tx) 7082 { 7083 uint32 *p; 7084 int i, size; 7085 dcb19_t *dtx = (dcb19_t *)dcb; 7086 dcb24_t *drx = (dcb24_t *)dcb; 7087 char ps[((DCB_MAX_SIZE/sizeof(uint32))*9)+1]; 7088 uint8 *h; 7089 #if defined(LE_HOST) 7090 uint32 hgh[4]; 7091 h = (uint8 *)&hgh[0]; 7092 7093 if (tx) { 7094 hgh[0] = soc_htonl(dtx->mh0); 7095 hgh[1] = soc_htonl(dtx->mh1); 7096 hgh[2] = soc_htonl(dtx->mh2); 7097 hgh[3] = soc_htonl(dtx->mh3); 7098 } else { 7099 hgh[0] = soc_htonl(drx->mh0); 7100 hgh[1] = soc_htonl(drx->mh1); 7101 hgh[2] = soc_htonl(drx->mh2); 7102 hgh[3] = soc_htonl(drx->mh3); 7103 } 7104 #else 7105 if (tx) { 7106 h = (uint8 *)&dtx->mh0; 7107 } else { 7108 h = (uint8 *)&drx->mh0; 7109 } 7110 #endif 7111 7112 p = (uint32 *)dcb; 7113 size = SOC_DCB_SIZE(unit) / sizeof(uint32); 7114 for (i = 0; i < size; i++) { 7115 sal_sprintf(&ps[i*9], "%08x ", p[i]); 7116 } 7117 LOG_CLI((BSL_META_U(unit, 7118 "%s\t%s\n"), prefix, ps)); 7119 if ((SOC_DCB_HG_GET(unit, dcb)) || (SOC_DCB_RX_START_GET(unit, dcb))) { 7120 soc_dma_higig_dump(unit, prefix, h, 0, 0, NULL); 7121 } 7122 LOG_CLI((BSL_META_U(unit, 7123 "%s\ttype %d %schain %ssg %sreload %shg %sstat %spause " 7124 " %spurge\n"), 7125 prefix, 7126 SOC_DCB_TYPE(unit), 7127 SOC_DCB_CHAIN_GET(unit, dcb) ? "" : "!", 7128 SOC_DCB_SG_GET(unit, dcb) ? "" : "!", 7129 SOC_DCB_RELOAD_GET(unit, dcb) ? "" : "!", 7130 SOC_DCB_HG_GET(unit, dcb) ? "" : "!", 7131 SOC_DCB_STAT_GET(unit, dcb) ? "" : "!", 7132 dtx->c_pause ? "" : "!", 7133 SOC_DCB_PURGE_GET(unit, dcb) ? "" : "!")); 7134 LOG_CLI((BSL_META_U(unit, 7135 "%s\taddr %p reqcount %d xfercount %d\n"), 7136 prefix, 7137 (void *)SOC_DCB_ADDR_GET(unit, dcb), 7138 SOC_DCB_REQCOUNT_GET(unit, dcb), 7139 SOC_DCB_XFERCOUNT_GET(unit, dcb))); 7140 if (!tx) { 7141 LOG_CLI((BSL_META_U(unit, 7142 "%s\t%sdone %serror %sstart %send\n"), 7143 prefix, 7144 SOC_DCB_DONE_GET(unit, dcb) ? "" : "!", 7145 SOC_DCB_RX_ERROR_GET(unit, dcb) ? "" : "!", 7146 SOC_DCB_RX_START_GET(unit, dcb) ? "" : "!", 7147 SOC_DCB_RX_END_GET(unit, dcb) ? "" : "!")); 7148 } 7149 7150 if (tx || !SOC_DCB_RX_START_GET(unit, dcb)) { 7151 return; 7152 } 7153 7154 dcb0_reason_dump(unit, dcb, prefix); 7155 LOG_CLI((BSL_META_U(unit, 7156 "%s\t%schg_tos %sregen_crc %schg_ecn %svfi_valid\n"), 7157 prefix, 7158 drx->word11.overlay1.chg_tos ? "" : "!", 7159 drx->regen_crc ? "" : "!", 7160 drx->chg_ecn ? "" : "!", 7161 drx->vfi_valid ? "" : "!")); 7162 LOG_CLI((BSL_META_U(unit, 7163 "%s\t%sservice_tag %sswitch_pkt %shg_type %ssrc_hg\n"), 7164 prefix, 7165 drx->service_tag ? "" : "!", 7166 drx->switch_pkt ? "" : "!", 7167 drx->hg_type ? "" : "!", 7168 drx->src_hg ? "" : "!")); 7169 LOG_CLI((BSL_META_U(unit, 7170 "%s\t%sl3routed %sl3only %sreplicated %sdo_not_change_ttl" 7171 " %sbpdu\n"), 7172 prefix, 7173 drx->l3routed ? "" : "!", 7174 drx->l3only ? "" : "!", 7175 drx->replicated ? "" : "!", 7176 drx->do_not_change_ttl ? "" : "!", 7177 drx->bpdu ? "" : "!")); 7178 LOG_CLI((BSL_META_U(unit, 7179 "%s\t%shg2_ext_hdr\n"), 7180 prefix, 7181 drx->hg2_ext_hdr ? "" : "!")); 7182 if (drx->hg2_ext_hdr) { 7183 LOG_CLI((BSL_META_U(unit, 7184 "%s\tHigig2 Extension: queue_tag=%04x %stm tag_type=%d" 7185 " seg_sel=%d\n"), 7186 prefix, 7187 drx->word14.overlay2.eh_queue_tag, 7188 (drx->word14.overlay2.eh_tm) ? "" : "!", 7189 drx->word14.overlay2.eh_tag_type, 7190 drx->word14.overlay2.eh_seg_sel)); 7191 } 7192 LOG_CLI((BSL_META_U(unit, 7193 "%s\treason=%08x_%08x ts_type=%d" 7194 " timestamp=%08x_%08x"), 7195 prefix, 7196 drx->reason_hi, 7197 drx->reason, 7198 drx->timestamp_type, 7199 drx->word14.overlay1.timestamp_hi, 7200 drx->timestamp)); 7201 LOG_CLI((BSL_META_U(unit, 7202 "%s\tsrcport=%d queue_num=%d hgi=%d lb_pkt_type=%d" 7203 " repl_nhi=%05x\n"), 7204 prefix, 7205 drx->srcport, 7206 drx->word4.overlay1.queue_num, 7207 drx->hgi, 7208 drx->loopback_pkt_type, 7209 drx->repl_nhi)); 7210 LOG_CLI((BSL_META_U(unit, 7211 "%s\touter_vid=%d outer_cfi=%d outer_pri=%d otag_action=%d" 7212 " vntag_action=%d\n"), 7213 prefix, 7214 drx->word4.overlay1.outer_vid, 7215 drx->word11.overlay1.outer_cfi, 7216 drx->word11.overlay1.outer_pri, 7217 drx->otag_action, 7218 drx->word11.overlay1.vntag_action)); 7219 LOG_CLI((BSL_META_U(unit, 7220 "%s\tinner_vid=%d inner_cfi=%d inner_pri=%d itag_action=%d" 7221 " itag_status=%d\n"), 7222 prefix, 7223 drx->word11.overlay1.inner_vid, 7224 drx->word11.overlay1.inner_cfi, 7225 drx->inner_pri, 7226 drx->itag_action, 7227 drx->itag_status)); 7228 LOG_CLI((BSL_META_U(unit, 7229 "%s\tdscp=%d ecn=%d %sspecial_pkt %sall_switch_drop\n"), 7230 prefix, 7231 drx->word11.overlay1.dscp, 7232 drx->ecn, 7233 drx->oam_pkt ? "" : "!", 7234 drx->all_switch_drop ? "" : "!")); 7235 LOG_CLI((BSL_META_U(unit, 7236 "%s\tdecap_tunnel_type=%d vfi=%d match_rule=%d" 7237 " mtp_ind=%d\n"), 7238 prefix, 7239 drx->word11.overlay1.decap_tunnel_type, 7240 drx->timestamp & 0x3fff, 7241 drx->match_rule, 7242 drx->mtp_index)); 7243 } 7244 #endif /* BROADCOM_DEBUG */ 7245 7246 GETFUNCFIELD(24, outer_vid, word4.overlay1.outer_vid) 7247 7248 dcb_op_t dcb24_op = { 7249 24, 7250 sizeof(dcb24_t), 7251 dcb24_rx_reason_maps, 7252 dcb0_rx_reason_map_get, 7253 dcb0_rx_reasons_get, 7254 dcb19_init, 7255 dcb19_addtx, 7256 dcb24_addrx, 7257 dcb19_intrinfo, 7258 dcb19_reqcount_set, 7259 dcb19_reqcount_get, 7260 dcb23_xfercount_get, 7261 dcb0_addr_set, 7262 dcb0_addr_get, 7263 dcb0_paddr_get, 7264 dcb19_done_set, 7265 dcb19_done_get, 7266 dcb19_sg_set, 7267 dcb19_sg_get, 7268 dcb19_chain_set, 7269 dcb19_chain_get, 7270 dcb19_reload_set, 7271 dcb19_reload_get, 7272 dcb19_desc_intr_set, 7273 dcb19_desc_intr_get, 7274 dcb19_tx_l2pbm_set, 7275 dcb19_tx_utpbm_set, 7276 dcb19_tx_l3pbm_set, 7277 dcb19_tx_crc_set, 7278 dcb19_tx_cos_set, 7279 dcb19_tx_destmod_set, 7280 dcb19_tx_destport_set, 7281 dcb19_tx_opcode_set, 7282 dcb19_tx_srcmod_set, 7283 dcb19_tx_srcport_set, 7284 dcb19_tx_prio_set, 7285 dcb19_tx_pfm_set, 7286 dcb23_rx_untagged_get, 7287 dcb19_rx_crc_get, 7288 dcb23_rx_cos_get, 7289 dcb23_rx_destmod_get, 7290 dcb23_rx_destport_get, 7291 dcb23_rx_opcode_get, 7292 dcb23_rx_classtag_get, 7293 dcb23_rx_matchrule_get, 7294 dcb19_rx_start_get, 7295 dcb19_rx_end_get, 7296 dcb19_rx_error_get, 7297 dcb23_rx_prio_get, 7298 dcb23_rx_reason_get, 7299 dcb23_rx_reason_hi_get, 7300 dcb23_rx_ingport_get, 7301 dcb23_rx_srcport_get, 7302 dcb23_rx_srcmod_get, 7303 dcb23_rx_mcast_get, 7304 dcb23_rx_vclabel_get, 7305 dcb24_rx_mirror_get, 7306 dcb23_rx_timestamp_get, 7307 dcb23_rx_timestamp_upper_get, 7308 dcb19_hg_set, 7309 dcb19_hg_get, 7310 dcb19_stat_set, 7311 dcb19_stat_get, 7312 dcb19_purge_set, 7313 dcb19_purge_get, 7314 dcb23_mhp_get, 7315 dcb24_outer_vid_get, 7316 dcb23_outer_pri_get, 7317 dcb23_outer_cfi_get, 7318 dcb23_rx_outer_tag_action_get, 7319 dcb23_inner_vid_get, 7320 dcb23_inner_pri_get, 7321 dcb23_inner_cfi_get, 7322 dcb23_rx_inner_tag_action_get, 7323 dcb23_rx_bpdu_get, 7324 dcb24_rx_l3_intf_get, 7325 dcb24_rx_decap_tunnel_get, 7326 dcb23_rx_switch_drop_get, 7327 dcb23_olp_encap_oam_pkt_get, 7328 dcb23_read_ecc_error_get, 7329 dcb23_desc_remaining_get, 7330 dcb23_desc_remaining_set, 7331 dcb23_desc_status_get, 7332 dcb23_desc_status_set, 7333 dcb23_match_id_lo_get, 7334 dcb23_match_id_hi_get, 7335 dcb23_forwarding_type_get, 7336 dcb23_forwarding_zone_id_get, 7337 #ifdef BROADCOM_DEBUG 7338 dcb19_tx_l2pbm_get, 7339 dcb19_tx_utpbm_get, 7340 dcb19_tx_l3pbm_get, 7341 dcb19_tx_crc_get, 7342 dcb19_tx_cos_get, 7343 dcb19_tx_destmod_get, 7344 dcb19_tx_destport_get, 7345 dcb19_tx_opcode_get, 7346 dcb19_tx_srcmod_get, 7347 dcb19_tx_srcport_get, 7348 dcb19_tx_prio_get, 7349 dcb19_tx_pfm_get, 7350 7351 dcb24_dump, 7352 dcb0_reason_dump, 7353 #endif /* BROADCOM_DEBUG */ 7354 #ifdef PLISIM 7355 dcb23_status_init, 7356 dcb19_xfercount_set, 7357 dcb19_rx_start_set, 7358 dcb19_rx_end_set, 7359 dcb19_rx_error_set, 7360 dcb19_rx_crc_set, 7361 dcb23_rx_ingport_set, 7362 #endif /* PLISIM */ 7363 NULL, 7364 }; 7365 #endif /* BCM_KATANA_SUPPORT */ 7366 7367 #if defined(BCM_TRIDENT2_SUPPORT) 7368 /* 7369 * DCB Type 26 Support 7370 */ 7371 /* From FORMAT CPU_OPCODES */ 7372 static soc_rx_reason_t 7373 dcb26_rx_reason_map[] = { 7374 socRxReasonUnknownVlan, /* 0: CPU_UVLAN */ 7375 socRxReasonL2SourceMiss, /* 1: CPU_SLF */ 7376 socRxReasonL2DestMiss, /* 2: CPU_DLF */ 7377 socRxReasonL2Move, /* 3: CPU_L2MOVE */ 7378 socRxReasonL2Cpu, /* 4: CPU_L2CPU */ 7379 socRxReasonSampleSource, /* 5: CPU_SFLOW_SRC */ 7380 socRxReasonSampleDest, /* 6: CPU_SFLOW_DST */ 7381 socRxReasonL3SourceMiss, /* 7: CPU_L3SRC_MISS */ 7382 socRxReasonL3DestMiss, /* 8: CPU_L3DST_MISS */ 7383 socRxReasonL3SourceMove, /* 9: CPU_L3SRC_MOVE */ 7384 socRxReasonMcastMiss, /* 10: CPU_MC_MISS */ 7385 socRxReasonIpMcastMiss, /* 11: CPU_IPMC_MISS */ 7386 socRxReasonFilterMatch, /* 12: CPU_FFP */ 7387 socRxReasonL3HeaderError, /* 13: CPU_L3HDR_ERR */ 7388 socRxReasonProtocol, /* 14: CPU_PROTOCOL_PKT */ 7389 socRxReasonDosAttack, /* 15: CPU_DOS_ATTACK */ 7390 socRxReasonMartianAddr, /* 16: CPU_MARTIAN_ADDR */ 7391 socRxReasonTunnelError, /* 17: CPU_TUNNEL_ERR */ 7392 socRxReasonInvalid, /* 18: RESERVED_0 */ 7393 socRxReasonIcmpRedirect, /* 19: ICMP_REDIRECT */ 7394 socRxReasonL3Slowpath, /* 20: L3_SLOWPATH */ 7395 socRxReasonParityError, /* 21: PARITY_ERROR */ 7396 socRxReasonL3MtuFail, /* 22: L3_MTU_CHECK_FAIL */ 7397 socRxReasonHigigHdrError, /* 23: HGHDR_ERROR */ 7398 socRxReasonMcastIdxError, /* 24: MCIDX_ERROR */ 7399 socRxReasonVlanFilterMatch, /* 25: VFP */ 7400 socRxReasonClassBasedMove, /* 26: CBSM_PREVENTED */ 7401 socRxReasonL3AddrBindFail, /* 27: MAC_BIND_FAIL */ 7402 socRxReasonMplsLabelMiss, /* 28: MPLS_LABEL_MISS */ 7403 socRxReasonMplsInvalidAction, /* 29: MPLS_INVALID_ACTION */ 7404 socRxReasonMplsInvalidPayload, /* 30: MPLS_INVALID_PAYLOAD */ 7405 socRxReasonMplsTtl, /* 31: MPLS_TTL_CHECK_FAIL */ 7406 socRxReasonMplsSequenceNumber, /* 32: MPLS_SEQ_NUM_FAIL */ 7407 socRxReasonL2NonUnicastMiss, /* 33: PBT_NONUC_PKT */ 7408 socRxReasonNhop, /* 34: L3_NEXT_HOP */ 7409 socRxReasonMplsUnknownAch, /* 35: MPLS_UNKNOWN_ACH_ERROR */ 7410 socRxReasonStation, /* 36: MY_STATION */ 7411 socRxReasonNiv, /* 37: NIV_DROP_REASON_ENCODING */ 7412 socRxReasonNiv, /* 38: -> */ 7413 socRxReasonNiv, /* 39: 3-bit */ 7414 socRxReasonVlanTranslate, /* 40: VXLT_MISS */ 7415 socRxReasonTimeSync, /* 41: TIME_SYNC */ 7416 socRxReasonOAMSlowpath, /* 42: OAM_SLOWPATH */ 7417 socRxReasonOAMError, /* 43: OAM_ERROR */ 7418 socRxReasonTrill, /* 44: TRILL_DROP_REASON_ENCODING */ 7419 socRxReasonTrill, /* 45: -> */ 7420 socRxReasonTrill, /* 46: 3-bit */ 7421 socRxReasonL2GreSipMiss, /* 47: L2GRE_SIP_MISS */ 7422 socRxReasonL2GreVpnIdMiss, /* 48: L2GRE_VPNID_MISS */ 7423 socRxReasonBfdSlowpath, /* 49: BFD_SLOWPATH */ 7424 socRxReasonBfd, /* 50: BFD_ERROR */ 7425 socRxReasonOAMLMDM, /* 51: OAM_LMDM */ 7426 socRxReasonCongestionCnm, /* 52: ICNM */ 7427 socRxReasonMplsIllegalReservedLabel, /* 53: MPLS_ILLEGAL_RESERVED_LABEL */ 7428 socRxReasonMplsRouterAlertLabel, /* 54: MPLS_ALERT_LABEL */ 7429 socRxReasonCongestionCnmProxy, /* 55: QCN_CNM_PRP */ 7430 socRxReasonCongestionCnmProxyError, /* 56: QCN_CNM_PRP_DLF */ 7431 socRxReasonVxlanSipMiss, /* 57: VXLAN_SIP_MISS */ 7432 socRxReasonVxlanVpnIdMiss, /* 58: VXLAN_VN_ID_MISS */ 7433 socRxReasonFcoeZoneCheckFail, /* 59: FCOE_ZONE_CHECK_FAIL */ 7434 socRxReasonNat, /* 60: NAT_DROP_REASON_ENCODING */ 7435 socRxReasonNat, /* 61: -> */ 7436 socRxReasonNat, /* 62: 3-bit */ 7437 socRxReasonIpmcInterfaceMismatch /* 63: CPU_IPMC_INTERFACE_MISMATCH */ 7438 }; 7439 /* From FORMAT TRILL_CPU_OPCODE_ENCODING */ 7440 static soc_rx_reason_t dcb26_rx_reason_trill_encoding_map[] = { 7441 socRxReasonTrill, /* 0:NO_ERRORS 7442 * Base field, must match the entries above */ 7443 socRxReasonTrillInvalid, /* 1:TRILL_HDR_ERROR */ 7444 socRxReasonTrillMiss, /* 2:TRILL_LOOKUP_MISS */ 7445 socRxReasonTrillRpfFail, /* 3:TRILL_RPF_CHECK_FAIL */ 7446 socRxReasonTrillSlowpath, /* 4:TRILL_SLOWPATH */ 7447 socRxReasonTrillCoreIsIs, /* 5:TRILL_CORE_IS_IS_PKT */ 7448 socRxReasonTrillTtl, /* 6:TRILL_HOP_COUNT_CHECK_FAIL */ 7449 socRxReasonTrillName, /* 7:NICKNAME_TABLE_COPYTOCPU */ 7450 socRxReasonInvalid, /* Offset 8 */ 7451 socRxReasonInvalid, /* Offset 9 */ 7452 socRxReasonInvalid, /* Offset 10 */ 7453 socRxReasonInvalid, /* Offset 11 */ 7454 socRxReasonInvalid, /* Offset 12 */ 7455 socRxReasonInvalid, /* Offset 13 */ 7456 socRxReasonInvalid, /* Offset 14 */ 7457 socRxReasonInvalid, /* Offset 15 */ 7458 socRxReasonInvalid, /* Offset 16 */ 7459 socRxReasonInvalid, /* Offset 17 */ 7460 socRxReasonInvalid, /* Offset 18 */ 7461 socRxReasonInvalid, /* Offset 19 */ 7462 socRxReasonInvalid, /* Offset 20 */ 7463 socRxReasonInvalid, /* Offset 21 */ 7464 socRxReasonInvalid, /* Offset 22 */ 7465 socRxReasonInvalid, /* Offset 23 */ 7466 socRxReasonInvalid, /* Offset 24 */ 7467 socRxReasonInvalid, /* Offset 25 */ 7468 socRxReasonInvalid, /* Offset 26 */ 7469 socRxReasonInvalid, /* Offset 27 */ 7470 socRxReasonInvalid, /* Offset 28 */ 7471 socRxReasonInvalid, /* Offset 29 */ 7472 socRxReasonInvalid, /* Offset 30 */ 7473 socRxReasonInvalid, /* Offset 31 */ 7474 socRxReasonInvalid, /* Offset 32 */ 7475 socRxReasonInvalid, /* Offset 33 */ 7476 socRxReasonInvalid, /* Offset 34 */ 7477 socRxReasonInvalid, /* Offset 35 */ 7478 socRxReasonInvalid, /* Offset 36 */ 7479 socRxReasonInvalid, /* Offset 37 */ 7480 socRxReasonInvalid, /* Offset 38 */ 7481 socRxReasonInvalid, /* Offset 39 */ 7482 socRxReasonInvalid, /* Offset 40 */ 7483 socRxReasonInvalid, /* Offset 41 */ 7484 socRxReasonInvalid, /* Offset 42 */ 7485 socRxReasonInvalid, /* Offset 43 */ 7486 socRxReasonInvalid, /* Offset 44 */ 7487 socRxReasonInvalid, /* Offset 45 */ 7488 socRxReasonInvalid, /* Offset 46 */ 7489 socRxReasonInvalid, /* Offset 47 */ 7490 socRxReasonInvalid, /* Offset 48 */ 7491 socRxReasonInvalid, /* Offset 49 */ 7492 socRxReasonInvalid, /* Offset 50 */ 7493 socRxReasonInvalid, /* Offset 51 */ 7494 socRxReasonInvalid, /* Offset 52 */ 7495 socRxReasonInvalid, /* Offset 53 */ 7496 socRxReasonInvalid, /* Offset 54 */ 7497 socRxReasonInvalid, /* Offset 55 */ 7498 socRxReasonInvalid, /* Offset 56 */ 7499 socRxReasonInvalid, /* Offset 57 */ 7500 socRxReasonInvalid, /* Offset 58 */ 7501 socRxReasonInvalid, /* Offset 59 */ 7502 socRxReasonInvalid, /* Offset 60 */ 7503 socRxReasonInvalid, /* Offset 61 */ 7504 socRxReasonInvalid, /* Offset 62 */ 7505 socRxReasonInvalid /* Offset 63 */ 7506 }; 7507 /* From FORMAT NAT_CPU_OPCODE_ENCODING */ 7508 static soc_rx_reason_t dcb26_rx_reason_nat_encoding_map[] = { 7509 socRxReasonNat, /* 0:NOP 7510 * Base field, must match the entries above */ 7511 socRxReasonTcpUdpNatMiss, /* 1:NORMAL */ 7512 socRxReasonIcmpNatMiss, /* 2:ICMP */ 7513 socRxReasonNatFragment, /* 3:FRAGMEMT */ 7514 socRxReasonNatMiss, /* 4:OTHER */ 7515 socRxReasonInvalid, /* Offset 5 */ 7516 socRxReasonInvalid, /* Offset 6 */ 7517 socRxReasonInvalid, /* Offset 7 */ 7518 socRxReasonInvalid, /* Offset 8 */ 7519 socRxReasonInvalid, /* Offset 9 */ 7520 socRxReasonInvalid, /* Offset 10 */ 7521 socRxReasonInvalid, /* Offset 11 */ 7522 socRxReasonInvalid, /* Offset 12 */ 7523 socRxReasonInvalid, /* Offset 13 */ 7524 socRxReasonInvalid, /* Offset 14 */ 7525 socRxReasonInvalid, /* Offset 15 */ 7526 socRxReasonInvalid, /* Offset 16 */ 7527 socRxReasonInvalid, /* Offset 17 */ 7528 socRxReasonInvalid, /* Offset 18 */ 7529 socRxReasonInvalid, /* Offset 19 */ 7530 socRxReasonInvalid, /* Offset 20 */ 7531 socRxReasonInvalid, /* Offset 21 */ 7532 socRxReasonInvalid, /* Offset 22 */ 7533 socRxReasonInvalid, /* Offset 23 */ 7534 socRxReasonInvalid, /* Offset 24 */ 7535 socRxReasonInvalid, /* Offset 25 */ 7536 socRxReasonInvalid, /* Offset 26 */ 7537 socRxReasonInvalid, /* Offset 27 */ 7538 socRxReasonInvalid, /* Offset 28 */ 7539 socRxReasonInvalid, /* Offset 29 */ 7540 socRxReasonInvalid, /* Offset 30 */ 7541 socRxReasonInvalid, /* Offset 31 */ 7542 socRxReasonInvalid, /* Offset 32 */ 7543 socRxReasonInvalid, /* Offset 33 */ 7544 socRxReasonInvalid, /* Offset 34 */ 7545 socRxReasonInvalid, /* Offset 35 */ 7546 socRxReasonInvalid, /* Offset 36 */ 7547 socRxReasonInvalid, /* Offset 37 */ 7548 socRxReasonInvalid, /* Offset 38 */ 7549 socRxReasonInvalid, /* Offset 39 */ 7550 socRxReasonInvalid, /* Offset 40 */ 7551 socRxReasonInvalid, /* Offset 41 */ 7552 socRxReasonInvalid, /* Offset 42 */ 7553 socRxReasonInvalid, /* Offset 43 */ 7554 socRxReasonInvalid, /* Offset 44 */ 7555 socRxReasonInvalid, /* Offset 45 */ 7556 socRxReasonInvalid, /* Offset 46 */ 7557 socRxReasonInvalid, /* Offset 47 */ 7558 socRxReasonInvalid, /* Offset 48 */ 7559 socRxReasonInvalid, /* Offset 49 */ 7560 socRxReasonInvalid, /* Offset 50 */ 7561 socRxReasonInvalid, /* Offset 51 */ 7562 socRxReasonInvalid, /* Offset 52 */ 7563 socRxReasonInvalid, /* Offset 53 */ 7564 socRxReasonInvalid, /* Offset 54 */ 7565 socRxReasonInvalid, /* Offset 55 */ 7566 socRxReasonInvalid, /* Offset 56 */ 7567 socRxReasonInvalid, /* Offset 57 */ 7568 socRxReasonInvalid, /* Offset 58 */ 7569 socRxReasonInvalid, /* Offset 59 */ 7570 socRxReasonInvalid, /* Offset 60 */ 7571 socRxReasonInvalid, /* Offset 61 */ 7572 socRxReasonInvalid, /* Offset 62 */ 7573 socRxReasonInvalid /* Offset 63 */ 7574 }; 7575 static soc_rx_reason_t *dcb26_rx_reason_maps[] = { 7576 dcb26_rx_reason_map, 7577 dcb21_rx_reason_niv_encoding_map, 7578 dcb26_rx_reason_trill_encoding_map, 7579 dcb26_rx_reason_nat_encoding_map, 7580 NULL 7581 }; 7582 7583 static _shr_rx_decap_tunnel_t dcb26_rx_decap_tunnel_map[] = { 7584 _SHR_RX_DECAP_NONE, 7585 _SHR_RX_DECAP_ACCESS_SVP, 7586 _SHR_RX_DECAP_MIM, 7587 _SHR_RX_DECAP_L2GRE, 7588 _SHR_RX_DECAP_VXLAN, 7589 _SHR_RX_DECAP_AMT, 7590 _SHR_RX_DECAP_IP, 7591 _SHR_RX_DECAP_TRILL, 7592 _SHR_RX_DECAP_L2MPLS_1LABEL, 7593 _SHR_RX_DECAP_L2MPLS_2LABEL, 7594 _SHR_RX_DECAP_L2MPLS_1LABELCW, 7595 _SHR_RX_DECAP_L2MPLS_2LABELCW, 7596 _SHR_RX_DECAP_L3MPLS_1LABEL, 7597 _SHR_RX_DECAP_L3MPLS_2LABEL, 7598 _SHR_RX_DECAP_L3MPLS_1LABELCW, 7599 _SHR_RX_DECAP_L3MPLS_2LABELCW 7600 }; 7601 static uint32 dcb26_rx_decap_tunnel_get(dcb_t *dcb) { 7602 dcb26_t *d = (dcb26_t *)dcb; 7603 /* Check for array bounds */ 7604 if ( (d->word11.overlay1.decap_tunnel_type < 7605 (sizeof (dcb26_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) { 7606 return (uint32)dcb26_rx_decap_tunnel_map[d->word11.overlay1.decap_tunnel_type]; 7607 } 7608 return (uint32)_SHR_RX_DECAP_NONE; 7609 } 7610 static uint32 7611 dcb26_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg) 7612 { 7613 dcb26_t *d = (dcb26_t *)dcb; 7614 7615 COMPILER_REFERENCE(dt_mode); 7616 7617 return (ingport_is_hg ? 7618 ((d->tag_status) ? 0 : 2) : 7619 ((d->tag_status & 0x2) ? 7620 ((d->tag_status & 0x1) ? 0 : 2) : 7621 ((d->tag_status & 0x1) ? 1 : 3))); 7622 } 7623 7624 static uint32 7625 dcb26_rx_reason_get(dcb_t *dcb) 7626 { 7627 dcb26_t *d = (dcb26_t *)dcb; 7628 7629 return (d->switch_pkt) ? (d->reason) : 0; 7630 } 7631 7632 static uint32 7633 dcb26_rx_reason_hi_get(dcb_t *dcb) 7634 { 7635 dcb26_t *d = (dcb26_t *)dcb; 7636 7637 return (d->switch_pkt) ? (d->reason_hi) : 0; 7638 } 7639 7640 static uint32 7641 dcb26_rx_mirror_get(dcb_t *dcb) 7642 { 7643 dcb26_t *d = (dcb26_t *)dcb; 7644 7645 return (d->switch_pkt) ? 0 : 1; 7646 } 7647 7648 GETFUNCFIELD(26, xfercount, count) 7649 GETFUNCFIELD(26, rx_cos, word4.overlay2.cpu_cos) 7650 7651 /* Fields extracted from MH/PBI */ 7652 GETHG2FUNCFIELD(26, rx_destmod, dst_mod) 7653 GETHG2FUNCFIELD(26, rx_destport, dst_port) 7654 GETHG2FUNCFIELD(26, rx_srcmod, src_mod) 7655 GETHG2FUNCFIELD(26, rx_srcport, src_port) 7656 GETHG2FUNCFIELD(26, rx_opcode, opcode) 7657 GETHG2FUNCFIELD(26, rx_prio, vlan_pri) /* outer_pri */ 7658 GETHG2FUNCEXPR(26, rx_mcast, ((h->ppd_overlay1.dst_mod << 8) | 7659 (h->ppd_overlay1.dst_port))) 7660 GETHG2FUNCEXPR(26, rx_vclabel, ((h->ppd_overlay1.vc_label_19_16 << 16) | 7661 (h->ppd_overlay1.vc_label_15_8 << 8) | 7662 (h->ppd_overlay1.vc_label_7_0))) 7663 GETHG2FUNCEXPR(26, rx_classtag, (h->ppd_overlay1.ppd_type != 1 ? 0 : 7664 (h->ppd_overlay2.ctag_hi << 8) | 7665 (h->ppd_overlay2.ctag_lo))) 7666 GETFUNCFIELD(26, rx_matchrule, match_rule) 7667 GETFUNCFIELD(26, rx_ingport, srcport) 7668 GETFUNCFIELD(26, rx_timestamp, timestamp) 7669 GETFUNCFIELD(26, rx_timestamp_upper, word14.timestamp_hi) 7670 GETPTREXPR(26, mhp, &(d->mh0)) 7671 GETFUNCFIELD(26, outer_vid, word4.overlay1.outer_vid) 7672 GETFUNCFIELD(26, outer_pri, word11.overlay1.outer_pri) 7673 GETFUNCFIELD(26, outer_cfi, word11.overlay1.outer_cfi) 7674 GETFUNCFIELD(26, inner_vid, word11.overlay1.inner_vid) 7675 GETFUNCFIELD(26, inner_pri, inner_pri) 7676 GETFUNCFIELD(26, inner_cfi, word11.overlay1.inner_cfi) 7677 GETFUNCFIELD(26, rx_bpdu, bpdu) 7678 GETFUNCEXPR(26, rx_l3_intf, 7679 (((d->repl_nhi) & 0xffff) + _SHR_L3_EGRESS_IDX_MIN)) 7680 7681 #ifdef PLISIM /* these routines are only used by pcid */ 7682 SETFUNCFIELD(26, rx_ingport, srcport, int val, val) 7683 #endif /* PLISIM */ 7684 7685 #ifdef BROADCOM_DEBUG 7686 static void 7687 dcb26_dump(int unit, dcb_t *dcb, char *prefix, int tx) 7688 { 7689 uint32 *p; 7690 int i, size; 7691 dcb19_t *dtx = (dcb19_t *)dcb; /* Fake out for different TX MH */ 7692 dcb26_t *d = (dcb26_t *)dcb; 7693 char ps[((DCB_MAX_SIZE/sizeof(uint32))*9)+1]; 7694 uint8 *h; 7695 #if defined(LE_HOST) 7696 uint32 hgh[4]; 7697 h = (uint8 *)&hgh[0]; 7698 7699 if (tx) { 7700 hgh[0] = soc_htonl(dtx->mh0); 7701 hgh[1] = soc_htonl(dtx->mh1); 7702 hgh[2] = soc_htonl(dtx->mh2); 7703 hgh[3] = soc_htonl(dtx->mh3); 7704 } else { 7705 hgh[0] = soc_htonl(d->mh0); 7706 hgh[1] = soc_htonl(d->mh1); 7707 hgh[2] = soc_htonl(d->mh2); 7708 hgh[3] = soc_htonl(d->mh3); 7709 } 7710 #else 7711 if (tx) { 7712 h = (uint8 *)&dtx->mh0; 7713 } else { 7714 h = (uint8 *)&d->mh0; 7715 } 7716 #endif 7717 7718 p = (uint32 *)dcb; 7719 size = SOC_DCB_SIZE(unit) / sizeof(uint32); 7720 for (i = 0; i < size; i++) { 7721 sal_sprintf(&ps[i*9], "%08x ", p[i]); 7722 } 7723 LOG_CLI((BSL_META_U(unit, 7724 "%s\t%s\n"), prefix, ps)); 7725 if ((SOC_DCB_HG_GET(unit, dcb)) || (SOC_DCB_RX_START_GET(unit, dcb))) { 7726 soc_dma_higig_dump(unit, prefix, h, 0, 0, NULL); 7727 } 7728 LOG_CLI((BSL_META_U(unit, 7729 "%s\ttype %d %schain %ssg %sreload %shg %sstat %spause " 7730 " %spurge\n"), 7731 prefix, 7732 SOC_DCB_TYPE(unit), 7733 SOC_DCB_CHAIN_GET(unit, dcb) ? "" : "!", 7734 SOC_DCB_SG_GET(unit, dcb) ? "" : "!", 7735 SOC_DCB_RELOAD_GET(unit, dcb) ? "" : "!", 7736 SOC_DCB_HG_GET(unit, dcb) ? "" : "!", 7737 SOC_DCB_STAT_GET(unit, dcb) ? "" : "!", 7738 d->c_pause ? "" : "!", 7739 SOC_DCB_PURGE_GET(unit, dcb) ? "" : "!")); 7740 LOG_CLI((BSL_META_U(unit, 7741 "%s\taddr %p reqcount %d xfercount %d\n"), 7742 prefix, 7743 (void *)SOC_DCB_ADDR_GET(unit, dcb), 7744 SOC_DCB_REQCOUNT_GET(unit, dcb), 7745 SOC_DCB_XFERCOUNT_GET(unit, dcb))); 7746 if (!tx) { 7747 LOG_CLI((BSL_META_U(unit, 7748 "%s\t%sdone %serror %sstart %send\n"), 7749 prefix, 7750 SOC_DCB_DONE_GET(unit, dcb) ? "" : "!", 7751 SOC_DCB_RX_ERROR_GET(unit, dcb) ? "" : "!", 7752 SOC_DCB_RX_START_GET(unit, dcb) ? "" : "!", 7753 SOC_DCB_RX_END_GET(unit, dcb) ? "" : "!")); 7754 } 7755 7756 if (tx || !SOC_DCB_RX_START_GET(unit, dcb)) { 7757 return; 7758 } 7759 7760 dcb0_reason_dump(unit, dcb, prefix); 7761 LOG_CLI((BSL_META_U(unit, 7762 "%s\t%schg_tos %sregen_crc %schg_ecn %svfi_valid " 7763 "%sdvp_nhi_sel\n"), 7764 prefix, 7765 d->word11.overlay1.chg_tos ? "" : "!", 7766 d->regen_crc ? "" : "!", 7767 d->chg_ecn ? "" : "!", 7768 d->vfi_valid ? "" : "!", 7769 d->dvp_nhi_sel ? "" : "!")); 7770 LOG_CLI((BSL_META_U(unit, 7771 "%s\t%sservice_tag %sswitch_pkt %shg_type %ssrc_hg\n"), 7772 prefix, 7773 d->service_tag ? "" : "!", 7774 d->switch_pkt ? "" : "!", 7775 d->hg_type ? "" : "!", 7776 d->src_hg ? "" : "!")); 7777 LOG_CLI((BSL_META_U(unit, 7778 "%s\t%sl3routed %sl3only %sreplicated %sdo_not_change_ttl " 7779 "%sbpdu\n"), 7780 prefix, 7781 d->l3routed ? "" : "!", 7782 d->l3only ? "" : "!", 7783 d->replicated ? "" : "!", 7784 d->do_not_change_ttl ? "" : "!", 7785 d->bpdu ? "" : "!")); 7786 LOG_CLI((BSL_META_U(unit, 7787 "%s\t%shg2_ext_hdr %sspecial_pkt %sall_switch_drop\n"), 7788 prefix, 7789 d->hg2_ext_hdr ? "" : "!", 7790 d->special_pkt ? "" : "!", 7791 d->all_switch_drop ? "" : "!")); 7792 if (d->hg2_ext_hdr) { 7793 switch (d->word14.overlay1.eh_type) { 7794 case 0: 7795 LOG_CLI((BSL_META_U(unit, 7796 "%s\tHigig2 Extension type 0: queue_tag=0x%04x " 7797 "tag_type=%d seg_sel=%d\n"), 7798 prefix, 7799 d->word14.overlay1.eh_queue_tag, 7800 d->word14.overlay1.eh_tag_type, 7801 d->word14.overlay1.eh_seg_sel)); 7802 break; 7803 case 1: 7804 LOG_CLI((BSL_META_U(unit, 7805 "%s\tHigig2 Extension type 1: classid=%d l3_iif=%d " 7806 "classid_type=%d\n"), 7807 prefix, 7808 d->word14.overlay2.classid, 7809 d->word14.overlay2.l3_iif, 7810 d->word14.overlay2.classid_type)); 7811 break; 7812 case 2: 7813 LOG_CLI((BSL_META_U(unit, 7814 "%s\tHigig2 Extension type 2: classid=%d " 7815 "classid_type=%d\n"), 7816 prefix, 7817 d->word14.overlay2.classid, 7818 d->word14.overlay2.classid_type)); 7819 break; 7820 default: 7821 break; 7822 } 7823 } 7824 LOG_CLI((BSL_META_U(unit, 7825 "%s\treason_type=%d reason=%08x_%08x\n"), 7826 prefix, 7827 d->word4.overlay1.cpu_opcode_type, 7828 d->reason_hi, 7829 d->reason)); 7830 LOG_CLI((BSL_META_U(unit, 7831 "%s\tts_type=%d timestamp=%08x_%08x\n"), 7832 prefix, 7833 d->timestamp_type, 7834 d->word14.timestamp_hi, 7835 d->timestamp)); 7836 LOG_CLI((BSL_META_U(unit, 7837 "%s\tsrcport=%d cpu_cos=%d hgi=%d lb_pkt_type=%d " 7838 "repl_nhi=%05x\n"), 7839 prefix, 7840 d->srcport, 7841 d->word4.overlay2.cpu_cos, 7842 d->hgi, 7843 d->loopback_pkt_type, 7844 d->repl_nhi)); 7845 LOG_CLI((BSL_META_U(unit, 7846 "%s\touter_vid=%d outer_cfi=%d outer_pri=%d otag_action=%d " 7847 "vntag_action=%d\n"), 7848 prefix, 7849 d->word4.overlay1.outer_vid, 7850 d->word11.overlay1.outer_cfi, 7851 d->word11.overlay1.outer_pri, 7852 d->otag_action, 7853 d->word11.overlay1.vntag_action)); 7854 LOG_CLI((BSL_META_U(unit, 7855 "%s\tinner_vid=%d inner_cfi=%d inner_pri=%d itag_action=%d " 7856 "tag_status=%d\n"), 7857 prefix, 7858 d->word11.overlay1.inner_vid, 7859 d->word11.overlay1.inner_cfi, 7860 d->inner_pri, 7861 d->itag_action, 7862 d->tag_status)); 7863 LOG_CLI((BSL_META_U(unit, 7864 "%s\tdscp=%d ecn=%d decap_tunnel_type=%d match_rule=%d " 7865 "mtp_ind=%d\n"), 7866 prefix, 7867 d->word11.overlay1.dscp, 7868 d->ecn, 7869 d->word11.overlay1.decap_tunnel_type, 7870 d->match_rule, 7871 d->mtp_index)); 7872 } 7873 #endif /* BROADCOM_DEBUG */ 7874 7875 dcb_op_t dcb26_op = { 7876 26, 7877 sizeof(dcb26_t), 7878 dcb26_rx_reason_maps, 7879 dcb0_rx_reason_map_get, 7880 dcb21_rx_reasons_get, 7881 dcb19_init, 7882 dcb19_addtx, 7883 dcb19_addrx, 7884 dcb19_intrinfo, 7885 dcb19_reqcount_set, 7886 dcb19_reqcount_get, 7887 dcb26_xfercount_get, 7888 dcb0_addr_set, 7889 dcb0_addr_get, 7890 dcb0_paddr_get, 7891 dcb19_done_set, 7892 dcb19_done_get, 7893 dcb19_sg_set, 7894 dcb19_sg_get, 7895 dcb19_chain_set, 7896 dcb19_chain_get, 7897 dcb19_reload_set, 7898 dcb19_reload_get, 7899 dcb19_desc_intr_set, 7900 dcb19_desc_intr_get, 7901 dcb19_tx_l2pbm_set, 7902 dcb19_tx_utpbm_set, 7903 dcb19_tx_l3pbm_set, 7904 dcb19_tx_crc_set, 7905 dcb19_tx_cos_set, 7906 dcb19_tx_destmod_set, 7907 dcb19_tx_destport_set, 7908 dcb19_tx_opcode_set, 7909 dcb19_tx_srcmod_set, 7910 dcb19_tx_srcport_set, 7911 dcb19_tx_prio_set, 7912 dcb19_tx_pfm_set, 7913 dcb26_rx_untagged_get, 7914 dcb19_rx_crc_get, 7915 dcb26_rx_cos_get, 7916 dcb26_rx_destmod_get, 7917 dcb26_rx_destport_get, 7918 dcb26_rx_opcode_get, 7919 dcb26_rx_classtag_get, 7920 dcb26_rx_matchrule_get, 7921 dcb19_rx_start_get, 7922 dcb19_rx_end_get, 7923 dcb19_rx_error_get, 7924 dcb26_rx_prio_get, 7925 dcb26_rx_reason_get, 7926 dcb26_rx_reason_hi_get, 7927 dcb26_rx_ingport_get, 7928 dcb26_rx_srcport_get, 7929 dcb26_rx_srcmod_get, 7930 dcb26_rx_mcast_get, 7931 dcb26_rx_vclabel_get, 7932 dcb26_rx_mirror_get, 7933 dcb26_rx_timestamp_get, 7934 dcb26_rx_timestamp_upper_get, 7935 dcb19_hg_set, 7936 dcb19_hg_get, 7937 dcb19_stat_set, 7938 dcb19_stat_get, 7939 dcb19_purge_set, 7940 dcb19_purge_get, 7941 dcb26_mhp_get, 7942 dcb26_outer_vid_get, 7943 dcb26_outer_pri_get, 7944 dcb26_outer_cfi_get, 7945 dcb23_rx_outer_tag_action_get, 7946 dcb26_inner_vid_get, 7947 dcb26_inner_pri_get, 7948 dcb26_inner_cfi_get, 7949 dcb23_rx_inner_tag_action_get, 7950 dcb26_rx_bpdu_get, 7951 dcb26_rx_l3_intf_get, 7952 dcb26_rx_decap_tunnel_get, 7953 dcb23_rx_switch_drop_get, 7954 dcb23_olp_encap_oam_pkt_get, 7955 dcb23_read_ecc_error_get, 7956 dcb23_desc_remaining_get, 7957 dcb23_desc_remaining_set, 7958 dcb23_desc_status_get, 7959 dcb23_desc_status_set, 7960 dcb23_match_id_lo_get, 7961 dcb23_match_id_hi_get, 7962 dcb23_forwarding_type_get, 7963 dcb23_forwarding_zone_id_get, 7964 #ifdef BROADCOM_DEBUG 7965 dcb19_tx_l2pbm_get, 7966 dcb19_tx_utpbm_get, 7967 dcb19_tx_l3pbm_get, 7968 dcb19_tx_crc_get, 7969 dcb19_tx_cos_get, 7970 dcb19_tx_destmod_get, 7971 dcb19_tx_destport_get, 7972 dcb19_tx_opcode_get, 7973 dcb19_tx_srcmod_get, 7974 dcb19_tx_srcport_get, 7975 dcb19_tx_prio_get, 7976 dcb19_tx_pfm_get, 7977 7978 dcb26_dump, 7979 dcb0_reason_dump, 7980 #endif /* BROADCOM_DEBUG */ 7981 #ifdef PLISIM 7982 dcb23_status_init, 7983 dcb19_xfercount_set, 7984 dcb19_rx_start_set, 7985 dcb19_rx_end_set, 7986 dcb19_rx_error_set, 7987 dcb19_rx_crc_set, 7988 dcb26_rx_ingport_set, 7989 #endif /* PLISIM */ 7990 NULL, 7991 }; 7992 #endif /* BCM_TRIDENT2_SUPPORT */ 7993 7994 #endif /* BCM_XGS3_SWITCH_SUPPORT */ 7995 7996 7997 #ifdef BCM_PETRA_SUPPORT 7998 #ifdef PLISIM 7999 static void dcb28_status_init(dcb_t *dcb) 8000 { 8001 uint32 *d = (uint32 *)dcb; 8002 8003 d[5] = d[6] = d[7] = d[8] = d[9] = d[10] = 0; 8004 d[11] = d[12] = d[13] = d[14] = 0; 8005 } 8006 SETFUNCFIELD(28, xfercount, count, uint32 count, count) 8007 SETFUNCFIELD(28, rx_start, start, int val, val ? 1 : 0) 8008 SETFUNCFIELD(28, rx_end, end, int val, val ? 1 : 0) 8009 SETFUNCFIELD(28, rx_error, error, int val, val ? 1 : 0) 8010 SETFUNCEXPRIGNORE(28, rx_crc, int val, ignore) 8011 #endif 8012 #if defined(LE_HOST) 8013 static uint32 dcb28_rx_classtag_get(dcb_t *dcb) 8014 { 8015 dcb28_t *d = (dcb28_t *)dcb; 8016 uint32 hgh[3]; 8017 soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hgh[0]; 8018 hgh[0] = soc_htonl(d->mh0); 8019 hgh[1] = soc_htonl(d->mh1); 8020 hgh[2] = soc_htonl(d->mh2); 8021 if (h->overlay1.hdr_format != 1) { /* return 0 if not overlay 2 format */ 8022 return 0; 8023 } 8024 return((h->overlay2.ctag_hi << 8) | (h->overlay2.ctag_lo << 0)); 8025 } 8026 8027 static uint32 dcb28_rx_mcast_get(dcb_t *dcb) 8028 { 8029 dcb28_t *d = (dcb28_t *)dcb; 8030 uint32 hgh[3]; 8031 soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hgh[0]; 8032 hgh[0] = soc_htonl(d->mh0); 8033 hgh[1] = soc_htonl(d->mh1); 8034 hgh[2] = soc_htonl(d->mh2); 8035 return((h->overlay1.dst_mod << 5) | (h->overlay1.dst_port << 0)); 8036 } 8037 8038 #else 8039 static uint32 dcb28_rx_classtag_get(dcb_t *dcb) 8040 { 8041 dcb28_t *d = (dcb28_t *)dcb; 8042 soc_higig_hdr_t *h = (soc_higig_hdr_t *)&d->mh0; 8043 if (h->overlay1.hdr_format != 1) { /* return 0 if not overlay 2 format */ 8044 return 0; 8045 } 8046 return((h->overlay2.ctag_hi << 8) | (h->overlay2.ctag_lo << 0)); 8047 } 8048 8049 static uint32 dcb28_rx_mcast_get(dcb_t *dcb) 8050 { 8051 dcb28_t *d = (dcb28_t *)dcb; 8052 soc_higig_hdr_t *h = (soc_higig_hdr_t *)&d->mh0; 8053 return((h->overlay1.dst_mod << 5) | (h->overlay1.dst_port << 0)); 8054 } 8055 #endif 8056 static uint32 dcb28_rx_ingport_get(dcb_t *dcb) 8057 { 8058 uint32 *p; 8059 8060 p = (uint32 *)dcb; 8061 return (p[5] & 0xff); 8062 } 8063 8064 static uint32 dcb28_rx_cos_get(dcb_t *dcb) 8065 { 8066 uint32 *p; 8067 8068 p = (uint32 *)dcb; 8069 return (p[4] & 0x3f); 8070 } 8071 8072 8073 static uint32 dcb28_rx_crc_get(dcb_t *dcb) { 8074 return 0; 8075 } 8076 8077 8078 static void 8079 dcbArad_init(dcb_t *dcb) 8080 { 8081 uint32 *d = (uint32 *)dcb; 8082 8083 d[0] = d[1] = d[2] = d[3] = d[4] = 0; 8084 d[5] = d[6] = d[7] = d[8] = d[9] = d[10] = 0; 8085 d[11] = d[12] = d[13] = d[14] = d[15] = 0; 8086 } 8087 /*uint32 (*rx_error_get)(dcb_t *dcb); */ 8088 /* 8089 static uint32 8090 dcb28_Arad_error_get (dcb_t *dcb) 8091 { 8092 return 0; 8093 } 8094 */ 8095 8096 8097 static uint32 8098 dcb28_intrinfo(int unit, dcb_t *dcb, int tx, uint32 *count) 8099 { 8100 dcb28_t *d = (dcb28_t *)dcb; /* DCB */ 8101 uint32 f; /* SOC_DCB_INFO_* flags */ 8102 8103 if (!d->done) { 8104 return 0; 8105 } 8106 f = SOC_DCB_INFO_DONE; 8107 if (tx) { 8108 if (!d->c_sg) { 8109 f |= SOC_DCB_INFO_PKTEND; 8110 } 8111 } else { 8112 if (d->end) { 8113 f |= SOC_DCB_INFO_PKTEND; 8114 } 8115 } 8116 *count = d->count; 8117 return f; 8118 } 8119 8120 static int 8121 dcbArad_addtx(dv_t *dv, sal_vaddr_t addr, uint32 count, 8122 pbmp_t l2pbm, pbmp_t utpbm, pbmp_t l3pbm, uint32 flags, uint32 *hgh) 8123 { 8124 dcb28_t *d; /* DCB */ 8125 uint32 *di; /* DCB integer pointer */ 8126 uint32 paddr; /* Packet buffer physical address */ 8127 8128 d = (dcb28_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); 8129 8130 if (addr) { 8131 paddr = soc_cm_l2p(dv->dv_unit, (void *)addr); 8132 } else { 8133 paddr = 0; 8134 } 8135 8136 if (dv->dv_vcnt > 0 && (dv->dv_flags & DV_F_COMBINE_DCB) && 8137 (d[-1].c_sg != 0) && 8138 (d[-1].addr + d[-1].c_count) == paddr && 8139 d[-1].c_count + count <= DCB_MAX_REQCOUNT) { 8140 d[-1].c_count += count; 8141 return dv->dv_cnt - dv->dv_vcnt; 8142 } 8143 8144 if (dv->dv_vcnt >= dv->dv_cnt) { 8145 return SOC_E_FULL; 8146 } 8147 if (dv->dv_vcnt > 0) { /* chain off previous dcb */ 8148 d[-1].c_chain = 1; 8149 } 8150 8151 di = (uint32 *)d; 8152 di[0] = di[1] = di[2] = di[3] = di[4] = 0; 8153 di[5] = di[6] = di[7] = di[8] = di[9] = di[10] = 0; 8154 di[11] = di[12] = di[13] = di[14] = di[15] = 0; 8155 8156 d->addr = paddr; 8157 d->c_count = count; 8158 d->c_sg = 1; 8159 8160 d->c_stat = 1; 8161 d->c_purge = SOC_DMA_PURGE_GET(flags); 8162 d->c_hg = SOC_DMA_HG_GET(flags); 8163 8164 if (SOC_DMA_HG_GET(flags) && (hgh != NULL)) { 8165 d->mh0 = soc_ntohl(hgh[0]); 8166 d->mh1 = 0; 8167 d->mh2 = 0; 8168 d->mh3 = 0; 8169 } 8170 8171 dv->dv_vcnt += 1; 8172 8173 return dv->dv_cnt - dv->dv_vcnt; 8174 } 8175 8176 static int 8177 dcbArad_addrx(dv_t *dv, sal_vaddr_t addr, uint32 count, uint32 flags) 8178 { 8179 dcb28_t *d; /* DCB */ 8180 uint32 *di; /* DCB integer pointer */ 8181 8182 d = (dcb28_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); 8183 8184 if (dv->dv_vcnt > 0) { /* chain off previous dcb */ 8185 d[-1].c_chain = 1; 8186 } 8187 8188 di = (uint32 *)d; 8189 di[0] = di[1] = di[2] = di[3] = di[4] = 0; 8190 di[5] = di[6] = di[7] = di[8] = di[9] = di[10] = 0; 8191 di[11] = di[12] = di[13] = di[14] = di[15] = 0; 8192 8193 if (addr) { 8194 d->addr = soc_cm_l2p(dv->dv_unit, (void *)addr); 8195 } 8196 d->c_count = count; 8197 d->c_sg = 1; 8198 8199 dv->dv_vcnt += 1; 8200 return dv->dv_cnt - dv->dv_vcnt; 8201 } 8202 8203 #ifdef BROADCOM_DEBUG 8204 static void 8205 dcb28_dump(int unit, dcb_t *dcb, char *prefix, int tx) 8206 { 8207 uint32 *p; 8208 int i, size; 8209 dcb28_t *d = (dcb28_t *)dcb; 8210 char ps[((DCB_MAX_SIZE/sizeof(uint32))*9)+1]; 8211 LOG_CLI((BSL_META_U(unit, 8212 "================================================================\n"))); 8213 p = (uint32 *)dcb; 8214 size = SOC_DCB_SIZE(unit) / sizeof(uint32); 8215 for (i = 0; i < size; i++) { 8216 sal_sprintf(&ps[i*9], "%08x ", p[i]); 8217 } 8218 LOG_CLI((BSL_META_U(unit, 8219 "%s\t%s\n"), prefix, ps)); 8220 #if 0 8221 if ((SOC_DCB_HG_GET(unit, dcb)) || (SOC_DCB_RX_START_GET(unit, dcb))) { 8222 soc_dma_higig_dump(unit, prefix, h, 0, 0, NULL); 8223 } 8224 #endif 8225 LOG_CLI((BSL_META_U(unit, 8226 "%s\ttype %d %ssg %schain %sreload %shg %sstat %spause %spurge\n"), 8227 prefix, 8228 SOC_DCB_TYPE(unit), 8229 SOC_DCB_SG_GET(unit, dcb) ? "" : "!", 8230 SOC_DCB_CHAIN_GET(unit, dcb) ? "" : "!", 8231 SOC_DCB_RELOAD_GET(unit, dcb) ? "" : "!", 8232 SOC_DCB_HG_GET(unit, dcb) ? "" : "!", 8233 SOC_DCB_STAT_GET(unit, dcb) ? "" : "!", 8234 d->c_pause ? "" : "!", 8235 SOC_DCB_PURGE_GET(unit, dcb) ? "" : "!")); 8236 LOG_CLI((BSL_META_U(unit, 8237 "%s\taddr %p reqcount %d xfercount %d\n"), 8238 prefix, 8239 (void *)SOC_DCB_ADDR_GET(unit, dcb), 8240 SOC_DCB_REQCOUNT_GET(unit, dcb), 8241 SOC_DCB_XFERCOUNT_GET(unit, dcb))); 8242 if (!tx) { 8243 LOG_CLI((BSL_META_U(unit, 8244 "%s\t%sdone %sstart %send %serror\n"), 8245 prefix, 8246 SOC_DCB_DONE_GET(unit, dcb) ? "" : "!", 8247 SOC_DCB_RX_START_GET(unit, dcb) ? "" : "!", 8248 SOC_DCB_RX_END_GET(unit, dcb) ? "" : "!", 8249 SOC_DCB_RX_ERROR_GET(unit, dcb) ? "" : "!")); 8250 } 8251 8252 if ((!tx) && (SOC_DCB_RX_START_GET(unit, dcb)) && 8253 (SOC_DCB_TYPE(unit) == 28)) { 8254 dcb0_reason_dump(unit, dcb, prefix); 8255 LOG_CLI((BSL_META_U(unit, 8256 "%s %sadd_vid %sbpdu %scell_error %schg_tos %semirror %simirror\n"), 8257 prefix, 8258 d->add_vid ? "" : "!", 8259 d->bpdu ? "" : "!", 8260 d->cell_error ? "" : "!", 8261 d->chg_tos ? "" : "!", 8262 d->emirror ? "" : "!", 8263 d->imirror ? "" : "!" 8264 )); 8265 LOG_CLI((BSL_META_U(unit, 8266 "%s %sl3ipmc %sl3only %sl3uc %spkt_aged %spurge_cell %ssrc_hg\n"), 8267 prefix, 8268 d->l3ipmc ? "" : "!", 8269 d->l3only ? "" : "!", 8270 d->l3uc ? "" : "!", 8271 d->pkt_aged ? "" : "!", 8272 d->purge_cell ? "" : "!", 8273 d->src_hg ? "" : "!" 8274 )); 8275 LOG_CLI((BSL_META_U(unit, 8276 "%s %sswitch_pkt %sregen_crc %sdecap_iptunnel %sing_untagged\n"), 8277 prefix, 8278 d->switch_pkt ? "" : "!", 8279 d->regen_crc ? "" : "!", 8280 d->decap_iptunnel ? "" : "!", 8281 d->ingress_untagged ? "" : "!" 8282 )); 8283 LOG_CLI((BSL_META_U(unit, 8284 "%s cpu_cos=%d cos=%d l3_intf=%d mtp_index=%d reason=%08x\n"), 8285 prefix, 8286 d->cpu_cos, 8287 d->cos, 8288 d->l3_intf, 8289 (d->mtp_index_hi << 2) | d->mtp_index_lo, 8290 d->reason 8291 )); 8292 LOG_CLI((BSL_META_U(unit, 8293 "%s match_rule=%d nh_index=%d\n"), 8294 prefix, 8295 d->match_rule, 8296 d->nh_index 8297 )); 8298 LOG_CLI((BSL_META_U(unit, 8299 "%s srcport=%d dscp=%d outer_pri=%d outer_cfi=%d outer_vid=%d\n"), 8300 prefix, 8301 d->srcport, 8302 (d->dscp_hi << 4) | d->dscp_lo, 8303 d->outer_pri, 8304 d->outer_cfi, 8305 d->outer_vid 8306 )); 8307 } 8308 LOG_CLI((BSL_META_U(unit, 8309 "################################################################\n"))); 8310 8311 } 8312 #endif /* BROADCOM_DEBUG */ 8313 8314 static uint32 8315 dcb28_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg) 8316 { 8317 dcb28_t *d = (dcb28_t *)dcb; 8318 uint32 hgh[3]; 8319 soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hgh[0]; 8320 8321 hgh[0] = soc_htonl(d->mh0); 8322 hgh[1] = soc_htonl(d->mh1); 8323 hgh[2] = soc_htonl(d->mh2); 8324 8325 return (dt_mode ? 8326 (ingport_is_hg ? 8327 (h->hgp_overlay1.ingress_tagged ? 0 : 2) : 8328 (h->hgp_overlay1.ingress_tagged ? 8329 (d->add_vid ? 1 : 0) : 8330 (d->add_vid ? 3 : 2))) : 8331 (h->hgp_overlay1.ingress_tagged ? 2 : 3)); 8332 } 8333 8334 #ifdef BROADCOM_DEBUG 8335 GETFUNCERR(28, tx_l2pbm) 8336 GETFUNCERR(28, tx_utpbm) 8337 GETFUNCERR(28, tx_l3pbm) 8338 GETFUNCERR(28, tx_crc) 8339 GETFUNCERR(28, tx_cos) 8340 GETFUNCERR(28, tx_destmod) 8341 GETFUNCERR(28, tx_destport) 8342 GETFUNCERR(28, tx_opcode) 8343 GETFUNCERR(28, tx_srcmod) 8344 GETFUNCERR(28, tx_srcport) 8345 GETFUNCERR(28, tx_prio) 8346 GETFUNCERR(28, tx_pfm) 8347 #endif /* BROADCOM_DEBUG */ 8348 8349 SETFUNCFIELD(28, reqcount, c_count, uint32 count, count) 8350 GETFUNCFIELD(28, reqcount, c_count) 8351 GETFUNCFIELD(28, xfercount, count) 8352 /* addr_set, addr_get, paddr_get - Same as DCB 0 */ 8353 SETFUNCFIELD(28, done, done, int val, val ? 1 : 0) 8354 GETFUNCFIELD(28, done, done) 8355 SETFUNCFIELD(28, sg, c_sg, int val, val ? 1 : 0) 8356 GETFUNCFIELD(28, sg, c_sg) 8357 SETFUNCFIELD(28, chain, c_chain, int val, val ? 1 : 0) 8358 GETFUNCFIELD(28, chain, c_chain) 8359 SETFUNCFIELD(28, reload, c_reload, int val, val ? 1 : 0) 8360 GETFUNCFIELD(28, reload, c_reload) 8361 SETFUNCERR(28, desc_intr, int) 8362 GETFUNCERR(28, desc_intr) 8363 SETFUNCERR(28, tx_l2pbm, pbmp_t) 8364 SETFUNCERR(28, tx_utpbm, pbmp_t) 8365 SETFUNCERR(28, tx_l3pbm, pbmp_t) 8366 SETFUNCERR(28, tx_crc, int) 8367 SETFUNCERR(28, tx_cos, int) 8368 SETFUNCERR(28, tx_destmod, uint32) 8369 SETFUNCERR(28, tx_destport, uint32) 8370 SETFUNCERR(28, tx_opcode, uint32) 8371 SETFUNCERR(28, tx_srcmod, uint32) 8372 SETFUNCERR(28, tx_srcport, uint32) 8373 SETFUNCERR(28, tx_prio, uint32) 8374 SETFUNCERR(28, tx_pfm, uint32) 8375 GETFUNCFIELD(28, rx_start, start) 8376 GETFUNCFIELD(28, rx_end, end) 8377 GETFUNCFIELD(28, rx_error, error) 8378 /* Fields extracted from MH/PBI */ 8379 GETHGFUNCEXPR(28, rx_destmod, (h->overlay1.dst_mod | 8380 (h->hgp_overlay1.dst_mod_5 << 5))) 8381 GETHGFUNCFIELD(28, rx_destport, dst_port) 8382 GETHGFUNCFIELD(28, rx_opcode, opcode) 8383 GETHGFUNCFIELD(28, rx_prio, vlan_pri) /* outer_pri */ 8384 8385 8386 8387 8388 GETHGFUNCFIELD(28, rx_srcport, src_port) 8389 GETHGFUNCEXPR(28, rx_srcmod, (h->overlay1.src_mod | 8390 (h->hgp_overlay1.src_mod_5 << 5))) 8391 /* DCB 9 specific fields */ 8392 SETFUNCFIELD(28, hg, c_hg, uint32 hg, hg) 8393 GETFUNCFIELD(28, hg, c_hg) 8394 SETFUNCFIELD(28, stat, c_stat, uint32 stat, stat) 8395 GETFUNCFIELD(28, stat, c_stat) 8396 SETFUNCFIELD(28, purge, c_purge, uint32 purge, purge) 8397 GETFUNCFIELD(28, purge, c_purge) 8398 GETPTREXPR(28, mhp, &(d->mh0)) 8399 GETFUNCNULL(28, rx_outer_tag_action) 8400 GETFUNCNULL(28, inner_vid) 8401 GETFUNCNULL(28, inner_pri) 8402 GETFUNCNULL(28, inner_cfi) 8403 GETFUNCNULL(28, rx_inner_tag_action) 8404 GETFUNCFIELD(28, rx_bpdu, bpdu) 8405 GETFUNCFIELD(28, rx_l3_intf, l3_intf) 8406 GETFUNCNULL(28, rx_decap_tunnel) 8407 GETFUNCNULL(28, rx_switch_drop) 8408 GETFUNCNULL(28, olp_encap_oam_pkt) 8409 GETFUNCNULL(28, read_ecc_error) 8410 GETFUNCNULL(28, desc_remaining) 8411 SETFUNCNULL(28, desc_remaining) 8412 GETFUNCNULL(28, desc_status) 8413 SETFUNCNULL(28, desc_status) 8414 GETFUNCNULL(28, match_id_lo) 8415 GETFUNCNULL(28, match_id_hi) 8416 GETFUNCNULL(28, forwarding_type) 8417 GETFUNCNULL(28, forwarding_zone_id) 8418 8419 static soc_rx_reason_t 8420 dcb28_rx_reason_map[] = { 8421 socRxReasonUnknownVlan, /* Offset 0 */ 8422 socRxReasonL2SourceMiss, /* Offset 1 */ 8423 socRxReasonL2DestMiss, /* Offset 2 */ 8424 socRxReasonL2Move, /* Offset 3 */ 8425 socRxReasonL2Cpu, /* Offset 4 */ 8426 socRxReasonSampleSource, /* Offset 5 */ 8427 socRxReasonSampleDest, /* Offset 6 */ 8428 socRxReasonL3SourceMiss, /* Offset 7 */ 8429 socRxReasonL3DestMiss, /* Offset 8 */ 8430 socRxReasonL3SourceMove, /* Offset 9 */ 8431 socRxReasonMcastMiss, /* Offset 10 */ 8432 socRxReasonIpMcastMiss, /* Offset 11 */ 8433 socRxReasonFilterMatch, /* Offset 12 */ 8434 socRxReasonL3HeaderError, /* Offset 13 */ 8435 socRxReasonProtocol, /* Offset 14 */ 8436 socRxReasonDosAttack, /* Offset 15 */ 8437 socRxReasonMartianAddr, /* Offset 16 */ 8438 socRxReasonTunnelError, /* Offset 17 */ 8439 socRxReasonL2MtuFail, /* Offset 18 */ 8440 socRxReasonIcmpRedirect, /* Offset 19 */ 8441 socRxReasonL3Slowpath, /* Offset 20 */ 8442 socRxReasonParityError, /* Offset 21 */ 8443 socRxReasonL3MtuFail, /* Offset 22 */ 8444 socRxReasonHigigHdrError, /* Offset 23 */ 8445 socRxReasonMcastIdxError, /* Offset 24 */ 8446 socRxReasonVlanFilterMatch, /* Offset 25 */ 8447 socRxReasonClassBasedMove, /* Offset 26 */ 8448 socRxReasonL2LearnLimit, /* Offset 27 */ 8449 socRxReasonMplsLabelMiss, /* Offset 28 */ 8450 socRxReasonMplsInvalidAction, /* Offset 29 */ 8451 socRxReasonMplsInvalidPayload, /* Offset 30 */ 8452 socRxReasonMplsTtl, /* Offset 31 */ 8453 socRxReasonMplsSequenceNumber, /* Offset 32 */ 8454 socRxReasonL2NonUnicastMiss, /* Offset 33 */ 8455 socRxReasonNhop, /* Offset 34 */ 8456 socRxReasonMirror, /* Offset 35 */ 8457 socRxReasonInvalid, /* Offset 36 */ 8458 socRxReasonInvalid, /* Offset 37 */ 8459 socRxReasonInvalid, /* Offset 38 */ 8460 socRxReasonInvalid, /* Offset 39 */ 8461 socRxReasonInvalid, /* Offset 40 */ 8462 socRxReasonInvalid, /* Offset 41 */ 8463 socRxReasonInvalid, /* Offset 42 */ 8464 socRxReasonInvalid, /* Offset 43 */ 8465 socRxReasonInvalid, /* Offset 44 */ 8466 socRxReasonInvalid, /* Offset 45 */ 8467 socRxReasonInvalid, /* Offset 46 */ 8468 socRxReasonInvalid, /* Offset 47 */ 8469 socRxReasonInvalid, /* Offset 48 */ 8470 socRxReasonInvalid, /* Offset 49 */ 8471 socRxReasonInvalid, /* Offset 50 */ 8472 socRxReasonInvalid, /* Offset 51 */ 8473 socRxReasonInvalid, /* Offset 52 */ 8474 socRxReasonInvalid, /* Offset 53 */ 8475 socRxReasonInvalid, /* Offset 54 */ 8476 socRxReasonInvalid, /* Offset 55 */ 8477 socRxReasonInvalid, /* Offset 56 */ 8478 socRxReasonInvalid, /* Offset 57 */ 8479 socRxReasonInvalid, /* Offset 58 */ 8480 socRxReasonInvalid, /* Offset 59 */ 8481 socRxReasonInvalid, /* Offset 60 */ 8482 socRxReasonInvalid, /* Offset 61 */ 8483 socRxReasonInvalid, /* Offset 62 */ 8484 socRxReasonInvalid /* Offset 63 */ 8485 }; 8486 8487 static soc_rx_reason_t *dcb28_rx_reason_maps[] = { 8488 dcb28_rx_reason_map, 8489 NULL 8490 }; 8491 8492 GETFUNCFIELD(28, rx_matchrule, match_rule) 8493 GETFUNCNULL(28, rx_reason_hi) 8494 GETFUNCFIELD(28, rx_reason, reason) 8495 GETFUNCERR(28, rx_vclabel) 8496 GETFUNCERR(28, rx_mirror) 8497 GETFUNCERR(28, rx_timestamp) 8498 GETFUNCERR(28, rx_timestamp_upper) 8499 GETFUNCERR(28, outer_vid) 8500 GETFUNCERR(28, outer_pri) 8501 GETFUNCERR(28, outer_cfi) 8502 #ifdef PLISIM /* these routines are only used by pcid */ 8503 SETFUNCFIELD(28, rx_ingport, srcport, int val, val) 8504 #endif /* PLISIM */ 8505 8506 8507 dcb_op_t dcb28_op = { 8508 28, 8509 sizeof(dcb28_t), 8510 dcb28_rx_reason_maps, 8511 dcb0_rx_reason_map_get, 8512 dcb0_rx_reasons_get, 8513 dcbArad_init, 8514 dcbArad_addtx, 8515 dcbArad_addrx, 8516 dcb28_intrinfo, 8517 dcb28_reqcount_set, 8518 dcb28_reqcount_get, 8519 dcb28_xfercount_get, 8520 dcb0_addr_set, 8521 dcb0_addr_get, 8522 dcb0_paddr_get, 8523 dcb28_done_set, 8524 dcb28_done_get, 8525 dcb28_sg_set, 8526 dcb28_sg_get, 8527 dcb28_chain_set, 8528 dcb28_chain_get, 8529 dcb28_reload_set, 8530 dcb28_reload_get, 8531 dcb28_desc_intr_set, 8532 dcb28_desc_intr_get, 8533 dcb28_tx_l2pbm_set, 8534 dcb28_tx_utpbm_set, 8535 dcb28_tx_l3pbm_set, 8536 dcb28_tx_crc_set, 8537 dcb28_tx_cos_set, 8538 dcb28_tx_destmod_set, 8539 dcb28_tx_destport_set, 8540 dcb28_tx_opcode_set, 8541 dcb28_tx_srcmod_set, 8542 dcb28_tx_srcport_set, 8543 dcb28_tx_prio_set, 8544 dcb28_tx_pfm_set, 8545 dcb28_rx_untagged_get, 8546 dcb28_rx_crc_get, 8547 dcb28_rx_cos_get, 8548 dcb28_rx_destmod_get, 8549 dcb28_rx_destport_get, 8550 dcb28_rx_opcode_get, 8551 dcb28_rx_classtag_get, 8552 dcb28_rx_matchrule_get, 8553 dcb28_rx_start_get, 8554 dcb28_rx_end_get, 8555 dcb28_rx_error_get, 8556 /*dcb28_Arad_error_get,*/ 8557 dcb28_rx_prio_get, 8558 dcb28_rx_reason_get, 8559 dcb28_rx_reason_hi_get, 8560 dcb28_rx_ingport_get, 8561 dcb28_rx_srcport_get, 8562 dcb28_rx_srcmod_get, 8563 dcb28_rx_mcast_get, 8564 dcb28_rx_vclabel_get, 8565 dcb28_rx_mirror_get, 8566 dcb28_rx_timestamp_get, 8567 dcb28_rx_timestamp_upper_get, 8568 dcb28_hg_set, 8569 dcb28_hg_get, 8570 dcb28_stat_set, 8571 dcb28_stat_get, 8572 dcb28_purge_set, 8573 dcb28_purge_get, 8574 dcb28_mhp_get, 8575 dcb28_outer_vid_get, 8576 dcb28_outer_pri_get, 8577 dcb28_outer_cfi_get, 8578 dcb28_rx_outer_tag_action_get, 8579 dcb28_inner_vid_get, 8580 dcb28_inner_pri_get, 8581 dcb28_inner_cfi_get, 8582 dcb28_rx_inner_tag_action_get, 8583 dcb28_rx_bpdu_get, 8584 dcb28_rx_l3_intf_get, 8585 dcb28_rx_decap_tunnel_get, 8586 dcb28_rx_switch_drop_get, 8587 dcb28_olp_encap_oam_pkt_get, 8588 dcb28_read_ecc_error_get, 8589 dcb28_desc_remaining_get, 8590 dcb28_desc_remaining_set, 8591 dcb28_desc_status_get, 8592 dcb28_desc_status_set, 8593 dcb28_match_id_lo_get, 8594 dcb28_match_id_hi_get, 8595 dcb28_forwarding_type_get, 8596 dcb28_forwarding_zone_id_get, 8597 #ifdef BROADCOM_DEBUG 8598 dcb28_tx_l2pbm_get, 8599 dcb28_tx_utpbm_get, 8600 dcb28_tx_l3pbm_get, 8601 dcb28_tx_crc_get, 8602 dcb28_tx_cos_get, 8603 dcb28_tx_destmod_get, 8604 dcb28_tx_destport_get, 8605 dcb28_tx_opcode_get, 8606 dcb28_tx_srcmod_get, 8607 dcb28_tx_srcport_get, 8608 dcb28_tx_prio_get, 8609 dcb28_tx_pfm_get, 8610 8611 dcb28_dump, 8612 dcb0_reason_dump, 8613 #endif /* BROADCOM_DEBUG */ 8614 #ifdef PLISIM 8615 dcb28_status_init, 8616 dcb28_xfercount_set, 8617 dcb28_rx_start_set, 8618 dcb28_rx_end_set, 8619 dcb28_rx_error_set, 8620 dcb28_rx_crc_set, 8621 dcb28_rx_ingport_set, 8622 #endif /* PLISIM */ 8623 NULL, 8624 }; 8625 #endif /* BCM_PETRA_SUPPORT */ 8626 8627 8628 #if defined(BCM_KATANA2_SUPPORT) 8629 /* 8630 * DCB Type 29 Support 8631 */ 8632 8633 #ifdef BROADCOM_DEBUG 8634 static void 8635 dcb29_dump(int unit, dcb_t *dcb, char *prefix, int tx) 8636 { 8637 uint32 *p; 8638 int i, size; 8639 dcb19_t *dtx = (dcb19_t *)dcb; /* Fake out for different TX MH */ 8640 dcb29_t *d = (dcb29_t *)dcb; 8641 char ps[((DCB_MAX_SIZE/sizeof(uint32))*9)+1]; 8642 uint8 *h; 8643 #if defined(LE_HOST) 8644 uint32 hgh[4]; 8645 h = (uint8 *)&hgh[0]; 8646 8647 if (tx) { 8648 hgh[0] = soc_htonl(dtx->mh0); 8649 hgh[1] = soc_htonl(dtx->mh1); 8650 hgh[2] = soc_htonl(dtx->mh2); 8651 hgh[3] = soc_htonl(dtx->mh3); 8652 } else { 8653 hgh[0] = soc_htonl(d->mh0); 8654 hgh[1] = soc_htonl(d->mh1); 8655 hgh[2] = soc_htonl(d->mh2); 8656 hgh[3] = soc_htonl(d->mh3); 8657 } 8658 #else 8659 if (tx) { 8660 h = (uint8 *)&dtx->mh0; 8661 } else { 8662 h = (uint8 *)&d->mh0; 8663 } 8664 #endif 8665 8666 p = (uint32 *)dcb; 8667 size = SOC_DCB_SIZE(unit) / sizeof(uint32); 8668 for (i = 0; i < size; i++) { 8669 sal_sprintf(&ps[i*9], "%08x ", p[i]); 8670 } 8671 LOG_CLI((BSL_META_U(unit, 8672 "%s\t%s\n"), prefix, ps)); 8673 if ((SOC_DCB_HG_GET(unit, dcb)) || (SOC_DCB_RX_START_GET(unit, dcb))) { 8674 soc_dma_higig_dump(unit, prefix, h, 0, 0, NULL); 8675 } 8676 LOG_CLI((BSL_META_U(unit, 8677 "%s\ttype %d %schain %ssg %sreload %shg %sstat %spause " 8678 " %spurge\n"), 8679 prefix, 8680 SOC_DCB_TYPE(unit), 8681 SOC_DCB_CHAIN_GET(unit, dcb) ? "" : "!", 8682 SOC_DCB_SG_GET(unit, dcb) ? "" : "!", 8683 SOC_DCB_RELOAD_GET(unit, dcb) ? "" : "!", 8684 SOC_DCB_HG_GET(unit, dcb) ? "" : "!", 8685 SOC_DCB_STAT_GET(unit, dcb) ? "" : "!", 8686 d->c_pause ? "" : "!", 8687 SOC_DCB_PURGE_GET(unit, dcb) ? "" : "!")); 8688 LOG_CLI((BSL_META_U(unit, 8689 "%s\taddr %p reqcount %d xfercount %d\n"), 8690 prefix, 8691 (void *)SOC_DCB_ADDR_GET(unit, dcb), 8692 SOC_DCB_REQCOUNT_GET(unit, dcb), 8693 SOC_DCB_XFERCOUNT_GET(unit, dcb))); 8694 if (!tx) { 8695 LOG_CLI((BSL_META_U(unit, 8696 "%s\t%sdone %serror %sstart %send\n"), 8697 prefix, 8698 SOC_DCB_DONE_GET(unit, dcb) ? "" : "!", 8699 SOC_DCB_RX_ERROR_GET(unit, dcb) ? "" : "!", 8700 SOC_DCB_RX_START_GET(unit, dcb) ? "" : "!", 8701 SOC_DCB_RX_END_GET(unit, dcb) ? "" : "!")); 8702 } 8703 8704 if (tx || !SOC_DCB_RX_START_GET(unit, dcb)) { 8705 return; 8706 } 8707 8708 dcb0_reason_dump(unit, dcb, prefix); 8709 LOG_CLI((BSL_META_U(unit, 8710 "%s\t%schg_tos %sregen_crc %schg_ecn %svfi_valid\n"), 8711 prefix, 8712 d->word11.overlay1.chg_tos ? "" : "!", 8713 d->regen_crc ? "" : "!", 8714 d->chg_ecn ? "" : "!", 8715 d->vfi_valid ? "" : "!")); 8716 LOG_CLI((BSL_META_U(unit, 8717 "%s\t%sservice_tag %sswitch_pkt %shg_type %ssrc_hg\n"), 8718 prefix, 8719 d->service_tag ? "" : "!", 8720 d->switch_pkt ? "" : "!", 8721 d->hg_type ? "" : "!", 8722 d->src_hg ? "" : "!")); 8723 LOG_CLI((BSL_META_U(unit, 8724 "%s\t%sl3routed %sl3only %sreplicated %sdo_not_change_ttl" 8725 " %sbpdu\n"), 8726 prefix, 8727 d->l3routed ? "" : "!", 8728 d->l3only ? "" : "!", 8729 d->replicated ? "" : "!", 8730 d->do_not_change_ttl ? "" : "!", 8731 d->bpdu ? "" : "!")); 8732 LOG_CLI((BSL_META_U(unit, 8733 "%s\t%shg2_ext_hdr\n"), 8734 prefix, 8735 d->hg2_ext_hdr ? "" : "!")); 8736 if (d->hg2_ext_hdr) { 8737 LOG_CLI((BSL_META_U(unit, 8738 "%s\tHigig2 Extension: queue_tag=%04x tag_type=%d" 8739 " seg_sel=%d\n"), 8740 prefix, 8741 d->word14.overlay3.eh_queue_tag, 8742 d->word14.overlay3.eh_tag_type, 8743 d->word14.overlay3.eh_seg_sel)); 8744 } 8745 LOG_CLI((BSL_META_U(unit, 8746 "%s\treason_type=%d reason=%08x_%08x ts_type=%d" 8747 " timestamp=%08x_%08x"), 8748 prefix, 8749 d->word4.overlay1.cpu_opcode_type, 8750 d->word2.overlay1.reason_hi, 8751 d->reason, 8752 d->timestamp_type, 8753 d->word14.overlay1.timestamp_hi, 8754 d->word12.overlay1.timestamp)); 8755 LOG_CLI((BSL_META_U(unit, 8756 "%s\tsrcport=%d cpu_cos=%d hgi=%d lb_pkt_type=%d" 8757 " repl_nhi=%05x\n"), 8758 prefix, 8759 d->srcport, 8760 d->word4.overlay3.queue_num, 8761 d->hgi, 8762 d->loopback_pkt_type, 8763 d->repl_nhi)); 8764 LOG_CLI((BSL_META_U(unit, 8765 "%s\touter_vid=%d outer_cfi=%d outer_pri=%d otag_action=%d" 8766 " vntag_action=%d\n"), 8767 prefix, 8768 d->word4.overlay1.outer_vid, 8769 d->word11.overlay1.outer_cfi, 8770 d->word11.overlay1.outer_pri, 8771 d->otag_action, 8772 d->word11.overlay1.vntag_action)); 8773 LOG_CLI((BSL_META_U(unit, 8774 "%s\tinner_vid=%d inner_cfi=%d inner_pri=%d itag_action=%d" 8775 " itag_status=%d\n"), 8776 prefix, 8777 d->word11.overlay1.inner_vid, 8778 d->word11.overlay1.inner_cfi, 8779 d->inner_pri, 8780 d->itag_action, 8781 d->itag_status)); 8782 LOG_CLI((BSL_META_U(unit, 8783 "%s\tdscp=%d ecn=%d %soam_pkt %solp %sall_switch_drop\n" 8784 " ma_ptr=%04x\n"), 8785 prefix, 8786 d->word11.overlay1.dscp, 8787 d->ecn, 8788 d->oam_pkt ? "" : "!", 8789 d->word4.overlay3.olp_encap_oam_pkt ? "" : "!", 8790 d->all_switch_drop ? "" : "!", 8791 d->word2.overlay2.ma_ptr)); 8792 LOG_CLI((BSL_META_U(unit, 8793 "%s\tdecap_tunnel_type=%d vfi=%d match_rule=%d" 8794 " mtp_ind=%d\n"), 8795 prefix, 8796 d->word11.overlay1.decap_tunnel_type, 8797 d->word12.overlay2.vfi, 8798 d->match_rule, 8799 d->mtp_index)); 8800 } 8801 #endif /* BROADCOM_DEBUG */ 8802 8803 /* 8804 * DCB Type 29 Support 8805 */ 8806 static soc_rx_reason_t 8807 dcb29_rx_reason_map_ip_0[] = { /* IP Overlay 0 */ 8808 socRxReasonUnknownVlan, /* Offset 0 */ 8809 socRxReasonL2SourceMiss, /* Offset 1 */ 8810 socRxReasonL2DestMiss, /* Offset 2 */ 8811 socRxReasonL2Move, /* Offset 3 */ 8812 socRxReasonL2Cpu, /* Offset 4 */ 8813 socRxReasonSampleSource, /* Offset 5 */ 8814 socRxReasonSampleDest, /* Offset 6 */ 8815 socRxReasonL3SourceMiss, /* Offset 7 */ 8816 socRxReasonL3DestMiss, /* Offset 8 */ 8817 socRxReasonL3SourceMove, /* Offset 9 */ 8818 socRxReasonMcastMiss, /* Offset 10 */ 8819 socRxReasonIpMcastMiss, /* Offset 11 */ 8820 socRxReasonFilterMatch, /* Offset 12 */ 8821 socRxReasonL3HeaderError, /* Offset 13 */ 8822 socRxReasonProtocol, /* Offset 14 */ 8823 socRxReasonDosAttack, /* Offset 15 */ 8824 socRxReasonMartianAddr, /* Offset 16 */ 8825 socRxReasonTunnelError, /* Offset 17 */ 8826 socRxReasonMirror, /* Offset 18 */ 8827 socRxReasonIcmpRedirect, /* Offset 19 */ 8828 socRxReasonL3Slowpath, /* Offset 20 */ 8829 socRxReasonParityError, /* Offset 21 */ 8830 socRxReasonL3MtuFail, /* Offset 22 */ 8831 socRxReasonHigigHdrError, /* Offset 23 */ 8832 socRxReasonMcastIdxError, /* Offset 24 */ 8833 socRxReasonVlanFilterMatch, /* Offset 25 */ 8834 socRxReasonClassBasedMove, /* Offset 26 */ 8835 socRxReasonL3AddrBindFail, /* Offset 27 */ 8836 socRxReasonMplsLabelMiss, /* Offset 28 */ 8837 socRxReasonMplsInvalidAction, /* Offset 29 */ 8838 socRxReasonMplsInvalidPayload, /* Offset 30 */ 8839 socRxReasonMplsTtl, /* Offset 31 */ 8840 socRxReasonMplsSequenceNumber, /* Offset 32 */ 8841 socRxReasonL2NonUnicastMiss, /* Offset 33 */ 8842 socRxReasonNhop, /* Offset 34 */ 8843 socRxReasonBfdSlowpath, /* Offset 35 */ 8844 socRxReasonStation, /* Offset 36 */ 8845 socRxReasonVlanTranslate, /* Offset 37 */ 8846 socRxReasonTimeSync, /* Offset 38 */ 8847 socRxReasonL2LearnLimit, /* Offset 39 */ 8848 socRxReasonBfd, /* Offset 40 */ 8849 socRxReasonFailoverDrop, /* Offset 41 */ 8850 socRxReasonUnknownSubtendingPort, /* Offset 42 */ 8851 socRxReasonMplsReservedEntropyLabel, /* Offset 43 */ 8852 socRxReasonLLTagAbsentDrop, /* Offset 44 */ 8853 socRxReasonLLTagPresentDrop, /* Offset 45 */ 8854 socRxReasonMplsLookupsExceeded, /* Offset 46 */ 8855 socRxReasonMplsIllegalReservedLabel, /* Offset 47 */ 8856 socRxReasonMplsRouterAlertLabel, /* Offset 48 */ 8857 socRxReasonMplsUnknownAch, /* Offset 49 */ 8858 socRxReasonInvalid, /* Offset 50 */ 8859 socRxReasonInvalid, /* Offset 51 */ 8860 socRxReasonInvalid, /* Offset 52 */ 8861 socRxReasonInvalid, /* Offset 53 */ 8862 socRxReasonInvalid, /* Offset 54 */ 8863 socRxReasonInvalid, /* Offset 55 */ 8864 socRxReasonInvalid, /* Offset 56 */ 8865 socRxReasonInvalid, /* Offset 57 */ 8866 socRxReasonInvalid, /* Offset 58 */ 8867 socRxReasonInvalid, /* Offset 59 */ 8868 socRxReasonInvalid, /* Offset 60 */ 8869 socRxReasonInvalid, /* Offset 61 */ 8870 socRxReasonInvalid, /* Offset 62 */ 8871 socRxReasonInvalid /* Offset 63 */ 8872 }; 8873 8874 static soc_rx_reason_t 8875 dcb29_rx_reason_map_ip_1[] = { /* IP Overlay 1 */ 8876 socRxReasonUnknownVlan, /* Offset 0 */ 8877 socRxReasonL2SourceMiss, /* Offset 1 */ 8878 socRxReasonL2DestMiss, /* Offset 2 */ 8879 socRxReasonL2Move, /* Offset 3 */ 8880 socRxReasonL2Cpu, /* Offset 4 */ 8881 socRxReasonSampleSource, /* Offset 5 */ 8882 socRxReasonSampleDest, /* Offset 6 */ 8883 socRxReasonL3SourceMiss, /* Offset 7 */ 8884 socRxReasonL3DestMiss, /* Offset 8 */ 8885 socRxReasonL3SourceMove, /* Offset 9 */ 8886 socRxReasonMcastMiss, /* Offset 10 */ 8887 socRxReasonIpMcastMiss, /* Offset 11 */ 8888 socRxReasonFilterMatch, /* Offset 12 */ 8889 socRxReasonL3HeaderError, /* Offset 13 */ 8890 socRxReasonProtocol, /* Offset 14 */ 8891 socRxReasonDosAttack, /* Offset 15 */ 8892 socRxReasonMartianAddr, /* Offset 16 */ 8893 socRxReasonTunnelError, /* Offset 17 */ 8894 socRxReasonMirror, /* Offset 18 */ 8895 socRxReasonIcmpRedirect, /* Offset 19 */ 8896 socRxReasonL3Slowpath, /* Offset 20 */ 8897 socRxReasonParityError, /* Offset 21 */ 8898 socRxReasonL3MtuFail, /* Offset 22 */ 8899 socRxReasonHigigHdrError, /* Offset 23 */ 8900 socRxReasonMcastIdxError, /* Offset 24 */ 8901 socRxReasonVlanFilterMatch, /* Offset 25 */ 8902 socRxReasonClassBasedMove, /* Offset 26 */ 8903 socRxReasonL3AddrBindFail, /* Offset 27 */ 8904 socRxReasonMplsLabelMiss, /* Offset 28 */ 8905 socRxReasonMplsInvalidAction, /* Offset 29 */ 8906 socRxReasonMplsInvalidPayload, /* Offset 30 */ 8907 socRxReasonMplsTtl, /* Offset 31 */ 8908 socRxReasonMplsSequenceNumber, /* Offset 32 */ 8909 socRxReasonL2NonUnicastMiss, /* Offset 33 */ 8910 socRxReasonNhop, /* Offset 34 */ 8911 socRxReasonBfdSlowpath, /* Offset 35 */ 8912 socRxReasonStation, /* Offset 36 */ 8913 socRxReasonVlanTranslate, /* Offset 37 */ 8914 socRxReasonTimeSync, /* Offset 38 */ 8915 socRxReasonL2LearnLimit, /* Offset 39 */ 8916 socRxReasonBfd, /* Offset 40 */ 8917 socRxReasonFailoverDrop, /* Offset 41 */ 8918 socRxReasonOAMSlowpath, /* Offset 42 */ 8919 socRxReasonOAMError, /* Offset 43 */ 8920 socRxReasonOAMLMDM, /* Offset 44 */ 8921 socRxReasonOAMCCMSlowPath, /* Offset 45 */ 8922 socRxReasonOAMIncompleteOpcode,/* Offset 46 */ 8923 socRxReasonInvalid, /* Offset 47 */ 8924 socRxReasonSat, /* Offset 48 */ 8925 socRxReasonOAMMplsLmDm, /* Offset 49 */ 8926 socRxReasonInvalid, /* Offset 50 */ 8927 socRxReasonInvalid, /* Offset 51 */ 8928 socRxReasonInvalid, /* Offset 52 */ 8929 socRxReasonInvalid, /* Offset 53 */ 8930 socRxReasonInvalid, /* Offset 54 */ 8931 socRxReasonInvalid, /* Offset 55 */ 8932 socRxReasonInvalid, /* Offset 56 */ 8933 socRxReasonInvalid, /* Offset 57 */ 8934 socRxReasonInvalid, /* Offset 58 */ 8935 socRxReasonInvalid, /* Offset 59 */ 8936 socRxReasonInvalid, /* Offset 60 */ 8937 socRxReasonInvalid, /* Offset 61 */ 8938 socRxReasonInvalid, /* Offset 62 */ 8939 socRxReasonInvalid /* Offset 63 */ 8940 }; 8941 static soc_rx_reason_t 8942 dcb29_rx_reason_map_ip_3[] = { /* IP Overlay 3 */ 8943 socRxReasonUnknownVlan, /* Offset 0 */ 8944 socRxReasonL2SourceMiss, /* Offset 1 */ 8945 socRxReasonL2DestMiss, /* Offset 2 */ 8946 socRxReasonL2Move, /* Offset 3 */ 8947 socRxReasonL2Cpu, /* Offset 4 */ 8948 socRxReasonSampleSource, /* Offset 5 */ 8949 socRxReasonSampleDest, /* Offset 6 */ 8950 socRxReasonL3SourceMiss, /* Offset 7 */ 8951 socRxReasonL3DestMiss, /* Offset 8 */ 8952 socRxReasonL3SourceMove, /* Offset 9 */ 8953 socRxReasonMcastMiss, /* Offset 10 */ 8954 socRxReasonIpMcastMiss, /* Offset 11 */ 8955 socRxReasonFilterMatch, /* Offset 12 */ 8956 socRxReasonL3HeaderError, /* Offset 13 */ 8957 socRxReasonProtocol, /* Offset 14 */ 8958 socRxReasonDosAttack, /* Offset 15 */ 8959 socRxReasonMartianAddr, /* Offset 16 */ 8960 socRxReasonTunnelError, /* Offset 17 */ 8961 socRxReasonMirror, /* Offset 18 */ 8962 socRxReasonIcmpRedirect, /* Offset 19 */ 8963 socRxReasonL3Slowpath, /* Offset 20 */ 8964 socRxReasonParityError, /* Offset 21 */ 8965 socRxReasonL3MtuFail, /* Offset 22 */ 8966 socRxReasonHigigHdrError, /* Offset 23 */ 8967 socRxReasonMcastIdxError, /* Offset 24 */ 8968 socRxReasonVlanFilterMatch, /* Offset 25 */ 8969 socRxReasonClassBasedMove, /* Offset 26 */ 8970 socRxReasonL3AddrBindFail, /* Offset 27 */ 8971 socRxReasonMplsLabelMiss, /* Offset 28 */ 8972 socRxReasonMplsInvalidAction, /* Offset 29 */ 8973 socRxReasonMplsInvalidPayload, /* Offset 30 */ 8974 socRxReasonMplsTtl, /* Offset 31 */ 8975 socRxReasonMplsSequenceNumber, /* Offset 32 */ 8976 socRxReasonL2NonUnicastMiss, /* Offset 33 */ 8977 socRxReasonNhop, /* Offset 34 */ 8978 socRxReasonBfdSlowpath, /* Offset 35 */ 8979 socRxReasonStation, /* Offset 36 */ 8980 socRxReasonVlanTranslate, /* Offset 37 */ 8981 socRxReasonTimeSync, /* Offset 38 */ 8982 socRxReasonL2LearnLimit, /* Offset 39 */ 8983 socRxReasonBfd, /* Offset 40 */ 8984 socRxReasonFailoverDrop, /* Offset 41 */ 8985 socRxReasonNivUntagDrop, /* Offset 42 */ 8986 socRxReasonNivTagDrop, /* Offset 43 */ 8987 socRxReasonNivTagInvalid, /* Offset 44 */ 8988 socRxReasonNivRpfFail, /* Offset 45 */ 8989 socRxReasonNivInterfaceMiss, /* Offset 46 */ 8990 socRxReasonNivPrioDrop, /* Offset 47 */ 8991 socRxReasonInvalid, /* Offset 48 */ 8992 socRxReasonInvalid, /* Offset 49 */ 8993 socRxReasonInvalid, /* Offset 50 */ 8994 socRxReasonInvalid, /* Offset 51 */ 8995 socRxReasonInvalid, /* Offset 52 */ 8996 socRxReasonInvalid, /* Offset 53 */ 8997 socRxReasonInvalid, /* Offset 54 */ 8998 socRxReasonInvalid, /* Offset 55 */ 8999 socRxReasonInvalid, /* Offset 56 */ 9000 socRxReasonInvalid, /* Offset 57 */ 9001 socRxReasonInvalid, /* Offset 58 */ 9002 socRxReasonInvalid, /* Offset 59 */ 9003 socRxReasonInvalid, /* Offset 60 */ 9004 socRxReasonInvalid, /* Offset 61 */ 9005 socRxReasonInvalid, /* Offset 62 */ 9006 socRxReasonInvalid /* Offset 63 */ 9007 }; 9008 static soc_rx_reason_t 9009 dcb29_rx_reason_map_ep[] = { 9010 socRxReasonUnknownVlan, /* Offset 0 */ 9011 socRxReasonStp, /* Offset 1 */ 9012 socRxReasonVlanTranslate, /* Offset 2 new */ 9013 socRxReasonTunnelError, /* Offset 3 */ 9014 socRxReasonIpmc, /* Offset 4 */ 9015 socRxReasonL3HeaderError, /* Offset 5 */ 9016 socRxReasonTtl, /* Offset 6 */ 9017 socRxReasonL2MtuFail, /* Offset 7 */ 9018 socRxReasonHigigHdrError, /* Offset 8 */ 9019 socRxReasonSplitHorizon, /* Offset 9 */ 9020 socRxReasonNivPrune, /* Offset 10 */ 9021 socRxReasonVirtualPortPrune, /* Offset 11 */ 9022 socRxReasonFilterMatch, /* Offset 12 */ 9023 socRxReasonNonUnicastDrop, /* Offset 13 */ 9024 socRxReasonTrillPacketPortMismatch, /* Offset 14 */ 9025 socRxReasonOAMError, /* Offset 15 */ 9026 socRxReasonOAMLMDM, /* Offset 16 */ 9027 socRxReasonOAMCCMSlowPath, /* Offset 17 */ 9028 socRxReasonOAMSlowpath, /* Offset 18 */ 9029 socRxReasonInvalid, /* Offset 19 */ 9030 socRxReasonInvalid, /* Offset 20 */ 9031 socRxReasonInvalid, /* Offset 21 */ 9032 socRxReasonInvalid, /* Offset 22 */ 9033 socRxReasonInvalid, /* Offset 23 */ 9034 socRxReasonInvalid, /* Offset 24 */ 9035 socRxReasonInvalid, /* Offset 25 */ 9036 socRxReasonInvalid, /* Offset 26 */ 9037 socRxReasonInvalid, /* Offset 27 */ 9038 socRxReasonInvalid, /* Offset 28 */ 9039 socRxReasonInvalid, /* Offset 29 */ 9040 socRxReasonInvalid, /* Offset 30 */ 9041 socRxReasonInvalid, /* Offset 31 */ 9042 socRxReasonInvalid, /* Offset 32 */ 9043 socRxReasonInvalid, /* Offset 33 */ 9044 socRxReasonInvalid, /* Offset 34 */ 9045 socRxReasonInvalid, /* Offset 35 */ 9046 socRxReasonInvalid, /* Offset 36 */ 9047 socRxReasonInvalid, /* Offset 37 */ 9048 socRxReasonInvalid, /* Offset 38 */ 9049 socRxReasonInvalid, /* Offset 39 */ 9050 socRxReasonInvalid, /* Offset 40 */ 9051 socRxReasonInvalid, /* Offset 41 */ 9052 socRxReasonInvalid, /* Offset 42 */ 9053 socRxReasonInvalid, /* Offset 43 */ 9054 socRxReasonInvalid, /* Offset 44 */ 9055 socRxReasonInvalid, /* Offset 45 */ 9056 socRxReasonInvalid, /* Offset 46 */ 9057 socRxReasonInvalid, /* Offset 47 */ 9058 socRxReasonInvalid, /* Offset 48 */ 9059 socRxReasonInvalid, /* Offset 49 */ 9060 socRxReasonInvalid, /* Offset 50 */ 9061 socRxReasonInvalid, /* Offset 51 */ 9062 socRxReasonInvalid, /* Offset 52 */ 9063 socRxReasonInvalid, /* Offset 53 */ 9064 socRxReasonInvalid, /* Offset 54 */ 9065 socRxReasonInvalid, /* Offset 55 */ 9066 socRxReasonInvalid, /* Offset 56 */ 9067 socRxReasonInvalid, /* Offset 57 */ 9068 socRxReasonInvalid, /* Offset 58 */ 9069 socRxReasonInvalid, /* Offset 59 */ 9070 socRxReasonInvalid, /* Offset 60 */ 9071 socRxReasonInvalid, /* Offset 61 */ 9072 socRxReasonInvalid, /* Offset 62 */ 9073 socRxReasonInvalid /* Offset 63 */ 9074 }; 9075 9076 9077 static soc_rx_reason_t *dcb29_rx_reason_maps[] = { 9078 dcb29_rx_reason_map_ip_0, 9079 dcb29_rx_reason_map_ip_1, 9080 dcb29_rx_reason_map_ip_3, 9081 dcb29_rx_reason_map_ep, 9082 NULL 9083 }; 9084 /* 9085 * Function: 9086 * dcb29_rx_reason_map_get 9087 * Purpose: 9088 * Return the RX reason map for DCB 23 type. 9089 * Parameters: 9090 * dcb_op - DCB operations 9091 * dcb - dma control block 9092 * Returns: 9093 * RX reason map pointer 9094 */ 9095 static soc_rx_reason_t * 9096 dcb29_rx_reason_map_get(dcb_op_t *dcb_op, dcb_t *dcb) 9097 { 9098 soc_rx_reason_t *map = NULL; 9099 dcb29_t *d = (dcb29_t *)dcb; 9100 9101 switch (d->word4.overlay1.cpu_opcode_type) { 9102 case SOC_CPU_OPCODE_TYPE_IP_0: 9103 map = dcb29_rx_reason_map_ip_0; 9104 break; 9105 case SOC_CPU_OPCODE_TYPE_IP_1: 9106 map = dcb29_rx_reason_map_ip_1; 9107 break; 9108 case SOC_CPU_OPCODE_TYPE_IP_3: 9109 map = dcb29_rx_reason_map_ip_3; 9110 break; 9111 case SOC_CPU_OPCODE_TYPE_EP: 9112 map = dcb29_rx_reason_map_ep; 9113 break; 9114 default: 9115 /* Unknown reason type */ 9116 break; 9117 } 9118 9119 return map; 9120 } 9121 9122 static _shr_rx_decap_tunnel_t dcb29_rx_decap_tunnel_map[] = { 9123 _SHR_RX_DECAP_NONE, 9124 _SHR_RX_DECAP_ACCESS_SVP, 9125 _SHR_RX_DECAP_MIM, 9126 _SHR_RX_DECAP_NONE, 9127 _SHR_RX_DECAP_NONE, 9128 _SHR_RX_DECAP_NONE, 9129 _SHR_RX_DECAP_IP, 9130 _SHR_RX_DECAP_NONE, 9131 _SHR_RX_DECAP_L2MPLS_1LABEL, 9132 _SHR_RX_DECAP_L2MPLS_1LABELCW, 9133 _SHR_RX_DECAP_L3MPLS_1LABEL, 9134 _SHR_RX_DECAP_L3MPLS_1LABELCW, 9135 }; 9136 static uint32 dcb29_rx_decap_tunnel_get(dcb_t *dcb) { 9137 dcb29_t *d = (dcb29_t *)dcb; 9138 uint32 decap_tunnel_type = d->word11.overlay1.decap_tunnel_type; 9139 /* Check for array bounds */ 9140 if ( (decap_tunnel_type < 9141 (sizeof (dcb29_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) { 9142 return (uint32)dcb29_rx_decap_tunnel_map[decap_tunnel_type]; 9143 } 9144 return (uint32)_SHR_RX_DECAP_NONE; 9145 } 9146 9147 GETFUNCEXPR(29, rx_l3_intf, ((d->replicated) ? (d->repl_nhi) : 9148 (((d->repl_nhi) & 0x3fff) + 9149 _SHR_L3_EGRESS_IDX_MIN))) 9150 9151 GETFUNCFIELD(29, outer_vid, word4.overlay1.outer_vid) 9152 GETFUNCFIELD(29, olp_encap_oam_pkt, word4.overlay3.olp_encap_oam_pkt) 9153 GETFUNCNULL(29, read_ecc_error) 9154 GETFUNCNULL(29, desc_remaining) 9155 SETFUNCNULL(29, desc_remaining) 9156 GETFUNCNULL(29, desc_status) 9157 SETFUNCNULL(29, desc_status) 9158 GETFUNCNULL(29, match_id_lo) 9159 GETFUNCNULL(29, match_id_hi) 9160 GETFUNCNULL(29, forwarding_type) 9161 GETFUNCNULL(29, forwarding_zone_id) 9162 9163 dcb_op_t dcb29_op = { 9164 29, 9165 sizeof(dcb29_t), 9166 dcb29_rx_reason_maps, 9167 dcb29_rx_reason_map_get, 9168 dcb0_rx_reasons_get, 9169 dcb19_init, 9170 dcb19_addtx, 9171 dcb19_addrx, 9172 dcb19_intrinfo, 9173 dcb19_reqcount_set, 9174 dcb19_reqcount_get, 9175 dcb23_xfercount_get, 9176 dcb0_addr_set, 9177 dcb0_addr_get, 9178 dcb0_paddr_get, 9179 dcb19_done_set, 9180 dcb19_done_get, 9181 dcb19_sg_set, 9182 dcb19_sg_get, 9183 dcb19_chain_set, 9184 dcb19_chain_get, 9185 dcb19_reload_set, 9186 dcb19_reload_get, 9187 dcb19_desc_intr_set, 9188 dcb19_desc_intr_get, 9189 dcb19_tx_l2pbm_set, 9190 dcb19_tx_utpbm_set, 9191 dcb19_tx_l3pbm_set, 9192 dcb19_tx_crc_set, 9193 dcb19_tx_cos_set, 9194 dcb19_tx_destmod_set, 9195 dcb19_tx_destport_set, 9196 dcb19_tx_opcode_set, 9197 dcb19_tx_srcmod_set, 9198 dcb19_tx_srcport_set, 9199 dcb19_tx_prio_set, 9200 dcb19_tx_pfm_set, 9201 dcb23_rx_untagged_get, 9202 dcb19_rx_crc_get, 9203 dcb23_rx_cos_get, 9204 dcb23_rx_destmod_get, 9205 dcb23_rx_destport_get, 9206 dcb23_rx_opcode_get, 9207 dcb23_rx_classtag_get, 9208 dcb23_rx_matchrule_get, 9209 dcb19_rx_start_get, 9210 dcb19_rx_end_get, 9211 dcb19_rx_error_get, 9212 dcb23_rx_prio_get, 9213 dcb23_rx_reason_get, 9214 dcb23_rx_reason_hi_get, 9215 dcb23_rx_ingport_get, 9216 dcb23_rx_srcport_get, 9217 dcb23_rx_srcmod_get, 9218 dcb23_rx_mcast_get, 9219 dcb23_rx_vclabel_get, 9220 dcb23_rx_mirror_get, 9221 dcb23_rx_timestamp_get, 9222 dcb23_rx_timestamp_upper_get, 9223 dcb19_hg_set, 9224 dcb19_hg_get, 9225 dcb19_stat_set, 9226 dcb19_stat_get, 9227 dcb19_purge_set, 9228 dcb19_purge_get, 9229 dcb23_mhp_get, 9230 dcb29_outer_vid_get, 9231 dcb23_outer_pri_get, 9232 dcb23_outer_cfi_get, 9233 dcb23_rx_outer_tag_action_get, 9234 dcb23_inner_vid_get, 9235 dcb23_inner_pri_get, 9236 dcb23_inner_cfi_get, 9237 dcb23_rx_inner_tag_action_get, 9238 dcb23_rx_bpdu_get, 9239 dcb29_rx_l3_intf_get, 9240 dcb29_rx_decap_tunnel_get, 9241 dcb23_rx_switch_drop_get, 9242 dcb29_olp_encap_oam_pkt_get, 9243 dcb29_read_ecc_error_get, 9244 dcb29_desc_remaining_get, 9245 dcb29_desc_remaining_set, 9246 dcb29_desc_status_get, 9247 dcb29_desc_status_set, 9248 dcb29_match_id_lo_get, 9249 dcb29_match_id_hi_get, 9250 dcb29_forwarding_type_get, 9251 dcb29_forwarding_zone_id_get, 9252 #ifdef BROADCOM_DEBUG 9253 dcb19_tx_l2pbm_get, 9254 dcb19_tx_utpbm_get, 9255 dcb19_tx_l3pbm_get, 9256 dcb19_tx_crc_get, 9257 dcb19_tx_cos_get, 9258 dcb19_tx_destmod_get, 9259 dcb19_tx_destport_get, 9260 dcb19_tx_opcode_get, 9261 dcb19_tx_srcmod_get, 9262 dcb19_tx_srcport_get, 9263 dcb19_tx_prio_get, 9264 dcb19_tx_pfm_get, 9265 9266 dcb29_dump, 9267 dcb0_reason_dump, 9268 #endif /* BROADCOM_DEBUG */ 9269 #ifdef PLISIM 9270 dcb23_status_init, 9271 dcb19_xfercount_set, 9272 dcb19_rx_start_set, 9273 dcb19_rx_end_set, 9274 dcb19_rx_error_set, 9275 dcb19_rx_crc_set, 9276 dcb23_rx_ingport_set, 9277 #endif /* PLISIM */ 9278 NULL, 9279 }; 9280 #endif /* BCM_KATANA2_SUPPORT */ 9281 9282 #if defined(BCM_HURRICANE2_SUPPORT) 9283 GETFUNCNULL(30, rx_switch_drop) 9284 GETFUNCNULL(30, olp_encap_oam_pkt) 9285 GETFUNCNULL(30, read_ecc_error) 9286 GETFUNCNULL(30, desc_remaining) 9287 SETFUNCNULL(30, desc_remaining) 9288 GETFUNCNULL(30, desc_status) 9289 SETFUNCNULL(30, desc_status) 9290 GETFUNCNULL(30, match_id_lo) 9291 GETFUNCNULL(30, match_id_hi) 9292 GETFUNCNULL(30, forwarding_type) 9293 GETFUNCNULL(30, forwarding_zone_id) 9294 9295 dcb_op_t dcb30_op = { 9296 30, 9297 sizeof(dcb20_t), 9298 dcb20_rx_reason_maps, 9299 dcb0_rx_reason_map_get, 9300 dcb0_rx_reasons_get, 9301 dcb19_init, 9302 dcb19_addtx, 9303 dcb19_addrx, 9304 dcb19_intrinfo, 9305 dcb19_reqcount_set, 9306 dcb19_reqcount_get, 9307 dcb19_xfercount_get, 9308 dcb0_addr_set, 9309 dcb0_addr_get, 9310 dcb0_paddr_get, 9311 dcb19_done_set, 9312 dcb19_done_get, 9313 dcb19_sg_set, 9314 dcb19_sg_get, 9315 dcb19_chain_set, 9316 dcb19_chain_get, 9317 dcb19_reload_set, 9318 dcb19_reload_get, 9319 dcb19_desc_intr_set, 9320 dcb19_desc_intr_get, 9321 dcb19_tx_l2pbm_set, 9322 dcb19_tx_utpbm_set, 9323 dcb19_tx_l3pbm_set, 9324 dcb19_tx_crc_set, 9325 dcb19_tx_cos_set, 9326 dcb19_tx_destmod_set, 9327 dcb19_tx_destport_set, 9328 dcb19_tx_opcode_set, 9329 dcb19_tx_srcmod_set, 9330 dcb19_tx_srcport_set, 9331 dcb19_tx_prio_set, 9332 dcb19_tx_pfm_set, 9333 dcb19_rx_untagged_get, 9334 dcb19_rx_crc_get, 9335 dcb19_rx_cos_get, 9336 dcb19_rx_destmod_get, 9337 dcb19_rx_destport_get, 9338 dcb19_rx_opcode_get, 9339 dcb19_rx_classtag_get, 9340 dcb20_rx_matchrule_get, 9341 dcb19_rx_start_get, 9342 dcb19_rx_end_get, 9343 dcb19_rx_error_get, 9344 dcb19_rx_prio_get, 9345 dcb19_rx_reason_get, 9346 dcb19_rx_reason_hi_get, 9347 dcb19_rx_ingport_get, 9348 dcb19_rx_srcport_get, 9349 dcb19_rx_srcmod_get, 9350 dcb19_rx_mcast_get, 9351 dcb19_rx_vclabel_get, 9352 dcb19_rx_mirror_get, 9353 dcb20_rx_timestamp_get, 9354 dcb20_rx_timestamp_upper_get, 9355 dcb19_hg_set, 9356 dcb19_hg_get, 9357 dcb19_stat_set, 9358 dcb19_stat_get, 9359 dcb19_purge_set, 9360 dcb19_purge_get, 9361 dcb19_mhp_get, 9362 dcb19_outer_vid_get, 9363 dcb19_outer_pri_get, 9364 dcb19_outer_cfi_get, 9365 dcb19_rx_outer_tag_action_get, 9366 dcb19_inner_vid_get, 9367 dcb19_inner_pri_get, 9368 dcb19_inner_cfi_get, 9369 dcb19_rx_inner_tag_action_get, 9370 dcb19_rx_bpdu_get, 9371 dcb9_rx_l3_intf_get, 9372 dcb19_rx_decap_tunnel_get, 9373 dcb30_rx_switch_drop_get, 9374 dcb30_olp_encap_oam_pkt_get, 9375 dcb30_read_ecc_error_get, 9376 dcb30_desc_remaining_get, 9377 dcb30_desc_remaining_set, 9378 dcb30_desc_status_get, 9379 dcb30_desc_status_set, 9380 dcb30_match_id_lo_get, 9381 dcb30_match_id_hi_get, 9382 dcb30_forwarding_type_get, 9383 dcb30_forwarding_zone_id_get, 9384 #ifdef BROADCOM_DEBUG 9385 dcb19_tx_l2pbm_get, 9386 dcb19_tx_utpbm_get, 9387 dcb19_tx_l3pbm_get, 9388 dcb19_tx_crc_get, 9389 dcb19_tx_cos_get, 9390 dcb19_tx_destmod_get, 9391 dcb19_tx_destport_get, 9392 dcb19_tx_opcode_get, 9393 dcb19_tx_srcmod_get, 9394 dcb19_tx_srcport_get, 9395 dcb19_tx_prio_get, 9396 dcb19_tx_pfm_get, 9397 9398 dcb20_dump, 9399 dcb0_reason_dump, 9400 #endif /* BROADCOM_DEBUG */ 9401 #ifdef PLISIM 9402 dcb19_status_init, 9403 dcb19_xfercount_set, 9404 dcb19_rx_start_set, 9405 dcb19_rx_end_set, 9406 dcb19_rx_error_set, 9407 dcb19_rx_crc_set, 9408 dcb19_rx_ingport_set, 9409 #endif /* PLISIM */ 9410 NULL, 9411 }; 9412 #endif /* BCM_HURRICANE2_SUPPORT */ 9413 9414 #if defined(BCM_GREYHOUND_SUPPORT) 9415 /* 9416 * DCB Type 31 Support 9417 */ 9418 static soc_rx_reason_t 9419 dcb31_rx_reason_map[] = { 9420 socRxReasonUnknownVlan, /* Offset 0 */ 9421 socRxReasonL2SourceMiss, /* Offset 1 */ 9422 socRxReasonL2DestMiss, /* Offset 2 */ 9423 socRxReasonL2Move, /* Offset 3 */ 9424 socRxReasonL2Cpu, /* Offset 4 */ 9425 socRxReasonSampleSource, /* Offset 5 */ 9426 socRxReasonSampleDest, /* Offset 6 */ 9427 socRxReasonL3SourceMiss, /* Offset 7 */ 9428 socRxReasonL3DestMiss, /* Offset 8 */ 9429 socRxReasonL3SourceMove, /* Offset 9 */ 9430 socRxReasonMcastMiss, /* Offset 10 */ 9431 socRxReasonIpMcastMiss, /* Offset 11 */ 9432 socRxReasonFilterMatch, /* Offset 12 */ 9433 socRxReasonL3HeaderError, /* Offset 13 */ 9434 socRxReasonProtocol, /* Offset 14 */ 9435 socRxReasonDosAttack, /* Offset 15 */ 9436 socRxReasonMartianAddr, /* Offset 16 */ 9437 socRxReasonTunnelError, /* Offset 17 */ 9438 socRxReasonL2MtuFail, /* Offset 18 */ 9439 socRxReasonIcmpRedirect, /* Offset 19 */ 9440 socRxReasonL3Slowpath, /* Offset 20 */ 9441 socRxReasonParityError, /* Offset 21 */ 9442 socRxReasonL3MtuFail, /* Offset 22 */ 9443 socRxReasonHigigHdrError, /* Offset 23 */ 9444 socRxReasonMcastIdxError, /* Offset 24 */ 9445 socRxReasonVlanFilterMatch, /* Offset 25 */ 9446 socRxReasonClassBasedMove, /* Offset 26 */ 9447 socRxReasonL2LearnLimit, /* Offset 27 */ 9448 socRxReasonMplsLabelMiss, /* Offset 28 */ 9449 socRxReasonMplsInvalidAction, /* Offset 29 */ 9450 socRxReasonMplsInvalidPayload, /* Offset 30 */ 9451 socRxReasonMplsTtl, /* Offset 31 */ 9452 socRxReasonMplsSequenceNumber, /* Offset 32 */ 9453 socRxReasonL2NonUnicastMiss, /* Offset 33 */ 9454 socRxReasonNhop, /* Offset 34 */ 9455 socRxReasonMplsCtrlWordError, /* Offset 35 */ 9456 socRxReasonTimeSync, /* Offset 36 */ 9457 socRxReasonOAMSlowpath, /* Offset 37 */ 9458 socRxReasonOAMError, /* Offset 38 */ 9459 socRxReasonOAMLMDM, /* Offset 39 */ 9460 socRxReasonL3AddrBindFail, /* Offset 40 */ 9461 socRxReasonVlanTranslate, /* Offset 41 */ 9462 socRxReasonNiv, /* Offset 42 */ 9463 socRxReasonNiv, /* Offset 43 */ 9464 socRxReasonNiv, /* Offset 44 */ 9465 socRxReasonInvalid, /* Offset 45 */ 9466 socRxReasonInvalid, /* Offset 46 */ 9467 socRxReasonInvalid, /* Offset 47 */ 9468 socRxReasonInvalid, /* Offset 48 */ 9469 socRxReasonInvalid, /* Offset 49 */ 9470 socRxReasonInvalid, /* Offset 50 */ 9471 socRxReasonInvalid, /* Offset 51 */ 9472 socRxReasonInvalid, /* Offset 52 */ 9473 socRxReasonInvalid, /* Offset 53 */ 9474 socRxReasonInvalid, /* Offset 54 */ 9475 socRxReasonInvalid, /* Offset 55 */ 9476 socRxReasonInvalid, /* Offset 56 */ 9477 socRxReasonInvalid, /* Offset 57 */ 9478 socRxReasonInvalid, /* Offset 58 */ 9479 socRxReasonInvalid, /* Offset 59 */ 9480 socRxReasonInvalid, /* Offset 60 */ 9481 socRxReasonInvalid, /* Offset 61 */ 9482 socRxReasonInvalid, /* Offset 62 */ 9483 socRxReasonInvalid /* Offset 63 */ 9484 }; 9485 static soc_rx_reason_t *dcb31_rx_reason_maps[] = { 9486 dcb31_rx_reason_map, 9487 NULL 9488 }; 9489 9490 #ifdef BROADCOM_DEBUG 9491 static void 9492 dcb31_dump(int unit, dcb_t *dcb, char *prefix, int tx) 9493 { 9494 uint32 *p; 9495 int i, size; 9496 dcb19_t *dtx = (dcb19_t *)dcb; /* Fake out for different TX MH */ 9497 dcb31_t *d = (dcb31_t *)dcb; 9498 char ps[((DCB_MAX_SIZE/sizeof(uint32))*9)+1]; 9499 uint8 *h; 9500 #if defined(LE_HOST) 9501 uint32 hgh[4]; 9502 h = (uint8 *)&hgh[0]; 9503 9504 if (tx) { 9505 hgh[0] = soc_htonl(dtx->mh0); 9506 hgh[1] = soc_htonl(dtx->mh1); 9507 hgh[2] = soc_htonl(dtx->mh2); 9508 hgh[3] = soc_htonl(dtx->mh3); 9509 } else { 9510 hgh[0] = soc_htonl(d->mh0); 9511 hgh[1] = soc_htonl(d->mh1); 9512 hgh[2] = soc_htonl(d->mh2); 9513 hgh[3] = soc_htonl(d->mh3); 9514 } 9515 #else 9516 if (tx) { 9517 h = (uint8 *)&dtx->mh0; 9518 } else { 9519 h = (uint8 *)&d->mh0; 9520 } 9521 #endif 9522 9523 p = (uint32 *)dcb; 9524 size = SOC_DCB_SIZE(unit) / sizeof(uint32); 9525 for (i = 0; i < size; i++) { 9526 sal_sprintf(&ps[i*9], "%08x ", p[i]); 9527 } 9528 LOG_CLI((BSL_META_U(unit, 9529 "%s\t%s\n"), prefix, ps)); 9530 if ((SOC_DCB_HG_GET(unit, dcb)) || (SOC_DCB_RX_START_GET(unit, dcb))) { 9531 soc_dma_higig_dump(unit, prefix, h, 0, 0, NULL); 9532 } 9533 LOG_CLI((BSL_META_U(unit, 9534 "%s\ttype %d %ssg %schain %sreload %shg %sstat %spause %spurge\n"), 9535 prefix, 9536 SOC_DCB_TYPE(unit), 9537 SOC_DCB_SG_GET(unit, dcb) ? "" : "!", 9538 SOC_DCB_CHAIN_GET(unit, dcb) ? "" : "!", 9539 SOC_DCB_RELOAD_GET(unit, dcb) ? "" : "!", 9540 SOC_DCB_HG_GET(unit, dcb) ? "" : "!", 9541 SOC_DCB_STAT_GET(unit, dcb) ? "" : "!", 9542 d->c_pause ? "" : "!", 9543 SOC_DCB_PURGE_GET(unit, dcb) ? "" : "!")); 9544 LOG_CLI((BSL_META_U(unit, 9545 "%s\taddr %p reqcount %d xfercount %d\n"), 9546 prefix, 9547 (void *)SOC_DCB_ADDR_GET(unit, dcb), 9548 SOC_DCB_REQCOUNT_GET(unit, dcb), 9549 SOC_DCB_XFERCOUNT_GET(unit, dcb))); 9550 if (!tx) { 9551 LOG_CLI((BSL_META_U(unit, 9552 "%s\t%sdone %sstart %send %serror\n"), 9553 prefix, 9554 SOC_DCB_DONE_GET(unit, dcb) ? "" : "!", 9555 SOC_DCB_RX_START_GET(unit, dcb) ? "" : "!", 9556 SOC_DCB_RX_END_GET(unit, dcb) ? "" : "!", 9557 SOC_DCB_RX_ERROR_GET(unit, dcb) ? "" : "!")); 9558 } 9559 if ((!tx) && (SOC_DCB_RX_START_GET(unit, dcb))) { 9560 dcb0_reason_dump(unit, dcb, prefix); 9561 LOG_CLI((BSL_META_U(unit, 9562 "%s %sdo_not_change_ttl %sbpdu %sl3routed %schg_tos %semirror %simirror\n"), 9563 prefix, 9564 d->do_not_change_ttl ? "" : "!", 9565 d->bpdu ? "" : "!", 9566 d->l3routed ? "" : "!", 9567 d->chg_tos ? "" : "!", 9568 d->emirror ? "" : "!", 9569 d->imirror ? "" : "!" 9570 )); 9571 LOG_CLI((BSL_META_U(unit, 9572 "%s %sreplicated %sl3only %soam_pkt %ssrc_hg\n"), 9573 prefix, 9574 d->replicated ? "" : "!", 9575 d->l3only ? "" : "!", 9576 d->oam_pkt ? "" : "!", 9577 d->src_hg ? "" : "!" 9578 )); 9579 LOG_CLI((BSL_META_U(unit, 9580 "%s %sswitch_pkt %sregen_crc %sservice_tag %sing_untagged\n"), 9581 prefix, 9582 d->switch_pkt ? "" : "!", 9583 d->regen_crc ? "" : "!", 9584 d->service_tag ? "" : "!", 9585 !(((soc_higig2_hdr_t *)h)->ppd_overlay1.ingress_tagged) ? "" : "!" 9586 )); 9587 LOG_CLI((BSL_META_U(unit, 9588 "%s %svfi_valid %schg_ecn ecn=%d\n"), 9589 prefix, 9590 d->vfi_valid ? "" : "!", 9591 d->chg_ecn ? "" : "!", 9592 d->ecn 9593 )); 9594 LOG_CLI((BSL_META_U(unit, 9595 "%s cpu_cos=%d cos=%d mtp_index=%d reason=%08x_%08x\n"), 9596 prefix, 9597 d->word4.overlay2.cpu_cos, 9598 d->cos, 9599 d->mtp_index, 9600 d->reason_hi, 9601 d->reason 9602 )); 9603 LOG_CLI((BSL_META_U(unit, 9604 "%s reason_type=%d match_rule=%d hg_type=%d mtp_index=%d\n"), 9605 prefix, 9606 d->word4.overlay1.cpu_opcode_type, 9607 d->match_rule, 9608 d->hg_type, 9609 d->mtp_index 9610 )); 9611 LOG_CLI((BSL_META_U(unit, 9612 "%s srcport=%d dscp=%d outer_pri=%d outer_cfi=%d outer_vid=%d\n"), 9613 prefix, 9614 d->srcport, 9615 d->dscp, 9616 d->outer_pri, 9617 d->outer_cfi, 9618 d->word4.overlay1.outer_vid 9619 )); 9620 LOG_CLI((BSL_META_U(unit, 9621 "%s inner_pri=%d inner_cfi=%d inner_vid=%d\n"), 9622 prefix, 9623 d->inner_pri, 9624 d->inner_cfi, 9625 d->inner_vid 9626 )); 9627 LOG_CLI((BSL_META_U(unit, 9628 "%s hgi=%d itag_status=%d otag_action=%d itag_action=%d\n"), 9629 prefix, 9630 d->hgi, 9631 d->itag_status, 9632 d->otag_action, 9633 d->itag_action 9634 )); 9635 LOG_CLI((BSL_META_U(unit, 9636 "%s repl_nhi=%05x ts_type=%d timestamp=%08x_%08x\n"), 9637 prefix, 9638 d->repl_nhi, 9639 d->timestamp_type, 9640 d->timestamp_hi, 9641 d->word12.overlay1.timestamp 9642 )); 9643 LOG_CLI((BSL_META_U(unit, 9644 "%s vfi=%d em_mtp_index=%d vntag_action=%d\n"), 9645 prefix, 9646 d->word12.overlay2.vfi, 9647 d->em_mtp_index, 9648 d->vntag_action 9649 )); 9650 } 9651 } 9652 #endif /* BROADCOM_DEBUG */ 9653 9654 static uint32 9655 dcb31_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg) 9656 { 9657 dcb31_t *d = (dcb31_t *)dcb; 9658 9659 COMPILER_REFERENCE(dt_mode); 9660 9661 return (ingport_is_hg ? 9662 ((d->itag_status) ? 0 : 2) : 9663 ((d->itag_status & 0x2) ? 9664 ((d->itag_status & 0x1) ? 0 : 2) : 9665 ((d->itag_status & 0x1) ? 1 : 3))); 9666 } 9667 9668 GETFUNCEXPR(31, rx_mirror, ((d->imirror) | (d->emirror))) 9669 9670 GETFUNCFIELD(31, rx_cos, word4.overlay2.cpu_cos) 9671 GETFUNCFIELD(31, outer_vid, word4.overlay1.outer_vid) 9672 GETFUNCFIELD(31, outer_pri, outer_pri) 9673 GETFUNCFIELD(31, outer_cfi, outer_cfi) 9674 GETFUNCFIELD(31, rx_outer_tag_action, otag_action) 9675 GETFUNCFIELD(31, inner_vid, inner_vid) 9676 GETFUNCFIELD(31, inner_pri, inner_pri) 9677 GETFUNCFIELD(31, inner_cfi, inner_cfi) 9678 GETFUNCFIELD(31, rx_inner_tag_action, itag_action) 9679 GETFUNCFIELD(31, rx_bpdu, bpdu) 9680 9681 GETFUNCFIELD(31, rx_timestamp_upper, timestamp_hi) 9682 GETFUNCEXPR(31, rx_l3_intf, ((d->replicated) ? (d->repl_nhi) : 9683 (((d->repl_nhi) & 0x3ff) + _SHR_L3_EGRESS_IDX_MIN))) 9684 GETFUNCNULL(31, rx_switch_drop) 9685 GETFUNCNULL(31, olp_encap_oam_pkt) 9686 GETFUNCNULL(31, read_ecc_error) 9687 GETFUNCNULL(31, desc_remaining) 9688 SETFUNCNULL(31, desc_remaining) 9689 GETFUNCNULL(31, desc_status) 9690 SETFUNCNULL(31, desc_status) 9691 GETFUNCNULL(31, match_id_lo) 9692 GETFUNCNULL(31, match_id_hi) 9693 GETFUNCNULL(31, forwarding_type) 9694 GETFUNCNULL(31, forwarding_zone_id) 9695 9696 #ifdef PLISIM /* these routines are only used by pcid */ 9697 static void dcb31_status_init(dcb_t *dcb) 9698 { 9699 uint32 *d = (uint32 *)dcb; 9700 9701 d[2] = d[3] = d[4] = d[5] = d[10] = 0; 9702 d[11] = d[12] = d[13] = d[14] = d[15] = 0; 9703 } 9704 #endif /* PLISIM */ 9705 9706 dcb_op_t dcb31_op = { 9707 31, 9708 sizeof(dcb31_t), 9709 dcb31_rx_reason_maps, 9710 dcb0_rx_reason_map_get, 9711 dcb0_rx_reasons_get, 9712 dcb19_init, 9713 dcb19_addtx, 9714 dcb19_addrx, 9715 dcb19_intrinfo, 9716 dcb19_reqcount_set, 9717 dcb19_reqcount_get, 9718 dcb19_xfercount_get, 9719 dcb0_addr_set, 9720 dcb0_addr_get, 9721 dcb0_paddr_get, 9722 dcb19_done_set, 9723 dcb19_done_get, 9724 dcb19_sg_set, 9725 dcb19_sg_get, 9726 dcb19_chain_set, 9727 dcb19_chain_get, 9728 dcb19_reload_set, 9729 dcb19_reload_get, 9730 dcb19_desc_intr_set, 9731 dcb19_desc_intr_get, 9732 dcb19_tx_l2pbm_set, 9733 dcb19_tx_utpbm_set, 9734 dcb19_tx_l3pbm_set, 9735 dcb19_tx_crc_set, 9736 dcb19_tx_cos_set, 9737 dcb19_tx_destmod_set, 9738 dcb19_tx_destport_set, 9739 dcb19_tx_opcode_set, 9740 dcb19_tx_srcmod_set, 9741 dcb19_tx_srcport_set, 9742 dcb19_tx_prio_set, 9743 dcb19_tx_pfm_set, 9744 dcb31_rx_untagged_get, 9745 dcb19_rx_crc_get, 9746 dcb31_rx_cos_get, 9747 dcb23_rx_destmod_get, 9748 dcb23_rx_destport_get, 9749 dcb23_rx_opcode_get, 9750 dcb23_rx_classtag_get, 9751 dcb23_rx_matchrule_get, 9752 dcb19_rx_start_get, 9753 dcb19_rx_end_get, 9754 dcb19_rx_error_get, 9755 dcb23_rx_prio_get, 9756 dcb23_rx_reason_get, 9757 dcb23_rx_reason_hi_get, 9758 dcb23_rx_ingport_get, 9759 dcb23_rx_srcport_get, 9760 dcb23_rx_srcmod_get, 9761 dcb23_rx_mcast_get, 9762 dcb23_rx_vclabel_get, 9763 dcb31_rx_mirror_get, 9764 dcb23_rx_timestamp_get, 9765 dcb31_rx_timestamp_upper_get, 9766 dcb19_hg_set, 9767 dcb19_hg_get, 9768 dcb19_stat_set, 9769 dcb19_stat_get, 9770 dcb19_purge_set, 9771 dcb19_purge_get, 9772 dcb23_mhp_get, 9773 dcb31_outer_vid_get, 9774 dcb31_outer_pri_get, 9775 dcb31_outer_cfi_get, 9776 dcb31_rx_outer_tag_action_get, 9777 dcb31_inner_vid_get, 9778 dcb31_inner_pri_get, 9779 dcb31_inner_cfi_get, 9780 dcb31_rx_inner_tag_action_get, 9781 dcb31_rx_bpdu_get, 9782 dcb31_rx_l3_intf_get, 9783 dcb19_rx_decap_tunnel_get, 9784 dcb31_rx_switch_drop_get, 9785 dcb31_olp_encap_oam_pkt_get, 9786 dcb31_read_ecc_error_get, 9787 dcb31_desc_remaining_get, 9788 dcb31_desc_remaining_set, 9789 dcb31_desc_status_get, 9790 dcb31_desc_status_set, 9791 dcb31_match_id_lo_get, 9792 dcb31_match_id_hi_get, 9793 dcb31_forwarding_type_get, 9794 dcb31_forwarding_zone_id_get, 9795 #ifdef BROADCOM_DEBUG 9796 dcb19_tx_l2pbm_get, 9797 dcb19_tx_utpbm_get, 9798 dcb19_tx_l3pbm_get, 9799 dcb19_tx_crc_get, 9800 dcb19_tx_cos_get, 9801 dcb19_tx_destmod_get, 9802 dcb19_tx_destport_get, 9803 dcb19_tx_opcode_get, 9804 dcb19_tx_srcmod_get, 9805 dcb19_tx_srcport_get, 9806 dcb19_tx_prio_get, 9807 dcb19_tx_pfm_get, 9808 9809 dcb31_dump, 9810 dcb0_reason_dump, 9811 #endif /* BROADCOM_DEBUG */ 9812 #ifdef PLISIM 9813 dcb31_status_init, 9814 dcb19_xfercount_set, 9815 dcb19_rx_start_set, 9816 dcb19_rx_end_set, 9817 dcb19_rx_error_set, 9818 dcb19_rx_crc_set, 9819 dcb23_rx_ingport_set, 9820 #endif /* PLISIM */ 9821 NULL, 9822 }; 9823 #endif /* BCM_GREYHOUND_SUPPORT */ 9824 9825 #if defined(BCM_TOMAHAWK_SUPPORT) 9826 static uint32 9827 dcb32_rx_hg2_ext_eh_type_get(dcb_t *dcb) 9828 { 9829 uint32 eh_type = 0; 9830 dcb32_t *d = (dcb32_t *)dcb; 9831 9832 if (d->hg2_ext_hdr) { 9833 switch (d->word14.overlay1.eh_type) { 9834 case 0: 9835 eh_type = d->word14.overlay1.eh_queue_tag; 9836 break; 9837 default: 9838 break; 9839 } 9840 } 9841 return eh_type; 9842 } 9843 9844 /* 9845 * DCB Type 32 Support 9846 */ 9847 /* From FORMAT CPU_OPCODES */ 9848 static soc_rx_reason_t 9849 dcb32_rx_reason_map[] = { 9850 socRxReasonUnknownVlan, /* 0: CPU_UVLAN */ 9851 socRxReasonL2SourceMiss, /* 1: CPU_SLF */ 9852 socRxReasonL2DestMiss, /* 2: CPU_DLF */ 9853 socRxReasonL2Move, /* 3: CPU_L2MOVE */ 9854 socRxReasonL2Cpu, /* 4: CPU_L2CPU */ 9855 socRxReasonSampleSource, /* 5: CPU_SFLOW_SRC */ 9856 socRxReasonSampleDest, /* 6: CPU_SFLOW_DST */ 9857 socRxReasonL3SourceMiss, /* 7: CPU_L3SRC_MISS */ 9858 socRxReasonL3DestMiss, /* 8: CPU_L3DST_MISS */ 9859 socRxReasonL3SourceMove, /* 9: CPU_L3SRC_MOVE */ 9860 socRxReasonMcastMiss, /* 10: CPU_MC_MISS */ 9861 socRxReasonIpMcastMiss, /* 11: CPU_IPMC_MISS */ 9862 socRxReasonFilterMatch, /* 12: CPU_FFP */ 9863 socRxReasonL3HeaderError, /* 13: CPU_L3HDR_ERR */ 9864 socRxReasonProtocol, /* 14: CPU_PROTOCOL_PKT */ 9865 socRxReasonDosAttack, /* 15: CPU_DOS_ATTACK */ 9866 socRxReasonMartianAddr, /* 16: CPU_MARTIAN_ADDR */ 9867 socRxReasonTunnelError, /* 17: CPU_TUNNEL_ERR */ 9868 socRxReasonSampleSourceFlex, /* 18: CPU_SFLOW_FLEX */ 9869 socRxReasonIcmpRedirect, /* 19: ICMP_REDIRECT */ 9870 socRxReasonL3Slowpath, /* 20: L3_SLOWPATH */ 9871 socRxReasonParityError, /* 21: PARITY_ERROR */ 9872 socRxReasonL3MtuFail, /* 22: L3_MTU_CHECK_FAIL */ 9873 socRxReasonHigigHdrError, /* 23: HGHDR_ERROR */ 9874 socRxReasonMcastIdxError, /* 24: MCIDX_ERROR */ 9875 socRxReasonVlanFilterMatch, /* 25: VFP */ 9876 socRxReasonClassBasedMove, /* 26: CBSM_PREVENTED */ 9877 socRxReasonL3AddrBindFail, /* 27: MAC_BIND_FAIL */ 9878 socRxReasonMplsLabelMiss, /* 28: MPLS_LABEL_MISS */ 9879 socRxReasonMplsInvalidAction, /* 29: MPLS_INVALID_ACTION */ 9880 socRxReasonMplsInvalidPayload, /* 30: MPLS_INVALID_PAYLOAD */ 9881 socRxReasonMplsTtl, /* 31: MPLS_TTL_CHECK_FAIL */ 9882 socRxReasonMplsSequenceNumber, /* 32: MPLS_SEQ_NUM_FAIL */ 9883 socRxReasonL2NonUnicastMiss, /* 33: PBT_NONUC_PKT */ 9884 socRxReasonNhop, /* 34: L3_NEXT_HOP */ 9885 socRxReasonMplsUnknownAch, /* 35: MPLS_UNKNOWN_ACH_ERROR */ 9886 socRxReasonStation, /* 36: MY_STATION */ 9887 socRxReasonNiv, /* 37: NIV_DROP_REASON_ENCODING */ 9888 socRxReasonNiv, /* 38: -> */ 9889 socRxReasonNiv, /* 39: 3-bit */ 9890 socRxReasonVlanTranslate, /* 40: XLT_MISS */ 9891 socRxReasonTimeSync, /* 41: TIME_SYNC */ 9892 socRxReasonOAMSlowpath, /* 42: OAM_SLOWPATH */ 9893 socRxReasonOAMError, /* 43: OAM_ERROR */ 9894 socRxReasonTrill, /* 44: TRILL_DROP_REASON_ENCODING */ 9895 socRxReasonTrill, /* 45: -> */ 9896 socRxReasonTrill, /* 46: 3-bit */ 9897 socRxReasonL2GreSipMiss, /* 47: L2GRE_SIP_MISS */ 9898 socRxReasonL2GreVpnIdMiss, /* 48: L2GRE_VPNID_MISS */ 9899 socRxReasonBfdSlowpath, /* 49: BFD_SLOWPATH */ 9900 socRxReasonBfd, /* 50: BFD_ERROR */ 9901 #if 1 9902 socRxReasonInvalid, /* 51: NOT DEFINED */ 9903 #endif 9904 socRxReasonCongestionCnm, /* 52: ICNM */ 9905 socRxReasonMplsIllegalReservedLabel, /* 53: MPLS_ILLEGAL_RESERVED_LABEL */ 9906 socRxReasonMplsRouterAlertLabel, /* 54: MPLS_ALERT_LABEL */ 9907 socRxReasonCongestionCnmProxy, /* 55: QCN_CNM_PRP */ 9908 socRxReasonCongestionCnmProxyError, /* 56: QCN_CNM_PRP_DLF */ 9909 socRxReasonVxlanSipMiss, /* 57: VXLAN_SIP_MISS */ 9910 socRxReasonVxlanVpnIdMiss, /* 58: VXLAN_VN_ID_MISS */ 9911 socRxReasonFcoeZoneCheckFail, /* 59: FCOE_ZONE_CHECK_FAIL */ 9912 socRxReasonNat, /* 60: NAT_DROP_REASON_ENCODING */ 9913 socRxReasonNat, /* 61: -> */ 9914 socRxReasonNat, /* 62: 3-bit */ 9915 socRxReasonIpmcInterfaceMismatch /* 63: CPU_IPMC_INTERFACE_MISMATCH */ 9916 }; 9917 9918 static soc_rx_reason_t *dcb32_rx_reason_maps[] = { 9919 dcb32_rx_reason_map, 9920 dcb21_rx_reason_niv_encoding_map, 9921 dcb26_rx_reason_trill_encoding_map, 9922 dcb26_rx_reason_nat_encoding_map, 9923 NULL 9924 }; 9925 9926 static _shr_rx_decap_tunnel_t dcb32_rx_decap_tunnel_map[] = { 9927 _SHR_RX_DECAP_NONE, 9928 _SHR_RX_DECAP_ACCESS_SVP, 9929 _SHR_RX_DECAP_MIM, 9930 _SHR_RX_DECAP_L2GRE, 9931 _SHR_RX_DECAP_VXLAN, 9932 _SHR_RX_DECAP_AMT, 9933 _SHR_RX_DECAP_IP, 9934 _SHR_RX_DECAP_TRILL, 9935 _SHR_RX_DECAP_L2MPLS_1LABEL, 9936 _SHR_RX_DECAP_L2MPLS_2LABEL, 9937 _SHR_RX_DECAP_L2MPLS_1LABELCW, 9938 _SHR_RX_DECAP_L2MPLS_2LABELCW, 9939 _SHR_RX_DECAP_L3MPLS_1LABEL, 9940 _SHR_RX_DECAP_L3MPLS_2LABEL, 9941 _SHR_RX_DECAP_L3MPLS_1LABELCW, 9942 _SHR_RX_DECAP_L3MPLS_2LABELCW 9943 }; 9944 static uint32 dcb32_rx_decap_tunnel_get(dcb_t *dcb) { 9945 dcb32_t *d = (dcb32_t *)dcb; 9946 /* Check for array bounds */ 9947 if ( (d->decap_tunnel_type < 9948 (sizeof (dcb32_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) { 9949 return (uint32)dcb32_rx_decap_tunnel_map[d->decap_tunnel_type]; 9950 } 9951 return (uint32)_SHR_RX_DECAP_NONE; 9952 } 9953 9954 /* Fields extracted from MH/PBI */ 9955 GETFUNCFIELD(32, rx_ingport, srcport) 9956 #ifdef PLISIM /* these routines are only used by pcid */ 9957 SETFUNCFIELD(32, rx_ingport, srcport, int val, val) 9958 #endif /* PLISIM */ 9959 9960 #ifdef BROADCOM_DEBUG 9961 static void 9962 dcb32_dump(int unit, dcb_t *dcb, char *prefix, int tx) 9963 { 9964 uint32 *p; 9965 int i, size; 9966 dcb19_t *dtx = (dcb19_t *)dcb; /* Fake out for different TX MH */ 9967 dcb32_t *d = (dcb32_t *)dcb; 9968 char ps[((DCB_MAX_SIZE / sizeof(uint32)) * 9) + 1]; 9969 uint8 *h; 9970 #if defined(LE_HOST) 9971 uint32 hgh[4]; 9972 h = (uint8 *)&hgh[0]; 9973 9974 if (tx) { 9975 hgh[0] = soc_htonl(dtx->mh0); 9976 hgh[1] = soc_htonl(dtx->mh1); 9977 hgh[2] = soc_htonl(dtx->mh2); 9978 hgh[3] = soc_htonl(dtx->mh3); 9979 } else { 9980 hgh[0] = soc_htonl(d->mh0); 9981 hgh[1] = soc_htonl(d->mh1); 9982 hgh[2] = soc_htonl(d->mh2); 9983 hgh[3] = soc_htonl(d->mh3); 9984 } 9985 #else 9986 if (tx) { 9987 h = (uint8 *)&dtx->mh0; 9988 } else { 9989 h = (uint8 *)&d->mh0; 9990 } 9991 #endif 9992 9993 p = (uint32 *)dcb; 9994 size = SOC_DCB_SIZE(unit) / sizeof(uint32); 9995 for (i = 0; i < size; i++) { 9996 sal_sprintf(&ps[i * 9], "%08x ", p[i]); 9997 } 9998 LOG_CLI((BSL_META_U(unit, 9999 "%s\t%s\n"), prefix, ps)); 10000 if ((SOC_DCB_HG_GET(unit, dcb)) || (SOC_DCB_RX_START_GET(unit, dcb))) { 10001 soc_dma_higig_dump(unit, prefix, h, 0, 0, NULL); 10002 } 10003 LOG_CLI((BSL_META_U(unit, 10004 "%s\ttype %d %schain %ssg %sreload %sdescintr %shg " 10005 "%sstat %spause %spurge\n"), 10006 prefix, 10007 SOC_DCB_TYPE(unit), 10008 SOC_DCB_CHAIN_GET(unit, dcb) ? "" : "!", 10009 SOC_DCB_SG_GET(unit, dcb) ? "" : "!", 10010 SOC_DCB_RELOAD_GET(unit, dcb) ? "" : "!", 10011 SOC_DCB_DESC_INTR_GET(unit, dcb) ? "" : "!", 10012 SOC_DCB_HG_GET(unit, dcb) ? "" : "!", 10013 SOC_DCB_STAT_GET(unit, dcb) ? "" : "!", 10014 d->c_pause ? "" : "!", 10015 SOC_DCB_PURGE_GET(unit, dcb) ? "" : "!")); 10016 LOG_CLI((BSL_META_U(unit, 10017 "%s\taddr %p reqcount %d xfercount %d\n"), 10018 prefix, 10019 (void *)SOC_DCB_ADDR_GET(unit, dcb), 10020 SOC_DCB_REQCOUNT_GET(unit, dcb), 10021 SOC_DCB_XFERCOUNT_GET(unit, dcb))); 10022 if (!tx) { 10023 LOG_CLI((BSL_META_U(unit, 10024 "%s\t%sdone %serror %sstart %send\n"), 10025 prefix, 10026 SOC_DCB_DONE_GET(unit, dcb) ? "" : "!", 10027 SOC_DCB_RX_ERROR_GET(unit, dcb) ? "" : "!", 10028 SOC_DCB_RX_START_GET(unit, dcb) ? "" : "!", 10029 SOC_DCB_RX_END_GET(unit, dcb) ? "" : "!")); 10030 } 10031 10032 if (tx || !SOC_DCB_RX_START_GET(unit, dcb)) { 10033 return; 10034 } 10035 10036 dcb0_reason_dump(unit, dcb, prefix); 10037 LOG_CLI((BSL_META_U(unit, 10038 "%s\t%schg_tos %sregen_crc %schg_ecn %svfi_valid " 10039 "%sdvp_nhi_sel\n"), 10040 prefix, 10041 d->chg_tos ? "" : "!", 10042 d->regen_crc ? "" : "!", 10043 d->chg_ecn ? "" : "!", 10044 d->vfi_valid ? "" : "!", 10045 d->dvp_nhi_sel ? "" : "!")); 10046 LOG_CLI((BSL_META_U(unit, 10047 "%s\t%sservice_tag %sswitch_pkt %shg_type %ssrc_hg\n"), 10048 prefix, 10049 d->service_tag ? "" : "!", 10050 d->switch_pkt ? "" : "!", 10051 d->hg_type ? "" : "!", 10052 d->src_hg ? "" : "!")); 10053 LOG_CLI((BSL_META_U(unit, 10054 "%s\t%sl3routed %sl3only %sreplicated %sdo_not_change_ttl " 10055 "%sbpdu\n"), 10056 prefix, 10057 d->l3routed ? "" : "!", 10058 d->l3only ? "" : "!", 10059 d->replicated ? "" : "!", 10060 d->do_not_change_ttl ? "" : "!", 10061 d->bpdu ? "" : "!")); 10062 LOG_CLI((BSL_META_U(unit, 10063 "%s\t%shg2_ext_hdr %sspecial_pkt %suc_switch_drop\n"), 10064 prefix, 10065 d->hg2_ext_hdr ? "" : "!", 10066 d->special_pkt ? "" : "!", 10067 d->uc_switch_drop ? "" : "!")); 10068 if (d->hg2_ext_hdr) { 10069 switch (d->word14.overlay1.eh_type) { 10070 case 0: 10071 LOG_CLI((BSL_META_U(unit, 10072 "%s\tHigig2 Extension type 0: queue_tag=0x%04x " 10073 "tag_type=%d seg_sel=%d\n"), 10074 prefix, 10075 d->word14.overlay1.eh_queue_tag, 10076 d->word14.overlay1.eh_tag_type, 10077 d->word14.overlay1.eh_seg_sel)); 10078 break; 10079 case 1: 10080 LOG_CLI((BSL_META_U(unit, 10081 "%s\tHigig2 Extension type 1: classid=%d l3_iif=%d " 10082 "classid_type=%d\n"), 10083 prefix, 10084 d->word14.overlay2.classid, 10085 d->word14.overlay2.l3_iif, 10086 d->word14.overlay2.classid_type)); 10087 break; 10088 case 2: 10089 LOG_CLI((BSL_META_U(unit, 10090 "%s\tHigig2 Extension type 2: classid=%d " 10091 "classid_type=%d\n"), 10092 prefix, 10093 d->word14.overlay2.classid, 10094 d->word14.overlay2.classid_type)); 10095 break; 10096 default: 10097 break; 10098 } 10099 } 10100 LOG_CLI((BSL_META_U(unit, 10101 "%s\treason_type=%d reason=%08x_%08x\n"), 10102 prefix, 10103 d->cpu_opcode_type, 10104 d->reason_hi, 10105 d->reason)); 10106 LOG_CLI((BSL_META_U(unit, 10107 "%s\tts_type=%d timestamp=%08x_%08x\n"), 10108 prefix, 10109 d->timestamp_type, 10110 d->word14.timestamp_hi, 10111 d->timestamp)); 10112 LOG_CLI((BSL_META_U(unit, 10113 "%s\tsrcport=%d cos=%d hgi=%d lb_pkt_type=%d " 10114 "repl_nhi=%05x\n"), 10115 prefix, 10116 d->srcport, 10117 d->cos, 10118 d->hgi, 10119 d->loopback_pkt_type, 10120 d->repl_nhi)); 10121 LOG_CLI((BSL_META_U(unit, 10122 "%s\touter_vid=%d outer_cfi=%d outer_pri=%d otag_action=%d " 10123 "vntag_action=%d\n"), 10124 prefix, 10125 d->outer_vid, 10126 d->outer_cfi, 10127 d->outer_pri, 10128 d->otag_action, 10129 d->vntag_action)); 10130 LOG_CLI((BSL_META_U(unit, 10131 "%s\tinner_vid=%d inner_cfi=%d inner_pri=%d itag_action=%d " 10132 "tag_status=%d\n"), 10133 prefix, 10134 d->inner_vid, 10135 d->inner_cfi, 10136 d->inner_pri, 10137 d->itag_action, 10138 d->tag_status)); 10139 LOG_CLI((BSL_META_U(unit, 10140 "%s\tdscp=%d ecn=%d decap_tunnel_type=%d match_rule=%d " 10141 "mtp_ind=%d\n"), 10142 prefix, 10143 d->dscp, 10144 d->ecn, 10145 d->decap_tunnel_type, 10146 d->match_rule, 10147 d->mtp_index)); 10148 } 10149 #endif /* BROADCOM_DEBUG */ 10150 10151 GETFUNCFIELD(32, rx_cos, cos) 10152 GETFUNCFIELD(32, outer_vid, outer_vid) 10153 GETFUNCFIELD(32, rx_switch_drop, uc_switch_drop) 10154 GETFUNCNULL(32, olp_encap_oam_pkt) 10155 GETFUNCNULL(32, read_ecc_error) 10156 GETFUNCNULL(32, desc_remaining) 10157 SETFUNCNULL(32, desc_remaining) 10158 GETFUNCNULL(32, desc_status) 10159 SETFUNCNULL(32, desc_status) 10160 GETFUNCNULL(32, match_id_lo) 10161 GETFUNCNULL(32, match_id_hi) 10162 GETFUNCNULL(32, forwarding_type) 10163 GETFUNCNULL(32, forwarding_zone_id) 10164 10165 static void 10166 dcb32_desc_intr_set(dcb_t * dcb, int val) 10167 { 10168 dcb32_t * d = (dcb32_t *)dcb; 10169 10170 d->c_intr = val; 10171 return; 10172 } 10173 10174 static uint32 10175 dcb32_desc_intr_get(dcb_t * dcb) 10176 { 10177 dcb32_t * d = (dcb32_t *)dcb; 10178 return (d->c_intr); 10179 } 10180 10181 /* 10182 * DCB Type 32 Support 10183 */ 10184 dcb_op_t dcb32_op = { 10185 32, 10186 sizeof(dcb32_t), 10187 dcb32_rx_reason_maps, 10188 dcb0_rx_reason_map_get, 10189 dcb21_rx_reasons_get, 10190 dcb19_init, 10191 dcb19_addtx, 10192 dcb19_addrx, 10193 dcb19_intrinfo, 10194 dcb19_reqcount_set, 10195 dcb19_reqcount_get, 10196 dcb26_xfercount_get, 10197 dcb0_addr_set, 10198 dcb0_addr_get, 10199 dcb0_paddr_get, 10200 dcb19_done_set, 10201 dcb19_done_get, 10202 dcb19_sg_set, 10203 dcb19_sg_get, 10204 dcb19_chain_set, 10205 dcb19_chain_get, 10206 dcb19_reload_set, 10207 dcb19_reload_get, 10208 dcb32_desc_intr_set, 10209 dcb32_desc_intr_get, 10210 dcb19_tx_l2pbm_set, 10211 dcb19_tx_utpbm_set, 10212 dcb19_tx_l3pbm_set, 10213 dcb19_tx_crc_set, 10214 dcb19_tx_cos_set, 10215 dcb19_tx_destmod_set, 10216 dcb19_tx_destport_set, 10217 dcb19_tx_opcode_set, 10218 dcb19_tx_srcmod_set, 10219 dcb19_tx_srcport_set, 10220 dcb19_tx_prio_set, 10221 dcb19_tx_pfm_set, 10222 dcb26_rx_untagged_get, 10223 dcb19_rx_crc_get, 10224 dcb32_rx_cos_get, 10225 dcb26_rx_destmod_get, 10226 dcb26_rx_destport_get, 10227 dcb26_rx_opcode_get, 10228 dcb26_rx_classtag_get, 10229 dcb26_rx_matchrule_get, 10230 dcb19_rx_start_get, 10231 dcb19_rx_end_get, 10232 dcb19_rx_error_get, 10233 dcb26_rx_prio_get, 10234 dcb26_rx_reason_get, 10235 dcb26_rx_reason_hi_get, 10236 dcb32_rx_ingport_get, 10237 dcb26_rx_srcport_get, 10238 dcb26_rx_srcmod_get, 10239 dcb26_rx_mcast_get, 10240 dcb26_rx_vclabel_get, 10241 dcb26_rx_mirror_get, 10242 dcb26_rx_timestamp_get, 10243 dcb26_rx_timestamp_upper_get, 10244 dcb19_hg_set, 10245 dcb19_hg_get, 10246 dcb19_stat_set, 10247 dcb19_stat_get, 10248 dcb19_purge_set, 10249 dcb19_purge_get, 10250 dcb26_mhp_get, 10251 dcb32_outer_vid_get, 10252 dcb26_outer_pri_get, 10253 dcb26_outer_cfi_get, 10254 dcb23_rx_outer_tag_action_get, 10255 dcb26_inner_vid_get, 10256 dcb26_inner_pri_get, 10257 dcb26_inner_cfi_get, 10258 dcb23_rx_inner_tag_action_get, 10259 dcb26_rx_bpdu_get, 10260 dcb26_rx_l3_intf_get, 10261 dcb32_rx_decap_tunnel_get, 10262 dcb32_rx_switch_drop_get, 10263 dcb32_olp_encap_oam_pkt_get, 10264 dcb32_read_ecc_error_get, 10265 dcb32_desc_remaining_get, 10266 dcb32_desc_remaining_set, 10267 dcb32_desc_status_get, 10268 dcb32_desc_status_set, 10269 dcb32_match_id_lo_get, 10270 dcb32_match_id_hi_get, 10271 dcb32_forwarding_type_get, 10272 dcb32_forwarding_zone_id_get, 10273 #ifdef BROADCOM_DEBUG 10274 dcb19_tx_l2pbm_get, 10275 dcb19_tx_utpbm_get, 10276 dcb19_tx_l3pbm_get, 10277 dcb19_tx_crc_get, 10278 dcb19_tx_cos_get, 10279 dcb19_tx_destmod_get, 10280 dcb19_tx_destport_get, 10281 dcb19_tx_opcode_get, 10282 dcb19_tx_srcmod_get, 10283 dcb19_tx_srcport_get, 10284 dcb19_tx_prio_get, 10285 dcb19_tx_pfm_get, 10286 10287 dcb32_dump, 10288 dcb0_reason_dump, 10289 #endif /* BROADCOM_DEBUG */ 10290 #ifdef PLISIM 10291 dcb23_status_init, 10292 dcb19_xfercount_set, 10293 dcb19_rx_start_set, 10294 dcb19_rx_end_set, 10295 dcb19_rx_error_set, 10296 dcb19_rx_crc_set, 10297 dcb32_rx_ingport_set, 10298 #endif /* PLISIM */ 10299 dcb32_rx_hg2_ext_eh_type_get, 10300 }; 10301 #endif /* BCM_TOMAHAWK_SUPPORT */ 10302 10303 #if defined(BCM_TRIDENT2PLUS_SUPPORT) 10304 /* 10305 * DCB Type 33 Support 10306 */ 10307 /* From FORMAT CPU_OPCODES */ 10308 static soc_rx_reason_t 10309 dcb33_rx_reason_map[] = { 10310 socRxReasonUnknownVlan, /* 0: CPU_UVLAN */ 10311 socRxReasonL2SourceMiss, /* 1: CPU_SLF */ 10312 socRxReasonL2DestMiss, /* 2: CPU_DLF */ 10313 socRxReasonL2Move, /* 3: CPU_L2MOVE */ 10314 socRxReasonL2Cpu, /* 4: CPU_L2CPU */ 10315 socRxReasonSampleSource, /* 5: CPU_SFLOW_SRC */ 10316 socRxReasonSampleDest, /* 6: CPU_SFLOW_DST */ 10317 socRxReasonL3SourceMiss, /* 7: CPU_L3SRC_MISS */ 10318 socRxReasonL3DestMiss, /* 8: CPU_L3DST_MISS */ 10319 socRxReasonL3SourceMove, /* 9: CPU_L3SRC_MOVE */ 10320 socRxReasonMcastMiss, /* 10: CPU_MC_MISS */ 10321 socRxReasonIpMcastMiss, /* 11: CPU_IPMC_MISS */ 10322 socRxReasonFilterMatch, /* 12: CPU_FFP */ 10323 socRxReasonL3HeaderError, /* 13: CPU_L3HDR_ERR */ 10324 socRxReasonProtocol, /* 14: CPU_PROTOCOL_PKT */ 10325 socRxReasonDosAttack, /* 15: CPU_DOS_ATTACK */ 10326 socRxReasonMartianAddr, /* 16: CPU_MARTIAN_ADDR */ 10327 socRxReasonTunnelError, /* 17: CPU_TUNNEL_ERR */ 10328 socRxReasonFailoverDrop, /* 18: FAILOVER_DROP */ 10329 socRxReasonIcmpRedirect, /* 19: ICMP_REDIRECT */ 10330 socRxReasonL3Slowpath, /* 20: L3_SLOWPATH */ 10331 socRxReasonParityError, /* 21: PARITY_ERROR */ 10332 socRxReasonL3MtuFail, /* 22: L3_MTU_CHECK_FAIL */ 10333 socRxReasonHigigHdrError, /* 23: HGHDR_ERROR */ 10334 socRxReasonMcastIdxError, /* 24: MCIDX_ERROR */ 10335 socRxReasonVlanFilterMatch, /* 25: VFP */ 10336 socRxReasonClassBasedMove, /* 26: CBSM_PREVENTED */ 10337 socRxReasonL3AddrBindFail, /* 27: MAC_BIND_FAIL */ 10338 socRxReasonMplsLabelMiss, /* 28: MPLS_LABEL_MISS */ 10339 socRxReasonMplsInvalidAction, /* 29: MPLS_INVALID_ACTION */ 10340 socRxReasonMplsInvalidPayload, /* 30: MPLS_INVALID_PAYLOAD */ 10341 socRxReasonMplsTtl, /* 31: MPLS_TTL_CHECK_FAIL */ 10342 socRxReasonMplsSequenceNumber, /* 32: MPLS_SEQ_NUM_FAIL */ 10343 socRxReasonL2NonUnicastMiss, /* 33: PBT_NONUC_PKT */ 10344 socRxReasonNhop, /* 34: L3_NEXT_HOP */ 10345 socRxReasonMplsUnknownAch, /* 35: MPLS_UNKNOWN_ACH_ERROR */ 10346 socRxReasonStation, /* 36: MY_STATION */ 10347 socRxReasonNiv, /* 37: NIV_DROP_REASON_ENCODING */ 10348 socRxReasonNiv, /* 38: -> */ 10349 socRxReasonNiv, /* 39: 3-bit */ 10350 socRxReasonVlanTranslate, /* 40: VXLT_MISS */ 10351 socRxReasonTimeSync, /* 41: TIME_SYNC */ 10352 socRxReasonOAMSlowpath, /* 42: OAM_SLOWPATH */ 10353 socRxReasonOAMError, /* 43: OAM_ERROR */ 10354 socRxReasonTrill, /* 44: TRILL_DROP_REASON_ENCODING */ 10355 socRxReasonTrill, /* 45: -> */ 10356 socRxReasonTrill, /* 46: 3-bit */ 10357 socRxReasonL2GreSipMiss, /* 47: L2GRE_SIP_MISS */ 10358 socRxReasonL2GreVpnIdMiss, /* 48: L2GRE_VPNID_MISS */ 10359 socRxReasonBfdSlowpath, /* 49: BFD_SLOWPATH */ 10360 socRxReasonBfd, /* 50: BFD_ERROR */ 10361 socRxReasonOAMLMDM, /* 51: OAM_LMDM */ 10362 socRxReasonCongestionCnm, /* 52: ICNM */ 10363 socRxReasonMplsIllegalReservedLabel, /* 53: MPLS_ILLEGAL_RESERVED_LABEL */ 10364 socRxReasonMplsRouterAlertLabel, /* 54: MPLS_ALERT_LABEL */ 10365 socRxReasonCongestionCnmProxy, /* 55: QCN_CNM_PRP */ 10366 socRxReasonCongestionCnmProxyError, /* 56: QCN_CNM_PRP_DLF */ 10367 socRxReasonVxlanSipMiss, /* 57: VXLAN_SIP_MISS */ 10368 socRxReasonVxlanVpnIdMiss, /* 58: VXLAN_VN_ID_MISS */ 10369 socRxReasonFcoeZoneCheckFail, /* 59: FCOE_ZONE_CHECK_FAIL */ 10370 socRxReasonNat, /* 60: NAT_DROP_REASON_ENCODING */ 10371 socRxReasonNat, /* 61: -> */ 10372 socRxReasonNat, /* 62: 3-bit */ 10373 socRxReasonIpmcInterfaceMismatch /* 63: CPU_IPMC_INTERFACE_MISMATCH */ 10374 }; 10375 10376 /* From FORMAT NIV_CPU_OPCODE_ENCODING */ 10377 static soc_rx_reason_t dcb33_rx_reason_niv_encoding_map[] = { 10378 socRxReasonNiv, /* 0: NO_ERRORS 10379 * Base field, must match the entries above */ 10380 socRxReasonNivPrioDrop, /* 1:DOT1P_ADMITTANCE_DISCARD */ 10381 socRxReasonNivInterfaceMiss, /* 2:VIF_LOOKUP_MISS */ 10382 socRxReasonNivRpfFail, /* 3:RPF_LOOKUP_MISS */ 10383 socRxReasonNivTagInvalid, /* 4:VNTAG_FORMAT_ERROR */ 10384 socRxReasonNivTagDrop, /* 5:VNTAG_PRESENT_DROP */ 10385 socRxReasonNivUntagDrop, /* 6:VNTAG_NOT_PRESENT_DROP */ 10386 socRxReasonUnknownSubtendingPort /* 7:UNKOWN SUBTENDING PORT */ 10387 }; 10388 10389 /* From FORMAT NAT_CPU_OPCODE_ENCODING */ 10390 static soc_rx_reason_t dcb33_rx_reason_nat_encoding_map[] = { 10391 socRxReasonNat, /* 0:NOP 10392 * Base field, must match the entries above */ 10393 socRxReasonTcpUdpNatMiss, /* 1:NORMAL */ 10394 socRxReasonIcmpNatMiss, /* 2:ICMP */ 10395 socRxReasonNatFragment, /* 3:FRAGMEMT */ 10396 socRxReasonNatMiss, /* 4:OTHER */ 10397 socRxReasonInvalid, /* 5:NOT DEFINED */ 10398 socRxReasonInvalid, /* 6:NOT DEFINED */ 10399 #if 1 10400 socRxReasonInvalid /* 7:NOT DEFINED */ 10401 #endif 10402 }; 10403 10404 static soc_rx_reason_t *dcb33_rx_reason_maps[] = { 10405 dcb33_rx_reason_map, 10406 dcb33_rx_reason_niv_encoding_map, 10407 dcb26_rx_reason_trill_encoding_map, 10408 dcb33_rx_reason_nat_encoding_map, 10409 NULL 10410 }; 10411 10412 static _shr_rx_decap_tunnel_t dcb33_rx_decap_tunnel_map[] = { 10413 _SHR_RX_DECAP_NONE, 10414 _SHR_RX_DECAP_ACCESS_SVP, 10415 _SHR_RX_DECAP_MIM, 10416 _SHR_RX_DECAP_L2GRE, 10417 _SHR_RX_DECAP_VXLAN, 10418 _SHR_RX_DECAP_AMT, 10419 _SHR_RX_DECAP_IP, 10420 _SHR_RX_DECAP_TRILL, 10421 _SHR_RX_DECAP_MPLS_1LABELCW, 10422 _SHR_RX_DECAP_MPLS_2LABELCW, 10423 _SHR_RX_DECAP_MPLS_1LABEL, 10424 _SHR_RX_DECAP_MPLS_2LABEL, 10425 _SHR_RX_DECAP_L3MPLS_1LABEL, 10426 _SHR_RX_DECAP_L3MPLS_2LABEL, 10427 _SHR_RX_DECAP_L3MPLS_1LABELCW, 10428 _SHR_RX_DECAP_L3MPLS_2LABELCW 10429 }; 10430 static uint32 dcb33_rx_decap_tunnel_get(dcb_t *dcb) { 10431 dcb33_t *d = (dcb33_t *)dcb; 10432 /* Check for array bounds */ 10433 if ( (d->word3.overlay1.decap_tunnel_type < 10434 (sizeof (dcb33_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) { 10435 return (uint32)dcb33_rx_decap_tunnel_map[d->word3.overlay1.decap_tunnel_type]; 10436 } 10437 return (uint32)_SHR_RX_DECAP_NONE; 10438 } 10439 GETFUNCFIELD(33, outer_vid, word4.overlay1.outer_vid) 10440 10441 static void 10442 dcb33_desc_intr_set(dcb_t * dcb, int val) 10443 { 10444 dcb33_t * d = (dcb33_t *)dcb; 10445 10446 d->c_intr = val; 10447 return; 10448 } 10449 10450 static uint32 10451 dcb33_desc_intr_get(dcb_t * dcb) 10452 { 10453 dcb33_t * d = (dcb33_t *)dcb; 10454 return (d->c_intr); 10455 } 10456 10457 #ifdef BROADCOM_DEBUG 10458 static void 10459 dcb33_dump(int unit, dcb_t *dcb, char *prefix, int tx) 10460 { 10461 uint32 *p; 10462 int i, size; 10463 dcb19_t *dtx = (dcb19_t *)dcb; /* Fake out for different TX MH */ 10464 dcb33_t *d = (dcb33_t *)dcb; 10465 char ps[((DCB_MAX_SIZE/sizeof(uint32))*9)+1]; 10466 uint8 *h; 10467 #if defined(LE_HOST) 10468 uint32 hgh[4]; 10469 h = (uint8 *)&hgh[0]; 10470 10471 if (tx) { 10472 hgh[0] = soc_htonl(dtx->mh0); 10473 hgh[1] = soc_htonl(dtx->mh1); 10474 hgh[2] = soc_htonl(dtx->mh2); 10475 hgh[3] = soc_htonl(dtx->mh3); 10476 } else { 10477 hgh[0] = soc_htonl(d->mh0); 10478 hgh[1] = soc_htonl(d->mh1); 10479 hgh[2] = soc_htonl(d->mh2); 10480 hgh[3] = soc_htonl(d->mh3); 10481 } 10482 #else 10483 if (tx) { 10484 h = (uint8 *)&dtx->mh0; 10485 } else { 10486 h = (uint8 *)&d->mh0; 10487 } 10488 #endif 10489 10490 p = (uint32 *)dcb; 10491 size = SOC_DCB_SIZE(unit) / sizeof(uint32); 10492 for (i = 0; i < size; i++) { 10493 sal_sprintf(&ps[i*9], "%08x ", p[i]); 10494 } 10495 LOG_CLI((BSL_META_U(unit, 10496 "%s\t%s\n"), prefix, ps)); 10497 if ((SOC_DCB_HG_GET(unit, dcb)) || (SOC_DCB_RX_START_GET(unit, dcb))) { 10498 soc_dma_higig_dump(unit, prefix, h, 0, 0, NULL); 10499 } 10500 LOG_CLI((BSL_META_U(unit, 10501 "%s\ttype %d %schain %ssg %sreload %shg %sstat %spause " 10502 " %spurge\n"), 10503 prefix, 10504 SOC_DCB_TYPE(unit), 10505 SOC_DCB_CHAIN_GET(unit, dcb) ? "" : "!", 10506 SOC_DCB_SG_GET(unit, dcb) ? "" : "!", 10507 SOC_DCB_RELOAD_GET(unit, dcb) ? "" : "!", 10508 SOC_DCB_HG_GET(unit, dcb) ? "" : "!", 10509 SOC_DCB_STAT_GET(unit, dcb) ? "" : "!", 10510 d->c_pause ? "" : "!", 10511 SOC_DCB_PURGE_GET(unit, dcb) ? "" : "!")); 10512 LOG_CLI((BSL_META_U(unit, 10513 "%s\taddr %p reqcount %d xfercount %d\n"), 10514 prefix, 10515 (void *)SOC_DCB_ADDR_GET(unit, dcb), 10516 SOC_DCB_REQCOUNT_GET(unit, dcb), 10517 SOC_DCB_XFERCOUNT_GET(unit, dcb))); 10518 if (!tx) { 10519 LOG_CLI((BSL_META_U(unit, 10520 "%s\t%sdone %serror %sstart %send\n"), 10521 prefix, 10522 SOC_DCB_DONE_GET(unit, dcb) ? "" : "!", 10523 SOC_DCB_RX_ERROR_GET(unit, dcb) ? "" : "!", 10524 SOC_DCB_RX_START_GET(unit, dcb) ? "" : "!", 10525 SOC_DCB_RX_END_GET(unit, dcb) ? "" : "!")); 10526 } 10527 10528 if (tx || !SOC_DCB_RX_START_GET(unit, dcb)) { 10529 return; 10530 } 10531 10532 dcb0_reason_dump(unit, dcb, prefix); 10533 LOG_CLI((BSL_META_U(unit, 10534 "%s\t%schg_tos %sregen_crc %schg_ecn %svfi_valid " 10535 "%sdvp_nhi_sel\n"), 10536 prefix, 10537 d->word3.overlay1.chg_tos ? "" : "!", 10538 d->regen_crc ? "" : "!", 10539 d->chg_ecn ? "" : "!", 10540 d->vfi_valid ? "" : "!", 10541 d->dvp_nhi_sel ? "" : "!")); 10542 LOG_CLI((BSL_META_U(unit, 10543 "%s\t%sservice_tag %sswitch_pkt %shg_type %ssrc_hg\n"), 10544 prefix, 10545 d->service_tag ? "" : "!", 10546 d->switch_pkt ? "" : "!", 10547 d->hg_type ? "" : "!", 10548 d->src_hg ? "" : "!")); 10549 LOG_CLI((BSL_META_U(unit, 10550 "%s\t%sl3routed %sl3only %sreplicated %sdo_not_change_ttl " 10551 "%sbpdu\n"), 10552 prefix, 10553 d->l3routed ? "" : "!", 10554 d->l3only ? "" : "!", 10555 d->replicated ? "" : "!", 10556 d->do_not_change_ttl ? "" : "!", 10557 d->bpdu ? "" : "!")); 10558 LOG_CLI((BSL_META_U(unit, 10559 "%s\t%shg2_ext_hdr %sspecial_pkt %sall_switch_drop\n"), 10560 prefix, 10561 d->hg2_ext_hdr ? "" : "!", 10562 d->special_pkt ? "" : "!", 10563 d->all_switch_drop ? "" : "!")); 10564 if (d->hg2_ext_hdr) { 10565 switch (d->word14.overlay1.eh_type) { 10566 case 0: 10567 LOG_CLI((BSL_META_U(unit, 10568 "%s\tHigig2 Extension type 0: queue_tag=0x%04x " 10569 "tag_type=%d seg_sel=%d\n"), 10570 prefix, 10571 d->word14.overlay1.eh_queue_tag, 10572 d->word14.overlay1.eh_tag_type, 10573 d->word14.overlay1.eh_seg_sel)); 10574 break; 10575 case 1: 10576 LOG_CLI((BSL_META_U(unit, 10577 "%s\tHigig2 Extension type 1: classid=%d l3_iif=%d " 10578 "classid_type=%d\n"), 10579 prefix, 10580 d->word14.overlay2.classid, 10581 d->word14.overlay2.l3_iif, 10582 d->word14.overlay2.classid_type)); 10583 break; 10584 case 2: 10585 LOG_CLI((BSL_META_U(unit, 10586 "%s\tHigig2 Extension type 2: classid=%d " 10587 "classid_type=%d\n"), 10588 prefix, 10589 d->word14.overlay2.classid, 10590 d->word14.overlay2.classid_type)); 10591 break; 10592 default: 10593 break; 10594 } 10595 } 10596 LOG_CLI((BSL_META_U(unit, 10597 "%s\treason_type=%d reason=%08x_%08x\n"), 10598 prefix, 10599 d->word4.overlay1.cpu_opcode_type, 10600 d->reason_hi, 10601 d->reason)); 10602 LOG_CLI((BSL_META_U(unit, 10603 "%s\tts_type=%d timestamp=%08x_%08x\n"), 10604 prefix, 10605 d->timestamp_type, 10606 d->word14.timestamp_hi, 10607 d->timestamp)); 10608 LOG_CLI((BSL_META_U(unit, 10609 "%s\tsrcport=%d cpu_cos=%d hgi=%d lb_pkt_type=%d " 10610 "repl_nhi=%05x\n"), 10611 prefix, 10612 d->srcport, 10613 d->word4.overlay2.cpu_cos, 10614 d->hgi, 10615 d->loopback_pkt_type, 10616 d->repl_nhi)); 10617 LOG_CLI((BSL_META_U(unit, 10618 "%s\touter_vid=%d outer_cfi=%d outer_pri=%d otag_action=%d " 10619 "vntag_action=%d\n"), 10620 prefix, 10621 d->word4.overlay1.outer_vid, 10622 d->word3.overlay1.outer_cfi, 10623 d->word3.overlay1.outer_pri, 10624 d->otag_action, 10625 d->word3.overlay1.vntag_action)); 10626 LOG_CLI((BSL_META_U(unit, 10627 "%s\tinner_vid=%d inner_cfi=%d inner_pri=%d itag_action=%d " 10628 "tag_status=%d\n"), 10629 prefix, 10630 d->word3.overlay1.inner_vid, 10631 d->word3.overlay1.inner_cfi, 10632 d->inner_pri, 10633 d->itag_action, 10634 d->tag_status)); 10635 LOG_CLI((BSL_META_U(unit, 10636 "%s\tdscp=%d ecn=%d decap_tunnel_type=%d match_rule=%d " 10637 "mtp_ind=%d\n"), 10638 prefix, 10639 d->word3.overlay1.dscp, 10640 d->ecn, 10641 d->word3.overlay1.decap_tunnel_type, 10642 d->match_rule, 10643 d->mtp_index)); 10644 } 10645 #endif /* BROADCOM_DEBUG */ 10646 10647 dcb_op_t dcb33_op = { 10648 33, 10649 sizeof(dcb33_t), 10650 dcb33_rx_reason_maps, 10651 dcb0_rx_reason_map_get, 10652 dcb21_rx_reasons_get, 10653 dcb19_init, 10654 dcb19_addtx, 10655 dcb19_addrx, 10656 dcb19_intrinfo, 10657 dcb19_reqcount_set, 10658 dcb19_reqcount_get, 10659 dcb26_xfercount_get, 10660 dcb0_addr_set, 10661 dcb0_addr_get, 10662 dcb0_paddr_get, 10663 dcb19_done_set, 10664 dcb19_done_get, 10665 dcb19_sg_set, 10666 dcb19_sg_get, 10667 dcb19_chain_set, 10668 dcb19_chain_get, 10669 dcb19_reload_set, 10670 dcb19_reload_get, 10671 dcb33_desc_intr_set, 10672 dcb33_desc_intr_get, 10673 dcb19_tx_l2pbm_set, 10674 dcb19_tx_utpbm_set, 10675 dcb19_tx_l3pbm_set, 10676 dcb19_tx_crc_set, 10677 dcb19_tx_cos_set, 10678 dcb19_tx_destmod_set, 10679 dcb19_tx_destport_set, 10680 dcb19_tx_opcode_set, 10681 dcb19_tx_srcmod_set, 10682 dcb19_tx_srcport_set, 10683 dcb19_tx_prio_set, 10684 dcb19_tx_pfm_set, 10685 dcb26_rx_untagged_get, 10686 dcb19_rx_crc_get, 10687 dcb26_rx_cos_get, 10688 dcb26_rx_destmod_get, 10689 dcb26_rx_destport_get, 10690 dcb26_rx_opcode_get, 10691 dcb26_rx_classtag_get, 10692 dcb26_rx_matchrule_get, 10693 dcb19_rx_start_get, 10694 dcb19_rx_end_get, 10695 dcb19_rx_error_get, 10696 dcb26_rx_prio_get, 10697 dcb26_rx_reason_get, 10698 dcb26_rx_reason_hi_get, 10699 dcb26_rx_ingport_get, 10700 dcb26_rx_srcport_get, 10701 dcb26_rx_srcmod_get, 10702 dcb26_rx_mcast_get, 10703 dcb26_rx_vclabel_get, 10704 dcb26_rx_mirror_get, 10705 dcb26_rx_timestamp_get, 10706 dcb26_rx_timestamp_upper_get, 10707 dcb19_hg_set, 10708 dcb19_hg_get, 10709 dcb19_stat_set, 10710 dcb19_stat_get, 10711 dcb19_purge_set, 10712 dcb19_purge_get, 10713 dcb26_mhp_get, 10714 dcb33_outer_vid_get, 10715 dcb26_outer_pri_get, 10716 dcb26_outer_cfi_get, 10717 dcb23_rx_outer_tag_action_get, 10718 dcb26_inner_vid_get, 10719 dcb26_inner_pri_get, 10720 dcb26_inner_cfi_get, 10721 dcb23_rx_inner_tag_action_get, 10722 dcb26_rx_bpdu_get, 10723 dcb26_rx_l3_intf_get, 10724 dcb33_rx_decap_tunnel_get, 10725 dcb23_rx_switch_drop_get, 10726 dcb23_olp_encap_oam_pkt_get, 10727 dcb23_read_ecc_error_get, 10728 dcb23_desc_remaining_get, 10729 dcb23_desc_remaining_set, 10730 dcb23_desc_status_get, 10731 dcb23_desc_status_set, 10732 dcb23_match_id_lo_get, 10733 dcb23_match_id_hi_get, 10734 dcb23_forwarding_type_get, 10735 dcb23_forwarding_zone_id_get, 10736 #ifdef BROADCOM_DEBUG 10737 dcb19_tx_l2pbm_get, 10738 dcb19_tx_utpbm_get, 10739 dcb19_tx_l3pbm_get, 10740 dcb19_tx_crc_get, 10741 dcb19_tx_cos_get, 10742 dcb19_tx_destmod_get, 10743 dcb19_tx_destport_get, 10744 dcb19_tx_opcode_get, 10745 dcb19_tx_srcmod_get, 10746 dcb19_tx_srcport_get, 10747 dcb19_tx_prio_get, 10748 dcb19_tx_pfm_get, 10749 10750 dcb33_dump, 10751 dcb0_reason_dump, 10752 #endif /* BROADCOM_DEBUG */ 10753 #ifdef PLISIM 10754 dcb23_status_init, 10755 dcb19_xfercount_set, 10756 dcb19_rx_start_set, 10757 dcb19_rx_end_set, 10758 dcb19_rx_error_set, 10759 dcb19_rx_crc_set, 10760 dcb26_rx_ingport_set, 10761 #endif /* PLISIM */ 10762 NULL, 10763 }; 10764 #endif /* BCM_TRIDENT2PLUS_SUPPORT */ 10765 10766 10767 #ifdef BCM_APACHE_SUPPORT 10768 10769 /* From FORMAT CPU_OPCODES */ 10770 static soc_rx_reason_t 10771 dcb35_rx_reason_map_ip[] = { 10772 socRxReasonUnknownVlan, /* 0: CPU_UVLAN */ 10773 socRxReasonL2SourceMiss, /* 1: CPU_SLF */ 10774 socRxReasonL2DestMiss, /* 2: CPU_DLF */ 10775 socRxReasonL2Move, /* 3: CPU_L2MOVE */ 10776 socRxReasonL2Cpu, /* 4: CPU_L2CPU */ 10777 socRxReasonSampleSource, /* 5: CPU_SFLOW_SRC */ 10778 socRxReasonSampleDest, /* 6: CPU_SFLOW_DST */ 10779 socRxReasonL3SourceMiss, /* 7: CPU_L3SRC_MISS */ 10780 socRxReasonL3DestMiss, /* 8: CPU_L3DST_MISS */ 10781 socRxReasonL3SourceMove, /* 9: CPU_L3SRC_MOVE */ 10782 socRxReasonMcastMiss, /* 10: CPU_MC_MISS */ 10783 socRxReasonIpMcastMiss, /* 11: CPU_IPMC_MISS */ 10784 socRxReasonFilterMatch, /* 12: CPU_FFP */ 10785 socRxReasonL3HeaderError, /* 13: CPU_L3HDR_ERR */ 10786 socRxReasonProtocol, /* 14: CPU_PROTOCOL_PKT */ 10787 socRxReasonDosAttack, /* 15: CPU_DOS_ATTACK */ 10788 socRxReasonMartianAddr, /* 16: CPU_MARTIAN_ADDR */ 10789 socRxReasonTunnelError, /* 17: CPU_TUNNEL_ERR */ 10790 socRxReasonFailoverDrop, /* 18: FAILOVER_DROP */ 10791 socRxReasonIcmpRedirect, /* 19: ICMP_REDIRECT */ 10792 socRxReasonL3Slowpath, /* 20: L3_SLOWPATH */ 10793 socRxReasonParityError, /* 21: PARITY_ERROR */ 10794 socRxReasonL3MtuFail, /* 22: L3_MTU_CHECK_FAIL */ 10795 socRxReasonHigigHdrError, /* 23: HGHDR_ERROR */ 10796 socRxReasonMcastIdxError, /* 24: MCIDX_ERROR */ 10797 socRxReasonVlanFilterMatch, /* 25: VFP */ 10798 socRxReasonClassBasedMove, /* 26: CBSM_PREVENTED */ 10799 socRxReasonL3AddrBindFail, /* 27: MAC_BIND_FAIL */ 10800 socRxReasonMplsLabelMiss, /* 28: MPLS_LABEL_MISS */ 10801 socRxReasonMplsInvalidAction, /* 29: MPLS_INVALID_ACTION */ 10802 socRxReasonMplsInvalidPayload, /* 30: MPLS_INVALID_PAYLOAD */ 10803 socRxReasonMplsTtl, /* 31: MPLS_TTL_CHECK_FAIL */ 10804 socRxReasonMplsSequenceNumber, /* 32: MPLS_SEQ_NUM_FAIL */ 10805 socRxReasonL2NonUnicastMiss, /* 33: PBT_NONUC_PKT */ 10806 socRxReasonNhop, /* 34: L3_NEXT_HOP */ 10807 socRxReasonMplsUnknownAch, /* 35: MPLS_UNKNOWN_ACH_ERROR */ 10808 socRxReasonStation, /* 36: MY_STATION */ 10809 socRxReasonNiv, /* 37: NIV_DROP_REASON_ENCODING */ 10810 socRxReasonNiv, /* 38: -> */ 10811 socRxReasonNiv, /* 39: 3-bit */ 10812 socRxReasonVlanTranslate, /* 40: VXLT_MISS */ 10813 socRxReasonTimeSync, /* 41: TIME_SYNC */ 10814 socRxReasonOAMSlowpath, /* 42: OAM_SLOWPATH */ 10815 socRxReasonMplsLookupsExceeded,/* 43: MPLS_OUT_OF_LOOKUPS */ 10816 socRxReasonTrill, /* 44: TRILL_DROP_REASON_ENCODING */ 10817 socRxReasonTrill, /* 45: -> */ 10818 socRxReasonTrill, /* 46: 3-bit */ 10819 socRxReasonL2GreSipMiss, /* 47: L2GRE_SIP_MISS */ 10820 socRxReasonL2GreVpnIdMiss, /* 48: L2GRE_VPNID_MISS */ 10821 socRxReasonBfdSlowpath, /* 49: BFD_SLOWPATH */ 10822 socRxReasonBfd, /* 50: BFD_ERROR */ 10823 socRxReasonMplsReservedEntropyLabel,/* 51: ENTROPY_LABEL_IN_UNALLOWED_RANGE */ 10824 socRxReasonCongestionCnm, /* 52: ICNM */ 10825 socRxReasonMplsIllegalReservedLabel, /* 53: MPLS_ILLEGAL_RESERVED_LABEL */ 10826 socRxReasonMplsRouterAlertLabel, /* 54: MPLS_ALERT_LABEL */ 10827 socRxReasonCongestionCnmProxy, /* 55: QCN_CNM_PRP */ 10828 socRxReasonCongestionCnmProxyError, /* 56: QCN_CNM_PRP_DLF */ 10829 socRxReasonVxlanSipMiss, /* 57: VXLAN_SIP_MISS */ 10830 socRxReasonVxlanVpnIdMiss, /* 58: VXLAN_VN_ID_MISS */ 10831 socRxReasonFcoeZoneCheckFail, /* 59: FCOE_ZONE_CHECK_FAIL */ 10832 socRxReasonNat, /* 60: NAT_DROP_REASON_ENCODING */ 10833 socRxReasonNat, /* 61: -> */ 10834 socRxReasonNat, /* 62: 3-bit */ 10835 socRxReasonIpmcInterfaceMismatch /* 63: CPU_IPMC_INTERFACE_MISMATCH */ 10836 }; 10837 10838 /* From format EP_CPU_OPCODES */ 10839 static soc_rx_reason_t 10840 dcb35_rx_reason_map_ep[] = { 10841 socRxReasonSplitHorizon, /* 0: CPUE_PRUNE */ 10842 socRxReasonNivPrune, /* 1: CPUE_NIV_DISCARD */ 10843 socRxReasonVirtualPortPrune, /* 2: CPUE_SPLIT_HORIZON */ 10844 socRxReasonHigigHdrError, /* 3: CPUE_HIGIG */ 10845 socRxReasonTrillPacketPortMismatch, /* 4: CPUE_TRILL */ 10846 socRxReasonL2MtuFail, /* 5: CPUE_MTU */ 10847 socRxReasonInvalid, /* 6: CPUE_PKT_SMALL_OR_BIG */ 10848 socRxReasonUnknownVlan, /* 7: CPUE_VLAN */ 10849 socRxReasonStp, /* 8: CPUE_STG */ 10850 socRxReasonVlanTranslate, /* 9: CPUE_VXLT */ 10851 socRxReasonNonUnicastDrop, /* 10: CPUE_MULTI_DEST */ 10852 socRxReasonInvalid, /* 11: CPUE_CNM */ 10853 socRxReasonInvalid, /* 12: CPUE_FCOE */ 10854 socRxReasonInvalid, /* 13: CPUE_CFI */ 10855 socRxReasonTtl, /* 14: CPUE_TTL_DROP */ 10856 socRxReasonIpmc, /* 15: CPUE_L3ERR */ 10857 socRxReasonTunnelError, /* 16: CPUE_TUNNEL */ 10858 socRxReasonFilterMatch, /* 17: CPUE_EFP */ 10859 socRxReasonInvalid, /* 18: CPUE_PROT */ 10860 socRxReasonInvalid, /* 19: CPUE_1588 */ 10861 socRxReasonInvalid, /* 20: CPUE_COMPOSITE_ERROR */ 10862 socRxReasonInvalid, /* 21: EP_DROP_ORIG */ 10863 10864 socRxReasonInvalid, /* Offset 22 */ 10865 socRxReasonInvalid, /* Offset 23 */ 10866 socRxReasonInvalid, /* Offset 24 */ 10867 socRxReasonInvalid, /* Offset 25 */ 10868 socRxReasonInvalid, /* Offset 26 */ 10869 socRxReasonInvalid, /* Offset 27 */ 10870 socRxReasonInvalid, /* Offset 28 */ 10871 socRxReasonInvalid, /* Offset 29 */ 10872 socRxReasonInvalid, /* Offset 30 */ 10873 socRxReasonInvalid, /* Offset 31 */ 10874 socRxReasonInvalid, /* Offset 32 */ 10875 socRxReasonInvalid, /* Offset 33 */ 10876 socRxReasonInvalid, /* Offset 34 */ 10877 socRxReasonInvalid, /* Offset 35 */ 10878 socRxReasonInvalid, /* Offset 36 */ 10879 socRxReasonInvalid, /* Offset 37 */ 10880 socRxReasonInvalid, /* Offset 38 */ 10881 socRxReasonInvalid, /* Offset 39 */ 10882 socRxReasonInvalid, /* Offset 40 */ 10883 socRxReasonInvalid, /* Offset 41 */ 10884 socRxReasonInvalid, /* Offset 42 */ 10885 socRxReasonInvalid, /* Offset 43 */ 10886 socRxReasonInvalid, /* Offset 44 */ 10887 socRxReasonInvalid, /* Offset 45 */ 10888 socRxReasonInvalid, /* Offset 46 */ 10889 socRxReasonInvalid, /* Offset 47 */ 10890 socRxReasonInvalid, /* Offset 48 */ 10891 socRxReasonInvalid, /* Offset 49 */ 10892 socRxReasonInvalid, /* Offset 50 */ 10893 socRxReasonInvalid, /* Offset 51 */ 10894 socRxReasonInvalid, /* Offset 52 */ 10895 socRxReasonInvalid, /* Offset 53 */ 10896 socRxReasonInvalid, /* Offset 54 */ 10897 socRxReasonInvalid, /* Offset 55 */ 10898 socRxReasonInvalid, /* Offset 56 */ 10899 socRxReasonInvalid, /* Offset 57 */ 10900 socRxReasonInvalid, /* Offset 58 */ 10901 socRxReasonInvalid, /* Offset 59 */ 10902 socRxReasonInvalid, /* Offset 60 */ 10903 socRxReasonInvalid, /* Offset 61 */ 10904 socRxReasonInvalid, /* Offset 62 */ 10905 socRxReasonInvalid /* Offset 63 */ 10906 }; 10907 10908 static soc_rx_reason_t *dcb35_rx_reason_maps[4][5] = { 10909 { /* IP_0 */ 10910 dcb35_rx_reason_map_ip, 10911 dcb33_rx_reason_niv_encoding_map, 10912 dcb26_rx_reason_trill_encoding_map, 10913 dcb33_rx_reason_nat_encoding_map, 10914 NULL 10915 }, 10916 {NULL}, /* Index 1 is invalid */ 10917 { /* EP */ 10918 dcb35_rx_reason_map_ep, 10919 NULL 10920 }, 10921 {NULL} /* Index 3 is invalid */ 10922 }; 10923 10924 10925 /* 10926 * Function: 10927 * dcb35_rx_reason_map_get 10928 * Purpose: 10929 * Return the RX reason map for DCB 35 type. 10930 * Parameters: 10931 * dcb_op - DCB operations 10932 * dcb - dma control block 10933 * Returns: 10934 * RX reason map pointer 10935 */ 10936 static soc_rx_reason_t * 10937 dcb35_rx_reason_map_get(dcb_op_t *dcb_op, dcb_t *dcb) 10938 { 10939 soc_rx_reason_t *map = NULL; 10940 dcb35_t * d = (dcb35_t *)dcb; 10941 10942 map = dcb35_rx_reason_maps[(d->word4.overlay1.cpu_opcode_type)][0]; 10943 10944 return map; 10945 } 10946 10947 static _shr_rx_decap_tunnel_t dcb35_rx_decap_tunnel_map[] = { 10948 _SHR_RX_DECAP_NONE, 10949 _SHR_RX_DECAP_ACCESS_SVP, 10950 _SHR_RX_DECAP_MIM, 10951 _SHR_RX_DECAP_L2GRE, 10952 _SHR_RX_DECAP_VXLAN, 10953 _SHR_RX_DECAP_AMT, 10954 _SHR_RX_DECAP_IP, 10955 _SHR_RX_DECAP_TRILL, 10956 _SHR_RX_DECAP_MPLS_1LABELCW, 10957 _SHR_RX_DECAP_MPLS_2LABELCW, 10958 _SHR_RX_DECAP_MPLS_3LABELCW, 10959 _SHR_RX_DECAP_MPLS_3LABEL_ENTROPYCW, 10960 _SHR_RX_DECAP_MPLS_1LABEL, 10961 _SHR_RX_DECAP_MPLS_2LABEL, 10962 _SHR_RX_DECAP_MPLS_3LABEL, 10963 _SHR_RX_DECAP_MPLS_3LABEL_ENTROPY 10964 }; 10965 static uint32 dcb35_rx_decap_tunnel_get(dcb_t *dcb) { 10966 dcb35_t *d = (dcb35_t *)dcb; 10967 /* Check for array bounds */ 10968 if ( (d->word3.overlay1.decap_tunnel_type < 10969 (sizeof (dcb35_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) { 10970 return (uint32)dcb35_rx_decap_tunnel_map[d->word3.overlay1.decap_tunnel_type]; 10971 } 10972 return (uint32)_SHR_RX_DECAP_NONE; 10973 } 10974 10975 GETFUNCFIELD(35, olp_encap_oam_pkt, olp_encap_oam_pkt) 10976 GETFUNCNULL(35, read_ecc_error) 10977 GETFUNCNULL(35, desc_remaining) 10978 SETFUNCNULL(35, desc_remaining) 10979 GETFUNCNULL(35, desc_status) 10980 SETFUNCNULL(35, desc_status) 10981 GETFUNCNULL(35, match_id_lo) 10982 GETFUNCNULL(35, match_id_hi) 10983 GETFUNCNULL(35, forwarding_type) 10984 GETFUNCNULL(35, forwarding_zone_id) 10985 10986 dcb_op_t dcb35_op = { 10987 35, 10988 sizeof(dcb35_t), 10989 dcb35_rx_reason_maps[0], 10990 dcb35_rx_reason_map_get, 10991 dcb21_rx_reasons_get, 10992 dcb19_init, 10993 dcb19_addtx, 10994 dcb19_addrx, 10995 dcb19_intrinfo, 10996 dcb19_reqcount_set, 10997 dcb19_reqcount_get, 10998 dcb26_xfercount_get, 10999 dcb0_addr_set, 11000 dcb0_addr_get, 11001 dcb0_paddr_get, 11002 dcb19_done_set, 11003 dcb19_done_get, 11004 dcb19_sg_set, 11005 dcb19_sg_get, 11006 dcb19_chain_set, 11007 dcb19_chain_get, 11008 dcb19_reload_set, 11009 dcb19_reload_get, 11010 dcb33_desc_intr_set, 11011 dcb33_desc_intr_get, 11012 dcb19_tx_l2pbm_set, 11013 dcb19_tx_utpbm_set, 11014 dcb19_tx_l3pbm_set, 11015 dcb19_tx_crc_set, 11016 dcb19_tx_cos_set, 11017 dcb19_tx_destmod_set, 11018 dcb19_tx_destport_set, 11019 dcb19_tx_opcode_set, 11020 dcb19_tx_srcmod_set, 11021 dcb19_tx_srcport_set, 11022 dcb19_tx_prio_set, 11023 dcb19_tx_pfm_set, 11024 dcb26_rx_untagged_get, 11025 dcb19_rx_crc_get, 11026 dcb26_rx_cos_get, 11027 dcb26_rx_destmod_get, 11028 dcb26_rx_destport_get, 11029 dcb26_rx_opcode_get, 11030 dcb26_rx_classtag_get, 11031 dcb26_rx_matchrule_get, 11032 dcb19_rx_start_get, 11033 dcb19_rx_end_get, 11034 dcb19_rx_error_get, 11035 dcb26_rx_prio_get, 11036 dcb26_rx_reason_get, 11037 dcb26_rx_reason_hi_get, 11038 dcb26_rx_ingport_get, 11039 dcb26_rx_srcport_get, 11040 dcb26_rx_srcmod_get, 11041 dcb26_rx_mcast_get, 11042 dcb26_rx_vclabel_get, 11043 dcb26_rx_mirror_get, 11044 dcb26_rx_timestamp_get, 11045 dcb26_rx_timestamp_upper_get, 11046 dcb19_hg_set, 11047 dcb19_hg_get, 11048 dcb19_stat_set, 11049 dcb19_stat_get, 11050 dcb19_purge_set, 11051 dcb19_purge_get, 11052 dcb26_mhp_get, 11053 dcb33_outer_vid_get, 11054 dcb26_outer_pri_get, 11055 dcb26_outer_cfi_get, 11056 dcb23_rx_outer_tag_action_get, 11057 dcb26_inner_vid_get, 11058 dcb26_inner_pri_get, 11059 dcb26_inner_cfi_get, 11060 dcb23_rx_inner_tag_action_get, 11061 dcb26_rx_bpdu_get, 11062 dcb26_rx_l3_intf_get, 11063 dcb35_rx_decap_tunnel_get, 11064 dcb23_rx_switch_drop_get, 11065 dcb35_olp_encap_oam_pkt_get, 11066 dcb35_read_ecc_error_get, 11067 dcb35_desc_remaining_get, 11068 dcb35_desc_remaining_set, 11069 dcb35_desc_status_get, 11070 dcb35_desc_status_set, 11071 dcb35_match_id_lo_get, 11072 dcb35_match_id_hi_get, 11073 dcb35_forwarding_type_get, 11074 dcb35_forwarding_zone_id_get, 11075 #ifdef BROADCOM_DEBUG 11076 dcb19_tx_l2pbm_get, 11077 dcb19_tx_utpbm_get, 11078 dcb19_tx_l3pbm_get, 11079 dcb19_tx_crc_get, 11080 dcb19_tx_cos_get, 11081 dcb19_tx_destmod_get, 11082 dcb19_tx_destport_get, 11083 dcb19_tx_opcode_get, 11084 dcb19_tx_srcmod_get, 11085 dcb19_tx_srcport_get, 11086 dcb19_tx_prio_get, 11087 dcb19_tx_pfm_get, 11088 11089 dcb26_dump, 11090 dcb0_reason_dump, 11091 #endif /* BROADCOM_DEBUG */ 11092 #ifdef PLISIM 11093 dcb23_status_init, 11094 dcb19_xfercount_set, 11095 dcb19_rx_start_set, 11096 dcb19_rx_end_set, 11097 dcb19_rx_error_set, 11098 dcb19_rx_crc_set, 11099 dcb26_rx_ingport_set, 11100 #endif /* PLISIM */ 11101 }; 11102 #endif /* BCM_APACHE_SUPPORT */ 11103 11104 #ifdef BCM_TRIDENT3_SUPPORT 11105 SETFUNCFIELD(36, reqcount, c_count, uint32 count, count) 11106 GETFUNCFIELD(36, reqcount, c_count) 11107 GETFUNCFIELD(36, xfercount, count) 11108 SETFUNCFIELD(36, done, done, int val, val ? 1 : 0) 11109 GETFUNCFIELD(36, done, done) 11110 SETFUNCFIELD(36, sg, c_sg, int val, val ? 1 : 0) 11111 GETFUNCFIELD(36, sg, c_sg) 11112 SETFUNCFIELD(36, chain, c_chain, int val, val ? 1 : 0) 11113 GETFUNCFIELD(36, chain, c_chain) 11114 SETFUNCFIELD(36, reload, c_reload, int val, val ? 1 : 0) 11115 GETFUNCFIELD(36, reload, c_reload) 11116 GETFUNCFIELD(36, rx_start, start) 11117 GETFUNCFIELD(36, rx_end, end) 11118 GETFUNCFIELD(36, rx_error, error) 11119 SETFUNCFIELD(36, hg, c_hg, uint32 hg, hg) 11120 GETFUNCFIELD(36, hg, c_hg) 11121 SETFUNCFIELD(36, purge, c_purge, uint32 purge, purge) 11122 GETFUNCFIELD(36, purge, c_purge) 11123 GETFUNCFIELD(36, read_ecc_error, ecc_error) 11124 GETFUNCFIELD(36, desc_status, c_desc_status) 11125 GETFUNCFIELD(36, desc_intr, c_intr) 11126 GETFUNCFIELD(36, desc_remaining, c_desc) 11127 11128 GETHDRFUNCFIELD(36, rx_timestamp, timestamp) 11129 GETHDRFUNCNULL(36, rx_timestamp_upper) 11130 GETHDRPTREXPR(36, mhp, &(h->mh0)) 11131 GETHDRFUNCFIELD(36, outer_vid, outer_vid) 11132 GETHDRFUNCFIELD(36, outer_pri, word6.overlay1.outer_pri) 11133 GETHDRFUNCFIELD(36, outer_cfi, outer_cfi) 11134 GETHDRFUNCFIELD(36, rx_outer_tag_action, otag_action) 11135 GETHDRFUNCFIELD(36, inner_vid, inner_vid) 11136 GETHDRFUNCFIELD(36, inner_pri, word6.overlay1.inner_pri) 11137 GETHDRFUNCFIELD(36, inner_cfi, word6.overlay1.inner_cfi) 11138 GETHDRFUNCFIELD(36, rx_inner_tag_action, itag_action) 11139 GETHDRFUNCFIELD(36, rx_bpdu, bpdu) 11140 GETHDRFUNCFIELD(36, rx_decap_tunnel, decap_tunnel_type) 11141 GETHDRFUNCFIELD(36, match_id_lo, match_id_lo) 11142 GETHDRFUNCFIELD(36, match_id_hi, match_id_hi) 11143 GETHDRFUNCFIELD(36, forwarding_type, forwarding_type) 11144 GETHDRFUNCFIELD(36, forwarding_zone_id, forwarding_zone_id) 11145 11146 static uint32 ep_to_cpu_hdr36_rx_crc_get(void *hdr) { 11147 return 0; 11148 } 11149 11150 /* 11151 * In TD3 based devices, tag status is obtained from match ID. 11152 * Tag status is comprised of otag and itag which is in Zone 1 11153 * of match ID. 11154 * itag -> bit 9 of match id. 11155 * otag -> bit 10 of match id. 11156 * A right shift of 9 is performed to obtain these 2 bits (otag , itag). 11157 * Therafter & with 0x3 is done to mask out the other bits. 11158 */ 11159 static uint32 11160 ep_to_cpu_hdr36_rx_untagged_get(void *hdr, int dt_mode, int ingport_is_hg) 11161 { 11162 ep_to_cpu_hdr36_t *h = (ep_to_cpu_hdr36_t *)hdr; 11163 uint32 tag_status = ((h->match_id_lo >> 9) & 0x3) ; 11164 11165 COMPILER_REFERENCE(dt_mode); 11166 11167 return (ingport_is_hg ? 11168 ((tag_status) ? 0 : 2) : 11169 ((tag_status & 0x2) ? 11170 ((tag_status & 0x1) ? 0 : 2) : 11171 ((tag_status & 0x1) ? 1 : 3))); 11172 } 11173 11174 static void 11175 ep_to_cpu_hdr36_rx_reasons_get(dcb_op_t *dcb_op, void *hdr, soc_rx_reasons_t *reasons) 11176 { 11177 soc_rx_reason_t *map, *encoding_map; 11178 uint32 opcode[2], encoding[3]; 11179 uint32 bit_val; 11180 int word_idx, bit_idx, opcode_idx, map_idx, word_count; 11181 int enc_bit = 0; 11182 11183 SOC_RX_REASON_CLEAR_ALL(*reasons); 11184 11185 opcode[0] = dcb_op->rx_reason_get(hdr); 11186 opcode[1] = dcb_op->rx_reason_hi_get(hdr); 11187 word_count = 2; 11188 sal_memset(encoding, 0, sizeof(encoding)); 11189 map = dcb_op->rx_reason_maps[0]; 11190 for (word_idx = 0; word_idx < word_count; word_idx++) { 11191 for (bit_idx = 0; bit_idx < 32; bit_idx++) { 11192 opcode_idx = word_idx * 32 + bit_idx; 11193 bit_val = opcode[word_idx] & (1 << bit_idx) ? 1 : 0; 11194 for (map_idx = 0; ; map_idx++) { 11195 encoding_map = dcb_op->rx_reason_maps[1 + map_idx]; 11196 if (encoding_map == NULL) { 11197 break; 11198 } 11199 if (map[opcode_idx] != encoding_map[0]) { 11200 continue; 11201 } 11202 if (opcode_idx == 0 || map[opcode_idx - 1] != encoding_map[0]) { 11203 enc_bit = 0; 11204 } 11205 encoding[map_idx] |= bit_val << enc_bit; 11206 enc_bit++; 11207 break; 11208 } 11209 if (encoding_map == NULL && bit_val) { 11210 SOC_RX_REASON_SET(*reasons, map[opcode_idx]); 11211 } 11212 } 11213 } 11214 11215 for (map_idx = 0; ; map_idx++) { 11216 encoding_map = dcb_op->rx_reason_maps[1 + map_idx]; 11217 if (encoding_map == NULL) { 11218 break; 11219 } 11220 if (encoding[map_idx] != socRxReasonInvalid) { 11221 SOC_RX_REASON_SET(*reasons, encoding_map[encoding[map_idx]]); 11222 } 11223 } 11224 11225 /* BPDU bit should be a reason, paste it in here */ 11226 if (dcb_op->rx_bpdu_get(hdr)) { 11227 SOC_RX_REASON_SET(*reasons, socRxReasonBpdu); 11228 } 11229 11230 return; 11231 } 11232 11233 11234 GETHDRFUNCFIELD(36, rx_cos, word8.overlay1.cpu_cos) 11235 11236 GETHDRHG2FUNCFIELD(36, rx_destmod, dst_mod) 11237 GETHDRHG2FUNCFIELD(36, rx_destport, dst_port) 11238 11239 GETHDRHG2FUNCFIELD(36, rx_opcode, opcode) 11240 GETHDRHG2FUNCEXPR(36, rx_classtag, (h->ppd_overlay1.ppd_type != 1 ? 0 : 11241 (h->ppd_overlay2.ctag_hi << 8) | 11242 (h->ppd_overlay2.ctag_lo))) 11243 GETHDRFUNCFIELD(36, rx_matchrule, match_rule) 11244 GETHDRHG2FUNCFIELD(36, rx_prio, vlan_pri) /* outer_pri */ 11245 11246 static uint32 11247 ep_to_cpu_hdr36_rx_reason_get(void *hdr) 11248 { 11249 ep_to_cpu_hdr36_t *h = (ep_to_cpu_hdr36_t *)hdr; 11250 11251 return (h->switch_pkt) ? (h->reason) : 0; 11252 } 11253 11254 static uint32 11255 ep_to_cpu_hdr36_rx_reason_hi_get(void *hdr) 11256 { 11257 ep_to_cpu_hdr36_t *h = (ep_to_cpu_hdr36_t *)hdr; 11258 11259 return (h->switch_pkt) ? (h->reason_hi) : 0; 11260 } 11261 11262 GETHDRFUNCFIELD(36, rx_ingport, word8.overlay1.srcport) 11263 GETHDRHG2FUNCFIELD(36, rx_srcport, src_port) 11264 GETHDRHG2FUNCFIELD(36, rx_srcmod, src_mod) 11265 GETHDRHG2FUNCEXPR(36, rx_mcast, ((h->ppd_overlay1.dst_mod << 8) | 11266 (h->ppd_overlay1.dst_port))) 11267 GETHDRHG2FUNCEXPR(36, rx_vclabel, ((h->ppd_overlay1.vc_label_19_16 << 16) | 11268 (h->ppd_overlay1.vc_label_15_8 << 8) | 11269 (h->ppd_overlay1.vc_label_7_0))) 11270 GETHDRFUNCEXPR(36, rx_mirror, ((h->switch_pkt) ? 0:1)) 11271 11272 GETHDRFUNCEXPR(36, rx_l3_intf, h->word6.overlay1.nhi_b ? \ 11273 (h->word6.overlay1.nhi_b + _SHR_L3_EGRESS_IDX_MIN): \ 11274 (((h->nhi_a_hi << 8) | h->word6.overlay1.nhi_a_lo) + _SHR_L3_EGRESS_IDX_MIN)) 11275 GETHDRFUNCNULL(36, rx_switch_drop) 11276 GETHDRFUNCNULL(36, olp_encap_oam_pkt) 11277 11278 #ifdef BROADCOM_DEBUG 11279 GETFUNCERR(36, tx_l2pbm) 11280 GETFUNCERR(36, tx_utpbm) 11281 GETFUNCERR(36, tx_l3pbm) 11282 GETFUNCERR(36, tx_crc) 11283 GETFUNCERR(36, tx_cos) 11284 GETFUNCERR(36, tx_destmod) 11285 GETFUNCERR(36, tx_destport) 11286 GETFUNCERR(36, tx_opcode) 11287 GETFUNCERR(36, tx_srcmod) 11288 GETFUNCERR(36, tx_srcport) 11289 GETFUNCERR(36, tx_prio) 11290 GETFUNCERR(36, tx_pfm) 11291 #endif /* BROADCOM_DEBUG */ 11292 11293 #ifdef PLISIM /* these routines are only used by pcid */ 11294 static void dcb36_status_init(dcb_t *dcb) 11295 { 11296 uint32 *d = (uint32 *)dcb; 11297 11298 d[2] = d[3] = 0; 11299 } 11300 SETFUNCFIELD(36, xfercount, count, uint32 count, count) 11301 SETFUNCFIELD(36, rx_start, start, int val, val ? 1 : 0) 11302 SETFUNCFIELD(36, rx_end, end, int val, val ? 1 : 0) 11303 SETFUNCFIELD(36, rx_error, error, int val, val ? 1 : 0) 11304 SETHDRFUNCEXPRIGNORE(36, rx_crc, int val, ignore) 11305 SETHDRFUNCFIELD(36, rx_ingport, word8.overlay1.srcport, int val, val) 11306 #endif /* PLISIM */ 11307 11308 #if 0 11309 11310 static void 11311 ep_to_cpu_hdr_funcerr(int dt, char *name) 11312 { 11313 LOG_ERROR(BSL_LS_SOC_COMMON, 11314 (BSL_META("ERROR: ep_to_cpu_hdr%d_%s called\n"), dt, name)); 11315 } 11316 #endif 11317 11318 static void 11319 dcb36_init(dcb_t *dcb) 11320 { 11321 uint32 *d = (uint32 *)dcb; 11322 11323 d[0] = d[1] = d[2] = d[3] = 0; 11324 } 11325 11326 static int 11327 dcb36_add_rx(dv_t *dv, sal_vaddr_t addr, uint32 count, uint32 flags) 11328 { 11329 dcb36_t *d; /* DCB */ 11330 uint32 *di; /* DCB integer pointer */ 11331 sal_paddr_t paddr; 11332 11333 d = (dcb36_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); 11334 11335 if (dv->dv_vcnt > 0) { /* chain off previous dcb */ 11336 d[-1].c_chain = 1; 11337 } 11338 11339 di = (uint32 *)d; 11340 di[0] = di[1] = di[2] = di[3] = 0; 11341 11342 if (addr) { 11343 paddr = soc_cm_l2p(dv->dv_unit, (void *)addr); 11344 d->addr_lo = PTR_TO_INT(paddr); 11345 d->addr_hi = PTR_HI_TO_INT(paddr); 11346 if (soc_cm_get_bus_type(dv->dv_unit) & SOC_PCI_DEV_TYPE) { 11347 d->addr_hi |= 0x10000000; 11348 } 11349 } 11350 11351 d->c_count = count; 11352 d->c_sg = 1; 11353 11354 dv->dv_vcnt += 1; 11355 return dv->dv_cnt - dv->dv_vcnt; 11356 } 11357 11358 static int 11359 dcb36_add_tx(dv_t *dv, sal_vaddr_t addr, uint32 count, 11360 pbmp_t l2pbm, pbmp_t utpbm, pbmp_t l3pbm, uint32 flags, uint32 *hgh) 11361 { 11362 dcb36_t *d; /* DCB */ 11363 uint32 *di; /* DCB integer pointer */ 11364 sal_paddr_t paddr = 0; /* Packet buffer physical address */ 11365 11366 d = (dcb36_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); 11367 11368 if (addr) 11369 paddr = soc_cm_l2p(dv->dv_unit, (void *)addr); 11370 11371 if (dv->dv_vcnt > 0 && (dv->dv_flags & DV_F_COMBINE_DCB) && 11372 (d[-1].c_sg != 0) && 11373 ((d[-1].addr_lo + d[-1].c_count) == paddr) && 11374 (d[-1].c_count + count <= DCB_MAX_REQCOUNT)) { 11375 d[-1].c_count += count; 11376 return dv->dv_cnt - dv->dv_vcnt; 11377 } 11378 11379 if (dv->dv_vcnt >= dv->dv_cnt) { 11380 return SOC_E_FULL; 11381 } 11382 if (dv->dv_vcnt > 0) { /* chain off previous dcb */ 11383 d[-1].c_chain = 1; 11384 } 11385 11386 di = (uint32 *)d; 11387 di[0] = di[1] = di[2] = di[3] = 0; 11388 11389 d->addr_lo = PTR_TO_INT(paddr); 11390 d->addr_hi = PTR_HI_TO_INT(paddr); 11391 if (soc_cm_get_bus_type(dv->dv_unit) & SOC_PCI_DEV_TYPE) { 11392 d->addr_hi |= 0x10000000; 11393 } 11394 d->c_count = count; 11395 d->c_sg = 1; 11396 11397 d->c_purge = SOC_DMA_PURGE_GET(flags); 11398 11399 if (SOC_DMA_HG_GET(flags)) { 11400 d->c_hg = 1; 11401 } 11402 11403 dv->dv_vcnt += 1; 11404 11405 return dv->dv_cnt - dv->dv_vcnt; 11406 } 11407 11408 static uint32 11409 dcb36_intr_info(int unit, dcb_t *dcb, int tx, uint32 *count) 11410 { 11411 dcb36_t *d = (dcb36_t *)dcb; /* DCB */ 11412 uint32 f; /* SOC_DCB_INFO_* flags */ 11413 11414 if (!d->done) { 11415 return 0; 11416 } 11417 11418 f = SOC_DCB_INFO_DONE; 11419 if (tx) { 11420 if (!d->c_sg) { 11421 f |= SOC_DCB_INFO_PKTEND; 11422 } 11423 } else { 11424 if (d->end) { 11425 f |= SOC_DCB_INFO_PKTEND; 11426 } 11427 } 11428 11429 *count = d->count; 11430 return f; 11431 } 11432 11433 /* the addr related functions are the same for all dcb types */ 11434 static void 11435 dcb36_addr_set(int unit, dcb_t *dcb, sal_vaddr_t addr) 11436 { 11437 dcb36_t *d = (dcb36_t *)dcb; /* DCB */ 11438 sal_paddr_t paddr; 11439 11440 if (addr == 0) { 11441 d->addr_lo = 0; 11442 d->addr_hi = 0; 11443 } else { 11444 paddr = soc_cm_l2p(unit, (void *)addr); 11445 d->addr_lo = PTR_TO_INT(paddr); 11446 d->addr_hi = PTR_HI_TO_INT(paddr); 11447 if (soc_cm_get_bus_type(unit) & SOC_PCI_DEV_TYPE) { 11448 d->addr_hi |= 0x10000000; 11449 } 11450 } 11451 } 11452 11453 static sal_vaddr_t 11454 dcb36_addr_get(int unit, dcb_t *dcb) 11455 { 11456 dcb36_t *d = (dcb36_t *)dcb; /* DCB */ 11457 sal_paddr_t paddr; 11458 11459 #if defined(COMPILER_OVERRIDE_NO_LONGLONG) || defined(__PEDANTIC__) 11460 paddr = d->addr_lo; 11461 #else 11462 if (soc_cm_get_bus_type(unit) & SOC_PCI_DEV_TYPE) { 11463 paddr = (((uint64)(d->addr_hi & ~(0x10000000)) << 32) | d->addr_lo); 11464 } else { 11465 paddr = (((uint64)(d->addr_hi) << 32) | d->addr_lo); 11466 } 11467 #endif 11468 11469 return (sal_vaddr_t)soc_cm_p2l(unit, paddr); 11470 } 11471 11472 static sal_paddr_t 11473 dcb36_paddr_get(dcb_t *dcb) 11474 { 11475 uint32 *d = (uint32 *)dcb; 11476 11477 return (sal_paddr_t)*d; 11478 } 11479 11480 static void 11481 dcb36_desc_intr_set(dcb_t * dcb, int val) 11482 { 11483 dcb36_t * d = (dcb36_t *)dcb; 11484 11485 d->c_intr = val; 11486 return; 11487 } 11488 11489 static uint32 11490 dcb36_desc_status_set(dcb_t * dcb, uint32 val) 11491 { 11492 dcb36_t * d = (dcb36_t *)dcb; 11493 11494 d->c_desc_status = val; 11495 return 0; 11496 } 11497 11498 static uint32 11499 dcb36_desc_remaining_set(dcb_t * dcb, uint32 val) 11500 { 11501 dcb36_t * d = (dcb36_t *)dcb; 11502 11503 d->c_desc = val; 11504 return 0; 11505 } 11506 11507 #ifdef BROADCOM_DEBUG 11508 static void 11509 dcb36_dump(int unit, dcb_t *dcb, char *prefix, int tx) 11510 { 11511 uint32 *p; 11512 int i, size; 11513 char ps[((DCB_MAX_SIZE/sizeof(uint32))*9)+1]; 11514 11515 p = (uint32 *)dcb; 11516 size = SOC_DCB_SIZE(unit) / sizeof(uint32); 11517 for (i = 0; i < size; i++) { 11518 sal_sprintf(&ps[i*9], "%08x ", p[i]); 11519 } 11520 11521 LOG_CLI((BSL_META_U(unit, 11522 "%s\t%s\n"), prefix, ps)); 11523 11524 LOG_CLI((BSL_META_U(unit, 11525 "%s\ttype %d %schain %ssg %sreload %shg %spurge \n"), 11526 prefix, 11527 SOC_DCB_TYPE(unit), 11528 SOC_DCB_CHAIN_GET(unit, dcb) ? "" : "!", 11529 SOC_DCB_SG_GET(unit, dcb) ? "" : "!", 11530 SOC_DCB_RELOAD_GET(unit, dcb) ? "" : "!", 11531 SOC_DCB_HG_GET(unit, dcb) ? "" : "!", 11532 SOC_DCB_PURGE_GET(unit, dcb) ? "" : "!")); 11533 11534 LOG_CLI((BSL_META_U(unit, 11535 "%s\taddr %p reqcount %d xfercount %d\n"), 11536 prefix, 11537 (void *)SOC_DCB_ADDR_GET(unit, dcb), 11538 SOC_DCB_REQCOUNT_GET(unit, dcb), 11539 SOC_DCB_XFERCOUNT_GET(unit, dcb))); 11540 11541 if (!tx) { 11542 LOG_CLI((BSL_META_U(unit, 11543 "%s\t%sdone %serror %sstart %send\n"), 11544 prefix, 11545 SOC_DCB_DONE_GET(unit, dcb) ? "" : "!", 11546 SOC_DCB_RX_ERROR_GET(unit, dcb) ? "" : "!", 11547 SOC_DCB_RX_START_GET(unit, dcb) ? "" : "!", 11548 SOC_DCB_RX_END_GET(unit, dcb) ? "" : "!")); 11549 } 11550 11551 if (tx || !SOC_DCB_RX_START_GET(unit, dcb)) { 11552 return; 11553 } 11554 } 11555 #endif 11556 11557 /* 11558 * DCB Type 36 Support 11559 */ 11560 /* From FORMAT CPU_OPCODES */ 11561 static soc_rx_reason_t 11562 dcb36_rx_reason_map[] = { 11563 socRxReasonFilterMatch, /* 0: CPU_FFP */ 11564 socRxReasonVlanFilterMatch, /* 1: VFP */ 11565 socRxReasonSampleSourceFlex, /* 2: CPU_SFLOW_FLEX */ 11566 socRxReasonSampleSource, /* 3: CPU_SFLOW_SRC */ 11567 socRxReasonSampleDest, /* 4: CPU_SFLOW_DST */ 11568 socRxReasonL2Move, /* 5: CPU_L2MOVE */ 11569 socRxReasonL2Cpu, /* 6: CPU_L2CPU */ 11570 socRxReasonL3SourceMiss, /* 7: CPU_L3SRC_MISS */ 11571 socRxReasonL3DestMiss, /* 8: CPU_L3DST_MISS */ 11572 socRxReasonL3SourceMove, /* 9: CPU_L3SRC_MOVE */ 11573 socRxReasonMcastMiss, /* 10: CPU_MC_MISS */ 11574 socRxReasonIpMcastMiss, /* 11: CPU_IPMC_MISS */ 11575 socRxReasonUnknownVlan, /* 12: CPU_UVLAN */ 11576 socRxReasonL3HeaderMismatch, /* 13: CPU_L3HDR_MISMATCH */ 11577 socRxReasonProtocol, /* 14: CPU_PROTOCOL_PKT */ 11578 socRxReasonDosAttack, /* 15: CPU_DOS_ATTACK */ 11579 socRxReasonMartianAddr, /* 16: CPU_MARTIAN_ADDR */ 11580 socRxReasonTunnelError, /* 17: CPU_TUNNEL_ERR */ 11581 socRxReasonL2DestMiss, /* 18: CPU_DLF */ 11582 socRxReasonIcmpRedirect, /* 19: ICMP_REDIRECT */ 11583 socRxReasonL3Slowpath, /* 20: L3_SLOWPATH */ 11584 socRxReasonParityError, /* 21: PARITY_ERROR */ 11585 socRxReasonL3MtuFail, /* 22: L3_MTU_CHECK_FAIL */ 11586 socRxReasonHigigHdrError, /* 23: HGHDR_ERROR */ 11587 socRxReasonMcastIdxError, /* 24: MCIDX_ERROR */ 11588 socRxReasonL2SourceMiss, /* 25: CPU_SLF */ 11589 socRxReasonClassBasedMove, /* 26: CBSM_PREVENTED */ 11590 socRxReasonL3AddrBindFail, /* 27: MAC_BIND_FAIL */ 11591 socRxReasonMplsLabelMiss, /* 28: MPLS_LABEL_MISS */ 11592 socRxReasonMplsInvalidAction, /* 29: MPLS_INVALID_ACTION */ 11593 socRxReasonMplsInvalidPayload, /* 30: MPLS_INVALID_PAYLOAD */ 11594 socRxReasonTunnelObjectValidationFail, /* 31: TUNNEL_OBJECT_VALIDATION_FAIL */ 11595 socRxReasonMplsSequenceNumber, /* 32: MPLS_SEQ_NUM_FAIL */ 11596 socRxReasonL2NonUnicastMiss, /* 33: PBT_NONUC_PKT */ 11597 socRxReasonNhop, /* 34: L3_NEXT_HOP */ 11598 socRxReasonL3Cpu, /* 35: CPU_L3CPU */ 11599 socRxReasonStation, /* 36: MY_STATION */ 11600 socRxReasonNivPrioDrop, /* 37: DOT1P_ADMITTANCE_DISCARD */ 11601 socRxReasonNivRpfFail, /* 38: RPF_LOOKUP_MISS */ 11602 socRxReasonUnknownSubtendingPort, /* 39: UNKOWN SUBTENDING PORT */ 11603 socRxReasonTunnelAdaptLookupMiss, /* 40: TUNNEL_ADAPT_LOOKUP_MISS_DROP */ 11604 socRxReasonTimeSync, /* 41: TIME_SYNC */ 11605 socRxReasonPacketFlowSelectMiss, /* 42: PKT_FLOW_SELECT_MISS */ 11606 socRxReasonTunnelDecapEcnError,/* 43: TUNNEL_DECAP_ECN_ERROR (new) */ 11607 socRxReasonFailoverDrop, /* 44: PROTECTION_DATA_DROP */ 11608 socRxReasonPacketFlowSelect, /* 45: PKT_FLOW_SELECT */ 11609 socRxReasonOtherLookupMiss, /* 46: CPU_FORWARDING_OTHER */ 11610 socRxReasonInvalidTpid, /* 47: INVALID_TPID */ 11611 socRxReasonMplsControlPacket, /* 48: MPLS_CONTROL_PKT */ 11612 socRxReasonTunnelError, /* 49: TUNNEL_ERROR */ 11613 socRxReasonTunnelTtlError, /* 50: TUNNEL_TTL_ERR */ 11614 #if 1 11615 socRxReasonInvalid, /* 51:NOT DEFINED */ 11616 #endif 11617 socRxReasonCongestionCnm, /* 52: ICNM */ 11618 socRxReasonMplsIllegalReservedLabel, /* 53: MPLS_ILLEGAL_RESERVED_LABEL */ 11619 socRxReasonMplsRouterAlertLabel, /* 54: MPLS_ALERT_LABEL */ 11620 socRxReasonL3HeaderError, /* 55: L3_HEADER_ERROR */ 11621 socRxReasonL2HeaderError, /* 56: L2_HDR_ERROR */ 11622 socRxReasonTtl1, /* 57: TTL1 */ 11623 socRxReasonTtl, /* 58: TTL */ 11624 socRxReasonFcoeZoneCheckFail, /* 59: FCOE_ZONE_CHECK_FAIL */ 11625 socRxReasonNat, /* 60: NAT_DROP_REASON_ENCODING */ 11626 socRxReasonNat, /* 61: -> */ 11627 socRxReasonNat, /* 62: 3-bit */ 11628 socRxReasonIpmcInterfaceMismatch /* 63: CPU_IPMC_INTERFACE_MISMATCH */ 11629 }; 11630 11631 static soc_rx_reason_t *dcb36_rx_reason_maps[] = { 11632 dcb36_rx_reason_map, 11633 dcb26_rx_reason_nat_encoding_map, 11634 NULL 11635 }; 11636 11637 SETFUNCERR(36, tx_l2pbm, pbmp_t) 11638 SETFUNCERR(36, tx_utpbm, pbmp_t) 11639 SETFUNCERR(36, tx_l3pbm, pbmp_t) 11640 SETFUNCERR(36, tx_crc, int) 11641 SETFUNCERR(36, tx_cos, int) 11642 SETFUNCERR(36, tx_destmod, uint32) 11643 SETFUNCERR(36, tx_destport, uint32) 11644 SETFUNCERR(36, tx_opcode, uint32) 11645 SETFUNCERR(36, tx_srcmod, uint32) 11646 SETFUNCERR(36, tx_srcport, uint32) 11647 SETFUNCERR(36, tx_prio, uint32) 11648 SETFUNCERR(36, tx_pfm, uint32) 11649 11650 dcb_op_t dcb36_op = { 11651 36, 11652 sizeof(dcb36_t), 11653 dcb36_rx_reason_maps, 11654 dcb0_rx_reason_map_get, 11655 ep_to_cpu_hdr36_rx_reasons_get, 11656 dcb36_init, 11657 dcb36_add_tx, 11658 dcb36_add_rx, 11659 dcb36_intr_info, 11660 dcb36_reqcount_set, 11661 dcb36_reqcount_get, 11662 dcb36_xfercount_get, 11663 dcb36_addr_set, 11664 dcb36_addr_get, 11665 dcb36_paddr_get, 11666 dcb36_done_set, 11667 dcb36_done_get, 11668 dcb36_sg_set, 11669 dcb36_sg_get, 11670 dcb36_chain_set, 11671 dcb36_chain_get, 11672 dcb36_reload_set, 11673 dcb36_reload_get, 11674 dcb36_desc_intr_set, 11675 dcb36_desc_intr_get, 11676 dcb36_tx_l2pbm_set, 11677 dcb36_tx_utpbm_set, 11678 dcb36_tx_l3pbm_set, 11679 dcb36_tx_crc_set, 11680 dcb36_tx_cos_set, 11681 dcb36_tx_destmod_set, 11682 dcb36_tx_destport_set, 11683 dcb36_tx_opcode_set, 11684 dcb36_tx_srcmod_set, 11685 dcb36_tx_srcport_set, 11686 dcb36_tx_prio_set, 11687 dcb36_tx_pfm_set, 11688 ep_to_cpu_hdr36_rx_untagged_get, 11689 ep_to_cpu_hdr36_rx_crc_get, 11690 ep_to_cpu_hdr36_rx_cos_get, 11691 ep_to_cpu_hdr36_rx_destmod_get, 11692 ep_to_cpu_hdr36_rx_destport_get, 11693 ep_to_cpu_hdr36_rx_opcode_get, 11694 ep_to_cpu_hdr36_rx_classtag_get, 11695 ep_to_cpu_hdr36_rx_matchrule_get, 11696 dcb36_rx_start_get, 11697 dcb36_rx_end_get, 11698 dcb36_rx_error_get, 11699 ep_to_cpu_hdr36_rx_prio_get, 11700 ep_to_cpu_hdr36_rx_reason_get, 11701 ep_to_cpu_hdr36_rx_reason_hi_get, 11702 ep_to_cpu_hdr36_rx_ingport_get, 11703 ep_to_cpu_hdr36_rx_srcport_get, 11704 ep_to_cpu_hdr36_rx_srcmod_get, 11705 ep_to_cpu_hdr36_rx_mcast_get, 11706 ep_to_cpu_hdr36_rx_vclabel_get, 11707 ep_to_cpu_hdr36_rx_mirror_get, 11708 ep_to_cpu_hdr36_rx_timestamp_get, 11709 ep_to_cpu_hdr36_rx_timestamp_upper_get, 11710 dcb36_hg_set, 11711 dcb36_hg_get, 11712 NULL, 11713 NULL, 11714 dcb36_purge_set, 11715 dcb36_purge_get, 11716 ep_to_cpu_hdr36_mhp_get, 11717 ep_to_cpu_hdr36_outer_vid_get, 11718 ep_to_cpu_hdr36_outer_pri_get, 11719 ep_to_cpu_hdr36_outer_cfi_get, 11720 ep_to_cpu_hdr36_rx_outer_tag_action_get, 11721 ep_to_cpu_hdr36_inner_vid_get, 11722 ep_to_cpu_hdr36_inner_pri_get, 11723 ep_to_cpu_hdr36_inner_cfi_get, 11724 ep_to_cpu_hdr36_rx_inner_tag_action_get, 11725 ep_to_cpu_hdr36_rx_bpdu_get, 11726 ep_to_cpu_hdr36_rx_l3_intf_get, 11727 ep_to_cpu_hdr36_rx_decap_tunnel_get, 11728 ep_to_cpu_hdr36_rx_switch_drop_get, 11729 ep_to_cpu_hdr36_olp_encap_oam_pkt_get, 11730 dcb36_read_ecc_error_get, 11731 dcb36_desc_remaining_get, 11732 dcb36_desc_remaining_set, 11733 dcb36_desc_status_get, 11734 dcb36_desc_status_set, 11735 ep_to_cpu_hdr36_match_id_lo_get, 11736 ep_to_cpu_hdr36_match_id_hi_get, 11737 ep_to_cpu_hdr36_forwarding_type_get, 11738 ep_to_cpu_hdr36_forwarding_zone_id_get, 11739 #ifdef BROADCOM_DEBUG 11740 dcb36_tx_l2pbm_get, 11741 dcb36_tx_utpbm_get, 11742 dcb36_tx_l3pbm_get, 11743 dcb36_tx_crc_get, 11744 dcb36_tx_cos_get, 11745 dcb36_tx_destmod_get, 11746 dcb36_tx_destport_get, 11747 dcb36_tx_opcode_get, 11748 dcb36_tx_srcmod_get, 11749 dcb36_tx_srcport_get, 11750 dcb36_tx_prio_get, 11751 dcb36_tx_pfm_get, 11752 dcb36_dump, 11753 dcb0_reason_dump, 11754 #endif 11755 #ifdef PLISIM 11756 dcb36_status_init, 11757 dcb36_xfercount_set, 11758 dcb36_rx_start_set, 11759 dcb36_rx_end_set, 11760 dcb36_rx_error_set, 11761 ep_to_cpu_hdr36_rx_crc_set, 11762 ep_to_cpu_hdr36_rx_ingport_set, 11763 #endif /* PLISIM */ 11764 }; 11765 #endif /* BCM_TRIDENT3_SUPPORT */ 11766 11767 #if defined(BCM_HURRICANE3_SUPPORT) 11768 /* 11769 * DCB Type 34 Support 11770 */ 11771 #ifdef BROADCOM_DEBUG 11772 static void 11773 dcb34_dump(int unit, dcb_t *dcb, char *prefix, int tx) 11774 { 11775 uint32 *p; 11776 int i, size; 11777 dcb19_t *dtx = (dcb19_t *)dcb; /* Fake out for different TX MH */ 11778 dcb34_t *d = (dcb34_t *)dcb; 11779 char ps[((DCB_MAX_SIZE/sizeof(uint32))*9)+1]; 11780 uint8 *h; 11781 #if defined(LE_HOST) 11782 uint32 hgh[4]; 11783 h = (uint8 *)&hgh[0]; 11784 11785 if (tx) { 11786 hgh[0] = soc_htonl(dtx->mh0); 11787 hgh[1] = soc_htonl(dtx->mh1); 11788 hgh[2] = soc_htonl(dtx->mh2); 11789 hgh[3] = soc_htonl(dtx->mh3); 11790 } else { 11791 hgh[0] = soc_htonl(d->mh0); 11792 hgh[1] = soc_htonl(d->mh1); 11793 hgh[2] = soc_htonl(d->mh2); 11794 hgh[3] = soc_htonl(d->mh3); 11795 } 11796 #else 11797 if (tx) { 11798 h = (uint8 *)&dtx->mh0; 11799 } else { 11800 h = (uint8 *)&d->mh0; 11801 } 11802 #endif 11803 11804 p = (uint32 *)dcb; 11805 size = SOC_DCB_SIZE(unit) / sizeof(uint32); 11806 for (i = 0; i < size; i++) { 11807 sal_sprintf(&ps[i*9], "%08x ", p[i]); 11808 } 11809 LOG_CLI((BSL_META_U(unit, 11810 "%s\t%s\n"), prefix, ps)); 11811 if ((SOC_DCB_HG_GET(unit, dcb)) || (SOC_DCB_RX_START_GET(unit, dcb))) { 11812 soc_dma_higig_dump(unit, prefix, h, 0, 0, NULL); 11813 } 11814 LOG_CLI((BSL_META_U(unit, 11815 "%s\ttype %d %ssg %schain %sreload %shg %sstat %spause %spurge\n"), 11816 prefix, 11817 SOC_DCB_TYPE(unit), 11818 SOC_DCB_SG_GET(unit, dcb) ? "" : "!", 11819 SOC_DCB_CHAIN_GET(unit, dcb) ? "" : "!", 11820 SOC_DCB_RELOAD_GET(unit, dcb) ? "" : "!", 11821 SOC_DCB_HG_GET(unit, dcb) ? "" : "!", 11822 SOC_DCB_STAT_GET(unit, dcb) ? "" : "!", 11823 d->c_pause ? "" : "!", 11824 SOC_DCB_PURGE_GET(unit, dcb) ? "" : "!")); 11825 LOG_CLI((BSL_META_U(unit, 11826 "%s\taddr %p reqcount %d xfercount %d\n"), 11827 prefix, 11828 (void *)SOC_DCB_ADDR_GET(unit, dcb), 11829 SOC_DCB_REQCOUNT_GET(unit, dcb), 11830 SOC_DCB_XFERCOUNT_GET(unit, dcb))); 11831 if (!tx) { 11832 LOG_CLI((BSL_META_U(unit, 11833 "%s\t%sdone %sstart %send %serror\n"), 11834 prefix, 11835 SOC_DCB_DONE_GET(unit, dcb) ? "" : "!", 11836 SOC_DCB_RX_START_GET(unit, dcb) ? "" : "!", 11837 SOC_DCB_RX_END_GET(unit, dcb) ? "" : "!", 11838 SOC_DCB_RX_ERROR_GET(unit, dcb) ? "" : "!")); 11839 } 11840 if ((!tx) && (SOC_DCB_RX_START_GET(unit, dcb))) { 11841 dcb0_reason_dump(unit, dcb, prefix); 11842 LOG_CLI((BSL_META_U(unit, 11843 "%s %sdo_not_change_ttl %sbpdu %sl3routed %schg_tos %semirror %simirror\n"), 11844 prefix, 11845 d->do_not_change_ttl ? "" : "!", 11846 d->bpdu ? "" : "!", 11847 d->l3routed ? "" : "!", 11848 d->chg_tos ? "" : "!", 11849 d->emirror ? "" : "!", 11850 d->imirror ? "" : "!" 11851 )); 11852 LOG_CLI((BSL_META_U(unit, 11853 "%s %sreplicated %sl3only %soam_pkt %ssrc_hg\n"), 11854 prefix, 11855 d->replicated ? "" : "!", 11856 d->l3only ? "" : "!", 11857 d->oam_pkt ? "" : "!", 11858 d->src_hg ? "" : "!" 11859 )); 11860 LOG_CLI((BSL_META_U(unit, 11861 "%s %sswitch_pkt %sregen_crc %sservice_tag %sing_untagged\n"), 11862 prefix, 11863 d->switch_pkt ? "" : "!", 11864 d->word4.overlay2.regen_crc ? "" : "!", 11865 d->service_tag ? "" : "!", 11866 !(((soc_higig2_hdr_t *)h)->ppd_overlay1.ingress_tagged) ? "" : "!" 11867 )); 11868 LOG_CLI((BSL_META_U(unit, 11869 "%s %svfi_valid %schg_ecn ecn=%d\n"), 11870 prefix, 11871 d->vfi_valid ? "" : "!", 11872 d->chg_ecn ? "" : "!", 11873 d->ecn 11874 )); 11875 LOG_CLI((BSL_META_U(unit, 11876 "%s cpu_cos=%d cos=%d mtp_index=%d reason=%08x_%08x\n"), 11877 prefix, 11878 d->word4.overlay2.cpu_cos, 11879 d->cos, 11880 d->mtp_index, 11881 d->reason_hi, 11882 d->reason 11883 )); 11884 LOG_CLI((BSL_META_U(unit, 11885 "%s reason_type=%d match_rule=%d hg_type=%d mtp_index=%d\n"), 11886 prefix, 11887 d->word4.overlay1.cpu_opcode_type, 11888 d->match_rule, 11889 d->hg_type, 11890 d->mtp_index 11891 )); 11892 LOG_CLI((BSL_META_U(unit, 11893 "%s srcport=%d dscp=%d outer_pri=%d outer_cfi=%d outer_vid=%d\n"), 11894 prefix, 11895 d->srcport, 11896 d->dscp, 11897 d->outer_pri, 11898 d->outer_cfi, 11899 d->word4.overlay1.outer_vid 11900 )); 11901 LOG_CLI((BSL_META_U(unit, 11902 "%s inner_pri=%d inner_cfi=%d inner_vid=%d\n"), 11903 prefix, 11904 d->inner_pri, 11905 d->inner_cfi, 11906 d->inner_vid 11907 )); 11908 LOG_CLI((BSL_META_U(unit, 11909 "%s hgi=%d itag_status=%d otag_action=%d itag_action=%d\n"), 11910 prefix, 11911 d->hgi, 11912 d->itag_status, 11913 d->otag_action, 11914 d->itag_action 11915 )); 11916 LOG_CLI((BSL_META_U(unit, 11917 "%s repl_nhi=%05x ts_type=%d timestamp=%08x_%08x\n"), 11918 prefix, 11919 d->repl_nhi, 11920 d->timestamp_type, 11921 d->timestamp_hi, 11922 d->word12.overlay1.timestamp 11923 )); 11924 LOG_CLI((BSL_META_U(unit, 11925 "%s vfi=%d em_mtp_index=%d vntag_action=%d\n"), 11926 prefix, 11927 d->word12.overlay2.vfi, 11928 d->em_mtp_index, 11929 d->vntag_action 11930 )); 11931 } 11932 } 11933 #endif /* BROADCOM_DEBUG */ 11934 11935 GETFUNCEXPR(34, rx_l3_intf, ((d->replicated) ? (d->repl_nhi) : 11936 (((d->repl_nhi) & 0x7ff) + _SHR_L3_EGRESS_IDX_MIN))) 11937 11938 dcb_op_t dcb34_op = { 11939 34, 11940 sizeof(dcb34_t), 11941 dcb31_rx_reason_maps, 11942 dcb0_rx_reason_map_get, 11943 dcb0_rx_reasons_get, 11944 dcb19_init, 11945 dcb19_addtx, 11946 dcb19_addrx, 11947 dcb19_intrinfo, 11948 dcb19_reqcount_set, 11949 dcb19_reqcount_get, 11950 dcb19_xfercount_get, 11951 dcb0_addr_set, 11952 dcb0_addr_get, 11953 dcb0_paddr_get, 11954 dcb19_done_set, 11955 dcb19_done_get, 11956 dcb19_sg_set, 11957 dcb19_sg_get, 11958 dcb19_chain_set, 11959 dcb19_chain_get, 11960 dcb19_reload_set, 11961 dcb19_reload_get, 11962 dcb19_desc_intr_set, 11963 dcb19_desc_intr_get, 11964 dcb19_tx_l2pbm_set, 11965 dcb19_tx_utpbm_set, 11966 dcb19_tx_l3pbm_set, 11967 dcb19_tx_crc_set, 11968 dcb19_tx_cos_set, 11969 dcb19_tx_destmod_set, 11970 dcb19_tx_destport_set, 11971 dcb19_tx_opcode_set, 11972 dcb19_tx_srcmod_set, 11973 dcb19_tx_srcport_set, 11974 dcb19_tx_prio_set, 11975 dcb19_tx_pfm_set, 11976 dcb31_rx_untagged_get, 11977 dcb19_rx_crc_get, 11978 dcb31_rx_cos_get, 11979 dcb23_rx_destmod_get, 11980 dcb23_rx_destport_get, 11981 dcb23_rx_opcode_get, 11982 dcb23_rx_classtag_get, 11983 dcb23_rx_matchrule_get, 11984 dcb19_rx_start_get, 11985 dcb19_rx_end_get, 11986 dcb19_rx_error_get, 11987 dcb23_rx_prio_get, 11988 dcb23_rx_reason_get, 11989 dcb23_rx_reason_hi_get, 11990 dcb23_rx_ingport_get, 11991 dcb23_rx_srcport_get, 11992 dcb23_rx_srcmod_get, 11993 dcb23_rx_mcast_get, 11994 dcb23_rx_vclabel_get, 11995 dcb31_rx_mirror_get, 11996 dcb23_rx_timestamp_get, 11997 dcb31_rx_timestamp_upper_get, 11998 dcb19_hg_set, 11999 dcb19_hg_get, 12000 dcb19_stat_set, 12001 dcb19_stat_get, 12002 dcb19_purge_set, 12003 dcb19_purge_get, 12004 dcb23_mhp_get, 12005 dcb31_outer_vid_get, 12006 dcb31_outer_pri_get, 12007 dcb31_outer_cfi_get, 12008 dcb31_rx_outer_tag_action_get, 12009 dcb31_inner_vid_get, 12010 dcb31_inner_pri_get, 12011 dcb31_inner_cfi_get, 12012 dcb31_rx_inner_tag_action_get, 12013 dcb31_rx_bpdu_get, 12014 dcb34_rx_l3_intf_get, 12015 dcb19_rx_decap_tunnel_get, 12016 dcb31_rx_switch_drop_get, 12017 dcb23_olp_encap_oam_pkt_get, 12018 dcb23_read_ecc_error_get, 12019 dcb23_desc_remaining_get, 12020 dcb23_desc_remaining_set, 12021 dcb23_desc_status_get, 12022 dcb23_desc_status_set, 12023 dcb23_match_id_lo_get, 12024 dcb23_match_id_hi_get, 12025 dcb23_forwarding_type_get, 12026 dcb23_forwarding_zone_id_get, 12027 #ifdef BROADCOM_DEBUG 12028 dcb19_tx_l2pbm_get, 12029 dcb19_tx_utpbm_get, 12030 dcb19_tx_l3pbm_get, 12031 dcb19_tx_crc_get, 12032 dcb19_tx_cos_get, 12033 dcb19_tx_destmod_get, 12034 dcb19_tx_destport_get, 12035 dcb19_tx_opcode_get, 12036 dcb19_tx_srcmod_get, 12037 dcb19_tx_srcport_get, 12038 dcb19_tx_prio_get, 12039 dcb19_tx_pfm_get, 12040 12041 dcb34_dump, 12042 dcb0_reason_dump, 12043 #endif /* BROADCOM_DEBUG */ 12044 #ifdef PLISIM 12045 dcb31_status_init, 12046 dcb19_xfercount_set, 12047 dcb19_rx_start_set, 12048 dcb19_rx_end_set, 12049 dcb19_rx_error_set, 12050 dcb19_rx_crc_set, 12051 dcb23_rx_ingport_set, 12052 #endif /* PLISIM */ 12053 }; 12054 #endif /* BCM_HURRICANE3_SUPPORT */ 12055 12056 #if defined(BCM_GREYHOUND2_SUPPORT) 12057 /* 12058 * DCB Type 37 Support 12059 */ 12060 /* From FORMAT CPU_OPCODES */ 12061 static soc_rx_reason_t 12062 dcb37_rx_reason_map[] = { 12063 socRxReasonUnknownVlan, /* Offset 0 */ 12064 socRxReasonL2SourceMiss, /* Offset 1 */ 12065 socRxReasonL2DestMiss, /* Offset 2 */ 12066 socRxReasonL2Move, /* Offset 3 */ 12067 socRxReasonL2Cpu, /* Offset 4 */ 12068 socRxReasonSampleSource, /* Offset 5 */ 12069 socRxReasonSampleDest, /* Offset 6 */ 12070 socRxReasonL3SourceMiss, /* Offset 7 */ 12071 socRxReasonL3DestMiss, /* Offset 8 */ 12072 socRxReasonL3SourceMove, /* Offset 9 */ 12073 socRxReasonMcastMiss, /* Offset 10 */ 12074 socRxReasonIpMcastMiss, /* Offset 11 */ 12075 socRxReasonFilterMatch, /* Offset 12 */ 12076 socRxReasonL3HeaderError, /* Offset 13 */ 12077 socRxReasonProtocol, /* Offset 14 */ 12078 socRxReasonDosAttack, /* Offset 15 */ 12079 socRxReasonMartianAddr, /* Offset 16 */ 12080 socRxReasonTunnelError, /* Offset 17 */ 12081 socRxReasonL2MtuFail, /* Offset 18 */ 12082 socRxReasonIcmpRedirect, /* Offset 19 */ 12083 socRxReasonL3Slowpath, /* Offset 20 */ 12084 socRxReasonParityError, /* Offset 21 */ 12085 socRxReasonL3MtuFail, /* Offset 22 */ 12086 socRxReasonHigigHdrError, /* Offset 23 */ 12087 socRxReasonMcastIdxError, /* Offset 24 */ 12088 socRxReasonVlanFilterMatch, /* Offset 25 */ 12089 socRxReasonClassBasedMove, /* Offset 26 */ 12090 socRxReasonL2LearnLimit, /* Offset 27 */ 12091 socRxReasonMplsLabelMiss, /* Offset 28 */ 12092 socRxReasonMplsInvalidAction, /* Offset 29 */ 12093 socRxReasonMplsInvalidPayload, /* Offset 30 */ 12094 socRxReasonMplsTtl, /* Offset 31 */ 12095 socRxReasonMplsSequenceNumber, /* Offset 32 */ 12096 socRxReasonL2NonUnicastMiss, /* Offset 33 */ 12097 socRxReasonNhop, /* Offset 34 */ 12098 socRxReasonMplsCtrlWordError, /* Offset 35 */ 12099 socRxReasonTimeSync, /* Offset 36 */ 12100 socRxReasonOAMSlowpath, /* Offset 37 */ 12101 socRxReasonOAMError, /* Offset 38 */ 12102 socRxReasonOAMLMDM, /* Offset 39 */ 12103 socRxReasonL3AddrBindFail, /* Offset 40 */ 12104 socRxReasonVlanTranslate, /* Offset 41 */ 12105 socRxReasonNiv, /* Offset 42 */ 12106 socRxReasonNiv, /* Offset 43 */ 12107 socRxReasonNiv, /* Offset 44 */ 12108 socRxReasonStation, /* Offset 45 */ 12109 socRxReasonL2StuFail, /* Offset 46 */ 12110 socReasonSrCounterExceeded, /* Offset 47 */ 12111 socRxReasonSrCopyToCpuBit0, /* Offset 48 */ 12112 socRxReasonSrCopyToCpuBit1, /* Offset 49 */ 12113 socRxReasonSrCopyToCpuBit2, /* Offset 50 */ 12114 socRxReasonSrCopyToCpuBit3, /* Offset 51 */ 12115 socRxReasonSrCopyToCpuBit4, /* Offset 52 */ 12116 socRxReasonSrCopyToCpuBit5, /* Offset 53 */ 12117 socRxReasonInvalid, /* Offset 54 */ 12118 socRxReasonInvalid, /* Offset 55 */ 12119 socRxReasonInvalid, /* Offset 56 */ 12120 socRxReasonInvalid, /* Offset 57 */ 12121 socRxReasonInvalid, /* Offset 58 */ 12122 socRxReasonInvalid, /* Offset 59 */ 12123 socRxReasonInvalid, /* Offset 60 */ 12124 socRxReasonInvalid, /* Offset 61 */ 12125 socRxReasonInvalid, /* Offset 62 */ 12126 socRxReasonInvalid /* Offset 63 */ 12127 }; 12128 static soc_rx_reason_t *dcb37_rx_reason_maps[] = { 12129 dcb37_rx_reason_map, 12130 NULL 12131 }; 12132 #ifdef BROADCOM_DEBUG 12133 static void 12134 dcb37_dump(int unit, dcb_t *dcb, char *prefix, int tx) 12135 { 12136 uint32 *p; 12137 int i, size; 12138 dcb19_t *dtx = (dcb19_t *)dcb; /* Fake out for different TX MH */ 12139 dcb37_t *d = (dcb37_t *)dcb; 12140 char ps[((DCB_MAX_SIZE/sizeof(uint32))*9)+1]; 12141 uint8 *h; 12142 #if defined(LE_HOST) 12143 uint32 hgh[4]; 12144 h = (uint8 *)&hgh[0]; 12145 12146 if (tx) { 12147 hgh[0] = soc_htonl(dtx->mh0); 12148 hgh[1] = soc_htonl(dtx->mh1); 12149 hgh[2] = soc_htonl(dtx->mh2); 12150 hgh[3] = soc_htonl(dtx->mh3); 12151 } else { 12152 hgh[0] = soc_htonl(d->mh0); 12153 hgh[1] = soc_htonl(d->mh1); 12154 hgh[2] = soc_htonl(d->mh2); 12155 hgh[3] = soc_htonl(d->mh3); 12156 } 12157 #else 12158 if (tx) { 12159 h = (uint8 *)&dtx->mh0; 12160 } else { 12161 h = (uint8 *)&d->mh0; 12162 } 12163 #endif 12164 12165 p = (uint32 *)dcb; 12166 size = SOC_DCB_SIZE(unit) / sizeof(uint32); 12167 for (i = 0; i < size; i++) { 12168 sal_sprintf(&ps[i*9], "%08x ", p[i]); 12169 } 12170 LOG_CLI((BSL_META_U(unit, 12171 "%s\t%s\n"), prefix, ps)); 12172 if ((SOC_DCB_HG_GET(unit, dcb)) || (SOC_DCB_RX_START_GET(unit, dcb))) { 12173 soc_dma_higig_dump(unit, prefix, h, 0, 0, NULL); 12174 } 12175 LOG_CLI((BSL_META_U(unit, 12176 "%s\ttype %d %ssg %schain %sreload %shg %sstat %spause %spurge\n"), 12177 prefix, 12178 SOC_DCB_TYPE(unit), 12179 SOC_DCB_SG_GET(unit, dcb) ? "" : "!", 12180 SOC_DCB_CHAIN_GET(unit, dcb) ? "" : "!", 12181 SOC_DCB_RELOAD_GET(unit, dcb) ? "" : "!", 12182 SOC_DCB_HG_GET(unit, dcb) ? "" : "!", 12183 SOC_DCB_STAT_GET(unit, dcb) ? "" : "!", 12184 d->c_pause ? "" : "!", 12185 SOC_DCB_PURGE_GET(unit, dcb) ? "" : "!")); 12186 LOG_CLI((BSL_META_U(unit, 12187 "%s\taddr %p reqcount %d xfercount %d\n"), 12188 prefix, 12189 (void *)SOC_DCB_ADDR_GET(unit, dcb), 12190 SOC_DCB_REQCOUNT_GET(unit, dcb), 12191 SOC_DCB_XFERCOUNT_GET(unit, dcb))); 12192 if (!tx) { 12193 LOG_CLI((BSL_META_U(unit, 12194 "%s\t%sdone %sstart %send %serror\n"), 12195 prefix, 12196 SOC_DCB_DONE_GET(unit, dcb) ? "" : "!", 12197 SOC_DCB_RX_START_GET(unit, dcb) ? "" : "!", 12198 SOC_DCB_RX_END_GET(unit, dcb) ? "" : "!", 12199 SOC_DCB_RX_ERROR_GET(unit, dcb) ? "" : "!")); 12200 #if defined(BCM_TSN_SR_SUPPORT) 12201 /* 12202 * Seamless Redundancy(SR) - Parallel Redundancy Protocol 2nd pass port 12203 * Loopback port: 12204 * DCB.MODULE_HEADER.SRC_PID 12205 * dcb23_rx_srcport_get 12206 * 12207 * ingress port: 12208 * EP_TO_CPU_HDR.SOURCE_PORT_NUM 12209 * dcb23_rx_ingport_get 12210 */ 12211 LOG_CLI((BSL_META_U(unit, 12212 "%s\t TSN-SR PRP loopback port %d \n"), 12213 prefix, 12214 SOC_DCB_RX_SRCPORT_GET(unit, dcb))); 12215 LOG_CLI((BSL_META_U(unit, 12216 "%s\t TSN-SR PRP Ingress port %d \n"), 12217 prefix, 12218 SOC_DCB_RX_INGPORT_GET(unit, dcb))); 12219 #endif /* BCM_TSN_SR_SUPPORT */ 12220 } 12221 if ((!tx) && (SOC_DCB_RX_START_GET(unit, dcb))) { 12222 dcb0_reason_dump(unit, dcb, prefix); 12223 LOG_CLI((BSL_META_U(unit, 12224 "%s %sdo_not_change_ttl %sbpdu %sl3routed %schg_tos %semirror %simirror\n"), 12225 prefix, 12226 d->do_not_change_ttl ? "" : "!", 12227 d->bpdu ? "" : "!", 12228 d->l3routed ? "" : "!", 12229 d->chg_tos ? "" : "!", 12230 d->emirror ? "" : "!", 12231 d->imirror ? "" : "!" 12232 )); 12233 LOG_CLI((BSL_META_U(unit, 12234 "%s %sreplicated %sl3only %soam_pkt %ssrc_hg\n"), 12235 prefix, 12236 d->replicated ? "" : "!", 12237 d->l3only ? "" : "!", 12238 d->oam_pkt ? "" : "!", 12239 d->src_hg ? "" : "!" 12240 )); 12241 LOG_CLI((BSL_META_U(unit, 12242 "%s %sswitch_pkt %sregen_crc %sservice_tag %sing_untagged\n"), 12243 prefix, 12244 d->switch_pkt ? "" : "!", 12245 d->word4.overlay2.regen_crc ? "" : "!", 12246 d->service_tag ? "" : "!", 12247 !(((soc_higig2_hdr_t *)h)->ppd_overlay1.ingress_tagged) ? "" : "!" 12248 )); 12249 LOG_CLI((BSL_META_U(unit, 12250 "%s %svfi_valid %schg_ecn ecn=%d\n"), 12251 prefix, 12252 d->vfi_valid ? "" : "!", 12253 d->chg_ecn ? "" : "!", 12254 d->ecn 12255 )); 12256 LOG_CLI((BSL_META_U(unit, 12257 "%s cpu_cos=%d cos=%d mtp_index=%d reason=%08x_%08x\n"), 12258 prefix, 12259 d->word4.overlay2.cpu_cos, 12260 d->cos, 12261 d->mtp_index, 12262 d->reason_hi, 12263 d->reason 12264 )); 12265 LOG_CLI((BSL_META_U(unit, 12266 "%s reason_type=%d match_rule=%d hg_type=%d mtp_index=%d\n"), 12267 prefix, 12268 d->word4.overlay1.cpu_opcode_type, 12269 d->match_rule, 12270 d->hg_type, 12271 d->mtp_index 12272 )); 12273 LOG_CLI((BSL_META_U(unit, 12274 "%s srcport=%d dscp=%d outer_pri=%d outer_cfi=%d outer_vid=%d\n"), 12275 prefix, 12276 d->srcport, 12277 d->dscp, 12278 d->outer_pri, 12279 d->outer_cfi, 12280 d->word4.overlay1.outer_vid 12281 )); 12282 LOG_CLI((BSL_META_U(unit, 12283 "%s inner_pri=%d inner_cfi=%d inner_vid=%d\n"), 12284 prefix, 12285 d->inner_pri, 12286 d->inner_cfi, 12287 d->inner_vid 12288 )); 12289 LOG_CLI((BSL_META_U(unit, 12290 "%s hgi=%d itag_status=%d otag_action=%d itag_action=%d\n"), 12291 prefix, 12292 d->hgi, 12293 d->itag_status, 12294 d->otag_action, 12295 d->itag_action 12296 )); 12297 LOG_CLI((BSL_META_U(unit, 12298 "%s repl_nhi=%05x ts_type=%d timestamp=%08x_%08x\n"), 12299 prefix, 12300 d->repl_nhi, 12301 d->timestamp_type, 12302 d->timestamp_hi, 12303 d->word12.overlay1.timestamp 12304 )); 12305 LOG_CLI((BSL_META_U(unit, 12306 "%s vfi=%d em_mtp_index=%d vntag_action=%d\n"), 12307 prefix, 12308 d->word12.overlay2.vfi, 12309 d->em_mtp_index, 12310 d->vntag_action 12311 )); 12312 } 12313 } 12314 #endif /* BROADCOM_DEBUG */ 12315 12316 GETFUNCEXPR(37, rx_l3_intf, ((d->replicated) ? (d->repl_nhi) : 12317 (((d->repl_nhi) & 0x7ff) + _SHR_L3_EGRESS_IDX_MIN))) 12318 GETFUNCNULL(37, read_ecc_error) 12319 GETFUNCNULL(37, desc_remaining) 12320 SETFUNCNULL(37, desc_remaining) 12321 GETFUNCNULL(37, desc_status) 12322 SETFUNCNULL(37, desc_status) 12323 GETFUNCNULL(37, match_id_lo) 12324 GETFUNCNULL(37, match_id_hi) 12325 GETFUNCNULL(37, forwarding_type) 12326 GETFUNCNULL(37, forwarding_zone_id) 12327 12328 dcb_op_t dcb37_op = { 12329 37, 12330 sizeof(dcb37_t), 12331 dcb37_rx_reason_maps, 12332 dcb0_rx_reason_map_get, 12333 dcb0_rx_reasons_get, 12334 dcb19_init, 12335 dcb19_addtx, 12336 dcb19_addrx, 12337 dcb19_intrinfo, 12338 dcb19_reqcount_set, 12339 dcb19_reqcount_get, 12340 dcb19_xfercount_get, 12341 dcb0_addr_set, 12342 dcb0_addr_get, 12343 dcb0_paddr_get, 12344 dcb19_done_set, 12345 dcb19_done_get, 12346 dcb19_sg_set, 12347 dcb19_sg_get, 12348 dcb19_chain_set, 12349 dcb19_chain_get, 12350 dcb19_reload_set, 12351 dcb19_reload_get, 12352 dcb19_desc_intr_set, 12353 dcb19_desc_intr_get, 12354 dcb19_tx_l2pbm_set, 12355 dcb19_tx_utpbm_set, 12356 dcb19_tx_l3pbm_set, 12357 dcb19_tx_crc_set, 12358 dcb19_tx_cos_set, 12359 dcb19_tx_destmod_set, 12360 dcb19_tx_destport_set, 12361 dcb19_tx_opcode_set, 12362 dcb19_tx_srcmod_set, 12363 dcb19_tx_srcport_set, 12364 dcb19_tx_prio_set, 12365 dcb19_tx_pfm_set, 12366 dcb31_rx_untagged_get, 12367 dcb19_rx_crc_get, 12368 dcb31_rx_cos_get, 12369 dcb23_rx_destmod_get, 12370 dcb23_rx_destport_get, 12371 dcb23_rx_opcode_get, 12372 dcb23_rx_classtag_get, 12373 dcb23_rx_matchrule_get, 12374 dcb19_rx_start_get, 12375 dcb19_rx_end_get, 12376 dcb19_rx_error_get, 12377 dcb23_rx_prio_get, 12378 dcb23_rx_reason_get, 12379 dcb23_rx_reason_hi_get, 12380 dcb23_rx_ingport_get, 12381 dcb23_rx_srcport_get, 12382 dcb23_rx_srcmod_get, 12383 dcb23_rx_mcast_get, 12384 dcb23_rx_vclabel_get, 12385 dcb31_rx_mirror_get, 12386 dcb23_rx_timestamp_get, 12387 dcb31_rx_timestamp_upper_get, 12388 dcb19_hg_set, 12389 dcb19_hg_get, 12390 dcb19_stat_set, 12391 dcb19_stat_get, 12392 dcb19_purge_set, 12393 dcb19_purge_get, 12394 dcb23_mhp_get, 12395 dcb31_outer_vid_get, 12396 dcb31_outer_pri_get, 12397 dcb31_outer_cfi_get, 12398 dcb31_rx_outer_tag_action_get, 12399 dcb31_inner_vid_get, 12400 dcb31_inner_pri_get, 12401 dcb31_inner_cfi_get, 12402 dcb31_rx_inner_tag_action_get, 12403 dcb31_rx_bpdu_get, 12404 dcb37_rx_l3_intf_get, 12405 dcb19_rx_decap_tunnel_get, 12406 dcb31_rx_switch_drop_get, 12407 dcb23_olp_encap_oam_pkt_get, 12408 dcb37_read_ecc_error_get, 12409 dcb37_desc_remaining_get, 12410 dcb37_desc_remaining_set, 12411 dcb37_desc_status_get, 12412 dcb37_desc_status_set, 12413 dcb37_match_id_lo_get, 12414 dcb37_match_id_hi_get, 12415 dcb37_forwarding_type_get, 12416 dcb37_forwarding_zone_id_get, 12417 #ifdef BROADCOM_DEBUG 12418 dcb19_tx_l2pbm_get, 12419 dcb19_tx_utpbm_get, 12420 dcb19_tx_l3pbm_get, 12421 dcb19_tx_crc_get, 12422 dcb19_tx_cos_get, 12423 dcb19_tx_destmod_get, 12424 dcb19_tx_destport_get, 12425 dcb19_tx_opcode_get, 12426 dcb19_tx_srcmod_get, 12427 dcb19_tx_srcport_get, 12428 dcb19_tx_prio_get, 12429 dcb19_tx_pfm_get, 12430 12431 dcb37_dump, 12432 dcb0_reason_dump, 12433 #endif /* BROADCOM_DEBUG */ 12434 #ifdef PLISIM 12435 dcb31_status_init, 12436 dcb19_xfercount_set, 12437 dcb19_rx_start_set, 12438 dcb19_rx_end_set, 12439 dcb19_rx_error_set, 12440 dcb19_rx_crc_set, 12441 dcb23_rx_ingport_set, 12442 #endif /* PLISIM */ 12443 }; 12444 #endif /* BCM_GREYHOUND2_SUPPORT */ 12445 12446 #if defined(BCM_TOMAHAWK3_SUPPORT) 12447 SETFUNCFIELD(38, reqcount, c_count, uint32 count, count) 12448 GETFUNCFIELD(38, reqcount, c_count) 12449 GETFUNCFIELD(38, xfercount, count) 12450 SETFUNCFIELD(38, done, done, int val, val ? 1 : 0) 12451 GETFUNCFIELD(38, done, done) 12452 SETFUNCFIELD(38, sg, c_sg, int val, val ? 1 : 0) 12453 GETFUNCFIELD(38, sg, c_sg) 12454 SETFUNCFIELD(38, chain, c_chain, int val, val ? 1 : 0) 12455 GETFUNCFIELD(38, chain, c_chain) 12456 SETFUNCFIELD(38, reload, c_reload, int val, val ? 1 : 0) 12457 GETFUNCFIELD(38, reload, c_reload) 12458 GETFUNCFIELD(38, rx_start, start) 12459 GETFUNCFIELD(38, rx_end, end) 12460 GETFUNCFIELD(38, rx_error, error) 12461 SETFUNCFIELD(38, hg, c_hg, uint32 hg, hg) 12462 GETFUNCFIELD(38, hg, c_hg) 12463 SETFUNCFIELD(38, purge, c_purge, uint32 purge, purge) 12464 GETFUNCFIELD(38, purge, c_purge) 12465 GETFUNCFIELD(38, read_ecc_error, ecc_error) 12466 GETFUNCFIELD(38, desc_status, c_desc_status) 12467 GETFUNCFIELD(38, desc_intr, c_intr) 12468 GETFUNCFIELD(38, desc_remaining, c_desc) 12469 12470 GETHDRFUNCFIELD(38, rx_timestamp, timestamp) 12471 GETHDRFUNCFIELD(38, rx_timestamp_upper, timestamp_hi) 12472 GETHDRPTREXPR(38, mhp, &(h->mh0)) 12473 GETHDRFUNCFIELD(38, outer_vid, outer_vid) 12474 GETHDRFUNCFIELD(38, outer_pri, outer_pri) 12475 GETHDRFUNCFIELD(38, outer_cfi, outer_cfi) 12476 GETHDRFUNCFIELD(38, rx_outer_tag_action, word3.overlay1.otag_action) 12477 GETHDRFUNCNULL(38, inner_vid) 12478 GETHDRFUNCNULL(38, inner_pri) 12479 GETHDRFUNCNULL(38, inner_cfi) 12480 GETHDRFUNCNULL(38, rx_inner_tag_action) 12481 GETHDRFUNCFIELD(38, rx_bpdu, word0.overlay1.bpdu) 12482 GETHDRFUNCNULL(38, match_id_lo) 12483 GETHDRFUNCNULL(38, match_id_hi) 12484 GETHDRFUNCNULL(38, forwarding_type) 12485 GETHDRFUNCNULL(38, forwarding_zone_id) 12486 12487 static uint32 ep_to_cpu_hdr38_rx_crc_get(void *hdr) { 12488 return 0; 12489 } 12490 12491 static uint32 12492 ep_to_cpu_hdr38_rx_untagged_get(void *hdr, int dt_mode, int ingport_is_hg) 12493 { 12494 ep_to_cpu_hdr38_t *h = (ep_to_cpu_hdr38_t *)hdr; 12495 uint32 tag_status = h->word3.overlay1.tag_status; 12496 12497 COMPILER_REFERENCE(dt_mode); 12498 /* We have a case where though the number of bits for the 12499 * tag status is 2, we support only 2 states 12500 * 0 = untagged 12501 * 1 = single outer-tag 12502 */ 12503 return (ingport_is_hg ? 12504 ((tag_status) ? 0 : 2) : 12505 ((tag_status) ? 2 : 3)); 12506 } 12507 12508 static void 12509 ep_to_cpu_hdr38_rx_reasons_get(dcb_op_t *dcb_op, void *hdr, soc_rx_reasons_t *reasons) 12510 { 12511 soc_rx_reason_t *map, *encoding_map; 12512 uint32 opcode[2], encoding[3]; 12513 uint32 bit_val; 12514 int word_idx, bit_idx, opcode_idx, map_idx, word_count; 12515 int enc_bit = 0; 12516 12517 SOC_RX_REASON_CLEAR_ALL(*reasons); 12518 12519 opcode[0] = dcb_op->rx_reason_get(hdr); 12520 opcode[1] = dcb_op->rx_reason_hi_get(hdr); 12521 word_count = 2; 12522 sal_memset(encoding, 0, sizeof(encoding)); 12523 map = dcb_op->rx_reason_maps[0]; 12524 for (word_idx = 0; word_idx < word_count; word_idx++) { 12525 for (bit_idx = 0; bit_idx < 32; bit_idx++) { 12526 opcode_idx = word_idx * 32 + bit_idx; 12527 bit_val = opcode[word_idx] & (1 << bit_idx) ? 1 : 0; 12528 for (map_idx = 0; ; map_idx++) { 12529 encoding_map = dcb_op->rx_reason_maps[1 + map_idx]; 12530 if (encoding_map == NULL) { 12531 break; 12532 } 12533 if (map[opcode_idx] != encoding_map[0]) { 12534 continue; 12535 } 12536 if (opcode_idx == 0 || map[opcode_idx - 1] != encoding_map[0]) { 12537 enc_bit = 0; 12538 } 12539 encoding[map_idx] |= bit_val << enc_bit; 12540 enc_bit++; 12541 break; 12542 } 12543 if (encoding_map == NULL && bit_val) { 12544 SOC_RX_REASON_SET(*reasons, map[opcode_idx]); 12545 } 12546 } 12547 } 12548 12549 for (map_idx = 0; ; map_idx++) { 12550 encoding_map = dcb_op->rx_reason_maps[1 + map_idx]; 12551 if (encoding_map == NULL) { 12552 break; 12553 } 12554 if (encoding[map_idx] != socRxReasonInvalid) { 12555 SOC_RX_REASON_SET(*reasons, encoding_map[encoding[map_idx]]); 12556 } 12557 } 12558 12559 /* BPDU bit should be a reason, paste it in here */ 12560 if (dcb_op->rx_bpdu_get(hdr)) { 12561 SOC_RX_REASON_SET(*reasons, socRxReasonBpdu); 12562 } 12563 12564 return; 12565 } 12566 12567 GETHDRFUNCFIELD(38, rx_cos, word0.overlay2.cpu_cos) 12568 GETHDRHG2FUNCFIELD(38, rx_destmod, dst_mod) 12569 GETHDRHG2FUNCFIELD(38, rx_destport, dst_port) 12570 12571 GETHDRHG2FUNCFIELD(38, rx_opcode, opcode) 12572 GETHDRHG2FUNCEXPR(38, rx_classtag, (h->ppd_overlay1.ppd_type != 1 ? 0 : 12573 (h->ppd_overlay2.ctag_hi << 8) | 12574 (h->ppd_overlay2.ctag_lo))) 12575 GETHDRFUNCFIELD(38, rx_matchrule, match_rule) 12576 GETHDRHG2FUNCFIELD(38, rx_prio, vlan_pri) /* outer_pri */ 12577 12578 static uint32 12579 ep_to_cpu_hdr38_rx_reason_get(void *hdr) 12580 { 12581 ep_to_cpu_hdr38_t *h = (ep_to_cpu_hdr38_t *)hdr; 12582 12583 return (h->switch_pkt) ? (h->reason) : 0; 12584 } 12585 12586 static uint32 12587 ep_to_cpu_hdr38_rx_reason_hi_get(void *hdr) 12588 { 12589 ep_to_cpu_hdr38_t *h = (ep_to_cpu_hdr38_t *)hdr; 12590 12591 return (h->switch_pkt) ? (h->reason_hi) : 0; 12592 } 12593 12594 GETHDRFUNCFIELD(38, rx_ingport, srcport) 12595 GETHDRHG2FUNCFIELD(38, rx_srcport, src_port) 12596 GETHDRHG2FUNCFIELD(38, rx_srcmod, src_mod) 12597 GETHDRHG2FUNCEXPR(38, rx_mcast, ((h->ppd_overlay1.dst_mod << 8) | 12598 (h->ppd_overlay1.dst_port))) 12599 GETHDRHG2FUNCEXPR(38, rx_vclabel, ((h->ppd_overlay1.vc_label_19_16 << 16) | 12600 (h->ppd_overlay1.vc_label_15_8 << 8) | 12601 (h->ppd_overlay1.vc_label_7_0))) 12602 GETHDRFUNCEXPR(38, rx_mirror, ((SOC_CPU_OPCODE_TYPE_IP_0 == 12603 h->word3.overlay1.cpu_opcode_type) ? 12604 (h->reason & (1 << 17)) : 0)) 12605 12606 static _shr_rx_decap_tunnel_t dcb38_rx_decap_tunnel_map[] = { 12607 _SHR_RX_DECAP_NONE, 12608 _SHR_RX_DECAP_IP, 12609 _SHR_RX_DECAP_L2MPLS_1LABEL, 12610 _SHR_RX_DECAP_L2MPLS_2LABEL, 12611 _SHR_RX_DECAP_MPLS_3LABEL, 12612 _SHR_RX_DECAP_L3MPLS_1LABEL, 12613 _SHR_RX_DECAP_L3MPLS_2LABEL, 12614 _SHR_RX_DECAP_MPLS_3LABEL 12615 }; 12616 12617 static uint32 ep_to_cpu_hdr38_rx_decap_tunnel_get(void *hdr) { 12618 ep_to_cpu_hdr38_t *h = (ep_to_cpu_hdr38_t *)hdr; 12619 /* Check for array bounds */ 12620 if ( (h->decap_tunnel_type < 12621 (sizeof (dcb38_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) { 12622 return (uint32)dcb38_rx_decap_tunnel_map[h->decap_tunnel_type]; 12623 } 12624 return (uint32)_SHR_RX_DECAP_NONE; 12625 } 12626 GETHDRFUNCNULL(38, rx_l3_intf) 12627 GETHDRFUNCNULL(38, rx_switch_drop) 12628 GETHDRFUNCNULL(38, olp_encap_oam_pkt) 12629 12630 #ifdef PLISIM /* these routines are only used by pcid */ 12631 static void dcb38_status_init(dcb_t *dcb) 12632 { 12633 uint32 *d = (uint32 *)dcb; 12634 12635 d[2] = d[3] = 0; 12636 } 12637 SETFUNCFIELD(38, xfercount, count, uint32 count, count) 12638 SETFUNCFIELD(38, rx_start, start, int val, val ? 1 : 0) 12639 SETFUNCFIELD(38, rx_end, end, int val, val ? 1 : 0) 12640 SETFUNCFIELD(38, rx_error, error, int val, val ? 1 : 0) 12641 SETHDRFUNCEXPRIGNORE(38, rx_crc, int val, ignore) 12642 SETHDRFUNCFIELD(38, rx_ingport, srcport, int val, val) 12643 #endif /* PLISIM */ 12644 12645 static void 12646 dcb38_init(dcb_t *dcb) 12647 { 12648 uint32 *d = (uint32 *)dcb; 12649 12650 d[0] = d[1] = d[2] = d[3] = 0; 12651 } 12652 12653 static int 12654 dcb38_add_rx(dv_t *dv, sal_vaddr_t addr, uint32 count, uint32 flags) 12655 { 12656 dcb38_t *d; /* DCB */ 12657 uint32 *di; /* DCB integer pointer */ 12658 sal_paddr_t paddr; 12659 12660 if(!addr) 12661 return SOC_E_PARAM; 12662 12663 d = (dcb38_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); 12664 12665 if (dv->dv_vcnt > 0) { /* chain off previous dcb */ 12666 d[-1].c_chain = 1; 12667 } 12668 12669 di = (uint32 *)d; 12670 di[0] = di[1] = di[2] = di[3] = 0; 12671 12672 if (addr) { 12673 paddr = soc_cm_l2p(dv->dv_unit, (void *)addr); 12674 d->addr_lo = PTR_TO_INT(paddr); 12675 d->addr_hi = (0x10000000 | PTR_HI_TO_INT(paddr)); 12676 } 12677 12678 d->c_count = count; 12679 d->c_sg = 1; 12680 12681 dv->dv_vcnt += 1; 12682 return dv->dv_cnt - dv->dv_vcnt; 12683 } 12684 12685 static int 12686 dcb38_add_tx(dv_t *dv, sal_vaddr_t addr, uint32 count, 12687 pbmp_t l2pbm, pbmp_t utpbm, pbmp_t l3pbm, uint32 flags, uint32 *hgh) 12688 { 12689 dcb38_t *d; /* DCB */ 12690 uint32 *di; /* DCB integer pointer */ 12691 sal_paddr_t paddr; /* Packet buffer physical address */ 12692 12693 if(!addr) 12694 return SOC_E_PARAM; 12695 12696 d = (dcb38_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); 12697 12698 if (addr) 12699 paddr = soc_cm_l2p(dv->dv_unit, (void *)addr); 12700 12701 if (dv->dv_vcnt > 0 && (dv->dv_flags & DV_F_COMBINE_DCB) && 12702 (d[-1].c_sg != 0) && 12703 ((d[-1].addr_lo + d[-1].c_count) == paddr) && 12704 (d[-1].c_count + count <= DCB_MAX_REQCOUNT)) { 12705 d[-1].c_count += count; 12706 return dv->dv_cnt - dv->dv_vcnt; 12707 } 12708 12709 if (dv->dv_vcnt >= dv->dv_cnt) { 12710 return SOC_E_FULL; 12711 } 12712 if (dv->dv_vcnt > 0) { /* chain off previous dcb */ 12713 d[-1].c_chain = 1; 12714 } 12715 12716 di = (uint32 *)d; 12717 di[0] = di[1] = di[2] = di[3] = 0; 12718 12719 d->addr_lo = PTR_TO_INT(paddr); 12720 d->addr_hi = (0x10000000 | PTR_HI_TO_INT(paddr)); 12721 d->c_count = count; 12722 d->c_sg = 1; 12723 12724 d->c_purge = SOC_DMA_PURGE_GET(flags); 12725 12726 if (SOC_DMA_HG_GET(flags)) { 12727 d->c_hg = 1; 12728 } 12729 12730 dv->dv_vcnt += 1; 12731 12732 return dv->dv_cnt - dv->dv_vcnt; 12733 } 12734 12735 static uint32 12736 dcb38_intr_info(int unit, dcb_t *dcb, int tx, uint32 *count) 12737 { 12738 dcb38_t *d = (dcb38_t *)dcb; /* DCB */ 12739 uint32 f; /* SOC_DCB_INFO_* flags */ 12740 12741 if (!d->done) { 12742 return 0; 12743 } 12744 12745 f = SOC_DCB_INFO_DONE; 12746 if (tx) { 12747 if (!d->c_sg) { 12748 f |= SOC_DCB_INFO_PKTEND; 12749 } 12750 } else { 12751 if (d->end) { 12752 f |= SOC_DCB_INFO_PKTEND; 12753 } 12754 } 12755 12756 *count = d->count; 12757 return f; 12758 } 12759 12760 /* the addr related functions are the same for all dcb types */ 12761 static void 12762 dcb38_addr_set(int unit, dcb_t *dcb, sal_vaddr_t addr) 12763 { 12764 dcb38_t *d = (dcb38_t *)dcb; /* DCB */ 12765 sal_paddr_t paddr; 12766 12767 if (addr == 0) { 12768 d->addr_lo = 0; 12769 d->addr_hi = 0; 12770 } else { 12771 paddr = soc_cm_l2p(unit, (void *)addr); 12772 d->addr_lo = PTR_TO_INT(paddr); 12773 d->addr_hi = (0x10000000 | PTR_HI_TO_INT(paddr)); 12774 } 12775 } 12776 12777 static sal_vaddr_t 12778 dcb38_addr_get(int unit, dcb_t *dcb) 12779 { 12780 dcb38_t *d = (dcb38_t *)dcb; /* DCB */ 12781 sal_paddr_t paddr; 12782 12783 #if defined(COMPILER_OVERRIDE_NO_LONGLONG) || defined(__PEDANTIC__) 12784 paddr = d->addr_lo; 12785 #else 12786 paddr = (((uint64)(d->addr_hi & ~(0x10000000)) << 32) | d->addr_lo); 12787 #endif 12788 12789 return (sal_vaddr_t)soc_cm_p2l(unit, paddr); 12790 } 12791 12792 static sal_paddr_t 12793 dcb38_paddr_get(dcb_t *dcb) 12794 { 12795 uint32 *d = (uint32 *)dcb; 12796 12797 return (sal_paddr_t)*d; 12798 } 12799 12800 static void 12801 dcb38_desc_intr_set(dcb_t * dcb, int val) 12802 { 12803 dcb38_t * d = (dcb38_t *)dcb; 12804 12805 d->c_intr = val; 12806 return; 12807 } 12808 12809 static uint32 12810 dcb38_desc_status_set(dcb_t * dcb, uint32 val) 12811 { 12812 dcb38_t * d = (dcb38_t *)dcb; 12813 12814 d->c_desc_status = val; 12815 return 0; 12816 } 12817 12818 static uint32 12819 dcb38_desc_remaining_set(dcb_t * dcb, uint32 val) 12820 { 12821 dcb38_t * d = (dcb38_t *)dcb; 12822 12823 d->c_desc = val; 12824 return 0; 12825 } 12826 12827 #ifdef BROADCOM_DEBUG 12828 static void 12829 dcb38_dump(int unit, dcb_t *dcb, char *prefix, int tx) 12830 { 12831 uint32 *p; 12832 int i, size; 12833 char ps[((DCB_MAX_SIZE/sizeof(uint32))*9)+1]; 12834 12835 p = (uint32 *)dcb; 12836 size = SOC_DCB_SIZE(unit) / sizeof(uint32); 12837 for (i = 0; i < size; i++) { 12838 sal_sprintf(&ps[i*9], "%08x ", p[i]); 12839 } 12840 12841 LOG_CLI((BSL_META_U(unit, 12842 "%s\t%s\n"), prefix, ps)); 12843 12844 LOG_CLI((BSL_META_U(unit, 12845 "%s\ttype %d %schain %ssg %sreload %shg %spurge \n"), 12846 prefix, 12847 SOC_DCB_TYPE(unit), 12848 SOC_DCB_CHAIN_GET(unit, dcb) ? "" : "!", 12849 SOC_DCB_SG_GET(unit, dcb) ? "" : "!", 12850 SOC_DCB_RELOAD_GET(unit, dcb) ? "" : "!", 12851 SOC_DCB_HG_GET(unit, dcb) ? "" : "!", 12852 SOC_DCB_PURGE_GET(unit, dcb) ? "" : "!")); 12853 12854 LOG_CLI((BSL_META_U(unit, 12855 "%s\taddr %p reqcount %d xfercount %d\n"), 12856 prefix, 12857 (void *)SOC_DCB_ADDR_GET(unit, dcb), 12858 SOC_DCB_REQCOUNT_GET(unit, dcb), 12859 SOC_DCB_XFERCOUNT_GET(unit, dcb))); 12860 12861 if (!tx) { 12862 LOG_CLI((BSL_META_U(unit, 12863 "%s\t%sdone %serror %sstart %send\n"), 12864 prefix, 12865 SOC_DCB_DONE_GET(unit, dcb) ? "" : "!", 12866 SOC_DCB_RX_ERROR_GET(unit, dcb) ? "" : "!", 12867 SOC_DCB_RX_START_GET(unit, dcb) ? "" : "!", 12868 SOC_DCB_RX_END_GET(unit, dcb) ? "" : "!")); 12869 } 12870 12871 if (tx || !SOC_DCB_RX_START_GET(unit, dcb)) { 12872 return; 12873 } 12874 } 12875 #endif 12876 12877 /* 12878 * DCB Type 38 Support 12879 */ 12880 /* From FORMAT CPU_OPCODES */ 12881 static soc_rx_reason_t 12882 dcb38_rx_reason_map[] = { 12883 socRxReasonUnknownVlan, /* 0: CPU_UVLAN */ 12884 socRxReasonL2SourceMiss, /* 1: CPU_SLF */ 12885 socRxReasonL2DestMiss, /* 2: CPU_DLF */ 12886 socRxReasonL2Move, /* 3: CPU_L2MOVE */ 12887 socRxReasonL2Cpu, /* 4: CPU_L2CPU */ 12888 socRxReasonL3SourceMiss, /* 5: CPU_L3SRC_MISS */ 12889 socRxReasonL3DestMiss, /* 6: CPU_L3DST_MISS */ 12890 socRxReasonL3SourceMove, /* 7: CPU_L3SRC_MOVE */ 12891 socRxReasonMcastMiss, /* 8: CPU_MC_MISS */ 12892 socRxReasonIpMcastMiss, /* 9: CPU_IPMC_MISS */ 12893 socRxReasonFilterMatch, /* 10: CPU_FFP */ 12894 socRxReasonL3HeaderError, /* 11: CPU_L3HDR_ERR */ 12895 socRxReasonProtocol, /* 12: CPU_PROTOCOL_PKT */ 12896 socRxReasonDosAttack, /* 13: CPU_DOS_ATTACK */ 12897 socRxReasonMartianAddr, /* 14: CPU_MARTIAN_ADDR */ 12898 socRxReasonTunnelError, /* 15: CPU_TUNNEL_ERR */ 12899 socRxReasonSampleSourceFlex, /* 16: CPU_SFLOW_FLEX */ 12900 socRxReasonSampleSourceFlex, /* 17: CPU_SFLOW_FLEX */ 12901 socRxReasonIcmpRedirect, /* 18: ICMP_REDIRECT */ 12902 socRxReasonL3Slowpath, /* 19: L3_SLOWPATH */ 12903 socRxReasonParityError, /* 20: PARITY_ERROR */ 12904 socRxReasonL3MtuFail, /* 21: L3_MTU_CHECK_FAIL */ 12905 socRxReasonMcastIdxError, /* 22: MCIDX_ERROR */ 12906 socRxReasonVlanFilterMatch, /* 23: VFP */ 12907 socRxReasonMplsError, /* 24: MPLS_LABEL_MISS */ 12908 socRxReasonMplsError, /* 25: MPLS_INVALID_ACTION */ 12909 socRxReasonMplsError, /* 26: MPLS_INVALID_PAYLOAD */ 12910 socRxReasonL2NonUnicastMiss, /* 27: PBT_NONUC_PKT */ 12911 socRxReasonNhop, /* 28: L3_NEXT_HOP */ 12912 socRxReasonStation, /* 29: MY_STATION */ 12913 socRxReasonTimeSync, /* 30: TIME_SYNC */ 12914 socRxReasonTunnelDecapEcnError,/* 31: TUNNEL_DECAP_ECN_ERROR (new) */ 12915 socRxReasonBfdSlowpath, /* 32: BFD SLOWPATH */ 12916 socRxReasonBfd, /* 33: BFD_ERROR */ 12917 #if 1 12918 socRxReasonInvalid, /* 34:NOT DEFINED */ 12919 #endif 12920 socRxReasonMplsUnknownAch, /* 35: MPLS_UNKNOWN_ACH_ERROR */ 12921 socRxReasonMplsRouterAlertLabel, /* 36: MPLS_ALERT_LABEL */ 12922 socRxReasonIpmcInterfaceMismatch, /* 37: CPU_IPMC_INTERFACE_MISMATCH */ 12923 socRxReasonDlbMonitor, /* 38: DLB_MONITOR */ 12924 socRxReasonIntTurnAround, /* 39: INBAND_TELEMETRY */ 12925 socRxReasonEtrapMonitor, /* 40: ETRAP_MONITOR */ 12926 socRxReasonInvalid, /* 41: Reserved */ 12927 socRxReasonInvalid, /* 42: Reserved */ 12928 socRxReasonInvalid, /* 43: Reserved */ 12929 socRxReasonInvalid, /* 44: Reserved */ 12930 socRxReasonInvalid, /* 45: Reserved */ 12931 socRxReasonInvalid, /* 46: Reserved */ 12932 socRxReasonInvalid, /* 47: Reserved */ 12933 socRxReasonInvalid, /* 48: Reserved */ 12934 socRxReasonInvalid, /* 49: Reserved */ 12935 socRxReasonInvalid, /* 50: Reserved */ 12936 socRxReasonInvalid, /* 51: Reserved */ 12937 socRxReasonInvalid, /* 52: Reserved */ 12938 socRxReasonInvalid, /* 53: Reserved */ 12939 socRxReasonInvalid, /* 54: Reserved */ 12940 socRxReasonInvalid, /* 55: Reserved */ 12941 socRxReasonInvalid, /* 56: Reserved */ 12942 socRxReasonInvalid, /* 57: Reserved */ 12943 socRxReasonInvalid, /* 58: Reserved */ 12944 socRxReasonInvalid, /* 59: Reserved */ 12945 socRxReasonInvalid, /* 60: Reserved */ 12946 socRxReasonInvalid, /* 61: Reserved */ 12947 socRxReasonInvalid, /* 62: Reserved */ 12948 socRxReasonInvalid /* 63: Reserved */ 12949 }; 12950 12951 /* From CPU_SFLOW encoding from TH3 regsfile */ 12952 static soc_rx_reason_t dcb38_rx_reason_cpu_sflow_encoding_map[] = { 12953 socRxReasonSampleSourceFlex, /* 0: NO_ERRORS 12954 * Basefield, must match the entries above */ 12955 socRxReasonSampleSourceFlex, /* 1: CPU_SFLOW_FLEX */ 12956 socRxReasonSampleDest, /* 2: CPU_SFLOW_DST */ 12957 socRxReasonSampleSource, /* 3: CPU_SFLOW_SRC */ 12958 socRxReasonInvalid, /* Offset 4 */ 12959 socRxReasonInvalid, /* Offset 5 */ 12960 socRxReasonInvalid, /* Offset 6 */ 12961 socRxReasonInvalid, /* Offset 7 */ 12962 socRxReasonInvalid, /* Offset 8 */ 12963 socRxReasonInvalid, /* Offset 9 */ 12964 socRxReasonInvalid, /* Offset 10 */ 12965 socRxReasonInvalid, /* Offset 11 */ 12966 socRxReasonInvalid, /* Offset 12 */ 12967 socRxReasonInvalid, /* Offset 13 */ 12968 socRxReasonInvalid, /* Offset 14 */ 12969 socRxReasonInvalid, /* Offset 15 */ 12970 socRxReasonInvalid, /* Offset 16 */ 12971 socRxReasonInvalid, /* Offset 17 */ 12972 socRxReasonInvalid, /* Offset 18 */ 12973 socRxReasonInvalid, /* Offset 19 */ 12974 socRxReasonInvalid, /* Offset 20 */ 12975 socRxReasonInvalid, /* Offset 21 */ 12976 socRxReasonInvalid, /* Offset 22 */ 12977 socRxReasonInvalid, /* Offset 23 */ 12978 socRxReasonInvalid, /* Offset 24 */ 12979 socRxReasonInvalid, /* Offset 25 */ 12980 socRxReasonInvalid, /* Offset 26 */ 12981 socRxReasonInvalid, /* Offset 27 */ 12982 socRxReasonInvalid, /* Offset 28 */ 12983 socRxReasonInvalid, /* Offset 29 */ 12984 socRxReasonInvalid, /* Offset 30 */ 12985 socRxReasonInvalid, /* Offset 31 */ 12986 socRxReasonInvalid, /* Offset 32 */ 12987 socRxReasonInvalid, /* Offset 33 */ 12988 socRxReasonInvalid, /* Offset 34 */ 12989 socRxReasonInvalid, /* Offset 35 */ 12990 socRxReasonInvalid, /* Offset 36 */ 12991 socRxReasonInvalid, /* Offset 37 */ 12992 socRxReasonInvalid, /* Offset 38 */ 12993 socRxReasonInvalid, /* Offset 39 */ 12994 socRxReasonInvalid, /* Offset 40 */ 12995 socRxReasonInvalid, /* Offset 41 */ 12996 socRxReasonInvalid, /* Offset 42 */ 12997 socRxReasonInvalid, /* Offset 43 */ 12998 socRxReasonInvalid, /* Offset 44 */ 12999 socRxReasonInvalid, /* Offset 45 */ 13000 socRxReasonInvalid, /* Offset 46 */ 13001 socRxReasonInvalid, /* Offset 47 */ 13002 socRxReasonInvalid, /* Offset 48 */ 13003 socRxReasonInvalid, /* Offset 49 */ 13004 socRxReasonInvalid, /* Offset 50 */ 13005 socRxReasonInvalid, /* Offset 51 */ 13006 socRxReasonInvalid, /* Offset 52 */ 13007 socRxReasonInvalid, /* Offset 53 */ 13008 socRxReasonInvalid, /* Offset 54 */ 13009 socRxReasonInvalid, /* Offset 55 */ 13010 socRxReasonInvalid, /* Offset 56 */ 13011 socRxReasonInvalid, /* Offset 57 */ 13012 socRxReasonInvalid, /* Offset 58 */ 13013 socRxReasonInvalid, /* Offset 59 */ 13014 socRxReasonInvalid, /* Offset 60 */ 13015 socRxReasonInvalid, /* Offset 61 */ 13016 socRxReasonInvalid, /* Offset 62 */ 13017 socRxReasonInvalid /* Offset 63 */ 13018 }; 13019 13020 /* From MPLS_PROC_ERROR encoding in TH3 regsfile */ 13021 static soc_rx_reason_t dcb38_rx_reason_mpls_proc_err_encoding_map[] = { 13022 socRxReasonMplsError, /* 0: NO_ERRORS 13023 * Basefield, must match the entries above */ 13024 socRxReasonMplsInvalidPayload, /* 1: Invalid Payload */ 13025 socRxReasonMplsInvalidAction, /* 2: Invalid Action */ 13026 socRxReasonMplsLabelMiss, /* 3: Lookup Label Miss */ 13027 socRxReasonMplsTtl, /* 4: TTL Check Fail */ 13028 socRxReasonInvalid, /* Offset 5 */ 13029 socRxReasonInvalid, /* Offset 6 */ 13030 socRxReasonInvalid, /* Offset 7 */ 13031 socRxReasonInvalid, /* Offset 8 */ 13032 socRxReasonInvalid, /* Offset 9 */ 13033 socRxReasonInvalid, /* Offset 10 */ 13034 socRxReasonInvalid, /* Offset 11 */ 13035 socRxReasonInvalid, /* Offset 12 */ 13036 socRxReasonInvalid, /* Offset 13 */ 13037 socRxReasonInvalid, /* Offset 14 */ 13038 socRxReasonInvalid, /* Offset 15 */ 13039 socRxReasonInvalid, /* Offset 16 */ 13040 socRxReasonInvalid, /* Offset 17 */ 13041 socRxReasonInvalid, /* Offset 18 */ 13042 socRxReasonInvalid, /* Offset 19 */ 13043 socRxReasonInvalid, /* Offset 20 */ 13044 socRxReasonInvalid, /* Offset 21 */ 13045 socRxReasonInvalid, /* Offset 22 */ 13046 socRxReasonInvalid, /* Offset 23 */ 13047 socRxReasonInvalid, /* Offset 24 */ 13048 socRxReasonInvalid, /* Offset 25 */ 13049 socRxReasonInvalid, /* Offset 26 */ 13050 socRxReasonInvalid, /* Offset 27 */ 13051 socRxReasonInvalid, /* Offset 28 */ 13052 socRxReasonInvalid, /* Offset 29 */ 13053 socRxReasonInvalid, /* Offset 30 */ 13054 socRxReasonInvalid, /* Offset 31 */ 13055 socRxReasonInvalid, /* Offset 32 */ 13056 socRxReasonInvalid, /* Offset 33 */ 13057 socRxReasonInvalid, /* Offset 34 */ 13058 socRxReasonInvalid, /* Offset 35 */ 13059 socRxReasonInvalid, /* Offset 36 */ 13060 socRxReasonInvalid, /* Offset 37 */ 13061 socRxReasonInvalid, /* Offset 38 */ 13062 socRxReasonInvalid, /* Offset 39 */ 13063 socRxReasonInvalid, /* Offset 40 */ 13064 socRxReasonInvalid, /* Offset 41 */ 13065 socRxReasonInvalid, /* Offset 42 */ 13066 socRxReasonInvalid, /* Offset 43 */ 13067 socRxReasonInvalid, /* Offset 44 */ 13068 socRxReasonInvalid, /* Offset 45 */ 13069 socRxReasonInvalid, /* Offset 46 */ 13070 socRxReasonInvalid, /* Offset 47 */ 13071 socRxReasonInvalid, /* Offset 48 */ 13072 socRxReasonInvalid, /* Offset 49 */ 13073 socRxReasonInvalid, /* Offset 50 */ 13074 socRxReasonInvalid, /* Offset 51 */ 13075 socRxReasonInvalid, /* Offset 52 */ 13076 socRxReasonInvalid, /* Offset 53 */ 13077 socRxReasonInvalid, /* Offset 54 */ 13078 socRxReasonInvalid, /* Offset 55 */ 13079 socRxReasonInvalid, /* Offset 56 */ 13080 socRxReasonInvalid, /* Offset 57 */ 13081 socRxReasonInvalid, /* Offset 58 */ 13082 socRxReasonInvalid, /* Offset 59 */ 13083 socRxReasonInvalid, /* Offset 60 */ 13084 socRxReasonInvalid, /* Offset 61 */ 13085 socRxReasonInvalid, /* Offset 62 */ 13086 socRxReasonInvalid /* Offset 63 */ 13087 }; 13088 13089 static soc_rx_reason_t *dcb38_rx_reason_maps[] = { 13090 dcb38_rx_reason_map, 13091 dcb38_rx_reason_cpu_sflow_encoding_map, 13092 dcb38_rx_reason_mpls_proc_err_encoding_map, 13093 NULL 13094 }; 13095 13096 SETFUNCERR(38, tx_l2pbm, pbmp_t) 13097 SETFUNCERR(38, tx_utpbm, pbmp_t) 13098 SETFUNCERR(38, tx_l3pbm, pbmp_t) 13099 SETFUNCERR(38, tx_crc, int) 13100 SETFUNCERR(38, tx_cos, int) 13101 SETFUNCERR(38, tx_destmod, uint32) 13102 SETFUNCERR(38, tx_destport, uint32) 13103 SETFUNCERR(38, tx_opcode, uint32) 13104 SETFUNCERR(38, tx_srcmod, uint32) 13105 SETFUNCERR(38, tx_srcport, uint32) 13106 SETFUNCERR(38, tx_prio, uint32) 13107 SETFUNCERR(38, tx_pfm, uint32) 13108 #ifdef BROADCOM_DEBUG 13109 GETFUNCERR(38, tx_l2pbm) 13110 GETFUNCERR(38, tx_utpbm) 13111 GETFUNCERR(38, tx_l3pbm) 13112 GETFUNCERR(38, tx_crc) 13113 GETFUNCERR(38, tx_cos) 13114 GETFUNCERR(38, tx_destmod) 13115 GETFUNCERR(38, tx_destport) 13116 GETFUNCERR(38, tx_opcode) 13117 GETFUNCERR(38, tx_srcmod) 13118 GETFUNCERR(38, tx_srcport) 13119 GETFUNCERR(38, tx_prio) 13120 GETFUNCERR(38, tx_pfm) 13121 #endif /* BROADCOM_DEBUG */ 13122 13123 dcb_op_t dcb38_op = { 13124 38, 13125 sizeof(dcb38_t), 13126 dcb38_rx_reason_maps, 13127 dcb0_rx_reason_map_get, 13128 ep_to_cpu_hdr38_rx_reasons_get, 13129 dcb38_init, 13130 dcb38_add_tx, 13131 dcb38_add_rx, 13132 dcb38_intr_info, 13133 dcb38_reqcount_set, 13134 dcb38_reqcount_get, 13135 dcb38_xfercount_get, 13136 dcb38_addr_set, 13137 dcb38_addr_get, 13138 dcb38_paddr_get, 13139 dcb38_done_set, 13140 dcb38_done_get, 13141 dcb38_sg_set, 13142 dcb38_sg_get, 13143 dcb38_chain_set, 13144 dcb38_chain_get, 13145 dcb38_reload_set, 13146 dcb38_reload_get, 13147 dcb38_desc_intr_set, 13148 dcb38_desc_intr_get, 13149 dcb38_tx_l2pbm_set, 13150 dcb38_tx_utpbm_set, 13151 dcb38_tx_l3pbm_set, 13152 dcb38_tx_crc_set, 13153 dcb38_tx_cos_set, 13154 dcb38_tx_destmod_set, 13155 dcb38_tx_destport_set, 13156 dcb38_tx_opcode_set, 13157 dcb38_tx_srcmod_set, 13158 dcb38_tx_srcport_set, 13159 dcb38_tx_prio_set, 13160 dcb38_tx_pfm_set, 13161 ep_to_cpu_hdr38_rx_untagged_get, 13162 ep_to_cpu_hdr38_rx_crc_get, 13163 ep_to_cpu_hdr38_rx_cos_get, 13164 ep_to_cpu_hdr38_rx_destmod_get, 13165 ep_to_cpu_hdr38_rx_destport_get, 13166 ep_to_cpu_hdr38_rx_opcode_get, 13167 ep_to_cpu_hdr38_rx_classtag_get, 13168 ep_to_cpu_hdr38_rx_matchrule_get, 13169 dcb38_rx_start_get, 13170 dcb38_rx_end_get, 13171 dcb38_rx_error_get, 13172 ep_to_cpu_hdr38_rx_prio_get, 13173 ep_to_cpu_hdr38_rx_reason_get, 13174 ep_to_cpu_hdr38_rx_reason_hi_get, 13175 ep_to_cpu_hdr38_rx_ingport_get, 13176 ep_to_cpu_hdr38_rx_srcport_get, 13177 ep_to_cpu_hdr38_rx_srcmod_get, 13178 ep_to_cpu_hdr38_rx_mcast_get, 13179 ep_to_cpu_hdr38_rx_vclabel_get, 13180 ep_to_cpu_hdr38_rx_mirror_get, 13181 ep_to_cpu_hdr38_rx_timestamp_get, 13182 ep_to_cpu_hdr38_rx_timestamp_upper_get, 13183 dcb38_hg_set, 13184 dcb38_hg_get, 13185 NULL, 13186 NULL, 13187 dcb38_purge_set, 13188 dcb38_purge_get, 13189 ep_to_cpu_hdr38_mhp_get, 13190 ep_to_cpu_hdr38_outer_vid_get, 13191 ep_to_cpu_hdr38_outer_pri_get, 13192 ep_to_cpu_hdr38_outer_cfi_get, 13193 ep_to_cpu_hdr38_rx_outer_tag_action_get, 13194 ep_to_cpu_hdr38_inner_vid_get, 13195 ep_to_cpu_hdr38_inner_pri_get, 13196 ep_to_cpu_hdr38_inner_cfi_get, 13197 ep_to_cpu_hdr38_rx_inner_tag_action_get, 13198 ep_to_cpu_hdr38_rx_bpdu_get, 13199 ep_to_cpu_hdr38_rx_l3_intf_get, 13200 ep_to_cpu_hdr38_rx_decap_tunnel_get, 13201 ep_to_cpu_hdr38_rx_switch_drop_get, 13202 ep_to_cpu_hdr38_olp_encap_oam_pkt_get, 13203 dcb38_read_ecc_error_get, 13204 dcb38_desc_remaining_get, 13205 dcb38_desc_remaining_set, 13206 dcb38_desc_status_get, 13207 dcb38_desc_status_set, 13208 ep_to_cpu_hdr38_match_id_lo_get, 13209 ep_to_cpu_hdr38_match_id_hi_get, 13210 ep_to_cpu_hdr38_forwarding_type_get, 13211 ep_to_cpu_hdr38_forwarding_zone_id_get, 13212 #ifdef BROADCOM_DEBUG 13213 dcb38_tx_l2pbm_get, 13214 dcb38_tx_utpbm_get, 13215 dcb38_tx_l3pbm_get, 13216 dcb38_tx_crc_get, 13217 dcb38_tx_cos_get, 13218 dcb38_tx_destmod_get, 13219 dcb38_tx_destport_get, 13220 dcb38_tx_opcode_get, 13221 dcb38_tx_srcmod_get, 13222 dcb38_tx_srcport_get, 13223 dcb38_tx_prio_get, 13224 dcb38_tx_pfm_get, 13225 13226 dcb38_dump, 13227 dcb0_reason_dump, 13228 #endif 13229 #ifdef PLISIM 13230 dcb38_status_init, 13231 dcb38_xfercount_set, 13232 dcb38_rx_start_set, 13233 dcb38_rx_end_set, 13234 dcb38_rx_error_set, 13235 ep_to_cpu_hdr38_rx_crc_set, 13236 ep_to_cpu_hdr38_rx_ingport_set, 13237 #endif /* PLISIM */ 13238 13239 }; 13240 #endif /* BCM_TOMAHAWK3_SUPPORT */ 13241 13242 #ifdef BCM_DNX_SUPPORT 13243 SETFUNCFIELD(39, reqcount, c_count, uint32 count, count) 13244 GETFUNCFIELD(39, reqcount, c_count) 13245 SETFUNCFIELD(39, chain, c_chain, int val, val ? 1 : 0) 13246 GETFUNCFIELD(39, chain, c_chain) 13247 SETFUNCFIELD(39, sg, c_sg, int val, val ? 1 : 0) 13248 GETFUNCFIELD(39, sg, c_sg) 13249 SETFUNCFIELD(39, reload, c_reload, int val, val ? 1 : 0) 13250 GETFUNCFIELD(39, reload, c_reload) 13251 SETFUNCFIELD(39, hg, c_hg, uint32 hg, hg) 13252 GETFUNCFIELD(39, hg, c_hg) 13253 SETFUNCFIELD(39, purge, c_purge, uint32 purge, purge) 13254 GETFUNCFIELD(39, purge, c_purge) 13255 13256 GETFUNCFIELD(39, desc_intr, c_intr) 13257 GETFUNCFIELD(39, desc_remaining, c_desc) 13258 GETFUNCFIELD(39, desc_status, c_desc_status) 13259 13260 13261 GETFUNCFIELD(39, xfercount, count) 13262 GETFUNCFIELD(39, rx_end, end) 13263 GETFUNCFIELD(39, rx_start, start) 13264 GETFUNCFIELD(39, rx_error, error) 13265 GETFUNCFIELD(39, read_ecc_error, ecc_error) 13266 SETFUNCFIELD(39, done, done, int val, val ? 1 : 0) 13267 GETFUNCFIELD(39, done, done) 13268 13269 13270 #ifdef BROADCOM_DEBUG 13271 GETFUNCERR(39, tx_l2pbm) 13272 GETFUNCERR(39, tx_utpbm) 13273 GETFUNCERR(39, tx_l3pbm) 13274 GETFUNCERR(39, tx_crc) 13275 GETFUNCERR(39, tx_cos) 13276 GETFUNCERR(39, tx_destmod) 13277 GETFUNCERR(39, tx_destport) 13278 GETFUNCERR(39, tx_opcode) 13279 GETFUNCERR(39, tx_srcmod) 13280 GETFUNCERR(39, tx_srcport) 13281 GETFUNCERR(39, tx_prio) 13282 GETFUNCERR(39, tx_pfm) 13283 #endif /* BROADCOM_DEBUG */ 13284 13285 13286 #ifdef PLISIM /* these routines are only used by pcid */ 13287 static void dcb39_status_init(dcb_t *dcb) 13288 { 13289 return; 13290 } 13291 SETFUNCERR(39, xfercount, uint32) 13292 SETFUNCERR(39, rx_start, int) 13293 SETFUNCERR(39, rx_end, int) 13294 SETFUNCERR(39, rx_error, int) 13295 SETFUNCERR(39, rx_crc,int) 13296 SETFUNCERR(39, rx_ingport, int) 13297 #endif 13298 13299 static void 13300 dcb39_init(dcb_t *dcb) 13301 { 13302 uint32 *d = (uint32 *)dcb; 13303 13304 d[0] = d[1] = d[2] = d[3] = 0; 13305 } 13306 13307 static int 13308 dcb39_add_rx(dv_t *dv, sal_vaddr_t addr, uint32 count, uint32 flags) 13309 { 13310 dcb39_t *d; /* DCB */ 13311 uint32 *di; /* DCB integer pointer */ 13312 sal_paddr_t paddr; 13313 13314 d = (dcb39_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); 13315 13316 if (dv->dv_vcnt > 0) { /* chain off previous dcb */ 13317 d[-1].c_chain = 1; 13318 } 13319 13320 di = (uint32 *)d; 13321 di[0] = di[1] = di[2] = di[3] = 0; 13322 13323 if (addr) { 13324 paddr = soc_cm_l2p(dv->dv_unit, (void *)addr); 13325 d->addr_lo = PTR_TO_INT(paddr); 13326 d->addr_hi = PTR_HI_TO_INT(paddr); 13327 if (soc_cm_get_bus_type(dv->dv_unit) & SOC_PCI_DEV_TYPE) { 13328 d->addr_hi |= 0x10000000; 13329 } 13330 } 13331 13332 d->c_count = count; 13333 d->c_sg = 1; 13334 13335 dv->dv_vcnt += 1; 13336 return dv->dv_cnt - dv->dv_vcnt; 13337 } 13338 13339 static int 13340 dcb39_add_tx(dv_t *dv, sal_vaddr_t addr, uint32 count, 13341 pbmp_t l2pbm, pbmp_t utpbm, pbmp_t l3pbm, uint32 flags, uint32 *hgh) 13342 { 13343 dcb39_t *d; /* DCB */ 13344 uint32 *di; /* DCB integer pointer */ 13345 sal_paddr_t paddr = 0; /* Packet buffer physical address */ 13346 13347 d = (dcb39_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); 13348 13349 if (addr) 13350 paddr = soc_cm_l2p(dv->dv_unit, (void *)addr); 13351 13352 if (dv->dv_vcnt > 0 && (dv->dv_flags & DV_F_COMBINE_DCB) && 13353 (d[-1].c_sg != 0) && 13354 ((d[-1].addr_lo + d[-1].c_count) == paddr) && 13355 (d[-1].c_count + count <= DCB_MAX_REQCOUNT)) { 13356 d[-1].c_count += count; 13357 return dv->dv_cnt - dv->dv_vcnt; 13358 } 13359 13360 if (dv->dv_vcnt >= dv->dv_cnt) { 13361 return SOC_E_FULL; 13362 } 13363 if (dv->dv_vcnt > 0) { /* chain off previous dcb */ 13364 d[-1].c_chain = 1; 13365 } 13366 13367 di = (uint32 *)d; 13368 di[0] = di[1] = di[2] = di[3] = 0; 13369 13370 d->addr_lo = PTR_TO_INT(paddr); 13371 d->addr_hi = PTR_HI_TO_INT(paddr); 13372 if (soc_cm_get_bus_type(dv->dv_unit) & SOC_PCI_DEV_TYPE) { 13373 d->addr_hi |= 0x10000000; 13374 } 13375 d->c_count = count; 13376 d->c_sg = 1; 13377 13378 d->c_purge = SOC_DMA_PURGE_GET(flags); 13379 13380 if (SOC_DMA_HG_GET(flags)) { 13381 d->c_hg = 1; 13382 } 13383 13384 dv->dv_vcnt += 1; 13385 13386 return dv->dv_cnt - dv->dv_vcnt; 13387 } 13388 13389 static uint32 13390 dcb39_intr_info(int unit, dcb_t *dcb, int tx, uint32 *count) 13391 { 13392 dcb39_t *d = (dcb39_t *)dcb; /* DCB */ 13393 uint32 f; /* SOC_DCB_INFO_* flags */ 13394 13395 if (!d->done) { 13396 return 0; 13397 } 13398 13399 f = SOC_DCB_INFO_DONE; 13400 if (tx) { 13401 if (!d->c_sg) { 13402 f |= SOC_DCB_INFO_PKTEND; 13403 } 13404 } else { 13405 if (d->end) { 13406 f |= SOC_DCB_INFO_PKTEND; 13407 } 13408 } 13409 13410 *count = d->count; 13411 return f; 13412 } 13413 13414 /* the addr related functions are the same for all dcb types */ 13415 static void 13416 dcb39_addr_set(int unit, dcb_t *dcb, sal_vaddr_t addr) 13417 { 13418 dcb39_t *d = (dcb39_t *)dcb; /* DCB */ 13419 sal_paddr_t paddr; 13420 13421 if (addr == 0) { 13422 d->addr_lo = 0; 13423 d->addr_hi = 0; 13424 } else { 13425 paddr = soc_cm_l2p(unit, (void *)addr); 13426 d->addr_lo = PTR_TO_INT(paddr); 13427 d->addr_hi = PTR_HI_TO_INT(paddr); 13428 if (soc_cm_get_bus_type(unit) & SOC_PCI_DEV_TYPE) { 13429 d->addr_hi |= 0x10000000; 13430 } 13431 } 13432 } 13433 13434 static sal_vaddr_t 13435 dcb39_addr_get(int unit, dcb_t *dcb) 13436 { 13437 dcb39_t *d = (dcb39_t *)dcb; /* DCB */ 13438 sal_paddr_t paddr; 13439 13440 #if defined(COMPILER_OVERRIDE_NO_LONGLONG) || defined(__PEDANTIC__) 13441 paddr = d->addr_lo; 13442 #else 13443 if (soc_cm_get_bus_type(unit) & SOC_PCI_DEV_TYPE) { 13444 paddr = (((uint64)(d->addr_hi & ~(0x10000000)) << 32) | d->addr_lo); 13445 } else { 13446 paddr = (((uint64)(d->addr_hi) << 32) | d->addr_lo); 13447 } 13448 #endif 13449 13450 return (sal_vaddr_t)soc_cm_p2l(unit, paddr); 13451 } 13452 13453 static sal_paddr_t 13454 dcb39_paddr_get(dcb_t *dcb) 13455 { 13456 uint32 *d = (uint32 *)dcb; 13457 13458 return (sal_paddr_t)*d; 13459 } 13460 13461 static void 13462 dcb39_desc_intr_set(dcb_t * dcb, int val) 13463 { 13464 dcb39_t * d = (dcb39_t *)dcb; 13465 13466 d->c_intr = val; 13467 return; 13468 } 13469 13470 static uint32 13471 dcb39_desc_status_set(dcb_t * dcb, uint32 val) 13472 { 13473 dcb39_t * d = (dcb39_t *)dcb; 13474 13475 d->c_desc_status = val; 13476 return 0; 13477 } 13478 13479 static uint32 13480 dcb39_desc_remaining_set(dcb_t * dcb, uint32 val) 13481 { 13482 dcb39_t * d = (dcb39_t *)dcb; 13483 13484 d->c_desc = val; 13485 return 0; 13486 } 13487 13488 #ifdef BROADCOM_DEBUG 13489 static void 13490 dcb39_dump(int unit, dcb_t *dcb, char *prefix, int tx) 13491 { 13492 uint32 *p; 13493 int i, size; 13494 char ps[((DCB_MAX_SIZE/sizeof(uint32))*9)+1]; 13495 13496 p = (uint32 *)dcb; 13497 size = SOC_DCB_SIZE(unit) / sizeof(uint32); 13498 for (i = 0; i < size; i++) { 13499 sal_snprintf(&ps[i*9], 9*sizeof(char), "%08x ", p[i]); 13500 } 13501 13502 LOG_CLI((BSL_META_U(unit, 13503 "%s\t%s\n"), prefix, ps)); 13504 13505 LOG_CLI((BSL_META_U(unit, 13506 "%s\ttype %d %schain %ssg %sreload %shg %spurge \n"), 13507 prefix, 13508 SOC_DCB_TYPE(unit), 13509 SOC_DCB_CHAIN_GET(unit, dcb) ? "" : "!", 13510 SOC_DCB_SG_GET(unit, dcb) ? "" : "!", 13511 SOC_DCB_RELOAD_GET(unit, dcb) ? "" : "!", 13512 SOC_DCB_HG_GET(unit, dcb) ? "" : "!", 13513 SOC_DCB_PURGE_GET(unit, dcb) ? "" : "!")); 13514 13515 LOG_CLI((BSL_META_U(unit, 13516 "%s\taddr %p reqcount %d xfercount %d\n"), 13517 prefix, 13518 (void *)SOC_DCB_ADDR_GET(unit, dcb), 13519 SOC_DCB_REQCOUNT_GET(unit, dcb), 13520 SOC_DCB_XFERCOUNT_GET(unit, dcb))); 13521 13522 if (!tx) { 13523 LOG_CLI((BSL_META_U(unit, 13524 "%s\t%sdone %serror %sstart %send\n"), 13525 prefix, 13526 SOC_DCB_DONE_GET(unit, dcb) ? "" : "!", 13527 SOC_DCB_RX_ERROR_GET(unit, dcb) ? "" : "!", 13528 SOC_DCB_RX_START_GET(unit, dcb) ? "" : "!", 13529 SOC_DCB_RX_END_GET(unit, dcb) ? "" : "!")); 13530 } 13531 13532 if (tx || !SOC_DCB_RX_START_GET(unit, dcb)) { 13533 return; 13534 } 13535 } 13536 #endif 13537 13538 13539 SETFUNCERR(39, tx_l2pbm, pbmp_t) 13540 SETFUNCERR(39, tx_utpbm, pbmp_t) 13541 SETFUNCERR(39, tx_l3pbm, pbmp_t) 13542 SETFUNCERR(39, tx_crc, int) 13543 SETFUNCERR(39, tx_cos, int) 13544 SETFUNCERR(39, tx_destmod, uint32) 13545 SETFUNCERR(39, tx_destport, uint32) 13546 SETFUNCERR(39, tx_opcode, uint32) 13547 SETFUNCERR(39, tx_srcmod, uint32) 13548 SETFUNCERR(39, tx_srcport, uint32) 13549 SETFUNCERR(39, tx_prio, uint32) 13550 SETFUNCERR(39, tx_pfm, uint32) 13551 13552 static uint32 13553 dcb39_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg) 13554 { 13555 dcb0_funcerr(39, "rx_untagged_get"); 13556 return 0; 13557 } 13558 GETFUNCERR(39, rx_crc) 13559 GETFUNCERR(39, rx_cos) 13560 GETFUNCERR(39, rx_destmod) 13561 GETFUNCERR(39, rx_destport) 13562 GETFUNCERR(39, rx_opcode) 13563 GETFUNCERR(39, rx_classtag) 13564 GETFUNCERR(39, rx_matchrule) 13565 13566 GETFUNCERR(39, rx_pri) 13567 GETFUNCERR(39, rx_reason) 13568 GETFUNCERR(39, rx_reason_hi) 13569 GETFUNCERR(39, rx_ingport) 13570 GETFUNCERR(39, rx_srcport) 13571 GETFUNCERR(39, rx_srcmod) 13572 GETFUNCERR(39, rx_mcast) 13573 GETFUNCERR(39, rx_vclabel) 13574 GETFUNCERR(39, rx_mirror) 13575 GETFUNCERR(39, rx_timestamp) 13576 GETFUNCERR(39, rx_timestamp_upper) 13577 13578 static uint32* 13579 dcb39_mhp_get(dcb_t *dcb) 13580 { 13581 dcb0_funcerr(39, "mhp_get"); 13582 return NULL; 13583 } 13584 GETFUNCERR(39, outer_vid) 13585 GETFUNCERR(39, outer_pri) 13586 GETFUNCERR(39, outer_cfi) 13587 GETFUNCERR(39, rx_outer_tag_action) 13588 GETFUNCERR(39, inner_vid) 13589 GETFUNCERR(39, inner_pri) 13590 GETFUNCERR(39, inner_cfi) 13591 GETFUNCERR(39, rx_inner_tag_action) 13592 GETFUNCERR(39, rx_bpdu) 13593 GETFUNCERR(39, rx_l3_intf) 13594 GETFUNCERR(39, rx_decap_tunnel) 13595 GETFUNCERR(39, rx_switch_drop) 13596 GETFUNCERR(39, olp_encap_oam_pkt) 13597 13598 GETFUNCERR(39, match_id_lo) 13599 GETFUNCERR(39, match_id_hi) 13600 GETFUNCERR(39, forwarding_type) 13601 GETFUNCERR(39, forwarding_zone_id) 13602 13603 static soc_rx_reason_t *dcb39_rx_reason_maps[] = { 13604 NULL 13605 }; 13606 13607 dcb_op_t dcb39_op = { 13608 39, 13609 sizeof(dcb39_t), 13610 dcb39_rx_reason_maps, 13611 dcb0_rx_reason_map_get, 13612 dcb0_rx_reasons_get, 13613 dcb39_init, 13614 dcb39_add_tx, 13615 dcb39_add_rx, 13616 dcb39_intr_info, 13617 dcb39_reqcount_set, 13618 dcb39_reqcount_get, 13619 dcb39_xfercount_get, 13620 dcb39_addr_set, 13621 dcb39_addr_get, 13622 dcb39_paddr_get, 13623 dcb39_done_set, 13624 dcb39_done_get, 13625 dcb39_sg_set, 13626 dcb39_sg_get, 13627 dcb39_chain_set, 13628 dcb39_chain_get, 13629 dcb39_reload_set, 13630 dcb39_reload_get, 13631 dcb39_desc_intr_set, 13632 dcb39_desc_intr_get, 13633 dcb39_tx_l2pbm_set, 13634 dcb39_tx_utpbm_set, 13635 dcb39_tx_l3pbm_set, 13636 dcb39_tx_crc_set, 13637 dcb39_tx_cos_set, 13638 dcb39_tx_destmod_set, 13639 dcb39_tx_destport_set, 13640 dcb39_tx_opcode_set, 13641 dcb39_tx_srcmod_set, 13642 dcb39_tx_srcport_set, 13643 dcb39_tx_prio_set, 13644 dcb39_tx_pfm_set, 13645 dcb39_rx_untagged_get, 13646 dcb39_rx_crc_get, 13647 dcb39_rx_cos_get, 13648 dcb39_rx_destmod_get, 13649 dcb39_rx_destport_get, 13650 dcb39_rx_opcode_get, 13651 dcb39_rx_classtag_get, 13652 dcb39_rx_matchrule_get, 13653 dcb39_rx_start_get, 13654 dcb39_rx_end_get, 13655 dcb39_rx_error_get, 13656 dcb39_rx_pri_get, 13657 dcb39_rx_reason_get, 13658 dcb39_rx_reason_hi_get, 13659 dcb39_rx_ingport_get, 13660 dcb39_rx_srcport_get, 13661 dcb39_rx_srcmod_get, 13662 dcb39_rx_mcast_get, 13663 dcb39_rx_vclabel_get, 13664 dcb39_rx_mirror_get, 13665 dcb39_rx_timestamp_get, 13666 dcb39_rx_timestamp_upper_get, 13667 dcb39_hg_set, 13668 dcb39_hg_get, 13669 NULL, 13670 NULL, 13671 dcb39_purge_set, 13672 dcb39_purge_get, 13673 dcb39_mhp_get, 13674 dcb39_outer_vid_get, 13675 dcb39_outer_pri_get, 13676 dcb39_outer_cfi_get, 13677 dcb39_rx_outer_tag_action_get, 13678 dcb39_inner_vid_get, 13679 dcb39_inner_pri_get, 13680 dcb39_inner_cfi_get, 13681 dcb39_rx_inner_tag_action_get, 13682 dcb39_rx_bpdu_get, 13683 dcb39_rx_l3_intf_get, 13684 dcb39_rx_decap_tunnel_get, 13685 dcb39_rx_switch_drop_get, 13686 dcb39_olp_encap_oam_pkt_get, 13687 dcb39_read_ecc_error_get, 13688 dcb39_desc_remaining_get, 13689 dcb39_desc_remaining_set, 13690 dcb39_desc_status_get, 13691 dcb39_desc_status_set, 13692 dcb39_match_id_lo_get, 13693 dcb39_match_id_hi_get, 13694 dcb39_forwarding_type_get, 13695 dcb39_forwarding_zone_id_get, 13696 #ifdef BROADCOM_DEBUG 13697 dcb39_tx_l2pbm_get, 13698 dcb39_tx_utpbm_get, 13699 dcb39_tx_l3pbm_get, 13700 dcb39_tx_crc_get, 13701 dcb39_tx_cos_get, 13702 dcb39_tx_destmod_get, 13703 dcb39_tx_destport_get, 13704 dcb39_tx_opcode_get, 13705 dcb39_tx_srcmod_get, 13706 dcb39_tx_srcport_get, 13707 dcb39_tx_prio_get, 13708 dcb39_tx_pfm_get, 13709 dcb39_dump, 13710 dcb0_reason_dump, 13711 #endif 13712 #ifdef PLISIM 13713 dcb39_status_init, 13714 dcb39_xfercount_set, 13715 dcb39_rx_start_set, 13716 dcb39_rx_end_set, 13717 dcb39_rx_error_set, 13718 dcb39_rx_crc_set, 13719 dcb39_rx_ingport_set, 13720 #endif /* PLISIM */ 13721 }; 13722 #endif /* BCM_DNX_SUPPORT */ 13723 13724 /* 13725 * Function: 13726 * soc_dcb_unit_init 13727 * Purpose: 13728 * Select the appropriate dcb operations set and load it into 13729 * SOC_CONTROL 13730 * Parameters: 13731 * unit - device 13732 */ 13733 void 13734 soc_dcb_unit_init(int unit) 13735 { 13736 soc_control_t *soc; 13737 13738 COMPILER_REFERENCE(dcb0_funcerr); 13739 soc = SOC_CONTROL(unit); 13740 13741 #ifdef BCM_HERCULES_SUPPORT 13742 if (soc_feature(unit, soc_feature_dcb_type4)) { 13743 soc->dcb_op = &dcb4_op; 13744 return; 13745 } 13746 #endif /* BCM_HERCULES_SUPPORT */ 13747 13748 #ifdef BCM_XGS3_SWITCH_SUPPORT 13749 #ifdef BCM_FIREBOLT_SUPPORT 13750 if (soc_feature(unit, soc_feature_dcb_type9)) { 13751 soc->dcb_op = &dcb9_op; 13752 return; 13753 } 13754 #endif 13755 #ifdef BCM_BRADLEY_SUPPORT 13756 if (soc_feature(unit, soc_feature_dcb_type11)) { 13757 soc->dcb_op = &dcb11_op; 13758 return; 13759 } 13760 #endif 13761 #if defined(BCM_RAPTOR_SUPPORT) 13762 if (soc_feature(unit, soc_feature_dcb_type12)) { 13763 soc->dcb_op = &dcb12_op; 13764 return; 13765 } 13766 #endif 13767 #if defined(BCM_FIREBOLT2_SUPPORT) || defined(BCM_FIREBOLT_SUPPORT) 13768 if (soc_feature(unit, soc_feature_dcb_type13)) { 13769 soc->dcb_op = &dcb13_op; 13770 return; 13771 } 13772 #endif 13773 #if defined(BCM_TRIUMPH_SUPPORT) 13774 if (soc_feature(unit, soc_feature_dcb_type14)) { 13775 soc->dcb_op = &dcb14_op; 13776 return; 13777 } 13778 #endif 13779 #if defined(BCM_RAPTOR_SUPPORT) 13780 if (soc_feature(unit, soc_feature_dcb_type15)) { 13781 soc->dcb_op = &dcb15_op; 13782 return; 13783 } 13784 #endif 13785 #if defined(BCM_SCORPION_SUPPORT) 13786 if (soc_feature(unit, soc_feature_dcb_type16)) { 13787 soc->dcb_op = &dcb16_op; 13788 return; 13789 } 13790 #endif 13791 #if defined(BCM_HAWKEYE_SUPPORT) 13792 if (soc_feature(unit, soc_feature_dcb_type17)) { 13793 soc->dcb_op = &dcb17_op; 13794 return; 13795 } 13796 #endif 13797 #if defined(BCM_RAPTOR_SUPPORT) 13798 if (soc_feature(unit, soc_feature_dcb_type18)) { 13799 soc->dcb_op = &dcb18_op; 13800 return; 13801 } 13802 #endif 13803 #if defined(BCM_TRIUMPH2_SUPPORT) 13804 if (soc_feature(unit, soc_feature_dcb_type19)) { 13805 soc->dcb_op = &dcb19_op; 13806 return; 13807 } 13808 #endif 13809 #ifdef BCM_ENDURO_SUPPORT 13810 if (soc_feature(unit, soc_feature_dcb_type20)) { 13811 soc->dcb_op = &dcb20_op; 13812 return; 13813 } 13814 #endif 13815 #if defined(BCM_TRIDENT_SUPPORT) 13816 if (soc_feature(unit, soc_feature_dcb_type21)) { 13817 soc->dcb_op = &dcb21_op; 13818 return; 13819 } 13820 #endif 13821 #ifdef BCM_SHADOW_SUPPORT 13822 if (soc_feature(unit, soc_feature_dcb_type22)) { 13823 soc->dcb_op = &dcb22_op; 13824 return; 13825 } 13826 #endif 13827 #if defined(BCM_TRIUMPH3_SUPPORT) 13828 if (soc_feature(unit, soc_feature_dcb_type23)) { 13829 soc->dcb_op = &dcb23_op; 13830 return; 13831 } 13832 #endif 13833 #if defined(BCM_KATANA_SUPPORT) 13834 if (soc_feature(unit, soc_feature_dcb_type24)) { 13835 soc->dcb_op = &dcb24_op; 13836 return; 13837 } 13838 #endif 13839 #if defined(BCM_TRIDENT2_SUPPORT) 13840 if (soc_feature(unit, soc_feature_dcb_type26)) { 13841 soc->dcb_op = &dcb26_op; 13842 return; 13843 } 13844 #endif 13845 13846 #if defined(BCM_TOMAHAWK_SUPPORT) 13847 if (soc_feature(unit, soc_feature_dcb_type32)) { 13848 soc->dcb_op = &dcb32_op; 13849 return; 13850 } 13851 #endif 13852 #if defined(BCM_TRIDENT2PLUS_SUPPORT) 13853 if (soc_feature(unit, soc_feature_dcb_type33)) { 13854 soc->dcb_op = &dcb33_op; 13855 return; 13856 } 13857 #endif 13858 #if defined(BCM_APACHE_SUPPORT) 13859 if (soc_feature(unit, soc_feature_dcb_type35)) { 13860 soc->dcb_op = &dcb35_op; 13861 return; 13862 } 13863 #endif /* BCM_APACHE_SUPPORT */ 13864 #if defined(BCM_TRIDENT3_SUPPORT) 13865 if (soc_feature(unit, soc_feature_dcb_type36)) { 13866 #if defined(BCM_HELIX5_SUPPORT) 13867 if (soc_feature(unit, soc_feature_hx5_oam_support)) { 13868 /* For Helix5, OAM_SLOWPATH got added as reason code at offset 52 13869 * of CPU_OPCODES format in regsfile. It is RESERVED_52_52 13870 * for Trident3*/ 13871 dcb36_op.rx_reason_maps[0][52] = socRxReasonOAMSlowpath; 13872 } 13873 #endif 13874 soc->dcb_op = &dcb36_op; 13875 return; 13876 } 13877 #endif 13878 #if defined(BCM_TOMAHAWK3_SUPPORT) 13879 if (soc_feature(unit, soc_feature_dcb_type38) && 13880 soc_feature(unit, soc_feature_cmicx)) { 13881 soc->dcb_op = &dcb38_op; 13882 return; 13883 } 13884 #endif 13885 #endif /* BCM_XGS3_SWITCH_SUPPORT */ 13886 13887 #ifdef BCM_PETRA_SUPPORT 13888 if (soc_feature(unit, soc_feature_dcb_type28)) { 13889 soc->dcb_op = &dcb28_op; 13890 return; 13891 } 13892 #endif 13893 13894 #ifdef BCM_DNX_SUPPORT 13895 if (soc_feature(unit, soc_feature_dcb_type39) && 13896 soc_feature(unit, soc_feature_cmicx)) 13897 { 13898 soc->dcb_op = &dcb39_op; 13899 return; 13900 } 13901 #endif 13902 13903 #if defined(BCM_KATANA2_SUPPORT) 13904 if (soc_feature(unit, soc_feature_dcb_type29)) { 13905 soc->dcb_op = &dcb29_op; 13906 return; 13907 } 13908 #endif /* BCM_KATANA2_SUPPORT */ 13909 13910 #if defined(BCM_HURRICANE2_SUPPORT) 13911 if (soc_feature(unit, soc_feature_dcb_type30)) { 13912 soc->dcb_op = &dcb30_op; 13913 return; 13914 } 13915 #endif /* BCM_HURRICANE2_SUPPORT */ 13916 13917 #if defined(BCM_GREYHOUND_SUPPORT) 13918 if (soc_feature(unit, soc_feature_dcb_type31)) { 13919 soc->dcb_op = &dcb31_op; 13920 return; 13921 } 13922 #endif /* BCM_GREYHOUND_SUPPORT */ 13923 13924 #if defined(BCM_HURRICANE3_SUPPORT) 13925 if (soc_feature(unit, soc_feature_dcb_type34)) { 13926 soc->dcb_op = &dcb34_op; 13927 return; 13928 } 13929 #endif /* BCM_HURRICANE3_SUPPORT */ 13930 13931 #if defined(BCM_GREYHOUND2_SUPPORT) 13932 if (soc_feature(unit, soc_feature_dcb_type37)) { 13933 soc->dcb_op = &dcb37_op; 13934 return; 13935 } 13936 #endif /* BCM_GREYHOUND2_SUPPORT */ 13937 13938 LOG_ERROR(BSL_LS_SOC_COMMON, 13939 (BSL_META_U(unit, 13940 "unit %d has unknown dcb type\n"), unit)); 13941 assert(0); 13942 } 13943 13944 #endif /* defined(BCM_ESW_SUPPORT) */ 13945