openbcm

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pfc_deadlock.c (2701B)

      1 /*
      2  * 
      3  * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file.
      4  * 
      5  * Copyright 2007-2019 Broadcom Inc. All rights reserved.
      6  *
      7  * PFC Deadlock Detection & Recovery
      8  */
      9 
     10 #include <shared/bsl.h>
     11 
     12 #include <soc/defs.h>
     13 #include <sal/core/libc.h>
     14 
     15 #include <soc/drv.h>
     16 #include <soc/mem.h>
     17 #include <soc/debug.h>
     18 #include <soc/tomahawk.h>
     19 
     20 #include <bcm/debug.h>
     21 #include <bcm/error.h>
     22 #include <bcm/cosq.h>
     23 #include <bcm_int/esw/mbcm.h>
     24 #include <bcm_int/esw/stack.h>
     25 #include <bcm_int/esw/cosq.h>
     26 #include <bcm_int/esw/pfc_deadlock.h>
     27 #include <bcm_int/esw/virtual.h>
     28 #include <bcm_int/esw/tomahawk.h>
     29 
     30 #if defined(BCM_TOMAHAWK_SUPPORT)
     31 /* Chip specific init and assign default values */
     32 int
     33 _bcm_th_pfc_deadlock_init(int unit)
     34 {
     35     _bcm_pfc_deadlock_control_t *pfc_deadlock_control = NULL;
     36     _bcm_pfc_hw_resorces_t *hw_res = NULL;
     37     int i;
     38     static soc_reg_t timer_count[2] = {
     39         Q_SCHED_DD_TIMER_Ar, Q_SCHED_DD_TIMER_Br
     40     };
     41     static soc_reg_t timer_en_regs[2] = {
     42         Q_SCHED_DD_TIMER_ENABLE_Ar, Q_SCHED_DD_TIMER_ENABLE_Br
     43     };
     44     static soc_reg_t timer_status_regs[2] = {
     45         Q_SCHED_DD_TIMER_STATUS_Ar, Q_SCHED_DD_TIMER_STATUS_Br
     46     };
     47     static soc_reg_t timer_mask_regs[2] = {
     48         Q_SCHED_DD_TIMER_STATUS_A_MASKr, Q_SCHED_DD_TIMER_STATUS_B_MASKr
     49     };
     50     static soc_reg_t config_regs[2] = {
     51         Q_SCHED_DD_CHIP_CONFIG1r, Q_SCHED_DD_CHIP_CONFIG2r
     52     };
     53     static soc_field_t deadlock_cos_field[2] = {
     54         DD_COS_Af, DD_COS_Bf
     55     };
     56     static soc_field_t deadlock_time_field[2] = {
     57         DD_TIMER_INIT_VALUE_COS_Af, DD_TIMER_INIT_VALUE_COS_Bf
     58     };
     59 
     60     pfc_deadlock_control = _BCM_UNIT_PFC_DEADLOCK_CONTROL(unit);
     61     hw_res = &pfc_deadlock_control->hw_regs_fields;
     62 
     63     pfc_deadlock_control->pfc_deadlock_cos_max = 2;
     64     pfc_deadlock_control->cosq_inv_mapping_get = _bcm_th_cosq_inv_mapping_get;
     65 
     66     for (i = 0; i < pfc_deadlock_control->pfc_deadlock_cos_max; i++) {
     67         hw_res->timer_count[i] = timer_count[i];
     68         hw_res->timer_status[i] = timer_status_regs[i];
     69         hw_res->timer_mask[i] = timer_mask_regs[i];
     70         hw_res->timer_en[i] = timer_en_regs[i];
     71         hw_res->time_init_val[i] = deadlock_time_field[i];
     72         hw_res->cos_field[i] = deadlock_cos_field[i];
     73     }
     74     hw_res->port_config = Q_SCHED_DD_PORT_CONFIGr;
     75     hw_res->chip_config[0] = config_regs[0];
     76     hw_res->chip_config[1] = config_regs[1];
     77     hw_res->time_unit_field = DD_TIMER_TICK_UNITf;
     78     hw_res->recovery_action_field = IGNORE_PFC_OFF_PKT_DISCARDf;
     79     hw_res->deadlock_status_field = DEADLOCK_DETECTEDf;
     80     return BCM_E_NONE;
     81 }
     82 #endif /* BCM_TOMAHAWK_SUPPORT */