stat.c (189272B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * Broadcom StrataSwitch SNMP Statistics API. 8 */ 9 10 #include <shared/bsl.h> 11 12 #include <soc/drv.h> 13 #include <soc/scache.h> 14 #include <soc/scache_dictionary.h> 15 #include <soc/counter.h> 16 #include <soc/ll.h> 17 18 #include <bcm/stat.h> 19 #include <bcm/error.h> 20 21 #include <bcm_int/esw/stat.h> 22 #include <bcm_int/esw/switch.h> 23 #include <bcm_int/esw/flex_ctr.h> 24 #include <bcm_int/esw/flowcnt.h> 25 #include <bcm_int/esw_dispatch.h> 26 #include <bcm_int/esw/triumph2.h> 27 #ifdef BCM_KATANA2_SUPPORT 28 #include <bcm_int/esw/katana2.h> 29 #include <soc/katana2.h> 30 #endif 31 32 #include <bcm_int/esw/portctrl.h> 33 34 static unsigned int counter_flags_default; 35 36 #define OBJ_TYPE_NUM_ENTRIES (sizeof(obj2type)/sizeof(obj2type[0])) 37 38 #if defined(BCM_BRADLEY_SUPPORT) || \ 39 defined(BCM_TRIUMPH_SUPPORT) || defined(BCM_SCORPION_SUPPORT) 40 #define _BCM_HB_GW_TRX_BIT_SET(unit, result, bit) \ 41 do { \ 42 if (SOC_IS_HB_GW(unit) || SOC_IS_TRX(unit)) { \ 43 *result = bit; \ 44 return BCM_E_NONE; \ 45 } \ 46 } while ((0)) 47 #else 48 #define _BCM_HB_GW_TRX_BIT_SET(unit, result, bit) 49 #endif /* BRADLEY || TRIUMPH || SCORPION */ 50 51 #if defined(BCM_RAPTOR_SUPPORT) 52 #define _BCM_RAPTOR_RAVEN_BIT_SET(unit, result, bit) \ 53 do { \ 54 if (SOC_IS_RAPTOR(unit) || SOC_IS_RAVEN(unit)) { \ 55 *result = (bit); \ 56 return BCM_E_NONE; \ 57 } \ 58 } while ((0)) 59 #else 60 #define _BCM_RAPTOR_RAVEN_BIT_SET(unit, result, bit) 61 #endif /* RAPTOR */ 62 63 #if defined(BCM_RAVEN_SUPPORT) 64 #define _BCM_RAVEN_BIT_SET(unit, result, bit) \ 65 do { \ 66 if (SOC_IS_RAVEN(unit)) { \ 67 *result = (bit); \ 68 return BCM_E_NONE; \ 69 } \ 70 } while ((0)) 71 #else 72 #define _BCM_RAVEN_BIT_SET(unit, result, bit) 73 #endif /* RAVEN */ 74 75 #if defined(BCM_BRADLEY_SUPPORT) 76 #define _BCM_HB_GW_BIT_SET_E_PARAM(unit, result) \ 77 do { \ 78 if (SOC_IS_HB_GW(unit)) { \ 79 return BCM_E_PARAM; \ 80 } \ 81 } while ((0)) 82 #else 83 #define _BCM_HB_GW_BIT_SET_E_PARAM(unit, result) 84 #endif 85 86 #if defined(BCM_TRIUMPH_SUPPORT) || defined(BCM_SCORPION_SUPPORT) 87 #define _BCM_TRX_BIT_SET(unit, result, bit) \ 88 do { \ 89 if (SOC_IS_TRX(unit)) { \ 90 *result = bit; \ 91 return BCM_E_NONE; \ 92 } \ 93 } while ((0)) 94 95 #define _BCM_TRX_BIT_SET_E_PARAM(unit, result) \ 96 do { \ 97 if (SOC_IS_TRX(unit)) { \ 98 return BCM_E_PARAM; \ 99 } \ 100 } while ((0)) 101 #else 102 #define _BCM_TRX_BIT_SET(unit, result, bit) 103 #define _BCM_TRX_BIT_SET_E_PARAM(unit, result) 104 #endif /* TRIUMPH || SCORPION */ 105 106 #if defined(BCM_FIREBOLT_SUPPORT) || defined(BCM_BRADLEY_SUPPORT) || \ 107 defined(BCM_TRIUMPH_SUPPORT) || defined(BCM_SCORPION_SUPPORT) 108 #define _BCM_FB_HB_GW_TRX_BIT_SET(unit, result, bit) \ 109 do { \ 110 if (SOC_IS_HB_GW(unit) || SOC_IS_TRX(unit) || SOC_IS_FB(unit)) { \ 111 *result = bit; \ 112 return BCM_E_NONE; \ 113 } \ 114 } while ((0)) 115 #else 116 #define _BCM_FB_HB_GW_TRX_BIT_SET(unit, result, bit) 117 #endif /* BRADLEY || TRIUMPH || SCORPION || FIREBOLT */ 118 119 #if defined(BCM_FIREBOLT_SUPPORT) 120 #define _BCM_FB_BIT_SET(unit, result, bit) \ 121 do { \ 122 if (SOC_IS_FB(unit)) { \ 123 *result = (bit); \ 124 return BCM_E_NONE; \ 125 } \ 126 } while ((0)) 127 #else 128 #define _BCM_FB_BIT_SET(unit, result, bit) 129 #endif /* FIREBOLT */ 130 131 #if defined(BCM_FIREBOLT2_SUPPORT) 132 #define _BCM_FB2_BIT_SET(unit, result, bit) \ 133 do { \ 134 if (SOC_IS_FIREBOLT2(unit)) { \ 135 *result = (bit); \ 136 return BCM_E_NONE; \ 137 } \ 138 } while ((0)) 139 #else 140 #define _BCM_FB2_BIT_SET(unit, result, bit) 141 #endif /* FIREBOLT2 */ 142 143 #define _BCM_FBX_BIT_SET(unit, result, bit) \ 144 do { \ 145 if (SOC_IS_FBX(unit)) { \ 146 *result = (bit); \ 147 return BCM_E_NONE; \ 148 } \ 149 } while ((0)) 150 151 #if defined(BCM_TRIDENT2_SUPPORT) 152 #define _BCM_TD2_BIT_SET(unit, result, bit) \ 153 do { \ 154 if (SOC_IS_TD2_TT2(unit)) { \ 155 *result = (bit); \ 156 return BCM_E_NONE; \ 157 } \ 158 } while ((0)) 159 #else 160 #define _BCM_TD2_BIT_SET(unit, result, bit) 161 #endif /* TRIDENT2 */ 162 163 #if defined(BCM_TRIDENT3_SUPPORT) 164 #define _BCM_TD3_BIT_SET(unit, result, bit) \ 165 do { \ 166 if (SOC_IS_TRIDENT3X(unit)) { \ 167 *result = (bit); \ 168 return BCM_E_NONE; \ 169 } \ 170 } while ((0)) 171 #define _BCM_TD3_BIT_SET_E_PARAM(unit, result) \ 172 do { \ 173 if (SOC_IS_TRIDENT3X(unit)) { \ 174 return BCM_E_PARAM; \ 175 } \ 176 } while ((0)) 177 178 #else 179 #define _BCM_TD3_BIT_SET(unit, result, bit) 180 #define _BCM_TD3_BIT_SET_E_PARAM(unit, result) 181 #endif /* TRIDENT3 */ 182 183 #if defined(BCM_TOMAHAWK3_SUPPORT) 184 #define _BCM_TH3_BIT_SET(unit, result, bit) \ 185 do { \ 186 if (SOC_IS_TOMAHAWK3(unit)) { \ 187 *result = (bit); \ 188 return BCM_E_NONE; \ 189 } \ 190 } while ((0)) 191 #define _BCM_TH3_BIT_SET_E_PARAM(unit, result) \ 192 do { \ 193 if (SOC_IS_TOMAHAWK3(unit)) { \ 194 return BCM_E_PARAM; \ 195 } \ 196 } while ((0)) 197 198 #else 199 #define _BCM_TH3_BIT_SET(unit, result, bit) 200 #define _BCM_TH3_BIT_SET_E_PARAM(unit, result) 201 #endif /* TOMAHAWK3 */ 202 203 #if defined(BCM_GREYHOUND_SUPPORT) 204 #define _BCM_GH_BIT_SET(unit, result, bit) \ 205 do { \ 206 if (SOC_IS_GREYHOUND(unit) || SOC_IS_HURRICANE3(unit) || \ 207 SOC_IS_GREYHOUND2(unit)) { \ 208 *result = (bit); \ 209 return BCM_E_NONE; \ 210 } \ 211 } while ((0)) 212 #else 213 #define _BCM_GH_BIT_SET(unit, result, bit) 214 #endif /* GREYHOUND */ 215 216 #if defined(BCM_HURRICANE3_SUPPORT) 217 #define _BCM_HR3_BIT_SET(unit, result, bit) \ 218 do { \ 219 if (SOC_IS_HURRICANE3(unit) || SOC_IS_GREYHOUND2(unit)) { \ 220 *result = (bit); \ 221 return BCM_E_NONE; \ 222 } \ 223 } while ((0)) 224 #else 225 #define _BCM_HR3_BIT_SET(unit, result, bit) 226 #endif /* HURRICANE3 */ 227 228 #define _BCM_DEFAULT_BIT_SET(unit, result, bit) \ 229 do { \ 230 *result = (bit); \ 231 return BCM_E_NONE; \ 232 } while ((0)) 233 234 #define _BCM_DEFAULT_BIT_SET_E_PARAM(unit, result) \ 235 do { \ 236 return BCM_E_PARAM; \ 237 } while ((0)) 238 239 #define _DBG_CNT_TX_CHAN 1 240 #define _DBG_CNT_RX_CHAN 2 241 242 #ifdef BCM_XGS3_SWITCH_SUPPORT 243 /* 244 * All drop conditions 245 */ 246 #define BCM_DBG_CNT_DROP (BCM_DBG_CNT_RPORTD | \ 247 BCM_DBG_CNT_RIPD4 | \ 248 BCM_DBG_CNT_RIPD6 | \ 249 BCM_DBG_CNT_PDISC | \ 250 BCM_DBG_CNT_RFILDR | \ 251 BCM_DBG_CNT_RDISC | \ 252 BCM_DBG_CNT_RDROP | \ 253 BCM_DBG_CNT_VLANDR) 254 #endif /* BCM_XGS3_SWITCH_SUPPORT */ 255 256 /* Oversize packet size threshold (soc_property bcm_stat_jumbo[.unit]=n) */ 257 int **_bcm_stat_ovr_threshold; 258 259 /* Port control to include/exclude oversize packet errors */ 260 SHR_BITDCL *_bcm_stat_ovr_control; 261 262 STATIC _bcm_stat_extra_counter_t **_bcm_stat_extra_counters; 263 264 #define _BCM_STAT_OVR_CONTROL_GET(_u_, _port_) \ 265 SHR_BITGET(&_bcm_stat_ovr_control[(_u_)], (_port_)) 266 #define _BCM_STAT_OVR_CONTROL_SET(_u_, _port_) \ 267 SHR_BITSET(&_bcm_stat_ovr_control[(_u_)], (_port_)) 268 #define _BCM_STAT_OVR_CONTROL_CLR(_u_, _port_) \ 269 SHR_BITCLR(&_bcm_stat_ovr_control[(_u_)], (_port_)) 270 271 #if defined(BCM_TRIDENT3_SUPPORT) || defined(BCM_TOMAHAWK3_SUPPORT) 272 STATIC int 273 _bcm_esw_stat_custom_rsv_add(int unit, bcm_port_t port, bcm_stat_val_t type, 274 bcm_custom_stat_trigger_t trigger); 275 #endif /* BCM_TRIDENT3_SUPPORT || BCM_TOMAHAWK3_SUPPORT */ 276 277 void 278 _bcm_stat_counter_extra_callback(int unit) 279 { 280 soc_reg_t reg; 281 uint32 val, diff; 282 int rv, i, width; 283 _bcm_stat_extra_counter_t *ctr; 284 soc_port_t port, port_start, port_end; 285 int index; 286 287 if (NULL == _bcm_stat_extra_counters) { 288 return; 289 } 290 291 for (i = 0; i < _BCM_STAT_EXTRA_COUNTER_COUNT; i++) { 292 ctr = &_bcm_stat_extra_counters[unit][i]; 293 reg = ctr->reg; 294 if (reg == INVALIDr) { 295 continue; 296 } 297 if (SOC_REG_INFO(unit, reg).regtype == soc_portreg) { 298 port_start = 0; 299 port_end = MAX_PORT(unit) - 1; 300 } else { 301 port_start = port_end = REG_PORT_ANY; 302 } 303 for (port = port_start; port <= port_end; port++) { 304 if (port == REG_PORT_ANY) { 305 index = 0; 306 } else { 307 if (!SOC_PORT_VALID(unit, port)) { 308 continue; 309 } 310 index = port; 311 } 312 if (SOC_REG_IS_64(unit, reg)) { 313 continue; /* no such case yet */ 314 } else { 315 rv = soc_reg32_get(unit, reg, port, 0, &val); 316 if (SOC_FAILURE(rv)) { 317 continue; 318 } 319 diff = val - ctr->ctr_prev[index]; 320 /* assume first field is the counter field itself */ 321 width = SOC_REG_INFO(unit, reg).fields[0].len; 322 if (width < 32) { 323 diff &= (1 << width) - 1; 324 } 325 if (!diff) { 326 continue; 327 } 328 COMPILER_64_ADD_32(ctr->count64[index], diff); 329 ctr->ctr_prev[index] = val; 330 } 331 } 332 } 333 } 334 335 int 336 _bcm_stat_counter_extra_get(int unit, soc_reg_t reg, soc_port_t port, 337 uint64 *val) 338 { 339 int i; 340 341 if (NULL == _bcm_stat_extra_counters) { 342 return BCM_E_INIT; 343 } 344 345 for (i = 0; i < _BCM_STAT_EXTRA_COUNTER_COUNT; i++) { 346 if(_bcm_stat_extra_counters[unit][i].reg == reg) { 347 if (port == REG_PORT_ANY) { 348 *val = _bcm_stat_extra_counters[unit][i].count64[0]; 349 } else { 350 *val = _bcm_stat_extra_counters[unit][i].count64[port]; 351 } 352 return BCM_E_NONE; 353 } 354 } 355 356 COMPILER_64_ZERO(*val); 357 return BCM_E_NONE; 358 } 359 360 int 361 _bcm_stat_counter_non_dma_extra_get(int unit, 362 soc_counter_non_dma_id_t non_dma_id, 363 soc_port_t port, 364 uint64 *val) 365 { 366 COMPILER_64_ZERO(*val); 367 368 #ifdef BCM_TRIUMPH_SUPPORT 369 if (SOC_IS_TR_VL(unit) && !SOC_IS_HURRICANE(unit)&& 370 !SOC_IS_HURRICANE2(unit) && !SOC_IS_ENDURO(unit)) { 371 uint64 val64; 372 int ix, rv; 373 int max = 1; 374 375 switch (non_dma_id) { 376 case SOC_COUNTER_NON_DMA_COSQ_DROP_PKT: 377 max = 48; 378 break; 379 case SOC_COUNTER_NON_DMA_PORT_DROP_PKT_ING: 380 max = 1; 381 break; 382 default: 383 /* Shouldn't hit this because it's internal */ 384 return BCM_E_PARAM; 385 } 386 387 for (ix = 0; ix < max; ix++) { 388 rv = soc_counter_get(unit, port, non_dma_id, ix, &val64); 389 if (SOC_SUCCESS(rv)) { 390 COMPILER_64_ADD_64(*val, val64); 391 } else { 392 /* Ran past the maximum index for this port. */ 393 break; 394 } 395 } 396 } 397 #endif /* BCM_TRIUMPH_SUPPORT */ 398 399 return BCM_E_NONE; 400 } 401 402 /* 403 404 * Function: 405 * _bcm_esw_stat_detach 406 * Description: 407 * De-initializes the BCM stat module. 408 * Parameters: 409 * unit - (IN) BCM device number. 410 * Returns: 411 * BCM_E_XXX 412 */ 413 414 int 415 _bcm_esw_stat_detach(int unit) 416 { 417 _bcm_stat_extra_counter_t *ctr; 418 int i, free_units; 419 420 if (NULL != _bcm_stat_extra_counters) { 421 if (NULL != _bcm_stat_extra_counters[unit]) { 422 soc_counter_extra_unregister(unit, 423 _bcm_stat_counter_extra_callback); 424 425 for (i = 0; i < _BCM_STAT_EXTRA_COUNTER_COUNT; i++) { 426 ctr = &_bcm_stat_extra_counters[unit][i]; 427 if (ctr->count64 != NULL) { 428 sal_free(ctr->count64); 429 ctr->count64 = NULL; 430 } 431 if (ctr->ctr_prev != NULL) { 432 sal_free(ctr->ctr_prev); 433 ctr->ctr_prev = NULL; 434 } 435 } 436 sal_free(_bcm_stat_extra_counters[unit]); 437 _bcm_stat_extra_counters[unit] = NULL; 438 } 439 440 free_units = TRUE; 441 for (i = 0; i < BCM_MAX_NUM_UNITS; i++) { 442 if (((i != unit) && SOC_UNIT_VALID(i)) || 443 (NULL != _bcm_stat_extra_counters[i])) { 444 free_units = FALSE; 445 break; 446 } 447 } 448 if (free_units) { 449 sal_free(_bcm_stat_extra_counters); 450 _bcm_stat_extra_counters = NULL; 451 } 452 } 453 454 if (NULL != _bcm_stat_ovr_threshold) { 455 if (NULL != _bcm_stat_ovr_threshold[unit]) { 456 sal_free(_bcm_stat_ovr_threshold[unit]); 457 _bcm_stat_ovr_threshold[unit] = NULL; 458 } 459 460 free_units = TRUE; 461 for (i = 0; i < BCM_MAX_NUM_UNITS; i++) { 462 if( ((i != unit) && SOC_UNIT_VALID(i)) || 463 (NULL != _bcm_stat_ovr_threshold[i])) { 464 free_units = FALSE; 465 break; 466 } 467 } 468 if (free_units) { 469 sal_free(_bcm_stat_ovr_threshold); 470 _bcm_stat_ovr_threshold = NULL; 471 } 472 } 473 474 /* Delete oversize control */ 475 if (NULL != _bcm_stat_ovr_control) { 476 SHR_BITCLR_RANGE(&_bcm_stat_ovr_control[unit], 0, 477 SHR_BITALLOCSIZE(SOC_MAX_NUM_PORTS)); 478 479 free_units = TRUE; 480 for (i = 0; i < BCM_MAX_NUM_UNITS; i++) { 481 if( ((i != unit) && SOC_UNIT_VALID(i)) || 482 !SHR_BITNULL_RANGE(&_bcm_stat_ovr_control[i], 0, 483 SHR_BITALLOCSIZE(SOC_MAX_NUM_PORTS))) { 484 free_units = FALSE; 485 break; 486 } 487 } 488 489 if (free_units) { 490 sal_free(_bcm_stat_ovr_control); 491 _bcm_stat_ovr_control = NULL; 492 } 493 } 494 495 #if defined(BCM_KATANA_SUPPORT) || defined(BCM_TRIUMPH3_SUPPORT) 496 if (soc_feature(unit,soc_feature_advanced_flex_counter)) { 497 BCM_IF_ERROR_RETURN(_bcm_esw_stat_flex_cleanup(unit)); 498 } 499 #endif 500 if (soc_feature(unit, soc_feature_linkphy_coe)) { 501 #if defined(BCM_KATANA2_SUPPORT) 502 BCM_IF_ERROR_RETURN(bcm_kt2_subport_counter_cleanup(unit)); 503 #endif 504 } 505 506 #if defined(BCM_HURRICANE3_SUPPORT) 507 if (soc_feature(unit, soc_feature_flowcnt)){ 508 BCM_IF_ERROR_RETURN(_bcm_esw_flowcnt_cleanup(unit)); 509 } 510 #endif 511 512 return (BCM_E_NONE); 513 } 514 515 /* 516 * Function: 517 * _bcm_esw_stat_gport_validate 518 * Description: 519 * Helper funtion to validate port/gport parameter 520 * Parameters: 521 * unit - (IN) BCM device number 522 * port_in - (IN) Port / Gport to validate 523 * port_out - (OUT) Port number if valid. 524 * Return Value: 525 * BCM_E_NONE - Port OK 526 * BCM_E_INIT - Not initialized 527 * BCM_E_PORT - Port Invalid 528 */ 529 530 STATIC int 531 _bcm_esw_stat_gport_validate(int unit, bcm_port_t port_in, bcm_port_t *port_out) 532 { 533 bcm_pbmp_t pbmp_all; 534 535 BCM_PBMP_CLEAR(pbmp_all); 536 BCM_PBMP_ASSIGN(pbmp_all, PBMP_ALL(unit)); 537 538 #ifdef BCM_KATANA2_SUPPORT 539 if (soc_feature(unit, soc_feature_linkphy_coe) || 540 soc_feature(unit, soc_feature_subtag_coe)) { 541 _bcm_kt2_subport_pbmp_update(unit, &pbmp_all); 542 } 543 #endif 544 545 if (BCM_GPORT_IS_SET(port_in)) { 546 BCM_IF_ERROR_RETURN( 547 bcm_esw_port_local_get(unit, port_in, port_out)); 548 } else if (SOC_PORT_VALID(unit, port_in) && 549 ((SOC_PBMP_MEMBER(pbmp_all, port_in) || 550 SOC_PBMP_MEMBER(PBMP_ALL(unit), port_in)) && 551 (!IS_LB_PORT(unit, port_in) && !IS_RDB_PORT(unit,port_in)))) { 552 *port_out = port_in; 553 } else { 554 return BCM_E_PORT; 555 } 556 557 return BCM_E_NONE; 558 } 559 560 #ifdef BCM_WARM_BOOT_SUPPORT 561 562 #define BCM_WB_VERSION_1_9 SOC_SCACHE_VERSION(1,9) 563 #define BCM_WB_VERSION_1_8 SOC_SCACHE_VERSION(1,8) 564 #define BCM_WB_VERSION_1_7 SOC_SCACHE_VERSION(1,7) 565 #define BCM_WB_VERSION_1_6 SOC_SCACHE_VERSION(1,6) 566 #define BCM_WB_VERSION_1_5 SOC_SCACHE_VERSION(1,5) 567 #define BCM_WB_VERSION_1_4 SOC_SCACHE_VERSION(1,4) 568 #define BCM_WB_VERSION_1_3 SOC_SCACHE_VERSION(1,3) 569 #define BCM_WB_VERSION_1_2 SOC_SCACHE_VERSION(1,2) 570 #define BCM_WB_VERSION_1_1 SOC_SCACHE_VERSION(1,1) 571 #define BCM_WB_DEFAULT_VERSION BCM_WB_VERSION_1_9 572 573 static uint16 stat_warmboot_version=0; 574 575 #if defined(BCM_TRIUMPH3_SUPPORT) || defined(BCM_KATANA_SUPPORT) || \ 576 defined(BCM_HURRICANE3_SUPPORT) 577 578 STATIC int _bcm_esw_stat_warm_boot_alloc(int unit); 579 580 /* 581 * Function: 582 * _bcm_esw_stat_warm_boot_recover 583 * Purpose: 584 * Recover stat overflow flag states from scache 585 * Parameters: 586 * unit - StrataSwitch unit number. 587 * Returns: 588 * BCM_E_XXX 589 */ 590 STATIC int 591 _bcm_esw_stat_warm_boot_recover(int unit) 592 { 593 uint8 *stat_scache_ptr; 594 soc_scache_handle_t scache_handle; 595 int stable_size = 0; 596 int rv = BCM_E_NONE; 597 int alloc_sz = BCM_MAX_NUM_UNITS * SHR_BITALLOCSIZE(SOC_MAX_NUM_PORTS); 598 int max_num_ports, scache_sz; 599 600 601 SOC_IF_ERROR_RETURN(soc_stable_size_get(unit, &stable_size)); 602 if (stable_size > 0) { 603 604 SOC_SCACHE_HANDLE_SET(scache_handle, unit, BCM_MODULE_STAT, 605 _BCM_STAT_WARM_BOOT_CHUNK_PORTS); 606 rv = _bcm_esw_scache_ptr_get(unit, scache_handle, FALSE, 607 alloc_sz, &stat_scache_ptr, 608 BCM_WB_DEFAULT_VERSION, 609 &stat_warmboot_version); 610 611 if (BCM_E_NOT_FOUND == rv) { 612 return _bcm_esw_stat_warm_boot_alloc(unit); 613 } else if (BCM_FAILURE(rv)) { 614 return rv; 615 } 616 if (NULL != stat_scache_ptr) { 617 max_num_ports = soc_scache_dictionary_entry_get(unit, 618 ssden_SOC_MAX_NUM_PORTS, 619 SOC_MAX_NUM_PORTS); 620 621 scache_sz = BCM_MAX_NUM_UNITS * SHR_BITALLOCSIZE(max_num_ports); 622 SOC_SCACHE_SIZE_MIN_RECOVER(stat_scache_ptr, _bcm_stat_ovr_control, 623 scache_sz, alloc_sz); 624 } 625 } 626 return rv; 627 } 628 629 /* 630 * Function: 631 * _bcm_esw_stat_warm_boot_sync 632 * Purpose: 633 * Sync STAT overflow flags states to scache 634 * Parameters: 635 * unit - StrataSwitch unit number. 636 * Returns: 637 * BCM_E_XXX 638 */ 639 STATIC int 640 _bcm_esw_stat_warm_boot_sync(int unit) 641 { 642 uint8 *stat_scache_ptr; 643 soc_scache_handle_t scache_handle; 644 int stable_size = 0; 645 int rv = BCM_E_NONE; 646 int alloc_sz = BCM_MAX_NUM_UNITS * SHR_BITALLOCSIZE(SOC_MAX_NUM_PORTS); 647 648 SOC_IF_ERROR_RETURN(soc_stable_size_get(unit, &stable_size)); 649 if (stable_size > 0) { 650 651 SOC_SCACHE_HANDLE_SET(scache_handle, unit, BCM_MODULE_STAT, 652 _BCM_STAT_WARM_BOOT_CHUNK_PORTS); 653 654 /* Get scache stat module data pointer */ 655 rv = _bcm_esw_scache_ptr_get(unit, scache_handle, FALSE, 656 alloc_sz, &stat_scache_ptr, 657 BCM_WB_DEFAULT_VERSION, NULL); 658 659 if (BCM_SUCCESS(rv) && (NULL != stat_scache_ptr) && 660 (NULL !=_bcm_stat_ovr_control)) { 661 /* Copy stat overflow control flags to scache */ 662 sal_memcpy(stat_scache_ptr, _bcm_stat_ovr_control, alloc_sz); 663 } 664 } 665 return rv; 666 } 667 668 /* 669 * Function: 670 * _bcm_esw_stat_warm_boot_alloc 671 * Purpose: 672 * Allocate persistent info memory for STAT module - Level 2 Warm Boot 673 * Parameters: 674 * unit - StrataSwitch unit number. 675 * Returns: 676 * BCM_E_XXX 677 */ 678 STATIC int 679 _bcm_esw_stat_warm_boot_alloc(int unit) 680 { 681 int rv; 682 uint8 *stat_scache_ptr; 683 soc_scache_handle_t scache_handle; 684 int alloc_sz = BCM_MAX_NUM_UNITS * SHR_BITALLOCSIZE(SOC_MAX_NUM_PORTS); 685 686 SOC_SCACHE_HANDLE_SET(scache_handle, unit, BCM_MODULE_STAT, 687 _BCM_STAT_WARM_BOOT_CHUNK_PORTS); 688 689 /* Create scahe pointer */ 690 rv = _bcm_esw_scache_ptr_get(unit, scache_handle, TRUE, 691 alloc_sz, &stat_scache_ptr, 692 BCM_WB_DEFAULT_VERSION, NULL); 693 694 if (BCM_E_NOT_FOUND == rv) { 695 /* Proceed with Level 1 Warm Boot */ 696 rv = BCM_E_NONE; 697 } 698 699 return rv; 700 } 701 #endif 702 703 int 704 _bcm_esw_stat_sync_version_above_equal(int unit,uint16 version) 705 { 706 if (stat_warmboot_version >= version) { 707 return TRUE; 708 } 709 return FALSE; 710 } 711 712 int 713 _bcm_esw_stat_sync_version_below_equal(int unit,uint16 version) 714 { 715 if (stat_warmboot_version <= version) { 716 return TRUE; 717 } 718 return FALSE; 719 } 720 721 /* 722 * Function: 723 * _bcm_esw_stat_sync 724 * Purpose: 725 * Record Stat module persisitent info for Level 2 Warm Boot 726 * Parameters: 727 * unit - (IN) BCM device number 728 * Returns: 729 * BCM_E_XXX 730 */ 731 732 int 733 _bcm_esw_stat_sync(int unit) 734 { 735 #if defined(BCM_WARM_BOOT_SUPPORT) && (defined(BCM_TRIUMPH3_SUPPORT) || \ 736 defined(BCM_KATANA_SUPPORT) || defined(BCM_HURRICANE3_SUPPORT)) 737 _bcm_esw_stat_warm_boot_sync(unit); 738 #endif 739 #if defined(BCM_KATANA_SUPPORT) || defined(BCM_TRIUMPH3_SUPPORT) 740 if (soc_feature(unit,soc_feature_advanced_flex_counter)) { 741 BCM_IF_ERROR_RETURN(_bcm_esw_stat_flex_sync(unit)); 742 } 743 #endif 744 #if defined(BCM_HURRICANE3_SUPPORT) 745 if (soc_feature(unit, soc_feature_flowcnt)) { 746 BCM_IF_ERROR_RETURN(_bcm_esw_flowcnt_sync(unit)); 747 } 748 #endif 749 return BCM_E_NONE; 750 } 751 /* 752 * Function: 753 * _bcm_stat_reload (internal) 754 * Description: 755 * Reload the STAT structures from the current hardware configuration. 756 * Parameters: 757 * unit - StrataSwitch PCI device unit number (driver internal). 758 * Returns: 759 * BCM_E_XXX 760 */ 761 762 STATIC int 763 _bcm_stat_reload(int unit) 764 { 765 766 if ((_bcm_stat_ovr_threshold == NULL) || 767 (_bcm_stat_ovr_threshold[unit] == NULL)) { 768 /* These were just allocated! */ 769 return BCM_E_INTERNAL; 770 } 771 772 #ifdef BCM_XGS3_SWITCH_SUPPORT 773 if (SOC_IS_XGS3_SWITCH(unit)) { 774 uint32 value = 0; 775 uint64 value64; 776 bcm_port_t port; 777 778 PBMP_PORT_ITER(unit, port) { 779 if (SOC_USE_PORTCTRL(unit)) { 780 BCM_IF_ERROR_RETURN 781 (bcmi_esw_portctrl_cntmaxsize_get( 782 unit, port, (int *)&value)); 783 _bcm_stat_ovr_threshold[unit][port] = value; 784 continue; 785 } 786 #if defined (BCM_TOMAHAWK_SUPPORT) || defined (BCM_APACHE_SUPPORT) 787 if (SOC_IS_TOMAHAWKX(unit) || SOC_IS_APACHE(unit) || SOC_IS_TRIDENT3X(unit)) { 788 if (IS_CL_PORT(unit, port) || IS_CLG2_PORT(unit, port)) { 789 SOC_IF_ERROR_RETURN 790 (READ_CLPORT_CNTMAXSIZEr(unit, port, &value)); 791 } else { 792 SOC_IF_ERROR_RETURN 793 (READ_XLPORT_CNTMAXSIZEr(unit, port, &value)); 794 } 795 _bcm_stat_ovr_threshold[unit][port] = value; 796 continue; 797 } 798 #endif /* BCM_TOMAHAWK_SUPPORT || BCM_APACHE_SUPPORT */ 799 #ifdef BCM_TRIDENT2_SUPPORT 800 if (SOC_IS_TD2_TT2(unit)) { 801 SOC_IF_ERROR_RETURN 802 (READ_PGW_CNTMAXSIZEr(unit, port, &value)); 803 _bcm_stat_ovr_threshold[unit][port] = value; 804 continue; 805 } 806 #endif /* BCM_TRIDENT2_SUPPORT */ 807 #if defined(BCM_HURRICANE2_SUPPORT) || defined(BCM_GREYHOUND_SUPPORT) 808 if (SOC_IS_HURRICANE2(unit) || SOC_IS_GREYHOUND(unit) || 809 SOC_IS_HURRICANE3(unit) || SOC_IS_GREYHOUND2(unit)) { 810 if (IS_XL_PORT(unit,port)) { 811 SOC_IF_ERROR_RETURN 812 (READ_XLPORT_CNTMAXSIZEr(unit, port, &value)); 813 #ifdef BCM_GREYHOUND2_SUPPORT 814 } else if (IS_CL_PORT(unit, port)) { 815 SOC_IF_ERROR_RETURN 816 (READ_CLPORT_CNTMAXSIZEr(unit, port, &value)); 817 #endif /* BCM_GREYHOUND2_SUPPORT */ 818 } else { 819 SOC_IF_ERROR_RETURN 820 (READ_GPORT_CNTMAXSIZEr(unit, port, &value)); 821 } 822 _bcm_stat_ovr_threshold[unit][port] = value; 823 continue; 824 } 825 #endif /* BCM_HURRICANE2_SUPPORT || BCM_GREYHOUND_SUPPORT */ 826 if (soc_feature(unit, soc_feature_unified_port)) { 827 SOC_IF_ERROR_RETURN 828 (READ_PORT_CNTMAXSIZEr(unit, port, &value)); 829 #if defined(BCM_KATANA2_SUPPORT) 830 } else if (SOC_IS_KATANA2(unit) && IS_MXQ_PORT(unit,port)) { 831 SOC_IF_ERROR_RETURN 832 (READ_X_GPORT_CNTMAXSIZEr(unit, port, &value)); 833 } else if (SOC_IS_SABER2(unit) && IS_XL_PORT(unit, port)) { 834 SOC_IF_ERROR_RETURN 835 (READ_XLPORT_CNTMAXSIZEr(unit, port, &value)); 836 #endif 837 } else if (IS_GE_PORT(unit,port) || IS_FE_PORT(unit,port) || 838 IS_XL_PORT(unit, port) || IS_MXQ_PORT(unit,port)) { 839 SOC_IF_ERROR_RETURN 840 (READ_GPORT_CNTMAXSIZEr(unit, port, &value)); 841 } else { 842 SOC_IF_ERROR_RETURN 843 (READ_MAC_CNTMAXSZr(unit, port, &value64)); 844 COMPILER_64_TO_32_LO(value, value64); 845 } 846 847 _bcm_stat_ovr_threshold[unit][port] = value; 848 } 849 #if defined(BCM_TRIUMPH3_SUPPORT) || defined(BCM_KATANA_SUPPORT) ||\ 850 defined(BCM_HURRICANE3_SUPPORT) 851 /* Recover WB stat overflow flags from scahe */ 852 BCM_IF_ERROR_RETURN(_bcm_esw_stat_warm_boot_recover(unit)); 853 #endif /* BCM_TRIUMPH3_SUPPORT */ 854 } 855 #endif /* BCM_XGS3_SWITCH_SUPPORT */ 856 857 return BCM_E_NONE; 858 } 859 #endif /* BCM_WARM_BOOT_SUPPORT */ 860 861 /* 862 * Function: 863 * bcm_stat_init 864 * Description: 865 * Initializes the BCM stat module. 866 * Parameters: 867 * unit - StrataSwitch PCI device unit number (driver internal). 868 * Returns: 869 * BCM_E_NONE - Success. 870 * BCM_E_INTERNAL - Chip access failure. 871 */ 872 873 int 874 bcm_esw_stat_init(int unit) 875 { 876 pbmp_t pbmp; 877 sal_usecs_t interval; 878 uint32 flags; 879 int config_threshold; 880 int i; 881 _bcm_stat_extra_counter_t *ctr; 882 int alloc_size; 883 int free_global_arr = FALSE; 884 #if defined (BCM_KATANA2_SUPPORT) 885 soc_port_t port; 886 #endif 887 888 889 if (soc_property_get_str(unit, spn_BCM_STAT_PBMP) == NULL) { 890 #if defined (BCM_KATANA2_SUPPORT) 891 if (SOC_IS_KATANA2(unit)) { 892 SOC_PBMP_CLEAR(pbmp); 893 for (port = SOC_INFO(unit).cmic_port; 894 port <= SOC_INFO(unit).lb_port; 895 port++) { 896 if (SOC_INFO(unit).block_valid[SOC_PORT_BLOCK(unit,port)]) { 897 LOG_VERBOSE(BSL_LS_APPL_SHELL, 898 (BSL_META_U(unit, 899 "BlockName:%s \n"), 900 SOC_BLOCK_NAME(unit, SOC_PORT_BLOCK(unit,port)))); 901 SOC_PBMP_PORT_ADD(pbmp, port); 902 } 903 } 904 } else 905 #endif 906 { 907 SOC_PBMP_ASSIGN(pbmp, PBMP_PORT_ALL(unit)); 908 /* 909 * Collect stats on CPU port as well if supported 910 */ 911 if (soc_feature(unit, soc_feature_cpuport_stat_dma)) { 912 SOC_PBMP_PORT_ADD(pbmp, CMIC_PORT(unit)); 913 } 914 } 915 } else { 916 #if defined (BCM_KATANA2_SUPPORT) 917 if (SOC_IS_KATANA2(unit)) { 918 LOG_CLI((BSL_META_U(unit, 919 "After flex-io operation. You might need " 920 "to add new ports for counter collection manually\n"))); 921 } 922 #endif 923 pbmp = soc_property_get_pbmp(unit, spn_BCM_STAT_PBMP, 0); 924 } 925 926 interval = (SAL_BOOT_BCMSIM) ? 927 SOC_COUNTER_INTERVAL_SIM_DEFAULT : SOC_COUNTER_INTERVAL_DEFAULT; 928 interval = soc_property_get(unit, spn_BCM_STAT_INTERVAL, interval); 929 930 counter_flags_default = SOC_COUNTER_F_DMA; 931 #if defined(PLISIM) 932 if (SAL_BOOT_PLISIM) { 933 counter_flags_default = 0; 934 } 935 #endif 936 937 flags = 938 soc_property_get(unit, spn_BCM_STAT_FLAGS, counter_flags_default); 939 940 if (SOC_IS_RCPU_ONLY(unit)) { 941 flags &= ~SOC_COUNTER_F_DMA; 942 } 943 944 if (NULL == _bcm_stat_ovr_threshold) { 945 alloc_size = BCM_MAX_NUM_UNITS * sizeof(int *); 946 _bcm_stat_ovr_threshold = 947 sal_alloc(alloc_size, "device oversize packet thresholds"); 948 if (NULL == _bcm_stat_ovr_threshold) { 949 return (BCM_E_MEMORY); 950 } 951 sal_memset(_bcm_stat_ovr_threshold, 0, alloc_size); 952 } 953 alloc_size = SOC_MAX_NUM_PORTS * sizeof(int); 954 if (NULL == _bcm_stat_ovr_threshold[unit]) { 955 _bcm_stat_ovr_threshold[unit] = 956 sal_alloc(alloc_size, "device per-port oversize packet thresholds"); 957 if (NULL == _bcm_stat_ovr_threshold[unit]) { 958 return (BCM_E_MEMORY); 959 } 960 } 961 sal_memset(_bcm_stat_ovr_threshold[unit], 0, alloc_size); 962 config_threshold = soc_property_get(unit, spn_BCM_STAT_JUMBO, 1518); 963 if ((config_threshold < 1518) || 964 (config_threshold > 0x3fff) ) { 965 config_threshold = 1518; 966 } 967 968 for (i = 0; i < SOC_MAX_NUM_PORTS; i++) { 969 _bcm_stat_ovr_threshold[unit][i] = config_threshold; 970 } 971 972 /* Initialize Oversize packet control bitmap */ 973 if (NULL == _bcm_stat_ovr_control) { 974 alloc_size = BCM_MAX_NUM_UNITS * SHR_BITALLOCSIZE(SOC_MAX_NUM_PORTS); 975 _bcm_stat_ovr_control = 976 sal_alloc(alloc_size, "oversize packet error control"); 977 if (NULL == _bcm_stat_ovr_control) { 978 return (BCM_E_MEMORY); 979 } 980 sal_memset(_bcm_stat_ovr_control, 0, alloc_size); 981 } 982 983 #ifdef BCM_WARM_BOOT_SUPPORT 984 if (SOC_WARM_BOOT(unit)) { 985 BCM_IF_ERROR_RETURN(_bcm_stat_reload(unit)); 986 } 987 #endif /* BCM_WARM_BOOT_SUPPORT */ 988 989 #ifdef BCM_XGS3_SWITCH_SUPPORT 990 if (SOC_IS_XGS3_SWITCH(unit)) { 991 bcm_port_t port; 992 uint64 rval; 993 uint32 rval32; 994 soc_info_t *si = &SOC_INFO(unit); 995 #if defined(BCM_TRIDENT3_SUPPORT) || defined(BCM_TOMAHAWK3_SUPPORT) 996 if(SOC_IS_TRIDENT3X(unit) || SOC_IS_TOMAHAWK3(unit)) { 997 /* Setup for all Rx dropped packets */ 998 SOC_IF_ERROR_RETURN 999 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomReceive0, 1000 bcmDbgCntRPORTD)); 1001 SOC_IF_ERROR_RETURN 1002 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomReceive0, 1003 bcmDbgCntRIPD4)); 1004 SOC_IF_ERROR_RETURN 1005 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomReceive0, 1006 bcmDbgCntRIPD6)); 1007 SOC_IF_ERROR_RETURN 1008 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomReceive0, 1009 bcmDbgCntPDISC)); 1010 SOC_IF_ERROR_RETURN 1011 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomReceive0, 1012 bcmDbgCntRDROP)); 1013 if (SOC_IS_TRIDENT3X(unit)) { 1014 SOC_IF_ERROR_RETURN 1015 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomReceive0, 1016 bcmDbgCntRxVlanMismatch)); 1017 SOC_IF_ERROR_RETURN 1018 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomReceive0, 1019 bcmDbgCntRxVlanMemberMismatch)); 1020 1021 SOC_IF_ERROR_RETURN 1022 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomReceive0, 1023 bcmDbgCntRxTpidMismatch)); 1024 SOC_IF_ERROR_RETURN 1025 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomReceive0, 1026 bcmDbgCntRxPrivateVlanMismatch)); 1027 } else { /* SOC_IS_TOMAHAWK3(unit) */ 1028 SOC_IF_ERROR_RETURN 1029 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomReceive2, 1030 bcmDbgCntRxVlanMismatch)); 1031 SOC_IF_ERROR_RETURN 1032 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomReceive2, 1033 bcmDbgCntRxVlanMemberMismatch)); 1034 SOC_IF_ERROR_RETURN 1035 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomReceive2, 1036 bcmDbgCntRxTpidMismatch)); 1037 SOC_IF_ERROR_RETURN 1038 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomReceive2, 1039 bcmDbgCntRxPrivateVlanMismatch)); 1040 } 1041 1042 /* Setup counter for Bridged multicast packets */ 1043 SOC_IF_ERROR_RETURN 1044 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomReceive1, 1045 bcmDbgCntIMBP)); 1046 /* Setup counter for Multicast (L2+L3) packets that are dropped */ 1047 SOC_IF_ERROR_RETURN 1048 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomReceive2, 1049 bcmDbgCntRIMDR)); 1050 /* Setup counter for Good IPv6 L3 UC & IPMC packets & */ 1051 SOC_IF_ERROR_RETURN 1052 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomTransmit0, 1053 bcmDbgCntTGIPMC6)); 1054 SOC_IF_ERROR_RETURN 1055 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomTransmit0, 1056 bcmDbgCntTGIP6)); 1057 /* Setup counter for IPv6 L3 UC and IPMC Aged and Drop Packets */ 1058 SOC_IF_ERROR_RETURN 1059 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomTransmit1, 1060 bcmDbgCntTIPMCD6)); 1061 SOC_IF_ERROR_RETURN 1062 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomTransmit1, 1063 bcmDbgCntTIPD6)); 1064 /* Setup counter for Good IPv6 IPMC packets */ 1065 SOC_IF_ERROR_RETURN 1066 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomTransmit2, 1067 bcmDbgCntTGIPMC6)); 1068 /* Setup counter for Dropped packets */ 1069 SOC_IF_ERROR_RETURN 1070 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomTransmit3, 1071 bcmDbgCntTPKTD)); 1072 /* Setup counter for Good IPv4 & IPv6 L3 UC packets */ 1073 SOC_IF_ERROR_RETURN 1074 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomTransmit4, 1075 bcmDbgCntTGIP4)); 1076 SOC_IF_ERROR_RETURN 1077 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomTransmit4, 1078 bcmDbgCntTGIP6)); 1079 /* Setup counter for IPMC drops */ 1080 SOC_IF_ERROR_RETURN 1081 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomTransmit5, 1082 bcmDbgCntTIPMCD4)); 1083 SOC_IF_ERROR_RETURN 1084 (_bcm_esw_stat_custom_rsv_add(unit, -1, snmpBcmCustomTransmit5, 1085 bcmDbgCntTIPMCD6)); 1086 } 1087 else 1088 #endif /* BCM_TRIDENT3_SUPPORT || BCM_TOMAHAWK3_SUPPORT */ 1089 { 1090 SOC_IF_ERROR_RETURN 1091 (bcm_esw_stat_custom_set(unit, -1, snmpBcmCustomReceive0, 1092 BCM_DBG_CNT_DROP)); 1093 SOC_IF_ERROR_RETURN 1094 (bcm_esw_stat_custom_set(unit, -1, snmpBcmCustomReceive1, 1095 BCM_DBG_CNT_IMBP)); 1096 SOC_IF_ERROR_RETURN 1097 (bcm_esw_stat_custom_set(unit, -1, snmpBcmCustomReceive2, 1098 BCM_DBG_CNT_RIMDR)); 1099 SOC_IF_ERROR_RETURN 1100 (bcm_esw_stat_custom_set(unit, -1, snmpBcmCustomTransmit0, 1101 BCM_DBG_CNT_TGIPMC6 | 1102 BCM_DBG_CNT_TGIP6)); 1103 SOC_IF_ERROR_RETURN 1104 (bcm_esw_stat_custom_set(unit, -1, snmpBcmCustomTransmit1, 1105 BCM_DBG_CNT_TIPMCD6 | 1106 BCM_DBG_CNT_TIPD6)); 1107 SOC_IF_ERROR_RETURN 1108 (bcm_esw_stat_custom_set(unit, -1, snmpBcmCustomTransmit2, 1109 BCM_DBG_CNT_TGIPMC6)); 1110 SOC_IF_ERROR_RETURN 1111 (bcm_esw_stat_custom_set(unit, -1, snmpBcmCustomTransmit3, 1112 BCM_DBG_CNT_TPKTD)); 1113 SOC_IF_ERROR_RETURN 1114 (bcm_esw_stat_custom_set(unit, -1, snmpBcmCustomTransmit4, 1115 BCM_DBG_CNT_TGIP4 | 1116 BCM_DBG_CNT_TGIP6)); 1117 SOC_IF_ERROR_RETURN 1118 (bcm_esw_stat_custom_set(unit, -1, snmpBcmCustomTransmit5, 1119 BCM_DBG_CNT_TIPMCD4 | 1120 BCM_DBG_CNT_TIPMCD6)); 1121 } 1122 #ifdef BCM_TRIDENT2_SUPPORT 1123 if (soc_feature(unit, soc_feature_fcoe)) { 1124 SOC_IF_ERROR_RETURN( 1125 bcm_esw_stat_custom_add(unit, 0, snmpBcmCustomReceive3, 1126 bcmDbgCntFcmPortClass3RxFrames)); 1127 SOC_IF_ERROR_RETURN( 1128 bcm_esw_stat_custom_add(unit, 0, snmpBcmCustomReceive4, 1129 bcmDbgCntFcmPortClass3RxDiscards)); 1130 SOC_IF_ERROR_RETURN( 1131 bcm_esw_stat_custom_add(unit, 0, snmpBcmCustomReceive5, 1132 bcmDbgCntFcmPortClass2RxFrames)); 1133 SOC_IF_ERROR_RETURN( 1134 bcm_esw_stat_custom_add(unit, 0, snmpBcmCustomReceive6, 1135 bcmDbgCntFcmPortClass2RxDiscards)); 1136 SOC_IF_ERROR_RETURN( 1137 bcm_esw_stat_custom_add(unit, 0, snmpBcmCustomTransmit6, 1138 bcmDbgCntFcmPortClass3TxFrames)); 1139 SOC_IF_ERROR_RETURN( 1140 bcm_esw_stat_custom_add(unit, 0, snmpBcmCustomTransmit7, 1141 bcmDbgCntFcmPortClass2TxFrames)); 1142 } 1143 1144 #endif /* BCM_TRIDENT2_SUPPORT */ 1145 #ifdef BCM_TRIDENT2PLUS_SUPPORT 1146 if(soc_feature(unit, soc_feature_egress_failover)) { 1147 SOC_IF_ERROR_RETURN( 1148 bcm_esw_stat_custom_add(unit, 0,snmpBcmCustomTransmit8, 1149 bcmDbgCntEgressProtectionDataDrop)); 1150 } 1151 #endif 1152 1153 PBMP_PORT_ITER(unit, port) { 1154 if (SOC_USE_PORTCTRL(unit)) { 1155 BCM_IF_ERROR_RETURN 1156 (bcmi_esw_portctrl_cntmaxsize_set 1157 (unit, port, _bcm_stat_ovr_threshold[unit][port])); 1158 continue; 1159 } 1160 #if defined (BCM_TOMAHAWK_SUPPORT) || defined (BCM_APACHE_SUPPORT) 1161 if (SOC_IS_TOMAHAWKX(unit) || SOC_IS_APACHE(unit) || SOC_IS_TRIDENT3X(unit)) { 1162 if (IS_CL_PORT(unit, port) || IS_CLG2_PORT(unit, port)) { 1163 SOC_IF_ERROR_RETURN 1164 (WRITE_CLPORT_CNTMAXSIZEr 1165 (unit, port, _bcm_stat_ovr_threshold[unit][port])); 1166 } else { 1167 SOC_IF_ERROR_RETURN 1168 (WRITE_XLPORT_CNTMAXSIZEr 1169 (unit, port, _bcm_stat_ovr_threshold[unit][port])); 1170 } 1171 continue; 1172 } 1173 #endif /* BCM_TOMAHAWK_SUPPORT || BCM_APACHE_SUPPORT */ 1174 #ifdef BCM_TRIDENT2_SUPPORT 1175 if (SOC_IS_TD2_TT2(unit)) { 1176 SOC_IF_ERROR_RETURN 1177 (WRITE_PGW_CNTMAXSIZEr 1178 (unit, port, _bcm_stat_ovr_threshold[unit][port])); 1179 continue; 1180 } 1181 #endif /* BCM_TRIDENT2_SUPPORT */ 1182 #if (defined(BCM_HURRICANE2_SUPPORT) && !defined(_HURRICANE2_DEBUG)) 1183 if (SOC_IS_HURRICANE2(unit)) { 1184 if (IS_GE_PORT(unit,port)) { 1185 SOC_IF_ERROR_RETURN 1186 (WRITE_GPORT_CNTMAXSIZEr(unit, port, 1187 _bcm_stat_ovr_threshold[unit][port])); 1188 } 1189 continue; 1190 } 1191 #endif 1192 #ifdef BCM_GREYHOUND_SUPPORT 1193 if (SOC_IS_GREYHOUND(unit) || SOC_IS_HURRICANE3(unit) || 1194 SOC_IS_GREYHOUND2(unit)) { 1195 if (IS_XL_PORT(unit,port)) { 1196 SOC_IF_ERROR_RETURN 1197 (WRITE_XLPORT_CNTMAXSIZEr(unit, port, 1198 _bcm_stat_ovr_threshold[unit][port])); 1199 #ifdef BCM_GREYHOUND2_SUPPORT 1200 } else if (IS_CL_PORT(unit, port)) { 1201 SOC_IF_ERROR_RETURN 1202 (WRITE_CLPORT_CNTMAXSIZEr(unit, port, 1203 _bcm_stat_ovr_threshold[unit][port])); 1204 #endif /* BCM_GREYHOUND2_SUPPORT */ 1205 } else { 1206 SOC_IF_ERROR_RETURN 1207 (WRITE_GPORT_CNTMAXSIZEr(unit, port, 1208 _bcm_stat_ovr_threshold[unit][port])); 1209 } 1210 continue; 1211 } 1212 #endif 1213 1214 if (soc_feature(unit, soc_feature_unified_port)) { 1215 if (!SOC_IS_HURRICANE2(unit) && !SOC_IS_GREYHOUND(unit) && 1216 !SOC_IS_HURRICANE3(unit)) { 1217 SOC_IF_ERROR_RETURN 1218 (WRITE_PORT_CNTMAXSIZEr(unit, port, 1219 _bcm_stat_ovr_threshold[unit][port])); 1220 } 1221 #if defined (BCM_KATANA_SUPPORT) || defined(BCM_KATANA2_SUPPORT) 1222 } else if ((SOC_IS_KATANAX(unit)) && 1223 IS_MXQ_PORT(unit,port)) { 1224 SOC_IF_ERROR_RETURN 1225 (WRITE_X_GPORT_CNTMAXSIZEr(unit, port, 1226 _bcm_stat_ovr_threshold[unit][port])); 1227 } else if (SOC_IS_SABER2(unit) && IS_XL_PORT(unit, port)) { 1228 (WRITE_XLPORT_CNTMAXSIZEr(unit, port, 1229 _bcm_stat_ovr_threshold[unit][port])); 1230 #endif 1231 #if defined(BCM_ENDURO_SUPPORT) 1232 } else if (SOC_IS_ENDURO(unit) && IS_XQ_PORT(unit, port)) { 1233 SOC_IF_ERROR_RETURN 1234 (WRITE_QPORT_CNTMAXSIZEr(unit, port, 1235 _bcm_stat_ovr_threshold[unit][port])); 1236 #endif /* BCM_ENDURO_SUPPORT */ 1237 } else if (IS_GE_PORT(unit,port) || IS_FE_PORT(unit,port) || 1238 IS_XL_PORT(unit, port) || IS_MXQ_PORT(unit,port)) { 1239 SOC_IF_ERROR_RETURN 1240 (WRITE_GPORT_CNTMAXSIZEr(unit, port, 1241 _bcm_stat_ovr_threshold[unit][port])); 1242 } else if (IS_IL_PORT(unit, port)) { 1243 if (!SOC_PBMP_MEMBER(si->il.disabled_bitmap, port)) { 1244 SOC_IF_ERROR_RETURN(READ_IL_RX_CONFIGr(unit, port, &rval32)); 1245 soc_reg_field_set(unit, IL_RX_CONFIGr, &rval32, 1246 IL_RX_MAX_PACKET_SIZEf, 1247 _bcm_stat_ovr_threshold[unit][port]); 1248 SOC_IF_ERROR_RETURN(WRITE_IL_RX_CONFIGr(unit, port, rval32)); 1249 } 1250 } else { 1251 COMPILER_64_SET(rval, 0, _bcm_stat_ovr_threshold[unit][port]); 1252 SOC_IF_ERROR_RETURN(WRITE_MAC_CNTMAXSZr(unit, port, rval)); 1253 } 1254 1255 /* 1256 * Devices that use 10G MAC + Trimac/Unimac 1257 */ 1258 #if defined(BCM_ENDURO_SUPPORT) || \ 1259 defined(BCM_HURRICANE_SUPPORT) 1260 if (IS_XQ_PORT(unit, port) && (SOC_IS_ENDURO(unit) || 1261 SOC_IS_HURRICANE(unit) || SOC_IS_HURRICANE2(unit))) { 1262 SOC_IF_ERROR_RETURN 1263 (WRITE_QPORT_CNTMAXSIZEr(unit, port, 1264 _bcm_stat_ovr_threshold[unit][port])); 1265 } else 1266 #endif 1267 if (soc_feature(unit, soc_feature_unified_port) && 1268 soc_feature(unit, soc_feature_flexible_xgport)) { 1269 SOC_IF_ERROR_RETURN 1270 (WRITE_PORT_CNTMAXSIZEr(unit, port, 1271 _bcm_stat_ovr_threshold[unit][port])); 1272 } else if (IS_GX_PORT(unit, port) ||(IS_XG_PORT(unit, port) && 1273 soc_feature(unit, soc_feature_flexible_xgport))) { 1274 SOC_IF_ERROR_RETURN 1275 (WRITE_GPORT_CNTMAXSIZEr(unit, port, 1276 _bcm_stat_ovr_threshold[unit][port])); 1277 } 1278 } 1279 } 1280 #endif /* BCM_XGS3_SWITCH_SUPPORT */ 1281 1282 if ((!SAL_BOOT_SIMULATION) || (SAL_BOOT_BCMSIM)) { 1283 if ((!SAL_BOOT_BCMSIM) || (NULL != _bcm_stat_extra_counters)) { 1284 /* BCMSim initializes with counters cleared, so don't clear 1285 * for the first init on BCMSim. */ 1286 if (!SOC_HW_RESET(unit)) { 1287 /* Don't clear counters in Turbo boot mode during first Initialization */ 1288 SOC_IF_ERROR_RETURN(soc_counter_set32_by_port(unit, pbmp, 0)); 1289 } 1290 } 1291 if ((!SOC_WARM_BOOT(unit)) && 1292 (soc_feature(unit, soc_feature_centralized_counter))) { 1293 /* Clear all sw maintained counters */ 1294 soc_counter_ctr_reset_to_zero(unit); 1295 } 1296 SOC_IF_ERROR_RETURN(soc_counter_start(unit, flags, interval, pbmp)); 1297 } 1298 1299 if (NULL == _bcm_stat_extra_counters) { 1300 alloc_size = BCM_MAX_NUM_UNITS * sizeof(_bcm_stat_extra_counter_t *); 1301 _bcm_stat_extra_counters = sal_alloc(alloc_size, "device extra counters"); 1302 if (NULL == _bcm_stat_extra_counters) { 1303 return (BCM_E_MEMORY); 1304 } 1305 sal_memset(_bcm_stat_extra_counters, 0, alloc_size); 1306 free_global_arr = TRUE; 1307 } 1308 alloc_size = _BCM_STAT_EXTRA_COUNTER_COUNT * sizeof(_bcm_stat_extra_counter_t); 1309 if (NULL == _bcm_stat_extra_counters[unit]) { 1310 _bcm_stat_extra_counters[unit] = sal_alloc(alloc_size, "device extra counters"); 1311 if (NULL == _bcm_stat_extra_counters[unit]) { 1312 if (free_global_arr) { 1313 sal_free(_bcm_stat_extra_counters); 1314 _bcm_stat_extra_counters = NULL; 1315 } 1316 return (BCM_E_MEMORY); 1317 } 1318 } 1319 sal_memset(_bcm_stat_extra_counters[unit], 0, alloc_size); 1320 1321 ctr = _bcm_stat_extra_counters[unit]; 1322 ctr->reg = INVALIDr; 1323 if (SOC_REG_IS_VALID(unit, EGRDROPPKTCOUNTr)) { 1324 if (ctr->count64 == NULL) { 1325 ctr->count64 = sal_alloc(MAX_PORT(unit) * sizeof(uint64), 1326 "bcm extra counters"); 1327 if (ctr->count64 == NULL) { 1328 sal_free(_bcm_stat_extra_counters[unit]); 1329 _bcm_stat_extra_counters[unit] = NULL; 1330 if (free_global_arr) { 1331 sal_free(_bcm_stat_extra_counters); 1332 _bcm_stat_extra_counters = NULL; 1333 } 1334 return SOC_E_MEMORY; 1335 } 1336 sal_memset(ctr->count64, 0, MAX_PORT(unit) * sizeof(uint64)); 1337 } 1338 if (ctr->ctr_prev == NULL) { 1339 ctr->ctr_prev = sal_alloc(MAX_PORT(unit) * sizeof(uint32), 1340 "bcm extra counters"); 1341 if (ctr->ctr_prev == NULL) { 1342 sal_free(ctr->count64); 1343 ctr->count64 = NULL; 1344 sal_free(_bcm_stat_extra_counters[unit]); 1345 _bcm_stat_extra_counters[unit] = NULL; 1346 if (free_global_arr) { 1347 sal_free(_bcm_stat_extra_counters); 1348 _bcm_stat_extra_counters = NULL; 1349 } 1350 return SOC_E_MEMORY; 1351 } 1352 sal_memset(ctr->ctr_prev, 0, MAX_PORT(unit) * sizeof(uint32)); 1353 } 1354 ctr->reg = EGRDROPPKTCOUNTr; 1355 } 1356 BCM_IF_ERROR_RETURN(soc_counter_extra_register(unit, 1357 _bcm_stat_counter_extra_callback)); 1358 1359 #if defined(BCM_WARM_BOOT_SUPPORT) && (defined(BCM_TRIUMPH3_SUPPORT) || \ 1360 defined(BCM_KATANA_SUPPORT) || defined(BCM_HURRICANE3_SUPPORT)) 1361 if (!SOC_WARM_BOOT(unit)) { 1362 /* For cold boot, allocate WB scahe STAT module data */ 1363 BCM_IF_ERROR_RETURN(_bcm_esw_stat_warm_boot_alloc(unit)); 1364 } 1365 #endif /* BCM_WARM_BOOT_SUPPORT */ 1366 1367 #if defined(BCM_KATANA_SUPPORT) || defined(BCM_TRIUMPH3_SUPPORT) 1368 if (!SOC_IS_MONTEREY(unit)) { 1369 if (soc_feature(unit,soc_feature_advanced_flex_counter)) { 1370 BCM_IF_ERROR_RETURN(_bcm_esw_stat_flex_init(unit)); 1371 } 1372 } 1373 #endif 1374 if (soc_feature(unit, soc_feature_linkphy_coe)) { 1375 #if defined (BCM_KATANA2_SUPPORT) 1376 BCM_IF_ERROR_RETURN(bcm_kt2_subport_counter_init(unit)); 1377 #endif 1378 } 1379 #if defined(BCM_HURRICANE3_SUPPORT) 1380 if (soc_feature(unit, soc_feature_flowcnt)){ 1381 BCM_IF_ERROR_RETURN(_bcm_esw_flowcnt_init(unit)); 1382 } 1383 #endif 1384 return BCM_E_NONE; 1385 } 1386 /* 1387 * Function: 1388 * bcm_esw_stat_flex_pool_info_multi_get 1389 * Description: 1390 * Retrieves the flex counter details for a given objectId 1391 * Parameters: 1392 * 1393 * unit : (IN) UNIT number 1394 * direction : (IN) Direction (Ingress/egress) 1395 * num_pools : (IN) Passing a 0, then actual_num_pools will return the number of pools that are available. 1396 * return the number of pools that are available. 1397 * Passing n will return up to n pools in the return array 1398 * flex_pool_stat : (OUT) array that provides the pool info 1399 * actual_num_pools : (OUT) Returns actual no of pools available for a given direction 1400 * 1401 * Returns: 1402 * BCM_E_* 1403 */ 1404 1405 int bcm_esw_stat_flex_pool_info_multi_get( 1406 int unit, 1407 bcm_stat_flex_direction_t direction, 1408 uint32 num_pools, 1409 bcm_stat_flex_pool_stat_info_t *flex_pool_stat, 1410 uint32 *actual_num_pools) 1411 { 1412 #if defined(BCM_KATANA_SUPPORT) || defined(BCM_TRIUMPH3_SUPPORT) 1413 if (soc_feature(unit,soc_feature_advanced_flex_counter)) { 1414 return _bcm_esw_stat_flex_pool_info_multi_get(unit, 1415 direction, num_pools, flex_pool_stat, actual_num_pools); 1416 } else 1417 #endif 1418 { 1419 return BCM_E_UNAVAIL; 1420 } 1421 } 1422 1423 /* 1424 * Function: 1425 * _bcm_esw_stat_flex_counter_get 1426 * Description: 1427 * Get the specified statistic of given counter 1428 * if sync_mode is set, sync the sw accumulated count 1429 * with hw count value first, else return sw count. 1430 * Parameters: 1431 * unit - (IN) unit number 1432 * sync_mode - (IN) hwcount is to be synced to sw count 1433 * Stat_id - (IN) Statistics entity ID. 1434 * counter_type - (IN) Counter stat types, I.e. byte/packet 1435 * num_entries - (IN) Number of counter Entries 1436 * counter_indexes - (IN) Pointer to Counter indexes entries 1437 * counter_values - (OUT) Pointer to counter values 1438 * Returns: 1439 * BCM_E_* 1440 */ 1441 int _bcm_esw_stat_flex_counter_get( 1442 int unit, 1443 int sync_mode, 1444 uint32 stat_counter_id, 1445 bcm_stat_flex_stat_t stat, 1446 uint32 num_entries, 1447 uint32 *counter_indexes, 1448 bcm_stat_value_t *counter_values) 1449 { 1450 #if defined(BCM_KATANA_SUPPORT) || defined(BCM_TRIUMPH3_SUPPORT) || \ 1451 defined(BCM_HURRICANE3_SUPPORT) 1452 uint32 index_count=0; 1453 uint32 byte_flag=0; 1454 #endif 1455 1456 #if defined(BCM_KATANA_SUPPORT) || defined(BCM_TRIUMPH3_SUPPORT) 1457 if (soc_feature(unit, soc_feature_advanced_flex_counter)) { 1458 if (bcmStatFlexStatPackets == stat) { 1459 byte_flag=0; 1460 } else if (bcmStatFlexStatBytes == stat) { 1461 byte_flag=1; 1462 } else { 1463 return BCM_E_PARAM; 1464 } 1465 1466 for (index_count=0; index_count < num_entries ; index_count++) { 1467 BCM_IF_ERROR_RETURN(_bcm_esw_stat_counter_raw_get( 1468 unit, sync_mode, stat_counter_id, byte_flag, 1469 counter_indexes[index_count], 1470 &counter_values[index_count])); 1471 } 1472 return BCM_E_NONE; 1473 } else 1474 #endif 1475 #if defined(BCM_HURRICANE3_SUPPORT) 1476 if (soc_feature(unit, soc_feature_flowcnt)) { 1477 if (bcmStatFlexStatPackets == stat) { 1478 byte_flag=0; 1479 } else if (bcmStatFlexStatBytes == stat) { 1480 byte_flag=1; 1481 } else { 1482 return BCM_E_PARAM; 1483 } 1484 for (index_count=0; index_count < num_entries ; index_count++) { 1485 BCM_IF_ERROR_RETURN(_bcm_esw_flowcnt_counter_raw_get( 1486 unit, sync_mode, stat_counter_id, byte_flag, 1487 counter_indexes[index_count], 1488 &counter_values[index_count])); 1489 } 1490 return BCM_E_NONE; 1491 } else 1492 #endif 1493 { 1494 return BCM_E_UNAVAIL; 1495 } 1496 } 1497 1498 /* 1499 * Function: 1500 * bcm_esw_stat_flex_counter_get 1501 * Description: 1502 * Get the specified statistic of given counter 1503 * Parameters: 1504 * unit - (IN) unit number 1505 * Stat_id - (IN) Statistics entity ID. 1506 * counter_type - (IN) Counter stat types, I.e. byte/packet 1507 * num_entries - (IN) Number of counter Entries 1508 * counter_indexes - (IN) Pointer to Counter indexes entries 1509 * counter_values - (OUT) Pointer to counter values 1510 * Returns: 1511 * BCM_E_* 1512 */ 1513 int bcm_esw_stat_flex_counter_get( 1514 int unit, 1515 uint32 stat_counter_id, 1516 bcm_stat_flex_stat_t stat, 1517 uint32 num_entries, 1518 uint32 *counter_indexes, 1519 bcm_stat_value_t *counter_values) 1520 { 1521 #if defined(BCM_KATANA_SUPPORT) || defined(BCM_TRIUMPH3_SUPPORT) || \ 1522 defined(BCM_HURRICANE3_SUPPORT) 1523 if (soc_feature(unit, soc_feature_advanced_flex_counter) || 1524 soc_feature(unit, soc_feature_flowcnt)) { 1525 return _bcm_esw_stat_flex_counter_get(unit, 0, stat_counter_id, 1526 stat, num_entries, counter_indexes, counter_values); 1527 } else 1528 #endif 1529 { 1530 return BCM_E_UNAVAIL; 1531 } 1532 } 1533 1534 /* 1535 * Function: 1536 * bcm_esw_stat_flex_counter_sync_get 1537 * Description: 1538 * Get the specified statistic of given counter 1539 * sw accumulated counters synced with hw count. 1540 * Parameters: 1541 * unit - (IN) unit number 1542 * Stat_id - (IN) Statistics entity ID. 1543 * counter_type - (IN) Counter stat types, I.e. byte/packet 1544 * num_entries - (IN) Number of counter Entries 1545 * counter_indexes - (IN) Pointer to Counter indexes entries 1546 * counter_values - (OUT) Pointer to counter values 1547 * Returns: 1548 * BCM_E_* 1549 */ 1550 int bcm_esw_stat_flex_counter_sync_get( 1551 int unit, 1552 uint32 stat_counter_id, 1553 bcm_stat_flex_stat_t stat, 1554 uint32 num_entries, 1555 uint32 *counter_indexes, 1556 bcm_stat_value_t *counter_values) 1557 { 1558 #if defined(BCM_KATANA_SUPPORT) || defined(BCM_TRIUMPH3_SUPPORT) || \ 1559 defined(BCM_HURRICANE3_SUPPORT) 1560 if (soc_feature(unit, soc_feature_advanced_flex_counter) || 1561 soc_feature(unit, soc_feature_flowcnt)) { 1562 return _bcm_esw_stat_flex_counter_get(unit, 1, stat_counter_id, 1563 stat, num_entries, counter_indexes, counter_values); 1564 } else 1565 #endif 1566 { 1567 return BCM_E_UNAVAIL; 1568 } 1569 } 1570 1571 /* 1572 * Function: 1573 * _bcm_esw_stat_flex_counter_set 1574 * Description: 1575 * Set the specified value to given counter 1576 * Parameters: 1577 * unit - (IN) unit number 1578 * Stat_id - (IN) Statistics entity ID. 1579 * counter_type - (IN) Counter stat types, I.e. byte/packet 1580 * num_entries - (IN) Number of counter Entries 1581 * counter_indexes - (IN) Pointer to Counter indexes entries 1582 * counter_values - (OUT) Pointer to counter values 1583 * Returns: 1584 * BCM_E_* 1585 */ 1586 int _bcm_esw_stat_flex_counter_set( 1587 int unit, 1588 uint32 stat_counter_id, 1589 bcm_stat_flex_stat_t stat, 1590 uint32 num_entries, 1591 uint32 *counter_indexes, 1592 bcm_stat_value_t *counter_values) 1593 { 1594 #if defined(BCM_KATANA_SUPPORT) || defined(BCM_TRIUMPH3_SUPPORT) || \ 1595 defined(BCM_HURRICANE3_SUPPORT) 1596 uint32 index_count=0; 1597 uint32 byte_flag=0; 1598 #endif 1599 1600 #if defined(BCM_KATANA_SUPPORT) || defined(BCM_TRIUMPH3_SUPPORT) 1601 if (soc_feature(unit, soc_feature_advanced_flex_counter)) { 1602 if (bcmStatFlexStatPackets == stat) { 1603 byte_flag=0; 1604 } else if (bcmStatFlexStatBytes == stat) { 1605 byte_flag=1; 1606 } else { 1607 return BCM_E_PARAM; 1608 } 1609 /* Check attached or not? */ 1610 for (index_count=0; index_count < num_entries ; index_count++) { 1611 BCM_IF_ERROR_RETURN(_bcm_esw_stat_counter_raw_set( 1612 unit, stat_counter_id, byte_flag, 1613 counter_indexes[index_count], 1614 &counter_values[index_count])); 1615 } 1616 return BCM_E_NONE; 1617 } else 1618 #endif 1619 #if defined(BCM_HURRICANE3_SUPPORT) 1620 if (soc_feature(unit, soc_feature_flowcnt)) { 1621 if (bcmStatFlexStatPackets == stat) { 1622 byte_flag = 0; 1623 } else if (bcmStatFlexStatBytes == stat) { 1624 byte_flag = 1; 1625 } else { 1626 return BCM_E_PARAM; 1627 } 1628 /* Check attached or not? */ 1629 for (index_count=0; index_count < num_entries ; index_count++) { 1630 BCM_IF_ERROR_RETURN(_bcm_esw_flowcnt_counter_raw_set( 1631 unit, stat_counter_id, byte_flag, 1632 counter_indexes[index_count], 1633 &counter_values[index_count])); 1634 } 1635 return BCM_E_NONE; 1636 } else 1637 #endif 1638 { 1639 return BCM_E_UNAVAIL; 1640 } 1641 } 1642 1643 /* 1644 * Function: 1645 * bcm_esw_stat_flex_counter_set 1646 * Description: 1647 * Set counter value of given counter 1648 * Parameters: 1649 * unit - (IN) unit number 1650 * Stat_id - (IN) Statistics entity ID. 1651 * counter_type - (IN) Counter stat types, I.e. byte/packet 1652 * num_entries - (IN) Number of counter Entries 1653 * counter_indexes - (IN) Pointer to Counter indexes entries 1654 * counter_values - (OUT) Pointer to counter values 1655 * Returns: 1656 * BCM_E_* 1657 */ 1658 int bcm_esw_stat_flex_counter_set( 1659 int unit, 1660 uint32 stat_counter_id, 1661 bcm_stat_flex_stat_t stat, 1662 uint32 num_entries, 1663 uint32 *counter_indexes, 1664 bcm_stat_value_t *counter_values) 1665 { 1666 #if defined(BCM_KATANA_SUPPORT) || defined(BCM_TRIUMPH3_SUPPORT) || \ 1667 defined(BCM_HURRICANE3_SUPPORT) 1668 if (soc_feature(unit, soc_feature_advanced_flex_counter) || 1669 soc_feature(unit, soc_feature_flowcnt)) { 1670 return _bcm_esw_stat_flex_counter_set(unit, stat_counter_id, 1671 stat, num_entries, counter_indexes, counter_values); 1672 } else 1673 #endif 1674 { 1675 return BCM_E_UNAVAIL; 1676 } 1677 } 1678 1679 /* 1680 * Function: 1681 * bcm_esw_stat_group_mode_attr_class_id_create 1682 * Description: 1683 * Create Customized Stat class identifiers for combining 1684 * Counter Attributes. 1685 * 1686 * Parameters: 1687 * unit (IN) Unit number. 1688 * attr (IN) Stat Attribute Flex Group Mode 1689 * num_of_attr_values (IN) Number of combined Attributes 1690 * attr_values (IN) Attribute Combined types 1691 * class_id (OUT) Created Class Identifier for the Combined type. 1692 * 1693 * Return Value: 1694 * BCM_E_XXX 1695 */ 1696 1697 int bcm_esw_stat_group_mode_attr_class_id_create( 1698 int unit, 1699 bcm_stat_group_mode_attr_t attr, 1700 uint32 num_of_attr_values, 1701 uint32 *attr_values, 1702 bcm_stat_group_mode_attr_class_id_t * attr_class_id) 1703 { 1704 #ifdef BCM_KATANA2_SUPPORT 1705 if (soc_feature(unit, soc_feature_flex_stat_attributes_class)) { 1706 BCM_IF_ERROR_RETURN(_bcm_esw_stat_group_mode_attr_class_id_create( 1707 unit, attr, num_of_attr_values, attr_values, attr_class_id)); 1708 return BCM_E_NONE; 1709 } else 1710 #endif 1711 { 1712 return BCM_E_UNAVAIL; 1713 } 1714 } 1715 1716 /* 1717 * Function: 1718 * bcm_esw_stat_group_mode_attr_class_id_destroy_ 1719 * Description: 1720 * Destroy Customized Stat class identifiers created for combining 1721 * Counter Attributes. 1722 * 1723 * Parameters: 1724 * unit (IN) Unit number. 1725 * class_id (IN) Created Class Identifier for the Combined type. 1726 * 1727 * Return Value: 1728 * BCM_E_XXX 1729 */ 1730 1731 int bcm_esw_stat_group_mode_attr_class_id_destroy( 1732 int unit, 1733 bcm_stat_group_mode_attr_class_id_t attr_class_id) 1734 { 1735 #ifdef BCM_KATANA2_SUPPORT 1736 if (soc_feature(unit, soc_feature_flex_stat_attributes_class)) { 1737 BCM_IF_ERROR_RETURN(_bcm_esw_stat_group_mode_attr_class_id_destroy( 1738 unit, attr_class_id)); 1739 return BCM_E_NONE; 1740 } else 1741 #endif 1742 { 1743 return BCM_E_UNAVAIL; 1744 } 1745 } 1746 1747 1748 /* 1749 * Function: 1750 * bcm_esw_stat_group_mode_id_create 1751 * Description: 1752 * Create Customized Stat Group mode for given Counter Attributes 1753 * Parameters: 1754 * 1755 * unit : (IN) UNIT number 1756 * flags : (IN) STAT_GROUP_MODE_* flags (INGRESS/EGRESS) 1757 * total_counters : (IN) Total Counters for Stat Flex Group Mode 1758 * num_selectors : (IN) Number of Selectors for Stat Flex Group Mode 1759 * attr_selectors : (IN) Attribute Selectors for Stat Flex Group Mode 1760 * mode_id : (OUT) Created Mode Identifier for Stat Flex Group Mode 1761 * 1762 * Returns: 1763 * BCM_E_* 1764 */ 1765 int bcm_esw_stat_group_mode_id_create( 1766 int unit, 1767 uint32 flags, 1768 uint32 total_counters, 1769 uint32 num_selectors, 1770 bcm_stat_group_mode_attr_selector_t *attr_selectors, 1771 uint32 *mode_id) 1772 { 1773 #if defined(BCM_KATANA_SUPPORT) || defined(BCM_TRIUMPH3_SUPPORT) 1774 if (soc_feature(unit,soc_feature_advanced_flex_counter)) { 1775 return _bcm_esw_stat_group_mode_id_create(unit, 1776 flags,total_counters,num_selectors,attr_selectors,mode_id); 1777 } else 1778 #endif 1779 #if defined(BCM_HURRICANE3_SUPPORT) 1780 if (soc_feature(unit, soc_feature_flowcnt)) { 1781 return _bcm_esw_flowcnt_group_mode_id_create(unit, 1782 flags,total_counters,num_selectors,attr_selectors,mode_id); 1783 } else 1784 #endif 1785 { 1786 return BCM_E_UNAVAIL; 1787 } 1788 } 1789 /* 1790 * Function: 1791 * bcm_esw_stat_group_mode_id_get 1792 * Description: 1793 * Retrieves Customized Stat Group mode Attributes for given mode_id 1794 * Parameters: 1795 * 1796 * unit : (IN) UNIT number 1797 * mode_id : (IN) Created Mode Identifier for Stat Flex Group Mode 1798 * flags : (OUT) STAT_GROUP_MODE_* flags (INGRESS/EGRESS) 1799 * total_counters : (OUT) Total Counters for Stat Flex Group Mode 1800 * num_selectors : (IN) Number of Selectors for Stat Flex Group Mode 1801 * attr_selectors : (OUT) Attribute Selectors for Stat Flex Group Mode 1802 * actual_num_selectors: (OUT) Actual Number of Selectors for Stat Flex 1803 * Group Mode 1804 * 1805 * Returns: 1806 * BCM_E_* 1807 */ 1808 int bcm_esw_stat_group_mode_id_get( 1809 int unit, 1810 uint32 mode_id, 1811 uint32 *flags, 1812 uint32 *total_counters, 1813 uint32 num_selectors, 1814 bcm_stat_group_mode_attr_selector_t *attr_selectors, 1815 uint32 *actual_num_selectors) 1816 { 1817 #if defined(BCM_KATANA_SUPPORT) || defined(BCM_TRIUMPH3_SUPPORT) 1818 if (soc_feature(unit,soc_feature_advanced_flex_counter)) { 1819 return _bcm_esw_stat_group_mode_id_get(unit, 1820 mode_id, flags, total_counters, 1821 num_selectors, attr_selectors, actual_num_selectors); 1822 } else 1823 #endif 1824 #if defined(BCM_HURRICANE3_SUPPORT) 1825 if (soc_feature(unit, soc_feature_flowcnt)) { 1826 return _bcm_esw_flowcnt_group_mode_id_get(unit, 1827 mode_id, flags, total_counters, 1828 num_selectors, attr_selectors, actual_num_selectors); 1829 } else 1830 #endif 1831 { 1832 return BCM_E_UNAVAIL; 1833 } 1834 } 1835 /* 1836 * Function: 1837 * bcm_esw_stat_group_mode_id_destroy 1838 * Description: 1839 * Destroys Customized Group mode 1840 * Parameters: 1841 * 1842 * unit : (IN) UNIT number 1843 * mode_id : (IN) Created Mode Identifier for Stat Flex Group Mode 1844 * 1845 * Returns: 1846 * BCM_E_* 1847 */ 1848 int bcm_esw_stat_group_mode_id_destroy( 1849 int unit, 1850 uint32 mode_id) 1851 { 1852 #if defined(BCM_KATANA_SUPPORT) || defined(BCM_TRIUMPH3_SUPPORT) 1853 if (soc_feature(unit,soc_feature_advanced_flex_counter)) { 1854 return _bcm_esw_stat_group_mode_id_destroy(unit, mode_id); 1855 } else 1856 #endif 1857 #if defined(BCM_HURRICANE3_SUPPORT) 1858 if (soc_feature(unit, soc_feature_flowcnt)) { 1859 return _bcm_esw_flowcnt_group_mode_id_destroy(unit, mode_id); 1860 } else 1861 #endif 1862 { 1863 return BCM_E_UNAVAIL; 1864 } 1865 } 1866 1867 /* 1868 * Function: 1869 * bcm_esw_stat_custom_group_create 1870 * Description: 1871 * Associate an accounting object to customized group mode 1872 * 1873 * Parameters: 1874 * 1875 * unit : (IN) UNIT number 1876 * mode_id : (IN) Created Mode Identifier for Stat Flex Group Mode 1877 * object : (IN) Accounting object 1878 * Stat_counter_id : (OUT) Stat Counter Id 1879 * num_entries : (OUT) Number of Counter entries created 1880 * 1881 * Returns: 1882 * BCM_E_* 1883 */ 1884 1885 int bcm_esw_stat_custom_group_create( 1886 int unit, 1887 uint32 mode_id, 1888 bcm_stat_object_t object, 1889 uint32 *stat_counter_id, 1890 uint32 *num_entries) 1891 { 1892 #if defined(BCM_KATANA_SUPPORT) || defined(BCM_TRIUMPH3_SUPPORT) 1893 if (soc_feature(unit,soc_feature_advanced_flex_counter)) { 1894 if(soc_feature(unit, soc_feature_flex_stat_compaction_support)) { 1895 return BCM_E_UNAVAIL; 1896 } else { 1897 return _bcm_esw_stat_custom_group_create(unit, 1898 mode_id, object, stat_counter_id, num_entries); 1899 } 1900 } else 1901 #endif 1902 #if defined(BCM_HURRICANE3_SUPPORT) 1903 if (soc_feature(unit, soc_feature_flowcnt)) { 1904 return _bcm_esw_flowcnt_custom_group_create(unit, 1905 mode_id, object, stat_counter_id, num_entries); 1906 } else 1907 #endif 1908 { 1909 return BCM_E_UNAVAIL; 1910 } 1911 } 1912 1913 /* 1914 * Function: 1915 * bcm_esw_stat_group_mode_config_create 1916 * Description: 1917 * Create Customized Stat Group mode for given Counter Attributes 1918 * 1919 * Parameters: 1920 * Unit (IN) Unit number 1921 * bcm_stat_group_mode_id_config_t (IN) Stat Config 1922 * mode_id : (IN) Created Mode Identifier for Stat Flex Group Mode 1923 * Return Value: 1924 * BCM_E_XXX 1925 * Notes: 1926 */ 1927 1928 int bcm_esw_stat_group_mode_id_config_create( 1929 int unit, 1930 uint32 options, 1931 bcm_stat_group_mode_id_config_t *stat_config, 1932 uint32 num_selectors, 1933 bcm_stat_group_mode_attr_selector_t *attr_sel, 1934 uint32 *mode_id) 1935 { 1936 if ((NULL == stat_config) || (NULL == attr_sel)) { 1937 return BCM_E_PARAM; 1938 } 1939 #if defined(BCM_TOMAHAWK_SUPPORT) 1940 if (soc_feature(unit,soc_feature_advanced_flex_counter)) { 1941 return _bcm_esw_stat_group_mode_id_config_create(unit, options, 1942 stat_config, num_selectors, attr_sel, mode_id); 1943 } 1944 #endif 1945 return BCM_E_UNAVAIL; 1946 } 1947 1948 /* 1949 * Function: 1950 * bcm_esw_stat_group_get 1951 * Description: 1952 * 1953 * Parameters: 1954 * Unit (IN) Unit number 1955 * object (IN) Accounting Object 1956 * Group_mode (IN) Group Mode 1957 * Stat_counter_id (OUT) Stat Counter Id 1958 * num_entries (OUT) Number of Counter entries created 1959 * Return Value: 1960 * BCM_E_XXX 1961 * Notes: 1962 */ 1963 int bcm_esw_stat_group_mode_id_config_get ( 1964 int unit, 1965 uint32 mode_id, 1966 bcm_stat_group_mode_id_config_t *stat_config, 1967 uint32 num_selectors, 1968 bcm_stat_group_mode_attr_selector_t *attr_sel, 1969 uint32 *actual_num_selectors) 1970 { 1971 #if defined(BCM_TOMAHAWK_SUPPORT) 1972 if (soc_feature(unit,soc_feature_advanced_flex_counter)) { 1973 return _bcm_esw_stat_group_mode_id_config_get(unit, mode_id, stat_config, 1974 num_selectors, attr_sel, actual_num_selectors); 1975 } 1976 #endif 1977 return BCM_E_UNAVAIL; 1978 } 1979 1980 /* 1981 * Function: 1982 * bcm_esw_stat_group_create 1983 * Description: 1984 * Reserve HW counter resources as per given group mode and acounting 1985 * object and make system ready for further stat collection action 1986 * 1987 * Parameters: 1988 * Unit (IN) Unit number 1989 * object (IN) Accounting Object 1990 * Group_mode (IN) Group Mode 1991 * Stat_counter_id (OUT) Stat Counter Id 1992 * num_entries (OUT) Number of Counter entries created 1993 * Return Value: 1994 * BCM_E_XXX 1995 * Notes: 1996 */ 1997 int bcm_esw_stat_group_create ( 1998 int unit, 1999 bcm_stat_object_t object, 2000 bcm_stat_group_mode_t group_mode, 2001 uint32 *stat_counter_id, 2002 uint32 *num_entries) 2003 { 2004 #if defined(BCM_KATANA_SUPPORT) || defined(BCM_TRIUMPH3_SUPPORT) 2005 if (soc_feature(unit,soc_feature_advanced_flex_counter)) { 2006 2007 #if defined(BCM_TOMAHAWK_SUPPORT) 2008 if (SOC_IS_TOMAHAWKX(unit) || SOC_IS_TRIDENT3X(unit)) { 2009 if (bcmStatObjectIngFieldStageIngress == object) { 2010 /* IFP flex stats for TH only supported 2011 * via field stat APIs 2012 */ 2013 return BCM_E_UNAVAIL; 2014 } 2015 #if defined(BCM_TOMAHAWK3_SUPPORT) 2016 if (SOC_IS_TOMAHAWK3(unit)) { 2017 switch (object) { 2018 case bcmStatObjectIngVlanXlate: 2019 case bcmStatObjectEgrVlanXlate: 2020 return BCM_E_UNAVAIL; 2021 default: 2022 break; 2023 } 2024 } 2025 #endif /* BCM_TOMAHAWK3_SUPPORT */ 2026 } 2027 #endif 2028 if(soc_feature(unit, soc_feature_flex_stat_compaction_support)) { 2029 return BCM_E_UNAVAIL; 2030 } else { 2031 return _bcm_esw_stat_group_create( 2032 unit, 2033 object, 2034 group_mode, 2035 stat_counter_id, 2036 num_entries); 2037 } 2038 } else 2039 #endif 2040 #if defined(BCM_TRIUMPH2_SUPPORT) || defined(BCM_TRIDENT_SUPPORT) 2041 if (soc_feature(unit,soc_feature_gport_service_counters)) { 2042 int i; 2043 int fs_index; 2044 struct obj2type_s { 2045 bcm_stat_object_t obj; 2046 _bcm_flex_stat_type_t fs_type; 2047 } obj2type[] = { 2048 {bcmStatObjectIngPort, _bcmFlexStatTypeGport}, 2049 {bcmStatObjectIngVlan, _bcmFlexStatTypeService}, 2050 {bcmStatObjectIngVlanXlate,_bcmFlexStatTypeVxlt}, 2051 {bcmStatObjectIngVfi, _bcmFlexStatTypeService}, 2052 {bcmStatObjectIngL3Intf, _bcmFlexStatTypeGport}, 2053 {bcmStatObjectIngVrf, _bcmFlexStatTypeVrf}, 2054 {bcmStatObjectIngPolicy, _bcmFlexStatTypeFp}, 2055 {bcmStatObjectIngMplsVcLabel, _bcmFlexStatTypeGport}, 2056 {bcmStatObjectIngMplsSwitchLabel,_bcmFlexStatTypeMplsLabel}, 2057 {bcmStatObjectEgrPort, _bcmFlexStatTypeEgressGport}, 2058 {bcmStatObjectEgrVlan, _bcmFlexStatTypeEgressService}, 2059 {bcmStatObjectEgrVlanXlate,_bcmFlexStatTypeEgrVxlt}, 2060 {bcmStatObjectEgrVfi, _bcmFlexStatTypeEgressService}, 2061 {bcmStatObjectEgrL3Intf, _bcmFlexStatTypeEgressGport} 2062 }; 2063 2064 if (group_mode != bcmStatGroupModeSingle) { 2065 return BCM_E_PARAM; 2066 } 2067 for (i = 0; i < OBJ_TYPE_NUM_ENTRIES; i++) { 2068 if (obj2type[i].obj == object) { 2069 break; 2070 } 2071 } 2072 if (i == OBJ_TYPE_NUM_ENTRIES) { 2073 return BCM_E_PARAM; 2074 } 2075 2076 fs_index = _bcm_esw_flex_stat_free_index_assign(unit, 2077 obj2type[i].fs_type); 2078 if (!fs_index) { 2079 return BCM_E_PARAM; 2080 } 2081 *stat_counter_id = _BCM_FLEX_STAT_COUNT_ID(obj2type[i].fs_type, 2082 fs_index); 2083 2084 *num_entries = 1; 2085 return BCM_E_NONE; 2086 } else 2087 #endif 2088 #if defined(BCM_HURRICANE3_SUPPORT) 2089 if (soc_feature(unit, soc_feature_flowcnt)) { 2090 return _bcm_esw_flowcnt_group_create( 2091 unit, 2092 object, 2093 group_mode, 2094 stat_counter_id, 2095 num_entries); 2096 } else 2097 #endif 2098 { 2099 return BCM_E_UNAVAIL; 2100 } 2101 } 2102 /* 2103 * Function: 2104 * bcm_esw_stat_group_destroy 2105 * Description: 2106 * Release HW counter resources as per given counter id and makes system 2107 * unavailable for any further stat collection action 2108 * Parameters: 2109 * unit - (IN) unit number 2110 * Stat_counter_id - (IN) Stat Counter Id 2111 * Return Value: 2112 * BCM_E_XXX 2113 * Notes: 2114 */ 2115 int bcm_esw_stat_group_destroy( 2116 int unit, 2117 uint32 stat_counter_id) 2118 { 2119 #if defined(BCM_KATANA_SUPPORT) || defined(BCM_TRIUMPH3_SUPPORT) 2120 if (soc_feature(unit,soc_feature_advanced_flex_counter)) { 2121 return _bcm_esw_stat_group_destroy(unit,stat_counter_id); 2122 } else 2123 #endif 2124 #if defined(BCM_TRIUMPH2_SUPPORT) || defined(BCM_TRIDENT_SUPPORT) 2125 if (soc_feature(unit,soc_feature_gport_service_counters)) { 2126 _bcm_flex_stat_type_t fs_type; 2127 uint32 fs_inx; 2128 2129 fs_type = _BCM_FLEX_STAT_TYPE(stat_counter_id); 2130 fs_inx = _BCM_FLEX_STAT_COUNT_INX(stat_counter_id); 2131 2132 return _bcm_esw_flex_stat_count_index_remove(unit,fs_type, 2133 fs_inx); 2134 } else 2135 #endif 2136 #if defined(BCM_HURRICANE3_SUPPORT) 2137 if (soc_feature(unit, soc_feature_flowcnt)) { 2138 return _bcm_esw_flowcnt_group_destroy(unit, stat_counter_id); 2139 2140 } else 2141 #endif 2142 { 2143 return BCM_E_UNAVAIL; 2144 } 2145 } 2146 2147 /* 2148 * Function: 2149 * bcm_esw_stat_id_get_all 2150 * Description: 2151 * Get all stat ids attached to the stat object. 2152 * Parameters: 2153 * unit - (IN) unit number 2154 * object - (IN) stat object 2155 * stat_max - (IN) max stat id count 2156 * stat_array - (OUT) array of stat ids 2157 * stat_count - (OUT) actual stat id count 2158 * Return Value: 2159 * BCM_E_XXX 2160 * Notes: 2161 */ 2162 int 2163 bcm_esw_stat_id_get_all( 2164 int unit, 2165 bcm_stat_object_t object, 2166 int stat_max, 2167 uint32 *stat_array, 2168 int *stat_count) 2169 { 2170 #if defined(BCM_KATANA_SUPPORT) || defined(BCM_TRIUMPH3_SUPPORT) 2171 if (soc_feature(unit,soc_feature_advanced_flex_counter)) { 2172 return _bcm_esw_stat_id_get_all( 2173 unit, 2174 object, 2175 stat_max, 2176 stat_array, 2177 stat_count); 2178 } 2179 #endif 2180 2181 return BCM_E_UNAVAIL; 2182 } 2183 2184 2185 2186 /* 2187 * Function: 2188 * bcm_stat_sync 2189 * Description: 2190 * Synchronize software counters with hardware 2191 * Parameters: 2192 * unit - StrataSwitch PCI device unit number (driver internal). 2193 * Returns: 2194 * BCM_E_NONE - Success. 2195 * BCM_E_INTERNAL - Chip access failure. 2196 * Notes: 2197 * Makes sure all counter hardware activity prior to the call to 2198 * bcm_stat_sync is reflected in all bcm_stat_get calls that come 2199 * after the call to bcm_stat_sync. 2200 */ 2201 2202 int 2203 bcm_esw_stat_sync(int unit) 2204 { 2205 2206 #if defined(BCM_WARM_BOOT_SUPPORT) && (defined(BCM_TRIUMPH3_SUPPORT) || \ 2207 defined(BCM_KATANA_SUPPORT) || defined(BCM_HURRICANE3_SUPPORT)) 2208 if (SOC_WARM_BOOT(unit)) { 2209 /* Sync WB stat overflow flags to scahe */ 2210 BCM_IF_ERROR_RETURN(_bcm_esw_stat_warm_boot_recover(unit)); 2211 } 2212 #endif /* BCM_TRIUMPH3_SUPPORT */ 2213 2214 #if defined(BCM_KATANA_SUPPORT) || defined(BCM_TRIUMPH3_SUPPORT) 2215 if (soc_feature(unit,soc_feature_advanced_flex_counter) && 2216 (!soc_feature(unit, soc_feature_centralized_counter))) { 2217 _bcm_esw_stat_flex_callback(unit); 2218 } 2219 #endif 2220 return soc_counter_sync(unit); 2221 } 2222 2223 /* 2224 * Function: 2225 * _bcm_esw_stat_custom_get 2226 * Description: 2227 * Return character name for specified stat value. 2228 * Parameters: 2229 * unit - StrataSwitch PCI device unit number (driver internal). 2230 * port - zero-based port number 2231 * sync_mode - if 1 read hw counter else sw accumualated counter 2232 * type - SNMP statistics type (see stat.h) 2233 * val - (OUT) 64 bit statistic counter value 2234 * Returns: 2235 * NULL - invalid SNMP varialble type. 2236 * !NULL - pointer to snmp variable name. 2237 */ 2238 STATIC int 2239 _bcm_esw_stat_custom_get_set(int unit, bcm_port_t port, 2240 int sync_mode, int stat_op, 2241 bcm_stat_val_t type, uint64 *val) 2242 { 2243 uint64 count; 2244 int reg_op = (stat_op == _BCM_STAT_GET)? _BCM_STAT_REG_ADD: 2245 _BCM_STAT_REG_CLEAR; 2246 2247 COMPILER_REFERENCE(&count); 2248 COMPILER_64_ZERO(count); 2249 2250 switch (type) { 2251 case snmpBcmCustomReceive0: 2252 if (SOC_REG_IS_VALID(unit, RDBGC0_64r)) { 2253 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, RDBGC0_64r, &count); 2254 } else { 2255 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, RDBGC0r, &count); 2256 } 2257 break; 2258 case snmpBcmCustomReceive1: 2259 if (SOC_REG_IS_VALID(unit, RDBGC1_64r)) { 2260 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, RDBGC1_64r, &count); 2261 } else { 2262 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, RDBGC1r, &count); 2263 } 2264 break; 2265 case snmpBcmCustomReceive2: 2266 if (SOC_REG_IS_VALID(unit, RDBGC2_64r)) { 2267 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, RDBGC2_64r, &count); 2268 } else { 2269 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, RDBGC2r, &count); 2270 } 2271 break; 2272 case snmpBcmCustomReceive3: 2273 if (SOC_REG_IS_VALID(unit, RDBGC3_64r)) { 2274 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, RDBGC3_64r, &count); 2275 } else { 2276 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, RDBGC3r, &count); 2277 } 2278 break; 2279 case snmpBcmCustomReceive4: 2280 if (SOC_REG_IS_VALID(unit, RDBGC4_64r)) { 2281 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, RDBGC4_64r, &count); 2282 } else { 2283 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, RDBGC4r, &count); 2284 } 2285 break; 2286 case snmpBcmCustomReceive5: 2287 if (SOC_REG_IS_VALID(unit, RDBGC5_64r)) { 2288 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, RDBGC5_64r, &count); 2289 } else { 2290 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, RDBGC5r, &count); 2291 } 2292 break; 2293 case snmpBcmCustomReceive6: 2294 if (SOC_REG_IS_VALID(unit, RDBGC6_64r)) { 2295 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, RDBGC6_64r, &count); 2296 } else { 2297 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, RDBGC6r, &count); 2298 } 2299 break; 2300 case snmpBcmCustomReceive7: 2301 if (SOC_REG_IS_VALID(unit, RDBGC7_64r)) { 2302 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, RDBGC7_64r, &count); 2303 } else { 2304 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, RDBGC7r, &count); 2305 } 2306 break; 2307 case snmpBcmCustomReceive8: 2308 if (SOC_REG_IS_VALID(unit, RDBGC8_64r)) { 2309 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, RDBGC8_64r, &count); 2310 } else { 2311 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, RDBGC8r, &count); 2312 } 2313 break; 2314 case snmpBcmCustomTransmit0: 2315 if (SOC_REG_IS_VALID(unit, TDBGC0_64r)) { 2316 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC0_64r, &count); 2317 } else { 2318 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC0r, &count); 2319 } 2320 break; 2321 case snmpBcmCustomTransmit1: 2322 if (SOC_REG_IS_VALID(unit, TDBGC1_64r)) { 2323 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC1_64r, &count); 2324 } else { 2325 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC1r, &count); 2326 } 2327 break; 2328 case snmpBcmCustomTransmit2: 2329 if (SOC_REG_IS_VALID(unit, TDBGC2_64r)) { 2330 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC2_64r, &count); 2331 } else { 2332 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC2r, &count); 2333 } 2334 break; 2335 case snmpBcmCustomTransmit3: 2336 if (SOC_REG_IS_VALID(unit, TDBGC3_64r)) { 2337 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC3_64r, &count); 2338 } else { 2339 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC3r, &count); 2340 } 2341 break; 2342 case snmpBcmCustomTransmit4: 2343 if (SOC_REG_IS_VALID(unit, TDBGC4_64r)) { 2344 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC4_64r, &count); 2345 } else { 2346 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC4r, &count); 2347 } 2348 break; 2349 case snmpBcmCustomTransmit5: 2350 if (SOC_REG_IS_VALID(unit, TDBGC5_64r)) { 2351 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC5_64r, &count); 2352 } else { 2353 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC5r, &count); 2354 } 2355 break; 2356 case snmpBcmCustomTransmit6: 2357 if (SOC_REG_IS_VALID(unit, TDBGC6_64r)) { 2358 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC6_64r, &count); 2359 } else { 2360 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC6r, &count); 2361 } 2362 break; 2363 case snmpBcmCustomTransmit7: 2364 if (SOC_REG_IS_VALID(unit, TDBGC7_64r)) { 2365 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC7_64r, &count); 2366 } else { 2367 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC7r, &count); 2368 } 2369 break; 2370 case snmpBcmCustomTransmit8: 2371 if (SOC_REG_IS_VALID(unit, TDBGC8_64r)) { 2372 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC8_64r, &count); 2373 } else { 2374 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC8r, &count); 2375 } 2376 break; 2377 case snmpBcmCustomTransmit9: 2378 if (SOC_REG_IS_VALID(unit, TDBGC9_64r)) { 2379 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC9_64r, &count); 2380 } else { 2381 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC9r, &count); 2382 } 2383 break; 2384 case snmpBcmCustomTransmit10: 2385 if (SOC_REG_IS_VALID(unit, TDBGC10_64r)) { 2386 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC10_64r, &count); 2387 } else { 2388 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC10r, &count); 2389 } 2390 break; 2391 case snmpBcmCustomTransmit11: 2392 if (SOC_REG_IS_VALID(unit, TDBGC11_64r)) { 2393 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC11_64r, &count); 2394 } else { 2395 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC11r, &count); 2396 } 2397 break; 2398 case snmpBcmCustomTransmit12: 2399 if (SOC_REG_IS_VALID(unit, TDBGC12_64r)) { 2400 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC12_64r, &count); 2401 } 2402 break; 2403 case snmpBcmCustomTransmit13: 2404 if (SOC_REG_IS_VALID(unit, TDBGC13_64r)) { 2405 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC13_64r, &count); 2406 } 2407 break; 2408 case snmpBcmCustomTransmit14: 2409 if (SOC_REG_IS_VALID(unit, TDBGC14_64r)) { 2410 BCM_STAT_REG_OPER(unit, port, sync_mode, reg_op, TDBGC14_64r, &count); 2411 } 2412 break; 2413 default: 2414 return BCM_E_PARAM; 2415 } 2416 if (stat_op == _BCM_STAT_GET) { 2417 *val = count; 2418 } 2419 return BCM_E_NONE; 2420 } 2421 2422 /* 2423 * Function: 2424 * _bcm_system_level_stat_get_set 2425 * Description: 2426 * Get or clear specified stat value. 2427 * Parameters: 2428 * unit - StrataSwitch PCI device unit number (driver internal). 2429 * sync_mode - if 1 read hw counter else sw accumualated counter 2430 * stat_op - Stat operation descriptor 2431 * type - SNMP statistics type (see stat.h) 2432 * val - (OUT) 64 bit statistic counter value 2433 * Returns: 2434 * BCM_E_XXX 2435 */ 2436 STATIC int 2437 _bcm_system_level_stat_get_set(int unit, int sync_mode, int stat_op, 2438 bcm_stat_val_t type, uint64 *val) 2439 { 2440 int (*counter_get) (int , soc_port_t , soc_reg_t , int , uint64 *); 2441 uint64 val64_zero; 2442 2443 COMPILER_64_ZERO(val64_zero); 2444 counter_get = (sync_mode == 1)? soc_counter_sync_get:soc_counter_get; 2445 switch (type) { 2446 case snmpBcmE2EHOLDropPkts: 2447 if (stat_op == _BCM_STAT_GET) { 2448 BCM_IF_ERROR_RETURN(counter_get(unit, -1, 2449 SOC_COUNTER_NON_DMA_E2E_DROP_COUNT, 0, val)); 2450 } else if (stat_op == _BCM_STAT_CLEAR) { 2451 BCM_IF_ERROR_RETURN(soc_counter_set(unit, 0, 2452 SOC_COUNTER_NON_DMA_E2E_DROP_COUNT, 0, 2453 val64_zero)); 2454 } 2455 break; 2456 default: 2457 /* To be consistent with return type of 2458 * _bcm_esw_stat_gport_validate */ 2459 return BCM_E_PORT; 2460 } 2461 return BCM_E_NONE; 2462 } 2463 2464 /* 2465 * Function: 2466 * _bcm_esw_stat_get_set 2467 * Description: 2468 * Get/Set the specified statistic from the StrataSwitch 2469 * Parameters: 2470 * unit - StrataSwitch PCI device unit number (driver internal). 2471 * port - zero-based port number 2472 * sync_mode - zero-based port number 2473 * stat_op - indicates stat get or clear(set) operation 2474 * type - SNMP statistics type (see stat.h) 2475 * val - (OUT) 64-bit counter value. 2476 * Returns: 2477 * BCM_E_NONE - Success. 2478 * BCM_E_PARAM - Illegal parameter. 2479 * BCM_E_BADID - Illegal port number. 2480 * BCM_E_INTERNAL - Chip access failure. 2481 * BCM_E_UNAVAIL - Counter/variable is not implemented 2482 * on this current chip. 2483 * Notes: 2484 * Some counters are implemented on a given port only when it is 2485 * operating in a specific mode, for example, 10 or 100, and not 2486 * 1000. If the counter is not implemented on a given port, OR, 2487 * on the port given its current operating mode, BCM_E_UNAVAIL 2488 * is returned. 2489 */ 2490 2491 int 2492 _bcm_esw_stat_get_set(int unit, bcm_port_t port, 2493 int sync_mode, int stat_op, 2494 bcm_stat_val_t type, uint64 *val) 2495 { 2496 int rv, rv1; 2497 soc_mac_mode_t mode; 2498 2499 if ((val == NULL) && (stat_op != _BCM_STAT_CLEAR)) { 2500 return BCM_E_PARAM; 2501 } 2502 2503 if (port == BCM_GPORT_INVALID) { 2504 return _bcm_system_level_stat_get_set(unit, sync_mode, 2505 stat_op, type, val); 2506 } 2507 2508 BCM_IF_ERROR_RETURN( 2509 _bcm_esw_stat_gport_validate(unit, port, &port)); 2510 2511 if (soc_feature(unit, soc_feature_stat_xgs3)) { 2512 rv = _bcm_esw_stat_custom_get_set(unit, port, sync_mode, 2513 stat_op, type, val); 2514 if (BCM_E_PARAM != rv) { 2515 return rv; 2516 } 2517 } 2518 2519 if (port == CMIC_PORT(unit)) { 2520 /* Rudimentary CPU statistics -- needs work */ 2521 switch (type) { 2522 case snmpIfInOctets: 2523 if (stat_op == _BCM_STAT_GET) { 2524 COMPILER_64_SET(*val, 0, SOC_CONTROL(unit)->stat.dma_rbyt); 2525 } else { 2526 SOC_CONTROL(unit)->stat.dma_rbyt = 0; 2527 } 2528 break; 2529 case snmpIfInUcastPkts: 2530 if (stat_op == _BCM_STAT_GET) { 2531 COMPILER_64_SET(*val, 0, SOC_CONTROL(unit)->stat.dma_rpkt); 2532 } else { 2533 SOC_CONTROL(unit)->stat.dma_rpkt = 0; 2534 } 2535 break; 2536 case snmpIfOutOctets: 2537 if (stat_op == _BCM_STAT_GET) { 2538 COMPILER_64_SET(*val, 0, SOC_CONTROL(unit)->stat.dma_tbyt); 2539 } else { 2540 SOC_CONTROL(unit)->stat.dma_tbyt = 0; 2541 } 2542 break; 2543 case snmpIfOutUcastPkts: 2544 if (stat_op == _BCM_STAT_GET) { 2545 COMPILER_64_SET(*val, 0, SOC_CONTROL(unit)->stat.dma_tpkt); 2546 } else { 2547 SOC_CONTROL(unit)->stat.dma_tpkt = 0; 2548 } 2549 break; 2550 default: 2551 if (stat_op == _BCM_STAT_GET) { 2552 COMPILER_64_ZERO(*val); 2553 } 2554 /* Try to get cpu hw counter */ 2555 if (soc_feature(unit, soc_feature_generic_counters)) { 2556 if (SOC_IS_TD_TT(unit)) { 2557 return _bcm_stat_generic_get_set(unit, port, sync_mode, 2558 stat_op, type, val); 2559 } 2560 } 2561 break; 2562 } 2563 return (BCM_E_NONE); 2564 } 2565 2566 if (soc_feature(unit, soc_feature_generic_counters)) { 2567 #ifdef BCM_KATANA_SUPPORT 2568 if (SOC_IS_KATANA(unit)) { 2569 if(IS_MXQ_PORT(unit, port)) { 2570 return _bcm_stat_generic_get_set(unit, port, sync_mode, 2571 stat_op, type, val); 2572 } else if(IS_GE_PORT(unit, port) || IS_FE_PORT(unit, port)) { 2573 return (_bcm_stat_ge_get_set(unit, port, sync_mode, stat_op, 2574 type, val, TRUE)); 2575 } 2576 } else 2577 #endif 2578 #ifdef BCM_HURRICANE2_SUPPORT 2579 if (SOC_IS_HURRICANE2(unit) || SOC_IS_GREYHOUND(unit) || 2580 SOC_IS_HURRICANE3(unit)) { 2581 if(IS_XL_PORT(unit, port)) { 2582 return _bcm_stat_generic_get_set(unit, port, sync_mode, 2583 stat_op, type, val); 2584 } else if(IS_GE_PORT(unit, port) || IS_FE_PORT(unit, port)) { 2585 return (_bcm_stat_ge_get_set(unit, port, sync_mode, stat_op, 2586 type, val, TRUE)); 2587 } 2588 } else 2589 #endif 2590 #ifdef BCM_SABER2_SUPPORT 2591 if (SOC_IS_SABER2(unit)) { 2592 if (IS_MXQ_PORT(unit, port)) { 2593 return _bcm_stat_mxq_get_set(unit, port, sync_mode, 2594 stat_op, type, val); 2595 } else { 2596 return _bcm_stat_generic_get_set(unit, port, sync_mode, 2597 stat_op, type, val); 2598 } 2599 } else 2600 #endif 2601 #ifdef BCM_HELIX5_SUPPORT 2602 if (SOC_IS_HELIX5(unit) && IS_QSGMII_PORT(unit, port)) { 2603 return _bcm_stat_ge_get_set(unit, port, sync_mode, stat_op, 2604 type, val, TRUE); 2605 } else 2606 #endif 2607 { 2608 if (soc_feature(unit, soc_feature_preempt_mib_support) 2609 && SOC_IS_MONTEREY(unit)) { 2610 return bcmi_stat_preempt_get_set(unit, port, sync_mode, 2611 stat_op, type, val); 2612 } 2613 return _bcm_stat_generic_get_set(unit, port, sync_mode, 2614 stat_op, type, val); 2615 } 2616 } 2617 2618 /* For ports which have preempt mib counters support */ 2619 if (soc_feature(unit, soc_feature_preempt_mib_support)) { 2620 if (IS_XL_PORT(unit, port)) { 2621 return bcmi_stat_preempt_xl_get_set(unit, port, sync_mode, 2622 stat_op, type, val); 2623 } else if (IS_GE_PORT(unit, port)) { 2624 return (bcmi_stat_preempt_ge_get_set(unit, port, sync_mode, stat_op, 2625 type, val, TRUE)); 2626 } 2627 } 2628 2629 /* CLMIB counters support for CL port */ 2630 if (soc_feature(unit, soc_feature_clmib_support)) { 2631 if (IS_CL_PORT(unit, port)) { 2632 return bcmi_stat_clmib_get_set(unit, port, sync_mode, 2633 stat_op, type, val); 2634 } 2635 } 2636 2637 /* For xgs3 gig ports, always use gig get function */ 2638 if ((IS_FE_PORT(unit, port) && (soc_feature(unit, soc_feature_trimac) 2639 || soc_feature(unit, soc_feature_unimac))) || 2640 (SOC_IS_XGS3_SWITCH(unit) && IS_GE_PORT(unit, port))) { 2641 return (_bcm_stat_ge_get_set(unit, port, sync_mode, stat_op, 2642 type, val, TRUE)); 2643 } 2644 2645 SOC_IF_ERROR_RETURN(soc_mac_mode_get(unit, port, &mode)); 2646 2647 switch (mode) { 2648 case SOC_MAC_MODE_10_100: 2649 return (_bcm_stat_fe_get_set(unit, port, sync_mode, 2650 stat_op, type, val)); 2651 case SOC_MAC_MODE_1000_T: 2652 return (_bcm_stat_ge_get_set(unit, port, sync_mode, stat_op, 2653 type, val, TRUE)); 2654 case SOC_MAC_MODE_10000: 2655 if (IS_XE_PORT(unit, port)) { 2656 rv = _bcm_stat_xe_get_set(unit, port, sync_mode, 2657 stat_op, type, val); 2658 if((rv != BCM_E_NONE) && (rv != BCM_E_UNAVAIL)) { 2659 return rv; 2660 } 2661 if (IS_XQ_PORT(unit, port)) { 2662 return rv; 2663 } else if (IS_GX_PORT(unit, port)) { 2664 uint64 val1; 2665 rv1 = _bcm_stat_ge_get_set(unit, port, sync_mode, 2666 stat_op, type, 2667 &val1, FALSE); 2668 if((rv1 != BCM_E_NONE) && (rv1 != BCM_E_UNAVAIL)) { 2669 return rv1; 2670 } 2671 if ((rv == BCM_E_UNAVAIL) && (rv1 == BCM_E_UNAVAIL)) { 2672 return BCM_E_UNAVAIL; 2673 } 2674 if (stat_op == _BCM_STAT_GET) { 2675 COMPILER_64_ADD_64(*val, val1); 2676 } 2677 } 2678 return SOC_E_NONE; 2679 } else { 2680 return (_bcm_stat_hg_get_set(unit, port, sync_mode, 2681 stat_op, type, val)); 2682 } 2683 default: 2684 assert(0); 2685 } 2686 2687 return(BCM_E_NONE); 2688 } 2689 2690 /* 2691 * Function: 2692 * bcm_stat_get 2693 * Description: 2694 * Get the specified statistic from the StrataSwitch 2695 * Parameters: 2696 * unit - StrataSwitch PCI device unit number (driver internal). 2697 * port - zero-based port number 2698 * type - SNMP statistics type (see stat.h) 2699 * val - (OUT) 64-bit counter value. 2700 * Returns: 2701 * BCM_E_NONE - Success. 2702 * BCM_E_PARAM - Illegal parameter. 2703 * BCM_E_BADID - Illegal port number. 2704 * BCM_E_INTERNAL - Chip access failure. 2705 * BCM_E_UNAVAIL - Counter/variable is not implemented 2706 * on this current chip. 2707 * Notes: 2708 * Some counters are implemented on a given port only when it is 2709 * operating in a specific mode, for example, 10 or 100, and not 2710 * 1000. If the counter is not implemented on a given port, OR, 2711 * on the port given its current operating mode, BCM_E_UNAVAIL 2712 * is returned. 2713 */ 2714 2715 int 2716 _bcm_esw_stat_get(int unit, bcm_port_t port, int sync_mode, 2717 bcm_stat_val_t type, uint64 *val) 2718 { 2719 return (_bcm_esw_stat_get_set(unit, port, sync_mode, 2720 _BCM_STAT_GET, type, val)); 2721 } 2722 2723 2724 /* 2725 * Function: 2726 * bcm_stat_get 2727 * Description: 2728 * Get the specified statistic from the StrataSwitch 2729 * Parameters: 2730 * unit - StrataSwitch PCI device unit number (driver internal). 2731 * port - zero-based port number 2732 * type - SNMP statistics type (see stat.h) 2733 * val - (OUT) 64-bit counter value. 2734 * Returns: 2735 * BCM_E_NONE - Success. 2736 * BCM_E_PARAM - Illegal parameter. 2737 * BCM_E_BADID - Illegal port number. 2738 * BCM_E_INTERNAL - Chip access failure. 2739 * BCM_E_UNAVAIL - Counter/variable is not implemented 2740 * on this current chip. 2741 * Notes: 2742 * Some counters are implemented on a given port only when it is 2743 * operating in a specific mode, for example, 10 or 100, and not 2744 * 1000. If the counter is not implemented on a given port, OR, 2745 * on the port given its current operating mode, BCM_E_UNAVAIL 2746 * is returned. 2747 */ 2748 2749 int 2750 bcm_esw_stat_get(int unit, bcm_port_t port, bcm_stat_val_t type, uint64 *val) 2751 { 2752 /* read software accumulated counters */ 2753 return _bcm_esw_stat_get(unit, port, 0, type, val); 2754 } 2755 2756 2757 /* 2758 * Function: 2759 * bcm_stat_get32 2760 * Description: 2761 * Get the specified statistic from the StrataSwitch 2762 * Parameters: 2763 * unit - StrataSwitch PCI device unit number (driver internal). 2764 * port - zero-based port number 2765 * type - SNMP statistics type (see stat.h) 2766 * val - (OUT) 32-bit counter value. 2767 * Returns: 2768 * BCM_E_NONE - Success. 2769 * BCM_E_PARAM - Illegal parameter. 2770 * BCM_E_BADID - Illegal port number. 2771 * BCM_E_INTERNAL - Chip access failure. 2772 * Notes: 2773 * Same as bcm_stat_get, except converts result to 32-bit. 2774 */ 2775 2776 int 2777 bcm_esw_stat_get32(int unit, bcm_port_t port, bcm_stat_val_t type, uint32 *val) 2778 { 2779 int rv; 2780 uint64 val64; 2781 2782 rv = bcm_esw_stat_get(unit, port, type, &val64); 2783 2784 COMPILER_64_TO_32_LO(*val, val64); 2785 2786 return(rv); 2787 } 2788 2789 /* 2790 * Function: 2791 * bcm_esw_stat_multi_get 2792 * Purpose: 2793 * Get the specified statistics from the device. 2794 * Parameters: 2795 * unit - (IN) Unit number. 2796 * port - (IN) <UNDEF> 2797 * nstat - (IN) Number of elements in stat array 2798 * stat_arr - (IN) Array of SNMP statistics types defined in bcm_stat_val_t 2799 * value_arr - (OUT) Collected statistics values 2800 * Returns: 2801 * BCM_E_xxx 2802 * Notes: 2803 */ 2804 int 2805 bcm_esw_stat_multi_get(int unit, bcm_port_t port, int nstat, 2806 bcm_stat_val_t *stat_arr, uint64 *value_arr) 2807 { 2808 int stix; 2809 2810 if (nstat <= 0) { 2811 return BCM_E_PARAM; 2812 } 2813 2814 if ((NULL == stat_arr) || (NULL == value_arr)) { 2815 return BCM_E_PARAM; 2816 } 2817 2818 for (stix = 0; stix < nstat; stix++) { 2819 BCM_IF_ERROR_RETURN 2820 (bcm_esw_stat_get(unit, port, stat_arr[stix], 2821 &(value_arr[stix]))); 2822 } 2823 2824 return BCM_E_NONE; 2825 } 2826 2827 /* 2828 * Function: 2829 * bcm_esw_stat_multi_get32 2830 * Purpose: 2831 * Get the specified statistics from the device. The 64-bit 2832 * values may be truncated to fit. 2833 * Parameters: 2834 * unit - (IN) Unit number. 2835 * port - (IN) <UNDEF> 2836 * nstat - (IN) Number of elements in stat array 2837 * stat_arr - (IN) Array of SNMP statistics types defined in bcm_stat_val_t 2838 * value_arr - (OUT) Collected 32-bit statistics values 2839 * Returns: 2840 * BCM_E_xxx 2841 * Notes: 2842 */ 2843 int 2844 bcm_esw_stat_multi_get32(int unit, bcm_port_t port, int nstat, 2845 bcm_stat_val_t *stat_arr, uint32 *value_arr) 2846 { 2847 int stix; 2848 2849 if (nstat <= 0) { 2850 return BCM_E_PARAM; 2851 } 2852 2853 if ((NULL == stat_arr) || (NULL == value_arr)) { 2854 return BCM_E_PARAM; 2855 } 2856 2857 for (stix = 0; stix < nstat; stix++) { 2858 BCM_IF_ERROR_RETURN 2859 (bcm_esw_stat_get32(unit, port, stat_arr[stix], 2860 &(value_arr[stix]))); 2861 } 2862 2863 return BCM_E_NONE; 2864 } 2865 2866 /* 2867 * Function: 2868 * bcm_stat_sync_get 2869 * Description: 2870 * Get the specified statistic from the StrataSwitch 2871 * Parameters: 2872 * unit - StrataSwitch PCI device unit number (driver internal). 2873 * port - zero-based port number 2874 * type - SNMP statistics type (see stat.h) 2875 * val - (OUT) 64-bit counter value. 2876 * Returns: 2877 * BCM_E_NONE - Success. 2878 * BCM_E_PARAM - Illegal parameter. 2879 * BCM_E_BADID - Illegal port number. 2880 * BCM_E_INTERNAL - Chip access failure. 2881 * BCM_E_UNAVAIL - Counter/variable is not implemented 2882 * on this current chip. 2883 * Notes: 2884 * Some counters are implemented on a given port only when it is 2885 * operating in a specific mode, for example, 10 or 100, and not 2886 * 1000. If the counter is not implemented on a given port, OR, 2887 * on the port given its current operating mode, BCM_E_UNAVAIL 2888 * is returned. 2889 */ 2890 2891 int 2892 bcm_esw_stat_sync_get(int unit, bcm_port_t port, 2893 bcm_stat_val_t type, uint64 *val) 2894 { 2895 /* read counter from the device */ 2896 return _bcm_esw_stat_get(unit, port, 1, type, val); 2897 } 2898 2899 2900 /* 2901 * Function: 2902 * bcm_stat_sync_get32 2903 * Description: 2904 * Get the specified statistic from the StrataSwitch 2905 * Parameters: 2906 * unit - StrataSwitch PCI device unit number (driver internal). 2907 * port - zero-based port number 2908 * type - SNMP statistics type (see stat.h) 2909 * val - (OUT) 32-bit counter value. 2910 * Returns: 2911 * BCM_E_NONE - Success. 2912 * BCM_E_PARAM - Illegal parameter. 2913 * BCM_E_BADID - Illegal port number. 2914 * BCM_E_INTERNAL - Chip access failure. 2915 * Notes: 2916 * Same as bcm_stat_get, except converts result to 32-bit. 2917 */ 2918 2919 int 2920 bcm_esw_stat_sync_get32(int unit, bcm_port_t port, 2921 bcm_stat_val_t type, uint32 *val) 2922 { 2923 int rv; 2924 uint64 val64; 2925 2926 rv = bcm_esw_stat_sync_get(unit, port, type, &val64); 2927 2928 COMPILER_64_TO_32_LO(*val, val64); 2929 2930 return(rv); 2931 } 2932 2933 /* 2934 * Function: 2935 * bcm_esw_stat_sync_multi_get 2936 * Purpose: 2937 * Get the specified statistics from the device. 2938 * Parameters: 2939 * unit - (IN) Unit number. 2940 * port - (IN) <UNDEF> 2941 * nstat - (IN) Number of elements in stat array 2942 * stat_arr - (IN) Array of SNMP statistics types defined in bcm_stat_val_t 2943 * value_arr - (OUT) Collected statistics values 2944 * Returns: 2945 * BCM_E_xxx 2946 * Notes: 2947 */ 2948 int 2949 bcm_esw_stat_sync_multi_get(int unit, bcm_port_t port, int nstat, 2950 bcm_stat_val_t *stat_arr, uint64 *value_arr) 2951 { 2952 int stix; 2953 2954 if (nstat <= 0) { 2955 return BCM_E_PARAM; 2956 } 2957 2958 if ((NULL == stat_arr) || (NULL == value_arr)) { 2959 return BCM_E_PARAM; 2960 } 2961 2962 for (stix = 0; stix < nstat; stix++) { 2963 BCM_IF_ERROR_RETURN 2964 (bcm_esw_stat_sync_get(unit, port, stat_arr[stix], 2965 &(value_arr[stix]))); 2966 } 2967 2968 return BCM_E_NONE; 2969 } 2970 2971 /* 2972 * Function: 2973 * bcm_esw_stat_sync_multi_get32 2974 * Purpose: 2975 * Get the specified statistics from the device. The 64-bit 2976 * values may be truncated to fit. 2977 * Parameters: 2978 * unit - (IN) Unit number. 2979 * port - (IN) <UNDEF> 2980 * nstat - (IN) Number of elements in stat array 2981 * stat_arr - (IN) Array of SNMP statistics types defined in bcm_stat_val_t 2982 * value_arr - (OUT) Collected 32-bit statistics values 2983 * Returns: 2984 * BCM_E_xxx 2985 * Notes: 2986 */ 2987 int 2988 bcm_esw_stat_sync_multi_get32(int unit, bcm_port_t port, 2989 int nstat, bcm_stat_val_t *stat_arr, 2990 uint32 *value_arr) 2991 { 2992 int stix; 2993 2994 if (nstat <= 0) { 2995 return BCM_E_PARAM; 2996 } 2997 2998 if ((NULL == stat_arr) || (NULL == value_arr)) { 2999 return BCM_E_PARAM; 3000 } 3001 3002 for (stix = 0; stix < nstat; stix++) { 3003 BCM_IF_ERROR_RETURN 3004 (bcm_esw_stat_sync_get32(unit, port, stat_arr[stix], 3005 &(value_arr[stix]))); 3006 } 3007 3008 return BCM_E_NONE; 3009 } 3010 3011 /* 3012 * Function: 3013 * bcm_esw_stat_direct_get 3014 * Description: 3015 * Get the specified statistic from the StrataSwitch 3016 * Parameters: 3017 * unit - StrataSwitch PCI device unit number (driver internal). 3018 * port - zero-based port number 3019 * type - SNMP statistics type (see stat.h) 3020 * val - (OUT) 64-bit counter value. 3021 * Returns: 3022 * BCM_E_NONE - Success. 3023 * BCM_E_PARAM - Illegal parameter. 3024 * BCM_E_BADID - Illegal port number. 3025 * BCM_E_INTERNAL - Chip access failure. 3026 * BCM_E_UNAVAIL - Counter/variable is not implemented 3027 * on this current chip. 3028 * Notes: 3029 * Hardware counter value will be fetched and returned. 3030 * Software counter cache will not be updated. 3031 * Only RxPFCFrameXXX stat types are currently supported. 3032 */ 3033 3034 int 3035 bcm_esw_stat_direct_get(int unit, bcm_port_t port, 3036 bcm_stat_val_t type, uint64 *val) 3037 { 3038 int rv = BCM_E_UNAVAIL; 3039 3040 #if defined(BCM_TRIDENT2_SUPPORT) || defined(BCM_TRIDENT2PLUS_SUPPORT) || \ 3041 defined(BCM_TRIDENT3_SUPPORT) || \ 3042 defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TOMAHAWK2_SUPPORT) || \ 3043 defined(BCM_TOMAHAWK3_SUPPORT) 3044 if (SOC_IS_TRIDENT2(unit) || SOC_IS_TRIDENT2PLUS(unit) || 3045 SOC_IS_TRIDENT3(unit) || 3046 SOC_IS_TOMAHAWK(unit) || SOC_IS_TOMAHAWK2(unit) || 3047 SOC_IS_TOMAHAWK3(unit)) { 3048 if (!((type >= snmpBcmRxPFCFrameXonPriority0) && 3049 (type <= snmpBcmRxPFCFramePriority7))) { 3050 return BCM_E_UNAVAIL; 3051 } 3052 /* read counter from the device */ 3053 rv = _bcm_esw_stat_get(unit, port, _BCM_SYNC_MODE_NO_CACHE, type, val); 3054 } 3055 #endif /* BCM_TRIDENT2_SUPPORT and other applied devices */ 3056 3057 return rv; 3058 } 3059 3060 /* 3061 * Function: 3062 * bcm_esw_stat_direct_multi_get 3063 * Purpose: 3064 * Get the specified statistics from the device. 3065 * Parameters: 3066 * unit - (IN) Unit number. 3067 * port - (IN) Port number 3068 * nstat - (IN) Number of elements in stat array 3069 * stat_arr - (IN) Array of SNMP statistics types defined in bcm_stat_val_t 3070 * value_arr - (OUT) Collected statistics values 3071 * Returns: 3072 * BCM_E_xxx 3073 * Notes: 3074 */ 3075 int 3076 bcm_esw_stat_direct_multi_get(int unit, bcm_port_t port, int nstat, 3077 bcm_stat_val_t *stat_arr, uint64 *value_arr) 3078 { 3079 int stix; 3080 3081 if (nstat <= 0) { 3082 return BCM_E_PARAM; 3083 } 3084 3085 if ((NULL == stat_arr) || (NULL == value_arr)) { 3086 return BCM_E_PARAM; 3087 } 3088 3089 for (stix = 0; stix < nstat; stix++) { 3090 BCM_IF_ERROR_RETURN 3091 (bcm_esw_stat_direct_get(unit, port, stat_arr[stix], 3092 &(value_arr[stix]))); 3093 } 3094 3095 return BCM_E_NONE; 3096 } 3097 3098 /* 3099 * Function: 3100 * bcm_stat_clear 3101 * Description: 3102 * Clear the port based statistics from the StrataSwitch port. 3103 * Parameters: 3104 * unit - StrataSwitch PCI device unit number (driver internal). 3105 * port - zero-based port number 3106 * Returns: 3107 * BCM_E_NONE - Success. 3108 * BCM_E_INTERNAL - Chip access failure. 3109 */ 3110 3111 int 3112 bcm_esw_stat_clear(int unit, bcm_port_t port) 3113 { 3114 soc_reg_t reg; 3115 pbmp_t pbm; 3116 int i; 3117 3118 #ifdef BCM_KATANA2_SUPPORT 3119 /* Allow only physical ports */ 3120 #if defined BCM_METROLITE_SUPPORT 3121 if (soc_feature(unit, soc_feature_discontinuous_pp_port)) { 3122 if (_SOC_IS_PP_PORT_LINKPHY_SUBTAG(unit, port) && 3123 !_SOC_IS_PORT_LINKPHY_SUBTAG(unit, port)) { 3124 return (BCM_E_PORT); 3125 } 3126 } else 3127 #endif 3128 { 3129 if (soc_feature(unit, soc_feature_linkphy_coe)) { 3130 if (_BCM_KT2_GPORT_IS_LINKPHY_SUBPORT_PORT(unit, port) || 3131 _BCM_KT2_GPORT_IS_LINKPHY_SUBPORT_GROUP(port)) { 3132 return (BCM_E_PORT); 3133 } 3134 } 3135 3136 if (soc_feature(unit, soc_feature_subtag_coe)) { 3137 if (_BCM_KT2_GPORT_IS_SUBTAG_SUBPORT_PORT(unit, port) || 3138 _BCM_KT2_GPORT_IS_SUBTAG_SUBPORT_GROUP(port)) { 3139 return (BCM_E_PORT); 3140 } 3141 } 3142 } 3143 #endif 3144 3145 BCM_IF_ERROR_RETURN( 3146 _bcm_esw_stat_gport_validate(unit, port, &port)); 3147 3148 if (port == CMIC_PORT(unit)) { 3149 /* Rudimentary CPU statistics -- needs work */ 3150 SOC_CONTROL(unit)->stat.dma_rbyt = 0; 3151 SOC_CONTROL(unit)->stat.dma_rpkt = 0; 3152 SOC_CONTROL(unit)->stat.dma_tbyt = 0; 3153 SOC_CONTROL(unit)->stat.dma_tpkt = 0; 3154 3155 /* Clear CPU HW counter, only work for TD_TT series chips now */ 3156 if (soc_feature(unit, soc_feature_generic_counters)) { 3157 if (SOC_IS_TD_TT(unit)) { 3158 goto clear_hw_counter; 3159 } 3160 } 3161 return (BCM_E_NONE); 3162 } 3163 3164 clear_hw_counter: 3165 SOC_PBMP_CLEAR(pbm); 3166 SOC_PBMP_PORT_ADD(pbm, port); 3167 BCM_IF_ERROR_RETURN(soc_counter_set32_by_port(unit, pbm, 0)); 3168 3169 if (NULL != _bcm_stat_extra_counters) { 3170 for (i = 0; i < _BCM_STAT_EXTRA_COUNTER_COUNT; i++) { 3171 reg = _bcm_stat_extra_counters[unit][i].reg; 3172 if (reg == INVALIDr) { 3173 continue; 3174 } 3175 if (SOC_REG_INFO(unit, reg).regtype != soc_portreg) { 3176 continue; 3177 } 3178 COMPILER_64_ZERO(_bcm_stat_extra_counters[unit][i].count64[port]); 3179 } 3180 } 3181 3182 return(BCM_E_NONE); 3183 } 3184 3185 /* 3186 * Function: 3187 * bcm_stat_clear_single 3188 * Description: 3189 * Clear the port based statistics from the StrataSwitch port. 3190 * Parameters: 3191 * unit - StrataSwitch PCI device unit number (driver internal). 3192 * port - zero-based port number 3193 * Returns: 3194 * BCM_E_NONE - Success. 3195 * BCM_E_INTERNAL - Chip access failure. 3196 */ 3197 3198 int 3199 bcm_esw_stat_clear_single(int unit, bcm_port_t port, bcm_stat_val_t stat_id) 3200 { 3201 return (_bcm_esw_stat_get_set(unit, port, 0, 3202 _BCM_STAT_CLEAR, stat_id, NULL)); 3203 } 3204 3205 #ifdef BCM_XGS3_SWITCH_SUPPORT 3206 #define _DBG_CNTR_IS_VALID(unit, type) \ 3207 ((type >= snmpBcmCustomReceive0 && type <= snmpBcmCustomReceive8) || \ 3208 (type >= snmpBcmCustomTransmit0 && type <= (SOC_IS_FBX(unit) ? \ 3209 snmpBcmCustomTransmit11 : snmpBcmCustomTransmit14))) 3210 3211 #define _DBG_CNTR_IS_RSV(type) \ 3212 ((type >= snmpBcmCustomReceive1 && type <= snmpBcmCustomReceive2) || \ 3213 (type >= snmpBcmCustomTransmit0 && type <= snmpBcmCustomTransmit5)) 3214 3215 #define _DBG_FLAG_IS_VALID(type, flag) \ 3216 (((type == snmpBcmCustomReceive0) && (flag == BCM_DBG_CNT_DROP)) || \ 3217 ((type == snmpBcmCustomReceive1) && (flag == BCM_DBG_CNT_IMBP)) || \ 3218 ((type == snmpBcmCustomReceive2) && (flag == BCM_DBG_CNT_RIMDR)) || \ 3219 ((type == snmpBcmCustomTransmit0) && \ 3220 (flag == (BCM_DBG_CNT_TGIPMC6 | BCM_DBG_CNT_TGIP6))) || \ 3221 ((type == snmpBcmCustomTransmit1) && \ 3222 (flag == (BCM_DBG_CNT_TIPMCD6 | BCM_DBG_CNT_TIPD6))) || \ 3223 ((type == snmpBcmCustomTransmit2) && \ 3224 (flag == BCM_DBG_CNT_TGIPMC6)) || \ 3225 ((type == snmpBcmCustomTransmit3) && \ 3226 (flag == BCM_DBG_CNT_TPKTD)) || \ 3227 ((type == snmpBcmCustomTransmit4) && \ 3228 (flag == (BCM_DBG_CNT_TGIP4 | BCM_DBG_CNT_TGIP6))) || \ 3229 ((type == snmpBcmCustomTransmit5) && \ 3230 (flag == (BCM_DBG_CNT_TIPMCD4 | BCM_DBG_CNT_TIPMCD6)))) 3231 3232 3233 typedef struct bcm_dbg_cntr_s { 3234 bcm_stat_val_t counter; 3235 soc_reg_t reg; 3236 soc_reg_t select; 3237 } bcm_dbg_cntr_t; 3238 3239 3240 bcm_dbg_cntr_t bcm_dbg_cntr_rx[] = { 3241 { snmpBcmCustomReceive0, RDBGC0r, RDBGC0_SELECTr }, 3242 { snmpBcmCustomReceive1, RDBGC1r, RDBGC1_SELECTr }, 3243 { snmpBcmCustomReceive2, RDBGC2r, RDBGC2_SELECTr }, 3244 { snmpBcmCustomReceive3, RDBGC3r, RDBGC3_SELECTr }, 3245 { snmpBcmCustomReceive4, RDBGC4r, RDBGC4_SELECTr }, 3246 { snmpBcmCustomReceive5, RDBGC5r, RDBGC5_SELECTr }, 3247 { snmpBcmCustomReceive6, RDBGC6r, RDBGC6_SELECTr }, 3248 { snmpBcmCustomReceive7, RDBGC7r, RDBGC7_SELECTr }, 3249 { snmpBcmCustomReceive8, RDBGC8r, RDBGC8_SELECTr } 3250 }; 3251 3252 bcm_dbg_cntr_t bcm_dbg_cntr_tx[] = { 3253 { snmpBcmCustomTransmit0, TDBGC0r, TDBGC0_SELECTr }, 3254 { snmpBcmCustomTransmit1, TDBGC1r, TDBGC1_SELECTr }, 3255 { snmpBcmCustomTransmit2, TDBGC2r, TDBGC2_SELECTr }, 3256 { snmpBcmCustomTransmit3, TDBGC3r, TDBGC3_SELECTr }, 3257 { snmpBcmCustomTransmit4, TDBGC4r, TDBGC4_SELECTr }, 3258 { snmpBcmCustomTransmit5, TDBGC5r, TDBGC5_SELECTr }, 3259 { snmpBcmCustomTransmit6, TDBGC6r, TDBGC6_SELECTr }, 3260 { snmpBcmCustomTransmit7, TDBGC7r, TDBGC7_SELECTr }, 3261 { snmpBcmCustomTransmit8, TDBGC8r, TDBGC8_SELECTr }, 3262 { snmpBcmCustomTransmit9, TDBGC9r, TDBGC9_SELECTr }, 3263 { snmpBcmCustomTransmit10, TDBGC10r, TDBGC10_SELECTr }, 3264 { snmpBcmCustomTransmit11, TDBGC11r, TDBGC11_SELECTr } 3265 }; 3266 3267 #endif /* BCM_XGS3_SWITCH_SUPPORT */ 3268 3269 /* 3270 * Function: 3271 * bcm_stat_custom_set 3272 * Description: 3273 * Set debug counter to count certain packet types. 3274 * Parameters: 3275 * unit - StrataSwitch PCI device unit number. 3276 * port - Port number, -1 to set all ports. 3277 * type - SNMP statistics type. 3278 * flags - The counter select value (see stat.h for bit definitions). 3279 * Returns: 3280 * BCM_E_XXX 3281 * Notes: 3282 * The following debug counters are reserved for maintaining 3283 * currently supported SNMP MIB objects: 3284 * 3285 * snmpBcmCustomReceive0 - snmpBcmCustomReceive2 3286 * snmpBcmCustomTransmit0 - snmpBcmCustomTransmit5 3287 */ 3288 3289 #define SET(reg, field, flag) \ 3290 soc_reg_field_set(unit, (reg), \ 3291 &ctr_sel, (field), (flags & (flag)) ? 1 : 0) 3292 3293 int 3294 bcm_esw_stat_custom_set(int unit, bcm_port_t port, 3295 bcm_stat_val_t type, uint32 flags) 3296 { 3297 #ifdef BCM_XGS3_SWITCH_SUPPORT 3298 uint32 ctr_sel = 0; 3299 int i; 3300 3301 if (!SOC_IS_XGS3_SWITCH(unit)) { 3302 return BCM_E_UNAVAIL; 3303 } 3304 3305 if (!_DBG_CNTR_IS_VALID(unit, type)) { 3306 return BCM_E_PARAM; 3307 } 3308 3309 if (_DBG_CNTR_IS_RSV(type)) { 3310 if (!_DBG_FLAG_IS_VALID(type, flags)) { 3311 return BCM_E_CONFIG; 3312 } 3313 } 3314 3315 /* port = -1 is valid port in that case */ 3316 if ((port != -1)) { 3317 BCM_IF_ERROR_RETURN( 3318 _bcm_esw_stat_gport_validate(unit, port, &port)); 3319 } 3320 3321 for (i = 0; i < COUNTOF(bcm_dbg_cntr_rx); i++) { 3322 if (bcm_dbg_cntr_rx[i].counter == type) { 3323 if (SOC_IS_FBX(unit)) { 3324 SOC_IF_ERROR_RETURN(soc_reg32_get(unit, bcm_dbg_cntr_rx[i].select, 3325 REG_PORT_ANY, 0, &ctr_sel)); 3326 if (SOC_IS_FBX(unit)) { 3327 uint32 mask; 3328 3329 if (soc_feature(unit, soc_feature_dbgc_higig_lkup)) { 3330 mask = BCM_FB_B0_DBG_CNT_RMASK; 3331 } else if (SOC_IS_HB_GW(unit) || SOC_IS_TRX(unit)) { 3332 mask = BCM_HB_DBG_CNT_RMASK; 3333 } else if (SOC_IS_RAPTOR(unit) || SOC_IS_RAVEN(unit) || 3334 SOC_IS_HAWKEYE(unit)){ 3335 mask = BCM_RP_DBG_CNT_RMASK; 3336 } else { 3337 mask = BCM_FB_DBG_CNT_RMASK; 3338 } 3339 3340 soc_reg_field_set(unit, bcm_dbg_cntr_rx[i].select, 3341 &ctr_sel, BITMAPf, flags & mask); 3342 } 3343 SOC_IF_ERROR_RETURN(soc_reg32_set(unit, bcm_dbg_cntr_rx[i].select, 3344 REG_PORT_ANY, 0, ctr_sel)); 3345 } 3346 } 3347 } 3348 3349 for (i = 0; i < COUNTOF(bcm_dbg_cntr_tx); i++) { 3350 if (bcm_dbg_cntr_tx[i].counter == type) { 3351 if (SOC_IS_FBX(unit)) { 3352 uint32 mask; 3353 3354 SOC_IF_ERROR_RETURN(soc_reg32_get(unit, bcm_dbg_cntr_tx[i].select, 3355 REG_PORT_ANY, 0, &ctr_sel)); 3356 3357 if (soc_feature(unit, soc_feature_dbgc_higig_lkup)) { 3358 mask = BCM_FB_B0_DBG_CNT_TMASK; 3359 } else if (SOC_IS_HB_GW(unit)) { 3360 mask = BCM_HB_DBG_CNT_TMASK; 3361 } else if (SOC_IS_RAPTOR(unit) || SOC_IS_RAVEN(unit) || 3362 SOC_IS_HAWKEYE(unit)){ 3363 mask = BCM_RP_DBG_CNT_TMASK; 3364 } else { 3365 mask = BCM_FB_DBG_CNT_TMASK; 3366 } 3367 3368 soc_reg_field_set(unit, bcm_dbg_cntr_tx[i].select, &ctr_sel, 3369 BITMAPf, flags & mask); 3370 3371 SOC_IF_ERROR_RETURN(soc_reg32_set(unit, bcm_dbg_cntr_tx[i].select, 3372 REG_PORT_ANY, 0, ctr_sel)); 3373 } 3374 else { 3375 soc_counter_set32_by_reg(unit, bcm_dbg_cntr_tx[i].reg, 0, 0); 3376 } 3377 break; 3378 } 3379 } 3380 3381 return BCM_E_NONE; 3382 #else 3383 return BCM_E_UNAVAIL; 3384 #endif /* BCM_XGS3_SWITCH_SUPPORT */ 3385 } 3386 3387 /* 3388 * Function: 3389 * bcm_stat_custom_get 3390 * Description: 3391 * Get debug counter select value. 3392 * Parameters: 3393 * unit - StrataSwitch PCI device unit number. 3394 * port - Port number (unused). 3395 * type - SNMP statistics type. 3396 * flags - (OUT) The counter select value 3397 * (see stat.h for bit definitions). 3398 * Returns: 3399 * BCM_E_XXX 3400 */ 3401 3402 #define GET(reg, field, flag) \ 3403 if (soc_reg_field_get(unit, (reg), ctr_sel, (field))) { \ 3404 tmp_flags |= (flag); \ 3405 } 3406 3407 int 3408 bcm_esw_stat_custom_get(int unit, bcm_port_t port, 3409 bcm_stat_val_t type, uint32 *flags) 3410 { 3411 #ifdef BCM_XGS3_SWITCH_SUPPORT 3412 uint32 ctr_sel; 3413 int i; 3414 3415 if (!SOC_IS_XGS3_SWITCH(unit)) { 3416 return BCM_E_UNAVAIL; 3417 } 3418 3419 if (!_DBG_CNTR_IS_VALID(unit, type)) { 3420 return BCM_E_PARAM; 3421 } 3422 3423 BCM_IF_ERROR_RETURN( 3424 _bcm_esw_stat_gport_validate(unit, port, &port)); 3425 3426 for (i = 0; i < COUNTOF(bcm_dbg_cntr_rx); i++) { 3427 if (bcm_dbg_cntr_rx[i].counter == type) { 3428 if (SOC_IS_FBX(unit)) { 3429 SOC_IF_ERROR_RETURN(soc_reg32_get(unit, bcm_dbg_cntr_rx[i].select, 3430 REG_PORT_ANY, 0, &ctr_sel)); 3431 if (SOC_IS_FBX(unit)) { 3432 *flags = soc_reg_field_get(unit, bcm_dbg_cntr_rx[i].select, 3433 ctr_sel, BITMAPf); 3434 } 3435 } 3436 break; 3437 } 3438 } 3439 3440 for (i = 0; i < COUNTOF(bcm_dbg_cntr_tx); i++) { 3441 if (bcm_dbg_cntr_tx[i].counter == type) { 3442 if (SOC_IS_FBX(unit)) { 3443 SOC_IF_ERROR_RETURN(soc_reg32_get(unit, bcm_dbg_cntr_tx[i].select, 3444 REG_PORT_ANY, 0, &ctr_sel)); 3445 *flags = soc_reg_field_get(unit, bcm_dbg_cntr_tx[i].select, 3446 ctr_sel, BITMAPf); 3447 } 3448 break; 3449 } 3450 } 3451 return BCM_E_NONE; 3452 3453 #else 3454 return BCM_E_UNAVAIL; 3455 3456 #endif /* BCM_XGS3_SWITCH_SUPPORT */ 3457 } 3458 3459 3460 /* 3461 * Function: 3462 * _bcm_stat_custom_to_bit 3463 * Description: 3464 * Calculate the bit that should be turned on for specific trigger 3465 * Parameters: 3466 * unit - StrataSwitch PCI device unit number. 3467 * chan - flag to indicate RX or TX DBG counter 3468 * trigger - The counter select value 3469 * (see stat.h for bit definitions). 3470 * result - [OUT] - bit position that should be turned on. 3471 * Returns: 3472 * BCM_E_XXX 3473 */ 3474 int 3475 _bcm_stat_custom_to_bit(int unit, int chan, bcm_custom_stat_trigger_t trigger, 3476 uint32 *result) 3477 { 3478 if (chan == _DBG_CNT_RX_CHAN) { 3479 3480 /* RX Part */ 3481 3482 switch (trigger) { 3483 3484 case bcmDbgCntRIPD4: 3485 _BCM_TD3_BIT_SET(unit, result, 108); 3486 _BCM_TH3_BIT_SET(unit, result, 64); 3487 _BCM_DEFAULT_BIT_SET(unit, result, 0); 3488 break; 3489 case bcmDbgCntRIPC4: 3490 _BCM_TD3_BIT_SET(unit, result, 96); 3491 _BCM_TH3_BIT_SET(unit, result, 65); 3492 _BCM_DEFAULT_BIT_SET(unit, result, 1); 3493 break; 3494 case bcmDbgCntRIPHE4: 3495 _BCM_TD3_BIT_SET(unit, result, 109); 3496 _BCM_TH3_BIT_SET(unit, result, 66); 3497 _BCM_DEFAULT_BIT_SET(unit, result, 2); 3498 break; 3499 case bcmDbgCntIMRP4: 3500 _BCM_TD3_BIT_SET(unit, result, 97); 3501 _BCM_TH3_BIT_SET(unit, result, 67); 3502 _BCM_DEFAULT_BIT_SET(unit, result, 3); 3503 break; 3504 case bcmDbgCntRIPD6: 3505 _BCM_TD3_BIT_SET(unit, result, 110); 3506 _BCM_TH3_BIT_SET(unit, result, 68); 3507 _BCM_DEFAULT_BIT_SET(unit, result, 4); 3508 break; 3509 case bcmDbgCntRIPC6: 3510 _BCM_TD3_BIT_SET(unit, result, 98); 3511 _BCM_TH3_BIT_SET(unit, result, 69); 3512 _BCM_DEFAULT_BIT_SET(unit, result, 5); 3513 break; 3514 case bcmDbgCntRIPHE6: 3515 _BCM_TD3_BIT_SET(unit, result, 111); 3516 _BCM_TH3_BIT_SET(unit, result, 70); 3517 _BCM_DEFAULT_BIT_SET(unit, result, 6); 3518 break; 3519 case bcmDbgCntIMRP6: 3520 _BCM_TD3_BIT_SET(unit, result, 99); 3521 _BCM_TH3_BIT_SET(unit, result, 71); 3522 _BCM_DEFAULT_BIT_SET(unit, result, 7); 3523 break; 3524 case bcmDbgCntRDISC: 3525 _BCM_TD3_BIT_SET_E_PARAM(unit, result); 3526 _BCM_TH3_BIT_SET_E_PARAM(unit, result); 3527 _BCM_DEFAULT_BIT_SET(unit, result, 8); 3528 break; 3529 case bcmDbgCntRUC: 3530 _BCM_TD3_BIT_SET(unit, result, 104); 3531 _BCM_TH3_BIT_SET(unit, result, 94); 3532 _BCM_DEFAULT_BIT_SET(unit, result, 9); 3533 break; 3534 case bcmDbgCntRPORTD: 3535 _BCM_TD3_BIT_SET(unit, result, 114); 3536 _BCM_TH3_BIT_SET(unit, result, 91); 3537 _BCM_DEFAULT_BIT_SET(unit, result, 10); 3538 break; 3539 case bcmDbgCntPDISC: 3540 _BCM_TH3_BIT_SET(unit, result, 84); 3541 _BCM_DEFAULT_BIT_SET(unit, result, 11); 3542 break; 3543 case bcmDbgCntIMBP: 3544 _BCM_TD3_BIT_SET(unit, result, 105); 3545 _BCM_TH3_BIT_SET(unit, result, 79); 3546 _BCM_DEFAULT_BIT_SET(unit, result, 12); 3547 break; 3548 case bcmDbgCntRFILDR: 3549 _BCM_TD3_BIT_SET(unit, result, 93); 3550 _BCM_TH3_BIT_SET(unit, result, 35); /* RSEL_DROP_VECTOR.IFP_DROP */ 3551 _BCM_DEFAULT_BIT_SET(unit, result, 13); 3552 break; 3553 case bcmDbgCntRIMDR: 3554 _BCM_TD3_BIT_SET(unit, result, 118); /* MULTICAST_PBM_ZERO */ 3555 _BCM_TH3_BIT_SET(unit, result, 90); 3556 _BCM_DEFAULT_BIT_SET(unit, result, 14); 3557 break; 3558 case bcmDbgCntRDROP: 3559 _BCM_TD3_BIT_SET(unit, result, 115); 3560 _BCM_TH3_BIT_SET(unit, result, 85); 3561 _BCM_DEFAULT_BIT_SET(unit, result, 15); 3562 break; 3563 case bcmDbgCntIRPSE: 3564 _BCM_TD3_BIT_SET(unit, result, 0); 3565 _BCM_TH3_BIT_SET(unit, result, 0); /* DISCARD_PROC_DROP_VECTOR.CONTROL_FRAME */ 3566 _BCM_DEFAULT_BIT_SET(unit, result, 16); 3567 break; 3568 case bcmDbgCntIRHOL: 3569 _BCM_FBX_BIT_SET(unit, result, 17); 3570 _BCM_DEFAULT_BIT_SET_E_PARAM(unit, result); 3571 break; 3572 case bcmDbgCntIRIBP: 3573 _BCM_FBX_BIT_SET(unit, result, 18); 3574 _BCM_DEFAULT_BIT_SET_E_PARAM(unit, result); 3575 break; 3576 case bcmDbgCntDSL3HE: 3577 _BCM_TD3_BIT_SET(unit, result, 1); /* L3_DOS_ATTACK */ 3578 _BCM_TH3_BIT_SET(unit, result, 8); 3579 _BCM_HB_GW_BIT_SET_E_PARAM(unit, result); 3580 _BCM_DEFAULT_BIT_SET(unit, result, 19); 3581 break; 3582 case bcmDbgCntIUNKHDR: 3583 _BCM_TD3_BIT_SET(unit, result, 106); 3584 _BCM_HB_GW_TRX_BIT_SET(unit, result, 19); 3585 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3586 break; 3587 case bcmDbgCntDSL4HE: 3588 _BCM_TD3_BIT_SET(unit, result, 9); /* L4_DOS_ATTACK */ 3589 _BCM_TH3_BIT_SET(unit, result, 9); 3590 _BCM_HB_GW_BIT_SET_E_PARAM(unit, result); 3591 _BCM_DEFAULT_BIT_SET(unit, result, 20); 3592 break; 3593 case bcmDbgCntIMIRROR: 3594 _BCM_TD3_BIT_SET(unit, result, 107); 3595 _BCM_HB_GW_TRX_BIT_SET(unit, result, 20); 3596 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3597 break; 3598 case bcmDbgCntDSICMP: 3599 _BCM_TH3_BIT_SET(unit, result, 77); /* DSICMP */ 3600 _BCM_TD3_BIT_SET_E_PARAM(unit, result); 3601 _BCM_DEFAULT_BIT_SET(unit, result, 21); 3602 break; 3603 case bcmDbgCntDSFRAG: 3604 _BCM_TH3_BIT_SET(unit, result, 76); /* DSFRAG */ 3605 _BCM_TD3_BIT_SET_E_PARAM(unit, result); 3606 _BCM_DEFAULT_BIT_SET(unit, result, 22); 3607 break; 3608 case bcmDbgCntMTUERR: 3609 _BCM_TD3_BIT_SET(unit, result, 116); /* MTU_CHECK_FAIL */ 3610 _BCM_TH3_BIT_SET(unit, result, 82); 3611 _BCM_DEFAULT_BIT_SET(unit, result, 23); 3612 break; 3613 case bcmDbgCntRTUN: 3614 _BCM_TD3_BIT_SET(unit, result, 103); 3615 _BCM_TH3_BIT_SET(unit, result, 92); 3616 _BCM_DEFAULT_BIT_SET(unit, result, 24); 3617 break; 3618 case bcmDbgCntRTUNE: 3619 _BCM_TH3_BIT_SET(unit, result, 93); 3620 _BCM_TD3_BIT_SET_E_PARAM(unit, result); 3621 _BCM_DEFAULT_BIT_SET(unit, result, 25); 3622 break; 3623 case bcmDbgCntVLANDR: 3624 /* 3625 * Replaced by bcmDbgCntRxVlanMismatch bcmDbgCntRxVlanMemberMismatch 3626 * bcmDbgCntRxTpidMismatch bcmDbgCntRxPrivateVlanMismatch for TD3 and TH3 3627 */ 3628 _BCM_TD3_BIT_SET_E_PARAM(unit, result); 3629 _BCM_TH3_BIT_SET_E_PARAM(unit, result); 3630 _BCM_DEFAULT_BIT_SET(unit, result, 26); 3631 break; 3632 case bcmDbgCntRHGUC: 3633 _BCM_TD3_BIT_SET(unit, result, 101); 3634 _BCM_TH3_BIT_SET_E_PARAM(unit, result); 3635 _BCM_FB_BIT_SET(unit, result, 27); 3636 _BCM_TRX_BIT_SET(unit, result, 32); 3637 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3638 break; 3639 case bcmDbgCntRHGMC: 3640 _BCM_TD3_BIT_SET(unit, result, 102); 3641 _BCM_TH3_BIT_SET_E_PARAM(unit, result); 3642 _BCM_FB_BIT_SET(unit, result, 28); 3643 _BCM_TRX_BIT_SET(unit, result, 33); 3644 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3645 break; 3646 case bcmDbgCntMPLS: 3647 return BCM_E_PARAM; 3648 case bcmDbgCntMACLMT: 3649 _BCM_TRX_BIT_SET_E_PARAM(unit, result); 3650 if (soc_feature(unit, soc_feature_mac_learn_limit)) { 3651 *result = 29; /* Value = 0x20000000 */ 3652 return BCM_E_NONE; 3653 } else { 3654 return BCM_E_PARAM; 3655 } 3656 break; 3657 case bcmDbgCntMPLSERR: 3658 return BCM_E_PARAM; 3659 case bcmDbgCntURPFERR: 3660 return BCM_E_PARAM; 3661 case bcmDbgCntHGHDRE: 3662 _BCM_TD3_BIT_SET(unit, result, 6); 3663 _BCM_HB_GW_TRX_BIT_SET(unit, result, 27); 3664 _BCM_FB2_BIT_SET(unit, result, 29); 3665 _BCM_RAPTOR_RAVEN_BIT_SET(unit, result, 27); 3666 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3667 break; 3668 case bcmDbgCntMCIDXE: 3669 _BCM_TD3_BIT_SET(unit, result, 50); 3670 _BCM_HB_GW_TRX_BIT_SET(unit, result, 28); 3671 _BCM_RAPTOR_RAVEN_BIT_SET(unit, result, 28); 3672 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3673 break; 3674 case bcmDbgCntLAGLUP: 3675 _BCM_TD3_BIT_SET(unit, result, 100); 3676 _BCM_TH3_BIT_SET(unit, result, 80); 3677 _BCM_HB_GW_TRX_BIT_SET(unit, result, 29); 3678 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3679 break; 3680 case bcmDbgCntLAGLUPD: 3681 _BCM_TD3_BIT_SET(unit, result, 112); 3682 _BCM_TH3_BIT_SET(unit, result, 81); 3683 _BCM_HB_GW_TRX_BIT_SET(unit, result, 30); 3684 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3685 break; 3686 case bcmDbgCntPARITYD: 3687 _BCM_TD3_BIT_SET(unit, result, 113); 3688 _BCM_TH3_BIT_SET(unit, result, 83); 3689 _BCM_HB_GW_TRX_BIT_SET(unit, result, 31); 3690 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3691 break; 3692 case bcmDbgCntVFPDR: 3693 _BCM_TD3_BIT_SET(unit, result, 41); /* VXLT_DROP_VECTOR.VFP */ 3694 _BCM_TH3_BIT_SET(unit, result, 58); /* PKT_PROC_DROP_VECTOR.VFP */ 3695 _BCM_FB2_BIT_SET(unit, result, 30); 3696 _BCM_TRX_BIT_SET(unit, result, 35); 3697 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3698 break; 3699 case bcmDbgCntURPF: 3700 _BCM_TD3_BIT_SET(unit, result, 90); /* URPF_CHECK_FAIL */ 3701 _BCM_TH3_BIT_SET_E_PARAM(unit, result); 3702 _BCM_FB2_BIT_SET(unit, result, 31); 3703 _BCM_TRX_BIT_SET(unit, result, 34); 3704 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3705 break; 3706 case bcmDbgCntDSTDISCARDDROP: 3707 /* 3708 * Replaced by bcmDbgCntRxL2DstDiscardDrop and 3709 * bcmDbgCntRxL3DstDiscardDrop for TD3 and TH3 3710 */ 3711 _BCM_TH3_BIT_SET_E_PARAM(unit, result); 3712 _BCM_TD3_BIT_SET_E_PARAM(unit, result); 3713 _BCM_TRX_BIT_SET(unit, result, 36); 3714 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3715 break; 3716 case bcmDbgCntCLASSBASEDMOVEDROP: 3717 if (soc_feature(unit, soc_feature_class_based_learning)) { 3718 _BCM_TD3_BIT_SET(unit, result, 62); /* CLASS_BASED_SM */ 3719 _BCM_TRX_BIT_SET(unit, result, 37); 3720 } 3721 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3722 break; 3723 case bcmDbgCntMACLMT_NODROP: 3724 _BCM_TRX_BIT_SET(unit, result, 38); 3725 _BCM_TH3_BIT_SET_E_PARAM(unit, result); 3726 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3727 break; 3728 case bcmDbgCntMACSAEQUALMACDA: 3729 _BCM_TD3_BIT_SET(unit, result, 8); /* MACSA_EQUALS_DA */ 3730 _BCM_TH3_BIT_SET(unit, result, 11); 3731 _BCM_TRX_BIT_SET(unit, result, 39); 3732 _BCM_RAVEN_BIT_SET(unit, result, 30); 3733 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3734 break; 3735 case bcmDbgCntMACLMT_DROP: 3736 _BCM_TH3_BIT_SET_E_PARAM(unit, result); 3737 _BCM_TRX_BIT_SET(unit, result, 40); 3738 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3739 break; 3740 case bcmDbgCntVntagRxError: 3741 _BCM_GH_BIT_SET(unit, result, 41); 3742 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3743 break; 3744 case bcmDbgCntNivRxForwardingError: 3745 _BCM_GH_BIT_SET(unit, result, 42); 3746 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3747 break; 3748 case bcmDbgCntIfpTriggerPfcRxDrop: 3749 _BCM_HR3_BIT_SET(unit, result, 43); 3750 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3751 break; 3752 case bcmDbgCntFcmPortClass2RxDiscards: 3753 _BCM_TD2_BIT_SET(unit, result, 56); 3754 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3755 break; 3756 case bcmDbgCntFcmPortClass2RxFrames: 3757 _BCM_TD3_BIT_SET(unit, result, 123); /* FCOE_CLASS2_RX_FRAMES */ 3758 _BCM_TD2_BIT_SET(unit, result, 57); 3759 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3760 break; 3761 case bcmDbgCntFcmPortClass3RxDiscards: 3762 _BCM_TD2_BIT_SET(unit, result, 58); 3763 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3764 break; 3765 case bcmDbgCntFcmPortClass3RxFrames: 3766 _BCM_TD3_BIT_SET(unit, result, 124); /* FCOE_CLASS3_RX_FRAMES */ 3767 _BCM_TD2_BIT_SET(unit, result, 59); 3768 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3769 break; 3770 case bcmDbgCntNonHGoE: 3771 _BCM_TD2_BIT_SET(unit, result, 60); 3772 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3773 break; 3774 case bcmDbgCntHGoE: 3775 _BCM_TD2_BIT_SET(unit, result, 61); 3776 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3777 break; 3778 case bcmDbgCntRxHigigLoopbackDrop: 3779 _BCM_TD3_BIT_SET(unit, result, 2); 3780 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3781 break; 3782 case bcmDbgCntRxHigigUnknownOpcodeDrop: 3783 _BCM_TD3_BIT_SET(unit, result, 5); 3784 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3785 break; 3786 case bcmDbgCntRxIpInIpDrop: 3787 _BCM_TD3_BIT_SET(unit, result, 16); 3788 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3789 break; 3790 case bcmDbgCntRxMimDrop: 3791 _BCM_TD3_BIT_SET(unit, result, 17); 3792 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3793 break; 3794 case bcmDbgCntRxTunnelInterfaceError: 3795 _BCM_TD3_BIT_SET(unit, result, 18); 3796 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3797 break; 3798 case bcmDbgCntRxMplsControlWordInvalid: 3799 _BCM_TD3_BIT_SET(unit, result, 20); 3800 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3801 break; 3802 case bcmDbgCntRxMplsGalNotBosDrop: 3803 _BCM_TD3_BIT_SET(unit, result, 21); 3804 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3805 break; 3806 case bcmDbgCntRxMplsPayloadInvalid: 3807 _BCM_TD3_BIT_SET(unit, result, 22); 3808 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3809 break; 3810 case bcmDbgCntRxMplsEntropyDrop: 3811 _BCM_TD3_BIT_SET(unit, result, 23); 3812 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3813 break; 3814 case bcmDbgCntRxMplsLabelLookupMiss: 3815 _BCM_TD3_BIT_SET(unit, result, 24); 3816 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3817 break; 3818 case bcmDbgCntRxMplsActionInvalid: 3819 _BCM_TD3_BIT_SET(unit, result, 25); 3820 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3821 break; 3822 case bcmDbgCntRxTunnelTtlError: 3823 _BCM_TD3_BIT_SET(unit, result, 28); 3824 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3825 break; 3826 case bcmDbgCntRxTunnelShimError: 3827 _BCM_TD3_BIT_SET(unit, result, 29); 3828 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3829 break; 3830 case bcmDbgCntRxTunnelObjectValidationFail: 3831 _BCM_TD3_BIT_SET(unit, result, 30); 3832 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3833 break; 3834 case bcmDbgCntRxVlanMismatch: 3835 _BCM_TH3_BIT_SET(unit, result, 62); /* INVALID_VLAN */ 3836 _BCM_TD3_BIT_SET(unit, result, 32); 3837 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3838 break; 3839 case bcmDbgCntRxVlanMemberMismatch: 3840 _BCM_TH3_BIT_SET(unit, result, 60); /* ENIFILTER */ 3841 _BCM_TD3_BIT_SET(unit, result, 33); 3842 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3843 break; 3844 case bcmDbgCntRxTpidMismatch: 3845 _BCM_TH3_BIT_SET(unit, result, 61); /* INVALID_TPID */ 3846 _BCM_TD3_BIT_SET(unit, result, 34); 3847 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3848 break; 3849 case bcmDbgCntRxPrivateVlanMismatch: 3850 _BCM_TH3_BIT_SET(unit, result, 63); /* PVLAN_VID_MISMATCH */ 3851 _BCM_TD3_BIT_SET(unit, result, 35); 3852 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3853 break; 3854 case bcmDbgCntRxMacIpBindError: 3855 _BCM_TD3_BIT_SET(unit, result, 36); 3856 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3857 break; 3858 case bcmDbgCntRxVlanTranslate2LookupMiss: 3859 _BCM_TD3_BIT_SET(unit, result, 37); 3860 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3861 break; 3862 case bcmDbgCntRxL3TunnelLookupMiss: 3863 _BCM_TD3_BIT_SET(unit, result, 38); 3864 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3865 break; 3866 case bcmDbgCntRxMplsLookupMiss: 3867 _BCM_TD3_BIT_SET(unit, result, 39); 3868 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3869 break; 3870 case bcmDbgCntRxVlanTranslate1LookupMiss: 3871 _BCM_TD3_BIT_SET(unit, result, 40); 3872 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3873 break; 3874 case bcmDbgCntRxFcoeVftDrop: 3875 _BCM_TD3_BIT_SET(unit, result, 42); 3876 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3877 break; 3878 case bcmDbgCntRxFcoeSrcBindError: 3879 _BCM_TD3_BIT_SET(unit, result, 43); 3880 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3881 break; 3882 case bcmDbgCntRxFcoeSrcFpmaError: 3883 _BCM_TD3_BIT_SET(unit, result, 44); 3884 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3885 break; 3886 case bcmDbgCntRxVfiP2pDrop: 3887 _BCM_TD3_BIT_SET(unit, result, 45); 3888 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3889 break; 3890 case bcmDbgCntRxStgDrop: 3891 _BCM_TD3_BIT_SET(unit, result, 49); 3892 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3893 break; 3894 case bcmDbgCntRxCompositeError: 3895 _BCM_TD3_BIT_SET(unit, result, 51); 3896 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3897 break; 3898 case bcmDbgCntRxBpduDrop: 3899 _BCM_TD3_BIT_SET(unit, result, 52); 3900 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3901 break; 3902 case bcmDbgCntRxProtocolDrop: 3903 _BCM_TD3_BIT_SET(unit, result, 53); 3904 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3905 break; 3906 case bcmDbgCntRxUnknownMacSaDrop: 3907 _BCM_TD3_BIT_SET(unit, result, 54); 3908 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3909 break; 3910 case bcmDbgCntRxSrcRouteDrop: 3911 _BCM_TD3_BIT_SET(unit, result, 55); 3912 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3913 break; 3914 case bcmDbgCntRxL2SrcDiscardDrop: 3915 _BCM_TD3_BIT_SET(unit, result, 56); 3916 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3917 break; 3918 case bcmDbgCntRxL2SrcStaticMoveDrop: 3919 _BCM_TD3_BIT_SET(unit, result, 57); 3920 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3921 break; 3922 case bcmDbgCntRxL2DstDiscardDrop: 3923 _BCM_TH3_BIT_SET(unit, result, 14); /* L2DST_DISCARD */ 3924 _BCM_TD3_BIT_SET(unit, result, 58); 3925 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3926 break; 3927 case bcmDbgCntRxL3DisableDrop: 3928 _BCM_TD3_BIT_SET(unit, result, 59); 3929 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3930 break; 3931 case bcmDbgCntRxMacSaEqual0Drop: 3932 _BCM_TD3_BIT_SET(unit, result, 60); 3933 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3934 break; 3935 case bcmDbgCntRxVlanCrossConnectOrNonUnicastDrop: 3936 _BCM_TD3_BIT_SET(unit, result, 61); 3937 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3938 break; 3939 case bcmDbgCntRxTimeSyncDrop: 3940 _BCM_TD3_BIT_SET(unit, result, 63); 3941 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3942 break; 3943 case bcmDbgCntRxIpmcDrop: 3944 _BCM_TD3_BIT_SET(unit, result, 64); 3945 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3946 break; 3947 case bcmDbgCntRxMyStationDrop: 3948 _BCM_TD3_BIT_SET(unit, result, 65); 3949 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3950 break; 3951 case bcmDbgCntRxPrivateVlanVpFilterDrop: 3952 _BCM_TD3_BIT_SET(unit, result, 66); 3953 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3954 break; 3955 case bcmDbgCntRxL3DstDiscardDrop: 3956 _BCM_TH3_BIT_SET(unit, result, 17); /* LDST_DISCARD */ 3957 _BCM_TD3_BIT_SET(unit, result, 68); 3958 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3959 break; 3960 case bcmDbgCntRxTunnelDecapEcnError: 3961 _BCM_TD3_BIT_SET(unit, result, 69); 3962 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3963 break; 3964 case bcmDbgCntRxL3SrcDiscardDrop: 3965 _BCM_TD3_BIT_SET(unit, result, 71); 3966 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3967 break; 3968 case bcmDbgCntRxFcoeZoneLookupMiss: 3969 _BCM_TD3_BIT_SET(unit, result, 72); 3970 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3971 break; 3972 case bcmDbgCntRxL3TtlError: 3973 _BCM_TD3_BIT_SET(unit, result, 73); 3974 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3975 break; 3976 case bcmDbgCntRxL3HeaderError: 3977 _BCM_TD3_BIT_SET(unit, result, 74); 3978 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3979 break; 3980 case bcmDbgCntRxL2HeaderError: 3981 _BCM_TD3_BIT_SET(unit, result, 75); 3982 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3983 break; 3984 case bcmDbgCntRxL3DstLookupDrop: 3985 _BCM_TD3_BIT_SET(unit, result, 77); 3986 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3987 break; 3988 case bcmDbgCntRxL2TtlError: 3989 _BCM_TD3_BIT_SET(unit, result, 78); 3990 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3991 break; 3992 case bcmDbgCntRxL2RpfError: 3993 _BCM_TD3_BIT_SET(unit, result, 79); 3994 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3995 break; 3996 case bcmDbgCntRxTagUntagDiscardDrop: 3997 _BCM_TD3_BIT_SET(unit, result, 82); 3998 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 3999 break; 4000 case bcmDbgCntRxStormControlDrop: 4001 _BCM_TD3_BIT_SET(unit, result, 84); 4002 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4003 break; 4004 case bcmDbgCntRxFcoeZoneError: 4005 _BCM_TD3_BIT_SET(unit, result, 85); 4006 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4007 break; 4008 case bcmDbgCntRxFieldChangeL2NoRedirectDrop: 4009 _BCM_TD3_BIT_SET(unit, result, 86); 4010 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4011 break; 4012 case bcmDbgCntRxNextHopDrop: 4013 _BCM_TD3_BIT_SET(unit, result, 89); 4014 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4015 break; 4016 case bcmDbgCntRxNatDrop: 4017 _BCM_TD3_BIT_SET(unit, result, 91); 4018 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4019 break; 4020 case bcmDbgCntIngressProtectionDataDrop: 4021 _BCM_TD3_BIT_SET(unit, result, 92); 4022 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4023 break; 4024 case bcmDbgCntRxSrcKnockoutDrop: 4025 _BCM_TD3_BIT_SET(unit, result, 119); 4026 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4027 break; 4028 case bcmDbgCntRxMplsSeqNumberError: 4029 _BCM_TD3_BIT_SET(unit, result, 120); 4030 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4031 break; 4032 case bcmDbgCntRxBlockMaskDrop: 4033 _BCM_TD3_BIT_SET(unit, result, 121); 4034 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4035 break; 4036 case bcmDbgCntRxDlbRhResolutionError: 4037 _BCM_TD3_BIT_SET(unit, result, 122); 4038 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4039 break; 4040 4041 default: 4042 return BCM_E_PARAM; 4043 } 4044 4045 return BCM_E_NONE; 4046 4047 } else if (chan == _DBG_CNT_TX_CHAN) { 4048 4049 /* TX Part */ 4050 4051 switch (trigger) { 4052 4053 case bcmDbgCntTGIP4: 4054 _BCM_TD3_BIT_SET(unit, result, 40); 4055 _BCM_DEFAULT_BIT_SET(unit, result, 0); 4056 break; 4057 case bcmDbgCntTIPD4: 4058 _BCM_TD3_BIT_SET(unit, result, 35); 4059 _BCM_DEFAULT_BIT_SET(unit, result, 1); 4060 break; 4061 case bcmDbgCntTGIPMC4: 4062 _BCM_TD3_BIT_SET(unit, result, 41); 4063 _BCM_DEFAULT_BIT_SET(unit, result, 2); 4064 break; 4065 case bcmDbgCntTIPMCD4: 4066 _BCM_TD3_BIT_SET(unit, result, 36); 4067 _BCM_DEFAULT_BIT_SET(unit, result, 3); 4068 break; 4069 case bcmDbgCntTGIP6: 4070 _BCM_TD3_BIT_SET(unit, result, 44); 4071 _BCM_DEFAULT_BIT_SET(unit, result, 4); 4072 break; 4073 case bcmDbgCntTIPD6: 4074 _BCM_TD3_BIT_SET(unit, result, 37); 4075 _BCM_DEFAULT_BIT_SET(unit, result, 5); 4076 break; 4077 case bcmDbgCntTGIPMC6: 4078 _BCM_TD3_BIT_SET(unit, result, 45); 4079 _BCM_DEFAULT_BIT_SET(unit, result, 6); 4080 break; 4081 case bcmDbgCntTIPMCD6: 4082 _BCM_TD3_BIT_SET(unit, result, 38); 4083 _BCM_DEFAULT_BIT_SET(unit, result, 7); 4084 break; 4085 case bcmDbgCntTTNL: 4086 _BCM_TD3_BIT_SET(unit, result, 46); 4087 _BCM_DEFAULT_BIT_SET(unit, result, 8); 4088 break; 4089 case bcmDbgCntTTNLE: 4090 _BCM_TD3_BIT_SET(unit, result, 28); 4091 _BCM_DEFAULT_BIT_SET(unit, result, 9); 4092 break; 4093 case bcmDbgCntTTTLD: 4094 _BCM_TD3_BIT_SET(unit, result, 2); 4095 _BCM_DEFAULT_BIT_SET(unit, result, 10); 4096 break; 4097 case bcmDbgCntTCFID: 4098 _BCM_TD3_BIT_SET(unit, result, 30); 4099 _BCM_DEFAULT_BIT_SET(unit, result, 11); 4100 break; 4101 case bcmDbgCntTVLAN: 4102 _BCM_TD3_BIT_SET(unit, result, 42); 4103 _BCM_DEFAULT_BIT_SET(unit, result, 12); 4104 break; 4105 case bcmDbgCntTVLAND: 4106 /* 4107 * Replaced by bcmDbgCntTxFwdDomainNotFoundDrop for TD3 4108 */ 4109 _BCM_TD3_BIT_SET_E_PARAM(unit, result); 4110 _BCM_DEFAULT_BIT_SET(unit, result, 13); 4111 break; 4112 case bcmDbgCntTVXLTMD: 4113 _BCM_TD3_BIT_SET(unit, result, 0); /* ADAPT_1_MISS_DROP */ 4114 _BCM_DEFAULT_BIT_SET(unit, result, 14); 4115 break; 4116 case bcmDbgCntTSTGD: 4117 _BCM_TD3_BIT_SET(unit, result, 5); /* STG_BLOCK_DROP */ 4118 _BCM_DEFAULT_BIT_SET(unit, result, 15); 4119 break; 4120 case bcmDbgCntTAGED: 4121 _BCM_TD3_BIT_SET(unit, result, 14); 4122 _BCM_TH3_BIT_SET_E_PARAM(unit, result); 4123 _BCM_DEFAULT_BIT_SET(unit, result, 16); 4124 break; 4125 case bcmDbgCntTL2MCD: 4126 _BCM_TD3_BIT_SET(unit, result, 39); 4127 _BCM_DEFAULT_BIT_SET(unit, result, 17); 4128 break; 4129 case bcmDbgCntTPKTD: 4130 /* 4131 * Although exact HW field absent in TD3 but functionality 4132 * achieved by mapping it to TDBGC3 reg. 4133 */ 4134 _BCM_DEFAULT_BIT_SET(unit, result, 18); 4135 break; 4136 case bcmDbgCntTMIRR: 4137 _BCM_TD3_BIT_SET(unit, result, 47); 4138 _BCM_DEFAULT_BIT_SET(unit, result, 19); 4139 break; 4140 case bcmDbgCntTSIPL: 4141 _BCM_TH3_BIT_SET(unit, result, 20); 4142 _BCM_FB_HB_GW_TRX_BIT_SET(unit, result, 20); 4143 _BCM_RAVEN_BIT_SET(unit, result, 20); 4144 _BCM_DEFAULT_BIT_SET_E_PARAM(unit, result); 4145 break; 4146 case bcmDbgCntTHGUC: 4147 _BCM_TH3_BIT_SET(unit, result, 21); 4148 _BCM_TD3_BIT_SET(unit, result, 48); 4149 _BCM_FB_HB_GW_TRX_BIT_SET(unit, result, 21); 4150 _BCM_DEFAULT_BIT_SET_E_PARAM(unit, result); 4151 break; 4152 case bcmDbgCntTHGMC: 4153 _BCM_TH3_BIT_SET(unit, result, 22); 4154 _BCM_TD3_BIT_SET(unit, result, 49); 4155 _BCM_FB_HB_GW_TRX_BIT_SET(unit, result, 22); 4156 _BCM_DEFAULT_BIT_SET_E_PARAM(unit, result); 4157 break; 4158 case bcmDbgCntTHIGIG2: 4159 _BCM_TH3_BIT_SET(unit, result, 23); 4160 _BCM_TD3_BIT_SET(unit, result, 27); 4161 _BCM_HB_GW_TRX_BIT_SET(unit, result, 23); 4162 _BCM_DEFAULT_BIT_SET_E_PARAM(unit, result); 4163 break; 4164 case bcmDbgCntTHGI: 4165 _BCM_TH3_BIT_SET(unit, result, 24); 4166 _BCM_TD3_BIT_SET(unit, result, 26); 4167 _BCM_HB_GW_TRX_BIT_SET(unit, result, 24); 4168 _BCM_DEFAULT_BIT_SET_E_PARAM(unit, result); 4169 break; 4170 case bcmDbgCntTL2_MTU: 4171 _BCM_TH3_BIT_SET(unit, result, 25); 4172 _BCM_TD3_BIT_SET(unit, result, 15); 4173 _BCM_HB_GW_TRX_BIT_SET(unit, result, 25); 4174 _BCM_DEFAULT_BIT_SET_E_PARAM(unit, result); 4175 break; 4176 case bcmDbgCntTPARITY_ERR: 4177 _BCM_TH3_BIT_SET(unit, result, 26); 4178 _BCM_TD3_BIT_SET(unit, result, 16); 4179 _BCM_HB_GW_TRX_BIT_SET(unit, result, 26); 4180 _BCM_DEFAULT_BIT_SET_E_PARAM(unit, result); 4181 break; 4182 case bcmDbgCntTIP_LEN_FAIL: 4183 _BCM_TH3_BIT_SET(unit, result, 27); 4184 _BCM_HB_GW_TRX_BIT_SET(unit, result, 27); 4185 _BCM_DEFAULT_BIT_SET_E_PARAM(unit, result); 4186 break; 4187 case bcmDbgCntTMTUD: 4188 _BCM_DEFAULT_BIT_SET_E_PARAM(unit, result); 4189 break; 4190 case bcmDbgCntTSLLD: 4191 _BCM_TD3_BIT_SET(unit, result, 29); 4192 _BCM_DEFAULT_BIT_SET_E_PARAM(unit, result); 4193 break; 4194 case bcmDbgCntTL2MPLS: 4195 _BCM_DEFAULT_BIT_SET_E_PARAM(unit, result); 4196 break; 4197 case bcmDbgCntTL3MPLS: 4198 _BCM_DEFAULT_BIT_SET_E_PARAM(unit, result); 4199 break; 4200 case bcmDbgCntTMPLS: 4201 _BCM_DEFAULT_BIT_SET_E_PARAM(unit, result); 4202 break; 4203 case bcmDbgCntTMODIDTOOLARGEDROP: 4204 _BCM_TH3_BIT_SET(unit, result, 28); /* TMODID_GRT_31 */ 4205 _BCM_TRX_BIT_SET(unit, result, 28); 4206 _BCM_DEFAULT_BIT_SET_E_PARAM(unit, result); 4207 break; 4208 case bcmDbgCntPKTMODTOOLARGEDROP: 4209 _BCM_TD3_BIT_SET(unit, result, 19); 4210 _BCM_TH3_BIT_SET(unit, result, 29); /* TEP_ADDITIONS_TOO_LARGE */ 4211 _BCM_TRX_BIT_SET(unit, result, 29); 4212 _BCM_DEFAULT_BIT_SET_E_PARAM(unit, result); 4213 break; 4214 case bcmDbgCntEcnTxError: 4215 _BCM_GH_BIT_SET(unit, result, 30); 4216 _BCM_DEFAULT_BIT_SET_E_PARAM(unit, result); 4217 break; 4218 case bcmDbgCntNivTxPrune: 4219 _BCM_GH_BIT_SET(unit, result, 31); 4220 _BCM_DEFAULT_BIT_SET_E_PARAM(unit, result); 4221 break; 4222 case bcmDbgCntFcmPortClass2TxFrames: 4223 _BCM_TD3_BIT_SET(unit, result, 50); 4224 _BCM_TD2_BIT_SET(unit, result, 31); 4225 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4226 break; 4227 case bcmDbgCntFcmPortClass3TxFrames: 4228 _BCM_TD3_BIT_SET(unit, result, 51); 4229 _BCM_TD2_BIT_SET(unit, result, 32); 4230 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4231 break; 4232 case bcmDbgCntEgressProtectionDataDrop: 4233 _BCM_TD3_BIT_SET(unit, result, 32); 4234 _BCM_TD2_BIT_SET(unit, result, 37); 4235 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4236 break; 4237 case bcmDbgCntTxFwdDomainNotFoundDrop: 4238 _BCM_TD3_BIT_SET(unit, result, 3); 4239 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4240 break; 4241 case bcmDbgCntTxNotFwdDomainMemberDrop: 4242 _BCM_TD3_BIT_SET(unit, result, 4); 4243 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4244 break; 4245 case bcmDbgCntTxIpmcL2SrcPortPruneDrop: 4246 _BCM_TD3_BIT_SET(unit, result, 6); 4247 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4248 break; 4249 case bcmDbgCntTxNonUnicastPruneDrop: 4250 _BCM_TD3_BIT_SET(unit, result, 7); 4251 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4252 break; 4253 case bcmDbgCntTxSvpRemoveDrop: 4254 _BCM_TD3_BIT_SET(unit, result, 8); 4255 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4256 break; 4257 case bcmDbgCntTxVplagPruneDrop: 4258 _BCM_TD3_BIT_SET(unit, result, 9); 4259 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4260 break; 4261 case bcmDbgCntTxSplitHorizonDrop: 4262 _BCM_TD3_BIT_SET(unit, result, 10); 4263 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4264 break; 4265 case bcmDbgCntTxMmuPurgeDrop: 4266 _BCM_TD3_BIT_SET(unit, result, 12); 4267 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4268 break; 4269 case bcmDbgCntTxStgDisableDrop: 4270 _BCM_TD3_BIT_SET(unit, result, 13); 4271 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4272 break; 4273 case bcmDbgCntTxEgressPortDrop: 4274 _BCM_TD3_BIT_SET(unit, result, 17); 4275 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4276 break; 4277 case bcmDbgCntTxEgressFilterDrop: 4278 _BCM_TD3_BIT_SET(unit, result, 18); 4279 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4280 break; 4281 case bcmDbgCntTxVisibilityDrop: 4282 _BCM_TD3_BIT_SET(unit, result, 23); 4283 _BCM_DEFAULT_BIT_SET_E_PARAM (unit, result); 4284 break; 4285 4286 default: 4287 return BCM_E_PARAM; 4288 } 4289 return BCM_E_NONE; 4290 4291 } 4292 return BCM_E_PARAM; 4293 } 4294 4295 #if defined(BCM_TRIDENT3_SUPPORT) || defined(BCM_TOMAHAWK3_SUPPORT) 4296 STATIC int 4297 _bcm_td3_stat_custom_change_update(int unit, int sel_idx, 4298 bcm_custom_stat_trigger_t trigger, int value) 4299 { 4300 uint32 ctr_sel, sel_bmp, ctrl_bmp[2] = {0}; 4301 4302 /* Defined in TDBGC_TRIGGERS, EP_EGR_DROP_VECTOR, EGR_STATS_FORMAT */ 4303 if (trigger == bcmDbgCntTPKTD) { 4304 ctrl_bmp[0] = 0xffffffff; 4305 ctrl_bmp[1] = 0xff; 4306 } 4307 4308 SOC_IF_ERROR_RETURN(soc_reg32_get(unit, bcm_dbg_cntr_tx[sel_idx].select, 4309 REG_PORT_ANY, 0, &ctr_sel)); 4310 sel_bmp = soc_reg_field_get(unit, bcm_dbg_cntr_tx[sel_idx].select, 4311 ctr_sel, BITMAPf); 4312 4313 sel_bmp = (value) ? (sel_bmp | ctrl_bmp[0]) : 4314 (sel_bmp & (~ctrl_bmp[0])); 4315 4316 soc_reg_field_set(unit, bcm_dbg_cntr_tx[sel_idx].select, 4317 &ctr_sel, BITMAPf, sel_bmp); 4318 SOC_IF_ERROR_RETURN(soc_reg32_set(unit, bcm_dbg_cntr_tx[sel_idx].select, 4319 REG_PORT_ANY, 0, ctr_sel)); 4320 4321 SOC_IF_ERROR_RETURN(READ_TDBGC_SELECT_2r(unit, sel_idx, &ctr_sel)); 4322 sel_bmp = soc_reg_field_get(unit, TDBGC_SELECT_2r, 4323 ctr_sel, BITMAPf); 4324 4325 sel_bmp = (value) ? (sel_bmp | ctrl_bmp[1]) : 4326 (sel_bmp & (~ctrl_bmp[1])); 4327 4328 soc_reg_field_set(unit, TDBGC_SELECT_2r, 4329 &ctr_sel, BITMAPf, sel_bmp); 4330 return (WRITE_TDBGC_SELECT_2r(unit, sel_idx, ctr_sel)); 4331 4332 } 4333 4334 STATIC int 4335 _bcm_td3_stat_custom_change(int unit, bcm_stat_val_t type, 4336 bcm_custom_stat_trigger_t trigger, int value) 4337 { 4338 uint32 ctr_sel, ctrl_bmp, result; 4339 int i; 4340 4341 for (i = 0; i < COUNTOF(bcm_dbg_cntr_rx); i++) { 4342 if (bcm_dbg_cntr_rx[i].counter == type) { 4343 4344 if (trigger == bcmDbgCntRIMDR) { 4345 /* Unknown Multicast is counted in PFM counter */ 4346 SOC_IF_ERROR_RETURN(READ_RDBGC_SELECT_3r(unit, i, &ctr_sel)); 4347 ctrl_bmp = soc_reg_field_get(unit, RDBGC_SELECT_3r, 4348 ctr_sel, BITMAPf); 4349 ctrl_bmp = (value) ? (ctrl_bmp | (1 << 16)) : /* add */ 4350 (ctrl_bmp & (~(1 << 16))); /* delete */ 4351 4352 soc_reg_field_set(unit, RDBGC_SELECT_3r, 4353 &ctr_sel, BITMAPf, ctrl_bmp); 4354 SOC_IF_ERROR_RETURN(WRITE_RDBGC_SELECT_3r(unit, i, ctr_sel)); 4355 } 4356 4357 SOC_IF_ERROR_RETURN(_bcm_stat_custom_to_bit 4358 (unit, _DBG_CNT_RX_CHAN, trigger, &result)); 4359 4360 if (result < 32) { 4361 SOC_IF_ERROR_RETURN(soc_reg32_get(unit, bcm_dbg_cntr_rx[i].select, 4362 REG_PORT_ANY, 0, &ctr_sel)); 4363 4364 ctrl_bmp = soc_reg_field_get(unit, bcm_dbg_cntr_rx[i].select, 4365 ctr_sel, BITMAPf); 4366 ctrl_bmp = (value) ? (ctrl_bmp | (1 << result)) : /* add */ 4367 (ctrl_bmp & (~(1 << result))); /* delete */ 4368 4369 soc_reg_field_set(unit, bcm_dbg_cntr_rx[i].select, 4370 &ctr_sel, BITMAPf, ctrl_bmp); 4371 return soc_reg32_set(unit, bcm_dbg_cntr_rx[i].select, 4372 REG_PORT_ANY, 0, ctr_sel); 4373 } else if (result < 64) { 4374 SOC_IF_ERROR_RETURN(READ_RDBGC_SELECT_2r(unit, i, &ctr_sel)); 4375 ctrl_bmp = soc_reg_field_get(unit, RDBGC_SELECT_2r, 4376 ctr_sel, BITMAPf); 4377 result -= 32; 4378 ctrl_bmp = (value) ? (ctrl_bmp | (1 << result)) : /* add */ 4379 (ctrl_bmp & (~(1 << result))); /* delete */ 4380 4381 soc_reg_field_set(unit, RDBGC_SELECT_2r, 4382 &ctr_sel, BITMAPf, ctrl_bmp); 4383 return (WRITE_RDBGC_SELECT_2r(unit, i, ctr_sel)); 4384 } else if (result < 96) { 4385 SOC_IF_ERROR_RETURN(READ_RDBGC_SELECT_3r(unit, i, &ctr_sel)); 4386 ctrl_bmp = soc_reg_field_get(unit, RDBGC_SELECT_3r, 4387 ctr_sel, BITMAPf); 4388 result -= 64; 4389 ctrl_bmp = (value) ? (ctrl_bmp | (1 << result)) : /* add */ 4390 (ctrl_bmp & (~(1 << result))); /* delete */ 4391 4392 soc_reg_field_set(unit, RDBGC_SELECT_3r, 4393 &ctr_sel, BITMAPf, ctrl_bmp); 4394 return (WRITE_RDBGC_SELECT_3r(unit, i, ctr_sel)); 4395 } else if (result < 128) { 4396 SOC_IF_ERROR_RETURN(READ_RDBGC_SELECT_4r(unit, i, &ctr_sel)); 4397 ctrl_bmp = soc_reg_field_get(unit, RDBGC_SELECT_4r, 4398 ctr_sel, BITMAPf); 4399 result -= 96; 4400 ctrl_bmp = (value) ? (ctrl_bmp | (1 << result)) : /* add */ 4401 (ctrl_bmp & (~(1 << result))); /* delete */ 4402 4403 soc_reg_field_set(unit, RDBGC_SELECT_4r, 4404 &ctr_sel, BITMAPf, ctrl_bmp); 4405 return (WRITE_RDBGC_SELECT_4r(unit, i, ctr_sel)); 4406 } else { 4407 return BCM_E_PARAM; 4408 } 4409 } 4410 } 4411 4412 for (i = 0; i < COUNTOF(bcm_dbg_cntr_tx); i++) { 4413 if (bcm_dbg_cntr_tx[i].counter == type) { 4414 SOC_IF_ERROR_RETURN(_bcm_stat_custom_to_bit(unit, 4415 _DBG_CNT_TX_CHAN, trigger, &result)); 4416 4417 if (SOC_IS_TRIDENT3X(unit) && trigger == bcmDbgCntTPKTD) { 4418 return _bcm_td3_stat_custom_change_update(unit, i, trigger, value); 4419 } 4420 4421 if (result < 32) { 4422 SOC_IF_ERROR_RETURN(soc_reg32_get(unit, bcm_dbg_cntr_tx[i].select, 4423 REG_PORT_ANY, 0, &ctr_sel)); 4424 ctrl_bmp = soc_reg_field_get(unit, bcm_dbg_cntr_tx[i].select, 4425 ctr_sel, BITMAPf); 4426 4427 ctrl_bmp = (value) ? (ctrl_bmp | (1 << result)) : /* add */ 4428 (ctrl_bmp & (~(1 << result))); /* delete */ 4429 4430 if(SOC_IS_TRIDENT3X(unit)) { 4431 /* Special handlings for TD3 */ 4432 if (trigger == bcmDbgCntTSTGD) { 4433 /* STG drop is divided into two part, original bit 5 only cover STG block drop, 4434 bit 13 cover STP disable drop */ 4435 ctrl_bmp = (value) ? (ctrl_bmp | (1 << 13)) : /* add */ 4436 (ctrl_bmp & (~(1 << 13))); /* delete */ 4437 } 4438 if (trigger == bcmDbgCntTVXLTMD) { 4439 /* 4440 * bcmDbgCntTVXLTMD covers EgressVlanTranslate1 lookup 4441 * miss drop and EgressVlanTranslate2 lookup miss drop 4442 */ 4443 ctrl_bmp = (value) ? (ctrl_bmp | (1 << 1)) : /* add */ 4444 (ctrl_bmp & (~(1 << 1))); /* delete */ 4445 4446 } 4447 } 4448 soc_reg_field_set(unit, bcm_dbg_cntr_tx[i].select, 4449 &ctr_sel, BITMAPf, ctrl_bmp); 4450 return soc_reg32_set(unit, bcm_dbg_cntr_tx[i].select, 4451 REG_PORT_ANY, 0, ctr_sel); 4452 } else if (result < 64) { 4453 SOC_IF_ERROR_RETURN(READ_TDBGC_SELECT_2r(unit, i, &ctr_sel)); 4454 ctrl_bmp = soc_reg_field_get(unit, TDBGC_SELECT_2r, 4455 ctr_sel, BITMAPf); 4456 result -= 32; 4457 ctrl_bmp = (value) ? (ctrl_bmp | (1 << result)) : /* add */ 4458 (ctrl_bmp & (~(1 << result))); /* delete */ 4459 4460 soc_reg_field_set(unit, TDBGC_SELECT_2r, 4461 &ctr_sel, BITMAPf, ctrl_bmp); 4462 return (WRITE_TDBGC_SELECT_2r(unit, i, ctr_sel)); 4463 } else { 4464 return BCM_E_PARAM; 4465 } 4466 } 4467 } 4468 4469 return BCM_E_PARAM; 4470 } 4471 4472 STATIC int 4473 _bcm_td3_stat_custom_check(int unit, bcm_stat_val_t type, 4474 bcm_custom_stat_trigger_t trigger, int *result) 4475 { 4476 uint32 ctr_sel, res; 4477 int i; 4478 4479 for (i = 0; i < COUNTOF(bcm_dbg_cntr_rx); i++) { 4480 if (bcm_dbg_cntr_rx[i].counter == type) { 4481 SOC_IF_ERROR_RETURN( 4482 _bcm_stat_custom_to_bit(unit, _DBG_CNT_RX_CHAN, trigger, &res)); 4483 4484 if (res < 32) { 4485 SOC_IF_ERROR_RETURN(soc_reg32_get(unit, bcm_dbg_cntr_rx[i].select, 4486 REG_PORT_ANY, 0, &ctr_sel)); 4487 *result = ((ctr_sel & (1 << res)) != 0); 4488 return BCM_E_NONE; 4489 } else if (res < 64) { 4490 SOC_IF_ERROR_RETURN(READ_RDBGC_SELECT_2r(unit, i, &ctr_sel)); 4491 res -= 32; 4492 *result = ((ctr_sel & (1 << res)) != 0); 4493 return BCM_E_NONE; 4494 } else if (res < 96) { 4495 SOC_IF_ERROR_RETURN(READ_RDBGC_SELECT_3r(unit, i, &ctr_sel)); 4496 res -= 64; 4497 *result = ((ctr_sel & (1 << res)) != 0); 4498 return BCM_E_NONE; 4499 } else if (res < 128) { 4500 SOC_IF_ERROR_RETURN(READ_RDBGC_SELECT_4r(unit, i, &ctr_sel)); 4501 res -= 96; 4502 *result = ((ctr_sel & (1 << res)) != 0); 4503 return BCM_E_NONE; 4504 } else { 4505 return BCM_E_PARAM; 4506 } 4507 } 4508 } 4509 4510 for (i = 0; i < COUNTOF(bcm_dbg_cntr_tx); i++) { 4511 if (bcm_dbg_cntr_tx[i].counter == type) { 4512 SOC_IF_ERROR_RETURN( 4513 _bcm_stat_custom_to_bit(unit, _DBG_CNT_TX_CHAN, trigger, &res)); 4514 if (res < 32) { 4515 SOC_IF_ERROR_RETURN(soc_reg32_get(unit, bcm_dbg_cntr_tx[i].select, 4516 REG_PORT_ANY, 0, &ctr_sel)); 4517 *result = ((ctr_sel & (1 << res)) != 0); 4518 return BCM_E_NONE; 4519 } 4520 else if (res < 64) { 4521 SOC_IF_ERROR_RETURN(READ_TDBGC_SELECT_2r(unit, i, &ctr_sel)); 4522 res -= 32; 4523 *result = ((ctr_sel & (1 << res)) != 0); 4524 return BCM_E_NONE; 4525 } 4526 else { 4527 return BCM_E_PARAM; 4528 } 4529 } 4530 } 4531 return BCM_E_PARAM; 4532 } 4533 #endif /* BCM_TRIDENT3_SUPPORT || BCM_TOMAHAWK3_SUPPORT */ 4534 4535 /* 4536 * Function: 4537 * _bcm_stat_custom_change 4538 * Description: 4539 * Add a certain packet type to debug counter to count 4540 * Parameters: 4541 * unit - StrataSwitch PCI device unit number. 4542 * port - Port number (unused). 4543 * type - SNMP statistics type. 4544 * trigger - The counter select value 4545 * (see stat.h for bit definitions). 4546 * Returns: 4547 * BCM_E_XXX 4548 */ 4549 STATIC int 4550 _bcm_stat_custom_change(int unit, bcm_port_t port, bcm_stat_val_t type, 4551 bcm_custom_stat_trigger_t trigger, int value) 4552 { 4553 #ifdef BCM_XGS3_SWITCH_SUPPORT 4554 uint32 ctr_sel, ctrl_bmp, result, mask; 4555 int i; 4556 #if defined(BCM_TRIUMPH_SUPPORT) || defined(BCM_SCORPION_SUPPORT) 4557 uint64 ctr_sel_64, ctrl_bmp_64; 4558 int rdbgc_sel2_64 = SOC_REG_IS_VALID(unit, RDBGC_SELECT_2_64r); 4559 #endif /* BCM_TRIUMPH_SUPPORT || BCM_SCORPION_SUPPORT */ 4560 4561 #if defined(BCM_TRIDENT3_SUPPORT) || defined(BCM_TOMAHAWK3_SUPPORT) 4562 if (SOC_IS_TRIDENT3X(unit) || SOC_IS_TOMAHAWK3(unit)) { 4563 return(_bcm_td3_stat_custom_change(unit, type, trigger, value)); 4564 } 4565 #endif /* BCM_TRIDENT3_SUPPORT || BCM_TOMAHAWK3_SUPPORT */ 4566 4567 for (i = 0; i < COUNTOF(bcm_dbg_cntr_rx); i++) { 4568 if (bcm_dbg_cntr_rx[i].counter == type) { 4569 SOC_IF_ERROR_RETURN( 4570 _bcm_stat_custom_to_bit(unit, _DBG_CNT_RX_CHAN, trigger, &result)); 4571 4572 if (result < 32) { 4573 SOC_IF_ERROR_RETURN(soc_reg32_get(unit, bcm_dbg_cntr_rx[i].select, 4574 REG_PORT_ANY, 0, &ctr_sel)); 4575 4576 ctrl_bmp = soc_reg_field_get(unit, bcm_dbg_cntr_rx[i].select, 4577 ctr_sel, BITMAPf); 4578 ctrl_bmp = (value) ? (ctrl_bmp | (1 << result)) : /* add */ 4579 (ctrl_bmp & (~(1 << result))); /* delete */ 4580 4581 soc_reg_field_set(unit, bcm_dbg_cntr_rx[i].select, 4582 &ctr_sel, BITMAPf, ctrl_bmp); 4583 return soc_reg32_set(unit, bcm_dbg_cntr_rx[i].select, 4584 REG_PORT_ANY, 0, ctr_sel); 4585 } 4586 #if defined(BCM_TRIUMPH_SUPPORT) || defined(BCM_SCORPION_SUPPORT) 4587 else if (SOC_IS_TRX(unit) && (result < 65)) { 4588 /* 4589 * result < 65 check is required because the only device (Apache) 4590 * having RDBGC_SELECT_2_64 register has its width as 33 bits 4591 * and not 64 bits (in which case the check should be (result<96) 4592 */ 4593 if (rdbgc_sel2_64) { 4594 uint64 tmp; 4595 SOC_IF_ERROR_RETURN(READ_RDBGC_SELECT_2_64r(unit, i, 4596 &ctr_sel_64)); 4597 ctrl_bmp_64 = soc_reg64_field_get(unit, RDBGC_SELECT_2_64r, 4598 ctr_sel_64, BITMAPf); 4599 result -= 32; 4600 if (value) { /* add */ 4601 COMPILER_64_SET(tmp, 0, 1); 4602 COMPILER_64_SHL(tmp, result); 4603 COMPILER_64_OR(ctrl_bmp_64, tmp); 4604 } else { /* delete */ 4605 COMPILER_64_SET(tmp, 0, 1); 4606 COMPILER_64_SHL(tmp, result); 4607 COMPILER_64_NOT(tmp); 4608 COMPILER_64_AND(ctrl_bmp_64, tmp); 4609 } 4610 4611 soc_reg64_field_set(unit, RDBGC_SELECT_2_64r, 4612 &ctr_sel_64, BITMAPf, ctrl_bmp_64); 4613 return (WRITE_RDBGC_SELECT_2_64r(unit, i, ctr_sel_64)); 4614 } else if (result < 64) { 4615 SOC_IF_ERROR_RETURN(READ_RDBGC_SELECT_2r(unit, i, &ctr_sel)); 4616 ctrl_bmp = soc_reg_field_get(unit, RDBGC_SELECT_2r, 4617 ctr_sel, BITMAPf); 4618 result -= 32; 4619 ctrl_bmp = (value) ? (ctrl_bmp | (1 << result)) : /* add */ 4620 (ctrl_bmp & (~(1 << result))); /* delete */ 4621 4622 soc_reg_field_set(unit, RDBGC_SELECT_2r, 4623 &ctr_sel, BITMAPf, ctrl_bmp); 4624 return (WRITE_RDBGC_SELECT_2r(unit, i, ctr_sel)); 4625 } 4626 } 4627 #endif /* BCM_TRIUMPH_SUPPORT || BCM_SCORPION_SUPPORT */ 4628 else { 4629 return BCM_E_PARAM; 4630 } 4631 } 4632 } 4633 4634 for (i = 0; i < COUNTOF(bcm_dbg_cntr_tx); i++) { 4635 if (bcm_dbg_cntr_tx[i].counter == type) { 4636 SOC_IF_ERROR_RETURN( 4637 _bcm_stat_custom_to_bit(unit, _DBG_CNT_TX_CHAN, trigger, &result)); 4638 4639 if (result < 32) { 4640 SOC_IF_ERROR_RETURN(soc_reg32_get(unit, bcm_dbg_cntr_tx[i].select, 4641 REG_PORT_ANY, 0, &ctr_sel)); 4642 ctrl_bmp = soc_reg_field_get(unit, bcm_dbg_cntr_tx[i].select, 4643 ctr_sel, BITMAPf); 4644 4645 if (value) { /* called from stat_custom_add */ 4646 mask = (1 << result); 4647 ctrl_bmp |= mask; 4648 } else { /* called from stat_custom_delete */ 4649 mask = ~(1 << result); 4650 ctrl_bmp &= mask; 4651 } 4652 soc_reg_field_set(unit, bcm_dbg_cntr_tx[i].select, 4653 &ctr_sel, BITMAPf, ctrl_bmp); 4654 return soc_reg32_set(unit, bcm_dbg_cntr_tx[i].select, 4655 REG_PORT_ANY, 0, ctr_sel); 4656 } 4657 #if defined(BCM_TRIDENT2_SUPPORT) 4658 else if (SOC_IS_TD2_TT2(unit) && result < 64) { 4659 SOC_IF_ERROR_RETURN(READ_TDBGC_SELECT_2r(unit, i, &ctr_sel)); 4660 ctrl_bmp = soc_reg_field_get(unit, TDBGC_SELECT_2r, 4661 ctr_sel, BITMAPf); 4662 result -= 32; 4663 ctrl_bmp = (value) ? (ctrl_bmp | (1 << result)) : /* add */ 4664 (ctrl_bmp & (~(1 << result))); /* delete */ 4665 4666 soc_reg_field_set(unit, TDBGC_SELECT_2r, 4667 &ctr_sel, BITMAPf, ctrl_bmp); 4668 return (WRITE_TDBGC_SELECT_2r(unit, i, ctr_sel)); 4669 } 4670 #endif /* BCM_TRIDENT2_SUPPORT */ 4671 else { 4672 return BCM_E_PARAM; 4673 } 4674 } 4675 } 4676 4677 #endif /* BCM_XGS3_SWITCH_SUPPORT */ 4678 return BCM_E_PARAM; 4679 } 4680 4681 #if defined(BCM_TRIDENT3_SUPPORT) || defined(BCM_TOMAHAWK3_SUPPORT) 4682 /* 4683 * Function: 4684 * _bcm_esw_stat_custom_rsv_add 4685 * Description: 4686 * Add a certain packet type to SDK reserved debug counter to count 4687 * Parameters: 4688 * unit - StrataSwitch PCI device unit number. 4689 * port - Port number (unused). 4690 * type - SNMP statistics type. 4691 * trigger - The counter select value 4692 * (see stat.h for bit definitions). 4693 * Returns: 4694 * BCM_E_XXX 4695 */ 4696 STATIC int 4697 _bcm_esw_stat_custom_rsv_add(int unit, bcm_port_t port, bcm_stat_val_t type, 4698 bcm_custom_stat_trigger_t trigger) 4699 { 4700 #ifdef BCM_XGS3_SWITCH_SUPPORT 4701 4702 if (!SOC_IS_XGS3_SWITCH(unit)) { 4703 return BCM_E_UNAVAIL; 4704 } 4705 4706 if (!_DBG_CNTR_IS_VALID(unit, type)) { 4707 return BCM_E_PARAM; 4708 } 4709 /* port = -1 is valid port in that case */ 4710 if ((port != -1)) { 4711 BCM_IF_ERROR_RETURN( 4712 _bcm_esw_stat_gport_validate(unit, port, &port)); 4713 } 4714 return _bcm_stat_custom_change(unit, port, type, trigger, 1); 4715 #else 4716 return BCM_E_UNAVAIL; 4717 4718 #endif /* BCM_XGS3_SWITCH_SUPPORT */ 4719 } 4720 #endif /* BCM_TRIDENT3_SUPPORT || BCM_TOMAHAWK3_SUPPORT */ 4721 4722 4723 4724 /* 4725 * Function: 4726 * bcm_esw_stat_custom_add 4727 * Description: 4728 * Add a certain packet type to debug counter to count 4729 * Parameters: 4730 * unit - StrataSwitch PCI device unit number. 4731 * port - Port number (unused). 4732 * type - SNMP statistics type. 4733 * trigger - The counter select value 4734 * (see stat.h for bit definitions). 4735 * Returns: 4736 * BCM_E_XXX 4737 */ 4738 int 4739 bcm_esw_stat_custom_add(int unit, bcm_port_t port, bcm_stat_val_t type, 4740 bcm_custom_stat_trigger_t trigger) 4741 { 4742 #ifdef BCM_XGS3_SWITCH_SUPPORT 4743 4744 if (!SOC_IS_XGS3_SWITCH(unit)) { 4745 return BCM_E_UNAVAIL; 4746 } 4747 4748 if (!_DBG_CNTR_IS_VALID(unit, type)) { 4749 return BCM_E_PARAM; 4750 } 4751 if (_DBG_CNTR_IS_RSV(type)) { 4752 return BCM_E_CONFIG; 4753 } 4754 BCM_IF_ERROR_RETURN( 4755 _bcm_esw_stat_gport_validate(unit, port, &port)); 4756 4757 return _bcm_stat_custom_change(unit, port, type, trigger, 1); 4758 #else 4759 return BCM_E_UNAVAIL; 4760 4761 #endif /* BCM_XGS3_SWITCH_SUPPORT */ 4762 } 4763 /* 4764 * Function: 4765 * bcm_esw_stat_custom_delete 4766 * Description: 4767 * Deletes a certain packet type from debug counter 4768 * Parameters: 4769 * unit - StrataSwitch PCI device unit number. 4770 * port - Port number (unused). 4771 * type - SNMP statistics type. 4772 * trigger - The counter select value 4773 * (see stat.h for bit definitions). 4774 * Returns: 4775 * BCM_E_XXX 4776 */ 4777 int 4778 bcm_esw_stat_custom_delete(int unit, bcm_port_t port,bcm_stat_val_t type, 4779 bcm_custom_stat_trigger_t trigger) 4780 { 4781 #ifdef BCM_XGS3_SWITCH_SUPPORT 4782 4783 if (!SOC_IS_XGS3_SWITCH(unit)) { 4784 return BCM_E_UNAVAIL; 4785 } 4786 4787 if (!_DBG_CNTR_IS_VALID(unit, type)) { 4788 return BCM_E_PARAM; 4789 } 4790 4791 if (_DBG_CNTR_IS_RSV(type)) { 4792 return BCM_E_CONFIG; 4793 } 4794 4795 BCM_IF_ERROR_RETURN( 4796 _bcm_esw_stat_gport_validate(unit, port, &port)); 4797 4798 return _bcm_stat_custom_change(unit, port, type, trigger, 0); 4799 #else 4800 return BCM_E_UNAVAIL; 4801 4802 #endif /* BCM_XGS3_SWITCH_SUPPORT */ 4803 } 4804 4805 /* 4806 * Function: 4807 * bcm_esw_stat_custom_delete_all 4808 * Description: 4809 * Deletes a all packet types from debug counter 4810 * Parameters: 4811 * unit - StrataSwitch PCI device unit number. 4812 * port - Port number (unused). 4813 * type - SNMP statistics type. 4814 * 4815 * Returns: 4816 * BCM_E_XXX 4817 */ 4818 int 4819 bcm_esw_stat_custom_delete_all(int unit, bcm_port_t port,bcm_stat_val_t type) 4820 { 4821 #ifdef BCM_XGS3_SWITCH_SUPPORT 4822 4823 int i; 4824 int res; 4825 4826 for (i = 0; i < bcmDbgCntNum; i++) { 4827 res = bcm_esw_stat_custom_delete(unit, port, type, i); 4828 if (res != BCM_E_NONE && res != BCM_E_UNAVAIL && 4829 res != BCM_E_NOT_FOUND && res != BCM_E_PARAM) { 4830 return res; 4831 } 4832 } 4833 return BCM_E_NONE; 4834 #else 4835 return BCM_E_UNAVAIL; 4836 4837 #endif /* BCM_XGS3_SWITCH_SUPPORT */ 4838 4839 } 4840 4841 /* 4842 * Function: 4843 * bcm_esw_stat_custom_check 4844 * Description: 4845 * Check if certain packet types is part of debug counter 4846 * Parameters: 4847 * unit - StrataSwitch PCI device unit number. 4848 * port - Port number (unused). 4849 * type - SNMP statistics type. 4850 * trigger - The counter select value 4851 * (see stat.h for bit definitions). 4852 * result - [OUT] result of a query. 0 if positive , -1 if negative 4853 * 4854 * Returns: 4855 * BCM_E_XXX 4856 */ 4857 int 4858 bcm_esw_stat_custom_check(int unit, bcm_port_t port, bcm_stat_val_t type, 4859 bcm_custom_stat_trigger_t trigger, int *result) 4860 { 4861 #ifdef BCM_XGS3_SWITCH_SUPPORT 4862 uint32 ctr_sel, ctrl_bmp, res; 4863 int i; 4864 #if defined(BCM_TRIUMPH_SUPPORT) || defined(BCM_SCORPION_SUPPORT) 4865 uint64 ctr_sel_64, ctrl_bmp_64; 4866 int rdbgc_sel2_64 = SOC_REG_IS_VALID(unit, RDBGC_SELECT_2_64r); 4867 #endif /* BCM_TRIUMPH_SUPPORT || BCM_SCORPION_SUPPORT */ 4868 4869 if (!SOC_IS_XGS3_SWITCH(unit)) { 4870 return BCM_E_UNAVAIL; 4871 } 4872 4873 if (!_DBG_CNTR_IS_VALID(unit, type)) { 4874 return BCM_E_PARAM; 4875 } 4876 4877 BCM_IF_ERROR_RETURN( 4878 _bcm_esw_stat_gport_validate(unit, port, &port)); 4879 #if defined(BCM_TRIDENT3_SUPPORT) || defined(BCM_TOMAHAWK3_SUPPORT) 4880 if (SOC_IS_TRIDENT3X(unit) || SOC_IS_TOMAHAWK3(unit)) { 4881 return(_bcm_td3_stat_custom_check(unit, type, trigger, result)); 4882 } 4883 #endif /* BCM_TRIDENT3_SUPPORT || BCM_TOMAHAWK3_SUPPORT */ 4884 for (i = 0; i < COUNTOF(bcm_dbg_cntr_rx); i++) { 4885 if (bcm_dbg_cntr_rx[i].counter == type) { 4886 SOC_IF_ERROR_RETURN( 4887 _bcm_stat_custom_to_bit(unit, _DBG_CNT_RX_CHAN, trigger, &res)); 4888 if (res < 32) { 4889 SOC_IF_ERROR_RETURN(soc_reg32_get(unit, bcm_dbg_cntr_rx[i].select, 4890 REG_PORT_ANY, 0, &ctr_sel)); 4891 ctrl_bmp = soc_reg_field_get(unit, bcm_dbg_cntr_rx[i].select, 4892 ctr_sel, BITMAPf); 4893 *result = ((ctrl_bmp & (1 << res)) != 0); 4894 return BCM_E_NONE; 4895 } 4896 #if defined(BCM_TRIUMPH_SUPPORT) || defined(BCM_SCORPION_SUPPORT) 4897 else if (SOC_IS_TRX(unit) && (res < 65)) { 4898 /* 4899 * res < 65 check is required because the only device (Apache) 4900 * having RDBGC_SELECT_2_64 register has its width as 33 bits 4901 * and not 64 bits (in which case the check should be (res<96) 4902 */ 4903 if (rdbgc_sel2_64) { 4904 uint64 tmp; 4905 SOC_IF_ERROR_RETURN(READ_RDBGC_SELECT_2_64r(unit, i, 4906 &ctr_sel_64)); 4907 ctrl_bmp_64 = soc_reg64_field_get(unit, RDBGC_SELECT_2_64r, 4908 ctr_sel_64, BITMAPf); 4909 res -= 32; 4910 COMPILER_64_SET(tmp, 0, 1); 4911 COMPILER_64_SHL(tmp, res); 4912 COMPILER_64_AND(ctrl_bmp_64, tmp); 4913 *result = !(COMPILER_64_IS_ZERO(ctrl_bmp_64)); 4914 return BCM_E_NONE; 4915 } else if (res < 64) { 4916 SOC_IF_ERROR_RETURN(READ_RDBGC_SELECT_2r(unit, i, &ctr_sel)); 4917 ctrl_bmp = soc_reg_field_get(unit, RDBGC_SELECT_2r, 4918 ctr_sel, BITMAPf); 4919 *result = ((ctrl_bmp & (1 << (res - 32))) != 0); 4920 return BCM_E_NONE; 4921 } 4922 } 4923 #endif /* BCM_TRIUMPH_SUPPORT || BCM_SCORPION_SUPPORT */ 4924 else { 4925 return BCM_E_PARAM; 4926 } 4927 } 4928 } 4929 4930 for (i = 0; i < COUNTOF(bcm_dbg_cntr_tx); i++) { 4931 if (bcm_dbg_cntr_tx[i].counter == type) { 4932 SOC_IF_ERROR_RETURN( 4933 _bcm_stat_custom_to_bit(unit, _DBG_CNT_TX_CHAN, trigger, &res)); 4934 4935 if (res < 32) { 4936 SOC_IF_ERROR_RETURN(soc_reg32_get(unit, bcm_dbg_cntr_tx[i].select, 4937 REG_PORT_ANY, 0, &ctr_sel)); 4938 ctrl_bmp = soc_reg_field_get(unit, bcm_dbg_cntr_tx[i].select, 4939 ctr_sel, BITMAPf); 4940 4941 *result = ((ctrl_bmp & (1 << res)) != 0); 4942 return BCM_E_NONE; 4943 } 4944 #if defined(BCM_TRIDENT2_SUPPORT) 4945 else if (SOC_IS_TD2_TT2(unit) && res < 64) { 4946 SOC_IF_ERROR_RETURN(READ_TDBGC_SELECT_2r(unit, i, &ctr_sel)); 4947 ctrl_bmp = soc_reg_field_get(unit, TDBGC_SELECT_2r, 4948 ctr_sel, BITMAPf); 4949 *result = ((ctrl_bmp & (1 << (res - 32))) != 0); 4950 return BCM_E_NONE; 4951 } 4952 #endif /* BCM_TRIDENT2_SUPPORT */ 4953 else { 4954 return BCM_E_PARAM; 4955 } 4956 } 4957 } 4958 return BCM_E_PARAM; 4959 #else 4960 return BCM_E_UNAVAIL; 4961 4962 #endif /* BCM_XGS3_SWITCH_SUPPORT */ 4963 } 4964 4965 4966 /* 4967 * Function: 4968 * 4969 * _bcm_esw_stat_ovr_error_control_set 4970 * 4971 * Description: 4972 * 4973 * Sets Oversize error count flag to include/exclude oversized valid packets 4974 * Oversize packet count increments (ROVRr, TOVRr), when the packet size 4975 * exceeds port cnt size (PORT_CNTSIZEr). 4976 * This function controls the inclusion of oversize packet counts as part of 4977 * of packet errors. 4978 * 4979 * Caution: By default the cotrol flag will be TRUE to include 4980 * oversize valid packets as oversize errors. 4981 * The users can turn off this flag to exclude oversize packet errors, 4982 * which will differ from MIB RFC, which states that any packet greater 4983 * than the size of 1518 are considered as oversize errors. 4984 * 4985 * Parameters: 4986 * 4987 * unit - unit number 4988 * port - local port number 4989 * value - oversize error control flag 4990 * 4991 * Returns: 4992 * 4993 * BCM_E_NONE 4994 */ 4995 int 4996 _bcm_esw_stat_ovr_error_control_set(int unit, bcm_port_t port, int value) 4997 { 4998 if (_bcm_stat_ovr_control == NULL) { 4999 return BCM_E_INIT; 5000 } 5001 5002 if (port == CMIC_PORT(unit)) { /* Not supported on CMIC */ 5003 return BCM_E_PORT; 5004 } 5005 5006 if (value) { 5007 /* Set ovr control bit map for the port */ 5008 _BCM_STAT_OVR_CONTROL_SET(unit, port); 5009 } else { 5010 /* Set ovr control bit map for the port */ 5011 _BCM_STAT_OVR_CONTROL_CLR(unit, port); 5012 } 5013 5014 return BCM_E_NONE; 5015 } 5016 5017 /* 5018 * Function: 5019 * _bcm_esw_stat_ovr_error_control_get 5020 * Description: 5021 * Get _bcm_stat_ovr_threshold for the given unit and port. 5022 * Parameters: 5023 * unit - unit number 5024 * port - local port number 5025 * value - (OUT) pointer to oversize threshold 5026 * Returns: 5027 * BCM_E_NONE 5028 */ 5029 int 5030 _bcm_esw_stat_ovr_error_control_get(int unit, bcm_port_t port, int *value) 5031 { 5032 if (_bcm_stat_ovr_control == NULL) { 5033 return BCM_E_INIT; 5034 } 5035 5036 if (port == CMIC_PORT(unit)) { /* Not supported on CMIC */ 5037 return BCM_E_PORT; 5038 } 5039 5040 /* Get ovr control bit for the port */ 5041 *value = ((_BCM_STAT_OVR_CONTROL_GET(unit, port)) ? 1 : 0); 5042 5043 return BCM_E_NONE; 5044 } 5045 5046 5047 /* 5048 * Function: 5049 * _bcm_esw_stat_ovr_threshold_set 5050 * Description: 5051 * Set _bcm_stat_ovr_threshold for the given unit and port. 5052 * Parameters: 5053 * unit - unit number 5054 * port - local port number 5055 * value - oversize threshold 5056 * Returns: 5057 * BCM_E_NONE 5058 */ 5059 int 5060 _bcm_esw_stat_ovr_threshold_set(int unit, bcm_port_t port, int value) 5061 { 5062 if ((_bcm_stat_ovr_threshold == NULL) || 5063 (_bcm_stat_ovr_threshold[unit] == NULL)) { 5064 return BCM_E_INIT; 5065 } 5066 5067 if (port == CMIC_PORT(unit)) { /* Not supported on CMIC */ 5068 return BCM_E_PORT; 5069 } 5070 5071 _bcm_stat_ovr_threshold[unit][port] = value; 5072 5073 /* Call Port Control module */ 5074 if (SOC_USE_PORTCTRL(unit)) { 5075 return (bcmi_esw_portctrl_cntmaxsize_set(unit, port, value)); 5076 } 5077 5078 #ifdef BCM_XGS3_SWITCH_SUPPORT 5079 if (SOC_IS_XGS3_SWITCH(unit)) { 5080 uint64 value64; 5081 int blk; 5082 bcm_pbmp_t blk_bitmap; 5083 bcm_port_t pix; 5084 5085 #if defined (BCM_TOMAHAWK_SUPPORT) || defined (BCM_APACHE_SUPPORT) 5086 if (SOC_IS_TOMAHAWKX(unit) || SOC_IS_APACHE(unit) || SOC_IS_TRIDENT3X(unit)) { 5087 if (IS_CL_PORT(unit, port) || IS_CLG2_PORT(unit, port)) { 5088 SOC_IF_ERROR_RETURN(WRITE_CLPORT_CNTMAXSIZEr(unit, port, value)); 5089 } else { 5090 SOC_IF_ERROR_RETURN(WRITE_XLPORT_CNTMAXSIZEr(unit, port, value)); 5091 } 5092 } else 5093 #endif /* BCM_TOMAHAWK_SUPPORT || BCM_APACHE_SUPPORT */ 5094 5095 if (SOC_IS_TD2_TT2(unit)) { 5096 SOC_IF_ERROR_RETURN(WRITE_PGW_CNTMAXSIZEr(unit, port, value)); 5097 } else if (soc_feature(unit, soc_feature_unified_port) && 5098 !SOC_IS_HURRICANE2(unit) && !SOC_IS_GREYHOUND(unit) && 5099 !SOC_IS_HURRICANE3(unit) && !SOC_IS_GREYHOUND2(unit)) { 5100 SOC_IF_ERROR_RETURN 5101 (WRITE_PORT_CNTMAXSIZEr(unit, port, value)); 5102 #if defined (BCM_KATANA_SUPPORT) || defined(BCM_KATANA2_SUPPORT) 5103 } else if (SOC_IS_KATANAX(unit) && IS_MXQ_PORT(unit,port)) { 5104 SOC_IF_ERROR_RETURN 5105 (WRITE_X_GPORT_CNTMAXSIZEr(unit, port, value)); 5106 #endif 5107 #if defined (BCM_SABER2_SUPPORT) 5108 } else if (SOC_IS_SABER2(unit) && IS_XL_PORT(unit, port)) { 5109 SOC_IF_ERROR_RETURN 5110 (WRITE_XLPORT_CNTMAXSIZEr(unit, port, value)); 5111 #endif 5112 5113 #if defined (BCM_ENDURO_SUPPORT) || defined(BCM_HURRICANE_SUPPORT) 5114 } else if (IS_XQ_PORT(unit, port) && (SOC_IS_ENDURO(unit) || 5115 SOC_IS_HURRICANE(unit) || SOC_IS_HURRICANE2(unit))) { 5116 SOC_IF_ERROR_RETURN 5117 (WRITE_QPORT_CNTMAXSIZEr(unit, port, value)); 5118 #endif 5119 } else if (IS_XL_PORT(unit, port) || IS_MXQ_PORT(unit,port)) { 5120 if ((SOC_IS_HURRICANE2(unit) || SOC_IS_GREYHOUND(unit) || 5121 SOC_IS_HURRICANE3(unit) || SOC_IS_GREYHOUND2(unit)) && 5122 IS_XL_PORT(unit, port)) { 5123 SOC_IF_ERROR_RETURN 5124 (WRITE_XLPORT_CNTMAXSIZEr(unit, port, value)); 5125 } else { 5126 SOC_IF_ERROR_RETURN 5127 (WRITE_GPORT_CNTMAXSIZEr(unit, port, value)); 5128 } 5129 #ifdef BCM_GREYHOUND2_SUPPORT 5130 } else if (IS_CL_PORT(unit, port) && SOC_IS_GREYHOUND2(unit)) { 5131 SOC_IF_ERROR_RETURN 5132 (WRITE_CLPORT_CNTMAXSIZEr(unit, port, value)); 5133 #endif 5134 } else if (IS_GE_PORT(unit,port) || IS_FE_PORT(unit,port)) { 5135 SOC_IF_ERROR_RETURN(WRITE_GPORT_CNTMAXSIZEr(unit, port, value)); 5136 if (!(soc_feature(unit, soc_feature_unified_port)) && \ 5137 !(soc_feature(unit, soc_feature_unimac))) { 5138 if (SOC_REG_IS_VALID(unit, FRM_LENGTHr)) { 5139 SOC_IF_ERROR_RETURN(WRITE_FRM_LENGTHr(unit, port, value)); 5140 } 5141 } 5142 5143 /* On some devices, this is per-PIC register */ 5144 blk = SOC_PORT_BLOCK(unit, port); 5145 blk_bitmap = SOC_BLOCK_BITMAP(unit, blk); 5146 PBMP_ITER(blk_bitmap, pix) { 5147 _bcm_stat_ovr_threshold[unit][pix] = value; 5148 } 5149 } else { 5150 COMPILER_64_SET(value64, 0, value); 5151 SOC_IF_ERROR_RETURN(WRITE_MAC_CNTMAXSZr(unit, port, value64)); 5152 5153 if (IS_GX_PORT(unit, port)) { 5154 SOC_IF_ERROR_RETURN(WRITE_GPORT_CNTMAXSIZEr(unit, port, value)); 5155 } 5156 } 5157 } 5158 #endif /* BCM_XGS3_SWITCH_SUPPORT */ 5159 5160 return BCM_E_NONE; 5161 } 5162 5163 /* 5164 * Function: 5165 * _bcm_esw_stat_ovr_threshold_get 5166 * Description: 5167 * Get _bcm_stat_ovr_threshold for the given unit and port. 5168 * Parameters: 5169 * unit - unit number 5170 * port - local port number 5171 * value - (OUT) pointer to oversize threshold 5172 * Returns: 5173 * BCM_E_NONE 5174 */ 5175 int 5176 _bcm_esw_stat_ovr_threshold_get(int unit, bcm_port_t port, int *value) 5177 { 5178 if ((_bcm_stat_ovr_threshold == NULL) || 5179 (_bcm_stat_ovr_threshold[unit] == NULL)) { 5180 return BCM_E_INIT; 5181 } 5182 5183 if (port == CMIC_PORT(unit)) { /* Not supported on CMIC */ 5184 return BCM_E_PORT; 5185 } 5186 5187 *value = _bcm_stat_ovr_threshold[unit][port]; 5188 5189 return BCM_E_NONE; 5190 } 5191 5192 int 5193 _bcm_stat_reg_op(int unit, bcm_port_t port, 5194 int sync_mode, int reg_op, 5195 soc_reg_t ctr_reg, uint64 *val) 5196 { 5197 REG_MATH_DECL; /* Required for use of the REG_* macros */ 5198 uint64 clear_val; 5199 5200 switch (reg_op) { 5201 case _BCM_STAT_REG_ADD: 5202 REG_ADD(unit, port, sync_mode, ctr_reg, *val); 5203 break; 5204 case _BCM_STAT_REG_SUB: 5205 REG_SUB(unit, port, sync_mode, ctr_reg, *val); 5206 break; 5207 case _BCM_STAT_REG_CLEAR: 5208 COMPILER_64_ZERO(clear_val); 5209 REG_CLEAR(unit, port, ctr_reg, clear_val); 5210 break; 5211 default: 5212 break; 5213 } 5214 return BCM_E_NONE; 5215 5216 } 5217 5218 int 5219 _bcm_stat_reg_idx_op(int unit, bcm_port_t port, 5220 int sync_mode, int reg_op, 5221 soc_reg_t ctr_reg, int ar_idx, 5222 uint64 *val) 5223 { 5224 REG_MATH_DECL; /* Required for use of the REG_* macros */ 5225 5226 switch (reg_op) { 5227 case _BCM_STAT_REG_ADD: 5228 REG_ADD_IDX(unit, port, sync_mode, ctr_reg, *val, ar_idx); 5229 break; 5230 case _BCM_STAT_REG_SUB: 5231 REG_SUB_IDX(unit, port, sync_mode, ctr_reg, *val, ar_idx); 5232 break; 5233 case _BCM_STAT_REG_CLEAR: 5234 REG_CLEAR_IDX(unit, port, sync_mode, ctr_reg, *val, ar_idx); 5235 break; 5236 default: 5237 break; 5238 } 5239 return BCM_E_NONE; 5240 5241 } 5242 5243 /* 5244 * Function: 5245 * bcm_esw_stat_group_dump_all 5246 * Description: 5247 * Display all important information about all stat object and groups 5248 * Calls common function _bcm_esw_stat_group_dump_info() 5249 * 5250 * Parameters: 5251 * unit - (IN) unit number 5252 * Return Value: 5253 * None 5254 * Notes: 5255 */ 5256 int 5257 bcm_esw_stat_group_dump_all(int unit) 5258 { 5259 #if defined(BCM_HURRICANE3_SUPPORT) 5260 if (soc_feature(unit, soc_feature_flowcnt)) { 5261 return _bcm_esw_flowcnt_group_dump_info(unit, TRUE, 0, 0); 5262 } else 5263 #endif 5264 #if defined(BCM_KATANA_SUPPORT) || defined(BCM_TRIUMPH3_SUPPORT) 5265 _bcm_esw_stat_group_dump_info(unit, TRUE, 0, 0); 5266 #endif 5267 return BCM_E_NONE; 5268 } 5269 5270 /* 5271 * Function: 5272 * bcm_esw_stat_group_dump 5273 * Description: 5274 * Display important information about specified stat object and group 5275 * Calls common function _bcm_esw_stat_group_dump_info() 5276 * 5277 * Parameters: 5278 * unit - (IN) unit number 5279 * object - (IN) Accounting Object 5280 * Group_mode - (IN) Group Mode 5281 * Return Value: 5282 * None 5283 * Notes: 5284 */ 5285 int 5286 bcm_esw_stat_group_dump(int unit, bcm_stat_object_t object, 5287 bcm_stat_group_mode_t group_mode) 5288 { 5289 #if defined(BCM_HURRICANE3_SUPPORT) 5290 if (soc_feature(unit, soc_feature_flowcnt)) { 5291 _bcm_esw_flowcnt_group_dump_info(unit, FALSE, object, group_mode); 5292 return BCM_E_NONE; 5293 } 5294 #endif 5295 #if defined(BCM_KATANA_SUPPORT) || defined(BCM_TRIUMPH3_SUPPORT) 5296 _bcm_esw_stat_group_dump_info(unit, FALSE, object, group_mode); 5297 #endif 5298 return BCM_E_NONE; 5299 } 5300 5301 /* 5302 * Function: 5303 * bcm_esw_stat_custom_group_id_create 5304 * Description: 5305 * Associate an accounting object to customized group mode. 5306 * User can allocate pool,base index to accounting objects. 5307 * 5308 * Parameters: 5309 * 5310 * unit : (IN) UNIT number 5311 * mode_id : (IN) Created Mode Identifier for Stat Flex Group Mode 5312 * object : (IN) Accounting object 5313 * pool_id : (IN) Pool Id 5314 * base_idx : (IN) Base Index in a pool 5315 * counter_info : (OUT) Stat counter info 5316 * 5317 * Returns: 5318 * BCM_E_* 5319 */ 5320 int bcm_esw_stat_custom_group_id_create (int unit, 5321 uint32 mode_id, 5322 bcm_stat_object_t object, 5323 uint32 pool_id, 5324 uint32 base_idx, 5325 bcm_stat_custom_counter_info_t *counter_info) 5326 { 5327 #if defined(BCM_KATANA2_SUPPORT) 5328 if (soc_feature(unit,soc_feature_flex_stat_compaction_support)) { 5329 return _bcm_esw_stat_custom_group_id_create(unit, 5330 mode_id, object, pool_id, base_idx, counter_info); 5331 } else 5332 #endif 5333 { 5334 return BCM_E_UNAVAIL; 5335 } 5336 } 5337 5338 /* 5339 * Function: 5340 * bcm_esw_stat_custom_counter_id_move 5341 * Description: 5342 * The function is used to move the old set of counters to new 5343 * free location provided by user. The new free location can 5344 * be within the same pool as old counters or a new pool. 5345 * 5346 * Parameters: 5347 * 5348 * unit : (IN) UNIT number 5349 * idx_action : (IN) counter base index action 5350 * counter_info_old : (IN) Old Counter information 5351 * counter_info_new : (IN/OUT) New Counter information 5352 * 5353 * Returns: 5354 * BCM_E_* 5355 */ 5356 int bcm_esw_stat_custom_counter_id_move(int unit, 5357 bcm_stat_custom_base_index_action_t idx_action, 5358 bcm_stat_custom_counter_info_t counter_info_old, 5359 bcm_stat_custom_counter_info_t *counter_info_new) 5360 { 5361 #if defined(BCM_KATANA2_SUPPORT) 5362 if (soc_feature(unit,soc_feature_flex_stat_compaction_support)) { 5363 return _bcm_stat_flex_counter_id_move(unit, idx_action, 5364 counter_info_old, counter_info_new); 5365 } else 5366 #endif 5367 { 5368 return BCM_E_UNAVAIL; 5369 } 5370 } 5371 5372 #ifdef BCM_WARM_BOOT_SUPPORT_SW_DUMP 5373 /* 5374 * Function: 5375 * _bcm_stat_sw_dump 5376 * Purpose: 5377 * Displays STAT software structure information. 5378 * Parameters: 5379 * unit - Device unit number 5380 * Returns: 5381 * None 5382 */ 5383 void 5384 _bcm_stat_sw_dump(int unit) 5385 { 5386 int i; 5387 5388 LOG_CLI((BSL_META_U(unit, 5389 "\nSW Information STAT - Unit %d\n"), unit)); 5390 5391 if ((_bcm_stat_ovr_threshold != NULL) && 5392 (_bcm_stat_ovr_threshold[unit] != NULL)) { 5393 LOG_CLI((BSL_META_U(unit, 5394 " Oversize Packet Byte Threshold:\n"))); 5395 for (i = 0; i < SOC_MAX_NUM_PORTS; i++) { 5396 LOG_CLI((BSL_META_U(unit, 5397 " Port %2d : %4d\n"), i, 5398 _bcm_stat_ovr_threshold[unit][i])); 5399 } 5400 } 5401 5402 return; 5403 } 5404 #endif /* BCM_WARM_BOOT_SUPPORT_SW_DUMP */ 5405 5406 /* 5407 * Function: 5408 * _bcm_stat_flexctr_pool_info_dump 5409 * Purpose: 5410 * Displays flex counter pool software database. 5411 * Parameters: 5412 * unit - Device unit number 5413 * Returns: 5414 * None 5415 */ 5416 void 5417 _bcm_stat_flexctr_pool_info_sw_dump(int unit) 5418 { 5419 #if defined(BCM_KATANA2_SUPPORT) 5420 if(soc_feature(unit, soc_feature_flex_stat_compaction_support)) { 5421 _bcm_stat_flex_dump_pool_info(unit); 5422 } 5423 #endif 5424 return; 5425 }