flex_ctr_egress.c (75534B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * File: flex_ctr_egress.c 8 * Purpose: Manage flex counter ingress group creation and deletion 9 */ 10 11 #include <shared/bsl.h> 12 #include <bcm_int/esw/flex_ctr.h> 13 14 static soc_reg_t _egress_pkt_selector_key_reg[] = { 15 EGR_FLEX_CTR_PKT_ATTR_SELECTOR_KEY_0r, 16 EGR_FLEX_CTR_PKT_ATTR_SELECTOR_KEY_1r, 17 EGR_FLEX_CTR_PKT_ATTR_SELECTOR_KEY_2r, 18 EGR_FLEX_CTR_PKT_ATTR_SELECTOR_KEY_3r, 19 EGR_FLEX_CTR_PKT_ATTR_SELECTOR_KEY_4r, 20 EGR_FLEX_CTR_PKT_ATTR_SELECTOR_KEY_5r, 21 EGR_FLEX_CTR_PKT_ATTR_SELECTOR_KEY_6r, 22 EGR_FLEX_CTR_PKT_ATTR_SELECTOR_KEY_7r, 23 #if defined (BCM_APACHE_SUPPORT) 24 EGR_FLEX_CTR_PKT_ATTR_SELECTOR_KEY_8r, 25 EGR_FLEX_CTR_PKT_ATTR_SELECTOR_KEY_9r, 26 EGR_FLEX_CTR_PKT_ATTR_SELECTOR_KEY_10r, 27 EGR_FLEX_CTR_PKT_ATTR_SELECTOR_KEY_11r, 28 EGR_FLEX_CTR_PKT_ATTR_SELECTOR_KEY_12r, 29 EGR_FLEX_CTR_PKT_ATTR_SELECTOR_KEY_13r, 30 EGR_FLEX_CTR_PKT_ATTR_SELECTOR_KEY_14r, 31 EGR_FLEX_CTR_PKT_ATTR_SELECTOR_KEY_15r 32 #endif 33 }; 34 #define NUM_EGR_KEYS_APACHE 16 35 #define NUM_EGR_KEYS_DEFAULT 8 36 37 /* Getting the number egress keys for the device */ 38 #define GET_NUM_EGR_KEYS(num, unit) \ 39 if (SOC_IS_APACHE(unit)) { \ 40 num = NUM_EGR_KEYS_APACHE ; \ 41 } else { \ 42 num = NUM_EGR_KEYS_DEFAULT ; \ 43 } 44 /* 45 * Function: 46 * _bcm_esw_stat_flex_update_egress_selector_keys 47 * Description: 48 * Update flex egress selector keys 49 * Parameters: 50 * unit - (IN) unit number 51 * pkt_attr_type - (IN) Flex Packet Attribute Type 52 * pkt_selector_key_reg - (IN) Flex Packet Attribute selector key register 53 * pkt_attr_bits - (IN) Flex Packet Attribute Bits 54 * Return Value: 55 * BCM_E_XXX 56 * Notes: 57 */ 58 static bcm_error_t 59 _bcm_esw_stat_flex_update_egress_selector_keys( 60 int unit, 61 bcm_stat_flex_packet_attr_type_t pkt_attr_type, 62 soc_reg_t pkt_selector_key_reg, 63 bcm_stat_flex_egr_pkt_attr_bits_t pkt_attr_bits) 64 { 65 uint64 pkt_selector_key_reg_value, val64; 66 uint8 current_bit_position=0; 67 uint8 index=0; 68 int num_pkt_sel_key_reg; 69 70 71 COMPILER_64_ZERO(pkt_selector_key_reg_value); 72 COMPILER_64_ZERO(val64); 73 74 /*APACHE supports 16 pkt selector keys */ 75 GET_NUM_EGR_KEYS(num_pkt_sel_key_reg, unit); 76 for (index=0;index<num_pkt_sel_key_reg ;index++) { 77 if (pkt_selector_key_reg == _egress_pkt_selector_key_reg[index]) { 78 break; 79 } 80 } 81 if (index == num_pkt_sel_key_reg) { 82 return BCM_E_PARAM; 83 } 84 85 /* bcmStatFlexPacketAttrTypeUdf not supported here */ 86 if (!((pkt_attr_type==bcmStatFlexPacketAttrTypeUncompressed) || 87 (pkt_attr_type==bcmStatFlexPacketAttrTypeCompressed))) { 88 return BCM_E_PARAM; 89 } 90 /* Valid register value go ahead for setting 91 EGR_FLEX_CTR_PKT_ATTR_SELECTOR_KEY_?r:SELECTOR_KEY field */ 92 93 /* First Get complete value of EGR_FLEX_CTR_PKT_ATTR_SELECTOR_KEY_?r value*/ 94 SOC_IF_ERROR_RETURN(soc_reg_get(unit, 95 pkt_selector_key_reg, 96 REG_PORT_ANY, 97 0, 98 &pkt_selector_key_reg_value)); 99 100 /* Next set field value for 101 EGR_FLEX_CTR_PKT_ATTR_SELECTOR_KEY_?r:SELECTOR_KEY field */ 102 soc_reg64_field_set(unit, 103 pkt_selector_key_reg, 104 &pkt_selector_key_reg_value, 105 USE_UDF_KEYf, 106 val64); 107 soc_reg64_field_set(unit, 108 pkt_selector_key_reg, 109 &pkt_selector_key_reg_value, 110 USER_SPECIFIED_UDF_VALIDf, 111 val64); 112 if (soc_reg_field_valid(unit, pkt_selector_key_reg, USE_COMPRESSED_PKT_KEYf)) { 113 if (pkt_attr_type==bcmStatFlexPacketAttrTypeCompressed) { 114 COMPILER_64_SET(val64, 0, 1); 115 soc_reg64_field_set(unit, 116 pkt_selector_key_reg, 117 &pkt_selector_key_reg_value, 118 USE_COMPRESSED_PKT_KEYf, 119 val64); 120 }else { 121 soc_reg64_field_set(unit, 122 pkt_selector_key_reg, 123 &pkt_selector_key_reg_value, 124 USE_COMPRESSED_PKT_KEYf, 125 val64); 126 } 127 } 128 if (pkt_attr_bits.ip_pkt != 0) { 129 BCM_IF_ERROR_RETURN( 130 _bcm_esw_stat_flex_update_selector_keys_enable_fields( 131 unit, 132 pkt_selector_key_reg, 133 &pkt_selector_key_reg_value, 134 /*IP_PKT bit position */ 135 pkt_attr_bits.ip_pkt_pos, /* 0..0 */ 136 /* 1:IP_PKT total bits */ 137 pkt_attr_bits.ip_pkt, 138 pkt_attr_bits.ip_pkt_mask, 139 ¤t_bit_position)); 140 } 141 if (pkt_attr_bits.drop != 0) { 142 BCM_IF_ERROR_RETURN( 143 _bcm_esw_stat_flex_update_selector_keys_enable_fields( 144 unit, 145 pkt_selector_key_reg, 146 &pkt_selector_key_reg_value, 147 /* DROP bit position */ 148 pkt_attr_bits.drop_pos, /* 1..1 */ 149 pkt_attr_bits.drop, 150 /* 1:DROP total bits */ 151 pkt_attr_bits.drop_mask, 152 ¤t_bit_position)); 153 } 154 if (pkt_attr_bits.dvp_type != 0) { 155 BCM_IF_ERROR_RETURN( 156 _bcm_esw_stat_flex_update_selector_keys_enable_fields( 157 unit, 158 pkt_selector_key_reg, 159 &pkt_selector_key_reg_value, 160 /* DVP_TYPE bit position */ 161 pkt_attr_bits.dvp_type_pos, /* 2..2 */ 162 pkt_attr_bits.dvp_type, 163 /* 1:DVP_TYPE total bits */ 164 pkt_attr_bits.dvp_type_mask, 165 ¤t_bit_position)); 166 } 167 if (pkt_attr_bits.svp_type != 0) { 168 BCM_IF_ERROR_RETURN( 169 _bcm_esw_stat_flex_update_selector_keys_enable_fields( 170 unit, 171 pkt_selector_key_reg, 172 &pkt_selector_key_reg_value, 173 /* SVP_TYPE bit position */ 174 pkt_attr_bits.svp_type_pos, /* 3..3 */ 175 /* 1:SVP_TYPE total bits */ 176 pkt_attr_bits.svp_type, 177 pkt_attr_bits.svp_type_mask, 178 ¤t_bit_position)); 179 } 180 if (pkt_attr_bits.pkt_resolution != 0) { 181 BCM_IF_ERROR_RETURN( 182 _bcm_esw_stat_flex_update_selector_keys_enable_fields( 183 unit, 184 pkt_selector_key_reg, 185 &pkt_selector_key_reg_value, 186 /* PKT_RESOLUTION bit position */ 187 pkt_attr_bits.pkt_resolution_pos, /* 4..4 */ 188 /* 1:PKT_RESOLUTION total bits */ 189 pkt_attr_bits.pkt_resolution, 190 pkt_attr_bits.pkt_resolution_mask, 191 ¤t_bit_position)); 192 } 193 if (pkt_attr_bits.tos_dscp != 0) { 194 BCM_IF_ERROR_RETURN( 195 _bcm_esw_stat_flex_update_selector_keys_enable_fields( 196 unit, 197 pkt_selector_key_reg, 198 &pkt_selector_key_reg_value, 199 /* TOS bit position */ 200 pkt_attr_bits.tos_dscp_pos, /* 5 */ 201 /* 8:TOS total bits */ 202 pkt_attr_bits.tos_dscp, 203 pkt_attr_bits.tos_dscp_mask, 204 ¤t_bit_position)); 205 } 206 if (pkt_attr_bits.tos_ecn != 0) { 207 BCM_IF_ERROR_RETURN( 208 _bcm_esw_stat_flex_update_selector_keys_enable_fields( 209 unit, 210 pkt_selector_key_reg, 211 &pkt_selector_key_reg_value, 212 /* TOS bit position */ 213 pkt_attr_bits.tos_ecn_pos, /* 5 */ 214 /* 8:TOS total bits */ 215 pkt_attr_bits.tos_ecn, 216 pkt_attr_bits.tos_ecn_mask, 217 ¤t_bit_position)); 218 } 219 if (pkt_attr_bits.egr_port != 0) { 220 BCM_IF_ERROR_RETURN( 221 _bcm_esw_stat_flex_update_selector_keys_enable_fields( 222 unit, 223 pkt_selector_key_reg, 224 &pkt_selector_key_reg_value, 225 /* EGR_PORT bit position */ 226 pkt_attr_bits.egr_port_pos, /* 13 */ 227 /* 6:EGR_PORT total bits */ 228 pkt_attr_bits.egr_port, 229 pkt_attr_bits.egr_port_mask, 230 ¤t_bit_position)); 231 } 232 if (pkt_attr_bits.inner_dot1p != 0) { 233 BCM_IF_ERROR_RETURN( 234 _bcm_esw_stat_flex_update_selector_keys_enable_fields( 235 unit, 236 pkt_selector_key_reg, 237 &pkt_selector_key_reg_value, 238 /* INNER_DOT1P bit position */ 239 pkt_attr_bits.inner_dot1p_pos, /* 19 */ 240 /* 3:INNER_DOT1P total bits */ 241 pkt_attr_bits.inner_dot1p, 242 pkt_attr_bits.inner_dot1p_mask, 243 ¤t_bit_position)); 244 } 245 if (pkt_attr_bits.outer_dot1p != 0) { 246 BCM_IF_ERROR_RETURN( 247 _bcm_esw_stat_flex_update_selector_keys_enable_fields( 248 unit, 249 pkt_selector_key_reg, 250 &pkt_selector_key_reg_value, 251 /* OUTER_DOT1P bit position */ 252 pkt_attr_bits.outer_dot1p_pos, /* 22 */ 253 /* 3:OUTER_DOT1P total bits */ 254 pkt_attr_bits.outer_dot1p, 255 pkt_attr_bits.outer_dot1p_mask, 256 ¤t_bit_position)); 257 } 258 if (pkt_attr_bits.vlan_format != 0) { 259 BCM_IF_ERROR_RETURN( 260 _bcm_esw_stat_flex_update_selector_keys_enable_fields( 261 unit, 262 pkt_selector_key_reg, 263 &pkt_selector_key_reg_value, 264 /* VLAN_FORMAT bit position */ 265 pkt_attr_bits.vlan_format_pos, /* 25 */ 266 /* 2:VLAN_FORMAT total bits */ 267 pkt_attr_bits.vlan_format, 268 pkt_attr_bits.vlan_format_mask, 269 ¤t_bit_position)); 270 } 271 if (pkt_attr_bits.int_pri != 0) { 272 BCM_IF_ERROR_RETURN( 273 _bcm_esw_stat_flex_update_selector_keys_enable_fields( 274 unit, 275 pkt_selector_key_reg, 276 &pkt_selector_key_reg_value, 277 /* INT_PRI bit position */ 278 pkt_attr_bits.int_pri_pos, /* 27 */ 279 /* 4:INT_PRI total bits */ 280 pkt_attr_bits.int_pri, 281 pkt_attr_bits.int_pri_mask, 282 ¤t_bit_position)); 283 } 284 if (pkt_attr_bits.cng != 0) { 285 BCM_IF_ERROR_RETURN( 286 _bcm_esw_stat_flex_update_selector_keys_enable_fields( 287 unit, 288 pkt_selector_key_reg, 289 &pkt_selector_key_reg_value, 290 /* CNG bit position */ 291 pkt_attr_bits.cng_pos, /* 31 */ 292 /* 2:CNG total bits */ 293 pkt_attr_bits.cng, 294 pkt_attr_bits.cng_mask, 295 ¤t_bit_position)); 296 } 297 #ifdef BCM_APACHE_SUPPORT 298 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 299 if (pkt_attr_bits.phb_1 != 0) { 300 BCM_IF_ERROR_RETURN( 301 _bcm_esw_stat_flex_update_selector_keys_enable_fields( 302 unit, 303 pkt_selector_key_reg, 304 &pkt_selector_key_reg_value, 305 /* bit position */ 306 pkt_attr_bits.phb_1_pos, /* */ 307 /* total bits */ 308 pkt_attr_bits.phb_1, 309 pkt_attr_bits.phb_1_mask, 310 ¤t_bit_position)); 311 } 312 if (pkt_attr_bits.cng_1 != 0) { 313 BCM_IF_ERROR_RETURN( 314 _bcm_esw_stat_flex_update_selector_keys_enable_fields( 315 unit, 316 pkt_selector_key_reg, 317 &pkt_selector_key_reg_value, 318 /* bit position */ 319 pkt_attr_bits.cng_1_pos, /* */ 320 /* total bits */ 321 pkt_attr_bits.cng_1, 322 pkt_attr_bits.cng_1_mask, 323 ¤t_bit_position)); 324 } 325 if (pkt_attr_bits.phb_2 != 0) { 326 BCM_IF_ERROR_RETURN( 327 _bcm_esw_stat_flex_update_selector_keys_enable_fields( 328 unit, 329 pkt_selector_key_reg, 330 &pkt_selector_key_reg_value, 331 /* bit position */ 332 pkt_attr_bits.phb_2_pos, /* */ 333 /* total bits */ 334 pkt_attr_bits.phb_2, 335 pkt_attr_bits.phb_2_mask, 336 ¤t_bit_position)); 337 } 338 if (pkt_attr_bits.cng_2 != 0) { 339 BCM_IF_ERROR_RETURN( 340 _bcm_esw_stat_flex_update_selector_keys_enable_fields( 341 unit, 342 pkt_selector_key_reg, 343 &pkt_selector_key_reg_value, 344 /* bit position */ 345 pkt_attr_bits.cng_2_pos, /* */ 346 /* total bits */ 347 pkt_attr_bits.cng_2, 348 pkt_attr_bits.cng_2_mask, 349 ¤t_bit_position)); 350 } 351 if (pkt_attr_bits.phb_3 != 0) { 352 BCM_IF_ERROR_RETURN( 353 _bcm_esw_stat_flex_update_selector_keys_enable_fields( 354 unit, 355 pkt_selector_key_reg, 356 &pkt_selector_key_reg_value, 357 /* bit position */ 358 pkt_attr_bits.phb_3_pos, /* */ 359 /* total bits */ 360 pkt_attr_bits.phb_3, 361 pkt_attr_bits.phb_3_mask, 362 ¤t_bit_position)); 363 } 364 if (pkt_attr_bits.cng_3 != 0) { 365 BCM_IF_ERROR_RETURN( 366 _bcm_esw_stat_flex_update_selector_keys_enable_fields( 367 unit, 368 pkt_selector_key_reg, 369 &pkt_selector_key_reg_value, 370 /* bit position */ 371 pkt_attr_bits.cng_3_pos, /* */ 372 /* total bits */ 373 pkt_attr_bits.cng_3, 374 pkt_attr_bits.cng_3_mask, 375 ¤t_bit_position)); 376 } 377 } 378 #endif 379 #if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TRIDENT3_SUPPORT) 380 if (soc_feature(unit, soc_feature_flex_stat_egr_queue_congestion_marked)) { 381 if (pkt_attr_bits.congestion_marked != 0) { 382 BCM_IF_ERROR_RETURN( 383 _bcm_esw_stat_flex_update_selector_keys_enable_fields( 384 unit, 385 pkt_selector_key_reg, 386 &pkt_selector_key_reg_value, 387 /* bit position */ 388 pkt_attr_bits.congestion_marked_pos, 389 /* total bits */ 390 pkt_attr_bits.congestion_marked, 391 pkt_attr_bits.congestion_marked_mask, 392 ¤t_bit_position)); 393 } 394 if (pkt_attr_bits.uc_queueing!= 0) { 395 BCM_IF_ERROR_RETURN( 396 _bcm_esw_stat_flex_update_selector_keys_enable_fields( 397 unit, 398 pkt_selector_key_reg, 399 &pkt_selector_key_reg_value, 400 /* bit position */ 401 pkt_attr_bits.uc_queueing_pos, 402 /* total bits */ 403 pkt_attr_bits.uc_queueing, 404 pkt_attr_bits.uc_queueing_mask, 405 ¤t_bit_position)); 406 } 407 if (pkt_attr_bits.mmu_cos != 0) { 408 BCM_IF_ERROR_RETURN( 409 _bcm_esw_stat_flex_update_selector_keys_enable_fields( 410 unit, 411 pkt_selector_key_reg, 412 &pkt_selector_key_reg_value, 413 /* bit position */ 414 pkt_attr_bits.mmu_cos_pos, 415 /* total bits */ 416 pkt_attr_bits.mmu_cos, 417 pkt_attr_bits.mmu_cos_mask, 418 ¤t_bit_position)); 419 } 420 } 421 #endif 422 if (soc_feature(unit, soc_feature_flex_stat_int_cn_support)) { 423 if (pkt_attr_bits.int_cn != 0) { 424 BCM_IF_ERROR_RETURN( 425 _bcm_esw_stat_flex_update_selector_keys_enable_fields( 426 unit, 427 pkt_selector_key_reg, 428 &pkt_selector_key_reg_value, 429 /* bit position */ 430 pkt_attr_bits.int_cn_pos, /* */ 431 /* total bits */ 432 pkt_attr_bits.int_cn, 433 pkt_attr_bits.int_cn_mask, 434 ¤t_bit_position)); 435 } 436 } 437 /* Finally set value for EGR_FLEX_CTR_PKT_ATTR_SELECTOR_KEY_?r */ 438 SOC_IF_ERROR_RETURN(soc_reg_set( unit, 439 pkt_selector_key_reg, 440 REG_PORT_ANY, 441 0, 442 pkt_selector_key_reg_value)); 443 return BCM_E_NONE; 444 } 445 /* 446 * Function: 447 * _bcm_esw_stat_flex_create_egress_uncompress_mode 448 * Description: 449 * Creates New Flex Egress Uncompressed Mode 450 * 451 * Parameters: 452 * unit - (IN) unit number 453 * uncmprsd_attr_selectors - (IN) Flex attributes 454 * mode - (OUT) Flex mode 455 * total_counters - (OUT) Total Counters associated with new 456 * flex uncompressed mode 457 * 458 * Return Value: 459 * BCM_E_XXX 460 * Notes: 461 */ 462 463 static bcm_error_t 464 _bcm_esw_stat_flex_create_egress_uncompress_mode( 465 int unit, 466 bcm_stat_flex_egr_uncmprsd_attr_selectors_t *uncmprsd_attr_selectors, 467 bcm_stat_flex_mode_t *mode, 468 uint32 *total_counters) 469 { 470 bcm_stat_flex_mode_t mode_l=0; 471 bcm_stat_flex_egr_pkt_attr_bits_t pkt_attr_bits={0}; 472 uint32 total_egress_bits=0; 473 uint32 index=0; 474 bcm_stat_flex_egress_mode_t *flex_egress_mode=NULL; 475 476 bcm_stat_flex_egr_uncmprsd_attr_selectors_t uncmprsd_attr_selectors_l; 477 uint32 num_flex_egress_pools; 478 int num_keys; 479 480 num_flex_egress_pools = SOC_INFO(unit).num_flex_egress_pools; 481 482 flex_egress_mode = sal_alloc(sizeof(bcm_stat_flex_egress_mode_t), 483 "flex_egress_mode"); 484 if (flex_egress_mode == NULL) { 485 return BCM_E_MEMORY; 486 } 487 488 sal_memset(flex_egress_mode, 0, sizeof(bcm_stat_flex_egress_mode_t)); 489 490 for (index =0; index < BCM_STAT_FLEX_COUNTER_MAX_MODE ; index++) { 491 if (_bcm_esw_stat_flex_get_egress_mode_info( 492 unit, 493 index, 494 flex_egress_mode) == BCM_E_NONE) { 495 if (flex_egress_mode->egr_attr.packet_attr_type != 496 bcmStatFlexPacketAttrTypeUncompressed) { 497 continue; 498 } 499 uncmprsd_attr_selectors_l = flex_egress_mode->egr_attr. 500 uncmprsd_attr_selectors; 501 if (sal_memcmp(&uncmprsd_attr_selectors_l,uncmprsd_attr_selectors, 502 sizeof(uncmprsd_attr_selectors_l)) == 0) { 503 *total_counters = flex_egress_mode->total_counters; 504 *mode=index; 505 sal_free(flex_egress_mode); 506 return BCM_E_EXISTS; 507 } 508 } 509 } 510 sal_free(flex_egress_mode); 511 512 BCM_IF_ERROR_RETURN(_bcm_esw_stat_flex_get_available_mode( 513 unit, 514 bcmStatFlexDirectionEgress, 515 &mode_l)); 516 /* Step2: Packet Attribute selection */ 517 #ifdef BCM_APACHE_SUPPORT 518 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 519 if (uncmprsd_attr_selectors->uncmprsd_attr_bits_selector & 520 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_CNG_3_ATTR_BITS) { 521 pkt_attr_bits.cng_3 = egr_pkt_attr_uncmprsd_bits_g[unit].cng_3; 522 pkt_attr_bits.cng_3_mask = egr_pkt_attr_uncmprsd_bits_g[unit].cng_3_mask; 523 pkt_attr_bits.cng_3_pos = egr_pkt_attr_uncmprsd_bits_g[unit].cng_3_pos; 524 total_egress_bits += pkt_attr_bits.cng_3; 525 } 526 if (uncmprsd_attr_selectors->uncmprsd_attr_bits_selector & 527 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_PHB_3_ATTR_BITS) { 528 pkt_attr_bits.phb_3 = egr_pkt_attr_uncmprsd_bits_g[unit].cng_3; 529 pkt_attr_bits.phb_3_mask = egr_pkt_attr_uncmprsd_bits_g[unit].phb_3_mask; 530 pkt_attr_bits.phb_3_pos = egr_pkt_attr_uncmprsd_bits_g[unit].phb_3_pos; 531 total_egress_bits += pkt_attr_bits.phb_3; 532 } 533 if (uncmprsd_attr_selectors->uncmprsd_attr_bits_selector & 534 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_CNG_2_ATTR_BITS) { 535 pkt_attr_bits.cng_2 = egr_pkt_attr_uncmprsd_bits_g[unit].cng_2; 536 pkt_attr_bits.cng_2_mask = egr_pkt_attr_uncmprsd_bits_g[unit].cng_2_mask; 537 pkt_attr_bits.cng_2_pos = egr_pkt_attr_uncmprsd_bits_g[unit].cng_2_pos; 538 total_egress_bits += pkt_attr_bits.cng_2; 539 } 540 if (uncmprsd_attr_selectors->uncmprsd_attr_bits_selector & 541 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_PHB_2_ATTR_BITS) { 542 pkt_attr_bits.phb_2 = egr_pkt_attr_uncmprsd_bits_g[unit].cng_2; 543 pkt_attr_bits.phb_2_mask = egr_pkt_attr_uncmprsd_bits_g[unit].phb_2_mask; 544 pkt_attr_bits.phb_2_pos = egr_pkt_attr_uncmprsd_bits_g[unit].phb_2_pos; 545 total_egress_bits += pkt_attr_bits.phb_2; 546 } 547 if (uncmprsd_attr_selectors->uncmprsd_attr_bits_selector & 548 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_CNG_1_ATTR_BITS) { 549 pkt_attr_bits.cng_1 = egr_pkt_attr_uncmprsd_bits_g[unit].cng_1; 550 pkt_attr_bits.cng_1_mask = egr_pkt_attr_uncmprsd_bits_g[unit].cng_1_mask; 551 pkt_attr_bits.cng_1_pos = egr_pkt_attr_uncmprsd_bits_g[unit].cng_1_pos; 552 total_egress_bits += pkt_attr_bits.cng_1; 553 } 554 if (uncmprsd_attr_selectors->uncmprsd_attr_bits_selector & 555 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_PHB_1_ATTR_BITS) { 556 pkt_attr_bits.phb_1 = egr_pkt_attr_uncmprsd_bits_g[unit].cng_1; 557 pkt_attr_bits.phb_1_mask = egr_pkt_attr_uncmprsd_bits_g[unit].phb_1_mask; 558 pkt_attr_bits.phb_1_pos = egr_pkt_attr_uncmprsd_bits_g[unit].phb_1_pos; 559 total_egress_bits += pkt_attr_bits.phb_1; 560 } 561 } 562 #endif 563 #if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TRIDENT3_SUPPORT) 564 if (soc_feature(unit, soc_feature_flex_stat_egr_queue_congestion_marked)) { 565 if (uncmprsd_attr_selectors->uncmprsd_attr_bits_selector & 566 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_MMU_COS_ATTR_BITS) { 567 pkt_attr_bits.mmu_cos = egr_pkt_attr_uncmprsd_bits_g[unit].mmu_cos; 568 pkt_attr_bits.mmu_cos_mask = egr_pkt_attr_uncmprsd_bits_g[unit].mmu_cos_mask; 569 pkt_attr_bits.mmu_cos_pos = egr_pkt_attr_uncmprsd_bits_g[unit].mmu_cos_pos; 570 total_egress_bits += pkt_attr_bits.mmu_cos; 571 } 572 if (uncmprsd_attr_selectors->uncmprsd_attr_bits_selector & 573 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_UC_QUEUEING_ATTR_BITS) { 574 pkt_attr_bits.uc_queueing = egr_pkt_attr_uncmprsd_bits_g[unit].uc_queueing; 575 pkt_attr_bits.uc_queueing_mask = egr_pkt_attr_uncmprsd_bits_g[unit].uc_queueing_mask; 576 pkt_attr_bits.uc_queueing_pos = egr_pkt_attr_uncmprsd_bits_g[unit].uc_queueing_pos; 577 total_egress_bits += pkt_attr_bits.uc_queueing; 578 } 579 if (uncmprsd_attr_selectors->uncmprsd_attr_bits_selector & 580 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_CONGESTION_MARKED_ATTR_BITS) { 581 pkt_attr_bits.congestion_marked = egr_pkt_attr_uncmprsd_bits_g[unit].congestion_marked; 582 pkt_attr_bits.congestion_marked_mask = egr_pkt_attr_uncmprsd_bits_g[unit].congestion_marked_mask; 583 pkt_attr_bits.congestion_marked_pos = egr_pkt_attr_uncmprsd_bits_g[unit].congestion_marked_pos; 584 total_egress_bits += pkt_attr_bits.congestion_marked; 585 } 586 } 587 #endif 588 if (soc_feature(unit, soc_feature_flex_stat_int_cn_support)) { 589 if (uncmprsd_attr_selectors->uncmprsd_attr_bits_selector & 590 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_INT_CN_ATTR_BITS) { 591 pkt_attr_bits.int_cn = egr_pkt_attr_uncmprsd_bits_g[unit].int_cn; 592 pkt_attr_bits.int_cn_mask = egr_pkt_attr_uncmprsd_bits_g[unit].int_cn_mask; 593 pkt_attr_bits.int_cn_pos = egr_pkt_attr_uncmprsd_bits_g[unit].int_cn_pos; 594 total_egress_bits += pkt_attr_bits.int_cn; 595 } 596 } 597 598 if (uncmprsd_attr_selectors->uncmprsd_attr_bits_selector & 599 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_CNG_ATTR_BITS) { 600 pkt_attr_bits.cng = egr_pkt_attr_uncmprsd_bits_g[unit].cng; 601 pkt_attr_bits.cng_mask = egr_pkt_attr_uncmprsd_bits_g[unit].cng_mask; 602 pkt_attr_bits.cng_pos = egr_pkt_attr_uncmprsd_bits_g[unit].cng_pos; 603 total_egress_bits +=pkt_attr_bits.cng; 604 } 605 if (uncmprsd_attr_selectors->uncmprsd_attr_bits_selector & 606 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_INT_PRI_ATTR_BITS) { 607 pkt_attr_bits.int_pri = egr_pkt_attr_uncmprsd_bits_g[unit].int_pri ; 608 pkt_attr_bits.int_pri_mask = egr_pkt_attr_uncmprsd_bits_g[unit].int_pri_mask; 609 pkt_attr_bits.int_pri_pos = egr_pkt_attr_uncmprsd_bits_g[unit].int_pri_pos; 610 total_egress_bits +=pkt_attr_bits.int_pri; 611 } 612 if (uncmprsd_attr_selectors->uncmprsd_attr_bits_selector & 613 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_VLAN_FORMAT_ATTR_BITS) { 614 pkt_attr_bits.vlan_format = egr_pkt_attr_uncmprsd_bits_g[unit].vlan_format ; 615 pkt_attr_bits.vlan_format_mask= egr_pkt_attr_uncmprsd_bits_g[unit].vlan_format_mask; 616 pkt_attr_bits.vlan_format_pos= egr_pkt_attr_uncmprsd_bits_g[unit].vlan_format_pos; 617 total_egress_bits +=pkt_attr_bits.vlan_format; 618 } 619 if (uncmprsd_attr_selectors->uncmprsd_attr_bits_selector & 620 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_OUTER_DOT1P_ATTR_BITS) { 621 pkt_attr_bits.outer_dot1p = egr_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p; 622 pkt_attr_bits.outer_dot1p_mask= egr_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p_mask; 623 pkt_attr_bits.outer_dot1p_pos= egr_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p_pos; 624 total_egress_bits +=pkt_attr_bits.outer_dot1p; 625 } 626 if (uncmprsd_attr_selectors->uncmprsd_attr_bits_selector & 627 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_INNER_DOT1P_ATTR_BITS) { 628 pkt_attr_bits.inner_dot1p = egr_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p ; 629 pkt_attr_bits.inner_dot1p_mask = egr_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p_mask; 630 pkt_attr_bits.inner_dot1p_pos = egr_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p_pos; 631 total_egress_bits +=pkt_attr_bits.inner_dot1p; 632 } 633 if (uncmprsd_attr_selectors->uncmprsd_attr_bits_selector & 634 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_EGRESS_PORT_ATTR_BITS) { 635 pkt_attr_bits.egr_port = egr_pkt_attr_uncmprsd_bits_g[unit].egr_port ; 636 pkt_attr_bits.egr_port_mask = egr_pkt_attr_uncmprsd_bits_g[unit].egr_port_mask; 637 pkt_attr_bits.egr_port_pos = egr_pkt_attr_uncmprsd_bits_g[unit].egr_port_pos; 638 total_egress_bits +=pkt_attr_bits.egr_port; 639 } 640 if (uncmprsd_attr_selectors->uncmprsd_attr_bits_selector & 641 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_TOS_DSCP_ATTR_BITS) { 642 pkt_attr_bits.tos_dscp = egr_pkt_attr_uncmprsd_bits_g[unit].tos_dscp; 643 pkt_attr_bits.tos_dscp_mask = egr_pkt_attr_uncmprsd_bits_g[unit].tos_dscp_mask; 644 pkt_attr_bits.tos_dscp_pos = egr_pkt_attr_uncmprsd_bits_g[unit].tos_dscp_pos; 645 total_egress_bits +=pkt_attr_bits.tos_dscp; 646 } 647 if (uncmprsd_attr_selectors->uncmprsd_attr_bits_selector & 648 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_TOS_ECN_ATTR_BITS) { 649 pkt_attr_bits.tos_ecn = egr_pkt_attr_uncmprsd_bits_g[unit].tos_ecn; 650 pkt_attr_bits.tos_ecn_mask = egr_pkt_attr_uncmprsd_bits_g[unit].tos_ecn_mask; 651 pkt_attr_bits.tos_ecn_pos = egr_pkt_attr_uncmprsd_bits_g[unit].tos_ecn_pos; 652 total_egress_bits +=pkt_attr_bits.tos_ecn; 653 } 654 if (uncmprsd_attr_selectors->uncmprsd_attr_bits_selector & 655 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS) { 656 pkt_attr_bits.pkt_resolution = egr_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution ; 657 pkt_attr_bits.pkt_resolution_mask= egr_pkt_attr_uncmprsd_bits_g[unit]. 658 pkt_resolution_mask; 659 pkt_attr_bits.pkt_resolution_pos= egr_pkt_attr_uncmprsd_bits_g[unit]. 660 pkt_resolution_pos; 661 total_egress_bits +=pkt_attr_bits.pkt_resolution; 662 } 663 if (uncmprsd_attr_selectors->uncmprsd_attr_bits_selector & 664 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_SVP_TYPE_ATTR_BITS) { 665 pkt_attr_bits.svp_type = egr_pkt_attr_uncmprsd_bits_g[unit].svp_type ; 666 pkt_attr_bits.svp_type_mask = egr_pkt_attr_uncmprsd_bits_g[unit].svp_type_mask ; 667 pkt_attr_bits.svp_type_pos = egr_pkt_attr_uncmprsd_bits_g[unit].svp_type_pos ; 668 total_egress_bits +=pkt_attr_bits.svp_type; 669 } 670 if (uncmprsd_attr_selectors->uncmprsd_attr_bits_selector & 671 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_DVP_TYPE_ATTR_BITS) { 672 pkt_attr_bits.dvp_type = egr_pkt_attr_uncmprsd_bits_g[unit].dvp_type ; 673 pkt_attr_bits.dvp_type_mask = egr_pkt_attr_uncmprsd_bits_g[unit].dvp_type_mask; 674 pkt_attr_bits.dvp_type_pos = egr_pkt_attr_uncmprsd_bits_g[unit].dvp_type_pos; 675 total_egress_bits += pkt_attr_bits.dvp_type; 676 } 677 if (uncmprsd_attr_selectors->uncmprsd_attr_bits_selector & 678 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_DROP_ATTR_BITS) { 679 pkt_attr_bits.drop = egr_pkt_attr_uncmprsd_bits_g[unit].drop; 680 pkt_attr_bits.drop_mask = egr_pkt_attr_uncmprsd_bits_g[unit].drop_mask; 681 pkt_attr_bits.drop_pos = egr_pkt_attr_uncmprsd_bits_g[unit].drop_pos; 682 total_egress_bits +=pkt_attr_bits.drop; 683 } 684 if (uncmprsd_attr_selectors->uncmprsd_attr_bits_selector & 685 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_IP_PKT_ATTR_BITS) { 686 pkt_attr_bits.ip_pkt = egr_pkt_attr_uncmprsd_bits_g[unit].ip_pkt ; 687 pkt_attr_bits.ip_pkt_mask = egr_pkt_attr_uncmprsd_bits_g[unit].ip_pkt_mask ; 688 pkt_attr_bits.ip_pkt_pos = egr_pkt_attr_uncmprsd_bits_g[unit].ip_pkt_pos ; 689 total_egress_bits +=pkt_attr_bits.ip_pkt; 690 } 691 if (total_egress_bits > 8) { 692 return BCM_E_PARAM; 693 } 694 695 /* Step3: Packet Attribute filling */ 696 /* APACHE supports 4 pkt keys per pool */ 697 num_keys = SOC_IS_APACHE(unit) ? 4 : 1 ; 698 for (index = 0; index < num_keys ; index++) { 699 BCM_IF_ERROR_RETURN(_bcm_esw_stat_flex_update_egress_selector_keys(unit, 700 bcmStatFlexPacketAttrTypeUncompressed, 701 _egress_pkt_selector_key_reg[mode_l + (index*4)], 702 pkt_attr_bits)); 703 } 704 705 if ((num_flex_egress_pools / 4) > 1) { 706 BCM_IF_ERROR_RETURN(_bcm_esw_stat_flex_update_egress_selector_keys(unit, 707 bcmStatFlexPacketAttrTypeUncompressed, 708 _egress_pkt_selector_key_reg[mode_l+4], 709 pkt_attr_bits)); 710 } 711 /* Step4: Offset table filling */ 712 for (index=0;index < num_flex_egress_pools ; index++) { 713 BCM_IF_ERROR_RETURN(_bcm_esw_stat_flex_update_offset_table(unit, 714 bcmStatFlexDirectionEgress, 715 EGR_FLEX_CTR_OFFSET_TABLE_0m+index, 716 mode_l, 717 256, 718 uncmprsd_attr_selectors->offset_table_map)); 719 } 720 /* Step5: Final: reserver mode and return */ 721 *total_counters=uncmprsd_attr_selectors->total_counters; 722 *mode=mode_l; 723 return BCM_E_NONE; 724 } 725 /* 726 * Function: 727 * _bcm_esw_stat_flex_create_egress_compress_mode 728 * Description: 729 * Creates New Flex Egress Compressed Mode 730 * Parameters: 731 * unit - (IN) unit number 732 * cmprsd_attr_selectors - (IN) Flex Compressed Attribute Selector 733 * mode - (OUT) Flex mode 734 * total_counters - (OUT) Total Counters associated with new 735 * Return Value: 736 * BCM_E_XXX 737 * Notes: 738 */ 739 740 static bcm_error_t 741 _bcm_esw_stat_flex_create_egress_compress_mode( 742 int unit, 743 bcm_stat_flex_egr_cmprsd_attr_selectors_t *cmprsd_attr_selectors, 744 bcm_stat_flex_mode_t *mode, 745 uint32 *total_counters, 746 bcm_stat_flex_attribute_t *flex_attribute) 747 { 748 bcm_stat_flex_mode_t mode_l=0; 749 bcm_stat_flex_egr_pkt_attr_bits_t pkt_attr_bits={0}; 750 uint32 total_egress_bits=0; 751 uint32 index=0; 752 bcm_stat_flex_egress_mode_t *flex_egress_mode=NULL; 753 bcm_stat_flex_egr_pkt_attr_bits_t pkt_attr_bits_exist; 754 755 /*soc_mem_info_t *mem_info; */ 756 #ifdef BCM_APACHE_SUPPORT 757 uint32 mpls_label_3_exist = 0; 758 uint32 cng_3_map_used = 0; 759 uint32 phb_3_map_used = 0; 760 uint32 cng_2_map_used = 0; 761 uint32 phb_2_map_used = 0; 762 uint32 cng_1_map_used = 0; 763 uint32 phb_1_map_used = 0; 764 #endif 765 uint32 pri_cnf_map_used=0; 766 uint32 pkt_pri_map_used=0; 767 uint32 port_map_used=0; 768 uint32 tos_map_used=0; 769 uint32 pkt_res_map_used=0; 770 uint32 num_flex_egress_pools; 771 772 773 /* MAP ENTRY Structure */ 774 uint32 alloc_size=0; 775 egr_flex_ctr_pkt_pri_map_entry_t *pkt_pri_map_dma=NULL; 776 uint32 pkt_pri_map_value=0; 777 egr_flex_ctr_pkt_res_map_entry_t *pkt_res_map_dma=NULL; 778 uint32 pkt_res_map_value=0; 779 egr_flex_ctr_port_map_entry_t *port_map_dma=NULL; 780 uint32 port_map_value=0; 781 egr_flex_ctr_pri_cng_map_entry_t *pri_cng_map_dma=NULL; 782 uint32 pri_cng_map_value=0; 783 egr_flex_ctr_tos_map_entry_t *tos_map_dma=NULL; 784 uint32 tos_map_value=0; 785 786 int num_keys; 787 int rv = BCM_E_NONE; 788 #if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TRIDENT3_SUPPORT) 789 uint32 cos_uc_map_used = 0; 790 egr_flex_ctr_cos_map_entry_t *cos_uc_map_dma = NULL; 791 uint32 cos_uc_map_value = 0; 792 uint32 cos_uc_cng_same = 0; 793 #endif 794 795 num_flex_egress_pools = SOC_INFO(unit).num_flex_egress_pools; 796 flex_egress_mode = sal_alloc(sizeof(bcm_stat_flex_egress_mode_t), 797 "flex_egress_mode"); 798 if (flex_egress_mode == NULL) { 799 return BCM_E_MEMORY; 800 } 801 802 sal_memset(flex_egress_mode, 0, sizeof(bcm_stat_flex_egress_mode_t)); 803 804 if (soc_feature(unit, soc_feature_flex_stat_compression_share)) { 805 rv = _bcm_esw_stat_flex_compress_mode_id_compare(unit, 806 bcmStatFlexDirectionEgress, 807 mode, 808 flex_attribute); 809 if (BCM_FAILURE(rv)) { 810 sal_free(flex_egress_mode); 811 return rv; 812 } 813 } else { 814 for (index =0 ; index < BCM_STAT_FLEX_COUNTER_MAX_MODE ; index++) { 815 sal_memset(flex_egress_mode,0,sizeof(bcm_stat_flex_egress_mode_t)); 816 if (_bcm_esw_stat_flex_get_egress_mode_info( 817 unit, 818 index, 819 flex_egress_mode) == BCM_E_NONE) { 820 if (flex_egress_mode->egr_attr.packet_attr_type != 821 bcmStatFlexPacketAttrTypeCompressed) { 822 continue; 823 } 824 pkt_attr_bits_exist = flex_egress_mode->egr_attr. 825 cmprsd_attr_selectors.pkt_attr_bits; 826 #ifdef BCM_APACHE_SUPPORT 827 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 828 if ((pkt_attr_bits_exist.cng_3 == 829 cmprsd_attr_selectors->pkt_attr_bits.cng_3) && 830 (pkt_attr_bits_exist.phb_3 == 831 cmprsd_attr_selectors->pkt_attr_bits.phb_3) && 832 (pkt_attr_bits_exist.cng_2 == 833 cmprsd_attr_selectors->pkt_attr_bits.cng_2) && 834 (pkt_attr_bits_exist.phb_2 == 835 cmprsd_attr_selectors->pkt_attr_bits.phb_2) && 836 (pkt_attr_bits_exist.cng_1 == 837 cmprsd_attr_selectors->pkt_attr_bits.cng_1) && 838 (pkt_attr_bits_exist.phb_1 == 839 cmprsd_attr_selectors->pkt_attr_bits.phb_1)) { 840 mpls_label_3_exist = 1; 841 } 842 } else { 843 mpls_label_3_exist = 1; 844 } 845 #endif 846 #if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TRIDENT3_SUPPORT) 847 if (soc_feature(unit, soc_feature_flex_stat_egr_queue_congestion_marked)) { 848 if ((pkt_attr_bits_exist.mmu_cos == 849 cmprsd_attr_selectors->pkt_attr_bits.mmu_cos) && 850 (pkt_attr_bits_exist.uc_queueing == 851 cmprsd_attr_selectors->pkt_attr_bits.uc_queueing) && 852 (pkt_attr_bits_exist.congestion_marked == 853 cmprsd_attr_selectors->pkt_attr_bits.congestion_marked)) { 854 cos_uc_cng_same = 1; 855 } 856 } else { 857 cos_uc_cng_same = 1; 858 } 859 #endif 860 861 if ( 862 #ifdef BCM_APACHE_SUPPORT 863 mpls_label_3_exist && 864 #endif 865 #if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TRIDENT3_SUPPORT) 866 cos_uc_cng_same && 867 #endif 868 869 (pkt_attr_bits_exist.cng == 870 cmprsd_attr_selectors->pkt_attr_bits.cng) && 871 (pkt_attr_bits_exist.int_pri == 872 cmprsd_attr_selectors->pkt_attr_bits.int_pri) && 873 (pkt_attr_bits_exist.vlan_format == 874 cmprsd_attr_selectors->pkt_attr_bits.vlan_format) && 875 (pkt_attr_bits_exist.outer_dot1p == 876 cmprsd_attr_selectors->pkt_attr_bits.outer_dot1p) && 877 (pkt_attr_bits_exist.inner_dot1p == 878 cmprsd_attr_selectors->pkt_attr_bits.inner_dot1p) && 879 (pkt_attr_bits_exist.egr_port == 880 cmprsd_attr_selectors->pkt_attr_bits.egr_port) && 881 (pkt_attr_bits_exist.tos_dscp == 882 cmprsd_attr_selectors->pkt_attr_bits.tos_dscp) && 883 (pkt_attr_bits_exist.tos_ecn == 884 cmprsd_attr_selectors->pkt_attr_bits.tos_ecn) && 885 (pkt_attr_bits_exist.pkt_resolution == 886 cmprsd_attr_selectors->pkt_attr_bits.pkt_resolution) && 887 (pkt_attr_bits_exist.svp_type == 888 cmprsd_attr_selectors->pkt_attr_bits.svp_type) && 889 (pkt_attr_bits_exist.dvp_type == 890 cmprsd_attr_selectors->pkt_attr_bits.dvp_type) && 891 (pkt_attr_bits_exist.drop == 892 cmprsd_attr_selectors->pkt_attr_bits.drop) && 893 (pkt_attr_bits_exist.ip_pkt == 894 cmprsd_attr_selectors->pkt_attr_bits.ip_pkt)) { 895 *total_counters = flex_egress_mode->total_counters; 896 *mode=index; 897 sal_free(flex_egress_mode); 898 return BCM_E_EXISTS; 899 } 900 #ifdef BCM_APACHE_SUPPORT 901 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 902 if (pkt_attr_bits_exist.cng_3 != 0) { 903 cng_3_map_used = 1; 904 } 905 if (pkt_attr_bits_exist.phb_3 != 0) { 906 phb_3_map_used = 1; 907 } 908 if (pkt_attr_bits_exist.cng_2 != 0) { 909 cng_2_map_used = 1; 910 } 911 if (pkt_attr_bits_exist.phb_2 != 0) { 912 phb_2_map_used = 1; 913 } 914 if (pkt_attr_bits_exist.cng_1 != 0) { 915 cng_1_map_used = 1; 916 } 917 if (pkt_attr_bits_exist.phb_1 != 0) { 918 phb_1_map_used = 1; 919 } 920 } 921 #endif 922 #if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TRIDENT3_SUPPORT) 923 if (soc_feature(unit, soc_feature_flex_stat_egr_queue_congestion_marked)) { 924 if ((pkt_attr_bits_exist.mmu_cos!= 0) || 925 (pkt_attr_bits_exist.uc_queueing)){ 926 cos_uc_map_used = 1; 927 } 928 } 929 #endif 930 931 if ((pkt_attr_bits_exist.cng != 0) || 932 (pkt_attr_bits_exist.int_pri)) { 933 pri_cnf_map_used=1; 934 } 935 if ((pkt_attr_bits_exist.vlan_format != 0) || 936 (pkt_attr_bits_exist.outer_dot1p) || 937 (pkt_attr_bits_exist.inner_dot1p)){ 938 pkt_pri_map_used=1; 939 } 940 if (pkt_attr_bits_exist.egr_port != 0){ 941 port_map_used=1; 942 } 943 if ((pkt_attr_bits_exist.tos_dscp != 0) || 944 (pkt_attr_bits_exist.tos_ecn != 0)){ 945 tos_map_used=1; 946 } 947 if ((pkt_attr_bits_exist.pkt_resolution!=0) || 948 (pkt_attr_bits_exist.svp_type) || 949 (pkt_attr_bits_exist.dvp_type) || 950 (pkt_attr_bits_exist.drop)){ 951 pkt_res_map_used=1; 952 } 953 } 954 } 955 } 956 sal_free(flex_egress_mode); 957 BCM_IF_ERROR_RETURN(_bcm_esw_stat_flex_get_available_mode( 958 unit, 959 bcmStatFlexDirectionEgress,&mode_l)); 960 961 /* Step2: Packet Attribute selection */ 962 #ifdef BCM_APACHE_SUPPORT 963 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 964 if (cmprsd_attr_selectors->pkt_attr_bits.cng_3 != 0) { 965 if (cmprsd_attr_selectors->pkt_attr_bits.cng_3 > 966 egr_pkt_attr_cmprsd_bits_g[unit].cng_3) { 967 return BCM_E_PARAM; 968 } 969 if (cng_3_map_used == 1) { 970 return BCM_E_PARAM; 971 } 972 total_egress_bits += cmprsd_attr_selectors->pkt_attr_bits.cng_3; 973 } 974 if (cmprsd_attr_selectors->pkt_attr_bits.phb_3 != 0) { 975 if (cmprsd_attr_selectors->pkt_attr_bits.phb_3 > 976 egr_pkt_attr_cmprsd_bits_g[unit].phb_3) { 977 return BCM_E_PARAM; 978 } 979 if (phb_3_map_used == 1) { 980 return BCM_E_PARAM; 981 } 982 total_egress_bits += cmprsd_attr_selectors->pkt_attr_bits.phb_3; 983 } 984 if (cmprsd_attr_selectors->pkt_attr_bits.cng_2 != 0) { 985 if (cmprsd_attr_selectors->pkt_attr_bits.cng_2 > 986 egr_pkt_attr_cmprsd_bits_g[unit].cng_2) { 987 return BCM_E_PARAM; 988 } 989 if (cng_2_map_used == 1) { 990 return BCM_E_PARAM; 991 } 992 total_egress_bits += cmprsd_attr_selectors->pkt_attr_bits.cng_2; 993 } 994 if (cmprsd_attr_selectors->pkt_attr_bits.phb_2 != 0) { 995 if (cmprsd_attr_selectors->pkt_attr_bits.phb_2 > 996 egr_pkt_attr_cmprsd_bits_g[unit].phb_2) { 997 return BCM_E_PARAM; 998 } 999 if (phb_2_map_used == 1) { 1000 return BCM_E_PARAM; 1001 } 1002 total_egress_bits += cmprsd_attr_selectors->pkt_attr_bits.phb_2; 1003 } 1004 if (cmprsd_attr_selectors->pkt_attr_bits.cng_1 != 0) { 1005 if (cmprsd_attr_selectors->pkt_attr_bits.cng_1 > 1006 egr_pkt_attr_cmprsd_bits_g[unit].cng_1) { 1007 return BCM_E_PARAM; 1008 } 1009 if (cng_1_map_used == 1) { 1010 return BCM_E_PARAM; 1011 } 1012 total_egress_bits += cmprsd_attr_selectors->pkt_attr_bits.cng_1; 1013 } 1014 if (cmprsd_attr_selectors->pkt_attr_bits.phb_1 != 0) { 1015 if (cmprsd_attr_selectors->pkt_attr_bits.phb_1 > 1016 egr_pkt_attr_cmprsd_bits_g[unit].phb_1) { 1017 return BCM_E_PARAM; 1018 } 1019 if (phb_1_map_used == 1) { 1020 return BCM_E_PARAM; 1021 } 1022 total_egress_bits += cmprsd_attr_selectors->pkt_attr_bits.phb_1; 1023 } 1024 } 1025 #endif 1026 #if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TRIDENT3_SUPPORT) 1027 if (soc_feature(unit, soc_feature_flex_stat_egr_queue_congestion_marked)) { 1028 if (cmprsd_attr_selectors->pkt_attr_bits.mmu_cos != 0) { 1029 if (cmprsd_attr_selectors->pkt_attr_bits.mmu_cos > 1030 egr_pkt_attr_cmprsd_bits_g[unit].mmu_cos) { 1031 return BCM_E_PARAM; 1032 } 1033 if (cos_uc_map_used == 1) { 1034 return BCM_E_PARAM; 1035 } 1036 total_egress_bits += cmprsd_attr_selectors->pkt_attr_bits.mmu_cos; 1037 } 1038 if (cmprsd_attr_selectors->pkt_attr_bits.uc_queueing != 0) { 1039 if (cmprsd_attr_selectors->pkt_attr_bits.uc_queueing > 1040 egr_pkt_attr_cmprsd_bits_g[unit].uc_queueing) { 1041 return BCM_E_PARAM; 1042 } 1043 if (cos_uc_map_used == 1) { 1044 return BCM_E_PARAM; 1045 } 1046 total_egress_bits += cmprsd_attr_selectors->pkt_attr_bits.uc_queueing; 1047 } 1048 if (cmprsd_attr_selectors->pkt_attr_bits.congestion_marked != 0) { 1049 if (cmprsd_attr_selectors->pkt_attr_bits.congestion_marked> 1050 egr_pkt_attr_cmprsd_bits_g[unit].congestion_marked) { 1051 return BCM_E_PARAM; 1052 } 1053 total_egress_bits += cmprsd_attr_selectors->pkt_attr_bits.congestion_marked; 1054 } 1055 } 1056 #endif 1057 1058 if (cmprsd_attr_selectors->pkt_attr_bits.cng !=0) { 1059 if (cmprsd_attr_selectors->pkt_attr_bits.cng > 1060 egr_pkt_attr_cmprsd_bits_g[unit].cng) { 1061 return BCM_E_PARAM; 1062 } 1063 if (pri_cnf_map_used==1) { 1064 return BCM_E_PARAM; 1065 } 1066 total_egress_bits +=cmprsd_attr_selectors->pkt_attr_bits.cng; 1067 } 1068 if (cmprsd_attr_selectors->pkt_attr_bits.int_pri !=0) { 1069 if (cmprsd_attr_selectors->pkt_attr_bits.int_pri > 1070 egr_pkt_attr_cmprsd_bits_g[unit].int_pri) { 1071 return BCM_E_PARAM; 1072 } 1073 if (pri_cnf_map_used==1) { 1074 return BCM_E_PARAM; 1075 } 1076 total_egress_bits +=cmprsd_attr_selectors->pkt_attr_bits.int_pri; 1077 } 1078 if (cmprsd_attr_selectors->pkt_attr_bits.vlan_format !=0) { 1079 if (cmprsd_attr_selectors->pkt_attr_bits.vlan_format > 1080 egr_pkt_attr_cmprsd_bits_g[unit].vlan_format) { 1081 return BCM_E_PARAM; 1082 } 1083 if (pkt_pri_map_used==1) { 1084 return BCM_E_PARAM; 1085 } 1086 total_egress_bits +=cmprsd_attr_selectors->pkt_attr_bits.vlan_format; 1087 } 1088 if (cmprsd_attr_selectors->pkt_attr_bits.outer_dot1p !=0) { 1089 if (cmprsd_attr_selectors->pkt_attr_bits.outer_dot1p > 1090 egr_pkt_attr_cmprsd_bits_g[unit].outer_dot1p) { 1091 return BCM_E_PARAM; 1092 } 1093 if (pkt_pri_map_used==1) { 1094 return BCM_E_PARAM; 1095 } 1096 total_egress_bits +=cmprsd_attr_selectors->pkt_attr_bits.outer_dot1p ; 1097 } 1098 if (cmprsd_attr_selectors->pkt_attr_bits.inner_dot1p !=0) { 1099 if (cmprsd_attr_selectors->pkt_attr_bits.inner_dot1p > 1100 egr_pkt_attr_cmprsd_bits_g[unit].inner_dot1p) { 1101 return BCM_E_PARAM; 1102 } 1103 if (pkt_pri_map_used==1) { 1104 return BCM_E_PARAM; 1105 } 1106 total_egress_bits +=cmprsd_attr_selectors->pkt_attr_bits.inner_dot1p ; 1107 } 1108 if (cmprsd_attr_selectors->pkt_attr_bits.egr_port !=0) { 1109 if (cmprsd_attr_selectors->pkt_attr_bits.egr_port > 1110 egr_pkt_attr_cmprsd_bits_g[unit].egr_port) { 1111 return BCM_E_PARAM; 1112 } 1113 if (port_map_used==1) { 1114 return BCM_E_PARAM; 1115 } 1116 total_egress_bits +=cmprsd_attr_selectors->pkt_attr_bits.egr_port ; 1117 } 1118 if (cmprsd_attr_selectors->pkt_attr_bits.tos_dscp !=0) { 1119 if (cmprsd_attr_selectors->pkt_attr_bits.tos_dscp > 1120 egr_pkt_attr_cmprsd_bits_g[unit].tos_dscp) { 1121 return BCM_E_PARAM; 1122 } 1123 if (tos_map_used==1) { 1124 return BCM_E_PARAM; 1125 } 1126 total_egress_bits +=cmprsd_attr_selectors->pkt_attr_bits.tos_dscp ; 1127 } 1128 if (cmprsd_attr_selectors->pkt_attr_bits.tos_ecn !=0) { 1129 if (cmprsd_attr_selectors->pkt_attr_bits.tos_ecn > 1130 egr_pkt_attr_cmprsd_bits_g[unit].tos_ecn) { 1131 return BCM_E_PARAM; 1132 } 1133 if (tos_map_used==1) { 1134 return BCM_E_PARAM; 1135 } 1136 total_egress_bits +=cmprsd_attr_selectors->pkt_attr_bits.tos_ecn ; 1137 } 1138 if (cmprsd_attr_selectors->pkt_attr_bits.pkt_resolution !=0) { 1139 if (cmprsd_attr_selectors->pkt_attr_bits.pkt_resolution > 1140 egr_pkt_attr_cmprsd_bits_g[unit].pkt_resolution) { 1141 return BCM_E_PARAM; 1142 } 1143 if (pkt_res_map_used==1) { 1144 return BCM_E_PARAM; 1145 } 1146 total_egress_bits +=cmprsd_attr_selectors->pkt_attr_bits. 1147 pkt_resolution; 1148 } 1149 if (cmprsd_attr_selectors->pkt_attr_bits.svp_type !=0) { 1150 if (cmprsd_attr_selectors->pkt_attr_bits.svp_type > 1151 egr_pkt_attr_cmprsd_bits_g[unit].svp_type) { 1152 return BCM_E_PARAM; 1153 } 1154 if (pkt_res_map_used==1) { 1155 return BCM_E_PARAM; 1156 } 1157 total_egress_bits +=cmprsd_attr_selectors->pkt_attr_bits.svp_type ; 1158 } 1159 if (cmprsd_attr_selectors->pkt_attr_bits.dvp_type !=0) { 1160 if (cmprsd_attr_selectors->pkt_attr_bits.dvp_type > 1161 egr_pkt_attr_cmprsd_bits_g[unit].dvp_type) { 1162 return BCM_E_PARAM; 1163 } 1164 if (pkt_res_map_used==1) { 1165 return BCM_E_PARAM; 1166 } 1167 total_egress_bits +=cmprsd_attr_selectors->pkt_attr_bits.dvp_type ; 1168 } 1169 if (cmprsd_attr_selectors->pkt_attr_bits.drop !=0) { 1170 if (cmprsd_attr_selectors->pkt_attr_bits.drop > 1171 egr_pkt_attr_cmprsd_bits_g[unit].drop) { 1172 return BCM_E_PARAM; 1173 } 1174 if (pkt_res_map_used==1) { 1175 return BCM_E_PARAM; 1176 } 1177 total_egress_bits +=cmprsd_attr_selectors->pkt_attr_bits.drop ; 1178 } 1179 if (cmprsd_attr_selectors->pkt_attr_bits.ip_pkt !=0) { 1180 if (cmprsd_attr_selectors->pkt_attr_bits.ip_pkt > 1181 egr_pkt_attr_cmprsd_bits_g[unit].ip_pkt) { 1182 return BCM_E_PARAM; 1183 } 1184 total_egress_bits +=cmprsd_attr_selectors->pkt_attr_bits.ip_pkt ; 1185 } 1186 if (total_egress_bits > 8) { 1187 return BCM_E_PARAM; 1188 } 1189 pkt_attr_bits =cmprsd_attr_selectors->pkt_attr_bits; 1190 /* Step3: Fill up map array */ 1191 if (soc_feature(unit, soc_feature_flex_stat_compression_share)) { 1192 /* Write global compression tables */ 1193 rv = _bcm_stat_flex_compressed_attr_tbl_write(unit, 1194 bcmStatFlexDirectionEgress,NULL, 1195 cmprsd_attr_selectors); 1196 if (BCM_FAILURE(rv)) { 1197 return rv; 1198 } 1199 } else { 1200 if ((pkt_attr_bits.cng != 0) || 1201 (pkt_attr_bits.int_pri)) { 1202 alloc_size = soc_mem_index_count(unit,EGR_FLEX_CTR_PRI_CNG_MAPm) * 1203 sizeof(egr_flex_ctr_pri_cng_map_entry_t); 1204 1205 pri_cng_map_dma=soc_cm_salloc( unit, alloc_size,"pri_cng_map"); 1206 if (pri_cng_map_dma == NULL) { 1207 return BCM_E_MEMORY; 1208 } 1209 sal_memset(pri_cng_map_dma, 0,alloc_size); 1210 if (soc_mem_read_range( 1211 unit, 1212 EGR_FLEX_CTR_PRI_CNG_MAPm, 1213 MEM_BLOCK_ANY, 1214 soc_mem_index_min(unit,EGR_FLEX_CTR_PRI_CNG_MAPm), 1215 soc_mem_index_max(unit,EGR_FLEX_CTR_PRI_CNG_MAPm), 1216 pri_cng_map_dma) != BCM_E_NONE){ 1217 soc_cm_sfree(unit,pri_cng_map_dma); 1218 return BCM_E_INTERNAL; 1219 } 1220 for (index=0; 1221 index< soc_mem_index_count(unit,EGR_FLEX_CTR_PRI_CNG_MAPm); 1222 index++) { 1223 pri_cng_map_value=cmprsd_attr_selectors->pri_cnf_attr_map[index]; 1224 soc_mem_field_set( 1225 unit, 1226 EGR_FLEX_CTR_PRI_CNG_MAPm, 1227 (uint32 *)&pri_cng_map_dma[index], 1228 PRI_CNG_FNf, 1229 &pri_cng_map_value); 1230 } 1231 if (soc_mem_write_range(unit, 1232 EGR_FLEX_CTR_PRI_CNG_MAPm, 1233 MEM_BLOCK_ALL, 1234 soc_mem_index_min(unit,EGR_FLEX_CTR_PRI_CNG_MAPm), 1235 soc_mem_index_max(unit,EGR_FLEX_CTR_PRI_CNG_MAPm), 1236 pri_cng_map_dma) != BCM_E_NONE) { 1237 soc_cm_sfree(unit,pri_cng_map_dma); 1238 return BCM_E_INTERNAL; 1239 } 1240 soc_cm_sfree(unit,pri_cng_map_dma); 1241 } 1242 if ((pkt_attr_bits.vlan_format != 0) || 1243 (pkt_attr_bits.outer_dot1p) || 1244 (pkt_attr_bits.inner_dot1p)){ 1245 alloc_size= soc_mem_index_count(unit,EGR_FLEX_CTR_PKT_PRI_MAPm) * 1246 sizeof(egr_flex_ctr_pkt_pri_map_entry_t); 1247 pkt_pri_map_dma = soc_cm_salloc( unit, alloc_size, "pkt_pri_map"); 1248 if (pkt_pri_map_dma == NULL) { 1249 return BCM_E_MEMORY; 1250 } 1251 sal_memset(pkt_pri_map_dma, 0, alloc_size); 1252 if (soc_mem_read_range( 1253 unit, 1254 EGR_FLEX_CTR_PKT_PRI_MAPm, 1255 MEM_BLOCK_ANY, 1256 soc_mem_index_min(unit,EGR_FLEX_CTR_PKT_PRI_MAPm), 1257 soc_mem_index_max(unit,EGR_FLEX_CTR_PKT_PRI_MAPm), 1258 pkt_pri_map_dma) != BCM_E_NONE) { 1259 soc_cm_sfree(unit,pkt_pri_map_dma); 1260 return BCM_E_INTERNAL; 1261 } 1262 for (index=0; 1263 index< soc_mem_index_count(unit,EGR_FLEX_CTR_PKT_PRI_MAPm); 1264 index++) { 1265 pkt_pri_map_value= cmprsd_attr_selectors->pkt_pri_attr_map[index]; 1266 soc_mem_field_set( 1267 unit, 1268 EGR_FLEX_CTR_PKT_PRI_MAPm, 1269 (uint32 *)&pkt_pri_map_dma[index], 1270 PKT_PRI_FNf, 1271 &pkt_pri_map_value); 1272 } 1273 if (soc_mem_write_range(unit, 1274 EGR_FLEX_CTR_PKT_PRI_MAPm, 1275 MEM_BLOCK_ALL, 1276 soc_mem_index_min(unit,EGR_FLEX_CTR_PKT_PRI_MAPm), 1277 soc_mem_index_max(unit,EGR_FLEX_CTR_PKT_PRI_MAPm), 1278 pkt_pri_map_dma) != BCM_E_NONE){ 1279 soc_cm_sfree(unit,pkt_pri_map_dma); 1280 return BCM_E_INTERNAL; 1281 } 1282 soc_cm_sfree(unit,pkt_pri_map_dma); 1283 } 1284 if (pkt_attr_bits.egr_port != 0){ 1285 alloc_size= soc_mem_index_count(unit,EGR_FLEX_CTR_PORT_MAPm) * 1286 sizeof(egr_flex_ctr_port_map_entry_t); 1287 port_map_dma = soc_cm_salloc( unit, alloc_size, "port_map"); 1288 if (port_map_dma == NULL) { 1289 return BCM_E_MEMORY; 1290 } 1291 sal_memset(port_map_dma, 0, alloc_size); 1292 if (soc_mem_read_range( 1293 unit, 1294 EGR_FLEX_CTR_PORT_MAPm, 1295 MEM_BLOCK_ANY, 1296 soc_mem_index_min(unit,EGR_FLEX_CTR_PORT_MAPm), 1297 soc_mem_index_max(unit,EGR_FLEX_CTR_PORT_MAPm), 1298 port_map_dma) != BCM_E_NONE) { 1299 soc_cm_sfree(unit,port_map_dma); 1300 return BCM_E_INTERNAL; 1301 } 1302 for(index=0; 1303 index< soc_mem_index_count(unit,EGR_FLEX_CTR_PORT_MAPm); 1304 index++) { 1305 port_map_value = cmprsd_attr_selectors->port_attr_map[index]; 1306 soc_mem_field_set( 1307 unit, 1308 EGR_FLEX_CTR_PORT_MAPm, 1309 (uint32 *)&port_map_dma[index], 1310 PORT_FNf, 1311 &port_map_value); 1312 } 1313 if (soc_mem_write_range( 1314 unit, 1315 EGR_FLEX_CTR_PORT_MAPm, 1316 MEM_BLOCK_ALL, 1317 soc_mem_index_min(unit,EGR_FLEX_CTR_PORT_MAPm), 1318 soc_mem_index_max(unit,EGR_FLEX_CTR_PORT_MAPm), 1319 port_map_dma) != BCM_E_NONE){ 1320 soc_cm_sfree(unit,port_map_dma); 1321 return BCM_E_INTERNAL; 1322 } 1323 soc_cm_sfree(unit,port_map_dma); 1324 } 1325 if ((pkt_attr_bits.tos_dscp != 0) || 1326 (pkt_attr_bits.tos_ecn != 0)) { 1327 alloc_size = soc_mem_index_count(unit,EGR_FLEX_CTR_TOS_MAPm) * 1328 sizeof(egr_flex_ctr_tos_map_entry_t); 1329 tos_map_dma = soc_cm_salloc( unit, alloc_size , "tos_map"); 1330 if (tos_map_dma == NULL) { 1331 return BCM_E_MEMORY; 1332 } 1333 sal_memset(tos_map_dma, 0, alloc_size); 1334 if (soc_mem_read_range( 1335 unit, 1336 EGR_FLEX_CTR_TOS_MAPm, 1337 MEM_BLOCK_ANY, 1338 soc_mem_index_min(unit,EGR_FLEX_CTR_TOS_MAPm), 1339 soc_mem_index_max(unit,EGR_FLEX_CTR_TOS_MAPm), 1340 tos_map_dma) != BCM_E_NONE){ 1341 soc_cm_sfree(unit,tos_map_dma); 1342 return BCM_E_INTERNAL; 1343 } 1344 for(index=0; 1345 index< soc_mem_index_count(unit,EGR_FLEX_CTR_TOS_MAPm); 1346 index++) { 1347 tos_map_value = cmprsd_attr_selectors->tos_attr_map[index]; 1348 soc_mem_field_set( 1349 unit, 1350 EGR_FLEX_CTR_PORT_MAPm, 1351 (uint32 *)&tos_map_dma[index], 1352 TOS_FNf, 1353 &tos_map_value); 1354 } 1355 if (soc_mem_write_range(unit, 1356 EGR_FLEX_CTR_TOS_MAPm, 1357 MEM_BLOCK_ALL, 1358 soc_mem_index_min(unit,EGR_FLEX_CTR_TOS_MAPm), 1359 soc_mem_index_max(unit,EGR_FLEX_CTR_TOS_MAPm), 1360 tos_map_dma) != BCM_E_NONE){ 1361 soc_cm_sfree(unit,tos_map_dma); 1362 return BCM_E_INTERNAL; 1363 } 1364 soc_cm_sfree(unit,tos_map_dma); 1365 } 1366 if ((pkt_attr_bits.pkt_resolution != 0) || 1367 (pkt_attr_bits.svp_type) || 1368 (pkt_attr_bits.dvp_type) || 1369 (pkt_attr_bits.drop)){ 1370 alloc_size = soc_mem_index_count(unit,EGR_FLEX_CTR_PKT_RES_MAPm) * 1371 sizeof(egr_flex_ctr_pkt_res_map_entry_t); 1372 pkt_res_map_dma= soc_cm_salloc( unit, alloc_size, "pkt_res_map"); 1373 if (pkt_res_map_dma == NULL) { 1374 return BCM_E_MEMORY; 1375 } 1376 sal_memset(pkt_res_map_dma, 0,alloc_size); 1377 if (soc_mem_read_range( 1378 unit, 1379 EGR_FLEX_CTR_PKT_RES_MAPm, 1380 MEM_BLOCK_ANY, 1381 soc_mem_index_min(unit,EGR_FLEX_CTR_PKT_RES_MAPm), 1382 soc_mem_index_max(unit,EGR_FLEX_CTR_PKT_RES_MAPm), 1383 pkt_res_map_dma) != BCM_E_NONE){ 1384 soc_cm_sfree(unit,pkt_res_map_dma); 1385 return BCM_E_INTERNAL; 1386 } 1387 for (index=0; 1388 index< soc_mem_index_count(unit,EGR_FLEX_CTR_PKT_RES_MAPm); 1389 index++) { 1390 pkt_res_map_value= cmprsd_attr_selectors->pkt_res_attr_map[index]; 1391 soc_mem_field_set( 1392 unit, 1393 EGR_FLEX_CTR_PKT_RES_MAPm, 1394 (uint32 *)&pkt_res_map_dma[index], 1395 PKT_RES_FNf, 1396 &pkt_res_map_value); 1397 } 1398 if (soc_mem_write_range(unit, 1399 EGR_FLEX_CTR_PKT_RES_MAPm, 1400 MEM_BLOCK_ALL, 1401 soc_mem_index_min(unit,EGR_FLEX_CTR_PKT_RES_MAPm), 1402 soc_mem_index_max(unit,EGR_FLEX_CTR_PKT_RES_MAPm), 1403 pkt_res_map_dma) != BCM_E_NONE){ 1404 soc_cm_sfree(unit,pkt_res_map_dma); 1405 return BCM_E_INTERNAL; 1406 } 1407 soc_cm_sfree(unit,pkt_res_map_dma); 1408 } 1409 #if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TRIDENT3_SUPPORT) 1410 if (soc_feature(unit, soc_feature_flex_stat_egr_queue_congestion_marked)) { 1411 if ((pkt_attr_bits.mmu_cos != 0) || 1412 (pkt_attr_bits.uc_queueing != 0)){ 1413 uint32 mem_cnt = soc_mem_index_count(unit, EGR_FLEX_CTR_COS_MAPm); 1414 uint32 idx_min = soc_mem_index_min(unit, EGR_FLEX_CTR_COS_MAPm); 1415 uint32 idx_max = soc_mem_index_max(unit, EGR_FLEX_CTR_COS_MAPm); 1416 1417 alloc_size = mem_cnt * sizeof(egr_flex_ctr_cos_map_entry_t); 1418 cos_uc_map_dma= soc_cm_salloc( unit, alloc_size, "cos_uc_map"); 1419 if (cos_uc_map_dma == NULL) { 1420 return BCM_E_MEMORY; 1421 } 1422 sal_memset(cos_uc_map_dma, 0, alloc_size); 1423 if (soc_mem_read_range( 1424 unit, 1425 EGR_FLEX_CTR_COS_MAPm, 1426 MEM_BLOCK_ANY, 1427 idx_min, 1428 idx_max, 1429 cos_uc_map_dma) != BCM_E_NONE){ 1430 soc_cm_sfree(unit, cos_uc_map_dma); 1431 return BCM_E_INTERNAL; 1432 } 1433 for (index = 0; index < mem_cnt; index++) { 1434 cos_uc_map_value = cmprsd_attr_selectors->cos_uc_attr_map[index]; 1435 soc_mem_field_set( 1436 unit, 1437 EGR_FLEX_CTR_COS_MAPm, 1438 (uint32 *)&cos_uc_map_dma[index], 1439 COS_FNf, 1440 &cos_uc_map_value); 1441 } 1442 if (soc_mem_write_range(unit, 1443 EGR_FLEX_CTR_COS_MAPm, 1444 MEM_BLOCK_ALL, 1445 idx_min, 1446 idx_max, 1447 cos_uc_map_dma) != BCM_E_NONE){ 1448 soc_cm_sfree(unit, cos_uc_map_dma); 1449 return BCM_E_INTERNAL; 1450 } 1451 soc_cm_sfree(unit, cos_uc_map_dma); 1452 } 1453 } 1454 #endif 1455 } 1456 /* Step4: Packet Attribute filling */ 1457 /* APACHE supports 4 pkt keys per pool */ 1458 num_keys = SOC_IS_APACHE(unit) ? 4 : 1 ; 1459 for (index = 0; index < num_keys ; index++) { 1460 BCM_IF_ERROR_RETURN(_bcm_esw_stat_flex_update_egress_selector_keys( 1461 unit, 1462 bcmStatFlexPacketAttrTypeCompressed, 1463 _egress_pkt_selector_key_reg[mode_l + (index*4)], 1464 pkt_attr_bits)); 1465 } 1466 1467 if ((num_flex_egress_pools / 4) > 1) { 1468 BCM_IF_ERROR_RETURN(_bcm_esw_stat_flex_update_egress_selector_keys( 1469 unit, 1470 bcmStatFlexPacketAttrTypeCompressed, 1471 _egress_pkt_selector_key_reg[mode_l+4], 1472 pkt_attr_bits)); 1473 1474 } 1475 /* Step5: Offset table filling */ 1476 for (index=0;index < num_flex_egress_pools ; index++) { 1477 BCM_IF_ERROR_RETURN(_bcm_esw_stat_flex_update_offset_table( 1478 unit, 1479 bcmStatFlexDirectionEgress, 1480 EGR_FLEX_CTR_OFFSET_TABLE_0m+index, 1481 mode_l, 1482 256, 1483 cmprsd_attr_selectors->offset_table_map)); 1484 } 1485 /* Step6: Final: reserve mode and return */ 1486 *total_counters=cmprsd_attr_selectors->total_counters; 1487 *mode=mode_l; 1488 return BCM_E_NONE; 1489 } 1490 /* 1491 * Function: 1492 * _bcm_esw_stat_flex_create_egress_udf_mode 1493 * Description: 1494 * Creates New Flex Ingress UDF(User Defined Field) Mode 1495 * Parameters: 1496 * unit - (IN) unit number 1497 * udf_pkt_attr_selectors - (IN) Flex attributes 1498 * mode - (OUT) Flex mode 1499 * total_counters - (OUT) Total Counters associated with new 1500 * Return Value: 1501 * BCM_E_XXX 1502 * Notes: 1503 * Not being used currently 1504 */ 1505 static bcm_error_t 1506 _bcm_esw_stat_flex_create_egress_udf_mode( 1507 int unit, 1508 bcm_stat_flex_udf_pkt_attr_selectors_t *udf_pkt_attr_selectors, 1509 bcm_stat_flex_mode_t *mode, 1510 uint32 *total_counters) 1511 { 1512 bcm_stat_flex_mode_t mode_l=0; 1513 uint32 total_udf_bits=0; 1514 uint32 index=0; 1515 bcm_stat_flex_egress_mode_t *flex_egress_mode=NULL; 1516 bcm_stat_flex_udf_pkt_attr_selectors_t udf_pkt_attr_selectors_l; 1517 bcm_stat_flex_udf_pkt_attr_bits_t udf_pkt_attr_bits_l; 1518 uint32 num_flex_egress_pools; 1519 int num_keys; 1520 1521 num_flex_egress_pools = SOC_INFO(unit).num_flex_egress_pools; 1522 flex_egress_mode = sal_alloc(sizeof(bcm_stat_flex_egress_mode_t), 1523 "flex_egress_mode"); 1524 if (flex_egress_mode == NULL) { 1525 return BCM_E_MEMORY; 1526 } 1527 1528 sal_memset(flex_egress_mode, 0, sizeof(bcm_stat_flex_egress_mode_t)); 1529 1530 for (index =0 ; index < BCM_STAT_FLEX_COUNTER_MAX_MODE ; index++) { 1531 sal_memset(flex_egress_mode,0,sizeof(bcm_stat_flex_egress_mode_t)); 1532 if (_bcm_esw_stat_flex_get_egress_mode_info( 1533 unit, 1534 index, 1535 flex_egress_mode) == BCM_E_NONE) { 1536 if (flex_egress_mode->egr_attr.packet_attr_type != 1537 bcmStatFlexPacketAttrTypeUdf) { 1538 continue; 1539 } 1540 udf_pkt_attr_selectors_l = flex_egress_mode->egr_attr. 1541 udf_pkt_attr_selectors; 1542 udf_pkt_attr_bits_l = udf_pkt_attr_selectors_l.udf_pkt_attr_bits; 1543 if ((udf_pkt_attr_bits_l.udf0== 1544 udf_pkt_attr_selectors->udf_pkt_attr_bits.udf0) && 1545 (udf_pkt_attr_bits_l.udf1== 1546 udf_pkt_attr_selectors->udf_pkt_attr_bits.udf1)) { 1547 *total_counters = flex_egress_mode->total_counters; 1548 *mode=index; 1549 sal_free(flex_egress_mode); 1550 return BCM_E_EXISTS; 1551 } 1552 } 1553 } 1554 sal_free(flex_egress_mode); 1555 BCM_IF_ERROR_RETURN(_bcm_esw_stat_flex_get_available_mode( 1556 unit, 1557 bcmStatFlexDirectionEgress,&mode_l)); 1558 /* Step2: Packet Attribute filling */ 1559 /* APACHE supports 4 pkt keys per pool */ 1560 num_keys = SOC_IS_APACHE(unit) ? 4 : 1 ; 1561 for (index = 0; index < num_keys ; index++) { 1562 BCM_IF_ERROR_RETURN(_bcm_esw_stat_flex_update_udf_selector_keys( 1563 unit, 1564 bcmStatFlexDirectionEgress, 1565 _egress_pkt_selector_key_reg[mode_l * (index*4)], 1566 udf_pkt_attr_selectors, 1567 &total_udf_bits)); 1568 } 1569 1570 if ((num_flex_egress_pools / 4) > 1) { 1571 BCM_IF_ERROR_RETURN(_bcm_esw_stat_flex_update_udf_selector_keys( 1572 unit, 1573 bcmStatFlexDirectionEgress, 1574 _egress_pkt_selector_key_reg[mode_l+4], 1575 udf_pkt_attr_selectors, 1576 &total_udf_bits)); 1577 } 1578 /* Step3: Offset table filling */ 1579 for (index=0;index < num_flex_egress_pools ; index++) { 1580 BCM_IF_ERROR_RETURN(_bcm_esw_stat_flex_update_offset_table( 1581 unit, 1582 bcmStatFlexDirectionEgress, 1583 ING_FLEX_CTR_OFFSET_TABLE_0m+index, 1584 mode_l, 1585 256, 1586 NULL)); 1587 } 1588 /* Step4: Final: reserve mode and return */ 1589 *total_counters = (1 << total_udf_bits); 1590 *mode=mode_l; 1591 return BCM_E_NONE; 1592 } 1593 /* 1594 * Function: 1595 * _bcm_esw_stat_flex_create_egress_mode 1596 * Description: 1597 * Creates New Flex Egress Mode(Either uncompressd or compressed or udf) 1598 * 1599 * Parameters: 1600 * unit - (IN) unit number 1601 * ing_attr - (IN) Flex Ingress attributes 1602 * mode - (OUT) Flex mode 1603 * Return Value: 1604 * BCM_E_XXX 1605 * Notes: 1606 */ 1607 1608 bcm_error_t _bcm_esw_stat_flex_create_egress_mode ( 1609 int unit, 1610 bcm_stat_flex_egr_attr_t *egr_attr, 1611 bcm_stat_flex_mode_t *mode, 1612 bcm_stat_flex_attribute_t *flex_attribute) 1613 { 1614 uint32 total_counters=0; 1615 switch(egr_attr->packet_attr_type) { 1616 case bcmStatFlexPacketAttrTypeUncompressed: 1617 LOG_DEBUG(BSL_LS_BCM_FLEXCTR, 1618 (BSL_META_U(unit, 1619 "Creating Egress uncompressed mode \n"))); 1620 BCM_IF_ERROR_RETURN(_bcm_esw_stat_flex_create_egress_uncompress_mode( 1621 unit, 1622 &(egr_attr->uncmprsd_attr_selectors), 1623 mode, 1624 &total_counters)); 1625 break; 1626 case bcmStatFlexPacketAttrTypeCompressed: 1627 if (SOC_IS_TOMAHAWK3(unit)) { 1628 return BCM_E_UNAVAIL; 1629 } 1630 LOG_DEBUG(BSL_LS_BCM_FLEXCTR, 1631 (BSL_META_U(unit, 1632 "Creating Egress compressed mode \n"))); 1633 BCM_IF_ERROR_RETURN(_bcm_esw_stat_flex_create_egress_compress_mode( 1634 unit, 1635 &(egr_attr->cmprsd_attr_selectors), 1636 mode, 1637 &total_counters,flex_attribute)); 1638 break; 1639 case bcmStatFlexPacketAttrTypeUdf: 1640 LOG_DEBUG(BSL_LS_BCM_FLEXCTR, 1641 (BSL_META_U(unit, 1642 "Creating Egress udf mode \n"))); 1643 BCM_IF_ERROR_RETURN(_bcm_esw_stat_flex_create_egress_udf_mode( 1644 unit, 1645 &(egr_attr->udf_pkt_attr_selectors), 1646 mode, 1647 &total_counters)); 1648 break; 1649 default: 1650 return BCM_E_PARAM; 1651 } 1652 BCM_IF_ERROR_RETURN(_bcm_esw_stat_flex_egress_reserve_mode( 1653 unit, 1654 *mode, 1655 total_counters, 1656 egr_attr)); 1657 /* *mode |= 0x80; */ 1658 LOG_DEBUG(BSL_LS_BCM_FLEXCTR, 1659 (BSL_META_U(unit, 1660 "\n Done %d \n"), 1661 *mode)); 1662 return BCM_E_NONE; 1663 } 1664 /* 1665 * Function: 1666 * _bcm_esw_stat_flex_delete_egress_mode 1667 * Description: 1668 * Destroys New Flex Egress Mode(Either uncompressd or compressed or udf) 1669 * 1670 * Parameters: 1671 * unit - (IN) unit number 1672 * mode - (IN) Flex mode 1673 * Return Value: 1674 * BCM_E_XXX 1675 * Notes: 1676 */ 1677 1678 bcm_error_t _bcm_esw_stat_flex_delete_egress_mode( 1679 int unit, 1680 bcm_stat_flex_mode_t mode) 1681 { 1682 if (mode > (BCM_STAT_FLEX_COUNTER_MAX_MODE-1)) { 1683 /* Exceeding max allowed value : (BCM_STAT_FLEX_COUNTER_MAX_MODE-1) */ 1684 return BCM_E_PARAM; 1685 } 1686 return _bcm_esw_stat_flex_unreserve_mode( 1687 unit, 1688 bcmStatFlexDirectionEgress, 1689 mode); 1690 }