flex_ctr.c (1092123B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * File: flex_ctr.c 8 * Purpose: Manage flex counter group creation and deletion 9 */ 10 #include <shared/bsl.h> 11 #include <bcm_int/esw/flex_ctr.h> 12 #include <bcm_int/control.h> 13 #include <bcm_int/esw/field.h> 14 15 /* ****************************************************************** */ 16 /* COMPOSITION OF STAT COUNTER ID */ 17 /* ****************************************************************** */ 18 /* mode_id = Max 3 bits (bits 31 - 29) */ 19 /* group_mode_id = Max 5 bits (Total 32) */ 20 /* pool_id = 4 (Max Pool:16) */ 21 /* a/c object_id=4 (Max Object:32) */ 22 /* 15 bits for base index */ 23 /* 000 0-0000 0000 -00000 000-0000 0000-0000 */ 24 /* Mode3b Group5b Pool4b -A/cObj4b base-index */ 25 /* ****************************************************************** */ 26 #define BCM_STAT_FLEX_MODE_START_BIT 29 27 #define BCM_STAT_FLEX_MODE_END_BIT 31 28 #define BCM_STAT_FLEX_GROUP_START_BIT 24 29 #define BCM_STAT_FLEX_GROUP_END_BIT 28 30 #define BCM_STAT_FLEX_POOL_START_BIT 20 31 #define BCM_STAT_FLEX_POOL_END_BIT 23 32 #define BCM_STAT_FLEX_OBJECT_START_BIT 15 33 #define BCM_STAT_FLEX_OBJECT_END_BIT 19 34 #define BCM_STAT_FLEX_OBJECT_MSB_START_BIT 14 35 #define BCM_STAT_FLEX_OBJECT_MSB_END_BIT 14 36 #define BCM_STAT_FLEX_BASE_IDX_START_BIT 0 37 #define BCM_STAT_FLEX_BASE_IDX_END_BIT 13 38 39 #define FIRST_LKUP 1 40 #define SECOND_LKUP 2 41 42 #define BCM_STAT_FLEX_MODE_MASK \ 43 ((1<<(BCM_STAT_FLEX_MODE_END_BIT - BCM_STAT_FLEX_MODE_START_BIT+1))-1) 44 #define BCM_STAT_FLEX_GROUP_MASK \ 45 ((1<<(BCM_STAT_FLEX_GROUP_END_BIT - BCM_STAT_FLEX_GROUP_START_BIT+1))-1) 46 #define BCM_STAT_FLEX_POOL_MASK \ 47 ((1<<(BCM_STAT_FLEX_POOL_END_BIT - BCM_STAT_FLEX_POOL_START_BIT+1))-1) 48 #define BCM_STAT_FLEX_OBJECT_MASK \ 49 ((1<<(BCM_STAT_FLEX_OBJECT_END_BIT - BCM_STAT_FLEX_OBJECT_START_BIT+1))-1) 50 #define BCM_STAT_FLEX_OBJECT_MSB_MASK \ 51 ((1<<(BCM_STAT_FLEX_OBJECT_MSB_END_BIT - \ 52 BCM_STAT_FLEX_OBJECT_MSB_START_BIT+1))-1) 53 #define BCM_STAT_FLEX_BASE_IDX_MASK \ 54 ((1<<(BCM_STAT_FLEX_BASE_IDX_END_BIT-BCM_STAT_FLEX_BASE_IDX_START_BIT+1))-1) 55 56 #define BCMI_IF_ERROR_CLEANUP(_rv_) \ 57 if ((_rv_) != BCM_E_NONE) { \ 58 goto cleanup; \ 59 } 60 61 #ifdef BCM_TOMAHAWK_SUPPORT 62 #include "bcm_int/esw/tomahawk.h" 63 bcm_stat_counter_map_t *stat_counter_map[SOC_MAX_NUM_DEVICES] = {0}; 64 static bcm_error_t _bcm_esw_get_ingress_ifp_table_from_pipe(int pipe, soc_mem_t *ingress_table); 65 void _bcm_fill_stat_counter_map(int unit, int id, uint32 mode, uint32 pool, uint32 base_idx, 66 bcm_stat_object_t object, bcm_stat_group_mode_t group); 67 static bcm_error_t _bcm_esw_get_ingress_vfp_table_from_pipe(int pipe, soc_mem_t *ingress_table); 68 #endif 69 #if defined(BCM_TRIDENT2_SUPPORT) 70 extern uint8 *_flex_stat_mode_base_map[SOC_MAX_NUM_DEVICES] 71 [BCM_STAT_FLEX_COUNTER_MAX_DIRECTION] 72 [BCM_STAT_FLEX_COUNTER_MAX_POOL] 73 [BCM_STAT_FLEX_COUNTER_MAX_MODE]; 74 #endif /* BCM_TRIDENT2_SUPPORT */ 75 76 typedef struct _flex_pkt_res_data_s { 77 uint32 pkt_res_field; 78 uint32 counter_index; 79 } _flex_pkt_res_data_t; 80 81 82 static uint32 _flex_pkt_res_values_katana[]={ 83 _UNKNOWN_PKT_KATANA, 84 _CONTROL_PKT_KATANA, 85 _BPDU_PKT_KATANA, 86 _L2BC_PKT_KATANA, 87 _L2UC_PKT_KATANA, 88 _L2DLF_PKT_KATANA, 89 _UNKNOWN_IPMC_PKT_KATANA, 90 _KNOWN_IPMC_PKT_KATANA, 91 _KNOWN_L2MC_PKT_KATANA, 92 _UNKNOWN_L2MC_PKT_KATANA, 93 _KNOWN_L3UC_PKT_KATANA, 94 _UNKNOWN_L3UC_PKT_KATANA, 95 _KNOWN_MPLS_PKT_KATANA, 96 _KNOWN_MPLS_L3_PKT_KATANA, 97 _KNOWN_MPLS_L2_PKT_KATANA, 98 _UNKNOWN_MPLS_PKT_KATANA, 99 _KNOWN_MIM_PKT_KATANA, 100 _UNKNOWN_MIM_PKT_KATANA, 101 _KNOWN_MPLS_MULTICAST_PKT_KATANA 102 }; 103 104 #define TR3_PKT_RESOLUTIONS _UNKNOWN_PKT_TR3, \ 105 _CONTROL_PKT_TR3, \ 106 _BPDU_PKT_TR3, \ 107 _L2BC_PKT_TR3, \ 108 _L2UC_PKT_TR3, \ 109 _L2DLF_PKT_TR3, \ 110 _UNKNOWN_IPMC_PKT_TR3, \ 111 _KNOWN_IPMC_PKT_TR3, \ 112 _KNOWN_L2MC_PKT_TR3, \ 113 _UNKNOWN_L2MC_PKT_TR3, \ 114 _KNOWN_L3UC_PKT_TR3, \ 115 _UNKNOWN_L3UC_PKT_TR3, \ 116 _KNOWN_MPLS_PKT_TR3, \ 117 _KNOWN_MPLS_L3_PKT_TR3, \ 118 _KNOWN_MPLS_L2_PKT_TR3, \ 119 _UNKNOWN_MPLS_PKT_TR3, \ 120 _KNOWN_MIM_PKT_TR3, \ 121 _UNKNOWN_MIM_PKT_TR3, \ 122 _KNOWN_MPLS_MULTICAST_PKT_TR3, \ 123 _OAM_PKT_TR3, \ 124 _BFD_PKT_TR3, \ 125 _ICNM_PKT_TR3, \ 126 _1588_PKT_TR3, \ 127 _KNOWN_TRILL_PKT_TR3, \ 128 _UNKNOWN_TRILL_PKT_TR3, \ 129 _KNOWN_NIV_PKT_TR3, \ 130 _UNKNOWN_NIV_PKT_TR3 131 132 static uint32 _flex_pkt_res_values_tr3[]={TR3_PKT_RESOLUTIONS}; 133 134 135 /* added in TD2 */ 136 #define TD2_PKT_RESOLUTIONS _KNOWN_L2GRE_PKT_TD2, \ 137 _KNOWN_VXLAN_PKT_TD2, \ 138 _KNOWN_FCOE_PKT_TD2, \ 139 _UNKNOWN_FCOE_PKT_TD2 140 141 static uint32 _flex_pkt_res_values_td2[] = {TR3_PKT_RESOLUTIONS, 142 TD2_PKT_RESOLUTIONS}; 143 144 145 static _flex_pkt_res_data_t ing_Single_res[]={ /* 19 */ 146 {_UNKNOWN_PKT,0}, 147 {_CONTROL_PKT,0}, 148 {_BPDU_PKT,0}, 149 {_L2BC_PKT,0}, 150 {_L2UC_PKT,0}, 151 {_L2DLF_PKT,0}, 152 {_UNKNOWN_IPMC_PKT,0}, 153 {_KNOWN_IPMC_PKT,0}, 154 {_KNOWN_L2MC_PKT,0}, 155 {_UNKNOWN_L2MC_PKT,0}, 156 {_KNOWN_L3UC_PKT,0}, 157 {_UNKNOWN_L3UC_PKT,0}, 158 {_KNOWN_MPLS_PKT,0}, 159 {_KNOWN_MPLS_L3_PKT,0}, 160 {_KNOWN_MPLS_L2_PKT,0}, 161 {_UNKNOWN_MPLS_PKT,0}, 162 {_KNOWN_MIM_PKT,0}, 163 {_UNKNOWN_MIM_PKT,0}, 164 {_KNOWN_MPLS_MULTICAST_PKT,0} 165 #if defined(BCM_TRIUMPH3_SUPPORT) 166 , 167 {_OAM_PKT,0}, 168 {_BFD_PKT,0}, 169 {_ICNM_PKT,0}, 170 {_1588_PKT,0}, 171 {_KNOWN_TRILL_PKT,0}, 172 {_UNKNOWN_TRILL_PKT,0}, 173 {_KNOWN_NIV_PKT,0}, 174 {_UNKNOWN_NIV_PKT,0} 175 #endif 176 #if defined(BCM_TRIDENT2_SUPPORT) 177 , 178 {_KNOWN_L2GRE_PKT,0}, 179 {_KNOWN_VXLAN_PKT,0}, 180 {_KNOWN_FCOE_PKT,0}, 181 {_UNKNOWN_FCOE_PKT,0}, 182 #endif /* BCM_TRIDENT2_SUPPORT */ 183 }; 184 185 static _flex_pkt_res_data_t ing_TrafficType_res[]={ /* 6 */ 186 {_L2BC_PKT,2}, 187 {_L2UC_PKT,0}, 188 {_L2DLF_PKT,0}, 189 {_KNOWN_L2MC_PKT,1}, 190 {_UNKNOWN_L2MC_PKT,1}, 191 {_KNOWN_L3UC_PKT,0}, 192 {_UNKNOWN_L3UC_PKT,0} 193 }; 194 static _flex_pkt_res_data_t ing_DlfAll_res[]={ /* 19 */ 195 {_UNKNOWN_PKT,1}, 196 {_CONTROL_PKT,1}, 197 {_BPDU_PKT,1}, 198 {_L2BC_PKT,1}, 199 {_L2UC_PKT,1}, 200 {_L2DLF_PKT,0}, 201 {_UNKNOWN_IPMC_PKT,1}, 202 {_KNOWN_IPMC_PKT,1}, 203 {_KNOWN_L2MC_PKT,1}, 204 {_UNKNOWN_L2MC_PKT,1}, 205 {_KNOWN_L3UC_PKT,1}, 206 {_UNKNOWN_L3UC_PKT,1}, 207 {_KNOWN_MPLS_PKT,1}, 208 {_KNOWN_MPLS_L3_PKT,1}, 209 {_KNOWN_MPLS_L2_PKT,1}, 210 {_UNKNOWN_MPLS_PKT,1}, 211 {_KNOWN_MIM_PKT,1}, 212 {_UNKNOWN_MIM_PKT,1}, 213 {_KNOWN_MPLS_MULTICAST_PKT,1} 214 }; 215 static _flex_pkt_res_data_t ing_Typed_res[]={ /* 6 */ 216 {_L2BC_PKT,3}, 217 {_L2UC_PKT,1}, 218 {_KNOWN_L2MC_PKT,2}, 219 {_UNKNOWN_L2MC_PKT,2}, 220 {_KNOWN_L3UC_PKT,1}, 221 {_UNKNOWN_L3UC_PKT,0}, 222 {_L2DLF_PKT,0} 223 }; 224 static _flex_pkt_res_data_t ing_TypedAll_res[]={ /* 19 */ 225 {_UNKNOWN_PKT,4}, 226 {_CONTROL_PKT,4}, 227 {_BPDU_PKT,4}, 228 {_L2BC_PKT,3}, 229 {_L2UC_PKT,1}, 230 {_L2DLF_PKT,4}, 231 {_UNKNOWN_IPMC_PKT,4}, 232 {_KNOWN_IPMC_PKT,4}, 233 {_KNOWN_L2MC_PKT,2}, 234 {_UNKNOWN_L2MC_PKT,2}, 235 {_KNOWN_L3UC_PKT,1}, 236 {_UNKNOWN_L3UC_PKT,0}, 237 {_KNOWN_MPLS_PKT,4}, 238 {_KNOWN_MPLS_L3_PKT,4}, 239 {_KNOWN_MPLS_L2_PKT,4}, 240 {_UNKNOWN_MPLS_PKT,4}, 241 {_KNOWN_MIM_PKT,4}, 242 {_UNKNOWN_MIM_PKT,4}, 243 {_KNOWN_MPLS_MULTICAST_PKT,4} 244 }; 245 static _flex_pkt_res_data_t ing_SingleWithControl_res[]={ /* 19 */ 246 {_UNKNOWN_PKT,0}, 247 {_CONTROL_PKT,1}, 248 {_BPDU_PKT,1}, 249 {_L2BC_PKT,0}, 250 {_L2UC_PKT,0}, 251 {_L2DLF_PKT,0}, 252 {_UNKNOWN_IPMC_PKT,0}, 253 {_KNOWN_IPMC_PKT,0}, 254 {_KNOWN_L2MC_PKT,0}, 255 {_UNKNOWN_L2MC_PKT,0}, 256 {_KNOWN_L3UC_PKT,0}, 257 {_UNKNOWN_L3UC_PKT,0}, 258 {_KNOWN_MPLS_PKT,0}, 259 {_KNOWN_MPLS_L3_PKT,0}, 260 {_KNOWN_MPLS_L2_PKT,0}, 261 {_UNKNOWN_MPLS_PKT,0}, 262 {_KNOWN_MIM_PKT,0}, 263 {_UNKNOWN_MIM_PKT,0}, 264 {_KNOWN_MPLS_MULTICAST_PKT,0} 265 }; 266 static _flex_pkt_res_data_t ing_TrafficTypeWithControl_res[]={ /* 8 */ 267 {_CONTROL_PKT,3}, 268 {_BPDU_PKT,3}, 269 {_L2BC_PKT,2}, 270 {_L2UC_PKT,0}, 271 {_KNOWN_L2MC_PKT,1}, 272 {_UNKNOWN_L2MC_PKT,1}, 273 {_KNOWN_L3UC_PKT,0}, 274 {_UNKNOWN_L3UC_PKT,0} 275 }; 276 static _flex_pkt_res_data_t ing_DlfAllWithControl_res[]={ /* 19 */ 277 {_UNKNOWN_PKT,2}, 278 {_CONTROL_PKT,0}, 279 {_BPDU_PKT,0}, 280 {_L2BC_PKT,2}, 281 {_L2UC_PKT,2}, 282 {_L2DLF_PKT,1}, 283 {_UNKNOWN_IPMC_PKT,2}, 284 {_KNOWN_IPMC_PKT,2}, 285 {_KNOWN_L2MC_PKT,2}, 286 {_UNKNOWN_L2MC_PKT,2}, 287 {_KNOWN_L3UC_PKT,2}, 288 {_UNKNOWN_L3UC_PKT,2}, 289 {_KNOWN_MPLS_PKT,2}, 290 {_KNOWN_MPLS_L3_PKT,2}, 291 {_KNOWN_MPLS_L2_PKT,2}, 292 {_UNKNOWN_MPLS_PKT,2}, 293 {_KNOWN_MIM_PKT,2}, 294 {_UNKNOWN_MIM_PKT,2}, 295 {_KNOWN_MPLS_MULTICAST_PKT,2} 296 }; 297 static _flex_pkt_res_data_t ing_TypedWithControl_res[]={ /* 8 */ 298 {_CONTROL_PKT,0}, 299 {_BPDU_PKT,0}, 300 {_L2BC_PKT,4}, 301 {_L2UC_PKT,2}, 302 {_KNOWN_L2MC_PKT,3}, 303 {_UNKNOWN_L2MC_PKT,3}, 304 {_KNOWN_L3UC_PKT,2}, 305 {_UNKNOWN_L3UC_PKT,1} 306 }; 307 static _flex_pkt_res_data_t ing_TypedAllWithControl_res[]={ /* 19 */ 308 {_UNKNOWN_PKT,5}, 309 {_CONTROL_PKT,0}, 310 {_BPDU_PKT,0}, 311 {_L2BC_PKT,4}, 312 {_L2UC_PKT,2}, 313 {_L2DLF_PKT,5}, 314 {_UNKNOWN_IPMC_PKT,5}, 315 {_KNOWN_IPMC_PKT,5}, 316 {_KNOWN_L2MC_PKT,3}, 317 {_UNKNOWN_L2MC_PKT,3}, 318 {_KNOWN_L3UC_PKT,2}, 319 {_UNKNOWN_L3UC_PKT,1}, 320 {_KNOWN_MPLS_PKT,5}, 321 {_KNOWN_MPLS_L3_PKT,5}, 322 {_KNOWN_MPLS_L2_PKT,5}, 323 {_UNKNOWN_MPLS_PKT,5}, 324 {_KNOWN_MIM_PKT,5}, 325 {_UNKNOWN_MIM_PKT,5}, 326 {_KNOWN_MPLS_MULTICAST_PKT,5} 327 }; 328 static _flex_pkt_res_data_t egr_Single_res[]={ /* 2 */ 329 {0,0}, /*Unicast */ 330 {1,0} /*Multicast */ 331 }; 332 static _flex_pkt_res_data_t egr_TrafficType_res[]={ /* 2 */ 333 {0,0}, /*Unicast */ 334 {1,1} /*Multicast */ 335 }; 336 337 #ifdef BCM_KATANA2_SUPPORT 338 static class_attr_combine_t class_attr_comb[BCM_MAX_NUM_UNITS]; 339 #endif 340 341 bcm_stat_flex_ing_pkt_attr_bits_t 342 ing_pkt_attr_uncmprsd_bits_g[BCM_MAX_NUM_UNITS] = {{0}}; 343 bcm_stat_flex_egr_pkt_attr_bits_t 344 egr_pkt_attr_uncmprsd_bits_g[BCM_MAX_NUM_UNITS] = {{0}}; 345 bcm_stat_flex_ing_pkt_attr_bits_t 346 ing_pkt_attr_cmprsd_bits_g[BCM_MAX_NUM_UNITS] = {{0}}; 347 bcm_stat_flex_egr_pkt_attr_bits_t 348 egr_pkt_attr_cmprsd_bits_g[BCM_MAX_NUM_UNITS] = {{0}}; 349 350 /* Information of compression table allocation per device. */ 351 static _bcm_stat_flex_compressed_mode_attr_sel_map_t 352 *global_stat_flex_compressed_attr_map[BCM_MAX_NUM_UNITS]; 353 static _bcm_stat_flex_compressed_mode_attr_sel_map_t 354 *egr_global_stat_flex_compressed_attr_map[BCM_MAX_NUM_UNITS]; 355 356 #if defined(BCM_TRIDENT3_SUPPORT) 357 static bcm_error_t _bcm_esw_get_egr_fp_table_from_pipe(int pipe, 358 soc_mem_t *egress_table); 359 #endif 360 361 /* 362 * This flag is used to reset counter values 363 * at old base index 364 */ 365 compaction_status_t compaction_info[BCM_MAX_NUM_UNITS] = {{0}}; 366 367 /* 368 * Function: 369 * _bcm_esw_stat_flex_init_pkt_res_values 370 * Description: 371 * Initialize Packet Resolution related (static) structures as 372 * per pkt_res_field indexes. 373 * 374 * Parameters: 375 * unit - (IN) unit number 376 * flex_pkt_res_data - (IN/OUT) Packet Resolution data Pointer 377 * num_entries - (IN) Entries in Packet Resolution data array 378 * 379 * Return Value: 380 * BCM_E_XXX 381 * 382 * Notes: Please note. Same field is used as index and gets initialized! 383 * TBD:Optimize this procedure using a function pointers array. 384 */ 385 static void _bcm_esw_stat_flex_init_pkt_res_values( 386 int unit, 387 _flex_pkt_res_data_t *flex_pkt_res_data, 388 uint32 num_entries) 389 { 390 uint32 index=0; 391 uint32 *flex_pkt_res_values=NULL; 392 uint32 flex_pkt_res_values_count=0; 393 394 if (SOC_IS_KATANA(unit)) { 395 flex_pkt_res_values = _flex_pkt_res_values_katana; 396 flex_pkt_res_values_count = sizeof(_flex_pkt_res_values_katana)/ 397 sizeof(_flex_pkt_res_values_katana[0]); 398 } 399 if (SOC_IS_TRIUMPH3(unit) || SOC_IS_KATANA2(unit)) { 400 flex_pkt_res_values = _flex_pkt_res_values_tr3; 401 flex_pkt_res_values_count = sizeof(_flex_pkt_res_values_tr3)/ 402 sizeof(_flex_pkt_res_values_tr3[0]); 403 } 404 if (SOC_IS_TD2_TT2(unit)) { 405 flex_pkt_res_values = _flex_pkt_res_values_td2; 406 flex_pkt_res_values_count = sizeof(_flex_pkt_res_values_td2)/ 407 sizeof(_flex_pkt_res_values_td2[0]); 408 } 409 if ( flex_pkt_res_values_count == 0) { 410 LOG_WARN(BSL_LS_BCM_FLEXCTR, 411 (BSL_META_U(unit, 412 "CONFIG ERROR: flex_pkt_res_values_count=0\n"))); 413 return ; 414 } 415 416 for(index=0;index<num_entries;index++) { 417 /* Check Whether Index is exceeding chip specific count */ 418 if (flex_pkt_res_data[index].pkt_res_field >= 419 flex_pkt_res_values_count) { 420 LOG_DEBUG(BSL_LS_BCM_FLEXCTR, 421 (BSL_META_U(unit, 422 "Flex Pkt Resolution Value Initialization failed" 423 "pkt_res_field=%d > flex_pkt_res_values_count=%d=0\n"), 424 flex_pkt_res_data[index].pkt_res_field, 425 flex_pkt_res_values_count)); 426 /* Set it to invalid value */ 427 flex_pkt_res_data[index].pkt_res_field = 0xFFFFFFFF; 428 continue ; 429 } 430 flex_pkt_res_data[index].pkt_res_field = 431 flex_pkt_res_values[flex_pkt_res_data[index].pkt_res_field]; 432 } 433 434 return ; 435 } 436 437 /* 438 * Function: 439 * _bcm_esw_stat_flex_create_mode 440 * Description: 441 * Checks attributes direction and calls ingress/egress mode creation 442 * function 443 * Parameters: 444 * unit - (IN) unit number 445 * attr - (IN) Flex attributes 446 * mode - (OUT) Flex mode 447 * Return Value: 448 * BCM_E_XXX 449 * Notes: 450 */ 451 static bcm_error_t _bcm_esw_stat_flex_create_mode ( 452 int unit, 453 bcm_stat_flex_attr_t *attr, 454 bcm_stat_flex_mode_t *mode, 455 bcm_stat_flex_attribute_t *flex_attribute) 456 { 457 if (attr == NULL) { 458 return BCM_E_PARAM; 459 } 460 if (attr->direction == bcmStatFlexDirectionIngress) { 461 return _bcm_esw_stat_flex_create_ingress_mode( 462 unit, 463 &(attr->ing_attr), 464 mode, 465 flex_attribute); 466 } 467 if (attr->direction == bcmStatFlexDirectionEgress) { 468 return _bcm_esw_stat_flex_create_egress_mode( 469 unit, 470 &(attr->egr_attr), 471 mode, 472 flex_attribute); 473 } 474 return BCM_E_PARAM; 475 } 476 /* 477 * Function: 478 * _bcm_esw_fillup_ing_uncmp_attr 479 * Description: 480 * Fill up ingress uncompressed flex attributes with required parameters 481 * Inialize offset table map also. 482 * Parameters: 483 * ing_attr - (IN) Flex Ingress attributes 484 * uncmprsd_attr_bits_selector - (IN) Uncompressed Bits Selector 485 * total_counters - (IN) Total Counters 486 * Return Value: 487 * None 488 * Notes: 489 */ 490 static void _bcm_esw_fillup_ing_uncmp_attr( 491 bcm_stat_flex_ing_attr_t *ing_attr, 492 uint32 uncmprsd_attr_bits_selector, 493 uint8 total_counters) 494 { 495 uint32 index=0; 496 497 ing_attr->packet_attr_type=bcmStatFlexPacketAttrTypeUncompressed; 498 499 ing_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector = 500 uncmprsd_attr_bits_selector; 501 ing_attr->uncmprsd_attr_selectors.total_counters = total_counters; 502 /* Reset all Offset table fields */ 503 for (index=0;index<256;index++) { 504 ing_attr->uncmprsd_attr_selectors.offset_table_map[index].offset=0; 505 ing_attr->uncmprsd_attr_selectors.offset_table_map[index]. 506 count_enable=0; 507 } 508 } 509 /* 510 * Function: 511 * _bcm_esw_fillup_ing_pkt_res_offset_table 512 * Description: 513 Fills up Ingress Offset table for Packet Resolution fields 514 * Parameters: 515 * ing_attr - (IN) Flex ingress attributes 516 * num_pairs - (IN) Number of Packet Resolution Data pairs 517 * pkt_res_data - (IN) Packet Resolution Data Pointer 518 * Return Value: 519 * None 520 * Notes: 521 */ 522 static void _bcm_esw_fillup_ing_pkt_res_offset_table( 523 bcm_stat_flex_ing_attr_t *ing_attr, 524 uint32 num_pairs, 525 _flex_pkt_res_data_t *pkt_res_data) 526 { 527 uint32 count=0; 528 int pkt_res_field=0; 529 int counter_index=0; 530 531 /* DROP:1bits(0th) SVP:1bits(1st) PKT_RES:6bits(2nd) bit position */ 532 533 for (count=0;count<num_pairs;count++) { 534 /* Check for Invalid Value */ 535 if ((pkt_res_field=pkt_res_data[count].pkt_res_field) == 0xFFFFFFFF) { 536 continue; 537 } 538 counter_index=pkt_res_data[count].counter_index; 539 ing_attr->uncmprsd_attr_selectors.offset_table_map[pkt_res_field]. 540 offset= counter_index; 541 ing_attr->uncmprsd_attr_selectors.offset_table_map[pkt_res_field]. 542 count_enable=1; 543 } 544 } 545 /* 546 * Function: 547 * _bcm_esw_fillup_egr_uncmp_attr 548 * Description: 549 * Fill up egress uncompressed flex attributes with required parameters 550 * Inialize offset table map also. 551 * Parameters: 552 * egr_attr - (IN) Flex Egress attributes 553 * uncmprsd_attr_bits_selector - (IN) Uncompressed Bits Selector 554 * total_counters - (IN) Total Counters 555 * Return Value: 556 * None 557 * Notes: 558 */ 559 static void _bcm_esw_fillup_egr_uncmp_attr( 560 bcm_stat_flex_egr_attr_t *egr_attr, 561 uint32 uncmprsd_attr_bits_selector, 562 uint16 total_counters) 563 { 564 uint32 index=0; 565 566 egr_attr->packet_attr_type= bcmStatFlexPacketAttrTypeUncompressed; 567 568 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector = 569 uncmprsd_attr_bits_selector; 570 egr_attr->uncmprsd_attr_selectors.total_counters = total_counters; 571 /* Reset all Offset table fields */ 572 for (index=0;index<256;index++) { 573 egr_attr->uncmprsd_attr_selectors.offset_table_map[index].offset=0; 574 egr_attr->uncmprsd_attr_selectors.offset_table_map[index]. 575 count_enable=0; 576 } 577 } 578 /* 579 * Function: 580 * _bcm_esw_fillup_egr_pkt_res_offset_table 581 * Description: 582 Fills up Egress Offset table for Packet Resolution fields 583 * Parameters: 584 * egr_attr - (IN) Flex egress attributes 585 * num_pairs - (IN) Number of Packet Resolution Data pairs 586 * pkt_res_data - (IN) Packet Resolution Data Pointer 587 * Return Value: 588 * None 589 * Notes: 590 */ 591 static void _bcm_esw_fillup_egr_pkt_res_offset_table( 592 bcm_stat_flex_egr_attr_t *egr_attr, 593 uint32 num_pairs, 594 _flex_pkt_res_data_t *pkt_res_data) 595 { 596 uint32 count=0; 597 int pkt_res_field=0; 598 int counter_index=0; 599 600 /* DROP:1bits(0th) SVP:1bits(1st) DVP:1bits(2nd) PKT_RES:1bit(3rd) bit */ 601 602 for (count=0;count<num_pairs;count++) { 603 if ((pkt_res_field=pkt_res_data[count].pkt_res_field) == 0xFFFFFFFF) { 604 continue; 605 } 606 counter_index=pkt_res_data[count].counter_index; 607 egr_attr->uncmprsd_attr_selectors.offset_table_map[pkt_res_field]. 608 offset= counter_index; 609 egr_attr->uncmprsd_attr_selectors.offset_table_map[pkt_res_field]. 610 count_enable=1; 611 } 612 } 613 614 /* 615 * Function: 616 * _bcm_esw_stat_get_counter_id 617 * Description: 618 * Get Stat Counter Id based on offset mode,group mode,pool number,object 619 * and base index. 620 * 621 * Parameters: 622 * group (IN) Flex Group Mode 623 * object (IN) Flex Accounting Object 624 * mode (IN) Flex Offset Mode 625 * pool_number (IN) Allocated Pool Number for Flex Accounting Object 626 * base_idx (IN) Allocated Base Index for Flex Accounting Object 627 * stat_counter_id (OUT) Stat Counter Id 628 * 629 * Return Value: 630 * BCM_E_XXX 631 * Notes: 632 */ 633 void _bcm_esw_stat_get_counter_id( 634 int unit, 635 bcm_stat_group_mode_t group, 636 bcm_stat_object_t object, 637 uint32 mode, 638 uint32 pool_number, 639 uint32 base_idx, 640 uint32 *stat_counter_id) 641 { 642 if (!soc_feature(unit, soc_feature_flex_counter_opaque_stat_id)) { 643 *stat_counter_id = ((mode & BCM_STAT_FLEX_MODE_MASK) << 644 BCM_STAT_FLEX_MODE_START_BIT) | 645 ((group & BCM_STAT_FLEX_GROUP_MASK) << 646 BCM_STAT_FLEX_GROUP_START_BIT) | 647 ((pool_number & BCM_STAT_FLEX_POOL_MASK) << 648 BCM_STAT_FLEX_POOL_START_BIT) | 649 ((object & BCM_STAT_FLEX_OBJECT_MASK) << 650 BCM_STAT_FLEX_OBJECT_START_BIT) | 651 (((object >> (BCM_STAT_FLEX_OBJECT_END_BIT 652 - BCM_STAT_FLEX_OBJECT_START_BIT+1)) 653 & BCM_STAT_FLEX_OBJECT_MSB_MASK) << 654 BCM_STAT_FLEX_OBJECT_MSB_START_BIT) | 655 (base_idx & BCM_STAT_FLEX_BASE_IDX_MASK); 656 } else { 657 #ifdef BCM_TOMAHAWK_SUPPORT 658 int i = 0; 659 660 *stat_counter_id = 0; 661 for(i = 1; i < BCM_MAX_STAT_COUNTER_IDS; ++i) { 662 if (stat_counter_map[unit] && stat_counter_map[unit][i].used) { 663 if ((stat_counter_map[unit][i].group == group) && 664 (stat_counter_map[unit][i].object == object) && 665 (stat_counter_map[unit][i].mode == mode) && 666 (stat_counter_map[unit][i].pool == pool_number) && 667 (stat_counter_map[unit][i].base_idx == base_idx)) { 668 break; 669 } 670 continue; 671 } else if (stat_counter_map[unit][i].used == 0) { 672 break; 673 } 674 #if 0 675 else if(!(stat_counter_map[unit][i])) { 676 stat_counter_map[unit][i] = 677 sal_alloc(sizeof(bcm_stat_counter_map_t),"attr"); 678 679 if (stat_counter_map[i] == NULL) { 680 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 681 (BSL_META_U(0, 682 "Memory alloc failed! "))); 683 return; 684 } 685 sal_memset(stat_counter_map[unit][i], 0, sizeof(bcm_stat_counter_map_t)); 686 687 break; 688 } 689 #endif 690 } 691 692 if (i >= BCM_MAX_STAT_COUNTER_IDS) { 693 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 694 (BSL_META_U(unit, 695 "Failed to get counter id "))); 696 return; 697 } 698 699 *stat_counter_id = i; 700 if (stat_counter_map[unit] != NULL) { 701 stat_counter_map[unit][i].mode = mode; 702 stat_counter_map[unit][i].group = group; 703 stat_counter_map[unit][i].object = object; 704 stat_counter_map[unit][i].pool = pool_number; 705 stat_counter_map[unit][i].base_idx = base_idx; 706 stat_counter_map[unit][i].used = 1; 707 stat_counter_map[unit][i].pipe = 0; 708 } 709 #endif 710 } 711 } 712 713 /* 714 * Function: 715 * _bcm_esw_stat_counter_id_retrieve 716 * Description: 717 * retrieve exist Stat Counter Id based on offset mode,group mode, pool number, object 718 * and base index. 719 * 720 * Parameters: 721 * group (IN) Flex Group Mode 722 * object (IN) Flex Accounting Object 723 * mode (IN) Flex Offset Mode 724 * pool_number (IN) Allocated Pool Number for Flex Accounting Object 725 * base_idx (IN) Allocated Base Index for Flex Accounting Object 726 * stat_counter_id (OUT) Stat Counter Id 727 * 728 * Return Value: 729 * BCM_E_XXX 730 * Notes: 731 */ 732 void _bcm_esw_stat_counter_id_retrieve( 733 int unit, 734 bcm_stat_group_mode_t group, 735 bcm_stat_object_t object, 736 uint32 mode, 737 uint32 pool_number, 738 uint32 base_idx, 739 uint32 *stat_counter_id) 740 { 741 #if defined(BCM_TRIDENT2_SUPPORT) 742 bcm_stat_flex_direction_t direction; 743 #endif /* BCM_TRIDENT2_SUPPORT */ 744 745 if (!soc_feature(unit, soc_feature_flex_counter_opaque_stat_id)) { 746 *stat_counter_id = ((mode & BCM_STAT_FLEX_MODE_MASK) << 747 BCM_STAT_FLEX_MODE_START_BIT) | 748 ((group & BCM_STAT_FLEX_GROUP_MASK) << 749 BCM_STAT_FLEX_GROUP_START_BIT) | 750 ((pool_number & BCM_STAT_FLEX_POOL_MASK) << 751 BCM_STAT_FLEX_POOL_START_BIT) | 752 ((object & BCM_STAT_FLEX_OBJECT_MASK) << 753 BCM_STAT_FLEX_OBJECT_START_BIT) | 754 (((object >> (BCM_STAT_FLEX_OBJECT_END_BIT 755 - BCM_STAT_FLEX_OBJECT_START_BIT+1)) 756 & BCM_STAT_FLEX_OBJECT_MSB_MASK) << 757 BCM_STAT_FLEX_OBJECT_MSB_START_BIT) | 758 (base_idx & BCM_STAT_FLEX_BASE_IDX_MASK); 759 #if defined(BCM_TRIDENT2_SUPPORT) 760 if (SOC_IS_TRIDENT2X(unit) && 761 soc_feature(unit, soc_feature_advanced_flex_counter)) { 762 (void)_bcm_esw_stat_validate_object(unit, object, &direction); 763 if (!_flex_stat_mode_base_map[unit][direction] 764 [pool_number][mode][base_idx]) { 765 *stat_counter_id = 0; 766 } 767 } 768 #endif 769 } else { 770 #ifdef BCM_TOMAHAWK_SUPPORT 771 int i = 0; 772 *stat_counter_id = 0; 773 for(i = 1; i < BCM_MAX_STAT_COUNTER_IDS; ++i) { 774 if (stat_counter_map[unit] && stat_counter_map[unit][i].used) { 775 if ((stat_counter_map[unit][i].group == group) && 776 (stat_counter_map[unit][i].object == object) && 777 (stat_counter_map[unit][i].mode == mode) && 778 (stat_counter_map[unit][i].pool == pool_number) && 779 (stat_counter_map[unit][i].base_idx == base_idx)) { 780 *stat_counter_id = i; 781 break; 782 } 783 continue; 784 } 785 } 786 #endif 787 } 788 } 789 790 bcm_field_qualify_t 791 _bcm_esw_stat_get_field_stage_from_stat_ctr(int unit, uint32 stat_counter_id) 792 { 793 #ifdef BCM_TOMAHAWK_SUPPORT 794 if (!stat_counter_map[unit] || (stat_counter_map[unit][stat_counter_id].used == 0)) { 795 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 796 (BSL_META_U(unit, 797 "Failed to get counter id %d"), (int)stat_counter_id)); 798 return 0; 799 } 800 801 switch(stat_counter_map[unit][stat_counter_id].object) { 802 case bcmStatObjectIngFieldStageLookup: 803 return bcmFieldQualifyStageLookup; 804 case bcmStatObjectIngFieldStageIngress: 805 return bcmFieldQualifyStageIngress; 806 case bcmStatObjectIngExactMatch: 807 return bcmFieldQualifyStageIngressExactMatch; 808 #if defined(BCM_TRIDENT3_SUPPORT) || defined(BCM_TOMAHAWK3_SUPPORT) 809 case bcmStatObjectEgrFieldStageEgress: 810 return bcmFieldQualifyStageEgress; 811 #endif 812 default: 813 break; 814 } 815 #endif 816 return 0; 817 } 818 819 bcm_field_qualify_t 820 _bcm_esw_stat_get_field_stage_from_table(soc_mem_t ingress_table) 821 { 822 #if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TRIDENT2PLUS_SUPPORT) 823 switch(ingress_table) { 824 case VFP_POLICY_TABLEm: 825 case VFP_POLICY_TABLE_PIPE0m: 826 case VFP_POLICY_TABLE_PIPE1m: 827 case VFP_POLICY_TABLE_PIPE2m: 828 case VFP_POLICY_TABLE_PIPE3m: 829 case VFP_POLICY_TABLE_PIPE4m: 830 case VFP_POLICY_TABLE_PIPE5m: 831 case VFP_POLICY_TABLE_PIPE6m: 832 case VFP_POLICY_TABLE_PIPE7m: 833 return bcmFieldQualifyStageLookup; 834 case FP_POLICY_TABLEm: 835 case IFP_POLICY_TABLEm: 836 case IFP_POLICY_TABLE_PIPE0m: 837 case IFP_POLICY_TABLE_PIPE1m: 838 case IFP_POLICY_TABLE_PIPE2m: 839 case IFP_POLICY_TABLE_PIPE3m: 840 case IFP_POLICY_TABLE_PIPE4m: 841 case IFP_POLICY_TABLE_PIPE5m: 842 case IFP_POLICY_TABLE_PIPE6m: 843 case IFP_POLICY_TABLE_PIPE7m: 844 return bcmFieldQualifyStageIngress; 845 case EXACT_MATCH_2m: 846 case EXACT_MATCH_2_PIPE0m: 847 case EXACT_MATCH_2_PIPE1m: 848 case EXACT_MATCH_2_PIPE2m: 849 case EXACT_MATCH_2_PIPE3m: 850 return bcmFieldQualifyStageIngressExactMatch; 851 #if defined(BCM_TRIDENT3_SUPPORT) || defined(BCM_TOMAHAWK3_SUPPORT) 852 case EFP_POLICY_TABLEm: 853 case EFP_POLICY_TABLE_PIPE0m: 854 case EFP_POLICY_TABLE_PIPE1m: 855 return bcmFieldQualifyStageEgress; 856 #endif 857 default: 858 break; 859 } 860 #endif 861 return 0; 862 } 863 864 /* 865 * Function: 866 * _bcm_esw_stat_id_validate 867 * Description: 868 * Check if the given flex stat id is Valid or not. 869 * Parameters: 870 * stat_counter_id (IN) Stat Counter Id 871 * group (OUT) Flex Group Mode 872 * mode (OUT) Flex Accounting Object 873 * offset (OUT) Flex Offset Mode 874 * pool_number (OUT) Allocated Pool Number for Flex Accounting Object 875 * base_idx (OUT) Allocated Base Index for Flex Accounting Object 876 * 877 * Return Value: 878 * BCM_E_XXX 879 * Notes: 880 */ 881 bcm_error_t 882 _bcm_esw_stat_id_validate(int unit, uint32 stat_counter_id) 883 { 884 int rv = BCM_E_NONE; /* Operational status. */ 885 886 #ifdef BCM_TOMAHAWK_SUPPORT 887 888 if ((stat_counter_id > BCM_MAX_STAT_COUNTER_IDS) || 889 (stat_counter_id <= 0) || (stat_counter_map[unit][stat_counter_id].used == 0)) { 890 rv = BCM_E_NOT_FOUND; 891 } 892 893 #endif 894 895 return rv; 896 } 897 /* 898 * Function: 899 * _bcm_esw_stat_get_counter_id_info 900 * Description: 901 * Get Stat Counter Id based on offset mode,group mode,pool number,object 902 * and base index. 903 * 904 * Parameters: 905 * stat_counter_id (IN) Stat Counter Id 906 * group (OUT) Flex Group Mode 907 * mode (OUT) Flex Accounting Object 908 * offset (OUT) Flex Offset Mode 909 * pool_number (OUT) Allocated Pool Number for Flex Accounting Object 910 * base_idx (OUT) Allocated Base Index for Flex Accounting Object 911 * 912 * Return Value: 913 * BCM_E_XXX 914 * Notes: 915 */ 916 void _bcm_esw_stat_get_counter_id_info( 917 int unit, 918 uint32 stat_counter_id, 919 bcm_stat_group_mode_t *group, 920 bcm_stat_object_t *object, 921 uint32 *mode, 922 uint32 *pool_number, 923 uint32 *base_idx) 924 { 925 if (!soc_feature(unit, soc_feature_flex_counter_opaque_stat_id)) { 926 *mode = (bcm_stat_flex_mode_t ) ((stat_counter_id >> 927 BCM_STAT_FLEX_MODE_START_BIT) & 928 (BCM_STAT_FLEX_MODE_MASK)); 929 *group = (bcm_stat_group_mode_t) ((stat_counter_id >> 930 BCM_STAT_FLEX_GROUP_START_BIT) & 931 (BCM_STAT_FLEX_GROUP_MASK)); 932 *pool_number = ((stat_counter_id >> BCM_STAT_FLEX_POOL_START_BIT) & 933 (BCM_STAT_FLEX_POOL_MASK)); 934 *object = (bcm_stat_object_t) (((stat_counter_id >> 935 BCM_STAT_FLEX_OBJECT_START_BIT) & 936 (BCM_STAT_FLEX_OBJECT_MASK)) 937 | (((stat_counter_id >> 938 BCM_STAT_FLEX_OBJECT_MSB_START_BIT) & 939 BCM_STAT_FLEX_OBJECT_MSB_MASK) 940 <<(BCM_STAT_FLEX_OBJECT_END_BIT - 941 BCM_STAT_FLEX_OBJECT_START_BIT+1))); 942 *base_idx = (stat_counter_id & BCM_STAT_FLEX_BASE_IDX_MASK); 943 } else { 944 #ifdef BCM_TOMAHAWK_SUPPORT 945 if ((stat_counter_id > BCM_MAX_STAT_COUNTER_IDS) || 946 (stat_counter_id <= 0) || (stat_counter_map[unit][stat_counter_id].used == 0)) { 947 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 948 (BSL_META_U(unit, 949 "Failed to get counter id info %d"), stat_counter_id)); 950 *mode = 0; 951 *group = *pool_number = 0; 952 *base_idx = 0; 953 return; 954 } 955 *mode = (bcm_stat_flex_mode_t ) (stat_counter_map[unit][stat_counter_id].mode); 956 *group = (bcm_stat_group_mode_t) (stat_counter_map[unit][stat_counter_id].group); 957 *pool_number = (stat_counter_map[unit][stat_counter_id].pool); 958 *object = (bcm_stat_object_t) (stat_counter_map[unit][stat_counter_id].object); 959 *base_idx = (stat_counter_map[unit][stat_counter_id].base_idx); 960 #endif 961 } 962 } 963 964 bcm_error_t _bcm_esw_stat_attr_fill( 965 int unit, 966 bcm_stat_group_mode_t group_mode, 967 bcm_stat_flex_direction_t direction, 968 bcm_stat_flex_attr_t *attr, 969 uint32 *num_counters) 970 { 971 bcm_stat_flex_ing_cmprsd_attr_selectors_t *ing_cmprsd_attr_selectors=NULL; 972 bcm_stat_flex_ing_pkt_attr_bits_t *ing_cmprsd_pkt_attr_bits=NULL; 973 974 bcm_stat_flex_egr_cmprsd_attr_selectors_t *egr_cmprsd_attr_selectors=NULL; 975 bcm_stat_flex_egr_pkt_attr_bits_t *egr_cmprsd_pkt_attr_bits=NULL; 976 977 bcm_stat_flex_ing_attr_t *ing_attr=NULL; 978 bcm_stat_flex_egr_attr_t *egr_attr=NULL; 979 uint32 total_counters = 0; 980 981 uint32 l2dlf_pkt=0; 982 uint32 unknown_l3uc_pkt=0; 983 uint32 unknown_l2mc_pkt=0; 984 uint32 known_l3uc_pkt=0; 985 uint32 known_l2mc_pkt=0; 986 uint32 l2uc_pkt=0; 987 uint32 l2bc_pkt=0; 988 uint32 control_pkt=0; 989 uint32 bpdu_pkt=0; 990 uint32 shift_by_bits=0; 991 uint32 shift_by_bits_for_value=0; 992 993 uint32 map_index=0; 994 uint32 ignore_index=0; 995 uint32 counter_index=0; 996 uint32 outer_index=0; 997 uint32 inner_index=0; 998 999 if (attr == NULL) { 1000 return BCM_E_FAIL; 1001 } 1002 l2dlf_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit,_L2DLF_PKT); 1003 unknown_l3uc_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 1004 _UNKNOWN_L3UC_PKT); 1005 unknown_l2mc_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 1006 _UNKNOWN_L2MC_PKT); 1007 known_l3uc_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 1008 _KNOWN_L3UC_PKT); 1009 known_l2mc_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 1010 _KNOWN_L2MC_PKT); 1011 l2uc_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit,_L2UC_PKT); 1012 l2bc_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit,_L2BC_PKT); 1013 control_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit,_CONTROL_PKT); 1014 bpdu_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit,_BPDU_PKT); 1015 1016 /* 1. Allocating attribute Memory .... */ 1017 sal_memset(attr,0,sizeof(bcm_stat_flex_attr_t)); 1018 1019 /* 2. Deciding direction */ 1020 if (direction == bcmStatFlexDirectionIngress) { 1021 /* INGRESS SIDE */ 1022 attr->direction=bcmStatFlexDirectionIngress; 1023 ing_attr = &(attr->ing_attr); 1024 ing_cmprsd_attr_selectors = &(ing_attr->cmprsd_attr_selectors); 1025 ing_cmprsd_pkt_attr_bits = &(ing_attr->cmprsd_attr_selectors. 1026 pkt_attr_bits); 1027 } else { 1028 /* EGRESS SIDE */ 1029 attr->direction=bcmStatFlexDirectionEgress; 1030 egr_attr = &(attr->egr_attr); 1031 egr_cmprsd_attr_selectors=&(egr_attr->cmprsd_attr_selectors); 1032 egr_cmprsd_pkt_attr_bits= &(egr_attr->cmprsd_attr_selectors. 1033 pkt_attr_bits); 1034 } 1035 1036 if (attr->direction == bcmStatFlexDirectionEgress) { 1037 switch(group_mode) { 1038 case bcmStatGroupModeDlfAll: 1039 case bcmStatGroupModeSingleWithControl: 1040 LOG_DEBUG(BSL_LS_BCM_FLEXCTR, 1041 (BSL_META_U(unit, 1042 "Overiding group_mode->bcmStatGroupModeSingle\n"))); 1043 group_mode = bcmStatGroupModeSingle; 1044 break; 1045 case bcmStatGroupModeTyped: 1046 case bcmStatGroupModeTypedAll: 1047 case bcmStatGroupModeTrafficTypeWithControl: 1048 case bcmStatGroupModeDlfAllWithControl: 1049 case bcmStatGroupModeTypedWithControl: 1050 case bcmStatGroupModeTypedAllWithControl: 1051 LOG_DEBUG(BSL_LS_BCM_FLEXCTR, 1052 (BSL_META_U(unit, 1053 "Overiding group_mode to " 1054 "bcmStatGroupModeTrafficType \n"))); 1055 group_mode = bcmStatGroupModeTrafficType; 1056 break; 1057 case bcmStatGroupModeDlfIntPri: 1058 case bcmStatGroupModeDlfIntPriWithControl: 1059 case bcmStatGroupModeTypedIntPriWithControl: 1060 LOG_DEBUG(BSL_LS_BCM_FLEXCTR, 1061 (BSL_META_U(unit, 1062 "Overiding group_mode to " 1063 "bcmStatGroupModeTypedIntPri \n"))); 1064 group_mode = bcmStatGroupModeTypedIntPri; 1065 break; 1066 default: 1067 break; 1068 } 1069 } 1070 /* ######################################################### */ 1071 /* Ingress Packet Attributes(KATANA) */ 1072 /* 1073 CNG IFP_CNG INT_PRI VlanFmt OuterDot1P InnerDot1P IngressPort TOS PacketRes SVPType DROP IP 1074 38-37:2 36-35:2 34-31:4 30-29:2 28-26:3 25-23:3 22-17:6 16-9:8 8-3:6 2-2:1 1-1:1 0-0:1 1075 PRI_CNG_FN(8) PKT_PRI_FN(8) PORT_FN_FN(6) TOS_FN(8) PKT_RES_FN(8) NOT_USED 1076 */ 1077 /* ######################################################### */ 1078 1079 /* ######################################################### */ 1080 /* Egress Packet Attributes(KATANA) */ 1081 /* 1082 CNG INT_PRI VlanFmt OuterDot1P InnerDot1P EgressPort TOS PacketRes SVPType DVPType DROP IP 1083 32-31:2 30-27:4 26-25:2 24-22:3 21-19:3 18-13:6 12-5:8 4-4:1 3-3:1 2-2:1 1-1:1 0-0:1 1084 PRI_CNG_FN(6) PKT_PRI_FN(8) PORT_FN_FN(6) TOS_FN(8) PKT_RES_FN(4) NOT_USED 1085 */ 1086 /* ######################################################### */ 1087 1088 1089 /* 3. Filling up attributes */ 1090 switch(group_mode) { 1091 case bcmStatGroupModeSingle: 1092 /* *********************************************/ 1093 /* A single counter used for all traffic types */ 1094 /* 1) UNKNOWN_PKT|CONTROL_PKT|BPDU_PKT|L2BC_PKT|L2UC_PKT|L2DLF_PKT| */ 1095 /* UNKNOWN_IPMC_PKT|KNOWN_IPMC_PKT|KNOWN_L2MC_PKT| */ 1096 /* UNKNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT|KNOWN_L3UC_PKT| */ 1097 /* UNKNOWN_L3UC_PKT|KNOWN_MPLS_PKT|KNOWN_MPLS_L3_PKT| */ 1098 /* KNOWN_MPLS_L2_PKT|UNKNOWN_MPLS_PKT|KNOWN_MIM_PKT| */ 1099 /* UNKNOWN_MIM_PKT|KNOWN_MPLS_MULTICAST_PKT */ 1100 1101 /* ******************************************* */ 1102 if (attr->direction==bcmStatFlexDirectionIngress) { 1103 total_counters=1; 1104 _bcm_esw_fillup_ing_uncmp_attr( 1105 ing_attr, 1106 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 1107 1); 1108 _bcm_esw_fillup_ing_pkt_res_offset_table( 1109 ing_attr,sizeof(ing_Single_res)/sizeof(ing_Single_res[0]), 1110 &ing_Single_res[0]); 1111 } else { 1112 total_counters=1; 1113 _bcm_esw_fillup_egr_uncmp_attr( 1114 egr_attr, 1115 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 1116 1); 1117 _bcm_esw_fillup_egr_pkt_res_offset_table( 1118 egr_attr,sizeof(egr_Single_res)/sizeof(egr_Single_res[0]), 1119 &egr_Single_res[0]); 1120 } 1121 break; 1122 case bcmStatGroupModeTrafficType: 1123 /* **************************************************************** */ 1124 /* A dedicated counter per traffic type Unicast,multicast,broadcast */ 1125 /* 1) L2UC_PKT | KNOWN_L3UC_PKT | UNKNOWN_L3UC_PKT */ 1126 /* 2) KNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT| */ 1127 /* 3) L2BC_PKT| */ 1128 /* **************************************************************** */ 1129 1130 if (attr->direction==bcmStatFlexDirectionIngress) { 1131 total_counters=3; 1132 _bcm_esw_fillup_ing_uncmp_attr( 1133 ing_attr, 1134 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 1135 3); 1136 _bcm_esw_fillup_ing_pkt_res_offset_table( 1137 ing_attr, 1138 sizeof(ing_TrafficType_res)/sizeof(ing_TrafficType_res[0]), 1139 &ing_TrafficType_res[0]); 1140 } else { 1141 total_counters=2; 1142 _bcm_esw_fillup_egr_uncmp_attr( 1143 egr_attr, 1144 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 1145 2); 1146 _bcm_esw_fillup_egr_pkt_res_offset_table( 1147 egr_attr, 1148 sizeof(egr_TrafficType_res)/sizeof(egr_TrafficType_res[0]), 1149 &egr_TrafficType_res[0]); 1150 } 1151 break; 1152 case bcmStatGroupModeDlfAll: 1153 /* ************************************************************* */ 1154 /* A pair of counters where the base counter is used for dlf and */ 1155 /* the other counter is used for all traffic types */ 1156 /* 1) L2DLF_PKT */ 1157 /* 2) UNKNOWN_PKT | CONTROL_PKT|BPDU_PKT|L2BC_PKT|L2UC_PKT| */ 1158 /* L2DLF_PKT|UNKNOWN_IPMC_PKT|KNOWN_IPMC_PKT|KNOWN_L2MC_PKT| */ 1159 /* UNKNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT|KNOWN_L3UC_PKT| */ 1160 /* UNKNOWN_L3UC_PKT|KNOWN_MPLS_PKT|KNOWN_MPLS_L3_PKT| */ 1161 /* KNOWN_MPLS_L2_PKT|UNKNOWN_MPLS_PKT|KNOWN_MIM_PKT| */ 1162 /* UNKNOWN_MIM_PKT|KNOWN_MPLS_MULTICAST_PKT */ 1163 /* ************************************************************* */ 1164 1165 if (attr->direction==bcmStatFlexDirectionIngress) { 1166 total_counters=2; 1167 _bcm_esw_fillup_ing_uncmp_attr( 1168 ing_attr, 1169 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 1170 2); 1171 _bcm_esw_fillup_ing_pkt_res_offset_table( 1172 ing_attr,sizeof(ing_DlfAll_res)/sizeof(ing_DlfAll_res[0]), 1173 &ing_DlfAll_res[0]); 1174 } else { 1175 /* Group mode is overrided so control shouldn't hit this part */ 1176 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 1177 (BSL_META_U(unit, 1178 "bcmStatGroupModeDlfAll is not supported" 1179 "in egress side\n"))); 1180 sal_free(attr); 1181 return BCM_E_INTERNAL; 1182 } 1183 break; 1184 case bcmStatGroupModeDlfIntPri: 1185 /* ************************************************************** */ 1186 /* N+1 counters where the base counter is used for dlf and next N */ 1187 /* are used per Cos */ 1188 /* 1) L2_DLF */ 1189 /* 2..17) INT_PRI bits: 4bits */ 1190 /* ************************************************************** */ 1191 1192 if (attr->direction==bcmStatFlexDirectionEgress) { 1193 /* Must not hit */ 1194 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 1195 (BSL_META_U(unit, 1196 "bcmStatGroupModeDlfIntPri IsNotAvailable" 1197 "in EgressSide\n"))); 1198 sal_free(attr); 1199 return BCM_E_INTERNAL; 1200 } 1201 1202 if (SOC_IS_TOMAHAWK3(unit)) { 1203 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 1204 (BSL_META_U(unit, 1205 "bcmStatGroupModeDlfIntPri IsNotAvailable" 1206 "for %s\n"), SOC_UNIT_NAME(unit))); 1207 sal_free(attr); 1208 return BCM_E_UNAVAIL; 1209 } 1210 1211 /* Although 17 counters but pkt_res(6) + int_pri(4)=10 bits 1212 so cannot use UNCOMPRESSED MODE */ 1213 1214 /* INT_PRI */ /* .... */ /* PacketRes */ 1215 /* 34-31:4 */ /* .... */ /* 8-3:6 */ 1216 /* PRI_CNG_FN=Cng(2x):IFP(2x):IntPri( all 4bits are used). 1217 RightMost so no shifting required */ 1218 /* PKT_RES_FN=Pkt(6bits but 1 is used):SVP(1x):Drop(1x). 1219 LeftMost so 2 Left shifting required */ 1220 1221 total_counters=17; 1222 ing_attr->packet_attr_type=bcmStatFlexPacketAttrTypeCompressed; 1223 1224 ing_cmprsd_pkt_attr_bits->pkt_resolution = 1; 1225 1226 ing_cmprsd_pkt_attr_bits->pkt_resolution_pos = ing_pkt_attr_cmprsd_bits_g[unit]. 1227 pkt_resolution_pos; 1228 ing_cmprsd_pkt_attr_bits->pkt_resolution_mask = 1; 1229 1230 ing_cmprsd_pkt_attr_bits->int_pri = ing_pkt_attr_cmprsd_bits_g[unit].int_pri; 1231 ing_cmprsd_pkt_attr_bits->int_pri_pos = ing_pkt_attr_cmprsd_bits_g[unit]. 1232 int_pri_pos; 1233 ing_cmprsd_pkt_attr_bits->int_pri_mask = ing_pkt_attr_cmprsd_bits_g[unit]. 1234 int_pri_mask; 1235 1236 ing_cmprsd_attr_selectors->total_counters = 17; 1237 1238 /* set pkt_resolution map for 1 counters */ 1239 /* Map[Encoded Packet value << 2=>[SVP-1bit + DROP-1bit]= 1240 CounterIndex << 2=>[SVP-1bit + DROP-1bit]=4(Start),8,12*/ 1241 1242 /* Reset pkt_resolution map */ 1243 for (map_index=0; 1244 map_index < sizeof(bcm_stat_flex_ing_cmprsd_pkt_res_attr_map_t) ; 1245 map_index++) { 1246 ing_cmprsd_attr_selectors->pkt_res_attr_map[map_index]=0; 1247 } 1248 shift_by_bits= ing_pkt_attr_cmprsd_bits_g[unit].svp_type + ing_pkt_attr_cmprsd_bits_g[unit].drop; 1249 shift_by_bits_for_value = shift_by_bits; 1250 1251 for (ignore_index=0; 1252 ignore_index < (1<<shift_by_bits); ignore_index++) { 1253 ing_cmprsd_attr_selectors-> 1254 pkt_res_attr_map[(l2dlf_pkt<<shift_by_bits) | ignore_index]= 1255 (1<<(shift_by_bits_for_value)); 1256 } 1257 1258 /* Reset pri_cng map */ 1259 for (map_index=0; map_index < 256 ;map_index++) { 1260 ing_cmprsd_attr_selectors->pri_cnf_attr_map[map_index]=0; 1261 } 1262 /* set pri_cng map for 16 counters */ 1263 for (ignore_index=0; ignore_index < (1<<4) ; ignore_index++) { 1264 for (map_index=0; map_index < 16 ;map_index++) { 1265 ing_cmprsd_attr_selectors-> 1266 pri_cnf_attr_map[(ignore_index<<4) | map_index]=map_index; 1267 } 1268 } 1269 1270 /* Reset all Offset table fields */ 1271 for (counter_index=0;counter_index<256;counter_index++) { 1272 ing_cmprsd_attr_selectors-> 1273 offset_table_map[counter_index].offset=0; 1274 ing_cmprsd_attr_selectors-> 1275 offset_table_map[counter_index].count_enable=0; 1276 } 1277 1278 /* Set DLF counter indexes(ODD 1,3,5) considering INT_PRI bits 1279 don't care */ 1280 for (counter_index=0;counter_index<16;counter_index++) { 1281 ing_cmprsd_attr_selectors-> 1282 offset_table_map[(counter_index<<1)|1].offset=0; 1283 ing_cmprsd_attr_selectors-> 1284 offset_table_map[(counter_index<<1)|1].count_enable=1; 1285 } 1286 1287 /* Set Int pri counter indexes(Even 2,4,6) considering DLF=0 */ 1288 for (counter_index=0;counter_index<16;counter_index++) { 1289 ing_cmprsd_attr_selectors-> 1290 offset_table_map[(counter_index<<1)]. 1291 offset=(counter_index+1); 1292 ing_cmprsd_attr_selectors-> 1293 offset_table_map[(counter_index<<1)].count_enable=1; 1294 } 1295 break; 1296 case bcmStatGroupModeTyped: 1297 /* ******************************************************* */ 1298 /* A dedicated counter for unknown unicast, known unicast, */ 1299 /* multicast, broadcast */ 1300 /* 1) UNKNOWN_L3UC_PKT|_L2DLF_PKT */ 1301 /* 2) L2UC_PKT | KNOWN_L3UC_PKT */ 1302 /* 3) KNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT */ 1303 /* 4) L2BC_PKT */ 1304 /* ******************************************************* */ 1305 if (attr->direction==bcmStatFlexDirectionIngress) { 1306 total_counters=4; 1307 _bcm_esw_fillup_ing_uncmp_attr( 1308 ing_attr, 1309 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 1310 4); 1311 _bcm_esw_fillup_ing_pkt_res_offset_table( 1312 ing_attr,sizeof(ing_Typed_res)/sizeof(ing_Typed_res[0]), 1313 &ing_Typed_res[0]); 1314 } else { 1315 /* Group mode is overrided so control shouldn't hit this part */ 1316 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 1317 (BSL_META_U(unit, 1318 "bcmStatGroupModeTyped: is not supported" 1319 " in egress side\n"))); 1320 sal_free(attr); 1321 return BCM_E_INTERNAL; 1322 } 1323 break; 1324 case bcmStatGroupModeTypedAll: 1325 /* ******************************************************* */ 1326 /* A dedicated counter for unknown unicast, known unicast, */ 1327 /* multicast, broadcast and one for all traffic(not already*/ 1328 /* counted) */ 1329 /* 1) UNKNOWN_L3UC_PKT */ 1330 /* 2) L2UC_PKT | KNOWN_L3UC_PKT */ 1331 /* 3) KNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT */ 1332 /* 4) L2BC_PKT */ 1333 /* 5) UNKNOWN_PKT|CONTROL_PKT|BPDU_PKT|L2DLF_PKT| */ 1334 /* UNKNOWN_IPMC_PKT|KNOWN_IPMC_PKT|KNOWN_MPLS_PKT | */ 1335 /* KNOWN_MPLS_L3_PKT|KNOWN_MPLS_L2_PKT|UNKNOWN_MPLS_PKT */ 1336 /* KNOWN_MIM_PKT|UNKNOWN_MIM_PKT| */ 1337 /* KNOWN_MPLS_MULTICAST_PKT */ 1338 /* ******************************************************* */ 1339 if (attr->direction==bcmStatFlexDirectionIngress) { 1340 total_counters=5; 1341 _bcm_esw_fillup_ing_uncmp_attr( 1342 ing_attr, 1343 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 1344 5); 1345 _bcm_esw_fillup_ing_pkt_res_offset_table( 1346 ing_attr,sizeof(ing_TypedAll_res)/sizeof(ing_TypedAll_res[0]), 1347 &ing_TypedAll_res[0]); 1348 } else { 1349 /* Group mode is overrided so control shouldn't hit this part */ 1350 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 1351 (BSL_META_U(unit, 1352 "bcmStatGroupModeTypedAll is NotSupported" 1353 " in EgressSide\n"))); 1354 sal_free(attr); 1355 return BCM_E_INTERNAL; 1356 } 1357 break; 1358 case bcmStatGroupModeTypedIntPri: 1359 if (SOC_IS_TOMAHAWK3(unit)) { 1360 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 1361 (BSL_META_U(unit, 1362 "bcmStatGroupModeTypedIntPri IsNotAvailable" 1363 "for %s\n"), SOC_UNIT_NAME(unit))); 1364 sal_free(attr); 1365 return BCM_E_UNAVAIL; 1366 } 1367 1368 /* *************************************************************** */ 1369 /* A dedicated counter for unknown unicast, known unicast, */ 1370 /* multicast,broadcast and N internal priority counters for traffic*/ 1371 /* (not already counted) */ 1372 /* 1) UNKNOWN_L3UC_PKT */ 1373 /* 2) L2UC_PKT | KNOWN_L3UC_PKT */ 1374 /* 3) KNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT */ 1375 /* 4) L2BC_PKT */ 1376 /* 5..20) INT_PRI bits: 4bits */ 1377 /* *************************************************************** */ 1378 if (attr->direction==bcmStatFlexDirectionIngress) { 1379 1380 /* Although 20 counters but pkt_res(6) + int_pri(4)=10 bits 1381 so cannot use UNCOMPRESSED MODE */ 1382 1383 /* INT_PRI */ /* .... */ /* PacketRes */ 1384 /* 34-31:4 */ /* .... */ /* 8-3:6 */ 1385 /* PRI_CNG_FN=Cng(2x):IFP(2x):IntPri( all 4bits are used). 1386 RightMost so no shifting required */ 1387 /* PKT_RES_FN=Pkt(6bits but 3 is used):SVP(1x):Drop(1x). 1388 LeftMost so 2 Left shifting required */ 1389 1390 total_counters=20; 1391 1392 ing_attr->packet_attr_type=bcmStatFlexPacketAttrTypeCompressed; 1393 /* Cannot consider 0 value so taking 3 i.s.o. 2 */ 1394 ing_cmprsd_pkt_attr_bits->pkt_resolution = 3; 1395 ing_cmprsd_pkt_attr_bits->pkt_resolution_pos = ing_pkt_attr_cmprsd_bits_g[unit]. 1396 pkt_resolution_pos; 1397 ing_cmprsd_pkt_attr_bits->pkt_resolution_mask = (1<<3)-1; 1398 1399 ing_cmprsd_pkt_attr_bits->int_pri = ing_pkt_attr_cmprsd_bits_g[unit].int_pri; 1400 ing_cmprsd_pkt_attr_bits->int_pri_pos = ing_pkt_attr_cmprsd_bits_g[unit]. 1401 int_pri_pos; 1402 ing_cmprsd_pkt_attr_bits->int_pri_mask= ing_pkt_attr_cmprsd_bits_g[unit]. 1403 int_pri_mask; 1404 1405 ing_cmprsd_attr_selectors->total_counters = 20; 1406 /* Reset pkt_resolution map */ 1407 for (map_index=0; map_index < 256 ;map_index++) { 1408 ing_cmprsd_attr_selectors->pkt_res_attr_map[map_index]=0; 1409 } 1410 /* set pkt_resolution map for 1 counters */ 1411 /* Map[Encoded Packet value << 2=>[SVP-1bit + DROP-1bit]= 1412 CounterIndex << 2=>[SVP-1bit + DROP-1bit]=4(Start),8,12*/ 1413 shift_by_bits= ing_pkt_attr_cmprsd_bits_g[unit].svp_type + 1414 ing_pkt_attr_cmprsd_bits_g[unit].drop; 1415 shift_by_bits_for_value = shift_by_bits; 1416 1417 /* set pkt_resolution map for 1 counters.Ignore SVP,DROP bits */ 1418 for (ignore_index=0; 1419 ignore_index < (1<<shift_by_bits) ; ignore_index++) { 1420 ing_cmprsd_attr_selectors->pkt_res_attr_map[ 1421 (unknown_l3uc_pkt<<shift_by_bits)|ignore_index]= 1422 (1<<shift_by_bits_for_value); 1423 ing_cmprsd_attr_selectors->pkt_res_attr_map[ 1424 (l2uc_pkt<<shift_by_bits)|ignore_index]= 1425 (2<<shift_by_bits_for_value); 1426 ing_cmprsd_attr_selectors->pkt_res_attr_map[ 1427 (known_l3uc_pkt<<shift_by_bits)|ignore_index]= 1428 (2<<shift_by_bits_for_value); 1429 ing_cmprsd_attr_selectors->pkt_res_attr_map[ 1430 (known_l2mc_pkt<<shift_by_bits)|ignore_index]= 1431 (3<<shift_by_bits_for_value); 1432 ing_cmprsd_attr_selectors->pkt_res_attr_map[ 1433 (unknown_l2mc_pkt<<shift_by_bits)|ignore_index]= 1434 (3<<shift_by_bits_for_value); 1435 ing_cmprsd_attr_selectors->pkt_res_attr_map[ 1436 (l2bc_pkt<<shift_by_bits)|ignore_index]= 1437 (4<<shift_by_bits_for_value); 1438 } 1439 /* Reset pri_cng map */ 1440 for (map_index=0; map_index < 256 ;map_index++) { 1441 ing_cmprsd_attr_selectors->pri_cnf_attr_map[map_index]=0; 1442 } 1443 /* set pri_cng map for 16 counters */ 1444 for (ignore_index=0; ignore_index < (1<<4) ; ignore_index++) { 1445 for (map_index=0; map_index < 16 ;map_index++) { 1446 ing_cmprsd_attr_selectors-> 1447 pri_cnf_attr_map[(ignore_index<<4)|map_index]=map_index; 1448 } 1449 } 1450 /* Reset all Offset table fields */ 1451 for (counter_index=0;counter_index<256;counter_index++) { 1452 ing_cmprsd_attr_selectors-> 1453 offset_table_map[counter_index].offset=0; 1454 ing_cmprsd_attr_selectors-> 1455 offset_table_map[counter_index].count_enable=0; 1456 } 1457 /* ************************************************************* */ 1458 /* Set unicast, known unicast, multicast, broadcast counter */ 1459 /* indexes considering INT_PRI as 0 */ 1460 /* ************************************************************* */ 1461 ing_cmprsd_attr_selectors->offset_table_map[1].offset=0; 1462 ing_cmprsd_attr_selectors->offset_table_map[1].count_enable=1; 1463 ing_cmprsd_attr_selectors->offset_table_map[2].offset=1; 1464 ing_cmprsd_attr_selectors->offset_table_map[2].count_enable=1; 1465 ing_cmprsd_attr_selectors->offset_table_map[3].offset=2; 1466 ing_cmprsd_attr_selectors->offset_table_map[3].count_enable=1; 1467 ing_cmprsd_attr_selectors->offset_table_map[4].offset=3; 1468 ing_cmprsd_attr_selectors->offset_table_map[4].count_enable=1; 1469 1470 1471 /* Set Int pri counter indexes NotConsidering pkt resolution bits*/ 1472 /* Priority 0 Counter not satisfying any condition */ 1473 ing_cmprsd_attr_selectors->offset_table_map[0].offset=4; 1474 ing_cmprsd_attr_selectors->offset_table_map[0].count_enable=1; 1475 ing_cmprsd_attr_selectors->offset_table_map[5].offset=4; 1476 ing_cmprsd_attr_selectors->offset_table_map[5].count_enable=1; 1477 ing_cmprsd_attr_selectors->offset_table_map[6].offset=4; 1478 ing_cmprsd_attr_selectors->offset_table_map[6].count_enable=1; 1479 ing_cmprsd_attr_selectors->offset_table_map[7].offset=4; 1480 ing_cmprsd_attr_selectors->offset_table_map[7].count_enable=1; 1481 /*INT_PRI*/ 1482 for (counter_index=1;counter_index<(1<<4);counter_index++) { 1483 /*PktRes*/ 1484 for(ignore_index=0;ignore_index<(1<<3);ignore_index++) { 1485 ing_cmprsd_attr_selectors-> 1486 offset_table_map[(counter_index<<3)|ignore_index]. 1487 offset=(counter_index+4); 1488 ing_cmprsd_attr_selectors-> 1489 offset_table_map[(counter_index<<3)|ignore_index]. 1490 count_enable=1; 1491 } 1492 } 1493 } else { 1494 /* ************************************************************* */ 1495 /* A dedicated counter for unknown unicast, known unicast, */ 1496 /* multicast,broadcast and N internal priority counters for */ 1497 /* traffic (not already counted) */ 1498 /* 1) Unicast */ 1499 /* 2) Multicast */ 1500 /* 3..18) INT_PRI bits: 4bits */ 1501 /* ************************************************************* */ 1502 total_counters=18; 1503 egr_attr->packet_attr_type=bcmStatFlexPacketAttrTypeCompressed; 1504 1505 egr_cmprsd_pkt_attr_bits->pkt_resolution = egr_pkt_attr_cmprsd_bits_g[unit]. 1506 pkt_resolution; 1507 egr_cmprsd_pkt_attr_bits->pkt_resolution_pos = egr_pkt_attr_cmprsd_bits_g[unit]. 1508 pkt_resolution_pos; 1509 egr_cmprsd_pkt_attr_bits->pkt_resolution_mask = egr_pkt_attr_cmprsd_bits_g[unit]. 1510 pkt_resolution_mask; 1511 1512 egr_cmprsd_pkt_attr_bits->int_pri = egr_pkt_attr_cmprsd_bits_g[unit].int_pri; 1513 egr_cmprsd_pkt_attr_bits->int_pri_pos = egr_pkt_attr_cmprsd_bits_g[unit]. 1514 int_pri_pos; 1515 egr_cmprsd_pkt_attr_bits->int_pri_mask=egr_pkt_attr_cmprsd_bits_g[unit].int_pri_mask; 1516 1517 egr_cmprsd_attr_selectors->total_counters = 18; 1518 1519 shift_by_bits= egr_pkt_attr_cmprsd_bits_g[unit].svp_type + 1520 egr_pkt_attr_cmprsd_bits_g[unit].dvp_type + 1521 egr_pkt_attr_cmprsd_bits_g[unit].drop; 1522 shift_by_bits_for_value = shift_by_bits; 1523 /* Set pkt_resolution map */ 1524 /* Unicast */ 1525 for (map_index=0; map_index < 1<< shift_by_bits ;map_index++) { 1526 egr_cmprsd_attr_selectors->pkt_res_attr_map[map_index]=0; 1527 } 1528 /* Multicast */ 1529 for (; map_index < 255 ;map_index++) { 1530 egr_cmprsd_attr_selectors-> 1531 pkt_res_attr_map[map_index]=(1<<shift_by_bits_for_value); 1532 } 1533 1534 /* Reset pri_cng map */ 1535 for (map_index=0; map_index < 64 ;map_index++) { 1536 egr_cmprsd_attr_selectors->pri_cnf_attr_map[map_index]=0; 1537 } 1538 /* set pri_cng map for 16 counters */ 1539 for (ignore_index=0; ignore_index < (1<<2) ; ignore_index++) { 1540 for (map_index=0; map_index < 16 ;map_index++) { 1541 egr_cmprsd_attr_selectors-> 1542 pri_cnf_attr_map[(ignore_index<<4)|map_index]=map_index; 1543 } 1544 } 1545 /* Reset all Offset table fields */ 1546 for(counter_index=0;counter_index<256;counter_index++) { 1547 egr_cmprsd_attr_selectors-> 1548 offset_table_map[counter_index].offset=0; 1549 egr_cmprsd_attr_selectors-> 1550 offset_table_map[counter_index].count_enable=0; 1551 } 1552 /* ************************************************************** */ 1553 /* Set unicast, multicast, counter indexes */ 1554 /* considering INT_PRI bits zero */ 1555 /* ************************************************************** */ 1556 egr_cmprsd_attr_selectors-> 1557 offset_table_map[0].offset=0; 1558 egr_cmprsd_attr_selectors-> 1559 offset_table_map[0].count_enable=1; 1560 egr_cmprsd_attr_selectors-> 1561 offset_table_map[1].offset=1; 1562 egr_cmprsd_attr_selectors-> 1563 offset_table_map[1].count_enable=1; 1564 /* PRI-0 counters will be addition of unicast & multicast packets!*/ 1565 /* Set Int pri counter indexes ignoring pkt_res bits */ 1566 /*INT_PRI*/ 1567 for (counter_index=1;counter_index<(1<<4);counter_index++) { 1568 /*PktRes*/ 1569 for (ignore_index=0;ignore_index<(1<<1);ignore_index++) { 1570 egr_cmprsd_attr_selectors-> 1571 offset_table_map[(counter_index<<1)|ignore_index]. 1572 offset=(counter_index+2); 1573 egr_cmprsd_attr_selectors-> 1574 offset_table_map[(counter_index<<1)|ignore_index]. 1575 count_enable=1; 1576 } 1577 } 1578 } 1579 break; 1580 case bcmStatGroupModeSingleWithControl: 1581 /* ************************************************************** */ 1582 /* A single counter used for all traffic types with an additional */ 1583 /* counter for control traffic */ 1584 /* 1) UNKNOWN_PKT| |L2BC_PKT|L2UC_PKT|L2DLF_PKT| */ 1585 /* UNKNOWN_IPMC_PKT|KNOWN_IPMC_PKT|KNOWN_L2MC_PKT| */ 1586 /* UNKNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT|KNOWN_L3UC_PKT| */ 1587 /* UNKNOWN_L3UC_PKT|KNOWN_MPLS_PKT|KNOWN_MPLS_L3_PKT| */ 1588 /* KNOWN_MPLS_L2_PKT|UNKNOWN_MPLS_PKT|KNOWN_MIM_PKT| */ 1589 /* UNKNOWN_MIM_PKT|KNOWN_MPLS_MULTICAST_PKT */ 1590 /* 2) CONTROL_PKT|BPDU_PKT */ 1591 /* ************************************************************** */ 1592 if (attr->direction==bcmStatFlexDirectionIngress) { 1593 total_counters=2; 1594 _bcm_esw_fillup_ing_uncmp_attr( 1595 ing_attr, 1596 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 1597 2); 1598 _bcm_esw_fillup_ing_pkt_res_offset_table( 1599 ing_attr, 1600 sizeof(ing_SingleWithControl_res)/ 1601 sizeof(ing_SingleWithControl_res[0]), 1602 &ing_SingleWithControl_res[0]); 1603 } else { 1604 /* Group mode is overrided so control shouldn't hit this part */ 1605 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 1606 (BSL_META_U(unit, 1607 "bcmStatGroupModeSingleWithControl" 1608 " is not supported in egress side\n"))); 1609 sal_free(attr); 1610 return BCM_E_INTERNAL; 1611 } 1612 break; 1613 case bcmStatGroupModeTrafficTypeWithControl: 1614 /* ******************************************************** */ 1615 /* A dedicated counter per traffic type unicast, multicast, */ 1616 /* broadcast with an additional counter for control traffic */ 1617 /* 1) L2UC_PKT | KNOWN_L3UC_PKT | UNKNOWN_L3UC_PKT */ 1618 /* 2) KNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT| */ 1619 /* 3) L2BC_PKT| */ 1620 /* 4) CONTROL_PKT|BPDU_PKT */ 1621 /* ******************************************************** */ 1622 if (attr->direction==bcmStatFlexDirectionIngress) { 1623 total_counters=4; 1624 _bcm_esw_fillup_ing_uncmp_attr( 1625 ing_attr, 1626 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 1627 4); 1628 _bcm_esw_fillup_ing_pkt_res_offset_table( 1629 ing_attr, 1630 sizeof(ing_TrafficTypeWithControl_res)/ 1631 sizeof(ing_TrafficTypeWithControl_res[0]), 1632 &ing_TrafficTypeWithControl_res[0]); 1633 } else { 1634 /* Group mode is overrided so control shouldn't hit this part */ 1635 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 1636 (BSL_META_U(unit, 1637 "bcmStatGroupModeTrafficTypeWithControl" 1638 "is not supported in egress side\n"))); 1639 sal_free(attr); 1640 return BCM_E_INTERNAL; 1641 } 1642 break; 1643 case bcmStatGroupModeDlfAllWithControl: 1644 /* ************************************************************** */ 1645 /* A pair of counters where the base counter is used for control, */ 1646 /* the next one for dlf and the other counter is used for all */ 1647 /* traffic types */ 1648 /* 1) CONTROL_PKT|BPDU_PKT */ 1649 /* 2) L2DLF_PKT */ 1650 /* 3)UNKNOWN_PKT | CONTROL_PKT|BPDU_PKT|L2BC_PKT|L2UC_PKT| */ 1651 /* L2DLF_PKT|UNKNOWN_IPMC_PKT|KNOWN_IPMC_PKT|KNOWN_L2MC_PKT| */ 1652 /* UNKNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT|KNOWN_L3UC_PKT| */ 1653 /* UNKNOWN_L3UC_PKT|KNOWN_MPLS_PKT|KNOWN_MPLS_L3_PKT| */ 1654 /* KNOWN_MPLS_L2_PKT|UNKNOWN_MPLS_PKT|KNOWN_MIM_PKT| */ 1655 /* UNKNOWN_MIM_PKT|KNOWN_MPLS_MULTICAST_PKT */ 1656 /* ************************************************************** */ 1657 if (attr->direction==bcmStatFlexDirectionIngress) { 1658 total_counters=3; 1659 _bcm_esw_fillup_ing_uncmp_attr( 1660 ing_attr, 1661 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 1662 3); 1663 _bcm_esw_fillup_ing_pkt_res_offset_table( 1664 ing_attr, 1665 sizeof(ing_DlfAllWithControl_res)/ 1666 sizeof(ing_DlfAllWithControl_res[0]), 1667 &ing_DlfAllWithControl_res[0]); 1668 } else { 1669 /* Group mode is overrided so control shouldn't hit this part */ 1670 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 1671 (BSL_META_U(unit, 1672 "bcmStatGroupModeDlfAllWithControl is not supported " 1673 "in egress side\n"))); 1674 sal_free(attr); 1675 return BCM_E_INTERNAL; 1676 } 1677 break; 1678 case bcmStatGroupModeDlfIntPriWithControl: 1679 /* ************************************************************* */ 1680 /* N+2 counters where the base counter is used for control, the */ 1681 /* next one for dlf and next N are used per Cos */ 1682 /* 1) CONTROL_PKT|BPDU_PKT */ 1683 /* 2) L2_DLF */ 1684 /* 3..18) INT_PRI bits: 4bits */ 1685 /* ************************************************************* */ 1686 if (attr->direction==bcmStatFlexDirectionEgress) { 1687 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 1688 (BSL_META_U(unit, 1689 "GroupModeDlfIntPriWithControl is not available in " 1690 "egress side\n"))); 1691 sal_free(attr); 1692 return BCM_E_INTERNAL; 1693 } 1694 1695 if (SOC_IS_TOMAHAWK3(unit)) { 1696 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 1697 (BSL_META_U(unit, 1698 "bcmStatGroupModeDlfIntPriWithControl IsNotAvailable" 1699 "for %s\n"), SOC_UNIT_NAME(unit))); 1700 sal_free(attr); 1701 return BCM_E_UNAVAIL; 1702 } 1703 /* Although 18 counters but pkt_res(6) + int_pri(4)=10 bits 1704 so cannot use UNCOMPRESSED MODE */ 1705 1706 /* INT_PRI */ /* .... */ /* PacketRes */ 1707 /* 34-31:4 */ /* .... */ /* 8-3:6 */ 1708 /* PRI_CNG_FN=Cng(2x):IFP(2x):IntPri( all 4bits are used). 1709 RightMost so no shifting required */ 1710 /* PKT_RES_FN=Pkt(6bits but 2 is used):SVP(1x):Drop(1x). 1711 LeftMost so 2 Left shifting required */ 1712 1713 total_counters=18; 1714 ing_attr->packet_attr_type=bcmStatFlexPacketAttrTypeCompressed; 1715 1716 ing_cmprsd_pkt_attr_bits->pkt_resolution = 2; 1717 ing_cmprsd_pkt_attr_bits->pkt_resolution_pos = ing_pkt_attr_cmprsd_bits_g[unit]. 1718 pkt_resolution_pos; 1719 ing_cmprsd_pkt_attr_bits->pkt_resolution_mask = (1<<2)-1; 1720 1721 ing_cmprsd_pkt_attr_bits->int_pri = ing_pkt_attr_cmprsd_bits_g[unit].int_pri; 1722 ing_cmprsd_pkt_attr_bits->int_pri_pos = ing_pkt_attr_cmprsd_bits_g[unit]. 1723 int_pri_pos; 1724 1725 ing_cmprsd_pkt_attr_bits->int_pri_mask = ing_pkt_attr_cmprsd_bits_g[unit]. 1726 int_pri_mask; 1727 ing_cmprsd_attr_selectors->total_counters = 18; 1728 1729 /* Reset pkt_resolution map */ 1730 for (map_index=0; map_index < 256 ;map_index++) { 1731 ing_cmprsd_attr_selectors->pkt_res_attr_map[map_index]=0; 1732 } 1733 /* set pkt_resolution map for 1 counters */ 1734 /* Map[Encoded Packet value << 2=>[SVP-1bit + DROP-1bit]= 1735 CounterIndex << 2=>[SVP-1bit + DROP-1bit]=4(Start),8,12*/ 1736 1737 shift_by_bits= ing_pkt_attr_cmprsd_bits_g[unit].svp_type + ing_pkt_attr_cmprsd_bits_g[unit].drop; 1738 shift_by_bits_for_value = shift_by_bits; 1739 1740 for (ignore_index=0; 1741 ignore_index < (1<<shift_by_bits) ; ignore_index++) { 1742 ing_cmprsd_attr_selectors-> 1743 pkt_res_attr_map[ 1744 (control_pkt<<shift_by_bits) | ignore_index]= 1745 (1<<shift_by_bits_for_value); 1746 ing_cmprsd_attr_selectors-> 1747 pkt_res_attr_map[(bpdu_pkt<<shift_by_bits) | ignore_index]= 1748 (1<<shift_by_bits_for_value); 1749 ing_cmprsd_attr_selectors-> 1750 pkt_res_attr_map[ 1751 (l2dlf_pkt<<shift_by_bits) | ignore_index]= 1752 (2<<shift_by_bits_for_value); 1753 } 1754 1755 /* Reset pri_cng map */ 1756 for (map_index=0; map_index < 256 ;map_index++) { 1757 ing_cmprsd_attr_selectors->pri_cnf_attr_map[map_index]=0; 1758 } 1759 /* set pri_cng map for 16 counters */ 1760 for (ignore_index=0; ignore_index < (1<<4) ; ignore_index++) { 1761 for (map_index=0; map_index < 16 ;map_index++) { 1762 ing_cmprsd_attr_selectors-> 1763 pri_cnf_attr_map[(ignore_index<<4) | map_index]=map_index; 1764 } 1765 } 1766 1767 /* Reset all Offset table fields */ 1768 for(counter_index=0;counter_index<256;counter_index++) { 1769 ing_cmprsd_attr_selectors-> 1770 offset_table_map[counter_index].offset=0; 1771 ing_cmprsd_attr_selectors-> 1772 offset_table_map[counter_index].count_enable=0; 1773 } 1774 /* ************************************************************ */ 1775 /* Set CONTROL_PKT|BPDU_PKT , L2DLF counter indexes considering */ 1776 /* INT_PRI bits 0 */ 1777 /* ************************************************************ */ 1778 1779 ing_cmprsd_attr_selectors->offset_table_map[1].offset=0; 1780 ing_cmprsd_attr_selectors->offset_table_map[1].count_enable=1; 1781 ing_cmprsd_attr_selectors->offset_table_map[2].offset=1; 1782 ing_cmprsd_attr_selectors->offset_table_map[2].count_enable=1; 1783 1784 /* Set IntPri counter indexes not-considering pkt resolution bits*/ 1785 /* Priority 0 Counter not satisfying any condition */ 1786 ing_cmprsd_attr_selectors->offset_table_map[0].offset=2; 1787 ing_cmprsd_attr_selectors->offset_table_map[0].count_enable=1; 1788 ing_cmprsd_attr_selectors->offset_table_map[3].offset=2; 1789 ing_cmprsd_attr_selectors->offset_table_map[3].count_enable=1; 1790 /*INT_PRI*/ 1791 for (counter_index=1;counter_index<(1<<4);counter_index++) { 1792 /*PktRes*/ 1793 for (ignore_index=0;ignore_index<(1<<2);ignore_index++) { 1794 ing_cmprsd_attr_selectors-> 1795 offset_table_map[(counter_index<<2)|ignore_index]. 1796 offset=(counter_index+2); 1797 ing_cmprsd_attr_selectors-> 1798 offset_table_map[(counter_index<<2)|ignore_index]. 1799 count_enable=1; 1800 } 1801 } 1802 break; 1803 case bcmStatGroupModeTypedWithControl: 1804 /* **************************************************************** */ 1805 /* A dedicated counter for control, unknown unicast, known unicast, */ 1806 /* multicast, broadcast */ 1807 /* 1) CONTROL_PKT|BPDU_PKT */ 1808 /* 2) UNKNOWN_L3UC_PKT */ 1809 /* 3) L2UC_PKT | KNOWN_L3UC_PKT */ 1810 /* 4) KNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT */ 1811 /* 5) L2BC_PKT */ 1812 /* **************************************************************** */ 1813 if (attr->direction == bcmStatFlexDirectionIngress) { 1814 total_counters=5; 1815 _bcm_esw_fillup_ing_uncmp_attr( 1816 ing_attr, 1817 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 1818 5); 1819 _bcm_esw_fillup_ing_pkt_res_offset_table( 1820 ing_attr, 1821 sizeof(ing_TypedWithControl_res)/ 1822 sizeof(ing_TypedWithControl_res[0]), 1823 &ing_TypedWithControl_res[0]); 1824 } else { 1825 /* Group mode is overrided so control shouldn't hit this part */ 1826 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 1827 (BSL_META_U(unit, 1828 "bcmStatGroupModeTypedWithControl" 1829 "is not supported in egress side\n"))); 1830 sal_free(attr); 1831 return BCM_E_INTERNAL; 1832 } 1833 break; 1834 case bcmStatGroupModeTypedAllWithControl: 1835 /* ***************************************************************** */ 1836 /* A dedicated counter for control, unknown unicast, known unicast, */ 1837 /* multicast, broadcast and one for all traffic (not already counted)*/ 1838 /* 1) CONTROL_PKT|BPDU_PKT */ 1839 /* 2) UNKNOWN_L3UC_PKT */ 1840 /* 3) L2UC_PKT | KNOWN_L3UC_PKT */ 1841 /* 4) KNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT */ 1842 /* 5) L2BC_PKT */ 1843 /* 6) UNKNOWN_PKT|L2DLF_PKT|UNKNOWN_IPMC_PKT|KNOWN_IPMC_PKT */ 1844 /* KNOWN_MPLS_PKT | KNOWN_MPLS_L3_PKT|KNOWN_MPLS_L2_PKT| */ 1845 /* UNKNOWN_MPLS_PKT|KNOWN_MIM_PKT|UNKNOWN_MIM_PKT| */ 1846 /* KNOWN_MPLS_MULTICAST_PKT */ 1847 /* ***************************************************************** */ 1848 if (attr->direction == bcmStatFlexDirectionIngress) { 1849 total_counters=6; 1850 _bcm_esw_fillup_ing_uncmp_attr( 1851 ing_attr, 1852 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 1853 6); 1854 _bcm_esw_fillup_ing_pkt_res_offset_table( 1855 ing_attr, 1856 sizeof(ing_TypedAllWithControl_res)/ 1857 sizeof(ing_TypedAllWithControl_res[0]), 1858 &ing_TypedAllWithControl_res[0]); 1859 } else { 1860 /* Group mode is overrided so control shouldn't hit this part */ 1861 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 1862 (BSL_META_U(unit, 1863 "bcmStatGroupModeTypedAllWithControl" 1864 " is not supported in egress side\n"))); 1865 sal_free(attr); 1866 return BCM_E_INTERNAL; 1867 } 1868 break; 1869 case bcmStatGroupModeTypedIntPriWithControl: 1870 /* *************************************************************** */ 1871 /* A dedicated counter for control, unknown unicast, known unicast */ 1872 /* , multicast, broadcast and N internal priority counters for */ 1873 /* traffic (not already counted) */ 1874 /* 1) CONTROL_PKT|BPDU_PKT */ 1875 /* 2) UNKNOWN_L3UC_PKT */ 1876 /* 3) L2UC_PKT | KNOWN_L3UC_PKT */ 1877 /* 4) KNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT */ 1878 /* 5) L2BC_PKT */ 1879 /* 6..21) INT_PRI bits: 4bits */ 1880 /* *************************************************************** */ 1881 if (attr->direction == bcmStatFlexDirectionEgress) { 1882 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 1883 (BSL_META_U(unit, 1884 "GroupModeTypedIntPriWithControl is not available in " 1885 "egress side\n"))); 1886 sal_free(attr); 1887 return BCM_E_INTERNAL; 1888 } 1889 1890 if (SOC_IS_TOMAHAWK3(unit)) { 1891 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 1892 (BSL_META_U(unit, 1893 "GroupModeTypedIntPriWithControl IsNotAvailable" 1894 "for %s\n"), SOC_UNIT_NAME(unit))); 1895 sal_free(attr); 1896 return BCM_E_UNAVAIL; 1897 } 1898 1899 /* Although 21 counters but pkt_res(6) + int_pri(4)=10 bits 1900 so cannot use UNCOMPRESSED MODE */ 1901 1902 /* INT_PRI */ /* .... */ /* PacketRes */ 1903 /* 34-31:4 */ /* .... */ /* 8-3:6 */ 1904 /* PRI_CNG_FN=Cng(2x):IFP(2x):IntPri( all 4bits are used). 1905 RightMost so no shifting required */ 1906 /* PKT_RES_FN=Pkt(6bits but 2 is used):SVP(1x):Drop(1x). 1907 LeftMost so 2 Left shifting required */ 1908 1909 total_counters=21; 1910 ing_attr->packet_attr_type=bcmStatFlexPacketAttrTypeCompressed; 1911 1912 ing_cmprsd_pkt_attr_bits->pkt_resolution = 3; 1913 ing_cmprsd_pkt_attr_bits->pkt_resolution_pos = ing_pkt_attr_cmprsd_bits_g[unit]. 1914 pkt_resolution_pos; 1915 ing_cmprsd_pkt_attr_bits->pkt_resolution_mask = (1<<3)-1; 1916 ing_cmprsd_pkt_attr_bits->int_pri = ing_pkt_attr_cmprsd_bits_g[unit].int_pri; 1917 ing_cmprsd_pkt_attr_bits->int_pri_pos = ing_pkt_attr_cmprsd_bits_g[unit]. 1918 int_pri_pos; 1919 ing_cmprsd_pkt_attr_bits->int_pri_mask = ing_pkt_attr_cmprsd_bits_g[unit].int_pri_mask; 1920 ing_cmprsd_attr_selectors->total_counters = 21; 1921 1922 /* Reset pkt_resolution map */ 1923 for (map_index=0; map_index < 256 ;map_index++) { 1924 ing_cmprsd_attr_selectors->pkt_res_attr_map[map_index]=0; 1925 } 1926 /* set pkt_resolution map for 1 counters */ 1927 /* set pkt_resolution map for 1 counters */ 1928 /* Map[Encoded Packet value << 2=>[SVP-1bit + DROP-1bit]= 1929 CounterIndex << 2=>[SVP-1bit + DROP-1bit]=4(Start),8,12*/ 1930 1931 shift_by_bits= ing_pkt_attr_cmprsd_bits_g[unit].svp_type + ing_pkt_attr_cmprsd_bits_g[unit].drop; 1932 shift_by_bits_for_value = shift_by_bits; 1933 1934 for (ignore_index=0; 1935 ignore_index < (1<<shift_by_bits) ; ignore_index++) { 1936 ing_cmprsd_attr_selectors-> 1937 pkt_res_attr_map[ 1938 (control_pkt<<shift_by_bits) | ignore_index]= 1939 (1<<shift_by_bits_for_value); 1940 ing_cmprsd_attr_selectors-> 1941 pkt_res_attr_map[ 1942 (bpdu_pkt<<shift_by_bits) | ignore_index]= 1943 (1<<shift_by_bits_for_value); 1944 ing_cmprsd_attr_selectors-> 1945 pkt_res_attr_map[ 1946 (unknown_l3uc_pkt<<shift_by_bits) | ignore_index]= 1947 (2<<shift_by_bits_for_value); 1948 ing_cmprsd_attr_selectors-> 1949 pkt_res_attr_map[ 1950 (l2uc_pkt<<shift_by_bits) | ignore_index]= 1951 (3<<shift_by_bits_for_value); 1952 ing_cmprsd_attr_selectors-> 1953 pkt_res_attr_map[ 1954 (known_l3uc_pkt<<shift_by_bits) | ignore_index]= 1955 (3<<shift_by_bits_for_value); 1956 ing_cmprsd_attr_selectors-> 1957 pkt_res_attr_map[ 1958 (known_l2mc_pkt<<shift_by_bits) | ignore_index]= 1959 (4<<shift_by_bits_for_value); 1960 ing_cmprsd_attr_selectors-> 1961 pkt_res_attr_map[ 1962 (unknown_l2mc_pkt<<shift_by_bits) | ignore_index]= 1963 (4<<shift_by_bits_for_value); 1964 ing_cmprsd_attr_selectors-> 1965 pkt_res_attr_map[ 1966 (l2bc_pkt<<shift_by_bits) | ignore_index]= 1967 (5<<shift_by_bits_for_value); 1968 } 1969 /* Reset pri_cng map */ 1970 for (map_index=0; map_index < 256 ;map_index++) { 1971 ing_cmprsd_attr_selectors->pri_cnf_attr_map[map_index]=0; 1972 } 1973 /* set pri_cng map for 16 counters */ 1974 for (ignore_index=0; ignore_index < (1<<4) ; ignore_index++) { 1975 for (map_index=0; map_index < 16 ;map_index++) { 1976 ing_cmprsd_attr_selectors-> 1977 pri_cnf_attr_map[(ignore_index<<4) | map_index]=map_index; 1978 } 1979 } 1980 1981 /* Reset all Offset table fields */ 1982 for (counter_index=0;counter_index<256;counter_index++) { 1983 ing_cmprsd_attr_selectors-> 1984 offset_table_map[counter_index].offset=0; 1985 ing_cmprsd_attr_selectors-> 1986 offset_table_map[counter_index].count_enable=0; 1987 } 1988 /* **************************************************************** */ 1989 /* Set unicast, known unicast, multicast, broadcast counter indexes */ 1990 /* considering INT_PRI bits 0 */ 1991 /* **************************************************************** */ 1992 ing_cmprsd_attr_selectors->offset_table_map[1].offset=0; 1993 ing_cmprsd_attr_selectors->offset_table_map[1].count_enable=1; 1994 ing_cmprsd_attr_selectors->offset_table_map[2].offset=1; 1995 ing_cmprsd_attr_selectors->offset_table_map[2].count_enable=1; 1996 ing_cmprsd_attr_selectors->offset_table_map[3].offset=2; 1997 ing_cmprsd_attr_selectors->offset_table_map[3].count_enable=1; 1998 ing_cmprsd_attr_selectors->offset_table_map[4].offset=3; 1999 ing_cmprsd_attr_selectors->offset_table_map[4].count_enable=1; 2000 ing_cmprsd_attr_selectors->offset_table_map[5].offset=4; 2001 ing_cmprsd_attr_selectors->offset_table_map[5].count_enable=1; 2002 2003 /* Set IntPri counter indexes not-considering pkt resolution bits*/ 2004 /* Priority 0 Counter not satisfying any condition */ 2005 ing_cmprsd_attr_selectors->offset_table_map[0].offset=5; 2006 ing_cmprsd_attr_selectors->offset_table_map[0].count_enable=1; 2007 ing_cmprsd_attr_selectors->offset_table_map[6].offset=5; 2008 ing_cmprsd_attr_selectors->offset_table_map[6].count_enable=1; 2009 ing_cmprsd_attr_selectors->offset_table_map[7].offset=5; 2010 ing_cmprsd_attr_selectors->offset_table_map[7].count_enable=1; 2011 2012 /*INT_PRI*/ 2013 for (counter_index=1;counter_index<(1<<4);counter_index++) { 2014 /*PktRes*/ 2015 for (ignore_index=0;ignore_index<(1<<3);ignore_index++) { 2016 ing_cmprsd_attr_selectors-> 2017 offset_table_map[(counter_index<<3)|ignore_index]. 2018 offset=(counter_index+5); 2019 ing_cmprsd_attr_selectors-> 2020 offset_table_map[(counter_index<<3)|ignore_index]. 2021 count_enable=1; 2022 } 2023 } 2024 break; 2025 case bcmStatGroupModeDot1P: 2026 /* ******************************************************** */ 2027 /* A set of 8(2^3) counters selected based on Vlan priority */ 2028 /* outer_dot1p; 3 bits 1..8 */ 2029 /* ******************************************************** */ 2030 2031 if (attr->direction==bcmStatFlexDirectionIngress) { 2032 total_counters=8; 2033 _bcm_esw_fillup_ing_uncmp_attr( 2034 ing_attr, 2035 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_OUTER_DOT1P_ATTR_BITS, 2036 8); 2037 /* Set Offset table fields */ 2038 for (counter_index=0;counter_index<8;counter_index++) { 2039 ing_attr->uncmprsd_attr_selectors. 2040 offset_table_map[counter_index].offset=counter_index; 2041 ing_attr->uncmprsd_attr_selectors. 2042 offset_table_map[counter_index].count_enable=1; 2043 } 2044 } else { 2045 total_counters=8; 2046 _bcm_esw_fillup_egr_uncmp_attr( 2047 egr_attr, 2048 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_OUTER_DOT1P_ATTR_BITS, 2049 8); 2050 /* Set Offset table fields */ 2051 for (counter_index=0;counter_index<8;counter_index++) { 2052 egr_attr->uncmprsd_attr_selectors. 2053 offset_table_map[counter_index].offset=counter_index; 2054 egr_attr->uncmprsd_attr_selectors. 2055 offset_table_map[counter_index].count_enable=1; 2056 } 2057 } 2058 break; 2059 case bcmStatGroupModeIntPri: 2060 /* **************************************************** */ 2061 /* A set of 16(2^4) counters based on internal priority */ 2062 /* 1..16 INT_PRI bits: 4bits */ 2063 /* **************************************************** */ 2064 2065 if (attr->direction==bcmStatFlexDirectionIngress) { 2066 total_counters=16; 2067 _bcm_esw_fillup_ing_uncmp_attr( 2068 ing_attr, 2069 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_INT_PRI_ATTR_BITS, 2070 16); 2071 /* Set Offset table fields */ 2072 for (counter_index=0;counter_index<16;counter_index++) { 2073 ing_attr->uncmprsd_attr_selectors. 2074 offset_table_map[counter_index].offset=counter_index; 2075 ing_attr->uncmprsd_attr_selectors. 2076 offset_table_map[counter_index].count_enable=1; 2077 } 2078 } else { 2079 total_counters=16; 2080 _bcm_esw_fillup_egr_uncmp_attr( 2081 egr_attr, 2082 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_INT_PRI_ATTR_BITS, 2083 16); 2084 /* Set Offset table fields */ 2085 for (counter_index=0;counter_index<16;counter_index++) { 2086 egr_attr->uncmprsd_attr_selectors. 2087 offset_table_map[counter_index].offset=counter_index; 2088 egr_attr->uncmprsd_attr_selectors. 2089 offset_table_map[counter_index].count_enable=1; 2090 } 2091 } 2092 break; 2093 case bcmStatGroupModeIntPriCng: 2094 /* ********************************************************** */ 2095 /* set of 64 counters(2^(4+2)) based on Internal priority+CNG */ 2096 /* 1..64 (INT_PRI bits: 4bits + CNG 2 bits */ 2097 /* 1..64 (INT_PRI bits: 4bits + CNG 2 bits */ 2098 /* ********************************************************** */ 2099 if (attr->direction==bcmStatFlexDirectionIngress) { 2100 total_counters=64; 2101 _bcm_esw_fillup_ing_uncmp_attr( 2102 ing_attr, 2103 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_CNG_ATTR_BITS| 2104 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_INT_PRI_ATTR_BITS, 2105 64); 2106 /* Set Offset table fields */ 2107 counter_index=0; 2108 for (outer_index=0;outer_index<4;outer_index++) {/*CNG*/ 2109 for (inner_index=0;inner_index<16;inner_index++) {/*IntPri*/ 2110 ing_attr->uncmprsd_attr_selectors. 2111 offset_table_map[counter_index].count_enable=1; 2112 ing_attr->uncmprsd_attr_selectors. 2113 offset_table_map[(outer_index<<4)|inner_index]. 2114 offset=counter_index++; 2115 } 2116 } 2117 } else { 2118 total_counters=64; 2119 _bcm_esw_fillup_egr_uncmp_attr( 2120 egr_attr, 2121 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_CNG_ATTR_BITS| 2122 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_INT_PRI_ATTR_BITS, 2123 64); 2124 /* Set Offset table fields */ 2125 counter_index=0; 2126 for (outer_index=0;outer_index<4;outer_index++) {/*CNG*/ 2127 for(inner_index=0;inner_index<16;inner_index++) {/*IntPri*/ 2128 egr_attr->uncmprsd_attr_selectors. 2129 offset_table_map[counter_index].count_enable=1; 2130 egr_attr->uncmprsd_attr_selectors. 2131 offset_table_map[(outer_index<<4)|inner_index]. 2132 offset=counter_index++; 2133 } 2134 } 2135 } 2136 break; 2137 case bcmStatGroupModeSvpType: 2138 /* ****************************************** */ 2139 /* A set of 2 counters(2^1) based on SVP type */ 2140 /* 1..2 (SVP 1 bit) */ 2141 /* ****************************************** */ 2142 2143 if (attr->direction==bcmStatFlexDirectionIngress) { 2144 total_counters=2; 2145 _bcm_esw_fillup_ing_uncmp_attr( 2146 ing_attr, 2147 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_SVP_TYPE_ATTR_BITS, 2148 2); 2149 /* Set Offset table fields */ 2150 /* DropBitShifting=1 is required */ 2151 for (counter_index=0;counter_index<2;counter_index++) { 2152 ing_attr->uncmprsd_attr_selectors. 2153 offset_table_map[counter_index].offset=counter_index; 2154 ing_attr->uncmprsd_attr_selectors. 2155 offset_table_map[counter_index].count_enable=1; 2156 } 2157 } else { 2158 total_counters=2; 2159 _bcm_esw_fillup_egr_uncmp_attr( 2160 egr_attr, 2161 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_SVP_TYPE_ATTR_BITS, 2162 2); 2163 /* Set Offset table fields */ 2164 /* DropBitShifting=1 + DvpBitShifting=1 ==> 2 is required */ 2165 for (counter_index=0;counter_index<2;counter_index++) { 2166 egr_attr->uncmprsd_attr_selectors. 2167 offset_table_map[counter_index<<2].offset=counter_index; 2168 egr_attr->uncmprsd_attr_selectors. 2169 offset_table_map[counter_index<<2].count_enable=1; 2170 } 2171 } 2172 break; 2173 case bcmStatGroupModeDscp: 2174 /* ******************************************** */ 2175 /* A set of 64 counters(2^6) based on DSCP bits */ 2176 /* 1..64 (6 bits from TOS 8 bits) */ 2177 /* ******************************************** */ 2178 2179 if (attr->direction==bcmStatFlexDirectionIngress) { 2180 total_counters=64; 2181 _bcm_esw_fillup_ing_uncmp_attr( 2182 ing_attr, 2183 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_TOS_DSCP_ATTR_BITS, 2184 64); 2185 /* Set Offset table fields */ 2186 for (counter_index=0;counter_index<64;counter_index++) { 2187 ing_attr->uncmprsd_attr_selectors. 2188 offset_table_map[counter_index].offset=counter_index; 2189 ing_attr->uncmprsd_attr_selectors. 2190 offset_table_map[counter_index].count_enable=1; 2191 } 2192 } else { 2193 total_counters=64; 2194 _bcm_esw_fillup_egr_uncmp_attr( 2195 egr_attr, 2196 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_TOS_DSCP_ATTR_BITS, 2197 64); 2198 /* Set Offset table fields */ 2199 for (counter_index = 0; counter_index < 64; counter_index++) { 2200 egr_attr->uncmprsd_attr_selectors. 2201 offset_table_map[counter_index].offset=counter_index; 2202 egr_attr->uncmprsd_attr_selectors. 2203 offset_table_map[counter_index].count_enable=1; 2204 } 2205 } 2206 break; 2207 case bcmStatGroupModeDvpType: 2208 /* ******************************************** */ 2209 /* EGRESS SIDE ONLY: */ 2210 /* A set of 2 counters(2^1) based on DVP type */ 2211 /* 1..2 (DVP 1 bits) */ 2212 /* ******************************************** */ 2213 2214 if (attr->direction==bcmStatFlexDirectionIngress) { 2215 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 2216 (BSL_META_U(unit, 2217 "bcm_stat_group_mode_t %d is NotSupported" 2218 " in IngressSide\n"), group_mode)); 2219 sal_free(attr); 2220 return BCM_E_PARAM; 2221 } else { 2222 total_counters=2; 2223 _bcm_esw_fillup_egr_uncmp_attr( 2224 egr_attr, 2225 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_DVP_TYPE_ATTR_BITS, 2226 2); 2227 /* Set Offset table fields */ 2228 for (counter_index=0;counter_index<2;counter_index++) { 2229 egr_attr->uncmprsd_attr_selectors. 2230 offset_table_map[counter_index].offset=counter_index; 2231 egr_attr->uncmprsd_attr_selectors. 2232 offset_table_map[counter_index].count_enable=1; 2233 } 2234 } 2235 break; 2236 case bcmStatGroupModeCng: 2237 if (attr->direction==bcmStatFlexDirectionIngress) { 2238 total_counters=4; 2239 _bcm_esw_fillup_ing_uncmp_attr( 2240 ing_attr, 2241 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_CNG_ATTR_BITS, 2242 4); 2243 /* Set Offset table fields */ 2244 for (counter_index=0;counter_index<4;counter_index++) { 2245 ing_attr->uncmprsd_attr_selectors. 2246 offset_table_map[counter_index].offset=counter_index; 2247 ing_attr->uncmprsd_attr_selectors. 2248 offset_table_map[counter_index].count_enable=1; 2249 } 2250 } else { 2251 total_counters=4; 2252 _bcm_esw_fillup_egr_uncmp_attr( 2253 egr_attr, 2254 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_CNG_ATTR_BITS, 2255 4); 2256 /* Set Offset table fields */ 2257 for (counter_index=0;counter_index<4;counter_index++) { 2258 egr_attr->uncmprsd_attr_selectors. 2259 offset_table_map[counter_index].offset=counter_index; 2260 egr_attr->uncmprsd_attr_selectors. 2261 offset_table_map[counter_index].count_enable=1; 2262 } 2263 } 2264 break; 2265 default: 2266 return BCM_E_PARAM; 2267 } 2268 *num_counters = total_counters; 2269 return BCM_E_NONE; 2270 } 2271 2272 /* 2273 * Function: 2274 * _bcm_esw_stat_group_create 2275 * Description: 2276 * Reserve HW counter resources as per given group mode and acounting 2277 * object and make system ready for further stat collection action 2278 * 2279 * Parameters: 2280 * Unit (IN) Unit number 2281 * object (IN) Accounting Object 2282 * Group_mode (IN) Group Mode 2283 * Stat_counter_id (OUT) Stat Counter Id 2284 * num_entries (OUT) Number of Counter entries created 2285 * Return Value: 2286 * BCM_E_XXX 2287 * Notes: 2288 */ 2289 bcm_error_t _bcm_esw_stat_group_create ( 2290 int unit, 2291 bcm_stat_object_t object, 2292 bcm_stat_group_mode_t group_mode, 2293 uint32 *stat_counter_id, 2294 uint32 *num_entries) 2295 { 2296 bcm_stat_flex_attr_t *attr=NULL; 2297 bcm_stat_flex_mode_t mode=0; 2298 bcm_error_t rv=BCM_E_NONE; 2299 bcm_stat_flex_ing_attr_t *ing_attr=NULL; 2300 bcm_stat_flex_egr_attr_t *egr_attr=NULL; 2301 uint32 map_index=0; 2302 uint32 ignore_index=0; 2303 uint32 counter_index=0; 2304 uint32 outer_index=0; 2305 uint32 inner_index=0; 2306 uint32 base_index=0; 2307 uint32 pool_number=0; 2308 uint16 total_counters=0; 2309 uint32 l2dlf_pkt=0; 2310 uint32 unknown_l3uc_pkt=0; 2311 uint32 unknown_l2mc_pkt=0; 2312 uint32 known_l3uc_pkt=0; 2313 uint32 known_l2mc_pkt=0; 2314 uint32 l2uc_pkt=0; 2315 uint32 l2bc_pkt=0; 2316 uint32 control_pkt=0; 2317 uint32 bpdu_pkt=0; 2318 uint32 shift_by_bits=0; 2319 uint32 shift_by_bits_for_value=0; 2320 2321 bcm_stat_flex_ing_cmprsd_attr_selectors_t *ing_cmprsd_attr_selectors=NULL; 2322 bcm_stat_flex_ing_pkt_attr_bits_t *ing_cmprsd_pkt_attr_bits=NULL; 2323 2324 bcm_stat_flex_egr_cmprsd_attr_selectors_t *egr_cmprsd_attr_selectors=NULL; 2325 bcm_stat_flex_egr_pkt_attr_bits_t *egr_cmprsd_pkt_attr_bits=NULL; 2326 bcm_stat_flex_direction_t direction; 2327 2328 2329 if (!soc_feature(unit,soc_feature_advanced_flex_counter)) { 2330 return BCM_E_UNAVAIL; 2331 } 2332 2333 BCM_IF_ERROR_RETURN(_bcm_esw_stat_validate_object(unit,object,&direction)); 2334 BCM_IF_ERROR_RETURN(_bcm_esw_stat_validate_group(unit,group_mode)); 2335 2336 /* Parameters look OK. ... */ 2337 2338 l2dlf_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit,_L2DLF_PKT); 2339 unknown_l3uc_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 2340 _UNKNOWN_L3UC_PKT); 2341 unknown_l2mc_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 2342 _UNKNOWN_L2MC_PKT); 2343 known_l3uc_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 2344 _KNOWN_L3UC_PKT); 2345 known_l2mc_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 2346 _KNOWN_L2MC_PKT); 2347 l2uc_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit,_L2UC_PKT); 2348 l2bc_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit,_L2BC_PKT); 2349 control_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit,_CONTROL_PKT); 2350 bpdu_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit,_BPDU_PKT); 2351 2352 /* 1. Allocating attribute Memory .... */ 2353 2354 attr = sal_alloc(sizeof(bcm_stat_flex_attr_t),"attr"); 2355 if (attr == NULL) { 2356 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 2357 (BSL_META_U(unit, 2358 "Failed to allocate memory for bcm_stat_flex_attr_t "))); 2359 return BCM_E_MEMORY; 2360 } 2361 sal_memset(attr,0,sizeof(bcm_stat_flex_attr_t)); 2362 2363 /* 2. Deciding direction */ 2364 if (direction == bcmStatFlexDirectionIngress) { 2365 /* INGRESS SIDE */ 2366 attr->direction=bcmStatFlexDirectionIngress; 2367 ing_attr = &(attr->ing_attr); 2368 ing_cmprsd_attr_selectors=&(ing_attr->cmprsd_attr_selectors); 2369 ing_cmprsd_pkt_attr_bits= &(ing_attr->cmprsd_attr_selectors. 2370 pkt_attr_bits); 2371 } else { 2372 /* EGRESS SIDE */ 2373 attr->direction=bcmStatFlexDirectionEgress; 2374 egr_attr = &(attr->egr_attr); 2375 egr_cmprsd_attr_selectors=&(egr_attr->cmprsd_attr_selectors); 2376 egr_cmprsd_pkt_attr_bits= &(egr_attr->cmprsd_attr_selectors. 2377 pkt_attr_bits); 2378 } 2379 2380 if (attr->direction == bcmStatFlexDirectionEgress) { 2381 switch(group_mode) { 2382 case bcmStatGroupModeDlfAll: 2383 case bcmStatGroupModeSingleWithControl: 2384 LOG_DEBUG(BSL_LS_BCM_FLEXCTR, 2385 (BSL_META_U(unit, 2386 "Overiding group_mode->bcmStatGroupModeSingle\n"))); 2387 group_mode = bcmStatGroupModeSingle; 2388 break; 2389 case bcmStatGroupModeTyped: 2390 case bcmStatGroupModeTypedAll: 2391 case bcmStatGroupModeTrafficTypeWithControl: 2392 case bcmStatGroupModeDlfAllWithControl: 2393 case bcmStatGroupModeTypedWithControl: 2394 case bcmStatGroupModeTypedAllWithControl: 2395 LOG_DEBUG(BSL_LS_BCM_FLEXCTR, 2396 (BSL_META_U(unit, 2397 "Overiding group_mode to " 2398 "bcmStatGroupModeTrafficType \n"))); 2399 group_mode = bcmStatGroupModeTrafficType; 2400 break; 2401 case bcmStatGroupModeDlfIntPri: 2402 case bcmStatGroupModeDlfIntPriWithControl: 2403 case bcmStatGroupModeTypedIntPriWithControl: 2404 LOG_DEBUG(BSL_LS_BCM_FLEXCTR, 2405 (BSL_META_U(unit, 2406 "Overiding group_mode to " 2407 "bcmStatGroupModeTypedIntPri \n"))); 2408 group_mode = bcmStatGroupModeTypedIntPri; 2409 break; 2410 default: 2411 break; 2412 } 2413 } 2414 /* ######################################################### */ 2415 /* Ingress Packet Attributes(KATANA) */ 2416 /* 2417 CNG IFP_CNG INT_PRI VlanFmt OuterDot1P InnerDot1P IngressPort TOS PacketRes SVPType DROP IP 2418 38-37:2 36-35:2 34-31:4 30-29:2 28-26:3 25-23:3 22-17:6 16-9:8 8-3:6 2-2:1 1-1:1 0-0:1 2419 PRI_CNG_FN(8) PKT_PRI_FN(8) PORT_FN_FN(6) TOS_FN(8) PKT_RES_FN(8) NOT_USED 2420 */ 2421 /* ######################################################### */ 2422 2423 /* ######################################################### */ 2424 /* Egress Packet Attributes(KATANA) */ 2425 /* 2426 CNG INT_PRI VlanFmt OuterDot1P InnerDot1P EgressPort TOS PacketRes SVPType DVPType DROP IP 2427 32-31:2 30-27:4 26-25:2 24-22:3 21-19:3 18-13:6 12-5:8 4-4:1 3-3:1 2-2:1 1-1:1 0-0:1 2428 PRI_CNG_FN(6) PKT_PRI_FN(8) PORT_FN_FN(6) TOS_FN(8) PKT_RES_FN(4) NOT_USED 2429 */ 2430 /* ######################################################### */ 2431 2432 2433 /* 3. Filling up attributes */ 2434 switch(group_mode) { 2435 case bcmStatGroupModeSingle: 2436 /* *********************************************/ 2437 /* A single counter used for all traffic types */ 2438 /* 1) UNKNOWN_PKT|CONTROL_PKT|BPDU_PKT|L2BC_PKT|L2UC_PKT|L2DLF_PKT| */ 2439 /* UNKNOWN_IPMC_PKT|KNOWN_IPMC_PKT|KNOWN_L2MC_PKT| */ 2440 /* UNKNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT|KNOWN_L3UC_PKT| */ 2441 /* UNKNOWN_L3UC_PKT|KNOWN_MPLS_PKT|KNOWN_MPLS_L3_PKT| */ 2442 /* KNOWN_MPLS_L2_PKT|UNKNOWN_MPLS_PKT|KNOWN_MIM_PKT| */ 2443 /* UNKNOWN_MIM_PKT|KNOWN_MPLS_MULTICAST_PKT */ 2444 2445 /* ******************************************* */ 2446 if (attr->direction==bcmStatFlexDirectionIngress) { 2447 total_counters=1; 2448 _bcm_esw_fillup_ing_uncmp_attr( 2449 ing_attr, 2450 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 2451 1); 2452 _bcm_esw_fillup_ing_pkt_res_offset_table( 2453 ing_attr,sizeof(ing_Single_res)/sizeof(ing_Single_res[0]), 2454 &ing_Single_res[0]); 2455 } else { 2456 total_counters=1; 2457 _bcm_esw_fillup_egr_uncmp_attr( 2458 egr_attr, 2459 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 2460 1); 2461 _bcm_esw_fillup_egr_pkt_res_offset_table( 2462 egr_attr,sizeof(egr_Single_res)/sizeof(egr_Single_res[0]), 2463 &egr_Single_res[0]); 2464 } 2465 break; 2466 case bcmStatGroupModeTrafficType: 2467 /* **************************************************************** */ 2468 /* A dedicated counter per traffic type Unicast,multicast,broadcast */ 2469 /* 1) L2UC_PKT | KNOWN_L3UC_PKT | UNKNOWN_L3UC_PKT */ 2470 /* 2) KNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT| */ 2471 /* 3) L2BC_PKT| */ 2472 /* **************************************************************** */ 2473 2474 if (attr->direction==bcmStatFlexDirectionIngress) { 2475 total_counters=3; 2476 _bcm_esw_fillup_ing_uncmp_attr( 2477 ing_attr, 2478 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 2479 3); 2480 _bcm_esw_fillup_ing_pkt_res_offset_table( 2481 ing_attr, 2482 sizeof(ing_TrafficType_res)/sizeof(ing_TrafficType_res[0]), 2483 &ing_TrafficType_res[0]); 2484 } else { 2485 total_counters=2; 2486 _bcm_esw_fillup_egr_uncmp_attr( 2487 egr_attr, 2488 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 2489 2); 2490 _bcm_esw_fillup_egr_pkt_res_offset_table( 2491 egr_attr, 2492 sizeof(egr_TrafficType_res)/sizeof(egr_TrafficType_res[0]), 2493 &egr_TrafficType_res[0]); 2494 } 2495 break; 2496 case bcmStatGroupModeDlfAll: 2497 /* ************************************************************* */ 2498 /* A pair of counters where the base counter is used for dlf and */ 2499 /* the other counter is used for all traffic types */ 2500 /* 1) L2DLF_PKT */ 2501 /* 2) UNKNOWN_PKT | CONTROL_PKT|BPDU_PKT|L2BC_PKT|L2UC_PKT| */ 2502 /* L2DLF_PKT|UNKNOWN_IPMC_PKT|KNOWN_IPMC_PKT|KNOWN_L2MC_PKT| */ 2503 /* UNKNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT|KNOWN_L3UC_PKT| */ 2504 /* UNKNOWN_L3UC_PKT|KNOWN_MPLS_PKT|KNOWN_MPLS_L3_PKT| */ 2505 /* KNOWN_MPLS_L2_PKT|UNKNOWN_MPLS_PKT|KNOWN_MIM_PKT| */ 2506 /* UNKNOWN_MIM_PKT|KNOWN_MPLS_MULTICAST_PKT */ 2507 /* ************************************************************* */ 2508 2509 if (attr->direction==bcmStatFlexDirectionIngress) { 2510 total_counters=2; 2511 _bcm_esw_fillup_ing_uncmp_attr( 2512 ing_attr, 2513 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 2514 2); 2515 _bcm_esw_fillup_ing_pkt_res_offset_table( 2516 ing_attr,sizeof(ing_DlfAll_res)/sizeof(ing_DlfAll_res[0]), 2517 &ing_DlfAll_res[0]); 2518 } else { 2519 /* Group mode is overrided so control shouldn't hit this part */ 2520 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 2521 (BSL_META_U(unit, 2522 "bcmStatGroupModeDlfAll is not supported" 2523 "in egress side\n"))); 2524 sal_free(attr); 2525 return BCM_E_INTERNAL; 2526 } 2527 break; 2528 case bcmStatGroupModeDlfIntPri: 2529 /* ************************************************************** */ 2530 /* N+1 counters where the base counter is used for dlf and next N */ 2531 /* are used per Cos */ 2532 /* 1) L2_DLF */ 2533 /* 2..17) INT_PRI bits: 4bits */ 2534 /* ************************************************************** */ 2535 2536 if (attr->direction==bcmStatFlexDirectionEgress) { 2537 /* Must not hit */ 2538 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 2539 (BSL_META_U(unit, 2540 "bcmStatGroupModeDlfIntPri IsNotAvailable" 2541 "in EgressSide\n"))); 2542 sal_free(attr); 2543 return BCM_E_INTERNAL; 2544 } 2545 2546 if (SOC_IS_TOMAHAWK3(unit)) { 2547 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 2548 (BSL_META_U(unit, 2549 "bcmStatGroupModeDlfIntPri IsNotAvailable" 2550 "for %s\n"), SOC_UNIT_NAME(unit))); 2551 sal_free(attr); 2552 return BCM_E_UNAVAIL; 2553 } 2554 2555 /* Although 17 counters but pkt_res(6) + int_pri(4)=10 bits 2556 so cannot use UNCOMPRESSED MODE */ 2557 2558 /* INT_PRI */ /* .... */ /* PacketRes */ 2559 /* 34-31:4 */ /* .... */ /* 8-3:6 */ 2560 /* PRI_CNG_FN=Cng(2x):IFP(2x):IntPri( all 4bits are used). 2561 RightMost so no shifting required */ 2562 /* PKT_RES_FN=Pkt(6bits but 1 is used):SVP(1x):Drop(1x). 2563 LeftMost so 2 Left shifting required */ 2564 2565 total_counters=17; 2566 ing_attr->packet_attr_type=bcmStatFlexPacketAttrTypeCompressed; 2567 2568 ing_cmprsd_pkt_attr_bits->pkt_resolution = 1; 2569 2570 ing_cmprsd_pkt_attr_bits->pkt_resolution_pos = ing_pkt_attr_cmprsd_bits_g[unit]. 2571 pkt_resolution_pos; 2572 ing_cmprsd_pkt_attr_bits->pkt_resolution_mask = 1; 2573 2574 ing_cmprsd_pkt_attr_bits->int_pri = ing_pkt_attr_cmprsd_bits_g[unit].int_pri; 2575 ing_cmprsd_pkt_attr_bits->int_pri_pos = ing_pkt_attr_cmprsd_bits_g[unit]. 2576 int_pri_pos; 2577 ing_cmprsd_pkt_attr_bits->int_pri_mask = ing_pkt_attr_cmprsd_bits_g[unit]. 2578 int_pri_mask; 2579 2580 ing_cmprsd_attr_selectors->total_counters = 17; 2581 2582 /* set pkt_resolution map for 1 counters */ 2583 /* Map[Encoded Packet value << 2=>[SVP-1bit + DROP-1bit]= 2584 CounterIndex << 2=>[SVP-1bit + DROP-1bit]=4(Start),8,12*/ 2585 2586 /* Reset pkt_resolution map */ 2587 for (map_index=0; 2588 map_index < sizeof(bcm_stat_flex_ing_cmprsd_pkt_res_attr_map_t) ; 2589 map_index++) { 2590 ing_cmprsd_attr_selectors->pkt_res_attr_map[map_index]=0; 2591 } 2592 shift_by_bits= ing_pkt_attr_cmprsd_bits_g[unit].svp_type + ing_pkt_attr_cmprsd_bits_g[unit].drop; 2593 shift_by_bits_for_value = shift_by_bits; 2594 2595 for (ignore_index=0; 2596 ignore_index < (1<<shift_by_bits); ignore_index++) { 2597 ing_cmprsd_attr_selectors-> 2598 pkt_res_attr_map[(l2dlf_pkt<<shift_by_bits) | ignore_index]= 2599 (1<<(shift_by_bits_for_value)); 2600 } 2601 2602 /* Reset pri_cng map */ 2603 for (map_index=0; map_index < 256 ;map_index++) { 2604 ing_cmprsd_attr_selectors->pri_cnf_attr_map[map_index]=0; 2605 } 2606 /* set pri_cng map for 16 counters */ 2607 for (ignore_index=0; ignore_index < (1<<4) ; ignore_index++) { 2608 for (map_index=0; map_index < 16 ;map_index++) { 2609 ing_cmprsd_attr_selectors-> 2610 pri_cnf_attr_map[(ignore_index<<4) | map_index]=map_index; 2611 } 2612 } 2613 2614 /* Reset all Offset table fields */ 2615 for (counter_index=0;counter_index<256;counter_index++) { 2616 ing_cmprsd_attr_selectors-> 2617 offset_table_map[counter_index].offset=0; 2618 ing_cmprsd_attr_selectors-> 2619 offset_table_map[counter_index].count_enable=0; 2620 } 2621 2622 /* Set DLF counter indexes(ODD 1,3,5) considering INT_PRI bits 2623 don't care */ 2624 for (counter_index=0;counter_index<16;counter_index++) { 2625 ing_cmprsd_attr_selectors-> 2626 offset_table_map[(counter_index<<1)|1].offset=0; 2627 ing_cmprsd_attr_selectors-> 2628 offset_table_map[(counter_index<<1)|1].count_enable=1; 2629 } 2630 2631 /* Set Int pri counter indexes(Even 2,4,6) considering DLF=0 */ 2632 for (counter_index=0;counter_index<16;counter_index++) { 2633 ing_cmprsd_attr_selectors-> 2634 offset_table_map[(counter_index<<1)]. 2635 offset=(counter_index+1); 2636 ing_cmprsd_attr_selectors-> 2637 offset_table_map[(counter_index<<1)].count_enable=1; 2638 } 2639 break; 2640 case bcmStatGroupModeTyped: 2641 /* ******************************************************* */ 2642 /* A dedicated counter for unknown unicast, known unicast, */ 2643 /* multicast, broadcast */ 2644 /* 1) UNKNOWN_L3UC_PKT|_L2DLF_PKT */ 2645 /* 2) L2UC_PKT | KNOWN_L3UC_PKT */ 2646 /* 3) KNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT */ 2647 /* 4) L2BC_PKT */ 2648 /* ******************************************************* */ 2649 if (attr->direction==bcmStatFlexDirectionIngress) { 2650 total_counters=4; 2651 _bcm_esw_fillup_ing_uncmp_attr( 2652 ing_attr, 2653 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 2654 4); 2655 _bcm_esw_fillup_ing_pkt_res_offset_table( 2656 ing_attr,sizeof(ing_Typed_res)/sizeof(ing_Typed_res[0]), 2657 &ing_Typed_res[0]); 2658 } else { 2659 /* Group mode is overrided so control shouldn't hit this part */ 2660 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 2661 (BSL_META_U(unit, 2662 "bcmStatGroupModeTyped: is not supported" 2663 " in egress side\n"))); 2664 sal_free(attr); 2665 return BCM_E_INTERNAL; 2666 } 2667 break; 2668 case bcmStatGroupModeTypedAll: 2669 /* ******************************************************* */ 2670 /* A dedicated counter for unknown unicast, known unicast, */ 2671 /* multicast, broadcast and one for all traffic(not already*/ 2672 /* counted) */ 2673 /* 1) UNKNOWN_L3UC_PKT */ 2674 /* 2) L2UC_PKT | KNOWN_L3UC_PKT */ 2675 /* 3) KNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT */ 2676 /* 4) L2BC_PKT */ 2677 /* 5) UNKNOWN_PKT|CONTROL_PKT|BPDU_PKT|L2DLF_PKT| */ 2678 /* UNKNOWN_IPMC_PKT|KNOWN_IPMC_PKT|KNOWN_MPLS_PKT | */ 2679 /* KNOWN_MPLS_L3_PKT|KNOWN_MPLS_L2_PKT|UNKNOWN_MPLS_PKT */ 2680 /* KNOWN_MIM_PKT|UNKNOWN_MIM_PKT| */ 2681 /* KNOWN_MPLS_MULTICAST_PKT */ 2682 /* ******************************************************* */ 2683 if (attr->direction==bcmStatFlexDirectionIngress) { 2684 total_counters=5; 2685 _bcm_esw_fillup_ing_uncmp_attr( 2686 ing_attr, 2687 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 2688 5); 2689 _bcm_esw_fillup_ing_pkt_res_offset_table( 2690 ing_attr,sizeof(ing_TypedAll_res)/sizeof(ing_TypedAll_res[0]), 2691 &ing_TypedAll_res[0]); 2692 } else { 2693 /* Group mode is overrided so control shouldn't hit this part */ 2694 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 2695 (BSL_META_U(unit, 2696 "bcmStatGroupModeTypedAll is NotSupported" 2697 " in EgressSide\n"))); 2698 sal_free(attr); 2699 return BCM_E_INTERNAL; 2700 } 2701 break; 2702 case bcmStatGroupModeTypedIntPri: 2703 if (SOC_IS_TOMAHAWK3(unit)) { 2704 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 2705 (BSL_META_U(unit, 2706 "bcmStatGroupModeTypedIntPri IsNotAvailable" 2707 "for %s\n"), SOC_UNIT_NAME(unit))); 2708 sal_free(attr); 2709 return BCM_E_UNAVAIL; 2710 } 2711 /* *************************************************************** */ 2712 /* A dedicated counter for unknown unicast, known unicast, */ 2713 /* multicast,broadcast and N internal priority counters for traffic*/ 2714 /* (not already counted) */ 2715 /* 1) UNKNOWN_L3UC_PKT */ 2716 /* 2) L2UC_PKT | KNOWN_L3UC_PKT */ 2717 /* 3) KNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT */ 2718 /* 4) L2BC_PKT */ 2719 /* 5..20) INT_PRI bits: 4bits */ 2720 /* *************************************************************** */ 2721 if (attr->direction==bcmStatFlexDirectionIngress) { 2722 2723 /* Although 20 counters but pkt_res(6) + int_pri(4)=10 bits 2724 so cannot use UNCOMPRESSED MODE */ 2725 2726 /* INT_PRI */ /* .... */ /* PacketRes */ 2727 /* 34-31:4 */ /* .... */ /* 8-3:6 */ 2728 /* PRI_CNG_FN=Cng(2x):IFP(2x):IntPri( all 4bits are used). 2729 RightMost so no shifting required */ 2730 /* PKT_RES_FN=Pkt(6bits but 3 is used):SVP(1x):Drop(1x). 2731 LeftMost so 2 Left shifting required */ 2732 2733 total_counters=20; 2734 2735 ing_attr->packet_attr_type=bcmStatFlexPacketAttrTypeCompressed; 2736 /* Cannot consider 0 value so taking 3 i.s.o. 2 */ 2737 ing_cmprsd_pkt_attr_bits->pkt_resolution = 3; 2738 ing_cmprsd_pkt_attr_bits->pkt_resolution_pos = ing_pkt_attr_cmprsd_bits_g[unit]. 2739 pkt_resolution_pos; 2740 ing_cmprsd_pkt_attr_bits->pkt_resolution_mask = (1<<3)-1; 2741 2742 ing_cmprsd_pkt_attr_bits->int_pri = ing_pkt_attr_cmprsd_bits_g[unit].int_pri; 2743 ing_cmprsd_pkt_attr_bits->int_pri_pos = ing_pkt_attr_cmprsd_bits_g[unit]. 2744 int_pri_pos; 2745 ing_cmprsd_pkt_attr_bits->int_pri_mask= ing_pkt_attr_cmprsd_bits_g[unit]. 2746 int_pri_mask; 2747 2748 ing_cmprsd_attr_selectors->total_counters = 20; 2749 /* Reset pkt_resolution map */ 2750 for (map_index=0; map_index < 256 ;map_index++) { 2751 ing_cmprsd_attr_selectors->pkt_res_attr_map[map_index]=0; 2752 } 2753 /* set pkt_resolution map for 1 counters */ 2754 /* Map[Encoded Packet value << 2=>[SVP-1bit + DROP-1bit]= 2755 CounterIndex << 2=>[SVP-1bit + DROP-1bit]=4(Start),8,12*/ 2756 shift_by_bits= ing_pkt_attr_cmprsd_bits_g[unit].svp_type + 2757 ing_pkt_attr_cmprsd_bits_g[unit].drop; 2758 shift_by_bits_for_value = shift_by_bits; 2759 2760 /* set pkt_resolution map for 1 counters.Ignore SVP,DROP bits */ 2761 for (ignore_index=0; 2762 ignore_index < (1<<shift_by_bits) ; ignore_index++) { 2763 ing_cmprsd_attr_selectors->pkt_res_attr_map[ 2764 (unknown_l3uc_pkt<<shift_by_bits)|ignore_index]= 2765 (1<<shift_by_bits_for_value); 2766 ing_cmprsd_attr_selectors->pkt_res_attr_map[ 2767 (l2uc_pkt<<shift_by_bits)|ignore_index]= 2768 (2<<shift_by_bits_for_value); 2769 ing_cmprsd_attr_selectors->pkt_res_attr_map[ 2770 (known_l3uc_pkt<<shift_by_bits)|ignore_index]= 2771 (2<<shift_by_bits_for_value); 2772 ing_cmprsd_attr_selectors->pkt_res_attr_map[ 2773 (known_l2mc_pkt<<shift_by_bits)|ignore_index]= 2774 (3<<shift_by_bits_for_value); 2775 ing_cmprsd_attr_selectors->pkt_res_attr_map[ 2776 (unknown_l2mc_pkt<<shift_by_bits)|ignore_index]= 2777 (3<<shift_by_bits_for_value); 2778 ing_cmprsd_attr_selectors->pkt_res_attr_map[ 2779 (l2bc_pkt<<shift_by_bits)|ignore_index]= 2780 (4<<shift_by_bits_for_value); 2781 } 2782 /* Reset pri_cng map */ 2783 for (map_index=0; map_index < 256 ;map_index++) { 2784 ing_cmprsd_attr_selectors->pri_cnf_attr_map[map_index]=0; 2785 } 2786 /* set pri_cng map for 16 counters */ 2787 for (ignore_index=0; ignore_index < (1<<4) ; ignore_index++) { 2788 for (map_index=0; map_index < 16 ;map_index++) { 2789 ing_cmprsd_attr_selectors-> 2790 pri_cnf_attr_map[(ignore_index<<4)|map_index]=map_index; 2791 } 2792 } 2793 /* Reset all Offset table fields */ 2794 for (counter_index=0;counter_index<256;counter_index++) { 2795 ing_cmprsd_attr_selectors-> 2796 offset_table_map[counter_index].offset=0; 2797 ing_cmprsd_attr_selectors-> 2798 offset_table_map[counter_index].count_enable=0; 2799 } 2800 /* ************************************************************* */ 2801 /* Set unicast, known unicast, multicast, broadcast counter */ 2802 /* indexes considering INT_PRI as 0 */ 2803 /* ************************************************************* */ 2804 ing_cmprsd_attr_selectors->offset_table_map[1].offset=0; 2805 ing_cmprsd_attr_selectors->offset_table_map[1].count_enable=1; 2806 ing_cmprsd_attr_selectors->offset_table_map[2].offset=1; 2807 ing_cmprsd_attr_selectors->offset_table_map[2].count_enable=1; 2808 ing_cmprsd_attr_selectors->offset_table_map[3].offset=2; 2809 ing_cmprsd_attr_selectors->offset_table_map[3].count_enable=1; 2810 ing_cmprsd_attr_selectors->offset_table_map[4].offset=3; 2811 ing_cmprsd_attr_selectors->offset_table_map[4].count_enable=1; 2812 2813 2814 /* Set Int pri counter indexes NotConsidering pkt resolution bits*/ 2815 /* Priority 0 Counter not satisfying any condition */ 2816 ing_cmprsd_attr_selectors->offset_table_map[0].offset=4; 2817 ing_cmprsd_attr_selectors->offset_table_map[0].count_enable=1; 2818 ing_cmprsd_attr_selectors->offset_table_map[5].offset=4; 2819 ing_cmprsd_attr_selectors->offset_table_map[5].count_enable=1; 2820 ing_cmprsd_attr_selectors->offset_table_map[6].offset=4; 2821 ing_cmprsd_attr_selectors->offset_table_map[6].count_enable=1; 2822 ing_cmprsd_attr_selectors->offset_table_map[7].offset=4; 2823 ing_cmprsd_attr_selectors->offset_table_map[7].count_enable=1; 2824 /*INT_PRI*/ 2825 for (counter_index=1;counter_index<(1<<4);counter_index++) { 2826 /*PktRes*/ 2827 for(ignore_index=0;ignore_index<(1<<3);ignore_index++) { 2828 ing_cmprsd_attr_selectors-> 2829 offset_table_map[(counter_index<<3)|ignore_index]. 2830 offset=(counter_index+4); 2831 ing_cmprsd_attr_selectors-> 2832 offset_table_map[(counter_index<<3)|ignore_index]. 2833 count_enable=1; 2834 } 2835 } 2836 } else { 2837 /* ************************************************************* */ 2838 /* A dedicated counter for unknown unicast, known unicast, */ 2839 /* multicast,broadcast and N internal priority counters for */ 2840 /* traffic (not already counted) */ 2841 /* 1) Unicast */ 2842 /* 2) Multicast */ 2843 /* 3..18) INT_PRI bits: 4bits */ 2844 /* ************************************************************* */ 2845 total_counters=18; 2846 egr_attr->packet_attr_type=bcmStatFlexPacketAttrTypeCompressed; 2847 2848 egr_cmprsd_pkt_attr_bits->pkt_resolution = egr_pkt_attr_cmprsd_bits_g[unit]. 2849 pkt_resolution; 2850 egr_cmprsd_pkt_attr_bits->pkt_resolution_pos = egr_pkt_attr_cmprsd_bits_g[unit]. 2851 pkt_resolution_pos; 2852 egr_cmprsd_pkt_attr_bits->pkt_resolution_mask = egr_pkt_attr_cmprsd_bits_g[unit]. 2853 pkt_resolution_mask; 2854 2855 egr_cmprsd_pkt_attr_bits->int_pri = egr_pkt_attr_cmprsd_bits_g[unit].int_pri; 2856 egr_cmprsd_pkt_attr_bits->int_pri_pos = egr_pkt_attr_cmprsd_bits_g[unit]. 2857 int_pri_pos; 2858 egr_cmprsd_pkt_attr_bits->int_pri_mask=egr_pkt_attr_cmprsd_bits_g[unit].int_pri_mask; 2859 2860 egr_cmprsd_attr_selectors->total_counters = 18; 2861 2862 shift_by_bits= egr_pkt_attr_cmprsd_bits_g[unit].svp_type + 2863 egr_pkt_attr_cmprsd_bits_g[unit].dvp_type + 2864 egr_pkt_attr_cmprsd_bits_g[unit].drop; 2865 shift_by_bits_for_value = shift_by_bits; 2866 /* Set pkt_resolution map */ 2867 /* Unicast */ 2868 for (map_index=0; map_index < 1<< shift_by_bits ;map_index++) { 2869 egr_cmprsd_attr_selectors->pkt_res_attr_map[map_index]=0; 2870 } 2871 /* Multicast */ 2872 for (; map_index < 255 ;map_index++) { 2873 egr_cmprsd_attr_selectors-> 2874 pkt_res_attr_map[map_index]=(1<<shift_by_bits_for_value); 2875 } 2876 2877 /* Reset pri_cng map */ 2878 for (map_index=0; map_index < 64 ;map_index++) { 2879 egr_cmprsd_attr_selectors->pri_cnf_attr_map[map_index]=0; 2880 } 2881 /* set pri_cng map for 16 counters */ 2882 for (ignore_index=0; ignore_index < (1<<2) ; ignore_index++) { 2883 for (map_index=0; map_index < 16 ;map_index++) { 2884 egr_cmprsd_attr_selectors-> 2885 pri_cnf_attr_map[(ignore_index<<4)|map_index]=map_index; 2886 } 2887 } 2888 /* Reset all Offset table fields */ 2889 for(counter_index=0;counter_index<256;counter_index++) { 2890 egr_cmprsd_attr_selectors-> 2891 offset_table_map[counter_index].offset=0; 2892 egr_cmprsd_attr_selectors-> 2893 offset_table_map[counter_index].count_enable=0; 2894 } 2895 /* ************************************************************** */ 2896 /* Set unicast, multicast, counter indexes */ 2897 /* considering INT_PRI bits zero */ 2898 /* ************************************************************** */ 2899 egr_cmprsd_attr_selectors-> 2900 offset_table_map[0].offset=0; 2901 egr_cmprsd_attr_selectors-> 2902 offset_table_map[0].count_enable=1; 2903 egr_cmprsd_attr_selectors-> 2904 offset_table_map[1].offset=1; 2905 egr_cmprsd_attr_selectors-> 2906 offset_table_map[1].count_enable=1; 2907 /* PRI-0 counters will be addition of unicast & multicast packets!*/ 2908 /* Set Int pri counter indexes ignoring pkt_res bits */ 2909 /*INT_PRI*/ 2910 for (counter_index=1;counter_index<(1<<4);counter_index++) { 2911 /*PktRes*/ 2912 for (ignore_index=0;ignore_index<(1<<1);ignore_index++) { 2913 egr_cmprsd_attr_selectors-> 2914 offset_table_map[(counter_index<<1)|ignore_index]. 2915 offset=(counter_index+2); 2916 egr_cmprsd_attr_selectors-> 2917 offset_table_map[(counter_index<<1)|ignore_index]. 2918 count_enable=1; 2919 } 2920 } 2921 } 2922 break; 2923 case bcmStatGroupModeSingleWithControl: 2924 /* ************************************************************** */ 2925 /* A single counter used for all traffic types with an additional */ 2926 /* counter for control traffic */ 2927 /* 1) UNKNOWN_PKT| |L2BC_PKT|L2UC_PKT|L2DLF_PKT| */ 2928 /* UNKNOWN_IPMC_PKT|KNOWN_IPMC_PKT|KNOWN_L2MC_PKT| */ 2929 /* UNKNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT|KNOWN_L3UC_PKT| */ 2930 /* UNKNOWN_L3UC_PKT|KNOWN_MPLS_PKT|KNOWN_MPLS_L3_PKT| */ 2931 /* KNOWN_MPLS_L2_PKT|UNKNOWN_MPLS_PKT|KNOWN_MIM_PKT| */ 2932 /* UNKNOWN_MIM_PKT|KNOWN_MPLS_MULTICAST_PKT */ 2933 /* 2) CONTROL_PKT|BPDU_PKT */ 2934 /* ************************************************************** */ 2935 if (attr->direction==bcmStatFlexDirectionIngress) { 2936 total_counters=2; 2937 _bcm_esw_fillup_ing_uncmp_attr( 2938 ing_attr, 2939 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 2940 2); 2941 _bcm_esw_fillup_ing_pkt_res_offset_table( 2942 ing_attr, 2943 sizeof(ing_SingleWithControl_res)/ 2944 sizeof(ing_SingleWithControl_res[0]), 2945 &ing_SingleWithControl_res[0]); 2946 } else { 2947 /* Group mode is overrided so control shouldn't hit this part */ 2948 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 2949 (BSL_META_U(unit, 2950 "bcmStatGroupModeSingleWithControl" 2951 " is not supported in egress side\n"))); 2952 sal_free(attr); 2953 return BCM_E_INTERNAL; 2954 } 2955 break; 2956 case bcmStatGroupModeTrafficTypeWithControl: 2957 /* ******************************************************** */ 2958 /* A dedicated counter per traffic type unicast, multicast, */ 2959 /* broadcast with an additional counter for control traffic */ 2960 /* 1) L2UC_PKT | KNOWN_L3UC_PKT | UNKNOWN_L3UC_PKT */ 2961 /* 2) KNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT| */ 2962 /* 3) L2BC_PKT| */ 2963 /* 4) CONTROL_PKT|BPDU_PKT */ 2964 /* ******************************************************** */ 2965 if (attr->direction==bcmStatFlexDirectionIngress) { 2966 total_counters=4; 2967 _bcm_esw_fillup_ing_uncmp_attr( 2968 ing_attr, 2969 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 2970 4); 2971 _bcm_esw_fillup_ing_pkt_res_offset_table( 2972 ing_attr, 2973 sizeof(ing_TrafficTypeWithControl_res)/ 2974 sizeof(ing_TrafficTypeWithControl_res[0]), 2975 &ing_TrafficTypeWithControl_res[0]); 2976 } else { 2977 /* Group mode is overrided so control shouldn't hit this part */ 2978 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 2979 (BSL_META_U(unit, 2980 "bcmStatGroupModeTrafficTypeWithControl" 2981 "is not supported in egress side\n"))); 2982 sal_free(attr); 2983 return BCM_E_INTERNAL; 2984 } 2985 break; 2986 case bcmStatGroupModeDlfAllWithControl: 2987 /* ************************************************************** */ 2988 /* A pair of counters where the base counter is used for control, */ 2989 /* the next one for dlf and the other counter is used for all */ 2990 /* traffic types */ 2991 /* 1) CONTROL_PKT|BPDU_PKT */ 2992 /* 2) L2DLF_PKT */ 2993 /* 3)UNKNOWN_PKT | CONTROL_PKT|BPDU_PKT|L2BC_PKT|L2UC_PKT| */ 2994 /* L2DLF_PKT|UNKNOWN_IPMC_PKT|KNOWN_IPMC_PKT|KNOWN_L2MC_PKT| */ 2995 /* UNKNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT|KNOWN_L3UC_PKT| */ 2996 /* UNKNOWN_L3UC_PKT|KNOWN_MPLS_PKT|KNOWN_MPLS_L3_PKT| */ 2997 /* KNOWN_MPLS_L2_PKT|UNKNOWN_MPLS_PKT|KNOWN_MIM_PKT| */ 2998 /* UNKNOWN_MIM_PKT|KNOWN_MPLS_MULTICAST_PKT */ 2999 /* ************************************************************** */ 3000 if (attr->direction==bcmStatFlexDirectionIngress) { 3001 total_counters=3; 3002 _bcm_esw_fillup_ing_uncmp_attr( 3003 ing_attr, 3004 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 3005 3); 3006 _bcm_esw_fillup_ing_pkt_res_offset_table( 3007 ing_attr, 3008 sizeof(ing_DlfAllWithControl_res)/ 3009 sizeof(ing_DlfAllWithControl_res[0]), 3010 &ing_DlfAllWithControl_res[0]); 3011 } else { 3012 /* Group mode is overrided so control shouldn't hit this part */ 3013 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 3014 (BSL_META_U(unit, 3015 "bcmStatGroupModeDlfAllWithControl is not supported " 3016 "in egress side\n"))); 3017 sal_free(attr); 3018 return BCM_E_INTERNAL; 3019 } 3020 break; 3021 case bcmStatGroupModeDlfIntPriWithControl: 3022 /* ************************************************************* */ 3023 /* N+2 counters where the base counter is used for control, the */ 3024 /* next one for dlf and next N are used per Cos */ 3025 /* 1) CONTROL_PKT|BPDU_PKT */ 3026 /* 2) L2_DLF */ 3027 /* 3..18) INT_PRI bits: 4bits */ 3028 /* ************************************************************* */ 3029 if (attr->direction==bcmStatFlexDirectionEgress) { 3030 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 3031 (BSL_META_U(unit, 3032 "GroupModeDlfIntPriWithControl is not available in " 3033 "egress side\n"))); 3034 sal_free(attr); 3035 return BCM_E_INTERNAL; 3036 } 3037 3038 if (SOC_IS_TOMAHAWK3(unit)) { 3039 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 3040 (BSL_META_U(unit, 3041 "GroupModeDlfIntPriWithControl IsNotAvailable" 3042 "for %s\n"), SOC_UNIT_NAME(unit))); 3043 sal_free(attr); 3044 return BCM_E_UNAVAIL; 3045 } 3046 3047 /* Although 18 counters but pkt_res(6) + int_pri(4)=10 bits 3048 so cannot use UNCOMPRESSED MODE */ 3049 3050 /* INT_PRI */ /* .... */ /* PacketRes */ 3051 /* 34-31:4 */ /* .... */ /* 8-3:6 */ 3052 /* PRI_CNG_FN=Cng(2x):IFP(2x):IntPri( all 4bits are used). 3053 RightMost so no shifting required */ 3054 /* PKT_RES_FN=Pkt(6bits but 2 is used):SVP(1x):Drop(1x). 3055 LeftMost so 2 Left shifting required */ 3056 3057 total_counters=18; 3058 ing_attr->packet_attr_type=bcmStatFlexPacketAttrTypeCompressed; 3059 3060 ing_cmprsd_pkt_attr_bits->pkt_resolution = 2; 3061 ing_cmprsd_pkt_attr_bits->pkt_resolution_pos = ing_pkt_attr_cmprsd_bits_g[unit]. 3062 pkt_resolution_pos; 3063 ing_cmprsd_pkt_attr_bits->pkt_resolution_mask = (1<<2)-1; 3064 3065 ing_cmprsd_pkt_attr_bits->int_pri = ing_pkt_attr_cmprsd_bits_g[unit].int_pri; 3066 ing_cmprsd_pkt_attr_bits->int_pri_pos = ing_pkt_attr_cmprsd_bits_g[unit]. 3067 int_pri_pos; 3068 3069 ing_cmprsd_pkt_attr_bits->int_pri_mask = ing_pkt_attr_cmprsd_bits_g[unit]. 3070 int_pri_mask; 3071 ing_cmprsd_attr_selectors->total_counters = 18; 3072 3073 /* Reset pkt_resolution map */ 3074 for (map_index=0; map_index < 256 ;map_index++) { 3075 ing_cmprsd_attr_selectors->pkt_res_attr_map[map_index]=0; 3076 } 3077 /* set pkt_resolution map for 1 counters */ 3078 /* Map[Encoded Packet value << 2=>[SVP-1bit + DROP-1bit]= 3079 CounterIndex << 2=>[SVP-1bit + DROP-1bit]=4(Start),8,12*/ 3080 3081 shift_by_bits= ing_pkt_attr_cmprsd_bits_g[unit].svp_type + ing_pkt_attr_cmprsd_bits_g[unit].drop; 3082 shift_by_bits_for_value = shift_by_bits; 3083 3084 for (ignore_index=0; 3085 ignore_index < (1<<shift_by_bits) ; ignore_index++) { 3086 ing_cmprsd_attr_selectors-> 3087 pkt_res_attr_map[ 3088 (control_pkt<<shift_by_bits) | ignore_index]= 3089 (1<<shift_by_bits_for_value); 3090 ing_cmprsd_attr_selectors-> 3091 pkt_res_attr_map[(bpdu_pkt<<shift_by_bits) | ignore_index]= 3092 (1<<shift_by_bits_for_value); 3093 ing_cmprsd_attr_selectors-> 3094 pkt_res_attr_map[ 3095 (l2dlf_pkt<<shift_by_bits) | ignore_index]= 3096 (2<<shift_by_bits_for_value); 3097 } 3098 3099 /* Reset pri_cng map */ 3100 for (map_index=0; map_index < 256 ;map_index++) { 3101 ing_cmprsd_attr_selectors->pri_cnf_attr_map[map_index]=0; 3102 } 3103 /* set pri_cng map for 16 counters */ 3104 for (ignore_index=0; ignore_index < (1<<4) ; ignore_index++) { 3105 for (map_index=0; map_index < 16 ;map_index++) { 3106 ing_cmprsd_attr_selectors-> 3107 pri_cnf_attr_map[(ignore_index<<4) | map_index]=map_index; 3108 } 3109 } 3110 3111 /* Reset all Offset table fields */ 3112 for(counter_index=0;counter_index<256;counter_index++) { 3113 ing_cmprsd_attr_selectors-> 3114 offset_table_map[counter_index].offset=0; 3115 ing_cmprsd_attr_selectors-> 3116 offset_table_map[counter_index].count_enable=0; 3117 } 3118 /* ************************************************************ */ 3119 /* Set CONTROL_PKT|BPDU_PKT , L2DLF counter indexes considering */ 3120 /* INT_PRI bits 0 */ 3121 /* ************************************************************ */ 3122 3123 ing_cmprsd_attr_selectors->offset_table_map[1].offset=0; 3124 ing_cmprsd_attr_selectors->offset_table_map[1].count_enable=1; 3125 ing_cmprsd_attr_selectors->offset_table_map[2].offset=1; 3126 ing_cmprsd_attr_selectors->offset_table_map[2].count_enable=1; 3127 3128 /* Set IntPri counter indexes not-considering pkt resolution bits*/ 3129 /* Priority 0 Counter not satisfying any condition */ 3130 ing_cmprsd_attr_selectors->offset_table_map[0].offset=2; 3131 ing_cmprsd_attr_selectors->offset_table_map[0].count_enable=1; 3132 ing_cmprsd_attr_selectors->offset_table_map[3].offset=2; 3133 ing_cmprsd_attr_selectors->offset_table_map[3].count_enable=1; 3134 /*INT_PRI*/ 3135 for (counter_index=1;counter_index<(1<<4);counter_index++) { 3136 /*PktRes*/ 3137 for (ignore_index=0;ignore_index<(1<<2);ignore_index++) { 3138 ing_cmprsd_attr_selectors-> 3139 offset_table_map[(counter_index<<2)|ignore_index]. 3140 offset=(counter_index+2); 3141 ing_cmprsd_attr_selectors-> 3142 offset_table_map[(counter_index<<2)|ignore_index]. 3143 count_enable=1; 3144 } 3145 } 3146 break; 3147 case bcmStatGroupModeTypedWithControl: 3148 /* **************************************************************** */ 3149 /* A dedicated counter for control, unknown unicast, known unicast, */ 3150 /* multicast, broadcast */ 3151 /* 1) CONTROL_PKT|BPDU_PKT */ 3152 /* 2) UNKNOWN_L3UC_PKT */ 3153 /* 3) L2UC_PKT | KNOWN_L3UC_PKT */ 3154 /* 4) KNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT */ 3155 /* 5) L2BC_PKT */ 3156 /* **************************************************************** */ 3157 if (attr->direction == bcmStatFlexDirectionIngress) { 3158 total_counters=5; 3159 _bcm_esw_fillup_ing_uncmp_attr( 3160 ing_attr, 3161 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 3162 5); 3163 _bcm_esw_fillup_ing_pkt_res_offset_table( 3164 ing_attr, 3165 sizeof(ing_TypedWithControl_res)/ 3166 sizeof(ing_TypedWithControl_res[0]), 3167 &ing_TypedWithControl_res[0]); 3168 } else { 3169 /* Group mode is overrided so control shouldn't hit this part */ 3170 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 3171 (BSL_META_U(unit, 3172 "bcmStatGroupModeTypedWithControl" 3173 "is not supported in egress side\n"))); 3174 sal_free(attr); 3175 return BCM_E_INTERNAL; 3176 } 3177 break; 3178 case bcmStatGroupModeTypedAllWithControl: 3179 /* ***************************************************************** */ 3180 /* A dedicated counter for control, unknown unicast, known unicast, */ 3181 /* multicast, broadcast and one for all traffic (not already counted)*/ 3182 /* 1) CONTROL_PKT|BPDU_PKT */ 3183 /* 2) UNKNOWN_L3UC_PKT */ 3184 /* 3) L2UC_PKT | KNOWN_L3UC_PKT */ 3185 /* 4) KNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT */ 3186 /* 5) L2BC_PKT */ 3187 /* 6) UNKNOWN_PKT|L2DLF_PKT|UNKNOWN_IPMC_PKT|KNOWN_IPMC_PKT */ 3188 /* KNOWN_MPLS_PKT | KNOWN_MPLS_L3_PKT|KNOWN_MPLS_L2_PKT| */ 3189 /* UNKNOWN_MPLS_PKT|KNOWN_MIM_PKT|UNKNOWN_MIM_PKT| */ 3190 /* KNOWN_MPLS_MULTICAST_PKT */ 3191 /* ***************************************************************** */ 3192 if (attr->direction == bcmStatFlexDirectionIngress) { 3193 total_counters=6; 3194 _bcm_esw_fillup_ing_uncmp_attr( 3195 ing_attr, 3196 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS, 3197 6); 3198 _bcm_esw_fillup_ing_pkt_res_offset_table( 3199 ing_attr, 3200 sizeof(ing_TypedAllWithControl_res)/ 3201 sizeof(ing_TypedAllWithControl_res[0]), 3202 &ing_TypedAllWithControl_res[0]); 3203 } else { 3204 /* Group mode is overrided so control shouldn't hit this part */ 3205 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 3206 (BSL_META_U(unit, 3207 "bcmStatGroupModeTypedAllWithControl" 3208 " is not supported in egress side\n"))); 3209 sal_free(attr); 3210 return BCM_E_INTERNAL; 3211 } 3212 break; 3213 case bcmStatGroupModeTypedIntPriWithControl: 3214 /* *************************************************************** */ 3215 /* A dedicated counter for control, unknown unicast, known unicast */ 3216 /* , multicast, broadcast and N internal priority counters for */ 3217 /* traffic (not already counted) */ 3218 /* 1) CONTROL_PKT|BPDU_PKT */ 3219 /* 2) UNKNOWN_L3UC_PKT */ 3220 /* 3) L2UC_PKT | KNOWN_L3UC_PKT */ 3221 /* 4) KNOWN_L2MC_PKT|UNKNOWN_L2MC_PKT */ 3222 /* 5) L2BC_PKT */ 3223 /* 6..21) INT_PRI bits: 4bits */ 3224 /* *************************************************************** */ 3225 if (attr->direction == bcmStatFlexDirectionEgress) { 3226 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 3227 (BSL_META_U(unit, 3228 "GroupModeTypedIntPriWithControl is not available in " 3229 "egress side\n"))); 3230 sal_free(attr); 3231 return BCM_E_INTERNAL; 3232 } 3233 3234 if (SOC_IS_TOMAHAWK3(unit)) { 3235 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 3236 (BSL_META_U(unit, 3237 "GroupModeTypedIntPriWithControl IsNotAvailable" 3238 "for %s\n"), SOC_UNIT_NAME(unit))); 3239 sal_free(attr); 3240 return BCM_E_UNAVAIL; 3241 } 3242 3243 /* Although 21 counters but pkt_res(6) + int_pri(4)=10 bits 3244 so cannot use UNCOMPRESSED MODE */ 3245 3246 /* INT_PRI */ /* .... */ /* PacketRes */ 3247 /* 34-31:4 */ /* .... */ /* 8-3:6 */ 3248 /* PRI_CNG_FN=Cng(2x):IFP(2x):IntPri( all 4bits are used). 3249 RightMost so no shifting required */ 3250 /* PKT_RES_FN=Pkt(6bits but 2 is used):SVP(1x):Drop(1x). 3251 LeftMost so 2 Left shifting required */ 3252 3253 total_counters=21; 3254 ing_attr->packet_attr_type=bcmStatFlexPacketAttrTypeCompressed; 3255 3256 ing_cmprsd_pkt_attr_bits->pkt_resolution = 3; 3257 ing_cmprsd_pkt_attr_bits->pkt_resolution_pos = ing_pkt_attr_cmprsd_bits_g[unit]. 3258 pkt_resolution_pos; 3259 ing_cmprsd_pkt_attr_bits->pkt_resolution_mask = (1<<3)-1; 3260 ing_cmprsd_pkt_attr_bits->int_pri = ing_pkt_attr_cmprsd_bits_g[unit].int_pri; 3261 ing_cmprsd_pkt_attr_bits->int_pri_pos = ing_pkt_attr_cmprsd_bits_g[unit]. 3262 int_pri_pos; 3263 ing_cmprsd_pkt_attr_bits->int_pri_mask = ing_pkt_attr_cmprsd_bits_g[unit].int_pri_mask; 3264 ing_cmprsd_attr_selectors->total_counters = 21; 3265 3266 /* Reset pkt_resolution map */ 3267 for (map_index=0; map_index < 256 ;map_index++) { 3268 ing_cmprsd_attr_selectors->pkt_res_attr_map[map_index]=0; 3269 } 3270 /* set pkt_resolution map for 1 counters */ 3271 /* set pkt_resolution map for 1 counters */ 3272 /* Map[Encoded Packet value << 2=>[SVP-1bit + DROP-1bit]= 3273 CounterIndex << 2=>[SVP-1bit + DROP-1bit]=4(Start),8,12*/ 3274 3275 shift_by_bits= ing_pkt_attr_cmprsd_bits_g[unit].svp_type + ing_pkt_attr_cmprsd_bits_g[unit].drop; 3276 shift_by_bits_for_value = shift_by_bits; 3277 3278 for (ignore_index=0; 3279 ignore_index < (1<<shift_by_bits) ; ignore_index++) { 3280 ing_cmprsd_attr_selectors-> 3281 pkt_res_attr_map[ 3282 (control_pkt<<shift_by_bits) | ignore_index]= 3283 (1<<shift_by_bits_for_value); 3284 ing_cmprsd_attr_selectors-> 3285 pkt_res_attr_map[ 3286 (bpdu_pkt<<shift_by_bits) | ignore_index]= 3287 (1<<shift_by_bits_for_value); 3288 ing_cmprsd_attr_selectors-> 3289 pkt_res_attr_map[ 3290 (unknown_l3uc_pkt<<shift_by_bits) | ignore_index]= 3291 (2<<shift_by_bits_for_value); 3292 ing_cmprsd_attr_selectors-> 3293 pkt_res_attr_map[ 3294 (l2uc_pkt<<shift_by_bits) | ignore_index]= 3295 (3<<shift_by_bits_for_value); 3296 ing_cmprsd_attr_selectors-> 3297 pkt_res_attr_map[ 3298 (known_l3uc_pkt<<shift_by_bits) | ignore_index]= 3299 (3<<shift_by_bits_for_value); 3300 ing_cmprsd_attr_selectors-> 3301 pkt_res_attr_map[ 3302 (known_l2mc_pkt<<shift_by_bits) | ignore_index]= 3303 (4<<shift_by_bits_for_value); 3304 ing_cmprsd_attr_selectors-> 3305 pkt_res_attr_map[ 3306 (unknown_l2mc_pkt<<shift_by_bits) | ignore_index]= 3307 (4<<shift_by_bits_for_value); 3308 ing_cmprsd_attr_selectors-> 3309 pkt_res_attr_map[ 3310 (l2bc_pkt<<shift_by_bits) | ignore_index]= 3311 (5<<shift_by_bits_for_value); 3312 } 3313 /* Reset pri_cng map */ 3314 for (map_index=0; map_index < 256 ;map_index++) { 3315 ing_cmprsd_attr_selectors->pri_cnf_attr_map[map_index]=0; 3316 } 3317 /* set pri_cng map for 16 counters */ 3318 for (ignore_index=0; ignore_index < (1<<4) ; ignore_index++) { 3319 for (map_index=0; map_index < 16 ;map_index++) { 3320 ing_cmprsd_attr_selectors-> 3321 pri_cnf_attr_map[(ignore_index<<4) | map_index]=map_index; 3322 } 3323 } 3324 3325 /* Reset all Offset table fields */ 3326 for (counter_index=0;counter_index<256;counter_index++) { 3327 ing_cmprsd_attr_selectors-> 3328 offset_table_map[counter_index].offset=0; 3329 ing_cmprsd_attr_selectors-> 3330 offset_table_map[counter_index].count_enable=0; 3331 } 3332 /* **************************************************************** */ 3333 /* Set unicast, known unicast, multicast, broadcast counter indexes */ 3334 /* considering INT_PRI bits 0 */ 3335 /* **************************************************************** */ 3336 ing_cmprsd_attr_selectors->offset_table_map[1].offset=0; 3337 ing_cmprsd_attr_selectors->offset_table_map[1].count_enable=1; 3338 ing_cmprsd_attr_selectors->offset_table_map[2].offset=1; 3339 ing_cmprsd_attr_selectors->offset_table_map[2].count_enable=1; 3340 ing_cmprsd_attr_selectors->offset_table_map[3].offset=2; 3341 ing_cmprsd_attr_selectors->offset_table_map[3].count_enable=1; 3342 ing_cmprsd_attr_selectors->offset_table_map[4].offset=3; 3343 ing_cmprsd_attr_selectors->offset_table_map[4].count_enable=1; 3344 ing_cmprsd_attr_selectors->offset_table_map[5].offset=4; 3345 ing_cmprsd_attr_selectors->offset_table_map[5].count_enable=1; 3346 3347 /* Set IntPri counter indexes not-considering pkt resolution bits*/ 3348 /* Priority 0 Counter not satisfying any condition */ 3349 ing_cmprsd_attr_selectors->offset_table_map[0].offset=5; 3350 ing_cmprsd_attr_selectors->offset_table_map[0].count_enable=1; 3351 ing_cmprsd_attr_selectors->offset_table_map[6].offset=5; 3352 ing_cmprsd_attr_selectors->offset_table_map[6].count_enable=1; 3353 ing_cmprsd_attr_selectors->offset_table_map[7].offset=5; 3354 ing_cmprsd_attr_selectors->offset_table_map[7].count_enable=1; 3355 3356 /*INT_PRI*/ 3357 for (counter_index=1;counter_index<(1<<4);counter_index++) { 3358 /*PktRes*/ 3359 for (ignore_index=0;ignore_index<(1<<3);ignore_index++) { 3360 ing_cmprsd_attr_selectors-> 3361 offset_table_map[(counter_index<<3)|ignore_index]. 3362 offset=(counter_index+5); 3363 ing_cmprsd_attr_selectors-> 3364 offset_table_map[(counter_index<<3)|ignore_index]. 3365 count_enable=1; 3366 } 3367 } 3368 break; 3369 case bcmStatGroupModeDot1P: 3370 /* ******************************************************** */ 3371 /* A set of 8(2^3) counters selected based on Vlan priority */ 3372 /* outer_dot1p; 3 bits 1..8 */ 3373 /* ******************************************************** */ 3374 3375 if (attr->direction==bcmStatFlexDirectionIngress) { 3376 total_counters=8; 3377 _bcm_esw_fillup_ing_uncmp_attr( 3378 ing_attr, 3379 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_OUTER_DOT1P_ATTR_BITS, 3380 8); 3381 /* Set Offset table fields */ 3382 for (counter_index=0;counter_index<8;counter_index++) { 3383 ing_attr->uncmprsd_attr_selectors. 3384 offset_table_map[counter_index].offset=counter_index; 3385 ing_attr->uncmprsd_attr_selectors. 3386 offset_table_map[counter_index].count_enable=1; 3387 } 3388 } else { 3389 total_counters=8; 3390 _bcm_esw_fillup_egr_uncmp_attr( 3391 egr_attr, 3392 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_OUTER_DOT1P_ATTR_BITS, 3393 8); 3394 /* Set Offset table fields */ 3395 for (counter_index=0;counter_index<8;counter_index++) { 3396 egr_attr->uncmprsd_attr_selectors. 3397 offset_table_map[counter_index].offset=counter_index; 3398 egr_attr->uncmprsd_attr_selectors. 3399 offset_table_map[counter_index].count_enable=1; 3400 } 3401 } 3402 break; 3403 case bcmStatGroupModeIntPri: 3404 /* **************************************************** */ 3405 /* A set of 16(2^4) counters based on internal priority */ 3406 /* 1..16 INT_PRI bits: 4bits */ 3407 /* **************************************************** */ 3408 3409 if (attr->direction==bcmStatFlexDirectionIngress) { 3410 total_counters=16; 3411 _bcm_esw_fillup_ing_uncmp_attr( 3412 ing_attr, 3413 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_INT_PRI_ATTR_BITS, 3414 16); 3415 /* Set Offset table fields */ 3416 for (counter_index=0;counter_index<16;counter_index++) { 3417 ing_attr->uncmprsd_attr_selectors. 3418 offset_table_map[counter_index].offset=counter_index; 3419 ing_attr->uncmprsd_attr_selectors. 3420 offset_table_map[counter_index].count_enable=1; 3421 } 3422 } else { 3423 total_counters=16; 3424 _bcm_esw_fillup_egr_uncmp_attr( 3425 egr_attr, 3426 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_INT_PRI_ATTR_BITS, 3427 16); 3428 /* Set Offset table fields */ 3429 for (counter_index=0;counter_index<16;counter_index++) { 3430 egr_attr->uncmprsd_attr_selectors. 3431 offset_table_map[counter_index].offset=counter_index; 3432 egr_attr->uncmprsd_attr_selectors. 3433 offset_table_map[counter_index].count_enable=1; 3434 } 3435 } 3436 break; 3437 case bcmStatGroupModeIntPriCng: 3438 /* ********************************************************** */ 3439 /* set of 64 counters(2^(4+2)) based on Internal priority+CNG */ 3440 /* 1..64 (INT_PRI bits: 4bits + CNG 2 bits */ 3441 /* 1..64 (INT_PRI bits: 4bits + CNG 2 bits */ 3442 /* ********************************************************** */ 3443 if (attr->direction==bcmStatFlexDirectionIngress) { 3444 total_counters=64; 3445 _bcm_esw_fillup_ing_uncmp_attr( 3446 ing_attr, 3447 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_CNG_ATTR_BITS| 3448 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_INT_PRI_ATTR_BITS, 3449 64); 3450 /* Set Offset table fields */ 3451 counter_index=0; 3452 for (outer_index=0;outer_index<4;outer_index++) {/*CNG*/ 3453 for (inner_index=0;inner_index<16;inner_index++) {/*IntPri*/ 3454 ing_attr->uncmprsd_attr_selectors. 3455 offset_table_map[counter_index].count_enable=1; 3456 ing_attr->uncmprsd_attr_selectors. 3457 offset_table_map[(outer_index<<4)|inner_index]. 3458 offset=counter_index++; 3459 } 3460 } 3461 } else { 3462 total_counters=64; 3463 _bcm_esw_fillup_egr_uncmp_attr( 3464 egr_attr, 3465 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_CNG_ATTR_BITS| 3466 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_INT_PRI_ATTR_BITS, 3467 64); 3468 /* Set Offset table fields */ 3469 counter_index=0; 3470 for (outer_index=0;outer_index<4;outer_index++) {/*CNG*/ 3471 for(inner_index=0;inner_index<16;inner_index++) {/*IntPri*/ 3472 egr_attr->uncmprsd_attr_selectors. 3473 offset_table_map[counter_index].count_enable=1; 3474 egr_attr->uncmprsd_attr_selectors. 3475 offset_table_map[(outer_index<<4)|inner_index]. 3476 offset=counter_index++; 3477 } 3478 } 3479 } 3480 break; 3481 case bcmStatGroupModeSvpType: 3482 /* ****************************************** */ 3483 /* A set of 2 counters(2^1) based on SVP type */ 3484 /* 1..2 (SVP 1 bit) */ 3485 /* ****************************************** */ 3486 3487 if (attr->direction==bcmStatFlexDirectionIngress) { 3488 total_counters=2; 3489 _bcm_esw_fillup_ing_uncmp_attr( 3490 ing_attr, 3491 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_SVP_TYPE_ATTR_BITS, 3492 2); 3493 /* Set Offset table fields */ 3494 /* DropBitShifting=1 is required */ 3495 for (counter_index=0;counter_index<2;counter_index++) { 3496 ing_attr->uncmprsd_attr_selectors. 3497 offset_table_map[counter_index].offset=counter_index; 3498 ing_attr->uncmprsd_attr_selectors. 3499 offset_table_map[counter_index].count_enable=1; 3500 } 3501 } else { 3502 total_counters=2; 3503 _bcm_esw_fillup_egr_uncmp_attr( 3504 egr_attr, 3505 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_SVP_TYPE_ATTR_BITS, 3506 2); 3507 /* Set Offset table fields */ 3508 /* DropBitShifting=1 + DvpBitShifting=1 ==> 2 is required */ 3509 for (counter_index=0;counter_index<2;counter_index++) { 3510 egr_attr->uncmprsd_attr_selectors. 3511 offset_table_map[counter_index<<2].offset=counter_index; 3512 egr_attr->uncmprsd_attr_selectors. 3513 offset_table_map[counter_index<<2].count_enable=1; 3514 } 3515 } 3516 break; 3517 case bcmStatGroupModeDscp: 3518 /* ******************************************** */ 3519 /* A set of 64 counters(2^6) based on DSCP bits */ 3520 /* 1..64 (6 bits from TOS 8 bits) */ 3521 /* ******************************************** */ 3522 3523 if (attr->direction==bcmStatFlexDirectionIngress) { 3524 total_counters=64; 3525 _bcm_esw_fillup_ing_uncmp_attr( 3526 ing_attr, 3527 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_TOS_DSCP_ATTR_BITS, 3528 64); 3529 /* Set Offset table fields */ 3530 for (counter_index=0;counter_index<64;counter_index++) { 3531 ing_attr->uncmprsd_attr_selectors. 3532 offset_table_map[counter_index].offset=counter_index; 3533 ing_attr->uncmprsd_attr_selectors. 3534 offset_table_map[counter_index].count_enable=1; 3535 } 3536 } else { 3537 total_counters=64; 3538 _bcm_esw_fillup_egr_uncmp_attr( 3539 egr_attr, 3540 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_TOS_DSCP_ATTR_BITS, 3541 64); 3542 /* Set Offset table fields */ 3543 for (counter_index = 0; counter_index < 64; counter_index++) { 3544 egr_attr->uncmprsd_attr_selectors. 3545 offset_table_map[counter_index].offset=counter_index; 3546 egr_attr->uncmprsd_attr_selectors. 3547 offset_table_map[counter_index].count_enable=1; 3548 } 3549 } 3550 break; 3551 case bcmStatGroupModeDvpType: 3552 /* ******************************************** */ 3553 /* EGRESS SIDE ONLY: */ 3554 /* A set of 2 counters(2^1) based on DVP type */ 3555 /* 1..2 (DVP 1 bits) */ 3556 /* ******************************************** */ 3557 3558 if (attr->direction==bcmStatFlexDirectionIngress) { 3559 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 3560 (BSL_META_U(unit, 3561 "bcm_stat_group_mode_t %d is NotSupported" 3562 " in IngressSide\n"), group_mode)); 3563 sal_free(attr); 3564 return BCM_E_PARAM; 3565 } else { 3566 total_counters=2; 3567 _bcm_esw_fillup_egr_uncmp_attr( 3568 egr_attr, 3569 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_DVP_TYPE_ATTR_BITS, 3570 2); 3571 /* Set Offset table fields */ 3572 for (counter_index=0;counter_index<2;counter_index++) { 3573 egr_attr->uncmprsd_attr_selectors. 3574 offset_table_map[counter_index].offset=counter_index; 3575 egr_attr->uncmprsd_attr_selectors. 3576 offset_table_map[counter_index].count_enable=1; 3577 } 3578 } 3579 break; 3580 case bcmStatGroupModeCng: 3581 if (attr->direction==bcmStatFlexDirectionIngress) { 3582 total_counters=4; 3583 _bcm_esw_fillup_ing_uncmp_attr( 3584 ing_attr, 3585 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_CNG_ATTR_BITS, 3586 4); 3587 /* Set Offset table fields */ 3588 for (counter_index=0;counter_index<4;counter_index++) { 3589 ing_attr->uncmprsd_attr_selectors. 3590 offset_table_map[counter_index].offset=counter_index; 3591 ing_attr->uncmprsd_attr_selectors. 3592 offset_table_map[counter_index].count_enable=1; 3593 } 3594 } else { 3595 total_counters=4; 3596 _bcm_esw_fillup_egr_uncmp_attr( 3597 egr_attr, 3598 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_CNG_ATTR_BITS, 3599 4); 3600 /* Set Offset table fields */ 3601 for (counter_index=0;counter_index<4;counter_index++) { 3602 egr_attr->uncmprsd_attr_selectors. 3603 offset_table_map[counter_index].offset=counter_index; 3604 egr_attr->uncmprsd_attr_selectors. 3605 offset_table_map[counter_index].count_enable=1; 3606 } 3607 } 3608 break; 3609 #ifdef BCM_APACHE_SUPPORT 3610 case bcmStatGroupModeMplsCngLabelFirst: 3611 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 3612 if (attr->direction == bcmStatFlexDirectionIngress) { 3613 total_counters = 4; 3614 _bcm_esw_fillup_ing_uncmp_attr( 3615 ing_attr, 3616 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_CNG_1_ATTR_BITS, 3617 4); 3618 /* Set Offset table fields */ 3619 for (counter_index = 0;counter_index<4;counter_index++) { 3620 ing_attr->uncmprsd_attr_selectors. 3621 offset_table_map[counter_index].offset = counter_index; 3622 ing_attr->uncmprsd_attr_selectors. 3623 offset_table_map[counter_index].count_enable = 1; 3624 } 3625 } else { 3626 total_counters = 4; 3627 _bcm_esw_fillup_egr_uncmp_attr( 3628 egr_attr, 3629 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_CNG_1_ATTR_BITS, 3630 4); 3631 /* Set Offset table fields */ 3632 for (counter_index = 0;counter_index<4;counter_index++) { 3633 egr_attr->uncmprsd_attr_selectors. 3634 offset_table_map[counter_index].offset = counter_index; 3635 egr_attr->uncmprsd_attr_selectors. 3636 offset_table_map[counter_index].count_enable = 1; 3637 } 3638 } 3639 } else { 3640 sal_free(attr); 3641 return BCM_E_UNAVAIL; 3642 } 3643 break; 3644 case bcmStatGroupModeMplsIntPriLabelFirst: 3645 /* **************************************************** */ 3646 /* A set of 16(2^4) counters based on internal pri MPLS label 1*/ 3647 /* 1..16 PHB_1 bits: 4bits */ 3648 /* **************************************************** */ 3649 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 3650 if (attr->direction == bcmStatFlexDirectionIngress) { 3651 total_counters = 16; 3652 _bcm_esw_fillup_ing_uncmp_attr( 3653 ing_attr, 3654 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PHB_1_ATTR_BITS, 3655 16); 3656 /* Set Offset table fields */ 3657 for (counter_index = 0;counter_index<16;counter_index++) { 3658 ing_attr->uncmprsd_attr_selectors. 3659 offset_table_map[counter_index].offset = counter_index; 3660 ing_attr->uncmprsd_attr_selectors. 3661 offset_table_map[counter_index].count_enable = 1; 3662 } 3663 } else { 3664 total_counters = 16; 3665 _bcm_esw_fillup_egr_uncmp_attr( 3666 egr_attr, 3667 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_PHB_1_ATTR_BITS, 3668 16); 3669 /* Set Offset table fields */ 3670 for (counter_index = 0;counter_index<16;counter_index++) { 3671 egr_attr->uncmprsd_attr_selectors. 3672 offset_table_map[counter_index].offset = counter_index; 3673 egr_attr->uncmprsd_attr_selectors. 3674 offset_table_map[counter_index].count_enable = 1; 3675 } 3676 } 3677 } else { 3678 sal_free(attr); 3679 return BCM_E_UNAVAIL; 3680 } 3681 break; 3682 case bcmStatGroupModeMplsCngLabelSecond: 3683 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 3684 if (attr->direction == bcmStatFlexDirectionIngress) { 3685 total_counters = 4; 3686 _bcm_esw_fillup_ing_uncmp_attr( 3687 ing_attr, 3688 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_CNG_2_ATTR_BITS, 3689 4); 3690 /* Set Offset table fields */ 3691 for (counter_index = 0;counter_index<4;counter_index++) { 3692 ing_attr->uncmprsd_attr_selectors. 3693 offset_table_map[counter_index].offset = counter_index; 3694 ing_attr->uncmprsd_attr_selectors. 3695 offset_table_map[counter_index].count_enable = 1; 3696 } 3697 } else { 3698 total_counters = 4; 3699 _bcm_esw_fillup_egr_uncmp_attr( 3700 egr_attr, 3701 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_CNG_2_ATTR_BITS, 3702 4); 3703 /* Set Offset table fields */ 3704 for (counter_index = 0;counter_index<4;counter_index++) { 3705 egr_attr->uncmprsd_attr_selectors. 3706 offset_table_map[counter_index].offset = counter_index; 3707 egr_attr->uncmprsd_attr_selectors. 3708 offset_table_map[counter_index].count_enable = 1; 3709 } 3710 } 3711 } else { 3712 sal_free(attr); 3713 return BCM_E_UNAVAIL; 3714 } 3715 break; 3716 case bcmStatGroupModeMplsIntPriLabelSecond: 3717 /* **************************************************** */ 3718 /* A set of 16(2^4) counters based on internal pri MPLS label 2*/ 3719 /* 1..16 PHB_1 bits: 4bits */ 3720 /* **************************************************** */ 3721 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 3722 if (attr->direction == bcmStatFlexDirectionIngress) { 3723 total_counters = 16; 3724 _bcm_esw_fillup_ing_uncmp_attr( 3725 ing_attr, 3726 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PHB_2_ATTR_BITS, 3727 16); 3728 /* Set Offset table fields */ 3729 for (counter_index = 0;counter_index<16;counter_index++) { 3730 ing_attr->uncmprsd_attr_selectors. 3731 offset_table_map[counter_index].offset = counter_index; 3732 ing_attr->uncmprsd_attr_selectors. 3733 offset_table_map[counter_index].count_enable = 1; 3734 } 3735 } else { 3736 total_counters = 16; 3737 _bcm_esw_fillup_egr_uncmp_attr( 3738 egr_attr, 3739 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_PHB_2_ATTR_BITS, 3740 16); 3741 /* Set Offset table fields */ 3742 for (counter_index = 0;counter_index<16;counter_index++) { 3743 egr_attr->uncmprsd_attr_selectors. 3744 offset_table_map[counter_index].offset = counter_index; 3745 egr_attr->uncmprsd_attr_selectors. 3746 offset_table_map[counter_index].count_enable = 1; 3747 } 3748 } 3749 } else { 3750 sal_free(attr); 3751 return BCM_E_UNAVAIL; 3752 } 3753 break; 3754 case bcmStatGroupModeMplsCngLabelThird: 3755 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 3756 if (attr->direction == bcmStatFlexDirectionIngress) { 3757 total_counters = 4; 3758 _bcm_esw_fillup_ing_uncmp_attr( 3759 ing_attr, 3760 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_CNG_3_ATTR_BITS, 3761 4); 3762 /* Set Offset table fields */ 3763 for (counter_index = 0;counter_index<4;counter_index++) { 3764 ing_attr->uncmprsd_attr_selectors. 3765 offset_table_map[counter_index].offset = counter_index; 3766 ing_attr->uncmprsd_attr_selectors. 3767 offset_table_map[counter_index].count_enable = 1; 3768 } 3769 } else { 3770 total_counters = 4; 3771 _bcm_esw_fillup_egr_uncmp_attr( 3772 egr_attr, 3773 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_CNG_3_ATTR_BITS, 3774 4); 3775 /* Set Offset table fields */ 3776 for (counter_index = 0;counter_index<4;counter_index++) { 3777 egr_attr->uncmprsd_attr_selectors. 3778 offset_table_map[counter_index].offset = counter_index; 3779 egr_attr->uncmprsd_attr_selectors. 3780 offset_table_map[counter_index].count_enable = 1; 3781 } 3782 } 3783 } else { 3784 sal_free(attr); 3785 return BCM_E_UNAVAIL; 3786 } 3787 break; 3788 case bcmStatGroupModeMplsIntPriLabelThird: 3789 /* **************************************************** */ 3790 /* A set of 16(2^4) counters based on internal pri MPLS label 2*/ 3791 /* 1..16 PHB_1 bits: 4bits */ 3792 /* **************************************************** */ 3793 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 3794 if (attr->direction == bcmStatFlexDirectionIngress) { 3795 total_counters = 16; 3796 _bcm_esw_fillup_ing_uncmp_attr( 3797 ing_attr, 3798 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PHB_3_ATTR_BITS, 3799 16); 3800 /* Set Offset table fields */ 3801 for (counter_index = 0;counter_index<16;counter_index++) { 3802 ing_attr->uncmprsd_attr_selectors. 3803 offset_table_map[counter_index].offset = counter_index; 3804 ing_attr->uncmprsd_attr_selectors. 3805 offset_table_map[counter_index].count_enable = 1; 3806 } 3807 } else { 3808 total_counters = 16; 3809 _bcm_esw_fillup_egr_uncmp_attr( 3810 egr_attr, 3811 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_PHB_3_ATTR_BITS, 3812 16); 3813 /* Set Offset table fields */ 3814 for (counter_index = 0;counter_index<16;counter_index++) { 3815 egr_attr->uncmprsd_attr_selectors. 3816 offset_table_map[counter_index].offset = counter_index; 3817 egr_attr->uncmprsd_attr_selectors. 3818 offset_table_map[counter_index].count_enable = 1; 3819 } 3820 } 3821 } else { 3822 sal_free(attr); 3823 return BCM_E_UNAVAIL; 3824 } 3825 break; 3826 #endif 3827 default: 3828 if ((int32)group_mode == bcmIntStatGroupModeLatencyMonitor) { 3829 /* ********************************************************** */ 3830 /* EGRESS SIDE ONLY: */ 3831 /* A set of 960 counters for 10 sets of 12 Queues/histograms */ 3832 /* and 8 buckets/counters per queue/histogram. */ 3833 /* ********************************************************** */ 3834 3835 if (attr->direction==bcmStatFlexDirectionIngress) { 3836 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 3837 (BSL_META_U(unit, 3838 "bcm_stat_group_mode_t %d is NotSupported" 3839 " in IngressSide\n"), group_mode)); 3840 sal_free(attr); 3841 return BCM_E_PARAM; 3842 } else { 3843 total_counters=960; 3844 _bcm_esw_fillup_egr_uncmp_attr( 3845 egr_attr, 3846 0, 3847 total_counters); 3848 attr->egr_attr.uncmprsd_attr_selectors.uncmprsd_attr_bits_selector = 0; 3849 } 3850 } else { 3851 sal_free(attr); 3852 return BCM_E_PARAM; 3853 } 3854 }; 3855 rv = _bcm_esw_stat_flex_create_mode(unit,attr,&mode,NULL); 3856 if ((rv == BCM_E_NONE) || (rv==BCM_E_EXISTS)) { 3857 soc_mem_t mem_tab = PORT_TABm; 3858 rv = _bcm_esw_stat_flex_set_group_mode( 3859 unit,attr->direction, mode,group_mode); 3860 if(BCM_FAILURE(rv)) { 3861 sal_free(attr); 3862 return rv; 3863 } 3864 rv = BCM_E_NONE; 3865 switch(object) { 3866 /* Ingress Side */ 3867 case bcmStatObjectIngPort: 3868 #if defined (BCM_TRIDENT3_SUPPORT) 3869 if (SOC_IS_TRIDENT3X(unit)){ 3870 mem_tab = LPORT_TABm; 3871 } else 3872 #endif 3873 { 3874 mem_tab = PORT_TABm; 3875 } 3876 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 3877 unit, mem_tab, FIRST_LKUP, object, mode, 3878 &base_index, &pool_number); 3879 break; 3880 case bcmStatObjectIngVlan: 3881 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 3882 unit, VLAN_TABm, FIRST_LKUP, object,mode, 3883 &base_index,&pool_number); 3884 break; 3885 case bcmStatObjectIngVlanXlate: 3886 #if defined (BCM_TRIDENT3_SUPPORT) 3887 if (SOC_IS_TRIDENT3X(unit)){ 3888 /* Should consider VLAN_XLATE_2_DOUBLEm in future */ 3889 mem_tab = VLAN_XLATE_1_DOUBLEm; 3890 } else 3891 #endif 3892 { 3893 mem_tab = VLAN_XLATEm; 3894 } 3895 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 3896 unit, mem_tab, FIRST_LKUP, object, mode, 3897 &base_index, &pool_number); 3898 break; 3899 case bcmStatObjectIngVlanXlateSecondLookup: 3900 #if defined(BCM_TRIDENT2PLUS_SUPPORT) 3901 if (soc_feature(unit,soc_feature_ing_vlan_xlate_second_lookup)) { 3902 #if defined (BCM_TRIDENT3_SUPPORT) 3903 if (SOC_IS_TRIDENT3X(unit)){ 3904 mem_tab = VLAN_XLATE_1_DOUBLEm; 3905 } else 3906 #endif 3907 { 3908 mem_tab = VLAN_XLATEm; 3909 } 3910 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 3911 unit, mem_tab, SECOND_LKUP, object,mode, 3912 &base_index,&pool_number); 3913 } else 3914 #endif 3915 { 3916 rv = BCM_E_PARAM; 3917 } 3918 break; 3919 case bcmStatObjectIngVfi: 3920 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 3921 unit, VFIm, FIRST_LKUP, object,mode, 3922 &base_index,&pool_number); 3923 break; 3924 case bcmStatObjectIngL3Intf: 3925 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 3926 unit, L3_IIFm, FIRST_LKUP, object,mode, 3927 &base_index,&pool_number); 3928 break; 3929 case bcmStatObjectIngVrf: 3930 #if defined (BCM_TRIDENT3_SUPPORT) 3931 if (SOC_IS_TRIDENT3X(unit)){ 3932 mem_tab = VRF_ATTRS_2m; 3933 } else 3934 #endif 3935 { 3936 mem_tab = VRFm; 3937 } 3938 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 3939 unit, mem_tab, FIRST_LKUP, object,mode, 3940 &base_index,&pool_number); 3941 break; 3942 case bcmStatObjectIngPolicy: 3943 pool_number = 0xff; /* This will cause the default pool to be allocated*/ 3944 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 3945 unit, VFP_POLICY_TABLEm, FIRST_LKUP, object,mode, 3946 &base_index,&pool_number); 3947 break; 3948 case bcmStatObjectIngNiv: 3949 case bcmStatObjectIngMplsVcLabel: 3950 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 3951 unit, SOURCE_VPm, FIRST_LKUP, object,mode, 3952 &base_index,&pool_number); 3953 break; 3954 case bcmStatObjectIngMplsSwitchLabel: 3955 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 3956 unit, MPLS_ENTRYm, FIRST_LKUP, object, mode, 3957 &base_index, &pool_number); 3958 break; 3959 case bcmStatObjectIngMplsSwitchSecondLabel: 3960 #if defined(BCM_APACHE_SUPPORT) 3961 if (soc_feature(unit, 3962 soc_feature_mpls_entry_second_label_lookup)) { 3963 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 3964 unit, MPLS_ENTRYm, SECOND_LKUP, object,mode, 3965 &base_index,&pool_number); 3966 } else 3967 #endif 3968 { 3969 rv = BCM_E_PARAM; 3970 } 3971 break; 3972 case bcmStatObjectIngMplsFrrLabel: 3973 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 3974 unit, L3_TUNNELm, FIRST_LKUP, object,mode, 3975 &base_index,&pool_number); 3976 break; 3977 case bcmStatObjectIngL3Host: 3978 /* To Be Completed..L3_ENTRY_2/4,EXT_IPV4/6_128_UCAST_WIDE */ 3979 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 3980 unit, EXT_IPV4_UCAST_WIDEm, FIRST_LKUP, object,mode, 3981 &base_index,&pool_number); 3982 break; 3983 case bcmStatObjectIngTrill: 3984 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 3985 unit, MPLS_ENTRY_EXTDm, FIRST_LKUP, object,mode, 3986 &base_index,&pool_number); 3987 break; 3988 case bcmStatObjectIngMimLookupId: 3989 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 3990 unit, MPLS_ENTRY_EXTDm, FIRST_LKUP, object,mode, 3991 &base_index,&pool_number); 3992 break; 3993 case bcmStatObjectIngL2Gre: 3994 /* To Be Completed..SOURCE_VPm, VLAN_XLATE_1m L2GRE_DIP view */ 3995 #if defined (BCM_TRIDENT3_SUPPORT) 3996 if (SOC_IS_TRIDENT3X(unit)){ 3997 mem_tab = VLAN_XLATE_1_DOUBLEm; 3998 } else 3999 #endif 4000 { 4001 mem_tab = VLAN_XLATEm; 4002 } 4003 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 4004 unit, mem_tab, FIRST_LKUP, object, mode, 4005 &base_index, &pool_number); 4006 break; 4007 case bcmStatObjectIngEXTPolicy: 4008 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 4009 unit, EXT_FP_POLICYm, FIRST_LKUP, object, mode, 4010 &base_index, &pool_number); 4011 break; 4012 case bcmStatObjectIngVxlan: 4013 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 4014 unit, SOURCE_VPm, FIRST_LKUP, object,mode, 4015 &base_index,&pool_number); 4016 break; 4017 case bcmStatObjectIngVsan: 4018 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 4019 unit, ING_VSANm, FIRST_LKUP, object,mode, 4020 &base_index,&pool_number); 4021 break; 4022 case bcmStatObjectIngFcoe: 4023 #if defined (BCM_TRIDENT3_SUPPORT) 4024 if (SOC_IS_TRIDENT3X(unit)){ 4025 mem_tab = L3_ENTRY_DOUBLEm; 4026 } else 4027 #endif 4028 { 4029 mem_tab = L3_ENTRY_IPV4_MULTICASTm; 4030 } 4031 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 4032 unit, mem_tab, FIRST_LKUP, object, mode, 4033 &base_index, &pool_number); 4034 break; 4035 case bcmStatObjectIngL3Route: 4036 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 4037 unit, L3_DEFIPm, FIRST_LKUP, object,mode, 4038 &base_index,&pool_number); 4039 break; 4040 case bcmStatObjectIngIpmc: 4041 #if defined (BCM_TRIDENT3_SUPPORT) 4042 if (SOC_IS_TRIDENT3X(unit)){ 4043 mem_tab = L3_ENTRY_DOUBLEm; 4044 } else 4045 #endif 4046 { 4047 mem_tab = L3_ENTRY_IPV4_MULTICASTm; 4048 } 4049 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 4050 unit, mem_tab, FIRST_LKUP, object, mode, 4051 &base_index, &pool_number); 4052 break; 4053 case bcmStatObjectIngVxlanDip: 4054 #if defined (BCM_TRIDENT3_SUPPORT) 4055 if (SOC_IS_TRIDENT3X(unit)){ 4056 mem_tab = VLAN_XLATE_1_DOUBLEm; 4057 } else 4058 #endif 4059 { 4060 mem_tab = VLAN_XLATEm; 4061 } 4062 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 4063 unit, mem_tab, FIRST_LKUP, object, mode, 4064 &base_index, &pool_number); 4065 break; 4066 case bcmStatObjectIngFieldStageIngress: 4067 pool_number = 0xff; /* This will cause the default pool to be allocated*/ 4068 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 4069 unit, IFP_POLICY_TABLEm, FIRST_LKUP, object,mode, 4070 &base_index, &pool_number); 4071 break; 4072 case bcmStatObjectIngExactMatch: 4073 pool_number = 0xff; /* This will cause the default pool to be allocated*/ 4074 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 4075 unit, EXACT_MATCH_2m, FIRST_LKUP, object, mode, 4076 &base_index, &pool_number); 4077 break; 4078 case bcmStatObjectIngGport: 4079 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 4080 unit, SOURCE_VPm, FIRST_LKUP, object, mode, 4081 &base_index, &pool_number); 4082 break; 4083 4084 /* Egress Side */ 4085 case bcmStatObjectEgrPort: 4086 #if defined (BCM_TRIDENT3_SUPPORT) 4087 if (SOC_IS_TRIDENT3X(unit)){ 4088 mem_tab = EGR_LPORT_PROFILEm; 4089 } else 4090 #endif 4091 { 4092 mem_tab = EGR_PORTm; 4093 } 4094 rv = _bcm_esw_stat_flex_create_egress_table_counters( 4095 unit, mem_tab, FIRST_LKUP, object, mode, 4096 &base_index, &pool_number); 4097 break; 4098 case bcmStatObjectEgrVlan: 4099 rv = _bcm_esw_stat_flex_create_egress_table_counters( 4100 unit, EGR_VLANm, FIRST_LKUP, object,mode, 4101 &base_index,&pool_number); 4102 break; 4103 case bcmStatObjectEgrVlanXlate: 4104 #if defined (BCM_TRIDENT3_SUPPORT) 4105 if (SOC_IS_TRIDENT3X(unit)){ 4106 mem_tab = EGR_VLAN_XLATE_1_DOUBLEm; 4107 } else 4108 #endif 4109 { 4110 mem_tab = EGR_VLAN_XLATEm; 4111 } 4112 rv = _bcm_esw_stat_flex_create_egress_table_counters( 4113 unit, mem_tab, FIRST_LKUP, object, mode, 4114 &base_index, &pool_number); 4115 break; 4116 case bcmStatObjectEgrVlanXlateSecondLookup: 4117 #if defined(BCM_APACHE_SUPPORT) || defined(BCM_TRIDENT3_SUPPORT) 4118 if (soc_feature(unit, soc_feature_egr_vlan_xlate_second_lookup)) { 4119 #if defined (BCM_TRIDENT3_SUPPORT) 4120 if (SOC_IS_TRIDENT3X(unit)){ 4121 mem_tab = EGR_VLAN_XLATE_1_DOUBLEm; 4122 } else 4123 #endif 4124 { 4125 mem_tab = EGR_VLAN_XLATEm; 4126 } 4127 rv = _bcm_esw_stat_flex_create_egress_table_counters( 4128 unit, mem_tab, SECOND_LKUP, object,mode, 4129 &base_index,&pool_number); 4130 } else 4131 #endif 4132 { 4133 rv = BCM_E_PARAM; 4134 } 4135 break; 4136 case bcmStatObjectEgrVfi: 4137 rv = _bcm_esw_stat_flex_create_egress_table_counters( 4138 unit, EGR_VFIm, FIRST_LKUP, object,mode, 4139 &base_index,&pool_number); 4140 break; 4141 case bcmStatObjectEgrNiv: 4142 case bcmStatObjectEgrL3Intf: 4143 rv = _bcm_esw_stat_flex_create_egress_table_counters( 4144 unit, EGR_L3_NEXT_HOPm, FIRST_LKUP, object,mode, 4145 &base_index,&pool_number); 4146 break; 4147 case bcmStatObjectEgrWlan: 4148 rv = _bcm_esw_stat_flex_create_egress_table_counters( 4149 unit, EGR_L3_NEXT_HOPm, FIRST_LKUP, object,mode, 4150 &base_index,&pool_number); 4151 break; 4152 case bcmStatObjectEgrMim: 4153 rv = _bcm_esw_stat_flex_create_egress_table_counters( 4154 unit, EGR_L3_NEXT_HOPm, FIRST_LKUP, object,mode, 4155 &base_index,&pool_number); 4156 break; 4157 case bcmStatObjectEgrMimLookupId: 4158 #if defined (BCM_TRIDENT3_SUPPORT) 4159 if (SOC_IS_TRIDENT3X(unit)){ 4160 mem_tab = EGR_VLAN_XLATE_1_DOUBLEm; 4161 } else 4162 #endif 4163 { 4164 mem_tab = EGR_VLAN_XLATEm; 4165 } 4166 rv = _bcm_esw_stat_flex_create_egress_table_counters( 4167 unit, mem_tab, FIRST_LKUP, object, mode, 4168 &base_index, &pool_number); 4169 break; 4170 case bcmStatObjectEgrL2Gre: 4171 #if defined (BCM_TRIDENT3_SUPPORT) 4172 if (SOC_IS_TRIDENT3X(unit)){ 4173 mem_tab = EGR_DVP_ATTRIBUTEm; 4174 } else 4175 #endif 4176 { 4177 mem_tab = EGR_DVP_ATTRIBUTE_1m; 4178 } 4179 rv = _bcm_esw_stat_flex_create_egress_table_counters( 4180 unit, mem_tab, FIRST_LKUP, object, mode, 4181 &base_index, &pool_number); 4182 break; 4183 case bcmStatObjectEgrVxlan: 4184 #if defined (BCM_TRIDENT3_SUPPORT) 4185 if (SOC_IS_TRIDENT3X(unit)){ 4186 mem_tab = EGR_DVP_ATTRIBUTEm; 4187 } else 4188 #endif 4189 { 4190 mem_tab = EGR_DVP_ATTRIBUTE_1m; 4191 } 4192 rv = _bcm_esw_stat_flex_create_egress_table_counters( 4193 unit, mem_tab, FIRST_LKUP, object,mode, 4194 &base_index, &pool_number); 4195 break; 4196 case bcmStatObjectEgrL3Nat: 4197 rv = _bcm_esw_stat_flex_create_egress_table_counters( 4198 unit, EGR_NAT_PACKET_EDIT_INFOm, FIRST_LKUP, object,mode, 4199 &base_index, &pool_number); 4200 break; 4201 case bcmStatObjectEgrFieldStageEgress: 4202 rv = _bcm_esw_stat_flex_create_egress_table_counters( 4203 unit, EFP_POLICY_TABLEm, FIRST_LKUP, object,mode, 4204 &base_index, &pool_number); 4205 break; 4206 case bcmStatObjectEgrMplsTunnelLabel: 4207 rv = _bcm_esw_stat_flex_create_egress_table_counters( 4208 unit, EGR_IP_TUNNEL_MPLSm, FIRST_LKUP, object,mode, 4209 &base_index, &pool_number); 4210 break; 4211 case bcmStatObjectEgrMplsTunnelSecondLabel: 4212 #if defined(BCM_APACHE_SUPPORT) 4213 if (soc_feature(unit, soc_feature_multi_tunnel_label_count)) { 4214 rv = _bcm_esw_stat_flex_create_egress_table_counters( 4215 unit, EGR_IP_TUNNEL_MPLSm, SECOND_LKUP, object,mode, 4216 &base_index, &pool_number); 4217 } else 4218 #endif 4219 { 4220 rv = BCM_E_PARAM; 4221 } 4222 break; 4223 default: 4224 switch ((int32)object) { 4225 case bcmIntStatObjectEgrLatencyMonitor0: 4226 rv = _bcm_esw_stat_flex_create_egress_table_counters( 4227 unit, EGR_HISTO_MON_0_Q_LATENCY_LIMIT_SELm, FIRST_LKUP, object,mode, 4228 &base_index,&pool_number); 4229 break; 4230 case bcmIntStatObjectEgrLatencyMonitor1: 4231 rv = _bcm_esw_stat_flex_create_egress_table_counters( 4232 unit, EGR_HISTO_MON_1_Q_LATENCY_LIMIT_SELm, FIRST_LKUP, object,mode, 4233 &base_index,&pool_number); 4234 break; 4235 case bcmIntStatObjectEgrLatencyMonitor2: 4236 rv = _bcm_esw_stat_flex_create_egress_table_counters( 4237 unit, EGR_HISTO_MON_2_Q_LATENCY_LIMIT_SELm, FIRST_LKUP, object,mode, 4238 &base_index,&pool_number); 4239 break; 4240 case bcmIntStatObjectEgrLatencyMonitor3: 4241 rv = _bcm_esw_stat_flex_create_egress_table_counters( 4242 unit, EGR_HISTO_MON_3_Q_LATENCY_LIMIT_SELm, FIRST_LKUP, object,mode, 4243 &base_index,&pool_number); 4244 break; 4245 default: 4246 rv = BCM_E_PARAM; 4247 break; 4248 } 4249 4250 if (BCM_SUCCESS(rv)) { 4251 for (counter_index = 0;counter_index<BCM_STAT_FLEX_MAX_COUNTERS_PER_MODE;counter_index++) { 4252 egr_attr->uncmprsd_attr_selectors. 4253 offset_table_map[counter_index].offset = 0; 4254 egr_attr->uncmprsd_attr_selectors. 4255 offset_table_map[counter_index].count_enable = 1; 4256 } 4257 rv = _bcm_esw_stat_flex_update_offset_table(unit, attr->direction=bcmStatFlexDirectionEgress, 4258 EGR_FLEX_CTR_OFFSET_TABLE_0m+pool_number, 4259 mode, BCM_STAT_FLEX_MAX_COUNTERS_PER_MODE, 4260 egr_attr->uncmprsd_attr_selectors.offset_table_map); 4261 } 4262 break; 4263 } 4264 } 4265 /* Cleanup activity ... */ 4266 sal_free(attr); 4267 if (BCM_FAILURE(rv)) { 4268 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 4269 (BSL_META_U(unit, 4270 "creation of counters failed..\n"))); 4271 } else { 4272 _bcm_esw_stat_get_counter_id(unit, group_mode, object, mode, 4273 pool_number, base_index, stat_counter_id); 4274 LOG_DEBUG(BSL_LS_BCM_FLEXCTR, 4275 (BSL_META_U(unit, 4276 "Create: mode:%d group_mode:%d pool:%d object:%d" 4277 " base:%d\n stat_counter_id:%d\n"), 4278 mode, group_mode, pool_number, object, base_index, 4279 *stat_counter_id)); 4280 #if defined(BCM_TRIDENT2_SUPPORT) 4281 if (SOC_IS_TRIDENT2X(unit) && 4282 soc_feature(unit, soc_feature_advanced_flex_counter)) { 4283 _flex_stat_mode_base_map[unit][direction] 4284 [pool_number][mode][base_index] = 1; 4285 } 4286 #endif 4287 *num_entries = total_counters; 4288 } 4289 return rv; 4290 } 4291 /* 4292 * Function: 4293 * _bcm_esw_stat_group_destroy 4294 * Description: 4295 * Release HW counter resources as per given counter id and makes system 4296 * unavailable for any further stat collection action 4297 * Parameters: 4298 * unit - (IN) unit number 4299 * Stat_counter_id - (IN) Stat Counter Id 4300 * Return Value: 4301 * BCM_E_XXX 4302 * Notes: 4303 */ 4304 bcm_error_t _bcm_esw_stat_group_destroy( 4305 int unit, 4306 uint32 stat_counter_id) 4307 { 4308 bcm_error_t rv=BCM_E_NONE; 4309 uint32 pool_number=0; 4310 uint32 base_index=0; 4311 bcm_stat_flex_mode_t offset_mode=0; 4312 bcm_stat_object_t object=bcmStatObjectIngPort; 4313 bcm_stat_group_mode_t group_mode= bcmStatGroupModeSingle; 4314 bcm_stat_flex_direction_t direction=bcmStatFlexDirectionIngress; 4315 soc_mem_t ingress_table; 4316 soc_mem_t mem_tab; 4317 uint32 max_mode = BCM_STAT_FLEX_CUSTOM_INGRESS_COUNTER_MAX_MODE; 4318 4319 #ifdef BCM_TOMAHAWK_SUPPORT 4320 bcm_field_qualify_t field_stage; 4321 if (SOC_IS_TOMAHAWKX(unit) || SOC_IS_TRIDENT3X(unit)) { 4322 if ((stat_counter_id > BCM_MAX_STAT_COUNTER_IDS) || 4323 (stat_counter_id <= 0)) { 4324 return BCM_E_PARAM; 4325 } else if (stat_counter_map[unit][stat_counter_id].used == 0) { 4326 return BCM_E_NOT_FOUND; 4327 } 4328 } 4329 #endif 4330 #ifdef BCM_TRIDENT3_SUPPORT 4331 if (SOC_IS_TRIDENT3X(unit)) { 4332 max_mode = BCM_STAT_FLEX_CUSTOM_EGRESS_COUNTER_MAX_MODE; 4333 } 4334 #endif 4335 4336 if (!soc_feature(unit,soc_feature_advanced_flex_counter)) { 4337 return BCM_E_UNAVAIL; 4338 } 4339 _bcm_esw_stat_get_counter_id_info(unit, stat_counter_id,&group_mode,&object, 4340 &offset_mode,&pool_number,&base_index); 4341 LOG_DEBUG(BSL_LS_BCM_FLEXCTR, 4342 (BSL_META_U(unit, 4343 "Deleting : mode:%d group_mode:%d pool:%d object:%d" 4344 "base:%d\n stat_counter_id:%d\n"),offset_mode,group_mode, 4345 pool_number,object,base_index,stat_counter_id)); 4346 4347 BCM_IF_ERROR_RETURN(_bcm_esw_stat_validate_object(unit,object,&direction)); 4348 BCM_IF_ERROR_RETURN(_bcm_esw_stat_validate_group(unit,group_mode)); 4349 4350 if (offset_mode > (BCM_STAT_FLEX_COUNTER_MAX_MODE-1)) { 4351 if ((SOC_IS_TOMAHAWKX(unit) || SOC_IS_TRIDENT3X(unit)) && 4352 (offset_mode > max_mode)) { 4353 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 4354 (BSL_META_U(unit, 4355 "Invalid flex counter mode value %d \n"), 4356 offset_mode)); 4357 return BCM_E_PARAM; 4358 } else if (!(SOC_IS_TOMAHAWKX(unit) || SOC_IS_TRIDENT3X(unit))){ 4359 return BCM_E_PARAM; 4360 } 4361 } 4362 switch((int32)object) { 4363 /* Ingress Side */ 4364 case bcmStatObjectIngPort: 4365 #if defined (BCM_TRIDENT3_SUPPORT) 4366 if (SOC_IS_TRIDENT3X(unit)){ 4367 mem_tab = LPORT_TABm; 4368 } else 4369 #endif 4370 { 4371 mem_tab = PORT_TABm; 4372 } 4373 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4374 unit, mem_tab, FIRST_LKUP, object, offset_mode, 4375 base_index, pool_number); 4376 break; 4377 case bcmStatObjectIngVlan: 4378 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4379 unit, VLAN_TABm, FIRST_LKUP, object,offset_mode, 4380 base_index,pool_number); 4381 break; 4382 case bcmStatObjectIngVlanXlate: 4383 #if defined (BCM_TRIDENT3_SUPPORT) 4384 if (SOC_IS_TRIDENT3X(unit)){ 4385 mem_tab = VLAN_XLATE_1_DOUBLEm; 4386 } else 4387 #endif 4388 { 4389 mem_tab = VLAN_XLATEm; 4390 } 4391 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4392 unit, mem_tab, FIRST_LKUP, object, offset_mode, 4393 base_index, pool_number); 4394 break; 4395 case bcmStatObjectIngVlanXlateSecondLookup: 4396 #if defined(BCM_TRIDENT2PLUS_SUPPORT) 4397 if (soc_feature(unit,soc_feature_ing_vlan_xlate_second_lookup)) { 4398 #if defined (BCM_TRIDENT3_SUPPORT) 4399 if (SOC_IS_TRIDENT3X(unit)){ 4400 mem_tab = VLAN_XLATE_1_DOUBLEm; 4401 } else 4402 #endif 4403 { 4404 mem_tab = VLAN_XLATEm; 4405 } 4406 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4407 unit, mem_tab, SECOND_LKUP, object,offset_mode, 4408 base_index,pool_number); 4409 } else 4410 #endif 4411 { 4412 rv = BCM_E_PARAM; 4413 } 4414 break; 4415 case bcmStatObjectIngVfi: 4416 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4417 unit, VFIm, FIRST_LKUP, object,offset_mode, 4418 base_index,pool_number); 4419 break; 4420 case bcmStatObjectIngL3Intf: 4421 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4422 unit, L3_IIFm, FIRST_LKUP, object,offset_mode, 4423 base_index,pool_number); 4424 break; 4425 case bcmStatObjectIngVrf: 4426 #if defined (BCM_TRIDENT3_SUPPORT) 4427 if (SOC_IS_TRIDENT3X(unit)){ 4428 mem_tab = VRF_ATTRS_2m; 4429 } else 4430 #endif 4431 { 4432 mem_tab = VRFm; 4433 } 4434 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4435 unit, mem_tab, FIRST_LKUP, object,offset_mode, 4436 base_index,pool_number); 4437 break; 4438 case bcmStatObjectIngPolicy: 4439 ingress_table = VFP_POLICY_TABLEm; 4440 #ifdef BCM_TOMAHAWK_SUPPORT 4441 if (soc_feature(unit,soc_feature_stat_multi_pipe_support)) { 4442 int pipe_num = 0; 4443 if (!_bcm_esw_get_fp_mode_global(unit, bcmFieldQualifyStageLookup) && 4444 (offset_mode < BCM_STAT_FLEX_CUSTOM_INGRESS_COUNTER_MAX_MODE) && 4445 (offset_mode >= BCM_CUSTOM_INGRESS_MODE_START)) { 4446 _bcm_esw_get_fp_pipe_from_mode(unit, offset_mode, 4447 bcmFieldQualifyStageLookup, &pipe_num); 4448 _bcm_esw_get_ingress_vfp_table_from_pipe(pipe_num, &ingress_table); 4449 if (BCM_FAILURE(rv)) { 4450 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 4451 (BSL_META_U(unit, 4452 "cannot get pipe info %d.\n"), pipe_num)); 4453 } 4454 } 4455 } 4456 #endif 4457 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4458 unit, ingress_table, FIRST_LKUP, object,offset_mode, 4459 base_index,pool_number); 4460 break; 4461 case bcmStatObjectIngNiv: 4462 case bcmStatObjectIngMplsVcLabel: 4463 case bcmStatObjectIngGport: 4464 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4465 unit, SOURCE_VPm, FIRST_LKUP, object,offset_mode, 4466 base_index,pool_number); 4467 break; 4468 case bcmStatObjectIngMplsSwitchLabel: 4469 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4470 unit, MPLS_ENTRYm, FIRST_LKUP, object, offset_mode, 4471 base_index, pool_number); 4472 break; 4473 case bcmStatObjectIngMplsSwitchSecondLabel: 4474 #if defined(BCM_APACHE_SUPPORT) 4475 if (soc_feature(unit, 4476 soc_feature_mpls_entry_second_label_lookup)) { 4477 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4478 unit, MPLS_ENTRYm, SECOND_LKUP, object,offset_mode, 4479 base_index,pool_number); 4480 } else 4481 #endif 4482 { 4483 rv = BCM_E_PARAM; 4484 } 4485 break; 4486 case bcmStatObjectIngMplsFrrLabel: 4487 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4488 unit, L3_TUNNELm, FIRST_LKUP, object,offset_mode, 4489 base_index,pool_number); 4490 break; 4491 case bcmStatObjectIngL3Host: 4492 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4493 unit, EXT_IPV4_UCAST_WIDEm, FIRST_LKUP, object,offset_mode, 4494 base_index,pool_number); 4495 break; 4496 case bcmStatObjectIngTrill: 4497 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4498 unit, MPLS_ENTRY_EXTDm, FIRST_LKUP, object,offset_mode, 4499 base_index,pool_number); 4500 break; 4501 case bcmStatObjectIngMimLookupId: 4502 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4503 unit, MPLS_ENTRY_EXTDm, FIRST_LKUP, object,offset_mode, 4504 base_index,pool_number); 4505 break; 4506 case bcmStatObjectIngL2Gre: 4507 /* To Be Completed..SOURCE_VPm, VLAN_XLATE_1m L2GRE_DIP view */ 4508 #if defined (BCM_TRIDENT3_SUPPORT) 4509 if (SOC_IS_TRIDENT3X(unit)){ 4510 mem_tab = VLAN_XLATE_1_DOUBLEm; 4511 } else 4512 #endif 4513 { 4514 mem_tab = VLAN_XLATEm; 4515 } 4516 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4517 unit, mem_tab, FIRST_LKUP, object, offset_mode, 4518 base_index, pool_number); 4519 break; 4520 case bcmStatObjectIngEXTPolicy: 4521 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4522 unit, EXT_FP_POLICYm, FIRST_LKUP, object, offset_mode, 4523 base_index, pool_number); 4524 break; 4525 case bcmStatObjectIngVxlan: 4526 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4527 unit, SOURCE_VPm, FIRST_LKUP, object, offset_mode, 4528 base_index, pool_number); 4529 break; 4530 case bcmStatObjectIngVsan: 4531 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4532 unit, ING_VSANm, FIRST_LKUP, object,offset_mode, 4533 base_index, pool_number); 4534 break; 4535 case bcmStatObjectIngFcoe: 4536 #if defined (BCM_TRIDENT3_SUPPORT) 4537 if (SOC_IS_TRIDENT3X(unit)){ 4538 mem_tab = L3_ENTRY_DOUBLEm; 4539 } else 4540 #endif 4541 { 4542 mem_tab = L3_ENTRY_IPV4_MULTICASTm; 4543 } 4544 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4545 unit, mem_tab, FIRST_LKUP, object, offset_mode, 4546 base_index, pool_number); 4547 break; 4548 case bcmStatObjectIngL3Route: 4549 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4550 unit, L3_DEFIPm, FIRST_LKUP, object, offset_mode, 4551 base_index, pool_number); 4552 break; 4553 case bcmStatObjectIngIpmc: 4554 #if defined (BCM_TRIDENT3_SUPPORT) 4555 if (SOC_IS_TRIDENT3X(unit)){ 4556 mem_tab = L3_ENTRY_DOUBLEm; 4557 } else 4558 #endif 4559 { 4560 mem_tab = L3_ENTRY_IPV4_MULTICASTm; 4561 } 4562 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4563 unit, mem_tab, FIRST_LKUP, object, offset_mode, 4564 base_index, pool_number); 4565 break; 4566 case bcmStatObjectIngVxlanDip: 4567 #if defined (BCM_TRIDENT3_SUPPORT) 4568 if (SOC_IS_TRIDENT3X(unit)){ 4569 mem_tab = VLAN_XLATE_1_DOUBLEm; 4570 } else 4571 #endif 4572 { 4573 mem_tab = VLAN_XLATEm; 4574 } 4575 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4576 unit, mem_tab, FIRST_LKUP, object, offset_mode, 4577 base_index, pool_number); 4578 break; 4579 case bcmStatObjectIngExactMatch: 4580 case bcmStatObjectIngFieldStageIngress: 4581 if (object == bcmStatObjectIngFieldStageIngress) { 4582 ingress_table = IFP_POLICY_TABLEm; 4583 } else { 4584 ingress_table = EXACT_MATCH_2m; 4585 } 4586 #ifdef BCM_TOMAHAWK_SUPPORT 4587 if (soc_feature(unit,soc_feature_stat_multi_pipe_support)) { 4588 int pipe_num = 0; 4589 field_stage = _bcm_esw_stat_get_field_stage_from_table(ingress_table); 4590 if (!_bcm_esw_get_fp_mode_global(unit, bcmFieldQualifyStageIngress) && 4591 (offset_mode < BCM_STAT_FLEX_CUSTOM_INGRESS_COUNTER_MAX_MODE) && 4592 (offset_mode >= BCM_CUSTOM_INGRESS_MODE_START)) { 4593 _bcm_esw_get_fp_pipe_from_mode(unit, offset_mode, 4594 field_stage, &pipe_num); 4595 if (pipe_num >= 0) { 4596 _bcm_esw_get_ingress_ifp_table_from_pipe(pipe_num, &ingress_table); 4597 if (BCM_FAILURE(rv)) { 4598 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 4599 (BSL_META_U(unit, 4600 "cannot get pipe info %d.\n"), pipe_num)); 4601 } 4602 } 4603 } 4604 } 4605 #endif 4606 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4607 unit, ingress_table, FIRST_LKUP, object, offset_mode, 4608 base_index, pool_number); 4609 break; 4610 case bcmIntStatObjectIngAgm: 4611 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4612 unit, AGM_MONITOR_TABLEm, FIRST_LKUP, object, offset_mode, 4613 base_index, pool_number); 4614 break; 4615 case bcmIntStatObjectIngAgmSecondLookup: 4616 rv = _bcm_esw_stat_flex_destroy_ingress_table_counters( 4617 unit, AGM_MONITOR_TABLEm, SECOND_LKUP, object, offset_mode, 4618 base_index, pool_number); 4619 break; 4620 4621 /* Egress Side */ 4622 case bcmStatObjectEgrPort: 4623 #if defined (BCM_TRIDENT3_SUPPORT) 4624 if (SOC_IS_TRIDENT3X(unit)){ 4625 mem_tab = EGR_LPORT_PROFILEm; 4626 } else 4627 #endif 4628 { 4629 mem_tab = EGR_PORTm; 4630 } 4631 rv = _bcm_esw_stat_flex_destroy_egress_table_counters( 4632 unit, mem_tab, FIRST_LKUP, object, offset_mode, 4633 base_index, pool_number); 4634 break; 4635 case bcmStatObjectEgrVlan: 4636 rv = _bcm_esw_stat_flex_destroy_egress_table_counters( 4637 unit, EGR_VLANm, FIRST_LKUP, object,offset_mode, 4638 base_index,pool_number); 4639 break; 4640 case bcmStatObjectEgrVlanXlate: 4641 #if defined (BCM_TRIDENT3_SUPPORT) 4642 if (SOC_IS_TRIDENT3X(unit)){ 4643 mem_tab = EGR_VLAN_XLATE_1_DOUBLEm; 4644 } else 4645 #endif 4646 { 4647 mem_tab = EGR_VLAN_XLATEm; 4648 } 4649 rv = _bcm_esw_stat_flex_destroy_egress_table_counters( 4650 unit, mem_tab, FIRST_LKUP, object, offset_mode, 4651 base_index, pool_number); 4652 break; 4653 case bcmStatObjectEgrVlanXlateSecondLookup: 4654 #if defined(BCM_APACHE_SUPPORT) || defined (BCM_TRIDENT3_SUPPORT) 4655 if (soc_feature(unit, soc_feature_egr_vlan_xlate_second_lookup)) { 4656 #if defined (BCM_TRIDENT3_SUPPORT) 4657 if (SOC_IS_TRIDENT3X(unit)){ 4658 mem_tab = EGR_VLAN_XLATE_1_DOUBLEm; 4659 } else 4660 #endif 4661 { 4662 mem_tab = EGR_VLAN_XLATEm; 4663 } 4664 rv = _bcm_esw_stat_flex_destroy_egress_table_counters( 4665 unit, mem_tab, SECOND_LKUP, object,offset_mode, 4666 base_index,pool_number); 4667 } else 4668 #endif 4669 { 4670 rv = BCM_E_PARAM; 4671 } 4672 break; 4673 case bcmStatObjectEgrVfi: 4674 rv = _bcm_esw_stat_flex_destroy_egress_table_counters( 4675 unit, EGR_VFIm, FIRST_LKUP, object,offset_mode, 4676 base_index,pool_number); 4677 break; 4678 case bcmStatObjectEgrNiv: 4679 case bcmStatObjectEgrL3Intf: 4680 rv = _bcm_esw_stat_flex_destroy_egress_table_counters( 4681 unit, EGR_L3_NEXT_HOPm, FIRST_LKUP, object,offset_mode, 4682 base_index,pool_number); 4683 break; 4684 case bcmStatObjectEgrWlan: 4685 rv = _bcm_esw_stat_flex_destroy_egress_table_counters( 4686 unit, EGR_L3_NEXT_HOPm, FIRST_LKUP, object,offset_mode, 4687 base_index,pool_number); 4688 break; 4689 case bcmStatObjectEgrMim: 4690 rv = _bcm_esw_stat_flex_destroy_egress_table_counters( 4691 unit, EGR_L3_NEXT_HOPm, FIRST_LKUP, object,offset_mode, 4692 base_index,pool_number); 4693 break; 4694 case bcmStatObjectEgrMimLookupId: 4695 #if defined (BCM_TRIDENT3_SUPPORT) 4696 if (SOC_IS_TRIDENT3X(unit)){ 4697 mem_tab = EGR_VLAN_XLATE_1_DOUBLEm; 4698 } else 4699 #endif 4700 { 4701 mem_tab = EGR_VLAN_XLATEm; 4702 } 4703 rv = _bcm_esw_stat_flex_destroy_egress_table_counters( 4704 unit, mem_tab, FIRST_LKUP, object, offset_mode, 4705 base_index, pool_number); 4706 break; 4707 case bcmStatObjectEgrL2Gre: 4708 #if defined (BCM_TRIDENT3_SUPPORT) 4709 if (SOC_IS_TRIDENT3X(unit)){ 4710 mem_tab = EGR_DVP_ATTRIBUTEm; 4711 } else 4712 #endif 4713 { 4714 mem_tab = EGR_DVP_ATTRIBUTE_1m; 4715 } 4716 rv = _bcm_esw_stat_flex_destroy_egress_table_counters( 4717 unit, mem_tab, FIRST_LKUP, object, offset_mode, 4718 base_index, pool_number); 4719 break; 4720 case bcmStatObjectEgrVxlan: 4721 #if defined (BCM_TRIDENT3_SUPPORT) 4722 if (SOC_IS_TRIDENT3X(unit)){ 4723 mem_tab = EGR_DVP_ATTRIBUTEm; 4724 } else 4725 #endif 4726 { 4727 mem_tab = EGR_DVP_ATTRIBUTE_1m; 4728 } 4729 rv = _bcm_esw_stat_flex_destroy_egress_table_counters( 4730 unit, mem_tab, FIRST_LKUP, object, offset_mode, 4731 base_index, pool_number); 4732 break; 4733 case bcmStatObjectEgrL3Nat: 4734 rv = _bcm_esw_stat_flex_destroy_egress_table_counters( 4735 unit, EGR_NAT_PACKET_EDIT_INFOm, FIRST_LKUP, object, offset_mode, 4736 base_index, pool_number); 4737 break; 4738 case bcmStatObjectEgrFieldStageEgress: 4739 mem_tab = EFP_POLICY_TABLEm; 4740 #ifdef BCM_TRIDENT3_SUPPORT 4741 if (soc_feature(unit,soc_feature_stat_egr_multi_pipe_support)) { 4742 int pipe_num = 0; 4743 field_stage = _bcm_esw_stat_get_field_stage_from_table(mem_tab); 4744 if (!_bcm_esw_get_fp_mode_global(unit, bcmFieldQualifyStageEgress) && 4745 (offset_mode < BCM_STAT_FLEX_CUSTOM_EGRESS_COUNTER_MAX_MODE) && 4746 (offset_mode >= BCM_CUSTOM_EGRESS_MODE_START)) { 4747 _bcm_esw_get_fp_pipe_from_mode(unit, offset_mode, 4748 field_stage, &pipe_num); 4749 if (pipe_num >= 0) { 4750 _bcm_esw_get_egr_fp_table_from_pipe(pipe_num, &mem_tab); 4751 } 4752 } 4753 } 4754 #endif 4755 rv = _bcm_esw_stat_flex_destroy_egress_table_counters( 4756 unit, mem_tab, FIRST_LKUP, object, offset_mode, 4757 base_index, pool_number); 4758 break; 4759 case bcmStatObjectEgrMplsTunnelLabel: 4760 rv = _bcm_esw_stat_flex_destroy_egress_table_counters( 4761 unit, EGR_IP_TUNNEL_MPLSm, FIRST_LKUP, object, offset_mode, 4762 base_index, pool_number); 4763 break; 4764 case bcmStatObjectEgrMplsTunnelSecondLabel: 4765 #if defined(BCM_APACHE_SUPPORT) 4766 if (soc_feature(unit, soc_feature_multi_tunnel_label_count)) { 4767 rv = _bcm_esw_stat_flex_destroy_egress_table_counters( 4768 unit, EGR_IP_TUNNEL_MPLSm, SECOND_LKUP, object, offset_mode, 4769 base_index, pool_number); 4770 } else 4771 #endif 4772 { 4773 rv = BCM_E_PARAM; 4774 } 4775 break; 4776 default: 4777 switch((int32)object) { 4778 case bcmIntStatObjectEgrLatencyMonitor0: 4779 rv = _bcm_esw_stat_flex_destroy_egress_table_counters( 4780 unit, EGR_HISTO_MON_0_Q_LATENCY_LIMIT_SELm, FIRST_LKUP, object, offset_mode, 4781 base_index, pool_number); 4782 break; 4783 case bcmIntStatObjectEgrLatencyMonitor1: 4784 rv = _bcm_esw_stat_flex_destroy_egress_table_counters( 4785 unit, EGR_HISTO_MON_1_Q_LATENCY_LIMIT_SELm, FIRST_LKUP, object, offset_mode, 4786 base_index, pool_number); 4787 break; 4788 case bcmIntStatObjectEgrLatencyMonitor2: 4789 rv = _bcm_esw_stat_flex_destroy_egress_table_counters( 4790 unit, EGR_HISTO_MON_2_Q_LATENCY_LIMIT_SELm, FIRST_LKUP, object, offset_mode, 4791 base_index, pool_number); 4792 break; 4793 case bcmIntStatObjectEgrLatencyMonitor3: 4794 rv = _bcm_esw_stat_flex_destroy_egress_table_counters( 4795 unit, EGR_HISTO_MON_3_Q_LATENCY_LIMIT_SELm, FIRST_LKUP, object, offset_mode, 4796 base_index, pool_number); 4797 break; 4798 default: 4799 rv = BCM_E_PARAM; 4800 break; 4801 } 4802 break; 4803 } 4804 if (BCM_SUCCESS(rv)) { 4805 #if defined(BCM_TRIDENT2_SUPPORT) 4806 if (SOC_IS_TRIDENT2X(unit) && 4807 soc_feature(unit, soc_feature_advanced_flex_counter)) { 4808 _flex_stat_mode_base_map[unit][direction] 4809 [pool_number][offset_mode][base_index] = 0; 4810 } 4811 #endif 4812 LOG_DEBUG(BSL_LS_BCM_FLEXCTR, 4813 (BSL_META_U(unit, 4814 "Destroyed %s table counters.." 4815 "Trying to delete group mode itself \n"), 4816 bcmStatFlexDirectionIngress == direction ? 4817 "ingress" : "egress")); 4818 /* No decision on return values as actual call is successful */ 4819 if (direction == bcmStatFlexDirectionIngress) { 4820 if ((offset_mode < BCM_STAT_FLEX_CUSTOM_INGRESS_COUNTER_MAX_MODE) && 4821 (offset_mode >= BCM_CUSTOM_INGRESS_MODE_START)) { 4822 _bcm_esw_stat_group_mode_id_destroy(unit, offset_mode); 4823 } else if (group_mode < bcmStatGroupModeCount) { 4824 4825 /* For Adjustable mode counters, mode id is deleted when an 4826 * explicit call is made. 4827 * Do not delete mode used by flowtracker. 4828 */ 4829 if ( 4830 #if defined (BCM_TOMAHAWK_SUPPORT) && defined (INCLUDE_FLOWTRACKER) 4831 (!( soc_feature(unit, soc_feature_uc_flowtracker_learn) && 4832 soc_feature(unit, soc_feature_uc_flowtracker_export) 4833 && _bcm_esw_stat_mod_reserved(unit, offset_mode))) && 4834 #endif 4835 ( _bcm_esw_stat_flex_delete_ingress_mode( 4836 unit,offset_mode) == BCM_E_NONE) 4837 ) { 4838 LOG_DEBUG(BSL_LS_BCM_FLEXCTR, 4839 (BSL_META_U(unit, 4840 "Destroyed Ingress Mode also \n"))); 4841 _bcm_esw_stat_flex_reset_group_mode( 4842 unit,bcmStatFlexDirectionIngress, 4843 offset_mode,group_mode); 4844 } 4845 } 4846 #ifdef BCM_TOMAHAWK_SUPPORT 4847 if (SOC_IS_TOMAHAWKX(unit) ||SOC_IS_TRIDENT3X(unit)) { 4848 if((stat_counter_map[unit]) != NULL) { 4849 stat_counter_map[unit][stat_counter_id].used = 0; 4850 #if 0 4851 sal_free(stat_counter_map[unit][stat_counter_id]); 4852 stat_counter_map[unit][stat_counter_id] = NULL; 4853 #endif 4854 } 4855 } 4856 #endif 4857 } else { 4858 if ((offset_mode < BCM_STAT_FLEX_CUSTOM_EGRESS_COUNTER_MAX_MODE) && 4859 (offset_mode >= BCM_CUSTOM_EGRESS_MODE_START)) { 4860 _bcm_esw_stat_group_mode_id_destroy(unit, offset_mode); 4861 } else if (group_mode < bcmStatGroupModeCount) { 4862 if (_bcm_esw_stat_flex_delete_egress_mode( 4863 unit,offset_mode) == BCM_E_NONE) { 4864 LOG_DEBUG(BSL_LS_BCM_FLEXCTR, 4865 (BSL_META_U(unit, 4866 "Destroyed Egress Mode also \n"))); 4867 _bcm_esw_stat_flex_reset_group_mode( 4868 unit,bcmStatFlexDirectionEgress, 4869 offset_mode,group_mode); 4870 } 4871 } 4872 #ifdef BCM_TRIDENT3_SUPPORT 4873 if (SOC_IS_TRIDENT3X(unit)) { 4874 if((stat_counter_map[unit]) != NULL) { 4875 stat_counter_map[unit][stat_counter_id].used = 0; 4876 } 4877 } 4878 #endif 4879 } 4880 } 4881 4882 return rv; 4883 } 4884 /* 4885 * Function: 4886 * _bcm_esw_stat_flex_init_pkt_attr_bits 4887 * Description: 4888 * Initialize All Packet attr bits. 4889 * 4890 * Parameters: 4891 * unit - (IN) unit number 4892 * Return Value: 4893 * BCM_E_XXX 4894 * Notes: 4895 */ 4896 void _bcm_esw_stat_flex_init_pkt_attr_bits(int unit) 4897 { 4898 int offset_adj = 0; 4899 4900 if (SOC_IS_TD2_TT2(unit)) { 4901 int next_pos = 0; 4902 4903 /* Egress bits initialization */ 4904 egr_pkt_attr_uncmprsd_bits_g[unit].ip_pkt = 1; 4905 egr_pkt_attr_uncmprsd_bits_g[unit].ip_pkt_pos = next_pos; 4906 egr_pkt_attr_uncmprsd_bits_g[unit].ip_pkt_mask = 4907 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].ip_pkt) - 1; 4908 next_pos += egr_pkt_attr_uncmprsd_bits_g[unit].ip_pkt; 4909 4910 egr_pkt_attr_uncmprsd_bits_g[unit].drop = 1; 4911 egr_pkt_attr_uncmprsd_bits_g[unit].drop_pos = next_pos; 4912 egr_pkt_attr_uncmprsd_bits_g[unit].drop_mask = 4913 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].drop) - 1; 4914 next_pos += egr_pkt_attr_uncmprsd_bits_g[unit].drop; 4915 4916 egr_pkt_attr_uncmprsd_bits_g[unit].dvp_type = 4917 (soc_feature(unit, soc_feature_multiple_split_horizon_group)) ? 3 : 1; 4918 egr_pkt_attr_uncmprsd_bits_g[unit].dvp_type_pos = next_pos; 4919 egr_pkt_attr_uncmprsd_bits_g[unit].dvp_type_mask = 4920 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].dvp_type) - 1; 4921 next_pos += egr_pkt_attr_uncmprsd_bits_g[unit].dvp_type; 4922 4923 egr_pkt_attr_uncmprsd_bits_g[unit].svp_type = 4924 (soc_feature(unit, soc_feature_multiple_split_horizon_group)) ? 3 : 1; 4925 egr_pkt_attr_uncmprsd_bits_g[unit].svp_type_pos = next_pos; 4926 egr_pkt_attr_uncmprsd_bits_g[unit].svp_type_mask = 4927 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].svp_type) - 1; 4928 next_pos += egr_pkt_attr_uncmprsd_bits_g[unit].svp_type; 4929 4930 egr_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution = 1; 4931 egr_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution_pos = next_pos; 4932 egr_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution_mask = 4933 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution) - 1; 4934 next_pos += egr_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution; 4935 4936 egr_pkt_attr_uncmprsd_bits_g[unit].tos_ecn = 2; 4937 egr_pkt_attr_uncmprsd_bits_g[unit].tos_ecn_pos = next_pos; 4938 egr_pkt_attr_uncmprsd_bits_g[unit].tos_ecn_mask = 4939 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].tos_ecn) - 1; 4940 next_pos += egr_pkt_attr_uncmprsd_bits_g[unit].tos_ecn; 4941 4942 egr_pkt_attr_uncmprsd_bits_g[unit].tos_dscp = 6; 4943 egr_pkt_attr_uncmprsd_bits_g[unit].tos_dscp_pos = next_pos; 4944 egr_pkt_attr_uncmprsd_bits_g[unit].tos_dscp_mask = 4945 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].tos_dscp) - 1; 4946 next_pos += egr_pkt_attr_uncmprsd_bits_g[unit].tos_dscp; 4947 4948 if (SOC_IS_TOMAHAWKX(unit) || SOC_IS_TRIDENT3X(unit)) { 4949 egr_pkt_attr_uncmprsd_bits_g[unit].egr_port = 8; /* For TH, TD3 8 bits */ 4950 } else { 4951 egr_pkt_attr_uncmprsd_bits_g[unit].egr_port = 7; /* For KT2,TR3 6 bits */ 4952 } 4953 egr_pkt_attr_uncmprsd_bits_g[unit].egr_port_pos = next_pos; 4954 egr_pkt_attr_uncmprsd_bits_g[unit].egr_port_mask = 4955 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].egr_port) - 1; 4956 next_pos += egr_pkt_attr_uncmprsd_bits_g[unit].egr_port; 4957 4958 egr_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p = 3; 4959 egr_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p_pos = next_pos; 4960 egr_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p_mask = 4961 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p) - 1; 4962 next_pos += egr_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p; 4963 4964 egr_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p = 3; 4965 egr_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p_pos = next_pos; 4966 egr_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p_mask = 4967 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p) - 1; 4968 next_pos += egr_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p; 4969 4970 egr_pkt_attr_uncmprsd_bits_g[unit].vlan_format = 2; 4971 egr_pkt_attr_uncmprsd_bits_g[unit].vlan_format_pos = next_pos; 4972 egr_pkt_attr_uncmprsd_bits_g[unit].vlan_format_mask = 4973 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].vlan_format) - 1; 4974 next_pos += egr_pkt_attr_uncmprsd_bits_g[unit].vlan_format; 4975 4976 egr_pkt_attr_uncmprsd_bits_g[unit].int_pri = 4; 4977 egr_pkt_attr_uncmprsd_bits_g[unit].int_pri_pos = next_pos; 4978 egr_pkt_attr_uncmprsd_bits_g[unit].int_pri_mask = 4979 (1 << egr_pkt_attr_uncmprsd_bits_g[unit].int_pri) - 1; 4980 next_pos += egr_pkt_attr_uncmprsd_bits_g[unit].int_pri; 4981 4982 egr_pkt_attr_uncmprsd_bits_g[unit].cng = 2; 4983 egr_pkt_attr_uncmprsd_bits_g[unit].cng_pos = next_pos; 4984 egr_pkt_attr_uncmprsd_bits_g[unit].cng_mask = (1 << egr_pkt_attr_uncmprsd_bits_g[unit].cng) - 1; 4985 #ifdef BCM_APACHE_SUPPORT 4986 /* Added support for 3 Label Mpls Attr Counting */ 4987 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 4988 next_pos += egr_pkt_attr_uncmprsd_bits_g[unit].cng; 4989 4990 egr_pkt_attr_uncmprsd_bits_g[unit].phb_1 = 4; 4991 egr_pkt_attr_uncmprsd_bits_g[unit].phb_1_pos = next_pos; 4992 egr_pkt_attr_uncmprsd_bits_g[unit].phb_1_mask = 4993 (1 << egr_pkt_attr_uncmprsd_bits_g[unit].phb_1) - 1; 4994 next_pos += egr_pkt_attr_uncmprsd_bits_g[unit].phb_1; 4995 4996 egr_pkt_attr_uncmprsd_bits_g[unit].cng_1 = 2; 4997 egr_pkt_attr_uncmprsd_bits_g[unit].cng_1_pos = next_pos; 4998 egr_pkt_attr_uncmprsd_bits_g[unit].cng_1_mask = 4999 (1 << egr_pkt_attr_uncmprsd_bits_g[unit].cng_1) - 1; 5000 next_pos += egr_pkt_attr_uncmprsd_bits_g[unit].cng_1; 5001 5002 egr_pkt_attr_uncmprsd_bits_g[unit].phb_2 = 4; 5003 egr_pkt_attr_uncmprsd_bits_g[unit].phb_2_pos = next_pos; 5004 egr_pkt_attr_uncmprsd_bits_g[unit].phb_2_mask = 5005 (1 << egr_pkt_attr_uncmprsd_bits_g[unit].phb_2) - 1; 5006 next_pos += egr_pkt_attr_uncmprsd_bits_g[unit].phb_2; 5007 5008 egr_pkt_attr_uncmprsd_bits_g[unit].cng_2 = 2; 5009 egr_pkt_attr_uncmprsd_bits_g[unit].cng_2_pos = next_pos; 5010 egr_pkt_attr_uncmprsd_bits_g[unit].cng_2_mask = 5011 (1 << egr_pkt_attr_uncmprsd_bits_g[unit].cng_2) - 1; 5012 next_pos += egr_pkt_attr_uncmprsd_bits_g[unit].cng_2; 5013 5014 egr_pkt_attr_uncmprsd_bits_g[unit].phb_3 = 4; 5015 egr_pkt_attr_uncmprsd_bits_g[unit].phb_3_pos = next_pos; 5016 egr_pkt_attr_uncmprsd_bits_g[unit].phb_3_mask = 5017 (1 << egr_pkt_attr_uncmprsd_bits_g[unit].phb_3) - 1; 5018 next_pos += egr_pkt_attr_uncmprsd_bits_g[unit].phb_3; 5019 5020 egr_pkt_attr_uncmprsd_bits_g[unit].cng_3 = 2; 5021 egr_pkt_attr_uncmprsd_bits_g[unit].cng_3_pos = next_pos; 5022 egr_pkt_attr_uncmprsd_bits_g[unit].cng_3_mask = 5023 (1 << egr_pkt_attr_uncmprsd_bits_g[unit].cng_3) - 1; 5024 } 5025 #endif 5026 #if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TRIDENT3_SUPPORT) 5027 if (soc_feature(unit, soc_feature_flex_stat_egr_queue_congestion_marked)) { 5028 next_pos += egr_pkt_attr_uncmprsd_bits_g[unit].cng; 5029 5030 egr_pkt_attr_uncmprsd_bits_g[unit].congestion_marked = 1; 5031 egr_pkt_attr_uncmprsd_bits_g[unit].congestion_marked_pos = next_pos; 5032 egr_pkt_attr_uncmprsd_bits_g[unit].congestion_marked_mask = 5033 (1 << egr_pkt_attr_uncmprsd_bits_g[unit].congestion_marked) - 1; 5034 next_pos += egr_pkt_attr_uncmprsd_bits_g[unit].congestion_marked; 5035 5036 egr_pkt_attr_uncmprsd_bits_g[unit].uc_queueing = 1; 5037 egr_pkt_attr_uncmprsd_bits_g[unit].uc_queueing_pos = next_pos; 5038 egr_pkt_attr_uncmprsd_bits_g[unit].uc_queueing_mask = 5039 (1 << egr_pkt_attr_uncmprsd_bits_g[unit].uc_queueing) - 1; 5040 next_pos += egr_pkt_attr_uncmprsd_bits_g[unit].uc_queueing; 5041 5042 if (SOC_IS_HELIX5(unit)) { 5043 egr_pkt_attr_uncmprsd_bits_g[unit].mmu_cos = 5; 5044 } else { 5045 egr_pkt_attr_uncmprsd_bits_g[unit].mmu_cos = 4; 5046 } 5047 egr_pkt_attr_uncmprsd_bits_g[unit].mmu_cos_pos = next_pos; 5048 egr_pkt_attr_uncmprsd_bits_g[unit].mmu_cos_mask = 5049 (1 << egr_pkt_attr_uncmprsd_bits_g[unit].mmu_cos) - 1; 5050 } 5051 #endif 5052 if (soc_feature(unit, soc_feature_flex_stat_int_cn_support)) { 5053 next_pos += egr_pkt_attr_uncmprsd_bits_g[unit].mmu_cos; 5054 5055 egr_pkt_attr_uncmprsd_bits_g[unit].int_cn = 2; 5056 egr_pkt_attr_uncmprsd_bits_g[unit].int_cn_pos = next_pos; 5057 egr_pkt_attr_uncmprsd_bits_g[unit].int_cn_mask = 5058 (1 << egr_pkt_attr_uncmprsd_bits_g[unit].int_cn) - 1; 5059 } 5060 5061 /* Ingress bits initialization */ 5062 next_pos = 0; 5063 ing_pkt_attr_uncmprsd_bits_g[unit].ip_pkt = 1; 5064 ing_pkt_attr_uncmprsd_bits_g[unit].ip_pkt_pos = next_pos; 5065 ing_pkt_attr_uncmprsd_bits_g[unit].ip_pkt_mask = 5066 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].ip_pkt) - 1; 5067 next_pos += ing_pkt_attr_uncmprsd_bits_g[unit].ip_pkt; 5068 5069 ing_pkt_attr_uncmprsd_bits_g[unit].drop = 1; 5070 ing_pkt_attr_uncmprsd_bits_g[unit].drop_pos = next_pos; 5071 ing_pkt_attr_uncmprsd_bits_g[unit].drop_mask = 5072 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].drop) - 1; 5073 next_pos += ing_pkt_attr_uncmprsd_bits_g[unit].drop; 5074 5075 ing_pkt_attr_uncmprsd_bits_g[unit].svp_type = 5076 (soc_feature(unit, soc_feature_multiple_split_horizon_group)) ? 3 : 1; 5077 ing_pkt_attr_uncmprsd_bits_g[unit].svp_type_pos = next_pos; 5078 ing_pkt_attr_uncmprsd_bits_g[unit].svp_type_mask = 5079 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].svp_type) - 1; 5080 next_pos += ing_pkt_attr_uncmprsd_bits_g[unit].svp_type; 5081 5082 ing_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution = 6; 5083 ing_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution_pos = next_pos; 5084 ing_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution_mask = 5085 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution) - 1; 5086 next_pos += ing_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution; 5087 5088 ing_pkt_attr_uncmprsd_bits_g[unit].tos_ecn = 2; 5089 ing_pkt_attr_uncmprsd_bits_g[unit].tos_ecn_pos = next_pos; 5090 ing_pkt_attr_uncmprsd_bits_g[unit].tos_ecn_mask = 5091 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].tos_ecn) - 1; 5092 next_pos += ing_pkt_attr_uncmprsd_bits_g[unit].tos_ecn; 5093 5094 ing_pkt_attr_uncmprsd_bits_g[unit].tos_dscp = 6; 5095 ing_pkt_attr_uncmprsd_bits_g[unit].tos_dscp_pos = next_pos; 5096 ing_pkt_attr_uncmprsd_bits_g[unit].tos_dscp_mask = 5097 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].tos_dscp) - 1; 5098 next_pos += ing_pkt_attr_uncmprsd_bits_g[unit].tos_dscp; 5099 5100 if (SOC_IS_TOMAHAWKX(unit) || SOC_IS_TRIDENT3X(unit)) { 5101 ing_pkt_attr_uncmprsd_bits_g[unit].ing_port = 8; /* FOR TH, TD3, 8 bits */ 5102 } else { 5103 ing_pkt_attr_uncmprsd_bits_g[unit].ing_port = 7; /* FOR TD2, 7 bits */ 5104 } 5105 ing_pkt_attr_uncmprsd_bits_g[unit].ing_port_pos = next_pos; 5106 ing_pkt_attr_uncmprsd_bits_g[unit].ing_port_mask = 5107 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].ing_port) - 1; 5108 next_pos += ing_pkt_attr_uncmprsd_bits_g[unit].ing_port; 5109 5110 ing_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p = 3; 5111 ing_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p_pos = next_pos; 5112 ing_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p_mask = 5113 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p) - 1; 5114 next_pos += ing_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p; 5115 5116 ing_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p = 3; 5117 ing_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p_pos = next_pos; 5118 ing_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p_mask = 5119 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p) - 1; 5120 next_pos += ing_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p; 5121 5122 ing_pkt_attr_uncmprsd_bits_g[unit].vlan_format = 2; 5123 ing_pkt_attr_uncmprsd_bits_g[unit].vlan_format_pos = next_pos; 5124 ing_pkt_attr_uncmprsd_bits_g[unit].vlan_format_mask = 5125 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].vlan_format) - 1; 5126 next_pos += ing_pkt_attr_uncmprsd_bits_g[unit].vlan_format; 5127 5128 ing_pkt_attr_uncmprsd_bits_g[unit].int_pri = 4; 5129 ing_pkt_attr_uncmprsd_bits_g[unit].int_pri_pos = next_pos; 5130 ing_pkt_attr_uncmprsd_bits_g[unit].int_pri_mask = 5131 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].int_pri) - 1; 5132 next_pos += ing_pkt_attr_uncmprsd_bits_g[unit].int_pri; 5133 5134 ing_pkt_attr_uncmprsd_bits_g[unit].ifp_cng = 2; 5135 ing_pkt_attr_uncmprsd_bits_g[unit].ifp_cng_pos = next_pos; 5136 ing_pkt_attr_uncmprsd_bits_g[unit].ifp_cng_mask = 5137 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].ifp_cng) - 1; 5138 next_pos += ing_pkt_attr_uncmprsd_bits_g[unit].ifp_cng; 5139 5140 ing_pkt_attr_uncmprsd_bits_g[unit].cng = 2; 5141 ing_pkt_attr_uncmprsd_bits_g[unit].cng_pos = next_pos; 5142 ing_pkt_attr_uncmprsd_bits_g[unit].cng_mask = 5143 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].cng) - 1; 5144 #ifdef BCM_APACHE_SUPPORT 5145 /* Added support for 3 Label Mpls Attr Counting */ 5146 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 5147 next_pos += ing_pkt_attr_uncmprsd_bits_g[unit].cng; 5148 5149 ing_pkt_attr_uncmprsd_bits_g[unit].phb_1 = 4; 5150 ing_pkt_attr_uncmprsd_bits_g[unit].phb_1_pos = next_pos; 5151 ing_pkt_attr_uncmprsd_bits_g[unit].phb_1_mask = 5152 (1 << ing_pkt_attr_uncmprsd_bits_g[unit].phb_1) - 1; 5153 next_pos += ing_pkt_attr_uncmprsd_bits_g[unit].phb_1; 5154 5155 ing_pkt_attr_uncmprsd_bits_g[unit].cng_1 = 2; 5156 ing_pkt_attr_uncmprsd_bits_g[unit].cng_1_pos = next_pos; 5157 ing_pkt_attr_uncmprsd_bits_g[unit].cng_1_mask = 5158 (1 << ing_pkt_attr_uncmprsd_bits_g[unit].cng_1) - 1; 5159 next_pos += ing_pkt_attr_uncmprsd_bits_g[unit].cng_1; 5160 5161 ing_pkt_attr_uncmprsd_bits_g[unit].phb_2 = 4; 5162 ing_pkt_attr_uncmprsd_bits_g[unit].phb_2_pos = next_pos; 5163 ing_pkt_attr_uncmprsd_bits_g[unit].phb_2_mask = 5164 (1 << ing_pkt_attr_uncmprsd_bits_g[unit].phb_2) - 1; 5165 next_pos += ing_pkt_attr_uncmprsd_bits_g[unit].phb_2; 5166 5167 ing_pkt_attr_uncmprsd_bits_g[unit].cng_2 = 2; 5168 ing_pkt_attr_uncmprsd_bits_g[unit].cng_2_pos = next_pos; 5169 ing_pkt_attr_uncmprsd_bits_g[unit].cng_2_mask = 5170 (1 << ing_pkt_attr_uncmprsd_bits_g[unit].cng_2) - 1; 5171 next_pos += ing_pkt_attr_uncmprsd_bits_g[unit].cng_2; 5172 5173 ing_pkt_attr_uncmprsd_bits_g[unit].phb_3 = 4; 5174 ing_pkt_attr_uncmprsd_bits_g[unit].phb_3_pos = next_pos; 5175 ing_pkt_attr_uncmprsd_bits_g[unit].phb_3_mask = 5176 (1 << ing_pkt_attr_uncmprsd_bits_g[unit].phb_3) - 1; 5177 next_pos += ing_pkt_attr_uncmprsd_bits_g[unit].phb_3; 5178 5179 ing_pkt_attr_uncmprsd_bits_g[unit].cng_3 = 2; 5180 ing_pkt_attr_uncmprsd_bits_g[unit].cng_3_pos = next_pos; 5181 ing_pkt_attr_uncmprsd_bits_g[unit].cng_3_mask = 5182 (1 << ing_pkt_attr_uncmprsd_bits_g[unit].cng_3) - 1; 5183 } 5184 #endif 5185 if (soc_feature(unit, soc_feature_flex_stat_ing_tcp_flags_support)) { 5186 next_pos += ing_pkt_attr_uncmprsd_bits_g[unit].cng; 5187 5188 ing_pkt_attr_uncmprsd_bits_g[unit].tcp_flags = 8; 5189 ing_pkt_attr_uncmprsd_bits_g[unit].tcp_flags_pos = next_pos; 5190 ing_pkt_attr_uncmprsd_bits_g[unit].tcp_flags_mask = 5191 (1 << ing_pkt_attr_uncmprsd_bits_g[unit].tcp_flags) - 1; 5192 next_pos += ing_pkt_attr_uncmprsd_bits_g[unit].tcp_flags; 5193 } 5194 if (soc_feature(unit, soc_feature_flex_stat_int_cn_support)) { 5195 ing_pkt_attr_uncmprsd_bits_g[unit].int_cn = 2; 5196 ing_pkt_attr_uncmprsd_bits_g[unit].int_cn_pos = next_pos; 5197 ing_pkt_attr_uncmprsd_bits_g[unit].int_cn_mask = 5198 (1 << ing_pkt_attr_uncmprsd_bits_g[unit].int_cn) - 1; 5199 } 5200 } else { 5201 /* Egress bits initialization */ 5202 if (SOC_IS_KATANA2(unit)) { 5203 if (SOC_IS_SABER2(unit)) { 5204 offset_adj = 1; 5205 } 5206 egr_pkt_attr_uncmprsd_bits_g[unit].cng = 2; 5207 egr_pkt_attr_uncmprsd_bits_g[unit].cng_pos = 37; 5208 egr_pkt_attr_uncmprsd_bits_g[unit].cng_mask = (1 << egr_pkt_attr_uncmprsd_bits_g[unit].cng) - 1; 5209 5210 egr_pkt_attr_uncmprsd_bits_g[unit].int_pri = 4; 5211 egr_pkt_attr_uncmprsd_bits_g[unit].int_pri_pos = 33; 5212 egr_pkt_attr_uncmprsd_bits_g[unit].int_pri_mask = 5213 (1 << egr_pkt_attr_uncmprsd_bits_g[unit].int_pri) - 1; 5214 5215 egr_pkt_attr_uncmprsd_bits_g[unit].vlan_format = 2; 5216 egr_pkt_attr_uncmprsd_bits_g[unit].vlan_format_pos = 31; 5217 egr_pkt_attr_uncmprsd_bits_g[unit].vlan_format_mask = 5218 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].vlan_format) - 1; 5219 5220 egr_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p = 3; 5221 egr_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p_pos = 28; 5222 egr_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p_mask = 5223 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p) - 1; 5224 5225 egr_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p = 3; 5226 egr_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p_pos = 25; 5227 egr_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p_mask = 5228 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p) - 1; 5229 5230 /* For KT2 : 8 bits */ 5231 /* For SB2 : 7 Bits */ 5232 egr_pkt_attr_uncmprsd_bits_g[unit].egr_port = 8 - offset_adj; 5233 egr_pkt_attr_uncmprsd_bits_g[unit].egr_port_pos = 17; 5234 egr_pkt_attr_uncmprsd_bits_g[unit].egr_port_mask = 5235 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].egr_port) - 1; 5236 5237 egr_pkt_attr_uncmprsd_bits_g[unit].tos_dscp = 6; 5238 egr_pkt_attr_uncmprsd_bits_g[unit].tos_dscp_pos = 11; 5239 egr_pkt_attr_uncmprsd_bits_g[unit].tos_dscp_mask = 5240 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].tos_dscp) - 1; 5241 5242 egr_pkt_attr_uncmprsd_bits_g[unit].tos_ecn = 2; 5243 egr_pkt_attr_uncmprsd_bits_g[unit].tos_ecn_pos = 9; 5244 egr_pkt_attr_uncmprsd_bits_g[unit].tos_ecn_mask = 5245 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].tos_ecn) - 1; 5246 5247 egr_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution = 1; 5248 egr_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution_pos = 8; 5249 egr_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution_mask = 5250 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution) - 1; 5251 5252 egr_pkt_attr_uncmprsd_bits_g[unit].svp_type = 3; 5253 egr_pkt_attr_uncmprsd_bits_g[unit].svp_type_pos = 5; 5254 egr_pkt_attr_uncmprsd_bits_g[unit].svp_type_mask = 5255 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].svp_type) - 1; 5256 5257 egr_pkt_attr_uncmprsd_bits_g[unit].dvp_type = 3; 5258 egr_pkt_attr_uncmprsd_bits_g[unit].dvp_type_pos = 2; 5259 egr_pkt_attr_uncmprsd_bits_g[unit].dvp_type_mask = 5260 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].dvp_type) - 1; 5261 } else { 5262 egr_pkt_attr_uncmprsd_bits_g[unit].cng = 2; 5263 egr_pkt_attr_uncmprsd_bits_g[unit].cng_pos = 31; 5264 egr_pkt_attr_uncmprsd_bits_g[unit].cng_mask = (1 << egr_pkt_attr_uncmprsd_bits_g[unit].cng) - 1; 5265 5266 egr_pkt_attr_uncmprsd_bits_g[unit].int_pri = 4; 5267 egr_pkt_attr_uncmprsd_bits_g[unit].int_pri_pos = 27; 5268 egr_pkt_attr_uncmprsd_bits_g[unit].int_pri_mask = 5269 (1 << egr_pkt_attr_uncmprsd_bits_g[unit].int_pri) - 1; 5270 5271 egr_pkt_attr_uncmprsd_bits_g[unit].vlan_format = 2; 5272 egr_pkt_attr_uncmprsd_bits_g[unit].vlan_format_pos = 25; 5273 egr_pkt_attr_uncmprsd_bits_g[unit].vlan_format_mask = 5274 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].vlan_format) - 1; 5275 5276 egr_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p = 3; 5277 egr_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p_pos = 22; 5278 egr_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p_mask = 5279 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p) - 1; 5280 5281 egr_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p = 3; 5282 egr_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p_pos = 19; 5283 egr_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p_mask = 5284 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p) - 1; 5285 5286 egr_pkt_attr_uncmprsd_bits_g[unit].egr_port = 6; /* For KT2,TR3 6 bits */ 5287 egr_pkt_attr_uncmprsd_bits_g[unit].egr_port_pos = 13; 5288 egr_pkt_attr_uncmprsd_bits_g[unit].egr_port_mask = 5289 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].egr_port) - 1; 5290 5291 egr_pkt_attr_uncmprsd_bits_g[unit].tos_dscp = 6; 5292 egr_pkt_attr_uncmprsd_bits_g[unit].tos_dscp_pos = 7; 5293 egr_pkt_attr_uncmprsd_bits_g[unit].tos_dscp_mask = 5294 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].tos_dscp) - 1; 5295 5296 egr_pkt_attr_uncmprsd_bits_g[unit].tos_ecn = 2; 5297 egr_pkt_attr_uncmprsd_bits_g[unit].tos_ecn_pos = 5; 5298 egr_pkt_attr_uncmprsd_bits_g[unit].tos_ecn_mask = 5299 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].tos_ecn) - 1; 5300 5301 egr_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution = 1; 5302 egr_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution_pos = 4; 5303 egr_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution_mask = 5304 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution) - 1; 5305 5306 egr_pkt_attr_uncmprsd_bits_g[unit].svp_type = 1; 5307 egr_pkt_attr_uncmprsd_bits_g[unit].svp_type_pos = 3; 5308 egr_pkt_attr_uncmprsd_bits_g[unit].svp_type_mask = 5309 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].svp_type) - 1; 5310 5311 egr_pkt_attr_uncmprsd_bits_g[unit].dvp_type = 1; 5312 egr_pkt_attr_uncmprsd_bits_g[unit].dvp_type_pos = 2; 5313 egr_pkt_attr_uncmprsd_bits_g[unit].dvp_type_mask = 5314 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].dvp_type) - 1; 5315 } 5316 egr_pkt_attr_uncmprsd_bits_g[unit].drop = 1; 5317 egr_pkt_attr_uncmprsd_bits_g[unit].drop_pos = 1; 5318 egr_pkt_attr_uncmprsd_bits_g[unit].drop_mask = 5319 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].drop) - 1; 5320 5321 egr_pkt_attr_uncmprsd_bits_g[unit].ip_pkt = 1; 5322 egr_pkt_attr_uncmprsd_bits_g[unit].ip_pkt_pos = 0; 5323 egr_pkt_attr_uncmprsd_bits_g[unit].ip_pkt_mask = 5324 (1<<egr_pkt_attr_uncmprsd_bits_g[unit].ip_pkt) - 1; 5325 5326 /* Ingress bits initialization */ 5327 if (SOC_IS_KATANA2(unit)) { 5328 if (SOC_IS_SABER2(unit)) { 5329 offset_adj = 1; 5330 } 5331 ing_pkt_attr_uncmprsd_bits_g[unit].cng = 2; 5332 ing_pkt_attr_uncmprsd_bits_g[unit].cng_pos = 41; 5333 ing_pkt_attr_uncmprsd_bits_g[unit].cng_mask = 5334 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].cng) - 1; 5335 5336 ing_pkt_attr_uncmprsd_bits_g[unit].ifp_cng = 2; 5337 ing_pkt_attr_uncmprsd_bits_g[unit].ifp_cng_pos = 39; 5338 ing_pkt_attr_uncmprsd_bits_g[unit].ifp_cng_mask = 5339 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].ifp_cng) - 1; 5340 5341 ing_pkt_attr_uncmprsd_bits_g[unit].int_pri = 4; 5342 ing_pkt_attr_uncmprsd_bits_g[unit].int_pri_pos = 35; 5343 ing_pkt_attr_uncmprsd_bits_g[unit].int_pri_mask = 5344 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].int_pri) - 1; 5345 5346 ing_pkt_attr_uncmprsd_bits_g[unit].vlan_format = 2; 5347 ing_pkt_attr_uncmprsd_bits_g[unit].vlan_format_pos = 33; 5348 ing_pkt_attr_uncmprsd_bits_g[unit].vlan_format_mask = 5349 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].vlan_format) - 1; 5350 5351 ing_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p = 3; 5352 ing_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p_pos = 30; 5353 ing_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p_mask = 5354 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p) - 1; 5355 5356 ing_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p = 3; 5357 ing_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p_pos = 27; 5358 ing_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p_mask = 5359 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p) - 1; 5360 5361 /* For KT2,For SB2 : 7 Bits */ 5362 ing_pkt_attr_uncmprsd_bits_g[unit].ing_port = 8 - offset_adj; 5363 ing_pkt_attr_uncmprsd_bits_g[unit].ing_port_pos = 19; 5364 ing_pkt_attr_uncmprsd_bits_g[unit].ing_port_mask = 5365 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].ing_port) - 1; 5366 5367 ing_pkt_attr_uncmprsd_bits_g[unit].tos_dscp = 6; 5368 ing_pkt_attr_uncmprsd_bits_g[unit].tos_dscp_pos = 13; 5369 ing_pkt_attr_uncmprsd_bits_g[unit].tos_dscp_mask = 5370 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].tos_dscp) - 1; 5371 5372 ing_pkt_attr_uncmprsd_bits_g[unit].tos_ecn = 2; 5373 ing_pkt_attr_uncmprsd_bits_g[unit].tos_ecn_pos = 11; 5374 ing_pkt_attr_uncmprsd_bits_g[unit].tos_ecn_mask = 5375 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].tos_ecn) - 1; 5376 5377 ing_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution = 6; 5378 ing_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution_pos = 5; 5379 ing_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution_mask = 5380 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution) - 1; 5381 5382 ing_pkt_attr_uncmprsd_bits_g[unit].svp_type = 3; 5383 ing_pkt_attr_uncmprsd_bits_g[unit].svp_type_pos = 2; 5384 ing_pkt_attr_uncmprsd_bits_g[unit].svp_type_mask = 5385 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].svp_type) - 1; 5386 } else { 5387 ing_pkt_attr_uncmprsd_bits_g[unit].cng = 2; 5388 ing_pkt_attr_uncmprsd_bits_g[unit].cng_pos = 37; 5389 ing_pkt_attr_uncmprsd_bits_g[unit].cng_mask = 5390 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].cng) - 1; 5391 5392 ing_pkt_attr_uncmprsd_bits_g[unit].ifp_cng = 2; 5393 ing_pkt_attr_uncmprsd_bits_g[unit].ifp_cng_pos = 35; 5394 ing_pkt_attr_uncmprsd_bits_g[unit].ifp_cng_mask = 5395 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].ifp_cng) - 1; 5396 5397 ing_pkt_attr_uncmprsd_bits_g[unit].int_pri = 4; 5398 ing_pkt_attr_uncmprsd_bits_g[unit].int_pri_pos = 31; 5399 ing_pkt_attr_uncmprsd_bits_g[unit].int_pri_mask = 5400 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].int_pri) - 1; 5401 5402 ing_pkt_attr_uncmprsd_bits_g[unit].vlan_format = 2; 5403 ing_pkt_attr_uncmprsd_bits_g[unit].vlan_format_pos = 29; 5404 ing_pkt_attr_uncmprsd_bits_g[unit].vlan_format_mask = 5405 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].vlan_format) - 1; 5406 5407 ing_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p = 3; 5408 ing_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p_pos = 26; 5409 ing_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p_mask = 5410 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p) - 1; 5411 5412 ing_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p = 3; 5413 ing_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p_pos = 23; 5414 ing_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p_mask = 5415 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p) - 1; 5416 5417 ing_pkt_attr_uncmprsd_bits_g[unit].ing_port = 6; /* For KT2,TR3 6 bits */ 5418 ing_pkt_attr_uncmprsd_bits_g[unit].ing_port_pos = 17; 5419 ing_pkt_attr_uncmprsd_bits_g[unit].ing_port_mask = 5420 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].ing_port) - 1; 5421 5422 ing_pkt_attr_uncmprsd_bits_g[unit].tos_dscp = 6; 5423 ing_pkt_attr_uncmprsd_bits_g[unit].tos_dscp_pos = 11; 5424 ing_pkt_attr_uncmprsd_bits_g[unit].tos_dscp_mask = 5425 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].tos_dscp) - 1; 5426 ing_pkt_attr_uncmprsd_bits_g[unit].tos_ecn = 2; 5427 ing_pkt_attr_uncmprsd_bits_g[unit].tos_ecn_pos = 9; 5428 ing_pkt_attr_uncmprsd_bits_g[unit].tos_ecn_mask = 5429 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].tos_ecn) - 1; 5430 5431 ing_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution = 6; 5432 ing_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution_pos = 3; 5433 ing_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution_mask = 5434 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution) - 1; 5435 5436 ing_pkt_attr_uncmprsd_bits_g[unit].svp_type = 1; 5437 ing_pkt_attr_uncmprsd_bits_g[unit].svp_type_pos = 2; 5438 ing_pkt_attr_uncmprsd_bits_g[unit].svp_type_mask = 5439 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].svp_type) - 1; 5440 } 5441 ing_pkt_attr_uncmprsd_bits_g[unit].drop = 1; 5442 ing_pkt_attr_uncmprsd_bits_g[unit].drop_pos = 1; 5443 ing_pkt_attr_uncmprsd_bits_g[unit].drop_mask = 5444 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].drop) - 1; 5445 5446 ing_pkt_attr_uncmprsd_bits_g[unit].ip_pkt = 1; 5447 ing_pkt_attr_uncmprsd_bits_g[unit].ip_pkt_pos = 0; 5448 ing_pkt_attr_uncmprsd_bits_g[unit].ip_pkt_mask = 5449 (1<<ing_pkt_attr_uncmprsd_bits_g[unit].ip_pkt) - 1; 5450 } 5451 if (SOC_IS_KATANA2(unit)) { 5452 if (SOC_IS_SABER2(unit)) { 5453 offset_adj = 1; 5454 } 5455 ing_pkt_attr_cmprsd_bits_g[unit].cng = 2; 5456 ing_pkt_attr_cmprsd_bits_g[unit].cng_pos = 39 - offset_adj; 5457 ing_pkt_attr_cmprsd_bits_g[unit].cng_mask = 5458 (1<<ing_pkt_attr_cmprsd_bits_g[unit].cng) - 1; 5459 5460 ing_pkt_attr_cmprsd_bits_g[unit].ifp_cng = 2; 5461 ing_pkt_attr_cmprsd_bits_g[unit].ifp_cng_pos = 37 - offset_adj; 5462 ing_pkt_attr_cmprsd_bits_g[unit].ifp_cng_mask = 5463 (1<<ing_pkt_attr_cmprsd_bits_g[unit].ifp_cng) - 1; 5464 5465 ing_pkt_attr_cmprsd_bits_g[unit].int_pri = 4; 5466 ing_pkt_attr_cmprsd_bits_g[unit].int_pri_pos = 33 - offset_adj; 5467 ing_pkt_attr_cmprsd_bits_g[unit].int_pri_mask = 5468 (1<<ing_pkt_attr_cmprsd_bits_g[unit].int_pri) - 1; 5469 5470 ing_pkt_attr_cmprsd_bits_g[unit].vlan_format = 2; 5471 ing_pkt_attr_cmprsd_bits_g[unit].vlan_format_pos = 31 - offset_adj; 5472 ing_pkt_attr_cmprsd_bits_g[unit].vlan_format_mask = 5473 (1<<ing_pkt_attr_cmprsd_bits_g[unit].vlan_format) - 1; 5474 5475 ing_pkt_attr_cmprsd_bits_g[unit].outer_dot1p = 3; 5476 ing_pkt_attr_cmprsd_bits_g[unit].outer_dot1p_pos = 28 - offset_adj; 5477 ing_pkt_attr_cmprsd_bits_g[unit].outer_dot1p_mask = 5478 (1<<ing_pkt_attr_cmprsd_bits_g[unit].outer_dot1p) - 1; 5479 5480 ing_pkt_attr_cmprsd_bits_g[unit].inner_dot1p = 3; 5481 ing_pkt_attr_cmprsd_bits_g[unit].inner_dot1p_pos = 25; 5482 ing_pkt_attr_cmprsd_bits_g[unit].inner_dot1p_mask = 5483 (1<<ing_pkt_attr_cmprsd_bits_g[unit].inner_dot1p) - 1; 5484 5485 ing_pkt_attr_cmprsd_bits_g[unit].ing_port = 8 - offset_adj; /* For KT2,TR3 6 bits */ 5486 ing_pkt_attr_cmprsd_bits_g[unit].ing_port_pos = 17; 5487 ing_pkt_attr_cmprsd_bits_g[unit].ing_port_mask = 5488 (1<<ing_pkt_attr_cmprsd_bits_g[unit].ing_port) - 1; 5489 5490 ing_pkt_attr_cmprsd_bits_g[unit].tos_dscp = 6; 5491 ing_pkt_attr_cmprsd_bits_g[unit].tos_dscp_pos = 11; 5492 ing_pkt_attr_cmprsd_bits_g[unit].tos_dscp_mask = 5493 (1<<ing_pkt_attr_cmprsd_bits_g[unit].tos_dscp) - 1; 5494 5495 ing_pkt_attr_cmprsd_bits_g[unit].tos_ecn = 2; 5496 ing_pkt_attr_cmprsd_bits_g[unit].tos_ecn_pos = 9; 5497 ing_pkt_attr_cmprsd_bits_g[unit].tos_ecn_mask = 5498 (1<<ing_pkt_attr_cmprsd_bits_g[unit].tos_ecn) - 1; 5499 5500 ing_pkt_attr_cmprsd_bits_g[unit].pkt_resolution = 4; 5501 ing_pkt_attr_cmprsd_bits_g[unit].pkt_resolution_pos = 5; 5502 ing_pkt_attr_cmprsd_bits_g[unit].pkt_resolution_mask = 5503 (1<<ing_pkt_attr_cmprsd_bits_g[unit].pkt_resolution) - 1; 5504 5505 ing_pkt_attr_cmprsd_bits_g[unit].svp_type = 3; 5506 ing_pkt_attr_cmprsd_bits_g[unit].svp_type_pos = 2; 5507 ing_pkt_attr_cmprsd_bits_g[unit].svp_type_mask = 5508 (1<<ing_pkt_attr_cmprsd_bits_g[unit].svp_type) - 1; 5509 ing_pkt_attr_cmprsd_bits_g[unit].drop = 1; 5510 ing_pkt_attr_cmprsd_bits_g[unit].drop_pos = 1; 5511 ing_pkt_attr_cmprsd_bits_g[unit].drop_mask = 5512 (1<<ing_pkt_attr_cmprsd_bits_g[unit].drop) - 1; 5513 5514 ing_pkt_attr_cmprsd_bits_g[unit].ip_pkt = 1; 5515 ing_pkt_attr_cmprsd_bits_g[unit].ip_pkt_pos = 0; 5516 ing_pkt_attr_cmprsd_bits_g[unit].ip_pkt_mask = 5517 (1<<ing_pkt_attr_cmprsd_bits_g[unit].ip_pkt) - 1; 5518 5519 egr_pkt_attr_cmprsd_bits_g[unit].cng = 2; 5520 egr_pkt_attr_cmprsd_bits_g[unit].cng_pos = 33; 5521 egr_pkt_attr_cmprsd_bits_g[unit].cng_mask = (1 << egr_pkt_attr_cmprsd_bits_g[unit].cng) - 1; 5522 5523 egr_pkt_attr_cmprsd_bits_g[unit].int_pri = 4; 5524 egr_pkt_attr_cmprsd_bits_g[unit].int_pri_pos = 29; 5525 egr_pkt_attr_cmprsd_bits_g[unit].int_pri_mask = 5526 (1 << egr_pkt_attr_cmprsd_bits_g[unit].int_pri) - 1; 5527 5528 egr_pkt_attr_cmprsd_bits_g[unit].vlan_format = 2; 5529 egr_pkt_attr_cmprsd_bits_g[unit].vlan_format_pos = 27; 5530 egr_pkt_attr_cmprsd_bits_g[unit].vlan_format_mask = 5531 (1<<egr_pkt_attr_cmprsd_bits_g[unit].vlan_format) - 1; 5532 5533 egr_pkt_attr_cmprsd_bits_g[unit].outer_dot1p = 3; 5534 egr_pkt_attr_cmprsd_bits_g[unit].outer_dot1p_pos = 24; 5535 egr_pkt_attr_cmprsd_bits_g[unit].outer_dot1p_mask = 5536 (1<<egr_pkt_attr_cmprsd_bits_g[unit].outer_dot1p) - 1; 5537 5538 egr_pkt_attr_cmprsd_bits_g[unit].inner_dot1p = 3; 5539 egr_pkt_attr_cmprsd_bits_g[unit].inner_dot1p_pos = 21; 5540 egr_pkt_attr_cmprsd_bits_g[unit].inner_dot1p_mask = 5541 (1<<egr_pkt_attr_cmprsd_bits_g[unit].inner_dot1p) - 1; 5542 5543 egr_pkt_attr_cmprsd_bits_g[unit].egr_port = 8 - offset_adj; /* For KT2 : 8 bits */ 5544 egr_pkt_attr_cmprsd_bits_g[unit].egr_port_pos = 13; 5545 egr_pkt_attr_cmprsd_bits_g[unit].egr_port_mask = 5546 (1<<egr_pkt_attr_cmprsd_bits_g[unit].egr_port) - 1; 5547 5548 egr_pkt_attr_cmprsd_bits_g[unit].tos_dscp = 6; 5549 egr_pkt_attr_cmprsd_bits_g[unit].tos_dscp_pos = 7; 5550 egr_pkt_attr_cmprsd_bits_g[unit].tos_dscp_mask = 5551 (1<<egr_pkt_attr_cmprsd_bits_g[unit].tos_dscp) - 1; 5552 5553 egr_pkt_attr_cmprsd_bits_g[unit].tos_ecn = 2; 5554 egr_pkt_attr_cmprsd_bits_g[unit].tos_ecn_pos = 5; 5555 egr_pkt_attr_cmprsd_bits_g[unit].tos_ecn_mask = 5556 (1<<egr_pkt_attr_cmprsd_bits_g[unit].tos_ecn) - 1; 5557 5558 egr_pkt_attr_cmprsd_bits_g[unit].pkt_resolution = 1; 5559 egr_pkt_attr_cmprsd_bits_g[unit].pkt_resolution_pos = 4; 5560 egr_pkt_attr_cmprsd_bits_g[unit].pkt_resolution_mask = 5561 (1<<egr_pkt_attr_cmprsd_bits_g[unit].pkt_resolution) - 1; 5562 5563 egr_pkt_attr_cmprsd_bits_g[unit].svp_type = 1; 5564 egr_pkt_attr_cmprsd_bits_g[unit].svp_type_pos = 3; 5565 egr_pkt_attr_cmprsd_bits_g[unit].svp_type_mask = 5566 (1<<egr_pkt_attr_cmprsd_bits_g[unit].svp_type) - 1; 5567 5568 egr_pkt_attr_cmprsd_bits_g[unit].dvp_type = 1; 5569 egr_pkt_attr_cmprsd_bits_g[unit].dvp_type_pos = 2; 5570 egr_pkt_attr_cmprsd_bits_g[unit].dvp_type_mask = 5571 (1<<egr_pkt_attr_cmprsd_bits_g[unit].dvp_type) - 1; 5572 egr_pkt_attr_cmprsd_bits_g[unit].drop = 1; 5573 egr_pkt_attr_cmprsd_bits_g[unit].drop_pos = 1; 5574 egr_pkt_attr_cmprsd_bits_g[unit].drop_mask = 5575 (1<<egr_pkt_attr_cmprsd_bits_g[unit].drop) - 1; 5576 5577 egr_pkt_attr_cmprsd_bits_g[unit].ip_pkt = 1; 5578 egr_pkt_attr_cmprsd_bits_g[unit].ip_pkt_pos = 0; 5579 egr_pkt_attr_cmprsd_bits_g[unit].ip_pkt_mask = 5580 (1<<egr_pkt_attr_cmprsd_bits_g[unit].ip_pkt) - 1; 5581 #ifdef BCM_APACHE_SUPPORT 5582 } else if (SOC_IS_APACHE(unit)) { 5583 int next_pos = 0; 5584 /* Egress bits initialization */ 5585 egr_pkt_attr_cmprsd_bits_g[unit].ip_pkt = 1; 5586 egr_pkt_attr_cmprsd_bits_g[unit].ip_pkt_pos = next_pos; 5587 egr_pkt_attr_cmprsd_bits_g[unit].ip_pkt_mask = 5588 (1<<egr_pkt_attr_cmprsd_bits_g[unit].ip_pkt) - 1; 5589 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].ip_pkt; 5590 5591 egr_pkt_attr_cmprsd_bits_g[unit].drop = 1; 5592 egr_pkt_attr_cmprsd_bits_g[unit].drop_pos = next_pos; 5593 egr_pkt_attr_cmprsd_bits_g[unit].drop_mask = 5594 (1<<egr_pkt_attr_cmprsd_bits_g[unit].drop) - 1; 5595 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].drop; 5596 5597 egr_pkt_attr_cmprsd_bits_g[unit].dvp_type = 1; 5598 egr_pkt_attr_cmprsd_bits_g[unit].dvp_type_pos = next_pos; 5599 egr_pkt_attr_cmprsd_bits_g[unit].dvp_type_mask = 5600 (1<<egr_pkt_attr_cmprsd_bits_g[unit].dvp_type) - 1; 5601 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].dvp_type; 5602 5603 egr_pkt_attr_cmprsd_bits_g[unit].svp_type = 1; 5604 egr_pkt_attr_cmprsd_bits_g[unit].svp_type_pos = next_pos; 5605 egr_pkt_attr_cmprsd_bits_g[unit].svp_type_mask = 5606 (1<<egr_pkt_attr_cmprsd_bits_g[unit].svp_type) - 1; 5607 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].svp_type; 5608 5609 egr_pkt_attr_cmprsd_bits_g[unit].pkt_resolution = 1; 5610 egr_pkt_attr_cmprsd_bits_g[unit].pkt_resolution_pos = next_pos; 5611 egr_pkt_attr_cmprsd_bits_g[unit].pkt_resolution_mask = 5612 (1<<egr_pkt_attr_cmprsd_bits_g[unit].pkt_resolution) - 1; 5613 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].pkt_resolution; 5614 5615 egr_pkt_attr_cmprsd_bits_g[unit].tos_ecn = 2; 5616 egr_pkt_attr_cmprsd_bits_g[unit].tos_ecn_pos = next_pos; 5617 egr_pkt_attr_cmprsd_bits_g[unit].tos_ecn_mask = 5618 (1<<egr_pkt_attr_cmprsd_bits_g[unit].tos_ecn) - 1; 5619 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].tos_ecn; 5620 5621 egr_pkt_attr_cmprsd_bits_g[unit].tos_dscp = 6; 5622 egr_pkt_attr_cmprsd_bits_g[unit].tos_dscp_pos = next_pos; 5623 egr_pkt_attr_cmprsd_bits_g[unit].tos_dscp_mask = 5624 (1<<egr_pkt_attr_cmprsd_bits_g[unit].tos_dscp) - 1; 5625 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].tos_dscp; 5626 5627 egr_pkt_attr_cmprsd_bits_g[unit].egr_port = 7; /* For KT2,TR3 6 bits */ 5628 egr_pkt_attr_cmprsd_bits_g[unit].egr_port_pos = next_pos; 5629 egr_pkt_attr_cmprsd_bits_g[unit].egr_port_mask = 5630 (1<<egr_pkt_attr_cmprsd_bits_g[unit].egr_port) - 1; 5631 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].egr_port; 5632 5633 egr_pkt_attr_cmprsd_bits_g[unit].inner_dot1p = 3; 5634 egr_pkt_attr_cmprsd_bits_g[unit].inner_dot1p_pos = next_pos; 5635 egr_pkt_attr_cmprsd_bits_g[unit].inner_dot1p_mask = 5636 (1<<egr_pkt_attr_cmprsd_bits_g[unit].inner_dot1p) - 1; 5637 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].inner_dot1p; 5638 5639 egr_pkt_attr_cmprsd_bits_g[unit].outer_dot1p = 3; 5640 egr_pkt_attr_cmprsd_bits_g[unit].outer_dot1p_pos = next_pos; 5641 egr_pkt_attr_cmprsd_bits_g[unit].outer_dot1p_mask = 5642 (1<<egr_pkt_attr_cmprsd_bits_g[unit].outer_dot1p) - 1; 5643 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].outer_dot1p; 5644 5645 egr_pkt_attr_cmprsd_bits_g[unit].vlan_format = 2; 5646 egr_pkt_attr_cmprsd_bits_g[unit].vlan_format_pos = next_pos; 5647 egr_pkt_attr_cmprsd_bits_g[unit].vlan_format_mask = 5648 (1<<egr_pkt_attr_cmprsd_bits_g[unit].vlan_format) - 1; 5649 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].vlan_format; 5650 5651 egr_pkt_attr_cmprsd_bits_g[unit].int_pri = 4; 5652 egr_pkt_attr_cmprsd_bits_g[unit].int_pri_pos = next_pos; 5653 egr_pkt_attr_cmprsd_bits_g[unit].int_pri_mask = 5654 (1 << egr_pkt_attr_cmprsd_bits_g[unit].int_pri) - 1; 5655 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].int_pri; 5656 5657 egr_pkt_attr_cmprsd_bits_g[unit].cng = 2; 5658 egr_pkt_attr_cmprsd_bits_g[unit].cng_pos = next_pos; 5659 egr_pkt_attr_cmprsd_bits_g[unit].cng_mask = 5660 (1 << egr_pkt_attr_cmprsd_bits_g[unit].cng) - 1; 5661 5662 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].cng; 5663 5664 egr_pkt_attr_cmprsd_bits_g[unit].phb_1 = 4; 5665 egr_pkt_attr_cmprsd_bits_g[unit].phb_1_pos = next_pos; 5666 egr_pkt_attr_cmprsd_bits_g[unit].phb_1_mask = 5667 (1 << egr_pkt_attr_cmprsd_bits_g[unit].phb_1) - 1; 5668 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].phb_1; 5669 5670 egr_pkt_attr_cmprsd_bits_g[unit].cng_1 = 2; 5671 egr_pkt_attr_cmprsd_bits_g[unit].cng_1_pos = next_pos; 5672 egr_pkt_attr_cmprsd_bits_g[unit].cng_1_mask = 5673 (1 << egr_pkt_attr_cmprsd_bits_g[unit].cng_1) - 1; 5674 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].cng_1; 5675 5676 egr_pkt_attr_cmprsd_bits_g[unit].phb_2 = 4; 5677 egr_pkt_attr_cmprsd_bits_g[unit].phb_2_pos = next_pos; 5678 egr_pkt_attr_cmprsd_bits_g[unit].phb_2_mask = 5679 (1 << egr_pkt_attr_cmprsd_bits_g[unit].phb_2) - 1; 5680 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].phb_2; 5681 5682 egr_pkt_attr_cmprsd_bits_g[unit].cng_2 = 2; 5683 egr_pkt_attr_cmprsd_bits_g[unit].cng_2_pos = next_pos; 5684 egr_pkt_attr_cmprsd_bits_g[unit].cng_2_mask = 5685 (1 << egr_pkt_attr_cmprsd_bits_g[unit].cng_2) - 1; 5686 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].cng_2; 5687 5688 egr_pkt_attr_cmprsd_bits_g[unit].phb_3 = 4; 5689 egr_pkt_attr_cmprsd_bits_g[unit].phb_3_pos = next_pos; 5690 egr_pkt_attr_cmprsd_bits_g[unit].phb_3_mask = 5691 (1 << egr_pkt_attr_cmprsd_bits_g[unit].phb_3) - 1; 5692 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].phb_3; 5693 5694 egr_pkt_attr_cmprsd_bits_g[unit].cng_3 = 2; 5695 egr_pkt_attr_cmprsd_bits_g[unit].cng_3_pos = next_pos; 5696 egr_pkt_attr_cmprsd_bits_g[unit].cng_3_mask = 5697 (1 << egr_pkt_attr_cmprsd_bits_g[unit].cng_3) - 1; 5698 5699 /* Ingress bits initialization */ 5700 next_pos = 0; 5701 ing_pkt_attr_cmprsd_bits_g[unit].ip_pkt = 1; 5702 ing_pkt_attr_cmprsd_bits_g[unit].ip_pkt_pos = next_pos; 5703 ing_pkt_attr_cmprsd_bits_g[unit].ip_pkt_mask = 5704 (1<<ing_pkt_attr_cmprsd_bits_g[unit].ip_pkt) - 1; 5705 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].ip_pkt; 5706 5707 ing_pkt_attr_cmprsd_bits_g[unit].drop = 1; 5708 ing_pkt_attr_cmprsd_bits_g[unit].drop_pos = next_pos; 5709 ing_pkt_attr_cmprsd_bits_g[unit].drop_mask = 5710 (1<<ing_pkt_attr_cmprsd_bits_g[unit].drop) - 1; 5711 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].drop; 5712 5713 ing_pkt_attr_cmprsd_bits_g[unit].svp_type = 3; 5714 ing_pkt_attr_cmprsd_bits_g[unit].svp_type_pos = next_pos; 5715 ing_pkt_attr_cmprsd_bits_g[unit].svp_type_mask = 5716 (1<<ing_pkt_attr_cmprsd_bits_g[unit].svp_type) - 1; 5717 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].svp_type; 5718 5719 ing_pkt_attr_cmprsd_bits_g[unit].pkt_resolution = 4; 5720 ing_pkt_attr_cmprsd_bits_g[unit].pkt_resolution_pos = next_pos; 5721 ing_pkt_attr_cmprsd_bits_g[unit].pkt_resolution_mask = 5722 (1<<ing_pkt_attr_cmprsd_bits_g[unit].pkt_resolution) - 1; 5723 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].pkt_resolution; 5724 5725 ing_pkt_attr_cmprsd_bits_g[unit].tos_ecn = 2; 5726 ing_pkt_attr_cmprsd_bits_g[unit].tos_ecn_pos = next_pos; 5727 ing_pkt_attr_cmprsd_bits_g[unit].tos_ecn_mask = 5728 (1<<ing_pkt_attr_cmprsd_bits_g[unit].tos_ecn) - 1; 5729 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].tos_ecn; 5730 5731 ing_pkt_attr_cmprsd_bits_g[unit].tos_dscp = 6; 5732 ing_pkt_attr_cmprsd_bits_g[unit].tos_dscp_pos = next_pos; 5733 ing_pkt_attr_cmprsd_bits_g[unit].tos_dscp_mask = 5734 (1<<ing_pkt_attr_cmprsd_bits_g[unit].tos_dscp) - 1; 5735 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].tos_dscp; 5736 5737 ing_pkt_attr_cmprsd_bits_g[unit].ing_port = 7; /* FOR TD2, 7 bits */ 5738 ing_pkt_attr_cmprsd_bits_g[unit].ing_port_pos = next_pos; 5739 ing_pkt_attr_cmprsd_bits_g[unit].ing_port_mask = 5740 (1<<ing_pkt_attr_cmprsd_bits_g[unit].ing_port) - 1; 5741 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].ing_port; 5742 5743 ing_pkt_attr_cmprsd_bits_g[unit].inner_dot1p = 3; 5744 ing_pkt_attr_cmprsd_bits_g[unit].inner_dot1p_pos = next_pos; 5745 ing_pkt_attr_cmprsd_bits_g[unit].inner_dot1p_mask = 5746 (1<<ing_pkt_attr_cmprsd_bits_g[unit].inner_dot1p) - 1; 5747 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].inner_dot1p; 5748 5749 ing_pkt_attr_cmprsd_bits_g[unit].outer_dot1p = 3; 5750 ing_pkt_attr_cmprsd_bits_g[unit].outer_dot1p_pos = next_pos; 5751 ing_pkt_attr_cmprsd_bits_g[unit].outer_dot1p_mask = 5752 (1<<ing_pkt_attr_cmprsd_bits_g[unit].outer_dot1p) - 1; 5753 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].outer_dot1p; 5754 5755 ing_pkt_attr_cmprsd_bits_g[unit].vlan_format = 2; 5756 ing_pkt_attr_cmprsd_bits_g[unit].vlan_format_pos = next_pos; 5757 ing_pkt_attr_cmprsd_bits_g[unit].vlan_format_mask = 5758 (1<<ing_pkt_attr_cmprsd_bits_g[unit].vlan_format) - 1; 5759 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].vlan_format; 5760 5761 ing_pkt_attr_cmprsd_bits_g[unit].int_pri = 4; 5762 ing_pkt_attr_cmprsd_bits_g[unit].int_pri_pos = next_pos; 5763 ing_pkt_attr_cmprsd_bits_g[unit].int_pri_mask = 5764 (1<<ing_pkt_attr_cmprsd_bits_g[unit].int_pri) - 1; 5765 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].int_pri; 5766 5767 ing_pkt_attr_cmprsd_bits_g[unit].ifp_cng = 2; 5768 ing_pkt_attr_cmprsd_bits_g[unit].ifp_cng_pos = next_pos; 5769 ing_pkt_attr_cmprsd_bits_g[unit].ifp_cng_mask = 5770 (1<<ing_pkt_attr_cmprsd_bits_g[unit].ifp_cng) - 1; 5771 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].ifp_cng; 5772 5773 ing_pkt_attr_cmprsd_bits_g[unit].cng = 2; 5774 ing_pkt_attr_cmprsd_bits_g[unit].cng_pos = next_pos; 5775 ing_pkt_attr_cmprsd_bits_g[unit].cng_mask = 5776 (1<<ing_pkt_attr_cmprsd_bits_g[unit].cng) - 1; 5777 5778 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].cng; 5779 5780 ing_pkt_attr_cmprsd_bits_g[unit].phb_1 = 4; 5781 ing_pkt_attr_cmprsd_bits_g[unit].phb_1_pos = next_pos; 5782 ing_pkt_attr_cmprsd_bits_g[unit].phb_1_mask = 5783 (1 << ing_pkt_attr_cmprsd_bits_g[unit].phb_1) - 1; 5784 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].phb_1; 5785 5786 ing_pkt_attr_cmprsd_bits_g[unit].cng_1 = 2; 5787 ing_pkt_attr_cmprsd_bits_g[unit].cng_1_pos = next_pos; 5788 ing_pkt_attr_cmprsd_bits_g[unit].cng_1_mask = 5789 (1 << ing_pkt_attr_cmprsd_bits_g[unit].cng_1) - 1; 5790 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].cng_1; 5791 5792 ing_pkt_attr_cmprsd_bits_g[unit].phb_2 = 4; 5793 ing_pkt_attr_cmprsd_bits_g[unit].phb_2_pos = next_pos; 5794 ing_pkt_attr_cmprsd_bits_g[unit].phb_2_mask = 5795 (1 << ing_pkt_attr_cmprsd_bits_g[unit].phb_2) - 1; 5796 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].phb_2; 5797 5798 ing_pkt_attr_cmprsd_bits_g[unit].cng_2 = 2; 5799 ing_pkt_attr_cmprsd_bits_g[unit].cng_2_pos = next_pos; 5800 ing_pkt_attr_cmprsd_bits_g[unit].cng_2_mask = 5801 (1 << ing_pkt_attr_cmprsd_bits_g[unit].cng_2) - 1; 5802 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].cng_2; 5803 5804 ing_pkt_attr_cmprsd_bits_g[unit].phb_3 = 4; 5805 ing_pkt_attr_cmprsd_bits_g[unit].phb_3_pos = next_pos; 5806 ing_pkt_attr_cmprsd_bits_g[unit].phb_3_mask = 5807 (1 << ing_pkt_attr_cmprsd_bits_g[unit].phb_3) - 1; 5808 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].phb_3; 5809 5810 ing_pkt_attr_cmprsd_bits_g[unit].cng_3 = 2; 5811 ing_pkt_attr_cmprsd_bits_g[unit].cng_3_pos = next_pos; 5812 ing_pkt_attr_cmprsd_bits_g[unit].cng_3_mask = 5813 (1 << ing_pkt_attr_cmprsd_bits_g[unit].cng_3) - 1; 5814 #endif 5815 } 5816 #ifdef BCM_TRIDENT3_SUPPORT 5817 else if(SOC_IS_TRIDENT3X(unit)) { 5818 int next_pos = 0; 5819 5820 /* Egress bits initialization */ 5821 egr_pkt_attr_cmprsd_bits_g[unit].ip_pkt = 1; 5822 egr_pkt_attr_cmprsd_bits_g[unit].ip_pkt_pos = next_pos; 5823 egr_pkt_attr_cmprsd_bits_g[unit].ip_pkt_mask = 5824 (1<<egr_pkt_attr_cmprsd_bits_g[unit].ip_pkt) - 1; 5825 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].ip_pkt; 5826 5827 egr_pkt_attr_cmprsd_bits_g[unit].drop = 1; 5828 egr_pkt_attr_cmprsd_bits_g[unit].drop_pos = next_pos; 5829 egr_pkt_attr_cmprsd_bits_g[unit].drop_mask = 5830 (1<<egr_pkt_attr_cmprsd_bits_g[unit].drop) - 1; 5831 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].drop; 5832 5833 egr_pkt_attr_cmprsd_bits_g[unit].dvp_type = 1; 5834 egr_pkt_attr_cmprsd_bits_g[unit].dvp_type_pos = next_pos; 5835 egr_pkt_attr_cmprsd_bits_g[unit].dvp_type_mask = 5836 (1<<egr_pkt_attr_cmprsd_bits_g[unit].dvp_type) - 1; 5837 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].dvp_type; 5838 5839 egr_pkt_attr_cmprsd_bits_g[unit].svp_type = 1; 5840 egr_pkt_attr_cmprsd_bits_g[unit].svp_type_pos = next_pos; 5841 egr_pkt_attr_cmprsd_bits_g[unit].svp_type_mask = 5842 (1<<egr_pkt_attr_cmprsd_bits_g[unit].svp_type) - 1; 5843 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].svp_type; 5844 5845 egr_pkt_attr_cmprsd_bits_g[unit].pkt_resolution = 1; 5846 egr_pkt_attr_cmprsd_bits_g[unit].pkt_resolution_pos = next_pos; 5847 egr_pkt_attr_cmprsd_bits_g[unit].pkt_resolution_mask = 5848 (1<<egr_pkt_attr_cmprsd_bits_g[unit].pkt_resolution) - 1; 5849 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].pkt_resolution; 5850 5851 egr_pkt_attr_cmprsd_bits_g[unit].tos_ecn = 2; 5852 egr_pkt_attr_cmprsd_bits_g[unit].tos_ecn_pos = next_pos; 5853 egr_pkt_attr_cmprsd_bits_g[unit].tos_ecn_mask = 5854 (1<<egr_pkt_attr_cmprsd_bits_g[unit].tos_ecn) - 1; 5855 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].tos_ecn; 5856 5857 egr_pkt_attr_cmprsd_bits_g[unit].tos_dscp = 6; 5858 egr_pkt_attr_cmprsd_bits_g[unit].tos_dscp_pos = next_pos; 5859 egr_pkt_attr_cmprsd_bits_g[unit].tos_dscp_mask = 5860 (1<<egr_pkt_attr_cmprsd_bits_g[unit].tos_dscp) - 1; 5861 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].tos_dscp; 5862 5863 egr_pkt_attr_cmprsd_bits_g[unit].egr_port = 8; 5864 egr_pkt_attr_cmprsd_bits_g[unit].egr_port_pos = next_pos; 5865 egr_pkt_attr_cmprsd_bits_g[unit].egr_port_mask = 5866 (1<<egr_pkt_attr_cmprsd_bits_g[unit].egr_port) - 1; 5867 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].egr_port; 5868 5869 egr_pkt_attr_cmprsd_bits_g[unit].inner_dot1p = 3; 5870 egr_pkt_attr_cmprsd_bits_g[unit].inner_dot1p_pos = next_pos; 5871 egr_pkt_attr_cmprsd_bits_g[unit].inner_dot1p_mask = 5872 (1<<egr_pkt_attr_cmprsd_bits_g[unit].inner_dot1p) - 1; 5873 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].inner_dot1p; 5874 5875 egr_pkt_attr_cmprsd_bits_g[unit].outer_dot1p = 3; 5876 egr_pkt_attr_cmprsd_bits_g[unit].outer_dot1p_pos = next_pos; 5877 egr_pkt_attr_cmprsd_bits_g[unit].outer_dot1p_mask = 5878 (1<<egr_pkt_attr_cmprsd_bits_g[unit].outer_dot1p) - 1; 5879 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].outer_dot1p; 5880 5881 egr_pkt_attr_cmprsd_bits_g[unit].vlan_format = 2; 5882 egr_pkt_attr_cmprsd_bits_g[unit].vlan_format_pos = next_pos; 5883 egr_pkt_attr_cmprsd_bits_g[unit].vlan_format_mask = 5884 (1<<egr_pkt_attr_cmprsd_bits_g[unit].vlan_format) - 1; 5885 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].vlan_format; 5886 5887 egr_pkt_attr_cmprsd_bits_g[unit].int_pri = 4; 5888 egr_pkt_attr_cmprsd_bits_g[unit].int_pri_pos = next_pos; 5889 egr_pkt_attr_cmprsd_bits_g[unit].int_pri_mask = 5890 (1 << egr_pkt_attr_cmprsd_bits_g[unit].int_pri) - 1; 5891 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].int_pri; 5892 5893 egr_pkt_attr_cmprsd_bits_g[unit].cng = 2; 5894 egr_pkt_attr_cmprsd_bits_g[unit].cng_pos = next_pos; 5895 egr_pkt_attr_cmprsd_bits_g[unit].cng_mask = (1 << egr_pkt_attr_cmprsd_bits_g[unit].cng) - 1; 5896 5897 if (soc_feature(unit, soc_feature_flex_stat_egr_queue_congestion_marked)) { 5898 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].cng; 5899 5900 egr_pkt_attr_cmprsd_bits_g[unit].congestion_marked = 1; 5901 egr_pkt_attr_cmprsd_bits_g[unit].congestion_marked_pos = next_pos; 5902 egr_pkt_attr_cmprsd_bits_g[unit].congestion_marked_mask = 5903 (1 << egr_pkt_attr_cmprsd_bits_g[unit].congestion_marked) - 1; 5904 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].congestion_marked; 5905 5906 egr_pkt_attr_cmprsd_bits_g[unit].uc_queueing = 1; 5907 egr_pkt_attr_cmprsd_bits_g[unit].uc_queueing_pos = next_pos; 5908 egr_pkt_attr_cmprsd_bits_g[unit].uc_queueing_mask = 5909 (1 << egr_pkt_attr_cmprsd_bits_g[unit].uc_queueing) - 1; 5910 next_pos += egr_pkt_attr_cmprsd_bits_g[unit].uc_queueing; 5911 5912 if (SOC_IS_HELIX5(unit)) { 5913 egr_pkt_attr_uncmprsd_bits_g[unit].mmu_cos = 5; 5914 } else { 5915 egr_pkt_attr_uncmprsd_bits_g[unit].mmu_cos = 4; 5916 } 5917 5918 egr_pkt_attr_cmprsd_bits_g[unit].mmu_cos_pos = next_pos; 5919 egr_pkt_attr_cmprsd_bits_g[unit].mmu_cos_mask = 5920 (1 << egr_pkt_attr_cmprsd_bits_g[unit].mmu_cos) - 1; 5921 } 5922 5923 /* Ingress bits initialization */ 5924 next_pos = 0; 5925 ing_pkt_attr_cmprsd_bits_g[unit].ip_pkt = 1; 5926 ing_pkt_attr_cmprsd_bits_g[unit].ip_pkt_pos = next_pos; 5927 ing_pkt_attr_cmprsd_bits_g[unit].ip_pkt_mask = 5928 (1<<ing_pkt_attr_cmprsd_bits_g[unit].ip_pkt) - 1; 5929 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].ip_pkt; 5930 5931 ing_pkt_attr_cmprsd_bits_g[unit].drop = 1; 5932 ing_pkt_attr_cmprsd_bits_g[unit].drop_pos = next_pos; 5933 ing_pkt_attr_cmprsd_bits_g[unit].drop_mask = 5934 (1<<ing_pkt_attr_cmprsd_bits_g[unit].drop) - 1; 5935 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].drop; 5936 5937 ing_pkt_attr_cmprsd_bits_g[unit].svp_type = 5938 (soc_feature(unit, soc_feature_multiple_split_horizon_group)) ? 3 : 1; 5939 ing_pkt_attr_cmprsd_bits_g[unit].svp_type_pos = next_pos; 5940 ing_pkt_attr_cmprsd_bits_g[unit].svp_type_mask = 5941 (1<<ing_pkt_attr_cmprsd_bits_g[unit].svp_type) - 1; 5942 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].svp_type; 5943 5944 ing_pkt_attr_cmprsd_bits_g[unit].pkt_resolution = 6; 5945 ing_pkt_attr_cmprsd_bits_g[unit].pkt_resolution_pos = next_pos; 5946 ing_pkt_attr_cmprsd_bits_g[unit].pkt_resolution_mask = 5947 (1<<ing_pkt_attr_cmprsd_bits_g[unit].pkt_resolution) - 1; 5948 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].pkt_resolution; 5949 5950 /* PACKET_RESOLUTION (10:5) + SVP_NETWORK_GROUP(4:2) + DROP (1:1) is 5951 * 10 bits but compresed to 8 bits PKT_RES_FN (8:1). Position of 5952 * following attributes asjust by -2. 5953 */ 5954 next_pos -= 2; 5955 ing_pkt_attr_cmprsd_bits_g[unit].tos_ecn = 2; 5956 ing_pkt_attr_cmprsd_bits_g[unit].tos_ecn_pos = next_pos; 5957 ing_pkt_attr_cmprsd_bits_g[unit].tos_ecn_mask = 5958 (1<<ing_pkt_attr_cmprsd_bits_g[unit].tos_ecn) - 1; 5959 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].tos_ecn; 5960 5961 ing_pkt_attr_cmprsd_bits_g[unit].tos_dscp = 6; 5962 ing_pkt_attr_cmprsd_bits_g[unit].tos_dscp_pos = next_pos; 5963 ing_pkt_attr_cmprsd_bits_g[unit].tos_dscp_mask = 5964 (1<<ing_pkt_attr_cmprsd_bits_g[unit].tos_dscp) - 1; 5965 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].tos_dscp; 5966 5967 ing_pkt_attr_cmprsd_bits_g[unit].ing_port = 8; 5968 ing_pkt_attr_cmprsd_bits_g[unit].ing_port_pos = next_pos; 5969 ing_pkt_attr_cmprsd_bits_g[unit].ing_port_mask = 5970 (1<<ing_pkt_attr_cmprsd_bits_g[unit].ing_port) - 1; 5971 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].ing_port; 5972 5973 ing_pkt_attr_cmprsd_bits_g[unit].inner_dot1p = 3; 5974 ing_pkt_attr_cmprsd_bits_g[unit].inner_dot1p_pos = next_pos; 5975 ing_pkt_attr_cmprsd_bits_g[unit].inner_dot1p_mask = 5976 (1<<ing_pkt_attr_cmprsd_bits_g[unit].inner_dot1p) - 1; 5977 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].inner_dot1p; 5978 5979 ing_pkt_attr_cmprsd_bits_g[unit].outer_dot1p = 3; 5980 ing_pkt_attr_cmprsd_bits_g[unit].outer_dot1p_pos = next_pos; 5981 ing_pkt_attr_cmprsd_bits_g[unit].outer_dot1p_mask = 5982 (1<<ing_pkt_attr_cmprsd_bits_g[unit].outer_dot1p) - 1; 5983 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].outer_dot1p; 5984 5985 ing_pkt_attr_cmprsd_bits_g[unit].vlan_format = 2; 5986 ing_pkt_attr_cmprsd_bits_g[unit].vlan_format_pos = next_pos; 5987 ing_pkt_attr_cmprsd_bits_g[unit].vlan_format_mask = 5988 (1<<ing_pkt_attr_cmprsd_bits_g[unit].vlan_format) - 1; 5989 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].vlan_format; 5990 5991 ing_pkt_attr_cmprsd_bits_g[unit].int_pri = 4; 5992 ing_pkt_attr_cmprsd_bits_g[unit].int_pri_pos = next_pos; 5993 ing_pkt_attr_cmprsd_bits_g[unit].int_pri_mask = 5994 (1<<ing_pkt_attr_cmprsd_bits_g[unit].int_pri) - 1; 5995 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].int_pri; 5996 5997 ing_pkt_attr_cmprsd_bits_g[unit].ifp_cng = 2; 5998 ing_pkt_attr_cmprsd_bits_g[unit].ifp_cng_pos = next_pos; 5999 ing_pkt_attr_cmprsd_bits_g[unit].ifp_cng_mask = 6000 (1<<ing_pkt_attr_cmprsd_bits_g[unit].ifp_cng) - 1; 6001 next_pos += ing_pkt_attr_cmprsd_bits_g[unit].ifp_cng; 6002 6003 ing_pkt_attr_cmprsd_bits_g[unit].cng = 2; 6004 ing_pkt_attr_cmprsd_bits_g[unit].cng_pos = next_pos; 6005 ing_pkt_attr_cmprsd_bits_g[unit].cng_mask = 6006 (1<<ing_pkt_attr_cmprsd_bits_g[unit].cng) - 1; 6007 } 6008 #endif 6009 else { 6010 egr_pkt_attr_cmprsd_bits_g[unit] = egr_pkt_attr_uncmprsd_bits_g[unit]; 6011 ing_pkt_attr_cmprsd_bits_g[unit] = ing_pkt_attr_uncmprsd_bits_g[unit]; 6012 } 6013 } 6014 /* 6015 * Function: 6016 * _bcm_esw_stat_flex_init_pkt_res_fields 6017 * Description: 6018 * Initialize All Packet Resolution related (static) structures. 6019 * Happens only one time. 6020 * 6021 * Parameters: 6022 * unit - (IN) unit number 6023 * Return Value: 6024 * BCM_E_XXX 6025 * Notes: 6026 */ 6027 void _bcm_esw_stat_flex_init_pkt_res_fields(int unit) 6028 { 6029 static uint32 init_flag=0; 6030 if (init_flag==0) { 6031 _bcm_esw_stat_flex_init_pkt_res_values( 6032 unit, ing_Single_res, 6033 sizeof(ing_Single_res)/sizeof(ing_Single_res[0])); 6034 _bcm_esw_stat_flex_init_pkt_res_values( 6035 unit,ing_TrafficType_res, 6036 sizeof(ing_TrafficType_res)/sizeof(ing_TrafficType_res[0])); 6037 _bcm_esw_stat_flex_init_pkt_res_values( 6038 unit,ing_DlfAll_res, 6039 sizeof(ing_DlfAll_res)/sizeof(ing_DlfAll_res[0])); 6040 _bcm_esw_stat_flex_init_pkt_res_values( 6041 unit,ing_Typed_res, 6042 sizeof(ing_Typed_res)/sizeof(ing_Typed_res[0])); 6043 _bcm_esw_stat_flex_init_pkt_res_values( 6044 unit,ing_TypedAll_res, 6045 sizeof(ing_TypedAll_res)/sizeof(ing_TypedAll_res[0])); 6046 _bcm_esw_stat_flex_init_pkt_res_values( 6047 unit,ing_SingleWithControl_res, 6048 sizeof(ing_SingleWithControl_res)/ 6049 sizeof(ing_SingleWithControl_res[0])); 6050 _bcm_esw_stat_flex_init_pkt_res_values( 6051 unit,ing_TrafficTypeWithControl_res, 6052 sizeof(ing_TrafficTypeWithControl_res)/ 6053 sizeof(ing_TrafficTypeWithControl_res[0])); 6054 _bcm_esw_stat_flex_init_pkt_res_values( 6055 unit,ing_DlfAllWithControl_res, 6056 sizeof(ing_DlfAllWithControl_res)/ 6057 sizeof(ing_DlfAllWithControl_res[0])); 6058 _bcm_esw_stat_flex_init_pkt_res_values( 6059 unit,ing_TypedWithControl_res, 6060 sizeof(ing_TypedWithControl_res)/ 6061 sizeof(ing_TypedWithControl_res[0])); 6062 _bcm_esw_stat_flex_init_pkt_res_values( 6063 unit,ing_TypedAllWithControl_res, 6064 sizeof(ing_TypedAllWithControl_res)/ 6065 sizeof(ing_TypedAllWithControl_res[0])); 6066 _bcm_esw_stat_flex_init_pkt_res_values( 6067 unit,egr_Single_res, 6068 sizeof(egr_Single_res)/sizeof(egr_Single_res[0])); 6069 _bcm_esw_stat_flex_init_pkt_res_values( 6070 unit,egr_TrafficType_res, 6071 sizeof(egr_TrafficType_res)/sizeof(egr_TrafficType_res[0])); 6072 init_flag=1; 6073 } 6074 } 6075 uint32 _bcm_esw_stat_flex_get_pkt_res_value(int unit,uint32 pkt_res_field) 6076 { 6077 uint32 *flex_pkt_res_values=NULL; 6078 uint32 flex_pkt_res_values_count=0; 6079 6080 if (SOC_IS_KATANAX(unit)) { 6081 flex_pkt_res_values = _flex_pkt_res_values_katana; 6082 flex_pkt_res_values_count = sizeof(_flex_pkt_res_values_katana)/ 6083 sizeof(_flex_pkt_res_values_katana[0]); 6084 } 6085 if (SOC_IS_TRIUMPH3(unit) || SOC_IS_KATANA2(unit)) { 6086 flex_pkt_res_values = _flex_pkt_res_values_tr3; 6087 flex_pkt_res_values_count = sizeof(_flex_pkt_res_values_tr3)/ 6088 sizeof(_flex_pkt_res_values_tr3[0]); 6089 } 6090 if (SOC_IS_TD2_TT2(unit)) { 6091 flex_pkt_res_values = _flex_pkt_res_values_td2; 6092 flex_pkt_res_values_count = sizeof(_flex_pkt_res_values_td2)/ 6093 sizeof(_flex_pkt_res_values_td2[0]); 6094 } 6095 if ( flex_pkt_res_values_count == 0) { 6096 LOG_WARN(BSL_LS_BCM_FLEXCTR, 6097 (BSL_META_U(unit, 6098 "CONFIG ERROR: flex_pkt_res_values_count=0\n"))); 6099 return 0; 6100 } 6101 if (pkt_res_field >= flex_pkt_res_values_count) { 6102 LOG_WARN(BSL_LS_BCM_FLEXCTR, 6103 (BSL_META_U(unit, 6104 "Flex Pkt Resolution Value Initialization failed" 6105 "pkt_res_field=%d > flex_pkt_res_values_count=%d=0\n"), 6106 pkt_res_field, flex_pkt_res_values_count)); 6107 return 0; 6108 } 6109 return flex_pkt_res_values[pkt_res_field]; 6110 } 6111 6112 /* Create Customized Stat Group mode for given Counter Attributes:UpdateMap */ 6113 static 6114 int _bcm_stat_flex_update_map( 6115 bcm_stat_flex_direction_t direction, 6116 bcm_stat_flex_attr_t *attr, 6117 uint8 offset , 6118 uint8 counter) 6119 { 6120 if (direction == bcmStatFlexDirectionIngress) { 6121 if (attr->ing_attr.packet_attr_type == 6122 bcmStatFlexPacketAttrTypeCompressed) { 6123 if ((attr->ing_attr.cmprsd_attr_selectors. 6124 offset_table_map[offset].offset != counter) && 6125 (attr->ing_attr.cmprsd_attr_selectors. 6126 offset_table_map[offset].count_enable == 1)) { 6127 return BCM_E_CONFIG; 6128 } 6129 attr->ing_attr.cmprsd_attr_selectors. 6130 offset_table_map[offset].offset=counter; 6131 attr->ing_attr.cmprsd_attr_selectors. 6132 offset_table_map[offset].count_enable=1; 6133 } else { 6134 if ((attr->ing_attr.uncmprsd_attr_selectors. 6135 offset_table_map[offset].offset != counter) && 6136 (attr->ing_attr.uncmprsd_attr_selectors. 6137 offset_table_map[offset].count_enable == 1)) { 6138 return BCM_E_CONFIG; 6139 } 6140 attr->ing_attr.uncmprsd_attr_selectors. 6141 offset_table_map[offset].offset=counter; 6142 attr->ing_attr.uncmprsd_attr_selectors. 6143 offset_table_map[offset].count_enable=1; 6144 } 6145 } else { 6146 if (attr->egr_attr.packet_attr_type == 6147 bcmStatFlexPacketAttrTypeCompressed) { 6148 if ((attr->egr_attr.cmprsd_attr_selectors. 6149 offset_table_map[offset].offset != counter) && 6150 (attr->egr_attr.cmprsd_attr_selectors. 6151 offset_table_map[offset].count_enable == 1)) { 6152 return BCM_E_CONFIG; 6153 } 6154 attr->egr_attr.cmprsd_attr_selectors. 6155 offset_table_map[offset].offset=counter; 6156 attr->egr_attr.cmprsd_attr_selectors. 6157 offset_table_map[offset].count_enable=1; 6158 6159 } else { 6160 if((attr->egr_attr.uncmprsd_attr_selectors. 6161 offset_table_map[offset].offset != counter) && 6162 (attr->egr_attr.uncmprsd_attr_selectors. 6163 offset_table_map[offset].count_enable == 1)) { 6164 return BCM_E_CONFIG; 6165 } 6166 attr->egr_attr.uncmprsd_attr_selectors. 6167 offset_table_map[offset].offset=counter; 6168 attr->egr_attr.uncmprsd_attr_selectors. 6169 offset_table_map[offset].count_enable=1; 6170 } 6171 } 6172 6173 return BCM_E_NONE; 6174 } 6175 6176 static 6177 uint8 _bcm_stat_flex_get_num_bits(uint8 value) 6178 { 6179 if (value <= 2) { 6180 return 1; 6181 } 6182 if (value <= 4) { 6183 return 2; 6184 } 6185 if (value <= 8) { 6186 return 3; 6187 } 6188 if (value <= 16) { 6189 return 4; 6190 } 6191 if (value <= 32) { 6192 return 5; 6193 } 6194 if (value <= 64) { 6195 return 6; 6196 } 6197 if (value <= 128) { 6198 return 7; 6199 } else { 6200 return 8; 6201 } 6202 } 6203 6204 STATIC 6205 int _bcm_esw_stat_flex_compressed_attr_map_update( 6206 int unit,bcm_stat_flex_direction_t direction, 6207 bcm_stat_flex_attribute_t *pkt_attr_selectors, 6208 bcm_stat_flex_ing_pkt_attr_bits_t *ing_cmprsd_pkt_attr_bits, 6209 bcm_stat_flex_egr_pkt_attr_bits_t *egr_cmprsd_pkt_attr_bits) 6210 { 6211 int rv = BCM_E_NONE; 6212 uint32 i = 0; 6213 _bcm_stat_flex_compressed_mode_attr_sel_map_t *cmprsd_attr_map = NULL; 6214 6215 /* Ingress */ 6216 if (direction == bcmStatFlexDirectionIngress) { 6217 cmprsd_attr_map = global_stat_flex_compressed_attr_map[unit]; 6218 if (cmprsd_attr_map == NULL || 6219 ing_cmprsd_pkt_attr_bits == NULL) { 6220 return BCM_E_MEMORY; 6221 } 6222 6223 /* save compressed combined flag for pre_ifp_color */ 6224 if (pkt_attr_selectors->pre_ifp_color) { 6225 cmprsd_attr_map->combine_pre_ifp_color_flags = 6226 pkt_attr_selectors->combine_pre_ifp_color_flags; 6227 } 6228 6229 /* save compressed combined flag for ifp_color */ 6230 if (pkt_attr_selectors->ifp_color) { 6231 cmprsd_attr_map->combine_ifp_color_flags = 6232 pkt_attr_selectors->combine_ifp_color_flags; 6233 } 6234 6235 6236 /* save compressed combined flag for int_pri */ 6237 if (pkt_attr_selectors->int_pri != 0) { 6238 cmprsd_attr_map->combine_int_pri_flags = 6239 pkt_attr_selectors->combine_int_pri_flags; 6240 } 6241 6242 /* save compressed combined flag for vlan_format */ 6243 if (pkt_attr_selectors->vlan_format != 0) { 6244 cmprsd_attr_map->combine_vlan_format_flags = 6245 pkt_attr_selectors->combine_vlan_format_flags; 6246 } 6247 6248 /* save compressed combined flag for outer_dot1p */ 6249 if (pkt_attr_selectors->outer_dot1p != 0) { 6250 cmprsd_attr_map->combine_outer_dot1p_flags = 6251 pkt_attr_selectors->combine_outer_dot1p_flags; 6252 } 6253 6254 /* save compressed combined flag for inner_dot1p */ 6255 if (pkt_attr_selectors->inner_dot1p != 0) { 6256 cmprsd_attr_map->combine_inner_dot1p_flags = 6257 pkt_attr_selectors->combine_inner_dot1p_flags; 6258 } 6259 6260 /* save port attributes */ 6261 if (pkt_attr_selectors->port != 0) { 6262 /* egr_pkt_attr_cmprsd_bits_g[unit].egr_port 6263 * egr_pkt_attr_cmprsd_bits_g[unit].ing_port */ 6264 for (i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 6265 cmprsd_attr_map->combine_value_array[bcmStatFlexAttrPort][i] = 6266 pkt_attr_selectors->combine_value_array[bcmStatFlexAttrPort][i]; 6267 } 6268 } 6269 6270 /* save tos_dscp attributes */ 6271 if (pkt_attr_selectors->tos_dscp != 0) { 6272 for (i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 6273 cmprsd_attr_map->combine_value_array[bcmStatFlexAttrTosDscp][i] = 6274 pkt_attr_selectors->combine_value_array[bcmStatFlexAttrTosDscp][i]; 6275 } 6276 } 6277 6278 /* save tos_ecn attributes */ 6279 if (pkt_attr_selectors->tos_ecn != 0) { 6280 for (i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 6281 cmprsd_attr_map->combine_value_array[bcmStatFlexAttrTosEcn][i] = 6282 pkt_attr_selectors->combine_value_array[bcmStatFlexAttrTosEcn][i]; 6283 } 6284 } 6285 6286 /* save compressed combined flag for pkt_resolution */ 6287 if (pkt_attr_selectors->pkt_resolution != 0) { 6288 cmprsd_attr_map->combine_pkt_resolution_flags = 6289 pkt_attr_selectors->combine_pkt_resolution_flags; 6290 } 6291 6292 /* save svp_type attributes */ 6293 if (pkt_attr_selectors->svp != 0) { 6294 for (i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 6295 cmprsd_attr_map->combine_value_array[bcmStatFlexAttrSvp][i] = 6296 pkt_attr_selectors->combine_value_array[bcmStatFlexAttrSvp][i]; 6297 } 6298 } 6299 6300 /* save compressed combined flag for drop */ 6301 if (pkt_attr_selectors->drop != 0) { 6302 cmprsd_attr_map->combine_drop_flags = 6303 pkt_attr_selectors->combine_drop_flags; 6304 } 6305 6306 /* save compressed combined flag for ip_pkt */ 6307 if (pkt_attr_selectors->ip_pkt != 0) { 6308 cmprsd_attr_map->combine_ip_pkt_flags = 6309 pkt_attr_selectors->combine_ip_pkt_flags; 6310 } 6311 } 6312 6313 /* Egress */ 6314 if (direction == bcmStatFlexDirectionEgress) { 6315 cmprsd_attr_map = egr_global_stat_flex_compressed_attr_map[unit]; 6316 if (cmprsd_attr_map == NULL || 6317 egr_cmprsd_pkt_attr_bits == NULL) { 6318 return BCM_E_MEMORY; 6319 } 6320 #if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TRIDENT3_SUPPORT) 6321 if (soc_feature(unit, soc_feature_flex_stat_egr_queue_congestion_marked)) { 6322 if (pkt_attr_selectors->mmu_cos != 0) { 6323 cmprsd_attr_map->combine_mmu_cos_flags = 6324 pkt_attr_selectors->combine_mmu_cos_flags; 6325 } 6326 6327 if (pkt_attr_selectors->uc_queueing != 0) { 6328 cmprsd_attr_map->combine_uc_queueing_flags = 6329 pkt_attr_selectors->combine_uc_queueing_flags; 6330 } 6331 6332 if (pkt_attr_selectors->congestion_marked != 0) { 6333 cmprsd_attr_map->combine_congestion_marked_flags = 6334 pkt_attr_selectors->combine_congestion_marked_flags; 6335 } 6336 } 6337 #endif 6338 /* save compressed combined flag for int_pri */ 6339 if (pkt_attr_selectors->int_pri != 0) { 6340 cmprsd_attr_map->combine_int_pri_flags = 6341 pkt_attr_selectors->combine_int_pri_flags; 6342 } 6343 6344 /* save compressed combined flag for vlan_format */ 6345 if (pkt_attr_selectors->vlan_format != 0) { 6346 cmprsd_attr_map->combine_vlan_format_flags = 6347 pkt_attr_selectors->combine_vlan_format_flags; 6348 } 6349 6350 /* save compressed combined flag for outer_dot1p */ 6351 if (pkt_attr_selectors->outer_dot1p != 0) { 6352 cmprsd_attr_map->combine_outer_dot1p_flags = 6353 pkt_attr_selectors->combine_outer_dot1p_flags; 6354 } 6355 6356 /* save compressed combined flag for inner_dot1p */ 6357 if (pkt_attr_selectors->inner_dot1p != 0) { 6358 cmprsd_attr_map->combine_inner_dot1p_flags = 6359 pkt_attr_selectors->combine_inner_dot1p_flags; 6360 } 6361 6362 /* save port attributes */ 6363 if (pkt_attr_selectors->port != 0) { 6364 for (i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 6365 cmprsd_attr_map->combine_value_array[bcmStatFlexAttrPort][i] = 6366 pkt_attr_selectors->combine_value_array[bcmStatFlexAttrPort][i]; 6367 } 6368 } 6369 6370 /* save tos_dscp attributes */ 6371 if (pkt_attr_selectors->tos_dscp != 0) { 6372 for (i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 6373 cmprsd_attr_map->combine_value_array[bcmStatFlexAttrTosDscp][i] = 6374 pkt_attr_selectors->combine_value_array[bcmStatFlexAttrTosDscp][i]; 6375 } 6376 } 6377 6378 /* save tos_ecn attributes */ 6379 if (pkt_attr_selectors->tos_ecn != 0) { 6380 for (i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 6381 cmprsd_attr_map->combine_value_array[bcmStatFlexAttrTosEcn][i] = 6382 pkt_attr_selectors->combine_value_array[bcmStatFlexAttrTosEcn][i]; 6383 } 6384 } 6385 6386 /* save compressed combined flag for pkt_resolution */ 6387 if (pkt_attr_selectors->pkt_resolution != 0) { 6388 cmprsd_attr_map->combine_pkt_resolution_flags = 6389 pkt_attr_selectors->combine_pkt_resolution_flags; 6390 } 6391 6392 /* save svp_type attributes */ 6393 if (pkt_attr_selectors->svp != 0) { 6394 for (i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 6395 cmprsd_attr_map->combine_value_array[bcmStatFlexAttrSvp][i] = 6396 pkt_attr_selectors->combine_value_array[bcmStatFlexAttrSvp][i]; 6397 } 6398 } 6399 6400 /* save dvp attributes */ 6401 if (pkt_attr_selectors->dvp != 0) { 6402 for (i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 6403 cmprsd_attr_map->combine_value_array[bcmStatFlexAttrDvp][i] = 6404 pkt_attr_selectors->combine_value_array[bcmStatFlexAttrDvp][i]; 6405 } 6406 } 6407 6408 /* save compressed combined flag for drop */ 6409 if (pkt_attr_selectors->drop != 0) { 6410 cmprsd_attr_map->combine_drop_flags = 6411 pkt_attr_selectors->combine_drop_flags; 6412 } 6413 6414 /* save compressed combined flag for ip_pkt */ 6415 if (pkt_attr_selectors->ip_pkt != 0) { 6416 cmprsd_attr_map->combine_ip_pkt_flags = 6417 pkt_attr_selectors->combine_ip_pkt_flags; 6418 } 6419 } 6420 return rv; 6421 } 6422 6423 STATIC 6424 int _bcm_stat_flex_compressed_attr_selectors_verify( 6425 int unit, 6426 bcm_stat_flex_direction_t direction, 6427 bcm_stat_flex_packet_attr_type_t type, 6428 bcm_stat_flex_attribute_t *pkt_attr_selectors, 6429 bcm_stat_flex_ing_pkt_attr_bits_t *ing_cmprsd_pkt_attr_bits, 6430 bcm_stat_flex_egr_pkt_attr_bits_t *egr_cmprsd_pkt_attr_bits) 6431 { 6432 int rv = BCM_E_NONE; 6433 uint32 i = 0; 6434 uint32 combine_flags1 = 0; 6435 uint32 combine_flags2 = 0; 6436 uint32 combine_flags3 = 0; 6437 _bcm_stat_flex_compressed_mode_attr_sel_map_t *cmprsd_attr_map = NULL; 6438 6439 if (type != bcmStatFlexPacketAttrTypeCompressed) { 6440 return BCM_E_PARAM; 6441 } 6442 6443 if (direction == bcmStatFlexDirectionIngress) { 6444 cmprsd_attr_map = global_stat_flex_compressed_attr_map[unit]; 6445 /* No compression table resource is in use */ 6446 if (cmprsd_attr_map == NULL) { 6447 return BCM_E_MEMORY; 6448 } 6449 /* check pre_ifp_color,ifp_color,int_pri attr flags */ 6450 if ((pkt_attr_selectors->pre_ifp_color != 0) || 6451 (pkt_attr_selectors->ifp_color) || 6452 (pkt_attr_selectors->int_pri)) { 6453 /* If ref_count is non-zero, match attribute values. */ 6454 if (cmprsd_attr_map->ref_counts[ing_pkt_attr_pri_cng_map] != 0) { 6455 SHR_BITOR_RANGE(&pkt_attr_selectors->combine_pre_ifp_color_flags, 6456 &cmprsd_attr_map->combine_pre_ifp_color_flags, 6457 0, 32, &combine_flags1); 6458 SHR_BITOR_RANGE(&pkt_attr_selectors->combine_ifp_color_flags, 6459 &cmprsd_attr_map->combine_ifp_color_flags, 6460 0, 32, &combine_flags2); 6461 SHR_BITOR_RANGE(&pkt_attr_selectors->combine_int_pri_flags, 6462 &cmprsd_attr_map->combine_int_pri_flags, 6463 0, 32, &combine_flags3); 6464 6465 if ((combine_flags1 != cmprsd_attr_map->combine_pre_ifp_color_flags) || 6466 (combine_flags2 != cmprsd_attr_map->combine_ifp_color_flags) || 6467 (combine_flags3 != cmprsd_attr_map->combine_int_pri_flags)) { 6468 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, (BSL_META_U(unit, "ING_PRI_CNG_MAP Compression tables cannot be modified\n"))); 6469 return BCM_E_PARAM; 6470 } 6471 /* Update combined flags */ 6472 pkt_attr_selectors->combine_pre_ifp_color_flags = combine_flags1; 6473 pkt_attr_selectors->combine_ifp_color_flags = combine_flags2; 6474 pkt_attr_selectors->combine_int_pri_flags = combine_flags3; 6475 } 6476 } 6477 6478 6479 /* check vlan_format,outer_dot1p,inner_dot1p attr flags */ 6480 if ((pkt_attr_selectors->vlan_format != 0) || 6481 (pkt_attr_selectors->outer_dot1p) || 6482 (pkt_attr_selectors->inner_dot1p)) { 6483 /* If ref_count is non-zero, match attribute values. */ 6484 if (cmprsd_attr_map->ref_counts[ing_pkt_attr_pkt_pri_map] != 0) { 6485 SHR_BITOR_RANGE(&pkt_attr_selectors->combine_vlan_format_flags, 6486 &cmprsd_attr_map->combine_vlan_format_flags, 6487 0, 32, &combine_flags1); 6488 SHR_BITOR_RANGE(&pkt_attr_selectors->combine_outer_dot1p_flags, 6489 &cmprsd_attr_map->combine_outer_dot1p_flags, 6490 0, 32, &combine_flags2); 6491 SHR_BITOR_RANGE(&pkt_attr_selectors->combine_inner_dot1p_flags, 6492 &cmprsd_attr_map->combine_inner_dot1p_flags, 6493 0, 32, &combine_flags3); 6494 6495 if ((combine_flags1 != cmprsd_attr_map->combine_vlan_format_flags) || 6496 (combine_flags2 != cmprsd_attr_map->combine_outer_dot1p_flags) || 6497 (combine_flags3 != cmprsd_attr_map->combine_inner_dot1p_flags)) { 6498 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, (BSL_META_U(unit, "ING_PKT_PRI_MAP Compression tables cannot be modified\n"))); 6499 return BCM_E_PARAM; 6500 } 6501 /* Update combined flags */ 6502 pkt_attr_selectors->combine_vlan_format_flags = combine_flags1; 6503 pkt_attr_selectors->combine_outer_dot1p_flags = combine_flags2; 6504 pkt_attr_selectors->combine_inner_dot1p_flags = combine_flags3; 6505 } 6506 } 6507 6508 if (pkt_attr_selectors->port != 0) { 6509 /* If ref_count is non-zero, match attribute values */ 6510 if (cmprsd_attr_map->ref_counts[ing_pkt_attr_port_map] != 0) { 6511 for (i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 6512 SHR_BITOR_RANGE(&pkt_attr_selectors->combine_value_array 6513 [bcmStatFlexAttrPort][i], 6514 &cmprsd_attr_map->combine_value_array 6515 [bcmStatFlexAttrPort][i], 6516 0, 32, & combine_flags1); 6517 if (combine_flags1 != cmprsd_attr_map->combine_value_array 6518 [bcmStatFlexAttrPort][i]) { 6519 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, (BSL_META_U(unit, "ING_PORT_MAP Compression tables cannot be modified\n"))); 6520 return BCM_E_PARAM; 6521 } 6522 /* Update combined flags */ 6523 pkt_attr_selectors->combine_value_array[bcmStatFlexAttrPort][i] = 6524 combine_flags1; 6525 } 6526 } 6527 } 6528 6529 if ((pkt_attr_selectors->tos_dscp != 0) || 6530 (pkt_attr_selectors->tos_ecn)) { 6531 /* If ref_count is non-zero, match attribute values. */ 6532 if (cmprsd_attr_map->ref_counts[ing_pkt_attr_tos_map] != 0) { 6533 for (i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 6534 SHR_BITOR_RANGE(&pkt_attr_selectors->combine_value_array 6535 [bcmStatFlexAttrTosDscp][i], 6536 &cmprsd_attr_map->combine_value_array 6537 [bcmStatFlexAttrTosDscp][i], 6538 0, 32, & combine_flags1); 6539 SHR_BITOR_RANGE(&pkt_attr_selectors->combine_value_array 6540 [bcmStatFlexAttrTosEcn][i], 6541 &cmprsd_attr_map->combine_value_array 6542 [bcmStatFlexAttrTosEcn][i], 6543 0, 32, & combine_flags2); 6544 if ((combine_flags1 != cmprsd_attr_map->combine_value_array 6545 [bcmStatFlexAttrTosDscp][i]) || 6546 (combine_flags2 != cmprsd_attr_map->combine_value_array 6547 [bcmStatFlexAttrTosEcn][i])) { 6548 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, (BSL_META_U(unit, "ING_TOS_MAP Compression tables cannot be modified\n"))); 6549 return BCM_E_PARAM; 6550 } 6551 /* Update combined flags */ 6552 pkt_attr_selectors->combine_value_array 6553 [bcmStatFlexAttrTosDscp][i] = combine_flags1; 6554 pkt_attr_selectors->combine_value_array 6555 [bcmStatFlexAttrTosEcn][i] = combine_flags2; 6556 } 6557 } 6558 } 6559 6560 if ((pkt_attr_selectors->pkt_resolution != 0) || 6561 (pkt_attr_selectors->svp) || 6562 (pkt_attr_selectors->drop)) { 6563 /* If ref_count is non-zero, match */ 6564 if (cmprsd_attr_map->ref_counts[ing_pkt_attr_pkt_res_map] != 0) { 6565 SHR_BITOR_RANGE(&pkt_attr_selectors->combine_pkt_resolution_flags, 6566 &cmprsd_attr_map->combine_pkt_resolution_flags, 6567 0, 32, &combine_flags1); 6568 SHR_BITOR_RANGE(&pkt_attr_selectors->combine_drop_flags, 6569 &cmprsd_attr_map->combine_drop_flags, 6570 0, 32, &combine_flags2); 6571 if ((combine_flags1 != cmprsd_attr_map->combine_pkt_resolution_flags) || 6572 (combine_flags2 != cmprsd_attr_map->combine_drop_flags)) { 6573 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, (BSL_META_U(unit, "ING_PKT_RES_MAP Compression tables cannot be modified\n"))); 6574 return BCM_E_PARAM; 6575 } 6576 for (i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 6577 SHR_BITOR_RANGE(&pkt_attr_selectors->combine_value_array 6578 [bcmStatFlexAttrSvp][i], 6579 &cmprsd_attr_map->combine_value_array 6580 [bcmStatFlexAttrSvp][i], 6581 0, 32, & combine_flags3); 6582 if (combine_flags3 != cmprsd_attr_map->combine_value_array 6583 [bcmStatFlexAttrSvp][i]) { 6584 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, (BSL_META_U(unit, "ING_PKT_RES_MAP Compression tables cannot be modified\n"))); 6585 return BCM_E_PARAM; 6586 } 6587 /* Update combined flags */ 6588 pkt_attr_selectors->combine_value_array 6589 [bcmStatFlexAttrSvp][i] = combine_flags3; 6590 } 6591 /* Update combine_xxx_flags */ 6592 pkt_attr_selectors->combine_pkt_resolution_flags = combine_flags1; 6593 pkt_attr_selectors->combine_drop_flags = combine_flags2; 6594 } 6595 } 6596 } 6597 6598 if (direction == bcmStatFlexDirectionEgress) { 6599 cmprsd_attr_map = egr_global_stat_flex_compressed_attr_map[unit]; 6600 /* No compression table resource is in use */ 6601 if (cmprsd_attr_map == NULL) { 6602 return BCM_E_MEMORY; 6603 } 6604 6605 /* check int_pri attr flags */ 6606 if(pkt_attr_selectors->int_pri) { 6607 /* If ref_count is non-zero, match attribute values. */ 6608 if (cmprsd_attr_map->ref_counts[egr_pkt_attr_pri_cng_map] != 0) { 6609 SHR_BITOR_RANGE(&pkt_attr_selectors->combine_int_pri_flags, 6610 &cmprsd_attr_map->combine_int_pri_flags, 6611 0, 32, &combine_flags1); 6612 6613 if(combine_flags1 != cmprsd_attr_map->combine_int_pri_flags) { 6614 return BCM_E_PARAM; 6615 } 6616 } 6617 /* Update combined flags */ 6618 pkt_attr_selectors->combine_int_pri_flags = combine_flags1; 6619 } 6620 6621 /* check vlan_format,outer_dot1p,inner_dot1p attr flags */ 6622 if ((pkt_attr_selectors->vlan_format != 0) || 6623 (pkt_attr_selectors->outer_dot1p) || 6624 (pkt_attr_selectors->inner_dot1p)) { 6625 /* If ref_count is non-zero, match attribute values. */ 6626 if (cmprsd_attr_map->ref_counts[egr_pkt_attr_pkt_pri_map] != 0) { 6627 SHR_BITOR_RANGE(&pkt_attr_selectors->combine_vlan_format_flags, 6628 &cmprsd_attr_map->combine_vlan_format_flags, 6629 0, 32, &combine_flags1); 6630 SHR_BITOR_RANGE(&pkt_attr_selectors->combine_outer_dot1p_flags, 6631 &cmprsd_attr_map->combine_outer_dot1p_flags, 6632 0, 32, &combine_flags2); 6633 SHR_BITOR_RANGE(&pkt_attr_selectors->combine_inner_dot1p_flags, 6634 &cmprsd_attr_map->combine_inner_dot1p_flags, 6635 0, 32, &combine_flags3); 6636 6637 if ((combine_flags1 != cmprsd_attr_map->combine_vlan_format_flags) || 6638 (combine_flags2 != cmprsd_attr_map->combine_outer_dot1p_flags) || 6639 (combine_flags3 != cmprsd_attr_map->combine_inner_dot1p_flags)) { 6640 return BCM_E_PARAM; 6641 } 6642 /* Update combined flags */ 6643 pkt_attr_selectors->combine_vlan_format_flags = combine_flags1; 6644 pkt_attr_selectors->combine_outer_dot1p_flags = combine_flags2; 6645 pkt_attr_selectors->combine_inner_dot1p_flags = combine_flags3; 6646 } 6647 } 6648 6649 if (pkt_attr_selectors->port != 0) { 6650 /* If ref_count is non-zero, match attribute values */ 6651 if (cmprsd_attr_map->ref_counts[egr_pkt_attr_port_map] != 0) { 6652 for (i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 6653 SHR_BITOR_RANGE(&pkt_attr_selectors->combine_value_array 6654 [bcmStatFlexAttrPort][i], 6655 &cmprsd_attr_map->combine_value_array 6656 [bcmStatFlexAttrPort][i], 6657 0, 32, & combine_flags1); 6658 if (combine_flags1 != cmprsd_attr_map->combine_value_array 6659 [bcmStatFlexAttrPort][i]) { 6660 return BCM_E_PARAM; 6661 } 6662 /* Update combined flags */ 6663 pkt_attr_selectors->combine_value_array[bcmStatFlexAttrPort][i] = 6664 combine_flags1; 6665 } 6666 } 6667 } 6668 6669 if ((pkt_attr_selectors->tos_dscp != 0) || 6670 (pkt_attr_selectors->tos_ecn)) { 6671 /* If ref_count is non-zero, match attribute values. */ 6672 if (cmprsd_attr_map->ref_counts[egr_pkt_attr_tos_map] != 0) { 6673 for (i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 6674 SHR_BITOR_RANGE(&pkt_attr_selectors->combine_value_array 6675 [bcmStatFlexAttrTosDscp][i], 6676 &cmprsd_attr_map->combine_value_array 6677 [bcmStatFlexAttrTosDscp][i], 6678 0, 32, & combine_flags1); 6679 SHR_BITOR_RANGE(&pkt_attr_selectors->combine_value_array 6680 [bcmStatFlexAttrTosEcn][i], 6681 &cmprsd_attr_map->combine_value_array 6682 [bcmStatFlexAttrTosEcn][i], 6683 0, 32, & combine_flags2); 6684 if ((combine_flags1 != cmprsd_attr_map->combine_value_array 6685 [bcmStatFlexAttrTosDscp][i]) || 6686 (combine_flags2 != cmprsd_attr_map->combine_value_array 6687 [bcmStatFlexAttrTosEcn][i])) { 6688 return BCM_E_PARAM; 6689 } 6690 /* Update combined flags */ 6691 pkt_attr_selectors->combine_value_array 6692 [bcmStatFlexAttrTosDscp][i] = combine_flags1; 6693 pkt_attr_selectors->combine_value_array 6694 [bcmStatFlexAttrTosEcn][i] = combine_flags2; 6695 } 6696 } 6697 } 6698 /* add dvp_type for egression direction */ 6699 if ((pkt_attr_selectors->pkt_resolution != 0) || 6700 (pkt_attr_selectors->svp) || 6701 (pkt_attr_selectors->dvp) || 6702 (pkt_attr_selectors->drop)) { 6703 /* If ref_count is non-zero, match */ 6704 if (cmprsd_attr_map->ref_counts[egr_pkt_attr_pkt_res_map] != 0) { 6705 SHR_BITOR_RANGE(&pkt_attr_selectors->combine_pkt_resolution_flags, 6706 &cmprsd_attr_map->combine_pkt_resolution_flags, 6707 0, 32, &combine_flags1); 6708 SHR_BITOR_RANGE(&pkt_attr_selectors->combine_drop_flags, 6709 &cmprsd_attr_map->combine_drop_flags, 6710 0, 32, &combine_flags2); 6711 if ((combine_flags1 != cmprsd_attr_map->combine_pkt_resolution_flags) || 6712 (combine_flags2 != cmprsd_attr_map->combine_drop_flags)) { 6713 return BCM_E_RESOURCE; 6714 } 6715 if (pkt_attr_selectors->svp) { 6716 for (i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 6717 SHR_BITOR_RANGE(&pkt_attr_selectors->combine_value_array 6718 [bcmStatFlexAttrSvp][i], 6719 &cmprsd_attr_map->combine_value_array 6720 [bcmStatFlexAttrSvp][i], 6721 0, 32, & combine_flags3); 6722 if (combine_flags3 != cmprsd_attr_map->combine_value_array 6723 [bcmStatFlexAttrSvp][i]) { 6724 return BCM_E_PARAM; 6725 } 6726 /* Update combined flags */ 6727 pkt_attr_selectors->combine_value_array 6728 [bcmStatFlexAttrSvp][i] = combine_flags3; 6729 } 6730 } 6731 6732 if (pkt_attr_selectors->dvp) { 6733 for (i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 6734 SHR_BITOR_RANGE(&pkt_attr_selectors->combine_value_array 6735 [bcmStatFlexAttrDvp][i], 6736 &cmprsd_attr_map->combine_value_array 6737 [bcmStatFlexAttrDvp][i], 6738 0, 32, & combine_flags3); 6739 if (combine_flags3 != cmprsd_attr_map->combine_value_array 6740 [bcmStatFlexAttrDvp][i]) { 6741 return BCM_E_PARAM; 6742 } 6743 /* Update combined flags */ 6744 pkt_attr_selectors->combine_value_array 6745 [bcmStatFlexAttrDvp][i] = combine_flags3; 6746 } 6747 } 6748 /* Update combine_xxx_flags */ 6749 pkt_attr_selectors->combine_pkt_resolution_flags = combine_flags1; 6750 pkt_attr_selectors->combine_drop_flags = combine_flags2; 6751 } 6752 } 6753 } 6754 return rv; 6755 } 6756 6757 /* Create Customized Stat Group mode for given Counter Attributes:CreateMode */ 6758 static 6759 bcm_error_t _bcm_esw_stat_group_mode_associate_id( 6760 int unit, 6761 uint32 flags, 6762 bcm_stat_flex_attribute_t *flex_attribute, 6763 uint32 *mode_id) 6764 { 6765 bcm_stat_flex_mode_t mode=0; 6766 bcm_error_t rv=BCM_E_NONE; 6767 bcm_stat_flex_attr_t *attr=NULL; 6768 bcm_stat_flex_ing_attr_t *ing_attr=NULL; 6769 bcm_stat_flex_egr_attr_t *egr_attr=NULL; 6770 bcm_stat_flex_ing_cmprsd_attr_selectors_t *ing_cmprsd_attr_selectors=NULL; 6771 bcm_stat_flex_ing_pkt_attr_bits_t *ing_cmprsd_pkt_attr_bits=NULL; 6772 6773 bcm_stat_flex_egr_cmprsd_attr_selectors_t *egr_cmprsd_attr_selectors=NULL; 6774 bcm_stat_flex_egr_pkt_attr_bits_t *egr_cmprsd_pkt_attr_bits=NULL; 6775 bcm_stat_flex_direction_t direction = 6776 bcmStatFlexDirectionIngress; 6777 uint8 total_bits=0; 6778 uint16 counter=0; 6779 uint8 loop=0; 6780 uint16 *offset_array[8]={NULL}; 6781 uint8 shift_by_bits=0; 6782 uint16 temp_count=0; 6783 uint8 max_count=0; 6784 uint8 *map_array[bcmStatGroupModeAttrMaxValue] = {NULL}; 6785 #ifdef BCM_APACHE_SUPPORT 6786 uint8 cng_3_bits = 0; 6787 uint8 phb_3_bits = 0; 6788 uint8 cng_2_bits = 0; 6789 uint8 phb_2_bits = 0; 6790 uint8 cng_1_bits = 0; 6791 uint8 phb_1_bits = 0; 6792 #endif 6793 uint8 cng_bits=0; 6794 uint8 ifp_cng_bits=0; 6795 uint8 int_pri_bits=0; 6796 uint8 vlan_format_bits=0; 6797 uint8 outer_dot1p_bits=0; 6798 uint8 inner_dot1p_bits=0; 6799 uint8 port_bits=0; 6800 uint8 tos_dscp_bits=0; 6801 uint8 tos_ecn_bits=0; 6802 uint8 pkt_resolution_bits=0; 6803 uint8 svp_bits=0; 6804 uint8 dvp_bits=0; 6805 uint8 drop_bits=0; 6806 uint8 ip_pkt_bits=0; 6807 uint8 unknown_pkt=0; 6808 uint8 control_pkt=0; 6809 uint8 oam_pkt=0; 6810 uint8 bfd_pkt=0; 6811 uint8 bpdu_pkt=0; 6812 uint8 icnm_pkt=0; 6813 uint8 _1588_pkt=0; 6814 uint8 known_l2uc_pkt=0; 6815 uint8 unknown_l2uc_pkt=0; 6816 uint8 l2bc_pkt=0; 6817 uint8 known_l2mc_pkt=0; 6818 uint8 unknown_l2mc_pkt=0; 6819 uint8 known_l3uc_pkt=0; 6820 uint8 unknown_l3uc_pkt=0; 6821 uint8 known_ipmc_pkt=0; 6822 uint8 unknown_ipmc_pkt=0; 6823 uint8 known_mpls_l2_pkt=0; 6824 uint8 known_mpls_l3_pkt=0; 6825 uint8 known_mpls_pkt=0; 6826 uint8 unknown_mpls_pkt=0; 6827 uint8 known_mpls_multicast_pkt=0; 6828 uint8 known_mim_pkt=0; 6829 uint8 unknown_mim_pkt=0; 6830 uint8 known_trill_pkt=0; 6831 uint8 unknown_trill_pkt=0; 6832 uint8 known_niv_pkt=0; 6833 uint8 unknown_niv_pkt=0; 6834 uint16 loop_index=0; 6835 uint16 final_index=0; 6836 uint16 index0=0; 6837 uint16 index1=0; 6838 uint16 index2=0; 6839 uint16 index3=0; 6840 uint16 index4=0; 6841 uint16 index5=0; 6842 uint16 index6=0; 6843 uint16 index7=0; 6844 uint16 invalid_index0 = FALSE; 6845 uint16 invalid_index1 = FALSE; 6846 uint16 invalid_index2 = FALSE; 6847 uint16 invalid_index3 = FALSE; 6848 uint8 unused_attr_val_found = FALSE; 6849 uint32 invalid_map_value = 0; 6850 uint32 values = 0, values_max = 0; 6851 uint8 offset=0; 6852 uint8 final_mapped_value; 6853 uint8 mapped_value0; 6854 uint8 mapped_value1; 6855 uint8 mapped_value2; 6856 uint8 mapped_value3; 6857 uint8 max_bits=0; 6858 #ifdef BCM_APACHE_SUPPORT 6859 uint8 pre_ifp_cng_mpls_3_cmprsd_max_bits = 0; 6860 uint8 int_pri_mpls_3_cmprsd_max_bits = 0; 6861 uint8 pre_ifp_cng_mpls_2_cmprsd_max_bits = 0; 6862 uint8 int_pri_mpls_2_cmprsd_max_bits = 0; 6863 uint8 pre_ifp_cng_mpls_1_cmprsd_max_bits = 0; 6864 uint8 int_pri_mpls_1_cmprsd_max_bits = 0; 6865 #endif 6866 uint8 pre_ifp_cng_cmprsd_max_bits=0; 6867 uint8 ifp_cng_cmprsd_max_bits=0; 6868 uint8 int_pri_cmprsd_max_bits=0; 6869 6870 uint8 vlan_format_cmprsd_max_bits=0; 6871 uint8 outer_dot1p_cmprsd_max_bits=0; 6872 uint8 inner_dot1p_cmprsd_max_bits=0; 6873 6874 uint8 port_cmprsd_max_bits=0; 6875 6876 uint8 tos_dscp_cmprsd_max_bits=0; 6877 uint8 tos_ecn_cmprsd_max_bits=0; 6878 6879 uint8 pkt_resolution_cmprsd_max_bits=0; 6880 uint8 svp_cmprsd_max_bits=0; 6881 uint8 dvp_cmprsd_max_bits=0; 6882 uint8 drop_cmprsd_max_bits=0; 6883 uint8 ip_pkt_cmprsd_max_bits=0; 6884 #if defined(BCM_TRIDENT2_SUPPORT) 6885 uint8 known_l2gre_pkt=0; 6886 uint8 known_vxlan_pkt=0; 6887 uint8 known_fcoe_pkt=0; 6888 uint8 unknown_fcoe_pkt=0; 6889 #endif 6890 bcm_stat_flex_udf_pkt_attr_selectors_t *ing_udf_pkt_attr_selectors = NULL; 6891 #if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TRIDENT3_SUPPORT) 6892 uint8 mmu_cos_bits = 0; 6893 uint8 uc_queueing_bits = 0; 6894 uint8 congestion_marked_bits = 0; 6895 uint8 mmu_cos_cmprsd_max_bits = 0; 6896 uint8 uc_queueing_cmprsd_max_bits = 0; 6897 uint8 congestion_marked_cmprsd_max_bits = 0; 6898 #endif 6899 uint8 tcp_flags_bits = 0, int_cn_bits = 0; 6900 #if defined(BCM_KATANA2_SUPPORT) 6901 uint32 hw_class_id = 0, i = 0; 6902 uint32 combine_attr_per_mode [bcmStatFlexAttrMax][BCM_STAT_FLEX_BIT_ARRAY_SIZE] = {{0}}; 6903 #endif 6904 6905 if (flags & BCM_STAT_GROUP_MODE_INGRESS) { 6906 direction = bcmStatFlexDirectionIngress; 6907 } else { 6908 direction = bcmStatFlexDirectionEgress; 6909 } 6910 attr = (bcm_stat_flex_attr_t *) sal_alloc(sizeof(bcm_stat_flex_attr_t), 6911 "attr"); 6912 if (attr == NULL) { 6913 return BCM_E_MEMORY; 6914 } 6915 sal_memset(attr,0,sizeof(bcm_stat_flex_attr_t)); 6916 6917 if (direction == bcmStatFlexDirectionIngress) { 6918 /* INGRESS SIDE */ 6919 attr->direction=bcmStatFlexDirectionIngress; 6920 ing_attr = &(attr->ing_attr); 6921 ing_cmprsd_attr_selectors=&(ing_attr->cmprsd_attr_selectors); 6922 ing_cmprsd_pkt_attr_bits= &(ing_attr->cmprsd_attr_selectors. 6923 pkt_attr_bits); 6924 unknown_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit , 6925 _UNKNOWN_PKT); 6926 control_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 6927 _CONTROL_PKT); 6928 oam_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit,_OAM_PKT); 6929 bfd_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit,_BFD_PKT); 6930 bpdu_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit,_BPDU_PKT); 6931 icnm_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit,_ICNM_PKT); 6932 _1588_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit,_1588_PKT); 6933 known_l2uc_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit,_L2UC_PKT); 6934 unknown_l2uc_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 6935 _L2DLF_PKT); 6936 l2bc_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit,_L2BC_PKT); 6937 known_l2mc_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 6938 _KNOWN_L2MC_PKT); 6939 unknown_l2mc_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 6940 _UNKNOWN_L2MC_PKT); 6941 known_l3uc_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 6942 _KNOWN_L3UC_PKT); 6943 unknown_l3uc_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 6944 _UNKNOWN_L3UC_PKT); 6945 known_ipmc_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 6946 _KNOWN_IPMC_PKT); 6947 unknown_ipmc_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 6948 _UNKNOWN_IPMC_PKT); 6949 known_mpls_l2_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 6950 _KNOWN_MPLS_L2_PKT); 6951 known_mpls_l3_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 6952 _KNOWN_MPLS_L3_PKT); 6953 known_mpls_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 6954 _KNOWN_MPLS_PKT); 6955 unknown_mpls_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 6956 _UNKNOWN_MPLS_PKT); 6957 known_mpls_multicast_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 6958 _KNOWN_MPLS_MULTICAST_PKT); 6959 known_mim_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 6960 _KNOWN_MIM_PKT); 6961 unknown_mim_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 6962 _UNKNOWN_MIM_PKT); 6963 known_trill_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 6964 _KNOWN_TRILL_PKT); 6965 unknown_trill_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 6966 _UNKNOWN_TRILL_PKT); 6967 known_niv_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 6968 _KNOWN_NIV_PKT); 6969 unknown_niv_pkt = _bcm_esw_stat_flex_get_pkt_res_value(unit, 6970 _UNKNOWN_NIV_PKT); 6971 #if defined(BCM_TRIDENT2_SUPPORT) 6972 if (SOC_IS_TD2_TT2(unit)) { 6973 known_l2gre_pkt=_bcm_esw_stat_flex_get_pkt_res_value(unit, 6974 _KNOWN_L2GRE_PKT); 6975 known_vxlan_pkt=_bcm_esw_stat_flex_get_pkt_res_value(unit, 6976 _KNOWN_VXLAN_PKT); 6977 known_fcoe_pkt=_bcm_esw_stat_flex_get_pkt_res_value(unit, 6978 _KNOWN_FCOE_PKT); 6979 unknown_fcoe_pkt=_bcm_esw_stat_flex_get_pkt_res_value(unit, 6980 _UNKNOWN_FCOE_PKT); 6981 } 6982 #endif 6983 } else { 6984 /* EGRESS SIDE */ 6985 attr->direction=bcmStatFlexDirectionEgress; 6986 egr_attr = &(attr->egr_attr); 6987 egr_cmprsd_attr_selectors=&(egr_attr->cmprsd_attr_selectors); 6988 egr_cmprsd_pkt_attr_bits= &(egr_attr->cmprsd_attr_selectors. 6989 pkt_attr_bits); 6990 unknown_pkt = 0; 6991 control_pkt = 0; 6992 oam_pkt = 0; 6993 bfd_pkt = 0; 6994 bpdu_pkt = 0; 6995 icnm_pkt = 0; 6996 _1588_pkt = 0; 6997 known_l2uc_pkt = 0; 6998 unknown_l2uc_pkt = 0; 6999 l2bc_pkt = 1; 7000 known_l2mc_pkt = 1; 7001 unknown_l2mc_pkt = 1; 7002 known_l3uc_pkt = 0; 7003 unknown_l3uc_pkt = 0; 7004 known_ipmc_pkt = 0; 7005 unknown_ipmc_pkt = 0; 7006 known_mpls_l2_pkt = 0; 7007 known_mpls_l3_pkt = 0; 7008 known_mpls_pkt = 0; 7009 unknown_mpls_pkt = 0; 7010 known_mpls_multicast_pkt = 1; 7011 known_mim_pkt = 0; 7012 unknown_mim_pkt = 0; 7013 known_trill_pkt = 0; 7014 unknown_trill_pkt = 0; 7015 known_niv_pkt = 0; 7016 unknown_niv_pkt = 0; 7017 } 7018 #ifdef BCM_APACHE_SUPPORT 7019 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 7020 if (flex_attribute->cng_3 != 0) { 7021 total_bits += cng_3_bits = 7022 (direction == bcmStatFlexDirectionIngress) ? 7023 ing_pkt_attr_uncmprsd_bits_g[unit].cng_3: egr_pkt_attr_uncmprsd_bits_g[unit].cng_3; 7024 } 7025 if (flex_attribute->phb_3 != 0) { 7026 total_bits += phb_3_bits = 7027 (direction == bcmStatFlexDirectionIngress) ? 7028 ing_pkt_attr_uncmprsd_bits_g[unit].phb_3: egr_pkt_attr_uncmprsd_bits_g[unit].phb_3; 7029 } 7030 if (flex_attribute->cng_2 != 0) { 7031 total_bits += cng_2_bits = 7032 (direction == bcmStatFlexDirectionIngress) ? 7033 ing_pkt_attr_uncmprsd_bits_g[unit].cng_2: egr_pkt_attr_uncmprsd_bits_g[unit].cng_2; 7034 } 7035 if (flex_attribute->phb_2 != 0) { 7036 total_bits += phb_2_bits = 7037 (direction == bcmStatFlexDirectionIngress) ? 7038 ing_pkt_attr_uncmprsd_bits_g[unit].phb_2: egr_pkt_attr_uncmprsd_bits_g[unit].phb_2; 7039 } 7040 if (flex_attribute->cng_1 != 0) { 7041 total_bits += cng_1_bits = 7042 (direction == bcmStatFlexDirectionIngress) ? 7043 ing_pkt_attr_uncmprsd_bits_g[unit].cng_1: egr_pkt_attr_uncmprsd_bits_g[unit].cng_1; 7044 } 7045 if (flex_attribute->phb_1 != 0) { 7046 total_bits += phb_1_bits = 7047 (direction == bcmStatFlexDirectionIngress) ? 7048 ing_pkt_attr_uncmprsd_bits_g[unit].phb_1: egr_pkt_attr_uncmprsd_bits_g[unit].phb_1; 7049 } 7050 } 7051 #endif 7052 if (flex_attribute->pre_ifp_color != 0) { 7053 total_bits += cng_bits = 7054 (direction == bcmStatFlexDirectionIngress) ? 7055 ing_pkt_attr_uncmprsd_bits_g[unit].cng: egr_pkt_attr_uncmprsd_bits_g[unit].cng; 7056 } 7057 if (flex_attribute->ifp_color != 0) { 7058 if (direction == bcmStatFlexDirectionEgress) { 7059 sal_free(attr); 7060 return BCM_E_PARAM; 7061 } 7062 ing_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7063 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_IFP_CNG_ATTR_BITS; 7064 total_bits += ifp_cng_bits = ing_pkt_attr_uncmprsd_bits_g[unit].ifp_cng; 7065 } 7066 if (flex_attribute->int_pri != 0) { 7067 total_bits += int_pri_bits = 7068 (direction == bcmStatFlexDirectionIngress) ? 7069 ing_pkt_attr_uncmprsd_bits_g[unit].int_pri:egr_pkt_attr_uncmprsd_bits_g[unit].int_pri; 7070 } 7071 if (flex_attribute->vlan_format != 0) { 7072 total_bits += vlan_format_bits = 7073 (direction == bcmStatFlexDirectionIngress) ? 7074 ing_pkt_attr_uncmprsd_bits_g[unit].vlan_format: 7075 egr_pkt_attr_uncmprsd_bits_g[unit].vlan_format; 7076 } 7077 if (flex_attribute->outer_dot1p != 0) { 7078 total_bits += outer_dot1p_bits = 7079 (direction == bcmStatFlexDirectionIngress) ? 7080 ing_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p: 7081 egr_pkt_attr_uncmprsd_bits_g[unit].outer_dot1p; 7082 } 7083 if (flex_attribute->inner_dot1p != 0) { 7084 total_bits += inner_dot1p_bits = 7085 (direction == bcmStatFlexDirectionIngress) ? 7086 ing_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p: 7087 egr_pkt_attr_uncmprsd_bits_g[unit].inner_dot1p; 7088 } 7089 if (flex_attribute->port != 0) { 7090 total_bits += port_bits = 7091 (direction == bcmStatFlexDirectionIngress) ? 7092 ing_pkt_attr_uncmprsd_bits_g[unit].ing_port: 7093 egr_pkt_attr_uncmprsd_bits_g[unit].egr_port; 7094 } 7095 if (flex_attribute->tos_dscp != 0) { 7096 total_bits += tos_dscp_bits = 7097 (direction == bcmStatFlexDirectionIngress) ? 7098 ing_pkt_attr_uncmprsd_bits_g[unit].tos_dscp: 7099 egr_pkt_attr_uncmprsd_bits_g[unit].tos_dscp; 7100 } 7101 if (flex_attribute->tos_ecn != 0) { 7102 total_bits += tos_ecn_bits = 7103 (direction == bcmStatFlexDirectionIngress) ? 7104 ing_pkt_attr_uncmprsd_bits_g[unit].tos_ecn: 7105 egr_pkt_attr_uncmprsd_bits_g[unit].tos_ecn; 7106 } 7107 if (flex_attribute->pkt_resolution != 0) { 7108 total_bits += pkt_resolution_bits = 7109 (direction == bcmStatFlexDirectionIngress) ? 7110 ing_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution: 7111 egr_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution; 7112 } 7113 if (flex_attribute->svp != 0) { 7114 total_bits += svp_bits = 7115 (direction == bcmStatFlexDirectionIngress) ? 7116 ing_pkt_attr_uncmprsd_bits_g[unit].svp_type: 7117 egr_pkt_attr_uncmprsd_bits_g[unit].svp_type; 7118 } 7119 if (flex_attribute->dvp != 0) { 7120 if (direction == bcmStatFlexDirectionIngress) { 7121 sal_free(attr); 7122 return BCM_E_PARAM; 7123 } 7124 total_bits += dvp_bits = egr_pkt_attr_uncmprsd_bits_g[unit].dvp_type; 7125 } 7126 if (flex_attribute->drop != 0) { 7127 total_bits += drop_bits = 7128 (direction == bcmStatFlexDirectionIngress) ? 7129 ing_pkt_attr_uncmprsd_bits_g[unit].drop: 7130 egr_pkt_attr_uncmprsd_bits_g[unit].drop; 7131 } 7132 if (flex_attribute->ip_pkt != 0) { 7133 total_bits += ip_pkt_bits = 7134 (direction == bcmStatFlexDirectionIngress) ? 7135 ing_pkt_attr_uncmprsd_bits_g[unit].ip_pkt: 7136 egr_pkt_attr_uncmprsd_bits_g[unit].ip_pkt; 7137 } 7138 if (flex_attribute->udf != 0) { 7139 total_bits += flex_attribute->drop ? 7 : 8; 7140 } 7141 #if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TRIDENT3_SUPPORT) 7142 if (soc_feature(unit, soc_feature_flex_stat_egr_queue_congestion_marked)) { 7143 if (flex_attribute->mmu_cos != 0) { 7144 if (direction == bcmStatFlexDirectionIngress) { 7145 sal_free(attr); 7146 return BCM_E_PARAM; 7147 } 7148 total_bits += mmu_cos_bits = 7149 egr_pkt_attr_uncmprsd_bits_g[unit].mmu_cos; 7150 } 7151 if (flex_attribute->uc_queueing != 0) { 7152 if (direction == bcmStatFlexDirectionIngress) { 7153 sal_free(attr); 7154 return BCM_E_PARAM; 7155 } 7156 total_bits += uc_queueing_bits = 7157 egr_pkt_attr_uncmprsd_bits_g[unit].uc_queueing; 7158 } 7159 if (flex_attribute->congestion_marked != 0) { 7160 if (direction == bcmStatFlexDirectionIngress) { 7161 sal_free(attr); 7162 return BCM_E_PARAM; 7163 } 7164 total_bits += congestion_marked_bits = 7165 egr_pkt_attr_uncmprsd_bits_g[unit].congestion_marked; 7166 } 7167 } 7168 #endif 7169 if (soc_feature(unit, soc_feature_flex_stat_ing_tcp_flags_support)) { 7170 if (flex_attribute->tcp_flags != 0) { 7171 if (direction == bcmStatFlexDirectionEgress) { 7172 sal_free(attr); 7173 return BCM_E_PARAM; 7174 } 7175 total_bits += tcp_flags_bits = 7176 ing_pkt_attr_uncmprsd_bits_g[unit].tcp_flags; 7177 } 7178 } 7179 if (soc_feature(unit, soc_feature_flex_stat_int_cn_support)) { 7180 if (flex_attribute->int_cn != 0) { 7181 total_bits += int_cn_bits = 7182 (direction == bcmStatFlexDirectionIngress) ? 7183 ing_pkt_attr_uncmprsd_bits_g[unit].int_cn: 7184 egr_pkt_attr_uncmprsd_bits_g[unit].int_cn; 7185 } 7186 } 7187 7188 if (total_bits <= BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS ) { 7189 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, 7190 (BSL_META_U(unit, 7191 "INFO: UnCompressedMode Will be used \n"))); 7192 if (direction == bcmStatFlexDirectionIngress) { 7193 if (flags & BCM_STAT_GROUP_MODE_UDF) { 7194 ing_attr->packet_attr_type=bcmStatFlexPacketAttrTypeUdf; 7195 ing_udf_pkt_attr_selectors = &(ing_attr->udf_pkt_attr_selectors); 7196 ing_udf_pkt_attr_selectors->udf_pkt_attr_bits.udf0 = 7197 flex_attribute->udf_bitmap & 0Xffff; 7198 ing_udf_pkt_attr_selectors->udf_pkt_attr_bits.udf1= 7199 flex_attribute->udf_bitmap >> 16; 7200 ing_udf_pkt_attr_selectors->drop_enable = 7201 flex_attribute->drop ? 1 : 0; 7202 ing_udf_pkt_attr_selectors->total_counters = 7203 flex_attribute->total_counters; 7204 } else { 7205 ing_attr->packet_attr_type=bcmStatFlexPacketAttrTypeUncompressed; 7206 } 7207 if (soc_feature(unit, soc_feature_flex_stat_ing_tcp_flags_support)) { 7208 if (flex_attribute->tcp_flags != 0) { 7209 ing_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7210 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_TCP_FLAG_ATTR_BITS; 7211 } 7212 } 7213 if (soc_feature(unit, soc_feature_flex_stat_int_cn_support)) { 7214 if (flex_attribute->int_cn != 0) { 7215 ing_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7216 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_INT_CN_ATTR_BITS; 7217 } 7218 } 7219 #ifdef BCM_APACHE_SUPPORT 7220 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 7221 if (flex_attribute->cng_3 != 0) { 7222 ing_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7223 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_CNG_3_ATTR_BITS; 7224 } 7225 if (flex_attribute->phb_3 != 0) { 7226 ing_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7227 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PHB_3_ATTR_BITS; 7228 } 7229 if (flex_attribute->cng_2 != 0) { 7230 ing_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7231 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_CNG_2_ATTR_BITS; 7232 } 7233 if (flex_attribute->phb_2 != 0) { 7234 ing_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7235 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PHB_2_ATTR_BITS; 7236 } 7237 if (flex_attribute->cng_1 != 0) { 7238 ing_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7239 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_CNG_1_ATTR_BITS; 7240 } 7241 if (flex_attribute->phb_1 != 0) { 7242 ing_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7243 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PHB_1_ATTR_BITS; 7244 } 7245 } 7246 #endif 7247 if (flex_attribute->pre_ifp_color != 0) { 7248 ing_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7249 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_CNG_ATTR_BITS; 7250 } 7251 if (flex_attribute->ifp_color != 0) { 7252 ing_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7253 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_IFP_CNG_ATTR_BITS; 7254 } 7255 if (flex_attribute->int_pri != 0) { 7256 ing_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7257 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_INT_PRI_ATTR_BITS; 7258 } 7259 if (flex_attribute->vlan_format != 0) { 7260 ing_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7261 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_VLAN_FORMAT_ATTR_BITS; 7262 } 7263 if (flex_attribute->outer_dot1p != 0) { 7264 ing_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7265 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_OUTER_DOT1P_ATTR_BITS; 7266 } 7267 if (flex_attribute->inner_dot1p != 0) { 7268 ing_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7269 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_INNER_DOT1P_ATTR_BITS; 7270 } 7271 if (flex_attribute->port != 0) { 7272 ing_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7273 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_INGRESS_PORT_ATTR_BITS; 7274 } 7275 if (flex_attribute->tos_dscp != 0) { 7276 ing_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7277 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_TOS_DSCP_ATTR_BITS; 7278 } 7279 if (flex_attribute->tos_ecn != 0) { 7280 ing_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7281 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_TOS_ECN_ATTR_BITS; 7282 } 7283 if (flex_attribute->pkt_resolution != 0) { 7284 ing_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7285 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS; 7286 } 7287 if (flex_attribute->svp != 0) { 7288 ing_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7289 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_SVP_TYPE_ATTR_BITS; 7290 } 7291 if (flex_attribute->drop != 0) { 7292 ing_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7293 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_DROP_ATTR_BITS; 7294 } 7295 if (flex_attribute->ip_pkt != 0) { 7296 ing_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7297 BCM_STAT_FLEX_ING_UNCOMPRESSED_USE_IP_PKT_ATTR_BITS; 7298 } 7299 ing_attr->uncmprsd_attr_selectors.total_counters = 7300 flex_attribute->total_counters; 7301 /* Reset all Offset table fields */ 7302 for (index0 = 0; 7303 index0 < BCM_STAT_FLEX_MAX_COUNTERS_PER_MODE; 7304 index0++) { 7305 ing_attr->uncmprsd_attr_selectors.offset_table_map[index0]. 7306 offset = 0; 7307 /* IFP Flex stats on TH uses a mode with 0 bits being selected 7308 * for packet attributes. In this mode avoid disabling count_enable 7309 * for the first 'n' counters that will be allocated. 7310 */ 7311 if ((0 == total_bits) && 7312 (index0 < flex_attribute->total_counters)) { 7313 ing_attr->uncmprsd_attr_selectors.offset_table_map[index0]. 7314 count_enable = 1; 7315 } else { 7316 ing_attr->uncmprsd_attr_selectors.offset_table_map[index0]. 7317 count_enable = 0; 7318 } 7319 } 7320 } else { 7321 egr_attr->packet_attr_type=bcmStatFlexPacketAttrTypeUncompressed; 7322 if (soc_feature(unit, soc_feature_flex_stat_int_cn_support)) { 7323 if (flex_attribute->int_cn != 0) { 7324 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7325 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_INT_CN_ATTR_BITS; 7326 } 7327 } 7328 #ifdef BCM_APACHE_SUPPORT 7329 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 7330 if (flex_attribute->cng_3 != 0) { 7331 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7332 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_CNG_3_ATTR_BITS; 7333 } 7334 if (flex_attribute->phb_3 != 0) { 7335 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7336 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_PHB_3_ATTR_BITS; 7337 } 7338 if (flex_attribute->cng_2 != 0) { 7339 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7340 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_CNG_2_ATTR_BITS; 7341 } 7342 if (flex_attribute->phb_2 != 0) { 7343 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7344 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_PHB_2_ATTR_BITS; 7345 } 7346 if (flex_attribute->cng_1 != 0) { 7347 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7348 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_CNG_1_ATTR_BITS; 7349 } 7350 if (flex_attribute->phb_1 != 0) { 7351 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7352 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_PHB_1_ATTR_BITS; 7353 } 7354 } 7355 #endif 7356 if (flex_attribute->pre_ifp_color != 0) { 7357 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7358 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_CNG_ATTR_BITS; 7359 } 7360 if (flex_attribute->int_pri != 0) { 7361 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7362 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_INT_PRI_ATTR_BITS; 7363 } 7364 if (flex_attribute->vlan_format != 0) { 7365 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7366 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_VLAN_FORMAT_ATTR_BITS; 7367 } 7368 if (flex_attribute->outer_dot1p != 0) { 7369 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7370 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_OUTER_DOT1P_ATTR_BITS; 7371 } 7372 if (flex_attribute->inner_dot1p != 0) { 7373 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7374 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_INNER_DOT1P_ATTR_BITS; 7375 } 7376 if (flex_attribute->port != 0) { 7377 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7378 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_EGRESS_PORT_ATTR_BITS; 7379 } 7380 if (flex_attribute->tos_dscp != 0) { 7381 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7382 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_TOS_DSCP_ATTR_BITS; 7383 } 7384 if (flex_attribute->tos_ecn != 0) { 7385 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7386 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_TOS_ECN_ATTR_BITS; 7387 } 7388 if (flex_attribute->pkt_resolution != 0) { 7389 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7390 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_PKT_RESOLUTION_ATTR_BITS; 7391 } 7392 if (flex_attribute->svp != 0) { 7393 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7394 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_SVP_TYPE_ATTR_BITS; 7395 } 7396 if (flex_attribute->dvp != 0) { 7397 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7398 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_DVP_TYPE_ATTR_BITS; 7399 } 7400 if (flex_attribute->drop != 0) { 7401 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7402 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_DROP_ATTR_BITS; 7403 } 7404 if (flex_attribute->ip_pkt != 0) { 7405 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7406 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_IP_PKT_ATTR_BITS; 7407 } 7408 #if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TRIDENT3_SUPPORT) 7409 if (soc_feature(unit, soc_feature_flex_stat_egr_queue_congestion_marked)) { 7410 if (flex_attribute->mmu_cos != 0) { 7411 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7412 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_MMU_COS_ATTR_BITS; 7413 } 7414 if (flex_attribute->uc_queueing != 0) { 7415 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7416 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_UC_QUEUEING_ATTR_BITS; 7417 } 7418 if (flex_attribute->congestion_marked != 0) { 7419 egr_attr->uncmprsd_attr_selectors.uncmprsd_attr_bits_selector |= 7420 BCM_STAT_FLEX_EGR_UNCOMPRESSED_USE_CONGESTION_MARKED_ATTR_BITS; 7421 } 7422 } 7423 #endif 7424 egr_attr->uncmprsd_attr_selectors.total_counters = 7425 flex_attribute->total_counters; 7426 /* Reset all Offset table fields */ 7427 for (index0 = 0; 7428 index0 < BCM_STAT_FLEX_MAX_COUNTERS_PER_MODE; 7429 index0++) { 7430 egr_attr->uncmprsd_attr_selectors.offset_table_map[index0]. 7431 offset = 0; 7432 egr_attr->uncmprsd_attr_selectors.offset_table_map[index0]. 7433 count_enable = 0; 7434 } 7435 } 7436 7437 for (loop=0;loop<8;loop++) { 7438 offset_array[loop] = (uint16 *) sal_alloc((256+1) * sizeof(uint16),"offset_array"); 7439 if (offset_array[loop] == NULL) { 7440 rv = BCM_E_MEMORY; 7441 goto cleanup; 7442 } 7443 } 7444 /* Second Level Analysis: Update offset_array */ 7445 for (counter=0;counter < flex_attribute->total_counters ; counter ++ ) { 7446 for (loop=0;loop<8;loop++) { 7447 sal_memset(offset_array[loop],0,(256+1) * sizeof(uint16)); 7448 } 7449 /* Logical Group0 */ 7450 loop = 0; 7451 #ifdef BCM_APACHE_SUPPORT 7452 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 7453 if (flex_attribute->cng_3 != 0) { 7454 shift_by_bits = phb_3_bits + 7455 cng_2_bits + 7456 phb_2_bits + 7457 cng_1_bits + 7458 phb_1_bits + 7459 cng_bits + 7460 ifp_cng_bits + 7461 int_pri_bits + 7462 vlan_format_bits + 7463 outer_dot1p_bits + 7464 inner_dot1p_bits + 7465 port_bits + 7466 tos_dscp_bits + 7467 tos_ecn_bits + 7468 pkt_resolution_bits + 7469 svp_bits + 7470 dvp_bits + 7471 drop_bits + 7472 ip_pkt_bits ; 7473 temp_count = offset_array[loop][0]; 7474 if (flex_attribute->combine_attr_counter[counter]. 7475 pre_ifp_color_mpls_label3_flags & BCM_STAT_FLEX_COLOR_GREEN) { 7476 /* GreenIndex = 0*/ 7477 offset_array[loop][temp_count+1] = (0 << shift_by_bits); 7478 temp_count++; 7479 } 7480 if (flex_attribute->combine_attr_counter[counter]. 7481 pre_ifp_color_mpls_label3_flags & BCM_STAT_FLEX_COLOR_RED) { 7482 /* RedIndex = 1 */ 7483 offset_array[loop][temp_count+1] = (1 << shift_by_bits); 7484 temp_count++; 7485 } 7486 if (flex_attribute->combine_attr_counter[counter]. 7487 pre_ifp_color_mpls_label3_flags & BCM_STAT_FLEX_COLOR_YELLOW) { 7488 /* YellowIndex=3 */ 7489 offset_array[loop][temp_count+1] = (3 << shift_by_bits); 7490 temp_count++; 7491 } 7492 offset_array[loop][0] = temp_count; 7493 loop++; 7494 } 7495 if (flex_attribute->phb_3 != 0) { 7496 shift_by_bits = cng_2_bits + 7497 phb_2_bits + 7498 cng_1_bits + 7499 phb_1_bits + 7500 cng_bits + 7501 ifp_cng_bits + 7502 int_pri_bits + 7503 vlan_format_bits + 7504 outer_dot1p_bits + 7505 inner_dot1p_bits + 7506 port_bits + 7507 tos_dscp_bits + 7508 tos_ecn_bits + 7509 pkt_resolution_bits + 7510 svp_bits + 7511 dvp_bits + 7512 drop_bits + 7513 ip_pkt_bits ; 7514 temp_count = offset_array[loop][0]; 7515 if (flex_attribute->combine_attr_counter[counter]. 7516 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI0) { 7517 offset_array[loop][temp_count+1] = (0 << shift_by_bits); 7518 temp_count++; 7519 } 7520 if (flex_attribute->combine_attr_counter[counter]. 7521 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI1) { 7522 offset_array[loop][temp_count+1] = (1 << shift_by_bits); 7523 temp_count++; 7524 } 7525 if (flex_attribute->combine_attr_counter[counter]. 7526 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI2) { 7527 offset_array[loop][temp_count+1] = (2 << shift_by_bits); 7528 temp_count++; 7529 } 7530 if (flex_attribute->combine_attr_counter[counter]. 7531 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI3) { 7532 offset_array[loop][temp_count+1] = (3 << shift_by_bits); 7533 temp_count++; 7534 } 7535 if (flex_attribute->combine_attr_counter[counter]. 7536 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI4) { 7537 offset_array[loop][temp_count+1] = (4 << shift_by_bits); 7538 temp_count++; 7539 } 7540 if (flex_attribute->combine_attr_counter[counter]. 7541 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI5) { 7542 offset_array[loop][temp_count+1] = (5 << shift_by_bits); 7543 temp_count++; 7544 } 7545 if (flex_attribute->combine_attr_counter[counter]. 7546 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI6) { 7547 offset_array[loop][temp_count+1] = (6 << shift_by_bits); 7548 temp_count++; 7549 } 7550 if (flex_attribute->combine_attr_counter[counter]. 7551 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI7) { 7552 offset_array[loop][temp_count+1] = (7 << shift_by_bits); 7553 temp_count++; 7554 } 7555 if (flex_attribute->combine_attr_counter[counter]. 7556 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI8) { 7557 offset_array[loop][temp_count+1] = (8 << shift_by_bits); 7558 temp_count++; 7559 } 7560 if (flex_attribute->combine_attr_counter[counter]. 7561 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI9) { 7562 offset_array[loop][temp_count+1] = (9 << shift_by_bits); 7563 temp_count++; 7564 } 7565 if (flex_attribute->combine_attr_counter[counter]. 7566 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI10) { 7567 offset_array[loop][temp_count+1] = (10 << shift_by_bits); 7568 temp_count++; 7569 } 7570 if (flex_attribute->combine_attr_counter[counter]. 7571 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI11) { 7572 offset_array[loop][temp_count+1] = (11 << shift_by_bits); 7573 temp_count++; 7574 } 7575 if (flex_attribute->combine_attr_counter[counter]. 7576 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI12) { 7577 offset_array[loop][temp_count+1] = (12 << shift_by_bits); 7578 temp_count++; 7579 } 7580 if (flex_attribute->combine_attr_counter[counter]. 7581 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI13) { 7582 offset_array[loop][temp_count+1] = (13 << shift_by_bits); 7583 temp_count++; 7584 } 7585 if (flex_attribute->combine_attr_counter[counter]. 7586 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI14) { 7587 offset_array[loop][temp_count+1] = (14 << shift_by_bits); 7588 temp_count++; 7589 } 7590 if (flex_attribute->combine_attr_counter[counter]. 7591 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI15) { 7592 offset_array[loop][temp_count+1] = (15 << shift_by_bits); 7593 temp_count++; 7594 } 7595 offset_array[loop][0] = temp_count; 7596 loop++; 7597 } 7598 if (flex_attribute->cng_2 != 0) { 7599 shift_by_bits = phb_2_bits + 7600 cng_1_bits + 7601 phb_1_bits + 7602 cng_bits + 7603 ifp_cng_bits + 7604 int_pri_bits + 7605 vlan_format_bits + 7606 outer_dot1p_bits + 7607 inner_dot1p_bits + 7608 port_bits + 7609 tos_dscp_bits + 7610 tos_ecn_bits + 7611 pkt_resolution_bits + 7612 svp_bits + 7613 dvp_bits + 7614 drop_bits + 7615 ip_pkt_bits ; 7616 temp_count = offset_array[loop][0]; 7617 if (flex_attribute->combine_attr_counter[counter]. 7618 pre_ifp_color_mpls_label2_flags & BCM_STAT_FLEX_COLOR_GREEN) { 7619 /* GreenIndex=0*/ 7620 offset_array[loop][temp_count+1] = (0 << shift_by_bits); 7621 temp_count++; 7622 } 7623 if (flex_attribute->combine_attr_counter[counter]. 7624 pre_ifp_color_mpls_label2_flags & BCM_STAT_FLEX_COLOR_RED) { 7625 /* RedIndex=1 */ 7626 offset_array[loop][temp_count+1] = (1 << shift_by_bits); 7627 temp_count++; 7628 } 7629 if (flex_attribute->combine_attr_counter[counter]. 7630 pre_ifp_color_mpls_label2_flags & BCM_STAT_FLEX_COLOR_YELLOW) { 7631 /* YellowIndex=3 */ 7632 offset_array[loop][temp_count+1] = (3 << shift_by_bits); 7633 temp_count++; 7634 } 7635 offset_array[loop][0] = temp_count; 7636 loop++; 7637 } 7638 if (flex_attribute->phb_2 != 0) { 7639 shift_by_bits = cng_1_bits + 7640 phb_1_bits + 7641 cng_bits + 7642 ifp_cng_bits + 7643 int_pri_bits + 7644 vlan_format_bits + 7645 outer_dot1p_bits + 7646 inner_dot1p_bits + 7647 port_bits + 7648 tos_dscp_bits + 7649 tos_ecn_bits + 7650 pkt_resolution_bits + 7651 svp_bits + 7652 dvp_bits + 7653 drop_bits + 7654 ip_pkt_bits ; 7655 temp_count = offset_array[loop][0]; 7656 if (flex_attribute->combine_attr_counter[counter]. 7657 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI0) { 7658 offset_array[loop][temp_count+1] = (0 << shift_by_bits); 7659 temp_count++; 7660 } 7661 if (flex_attribute->combine_attr_counter[counter]. 7662 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI1) { 7663 offset_array[loop][temp_count+1] = (1 << shift_by_bits); 7664 temp_count++; 7665 } 7666 if (flex_attribute->combine_attr_counter[counter]. 7667 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI2) { 7668 offset_array[loop][temp_count+1] = (2 << shift_by_bits); 7669 temp_count++; 7670 } 7671 if (flex_attribute->combine_attr_counter[counter]. 7672 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI3) { 7673 offset_array[loop][temp_count+1] = (3 << shift_by_bits); 7674 temp_count++; 7675 } 7676 if (flex_attribute->combine_attr_counter[counter]. 7677 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI4) { 7678 offset_array[loop][temp_count+1] = (4 << shift_by_bits); 7679 temp_count++; 7680 } 7681 if (flex_attribute->combine_attr_counter[counter]. 7682 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI5) { 7683 offset_array[loop][temp_count+1] = (5 << shift_by_bits); 7684 temp_count++; 7685 } 7686 if (flex_attribute->combine_attr_counter[counter]. 7687 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI6) { 7688 offset_array[loop][temp_count+1] = (6 << shift_by_bits); 7689 temp_count++; 7690 } 7691 if (flex_attribute->combine_attr_counter[counter]. 7692 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI7) { 7693 offset_array[loop][temp_count+1] = (7 << shift_by_bits); 7694 temp_count++; 7695 } 7696 if (flex_attribute->combine_attr_counter[counter]. 7697 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI8) { 7698 offset_array[loop][temp_count+1] = (8 << shift_by_bits); 7699 temp_count++; 7700 } 7701 if (flex_attribute->combine_attr_counter[counter]. 7702 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI9) { 7703 offset_array[loop][temp_count+1] = (9 << shift_by_bits); 7704 temp_count++; 7705 } 7706 if (flex_attribute->combine_attr_counter[counter]. 7707 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI10) { 7708 offset_array[loop][temp_count+1] = (10 << shift_by_bits); 7709 temp_count++; 7710 } 7711 if (flex_attribute->combine_attr_counter[counter]. 7712 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI11) { 7713 offset_array[loop][temp_count+1] = (11 << shift_by_bits); 7714 temp_count++; 7715 } 7716 if (flex_attribute->combine_attr_counter[counter]. 7717 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI12) { 7718 offset_array[loop][temp_count+1] = (12 << shift_by_bits); 7719 temp_count++; 7720 } 7721 if (flex_attribute->combine_attr_counter[counter]. 7722 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI13) { 7723 offset_array[loop][temp_count+1] = (13 << shift_by_bits); 7724 temp_count++; 7725 } 7726 if (flex_attribute->combine_attr_counter[counter]. 7727 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI14) { 7728 offset_array[loop][temp_count+1] = (14 << shift_by_bits); 7729 temp_count++; 7730 } 7731 if (flex_attribute->combine_attr_counter[counter]. 7732 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI15) { 7733 offset_array[loop][temp_count+1] = (15 << shift_by_bits); 7734 temp_count++; 7735 } 7736 offset_array[loop][0] = temp_count; 7737 loop++; 7738 } 7739 if (flex_attribute->cng_1 != 0) { 7740 shift_by_bits = phb_1_bits + 7741 cng_bits + 7742 ifp_cng_bits + 7743 int_pri_bits + 7744 vlan_format_bits + 7745 outer_dot1p_bits + 7746 inner_dot1p_bits + 7747 port_bits + 7748 tos_dscp_bits + 7749 tos_ecn_bits + 7750 pkt_resolution_bits + 7751 svp_bits + 7752 dvp_bits + 7753 drop_bits + 7754 ip_pkt_bits ; 7755 temp_count = offset_array[loop][0]; 7756 if (flex_attribute->combine_attr_counter[counter]. 7757 pre_ifp_color_mpls_label1_flags & BCM_STAT_FLEX_COLOR_GREEN) { 7758 /* GreenIndex=0*/ 7759 offset_array[loop][temp_count+1] = (0 << shift_by_bits); 7760 temp_count++; 7761 } 7762 if (flex_attribute->combine_attr_counter[counter]. 7763 pre_ifp_color_mpls_label1_flags & BCM_STAT_FLEX_COLOR_RED) { 7764 /* RedIndex=1 */ 7765 offset_array[loop][temp_count+1] = (1 << shift_by_bits); 7766 temp_count++; 7767 } 7768 if (flex_attribute->combine_attr_counter[counter]. 7769 pre_ifp_color_mpls_label1_flags & BCM_STAT_FLEX_COLOR_YELLOW) { 7770 /* YellowIndex=3 */ 7771 offset_array[loop][temp_count+1] = (3 << shift_by_bits); 7772 temp_count++; 7773 } 7774 offset_array[loop][0] = temp_count; 7775 loop++; 7776 } 7777 if (flex_attribute->phb_1 != 0) { 7778 shift_by_bits = cng_bits + 7779 ifp_cng_bits + 7780 int_pri_bits + 7781 vlan_format_bits + 7782 outer_dot1p_bits + 7783 inner_dot1p_bits + 7784 port_bits + 7785 tos_dscp_bits + 7786 tos_ecn_bits + 7787 pkt_resolution_bits + 7788 svp_bits + 7789 dvp_bits + 7790 drop_bits + 7791 ip_pkt_bits ; 7792 temp_count = offset_array[loop][0]; 7793 if (flex_attribute->combine_attr_counter[counter]. 7794 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI0) { 7795 offset_array[loop][temp_count+1] = (0 << shift_by_bits); 7796 temp_count++; 7797 } 7798 if (flex_attribute->combine_attr_counter[counter]. 7799 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI1) { 7800 offset_array[loop][temp_count+1] = (1 << shift_by_bits); 7801 temp_count++; 7802 } 7803 if (flex_attribute->combine_attr_counter[counter]. 7804 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI2) { 7805 offset_array[loop][temp_count+1] = (2 << shift_by_bits); 7806 temp_count++; 7807 } 7808 if (flex_attribute->combine_attr_counter[counter]. 7809 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI3) { 7810 offset_array[loop][temp_count+1] = (3 << shift_by_bits); 7811 temp_count++; 7812 } 7813 if (flex_attribute->combine_attr_counter[counter]. 7814 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI4) { 7815 offset_array[loop][temp_count+1] = (4 << shift_by_bits); 7816 temp_count++; 7817 } 7818 if (flex_attribute->combine_attr_counter[counter]. 7819 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI5) { 7820 offset_array[loop][temp_count+1] = (5 << shift_by_bits); 7821 temp_count++; 7822 } 7823 if (flex_attribute->combine_attr_counter[counter]. 7824 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI6) { 7825 offset_array[loop][temp_count+1] = (6 << shift_by_bits); 7826 temp_count++; 7827 } 7828 if (flex_attribute->combine_attr_counter[counter]. 7829 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI7) { 7830 offset_array[loop][temp_count+1] = (7 << shift_by_bits); 7831 temp_count++; 7832 } 7833 if (flex_attribute->combine_attr_counter[counter]. 7834 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI8) { 7835 offset_array[loop][temp_count+1] = (8 << shift_by_bits); 7836 temp_count++; 7837 } 7838 if (flex_attribute->combine_attr_counter[counter]. 7839 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI9) { 7840 offset_array[loop][temp_count+1] = (9 << shift_by_bits); 7841 temp_count++; 7842 } 7843 if (flex_attribute->combine_attr_counter[counter]. 7844 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI10) { 7845 offset_array[loop][temp_count+1] = (10 << shift_by_bits); 7846 temp_count++; 7847 } 7848 if (flex_attribute->combine_attr_counter[counter]. 7849 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI11) { 7850 offset_array[loop][temp_count+1] = (11 << shift_by_bits); 7851 temp_count++; 7852 } 7853 if (flex_attribute->combine_attr_counter[counter]. 7854 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI12) { 7855 offset_array[loop][temp_count+1] = (12 << shift_by_bits); 7856 temp_count++; 7857 } 7858 if (flex_attribute->combine_attr_counter[counter]. 7859 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI13) { 7860 offset_array[loop][temp_count+1] = (13 << shift_by_bits); 7861 temp_count++; 7862 } 7863 if (flex_attribute->combine_attr_counter[counter]. 7864 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI14) { 7865 offset_array[loop][temp_count+1] = (14 << shift_by_bits); 7866 temp_count++; 7867 } 7868 if (flex_attribute->combine_attr_counter[counter]. 7869 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI15) { 7870 offset_array[loop][temp_count+1] = (15 << shift_by_bits); 7871 temp_count++; 7872 } 7873 offset_array[loop][0] = temp_count; 7874 loop++; 7875 } 7876 } 7877 #endif 7878 if ((flex_attribute->udf != 0) && 7879 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 7880 shift_by_bits = drop_bits; 7881 max_count = flex_attribute->drop ? 127 : 255; 7882 for (loop_index=0; loop_index <= max_count ; loop_index++) { 7883 if (BCM_STAT_FLEX_VALUE_GET( 7884 flex_attribute->combine_attr_counter[counter]. 7885 value_array[bcmStatFlexAttrUdf],loop_index)) { 7886 temp_count = offset_array[loop][0]; 7887 offset_array[loop][temp_count+1]= (loop_index 7888 << shift_by_bits); 7889 offset_array[loop][0] = temp_count+1; 7890 } 7891 } 7892 loop++; 7893 } 7894 7895 if (soc_feature(unit, soc_feature_flex_stat_int_cn_support)) { 7896 if ((flex_attribute->int_cn != 0) && 7897 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))){ 7898 shift_by_bits = tcp_flags_bits + 7899 ifp_cng_bits + 7900 int_pri_bits + 7901 vlan_format_bits + 7902 outer_dot1p_bits + 7903 inner_dot1p_bits + 7904 port_bits + 7905 tos_dscp_bits + 7906 tos_ecn_bits + 7907 pkt_resolution_bits + 7908 svp_bits + 7909 dvp_bits + 7910 drop_bits + 7911 ip_pkt_bits ; 7912 if (flex_attribute->combine_attr_counter[counter]. 7913 int_cn & BCM_STAT_FLEX_INT_CN0) { 7914 temp_count = offset_array[loop][0]; 7915 offset_array[loop][temp_count+1]= (0 7916 << shift_by_bits); 7917 offset_array[loop][0] = temp_count+1; 7918 } 7919 if (flex_attribute->combine_attr_counter[counter]. 7920 int_cn & BCM_STAT_FLEX_INT_CN1) { 7921 temp_count = offset_array[loop][0]; 7922 offset_array[loop][temp_count+1]= (1 7923 << shift_by_bits); 7924 offset_array[loop][0] = temp_count+1; 7925 } 7926 if (flex_attribute->combine_attr_counter[counter]. 7927 int_cn & BCM_STAT_FLEX_INT_CN2) { 7928 temp_count = offset_array[loop][0]; 7929 offset_array[loop][temp_count+1]= (2 7930 << shift_by_bits); 7931 offset_array[loop][0] = temp_count+1; 7932 } 7933 if (flex_attribute->combine_attr_counter[counter]. 7934 int_cn & BCM_STAT_FLEX_INT_CN3) { 7935 temp_count = offset_array[loop][0]; 7936 offset_array[loop][temp_count+1]= (3 7937 << shift_by_bits); 7938 offset_array[loop][0] = temp_count+1; 7939 } 7940 loop++; 7941 } 7942 } 7943 if (soc_feature(unit, soc_feature_flex_stat_ing_tcp_flags_support)) { 7944 if ((flex_attribute->tcp_flags != 0) && 7945 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))){ 7946 shift_by_bits = ifp_cng_bits + 7947 int_pri_bits + 7948 vlan_format_bits + 7949 outer_dot1p_bits + 7950 inner_dot1p_bits + 7951 port_bits + 7952 tos_dscp_bits + 7953 tos_ecn_bits + 7954 pkt_resolution_bits + 7955 svp_bits + 7956 dvp_bits + 7957 drop_bits + 7958 ip_pkt_bits ; 7959 if (flex_attribute->combine_attr_counter[counter]. 7960 tcp_flags & BCM_STAT_FLEX_TCP_FLAG_TYPE_SYN) { 7961 temp_count = offset_array[loop][0]; 7962 offset_array[loop][temp_count+1]= (BCM_STAT_FLEX_TCP_FLAG_TYPE_SYN 7963 << shift_by_bits); 7964 offset_array[loop][0] = temp_count+1; 7965 } 7966 if (flex_attribute->combine_attr_counter[counter]. 7967 tcp_flags & BCM_STAT_FLEX_TCP_FLAG_TYPE_FIN) { 7968 temp_count = offset_array[loop][0]; 7969 offset_array[loop][temp_count+1]= (BCM_STAT_FLEX_TCP_FLAG_TYPE_FIN 7970 << shift_by_bits); 7971 offset_array[loop][0] = temp_count+1; 7972 } 7973 if (flex_attribute->combine_attr_counter[counter]. 7974 tcp_flags & BCM_STAT_FLEX_TCP_FLAG_TYPE_RST) { 7975 temp_count = offset_array[loop][0]; 7976 offset_array[loop][temp_count+1]= (BCM_STAT_FLEX_TCP_FLAG_TYPE_RST 7977 << shift_by_bits); 7978 offset_array[loop][0] = temp_count+1; 7979 } 7980 if (flex_attribute->combine_attr_counter[counter]. 7981 tcp_flags & BCM_STAT_FLEX_TCP_FLAG_TYPE_PSH) { 7982 temp_count = offset_array[loop][0]; 7983 offset_array[loop][temp_count+1]= (BCM_STAT_FLEX_TCP_FLAG_TYPE_PSH 7984 << shift_by_bits); 7985 offset_array[loop][0] = temp_count+1; 7986 } 7987 if (flex_attribute->combine_attr_counter[counter]. 7988 tcp_flags & BCM_STAT_FLEX_TCP_FLAG_TYPE_ACK) { 7989 temp_count = offset_array[loop][0]; 7990 offset_array[loop][temp_count+1]= (BCM_STAT_FLEX_TCP_FLAG_TYPE_ACK 7991 << shift_by_bits); 7992 offset_array[loop][0] = temp_count+1; 7993 } 7994 if (flex_attribute->combine_attr_counter[counter]. 7995 tcp_flags & BCM_STAT_FLEX_TCP_FLAG_TYPE_URG) { 7996 temp_count = offset_array[loop][0]; 7997 offset_array[loop][temp_count+1]= (BCM_STAT_FLEX_TCP_FLAG_TYPE_URG 7998 << shift_by_bits); 7999 offset_array[loop][0] = temp_count+1; 8000 } 8001 if (flex_attribute->combine_attr_counter[counter]. 8002 tcp_flags & BCM_STAT_FLEX_TCP_FLAG_TYPE_ECE) { 8003 temp_count = offset_array[loop][0]; 8004 offset_array[loop][temp_count+1]= (BCM_STAT_FLEX_TCP_FLAG_TYPE_ECE 8005 << shift_by_bits); 8006 offset_array[loop][0] = temp_count+1; 8007 } 8008 if (flex_attribute->combine_attr_counter[counter]. 8009 tcp_flags & BCM_STAT_FLEX_TCP_FLAG_TYPE_CWR) { 8010 temp_count = offset_array[loop][0]; 8011 offset_array[loop][temp_count+1]= (BCM_STAT_FLEX_TCP_FLAG_TYPE_CWR 8012 << shift_by_bits); 8013 offset_array[loop][0] = temp_count+1; 8014 } 8015 8016 loop++; 8017 } 8018 } 8019 8020 #if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TRIDENT3_SUPPORT) 8021 if (soc_feature(unit, soc_feature_flex_stat_egr_queue_congestion_marked)) { 8022 if ((flex_attribute->mmu_cos != 0) && 8023 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 8024 shift_by_bits = uc_queueing_bits + 8025 congestion_marked_bits + 8026 ifp_cng_bits + 8027 int_pri_bits + 8028 vlan_format_bits + 8029 outer_dot1p_bits + 8030 inner_dot1p_bits + 8031 port_bits + 8032 tos_dscp_bits + 8033 tos_ecn_bits + 8034 pkt_resolution_bits + 8035 svp_bits + 8036 dvp_bits + 8037 drop_bits + 8038 ip_pkt_bits ; 8039 if (flex_attribute->combine_attr_counter[counter]. 8040 mmu_cos_flags & BCM_STAT_FLEX_COS0) { 8041 temp_count = offset_array[loop][0]; 8042 offset_array[loop][temp_count+1]= (0 << shift_by_bits); 8043 offset_array[loop][0] = temp_count+1; 8044 } 8045 if (flex_attribute->combine_attr_counter[counter]. 8046 mmu_cos_flags & BCM_STAT_FLEX_COS1) { 8047 temp_count = offset_array[loop][0]; 8048 offset_array[loop][temp_count+1]= (1 << shift_by_bits); 8049 offset_array[loop][0] = temp_count+1; 8050 } 8051 if (flex_attribute->combine_attr_counter[counter]. 8052 mmu_cos_flags & BCM_STAT_FLEX_COS2) { 8053 temp_count = offset_array[loop][0]; 8054 offset_array[loop][temp_count+1]= (2 << shift_by_bits); 8055 offset_array[loop][0] = temp_count+1; 8056 } 8057 if (flex_attribute->combine_attr_counter[counter]. 8058 mmu_cos_flags & BCM_STAT_FLEX_COS3) { 8059 temp_count = offset_array[loop][0]; 8060 offset_array[loop][temp_count+1]= (3 << shift_by_bits); 8061 offset_array[loop][0] = temp_count+1; 8062 } 8063 if (flex_attribute->combine_attr_counter[counter]. 8064 mmu_cos_flags & BCM_STAT_FLEX_COS4) { 8065 temp_count = offset_array[loop][0]; 8066 offset_array[loop][temp_count+1]= (4 << shift_by_bits); 8067 offset_array[loop][0] = temp_count+1; 8068 } 8069 if (flex_attribute->combine_attr_counter[counter]. 8070 mmu_cos_flags & BCM_STAT_FLEX_COS5) { 8071 temp_count = offset_array[loop][0]; 8072 offset_array[loop][temp_count+1]= (5 << shift_by_bits); 8073 offset_array[loop][0] = temp_count+1; 8074 } 8075 if (flex_attribute->combine_attr_counter[counter]. 8076 mmu_cos_flags & BCM_STAT_FLEX_COS6) { 8077 temp_count = offset_array[loop][0]; 8078 offset_array[loop][temp_count+1]= (6 << shift_by_bits); 8079 offset_array[loop][0] = temp_count+1; 8080 } 8081 if (flex_attribute->combine_attr_counter[counter]. 8082 mmu_cos_flags & BCM_STAT_FLEX_COS7) { 8083 temp_count = offset_array[loop][0]; 8084 offset_array[loop][temp_count+1]= (7 << shift_by_bits); 8085 offset_array[loop][0] = temp_count+1; 8086 } 8087 if (flex_attribute->combine_attr_counter[counter]. 8088 mmu_cos_flags & BCM_STAT_FLEX_COS8) { 8089 temp_count = offset_array[loop][0]; 8090 offset_array[loop][temp_count+1]= (8 << shift_by_bits); 8091 offset_array[loop][0] = temp_count+1; 8092 } 8093 if (flex_attribute->combine_attr_counter[counter]. 8094 mmu_cos_flags & BCM_STAT_FLEX_COS9) { 8095 temp_count = offset_array[loop][0]; 8096 offset_array[loop][temp_count+1]= (9 << shift_by_bits); 8097 offset_array[loop][0] = temp_count+1; 8098 } 8099 if (flex_attribute->combine_attr_counter[counter]. 8100 mmu_cos_flags & BCM_STAT_FLEX_COS10) { 8101 temp_count = offset_array[loop][0]; 8102 offset_array[loop][temp_count+1]= (10 << shift_by_bits); 8103 offset_array[loop][0] = temp_count+1; 8104 } 8105 if (flex_attribute->combine_attr_counter[counter]. 8106 mmu_cos_flags & BCM_STAT_FLEX_COS11) { 8107 temp_count = offset_array[loop][0]; 8108 offset_array[loop][temp_count+1]= (11 << shift_by_bits); 8109 offset_array[loop][0] = temp_count+1; 8110 } 8111 if (flex_attribute->combine_attr_counter[counter]. 8112 mmu_cos_flags & BCM_STAT_FLEX_COS12) { 8113 temp_count = offset_array[loop][0]; 8114 offset_array[loop][temp_count+1]= (12 << shift_by_bits); 8115 offset_array[loop][0] = temp_count+1; 8116 } 8117 if (flex_attribute->combine_attr_counter[counter]. 8118 mmu_cos_flags & BCM_STAT_FLEX_COS13) { 8119 temp_count = offset_array[loop][0]; 8120 offset_array[loop][temp_count+1]= (13 << shift_by_bits); 8121 offset_array[loop][0] = temp_count+1; 8122 } 8123 if (flex_attribute->combine_attr_counter[counter]. 8124 mmu_cos_flags & BCM_STAT_FLEX_COS14) { 8125 temp_count = offset_array[loop][0]; 8126 offset_array[loop][temp_count+1]= (14 << shift_by_bits); 8127 offset_array[loop][0] = temp_count+1; 8128 } 8129 if (flex_attribute->combine_attr_counter[counter]. 8130 mmu_cos_flags & BCM_STAT_FLEX_COS15) { 8131 temp_count = offset_array[loop][0]; 8132 offset_array[loop][temp_count+1]= (15 << shift_by_bits); 8133 offset_array[loop][0] = temp_count+1; 8134 } 8135 loop++; 8136 } 8137 if ((flex_attribute->uc_queueing != 0) && 8138 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 8139 shift_by_bits = congestion_marked_bits + 8140 ifp_cng_bits + 8141 int_pri_bits + 8142 vlan_format_bits + 8143 outer_dot1p_bits + 8144 inner_dot1p_bits + 8145 port_bits + 8146 tos_dscp_bits + 8147 tos_ecn_bits + 8148 pkt_resolution_bits + 8149 svp_bits + 8150 dvp_bits + 8151 drop_bits + 8152 ip_pkt_bits ; 8153 if (flex_attribute->combine_attr_counter[counter]. 8154 uc_queueing_flags & BCM_STAT_FLEX_UC_QUEUEING_DISABLE) { 8155 temp_count = offset_array[loop][0]; 8156 offset_array[loop][temp_count+1]= (0 << shift_by_bits); 8157 offset_array[loop][0] = temp_count+1; 8158 } 8159 if (flex_attribute->combine_attr_counter[counter]. 8160 uc_queueing_flags & BCM_STAT_FLEX_UC_QUEUEING_ENABLE) { 8161 temp_count = offset_array[loop][0]; 8162 offset_array[loop][temp_count+1]= (1 << shift_by_bits); 8163 offset_array[loop][0] = temp_count+1; 8164 } 8165 loop++; 8166 } 8167 if ((flex_attribute->congestion_marked != 0) && 8168 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 8169 shift_by_bits = ifp_cng_bits + 8170 int_pri_bits + 8171 vlan_format_bits + 8172 outer_dot1p_bits + 8173 inner_dot1p_bits + 8174 port_bits + 8175 tos_dscp_bits + 8176 tos_ecn_bits + 8177 pkt_resolution_bits + 8178 svp_bits + 8179 dvp_bits + 8180 drop_bits + 8181 ip_pkt_bits ; 8182 if (flex_attribute->combine_attr_counter[counter]. 8183 congestion_marked_flags & BCM_STAT_FLEX_CONGESTION_MARKED_DISABLE) { 8184 temp_count = offset_array[loop][0]; 8185 offset_array[loop][temp_count+1]= (0 << shift_by_bits); 8186 offset_array[loop][0] = temp_count+1; 8187 } 8188 if (flex_attribute->combine_attr_counter[counter]. 8189 congestion_marked_flags & BCM_STAT_FLEX_CONGESTION_MARKED_ENABLE) { 8190 temp_count = offset_array[loop][0]; 8191 offset_array[loop][temp_count+1]= (1 << shift_by_bits); 8192 offset_array[loop][0] = temp_count+1; 8193 } 8194 loop++; 8195 } 8196 } 8197 #endif 8198 if ((flex_attribute->pre_ifp_color != 0) && 8199 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 8200 shift_by_bits = ifp_cng_bits + 8201 int_pri_bits + 8202 vlan_format_bits + 8203 outer_dot1p_bits + 8204 inner_dot1p_bits + 8205 port_bits + 8206 tos_dscp_bits + 8207 tos_ecn_bits + 8208 pkt_resolution_bits + 8209 svp_bits + 8210 dvp_bits + 8211 drop_bits + 8212 ip_pkt_bits ; 8213 if (flex_attribute->combine_attr_counter[counter]. 8214 pre_ifp_color_flags & BCM_STAT_FLEX_COLOR_GREEN) { 8215 temp_count = offset_array[loop][0]; 8216 /* GreenIndex=0*/ 8217 offset_array[loop][temp_count+1] = (0 << shift_by_bits); 8218 offset_array[loop][0] = temp_count+1; 8219 } 8220 if (flex_attribute->combine_attr_counter[counter]. 8221 pre_ifp_color_flags & BCM_STAT_FLEX_COLOR_RED) { 8222 temp_count = offset_array[loop][0]; 8223 /* RedIndex=1 */ 8224 offset_array[loop][temp_count+1]= (1 << shift_by_bits); 8225 offset_array[loop][0] = temp_count+1; 8226 } 8227 if (flex_attribute->combine_attr_counter[counter]. 8228 pre_ifp_color_flags & BCM_STAT_FLEX_COLOR_YELLOW) { 8229 temp_count = offset_array[loop][0]; 8230 /* YellowIndex=3 */ 8231 offset_array[loop][temp_count+1]= (3 << shift_by_bits); 8232 offset_array[loop][0] = temp_count+1; 8233 } 8234 loop++; 8235 } 8236 if ((flex_attribute->ifp_color != 0) && 8237 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 8238 shift_by_bits = int_pri_bits + 8239 vlan_format_bits + 8240 outer_dot1p_bits + 8241 inner_dot1p_bits + 8242 port_bits + 8243 tos_dscp_bits + 8244 tos_ecn_bits + 8245 pkt_resolution_bits + 8246 svp_bits + 8247 dvp_bits + 8248 drop_bits + 8249 ip_pkt_bits ; 8250 if (flex_attribute->combine_attr_counter[counter]. 8251 ifp_color_flags & BCM_STAT_FLEX_COLOR_GREEN) { 8252 temp_count = offset_array[loop][0]; 8253 /* GreenIndex=0*/ 8254 offset_array[loop][temp_count+1] = (0 << shift_by_bits); 8255 offset_array[loop][0] = temp_count+1; 8256 } 8257 if (flex_attribute->combine_attr_counter[counter]. 8258 ifp_color_flags & BCM_STAT_FLEX_COLOR_RED) { 8259 temp_count = offset_array[loop][0]; 8260 /* RedIndex=1 */ 8261 offset_array[loop][temp_count+1]= (1 << shift_by_bits); 8262 offset_array[loop][0] = temp_count+1; 8263 } 8264 if (flex_attribute->combine_attr_counter[counter]. 8265 ifp_color_flags & BCM_STAT_FLEX_COLOR_YELLOW) { 8266 temp_count = offset_array[loop][0]; 8267 /* YellowIndex=3 */ 8268 offset_array[loop][temp_count+1]= (3 << shift_by_bits); 8269 offset_array[loop][0] = temp_count+1; 8270 } 8271 loop++; 8272 } 8273 if ((flex_attribute->int_pri != 0) && 8274 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 8275 shift_by_bits = vlan_format_bits + 8276 outer_dot1p_bits + 8277 inner_dot1p_bits + 8278 port_bits + 8279 tos_dscp_bits + 8280 tos_ecn_bits + 8281 pkt_resolution_bits + 8282 svp_bits + 8283 dvp_bits + 8284 drop_bits + 8285 ip_pkt_bits ; 8286 if (flex_attribute->combine_attr_counter[counter]. 8287 int_pri_flags & BCM_STAT_FLEX_PRI0) { 8288 temp_count = offset_array[loop][0]; 8289 offset_array[loop][temp_count+1]= (0 << shift_by_bits); 8290 offset_array[loop][0] = temp_count+1; 8291 } 8292 if (flex_attribute->combine_attr_counter[counter]. 8293 int_pri_flags & BCM_STAT_FLEX_PRI1) { 8294 temp_count = offset_array[loop][0]; 8295 offset_array[loop][temp_count+1]= (1 << shift_by_bits); 8296 offset_array[loop][0] = temp_count+1; 8297 } 8298 if (flex_attribute->combine_attr_counter[counter]. 8299 int_pri_flags & BCM_STAT_FLEX_PRI2) { 8300 temp_count = offset_array[loop][0]; 8301 offset_array[loop][temp_count+1]= (2 << shift_by_bits); 8302 offset_array[loop][0] = temp_count+1; 8303 } 8304 if (flex_attribute->combine_attr_counter[counter]. 8305 int_pri_flags & BCM_STAT_FLEX_PRI3) { 8306 temp_count = offset_array[loop][0]; 8307 offset_array[loop][temp_count+1]= (3 << shift_by_bits); 8308 offset_array[loop][0] = temp_count+1; 8309 } 8310 if (flex_attribute->combine_attr_counter[counter]. 8311 int_pri_flags & BCM_STAT_FLEX_PRI4) { 8312 temp_count = offset_array[loop][0]; 8313 offset_array[loop][temp_count+1]= (4 << shift_by_bits); 8314 offset_array[loop][0] = temp_count+1; 8315 } 8316 if (flex_attribute->combine_attr_counter[counter]. 8317 int_pri_flags & BCM_STAT_FLEX_PRI5) { 8318 temp_count = offset_array[loop][0]; 8319 offset_array[loop][temp_count+1]= (5 << shift_by_bits); 8320 offset_array[loop][0] = temp_count+1; 8321 } 8322 if (flex_attribute->combine_attr_counter[counter]. 8323 int_pri_flags & BCM_STAT_FLEX_PRI6) { 8324 temp_count = offset_array[loop][0]; 8325 offset_array[loop][temp_count+1]= (6 << shift_by_bits); 8326 offset_array[loop][0] = temp_count+1; 8327 } 8328 if (flex_attribute->combine_attr_counter[counter]. 8329 int_pri_flags & BCM_STAT_FLEX_PRI7) { 8330 temp_count = offset_array[loop][0]; 8331 offset_array[loop][temp_count+1]= (7 << shift_by_bits); 8332 offset_array[loop][0] = temp_count+1; 8333 } 8334 if (flex_attribute->combine_attr_counter[counter]. 8335 int_pri_flags & BCM_STAT_FLEX_PRI8) { 8336 temp_count = offset_array[loop][0]; 8337 offset_array[loop][temp_count+1]= (8 << shift_by_bits); 8338 offset_array[loop][0] = temp_count+1; 8339 } 8340 if (flex_attribute->combine_attr_counter[counter]. 8341 int_pri_flags & BCM_STAT_FLEX_PRI9) { 8342 temp_count = offset_array[loop][0]; 8343 offset_array[loop][temp_count+1]= (9 << shift_by_bits); 8344 offset_array[loop][0] = temp_count+1; 8345 } 8346 if (flex_attribute->combine_attr_counter[counter]. 8347 int_pri_flags & BCM_STAT_FLEX_PRI10) { 8348 temp_count = offset_array[loop][0]; 8349 offset_array[loop][temp_count+1]= (10 << shift_by_bits); 8350 offset_array[loop][0] = temp_count+1; 8351 } 8352 if (flex_attribute->combine_attr_counter[counter]. 8353 int_pri_flags & BCM_STAT_FLEX_PRI11) { 8354 temp_count = offset_array[loop][0]; 8355 offset_array[loop][temp_count+1]= (11 << shift_by_bits); 8356 offset_array[loop][0] = temp_count+1; 8357 } 8358 if (flex_attribute->combine_attr_counter[counter]. 8359 int_pri_flags & BCM_STAT_FLEX_PRI12) { 8360 temp_count = offset_array[loop][0]; 8361 offset_array[loop][temp_count+1]= (12 << shift_by_bits); 8362 offset_array[loop][0] = temp_count+1; 8363 } 8364 if (flex_attribute->combine_attr_counter[counter]. 8365 int_pri_flags & BCM_STAT_FLEX_PRI13) { 8366 temp_count = offset_array[loop][0]; 8367 offset_array[loop][temp_count+1]= (13 << shift_by_bits); 8368 offset_array[loop][0] = temp_count+1; 8369 } 8370 if (flex_attribute->combine_attr_counter[counter]. 8371 int_pri_flags & BCM_STAT_FLEX_PRI14) { 8372 temp_count = offset_array[loop][0]; 8373 offset_array[loop][temp_count+1]= (14 << shift_by_bits); 8374 offset_array[loop][0] = temp_count+1; 8375 } 8376 if (flex_attribute->combine_attr_counter[counter]. 8377 int_pri_flags & BCM_STAT_FLEX_PRI15) { 8378 temp_count = offset_array[loop][0]; 8379 offset_array[loop][temp_count+1]= (15 << shift_by_bits); 8380 offset_array[loop][0] = temp_count+1; 8381 } 8382 loop++; 8383 } 8384 /* LogicalGroup1 */ 8385 if ((flex_attribute->vlan_format != 0) && 8386 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 8387 shift_by_bits = outer_dot1p_bits + 8388 inner_dot1p_bits + 8389 port_bits + 8390 tos_dscp_bits + 8391 tos_ecn_bits + 8392 pkt_resolution_bits + 8393 svp_bits + 8394 dvp_bits + 8395 drop_bits + 8396 ip_pkt_bits ; 8397 if (flex_attribute->combine_attr_counter[counter]. 8398 vlan_format_flags & BCM_STAT_FLEX_VLAN_FORMAT_UNTAGGED) { 8399 temp_count = offset_array[loop][0]; 8400 offset_array[loop][temp_count+1]= (0 << shift_by_bits); 8401 offset_array[loop][0] = temp_count+1; 8402 } 8403 if (flex_attribute->combine_attr_counter[counter]. 8404 vlan_format_flags & BCM_STAT_FLEX_VLAN_FORMAT_INNER) { 8405 temp_count = offset_array[loop][0]; 8406 offset_array[loop][temp_count+1]= (1 << shift_by_bits); 8407 offset_array[loop][0] = temp_count+1; 8408 } 8409 if (flex_attribute->combine_attr_counter[counter]. 8410 vlan_format_flags & BCM_STAT_FLEX_VLAN_FORMAT_OUTER) { 8411 temp_count = offset_array[loop][0]; 8412 offset_array[loop][temp_count+1]= (2 << shift_by_bits); 8413 offset_array[loop][0] = temp_count+1; 8414 } 8415 if (flex_attribute->combine_attr_counter[counter]. 8416 vlan_format_flags & BCM_STAT_FLEX_VLAN_FORMAT_BOTH) { 8417 temp_count = offset_array[loop][0]; 8418 offset_array[loop][temp_count+1]= (3 << shift_by_bits); 8419 offset_array[loop][0] = temp_count+1; 8420 } 8421 loop++; 8422 } 8423 if ((flex_attribute->outer_dot1p != 0) && 8424 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 8425 shift_by_bits = inner_dot1p_bits + 8426 port_bits + 8427 tos_dscp_bits + 8428 tos_ecn_bits + 8429 pkt_resolution_bits + 8430 svp_bits + 8431 dvp_bits + 8432 drop_bits + 8433 ip_pkt_bits ; 8434 if (flex_attribute->combine_attr_counter[counter]. 8435 outer_dot1p_flags & BCM_STAT_FLEX_PRI0) { 8436 temp_count = offset_array[loop][0]; 8437 offset_array[loop][temp_count+1]= (0 << shift_by_bits); 8438 offset_array[loop][0] = temp_count+1; 8439 } 8440 if (flex_attribute->combine_attr_counter[counter]. 8441 outer_dot1p_flags & BCM_STAT_FLEX_PRI1) { 8442 temp_count = offset_array[loop][0]; 8443 offset_array[loop][temp_count+1]= (1 << shift_by_bits); 8444 offset_array[loop][0] = temp_count+1; 8445 } 8446 if (flex_attribute->combine_attr_counter[counter]. 8447 outer_dot1p_flags & BCM_STAT_FLEX_PRI2) { 8448 temp_count = offset_array[loop][0]; 8449 offset_array[loop][temp_count+1]= (2 << shift_by_bits); 8450 offset_array[loop][0] = temp_count+1; 8451 } 8452 if (flex_attribute->combine_attr_counter[counter]. 8453 outer_dot1p_flags & BCM_STAT_FLEX_PRI3) { 8454 temp_count = offset_array[loop][0]; 8455 offset_array[loop][temp_count+1]= (3 << shift_by_bits); 8456 offset_array[loop][0] = temp_count+1; 8457 } 8458 if (flex_attribute->combine_attr_counter[counter]. 8459 outer_dot1p_flags & BCM_STAT_FLEX_PRI4) { 8460 temp_count = offset_array[loop][0]; 8461 offset_array[loop][temp_count+1]= (4 << shift_by_bits); 8462 offset_array[loop][0] = temp_count+1; 8463 } 8464 if (flex_attribute->combine_attr_counter[counter]. 8465 outer_dot1p_flags & BCM_STAT_FLEX_PRI5) { 8466 temp_count = offset_array[loop][0]; 8467 offset_array[loop][temp_count+1]= (5 << shift_by_bits); 8468 offset_array[loop][0] = temp_count+1; 8469 } 8470 if (flex_attribute->combine_attr_counter[counter]. 8471 outer_dot1p_flags & BCM_STAT_FLEX_PRI6) { 8472 temp_count = offset_array[loop][0]; 8473 offset_array[loop][temp_count+1]= (6 << shift_by_bits); 8474 offset_array[loop][0] = temp_count+1; 8475 } 8476 if (flex_attribute->combine_attr_counter[counter]. 8477 outer_dot1p_flags & BCM_STAT_FLEX_PRI7) { 8478 temp_count = offset_array[loop][0]; 8479 offset_array[loop][temp_count+1]= (7 << shift_by_bits); 8480 offset_array[loop][0] = temp_count+1; 8481 } 8482 loop++; 8483 } 8484 if ((flex_attribute->inner_dot1p != 0) && 8485 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 8486 shift_by_bits = port_bits + 8487 tos_dscp_bits + 8488 tos_ecn_bits + 8489 pkt_resolution_bits + 8490 svp_bits + 8491 dvp_bits + 8492 drop_bits + 8493 ip_pkt_bits ; 8494 if (flex_attribute->combine_attr_counter[counter]. 8495 inner_dot1p_flags & BCM_STAT_FLEX_PRI0) { 8496 temp_count = offset_array[loop][0]; 8497 offset_array[loop][temp_count+1]= (0 << shift_by_bits); 8498 offset_array[loop][0] = temp_count+1; 8499 } 8500 if (flex_attribute->combine_attr_counter[counter]. 8501 inner_dot1p_flags & BCM_STAT_FLEX_PRI1) { 8502 temp_count = offset_array[loop][0]; 8503 offset_array[loop][temp_count+1]= (1 << shift_by_bits); 8504 offset_array[loop][0] = temp_count+1; 8505 } 8506 if (flex_attribute->combine_attr_counter[counter]. 8507 inner_dot1p_flags & BCM_STAT_FLEX_PRI2) { 8508 temp_count = offset_array[loop][0]; 8509 offset_array[loop][temp_count+1]= (2 << shift_by_bits); 8510 offset_array[loop][0] = temp_count+1; 8511 } 8512 if (flex_attribute->combine_attr_counter[counter]. 8513 inner_dot1p_flags & BCM_STAT_FLEX_PRI3) { 8514 temp_count = offset_array[loop][0]; 8515 offset_array[loop][temp_count+1]= (3 << shift_by_bits); 8516 offset_array[loop][0] = temp_count+1; 8517 } 8518 if (flex_attribute->combine_attr_counter[counter]. 8519 inner_dot1p_flags & BCM_STAT_FLEX_PRI4) { 8520 temp_count = offset_array[loop][0]; 8521 offset_array[loop][temp_count+1]= (4 << shift_by_bits); 8522 offset_array[loop][0] = temp_count+1; 8523 } 8524 if (flex_attribute->combine_attr_counter[counter]. 8525 inner_dot1p_flags & BCM_STAT_FLEX_PRI5) { 8526 temp_count = offset_array[loop][0]; 8527 offset_array[loop][temp_count+1]= (5 << shift_by_bits); 8528 offset_array[loop][0] = temp_count+1; 8529 } 8530 if (flex_attribute->combine_attr_counter[counter]. 8531 inner_dot1p_flags & BCM_STAT_FLEX_PRI6) { 8532 temp_count = offset_array[loop][0]; 8533 offset_array[loop][temp_count+1]= (6 << shift_by_bits); 8534 offset_array[loop][0] = temp_count+1; 8535 } 8536 if (flex_attribute->combine_attr_counter[counter]. 8537 inner_dot1p_flags & BCM_STAT_FLEX_PRI7) { 8538 temp_count = offset_array[loop][0]; 8539 offset_array[loop][temp_count+1]= (7 << shift_by_bits); 8540 offset_array[loop][0] = temp_count+1; 8541 } 8542 loop++; 8543 } 8544 /* LogicalGroup2 */ 8545 if ((flex_attribute->port != 0) && 8546 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 8547 shift_by_bits = tos_dscp_bits + 8548 tos_ecn_bits + 8549 pkt_resolution_bits + 8550 svp_bits + 8551 dvp_bits + 8552 drop_bits + 8553 ip_pkt_bits ; 8554 if (direction == bcmStatFlexDirectionIngress) { 8555 max_count= (1 << ing_pkt_attr_uncmprsd_bits_g[unit].ing_port) - 1; 8556 } else { 8557 max_count= (1 << egr_pkt_attr_uncmprsd_bits_g[unit].egr_port) - 1; 8558 } 8559 for (loop_index=0; loop_index <= max_count ; loop_index++) { 8560 if (BCM_STAT_FLEX_VALUE_GET( 8561 flex_attribute->combine_attr_counter[counter]. 8562 value_array[bcmStatFlexAttrPort],loop_index)) { 8563 temp_count = offset_array[loop][0]; 8564 offset_array[loop][temp_count+1]= (loop_index /*value*/ 8565 << shift_by_bits); 8566 offset_array[loop][0] = temp_count+1; 8567 } 8568 } 8569 loop++; 8570 } 8571 /* LogicalGroup3 */ 8572 if ((flex_attribute->tos_dscp != 0) && 8573 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 8574 shift_by_bits = tos_ecn_bits + 8575 pkt_resolution_bits + 8576 svp_bits + 8577 dvp_bits + 8578 drop_bits + 8579 ip_pkt_bits ; 8580 if (direction == bcmStatFlexDirectionIngress) { 8581 max_count= (1 << ing_pkt_attr_uncmprsd_bits_g[unit].tos_dscp) - 1; 8582 } else { 8583 max_count= (1 << egr_pkt_attr_uncmprsd_bits_g[unit].tos_dscp) - 1; 8584 } 8585 for (loop_index=0; loop_index <= max_count ; loop_index++) { 8586 if (BCM_STAT_FLEX_VALUE_GET( 8587 flex_attribute->combine_attr_counter[counter]. 8588 value_array[bcmStatFlexAttrTosDscp],loop_index)) { 8589 temp_count = offset_array[loop][0]; 8590 offset_array[loop][temp_count+1]= (loop_index /*value*/ 8591 << (shift_by_bits)); 8592 offset_array[loop][0] = temp_count+1; 8593 } 8594 } 8595 loop++; 8596 } 8597 if ((flex_attribute->tos_ecn != 0) && 8598 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 8599 shift_by_bits = pkt_resolution_bits + 8600 svp_bits + 8601 dvp_bits + 8602 drop_bits + 8603 ip_pkt_bits ; 8604 if (direction == bcmStatFlexDirectionIngress) { 8605 max_count= (1 << ing_pkt_attr_uncmprsd_bits_g[unit].tos_ecn) - 1; 8606 } else { 8607 max_count= (1 << egr_pkt_attr_uncmprsd_bits_g[unit].tos_ecn) - 1; 8608 } 8609 for (loop_index=0; loop_index <= max_count ; loop_index++) { 8610 if (BCM_STAT_FLEX_VALUE_GET( 8611 flex_attribute->combine_attr_counter[counter]. 8612 value_array[bcmStatFlexAttrTosEcn],loop_index)) { 8613 temp_count = offset_array[loop][0]; 8614 offset_array[loop][temp_count+1]= (loop_index /*value*/ 8615 << (shift_by_bits)); 8616 offset_array[loop][0] = temp_count+1; 8617 } 8618 } 8619 loop++; 8620 } 8621 /* LogicalGroup4 */ 8622 if ((flex_attribute->pkt_resolution != 0) && 8623 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 8624 shift_by_bits = svp_bits + 8625 dvp_bits + 8626 drop_bits + 8627 ip_pkt_bits ; 8628 if (flex_attribute->combine_attr_counter[counter]. 8629 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_PKT) { 8630 temp_count = offset_array[loop][0]; 8631 offset_array[loop][temp_count+1]= (unknown_pkt << 8632 shift_by_bits); 8633 offset_array[loop][0] = temp_count+1; 8634 } 8635 if (flex_attribute->combine_attr_counter[counter]. 8636 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_CONTROL_PKT) { 8637 temp_count = offset_array[loop][0]; 8638 offset_array[loop][temp_count+1]= (control_pkt << 8639 shift_by_bits); 8640 offset_array[loop][0] = temp_count+1; 8641 } 8642 if (flex_attribute->combine_attr_counter[counter]. 8643 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_OAM_PKT) { 8644 temp_count = offset_array[loop][0]; 8645 offset_array[loop][temp_count+1]= (oam_pkt << 8646 shift_by_bits); 8647 offset_array[loop][0] = temp_count+1; 8648 } 8649 if (flex_attribute->combine_attr_counter[counter]. 8650 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_BFD_PKT) { 8651 temp_count = offset_array[loop][0]; 8652 offset_array[loop][temp_count+1]= (bfd_pkt << 8653 shift_by_bits); 8654 offset_array[loop][0] = temp_count+1; 8655 } 8656 if (flex_attribute->combine_attr_counter[counter]. 8657 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_BPDU_PKT) { 8658 temp_count = offset_array[loop][0]; 8659 offset_array[loop][temp_count+1]= (bpdu_pkt << 8660 shift_by_bits); 8661 offset_array[loop][0] = temp_count+1; 8662 } 8663 if (flex_attribute->combine_attr_counter[counter]. 8664 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_ICNM_PKT) { 8665 temp_count = offset_array[loop][0]; 8666 offset_array[loop][temp_count+1]= (icnm_pkt << 8667 shift_by_bits); 8668 offset_array[loop][0] = temp_count+1; 8669 } 8670 if (flex_attribute->combine_attr_counter[counter]. 8671 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_PKT_IS_1588) { 8672 temp_count = offset_array[loop][0]; 8673 offset_array[loop][temp_count+1]= (_1588_pkt << 8674 shift_by_bits); 8675 offset_array[loop][0] = temp_count+1; 8676 } 8677 if (flex_attribute->combine_attr_counter[counter]. 8678 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_BFD_PKT) { 8679 temp_count = offset_array[loop][0]; 8680 offset_array[loop][temp_count+1]= (bfd_pkt << 8681 shift_by_bits); 8682 offset_array[loop][0] = temp_count+1; 8683 } 8684 if (flex_attribute->combine_attr_counter[counter]. 8685 pkt_resolution_flags & 8686 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2UC_PKT) { 8687 temp_count = offset_array[loop][0]; 8688 offset_array[loop][temp_count+1]= (known_l2uc_pkt << 8689 shift_by_bits); 8690 offset_array[loop][0] = temp_count+1; 8691 } 8692 if (flex_attribute->combine_attr_counter[counter]. 8693 pkt_resolution_flags & 8694 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L2UC_PKT) { 8695 temp_count = offset_array[loop][0]; 8696 offset_array[loop][temp_count+1]= (unknown_l2uc_pkt << 8697 shift_by_bits); 8698 offset_array[loop][0] = temp_count+1; 8699 } 8700 if (flex_attribute->combine_attr_counter[counter]. 8701 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_L2BC_PKT) { 8702 temp_count = offset_array[loop][0]; 8703 offset_array[loop][temp_count+1]= (l2bc_pkt << 8704 shift_by_bits); 8705 offset_array[loop][0] = temp_count+1; 8706 } 8707 if (flex_attribute->combine_attr_counter[counter]. 8708 pkt_resolution_flags & 8709 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2MC_PKT) { 8710 temp_count = offset_array[loop][0]; 8711 offset_array[loop][temp_count+1]= (known_l2mc_pkt << 8712 shift_by_bits); 8713 offset_array[loop][0] = temp_count+1; 8714 } 8715 if (flex_attribute->combine_attr_counter[counter]. 8716 pkt_resolution_flags & 8717 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L2MC_PKT) { 8718 temp_count = offset_array[loop][0]; 8719 offset_array[loop][temp_count+1]= (unknown_l2mc_pkt << 8720 shift_by_bits); 8721 offset_array[loop][0] = temp_count+1; 8722 } 8723 if (flex_attribute->combine_attr_counter[counter]. 8724 pkt_resolution_flags & 8725 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L3UC_PKT) { 8726 temp_count = offset_array[loop][0]; 8727 offset_array[loop][temp_count+1]= (known_l3uc_pkt << 8728 shift_by_bits); 8729 offset_array[loop][0] = temp_count+1; 8730 } 8731 if (flex_attribute->combine_attr_counter[counter]. 8732 pkt_resolution_flags & 8733 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L3UC_PKT) { 8734 temp_count = offset_array[loop][0]; 8735 offset_array[loop][temp_count+1]= (unknown_l3uc_pkt << 8736 shift_by_bits); 8737 offset_array[loop][0] = temp_count+1; 8738 } 8739 if (flex_attribute->combine_attr_counter[counter]. 8740 pkt_resolution_flags & 8741 BCM_STAT_FLEX_PKT_TYPE_KNOWN_IPMC_PKT) { 8742 temp_count = offset_array[loop][0]; 8743 offset_array[loop][temp_count+1]= (known_ipmc_pkt << 8744 shift_by_bits); 8745 offset_array[loop][0] = temp_count+1; 8746 } 8747 if (flex_attribute->combine_attr_counter[counter]. 8748 pkt_resolution_flags & 8749 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_IPMC_PKT) { 8750 temp_count = offset_array[loop][0]; 8751 offset_array[loop][temp_count+1]= (unknown_ipmc_pkt << 8752 shift_by_bits); 8753 offset_array[loop][0] = temp_count+1; 8754 } 8755 if (flex_attribute->combine_attr_counter[counter]. 8756 pkt_resolution_flags & 8757 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_L2_PKT) { 8758 temp_count = offset_array[loop][0]; 8759 offset_array[loop][temp_count+1]= (known_mpls_l2_pkt << 8760 shift_by_bits); 8761 offset_array[loop][0] = temp_count+1; 8762 } 8763 if (flex_attribute->combine_attr_counter[counter]. 8764 pkt_resolution_flags & 8765 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_L3_PKT) { 8766 temp_count = offset_array[loop][0]; 8767 offset_array[loop][temp_count+1]= (known_mpls_l3_pkt << 8768 shift_by_bits); 8769 offset_array[loop][0] = temp_count+1; 8770 } 8771 if (flex_attribute->combine_attr_counter[counter]. 8772 pkt_resolution_flags & 8773 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_PKT) { 8774 temp_count = offset_array[loop][0]; 8775 offset_array[loop][temp_count+1]= (known_mpls_pkt << 8776 shift_by_bits); 8777 offset_array[loop][0] = temp_count+1; 8778 } 8779 if (flex_attribute->combine_attr_counter[counter]. 8780 pkt_resolution_flags & 8781 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_MPLS_PKT) { 8782 temp_count = offset_array[loop][0]; 8783 offset_array[loop][temp_count+1]= (unknown_mpls_pkt << 8784 shift_by_bits); 8785 offset_array[loop][0] = temp_count+1; 8786 } 8787 if (flex_attribute->combine_attr_counter[counter]. 8788 pkt_resolution_flags & 8789 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_MULTICAST_PKT) { 8790 temp_count = offset_array[loop][0]; 8791 offset_array[loop][temp_count+1]= (known_mpls_multicast_pkt << 8792 shift_by_bits); 8793 offset_array[loop][0] = temp_count+1; 8794 } 8795 if (flex_attribute->combine_attr_counter[counter]. 8796 pkt_resolution_flags & 8797 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MIM_PKT) { 8798 temp_count = offset_array[loop][0]; 8799 offset_array[loop][temp_count+1]= (known_mim_pkt << 8800 shift_by_bits); 8801 offset_array[loop][0] = temp_count+1; 8802 } 8803 if (flex_attribute->combine_attr_counter[counter]. 8804 pkt_resolution_flags & 8805 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_MIM_PKT) { 8806 temp_count = offset_array[loop][0]; 8807 offset_array[loop][temp_count+1]= (unknown_mim_pkt << 8808 shift_by_bits); 8809 offset_array[loop][0] = temp_count+1; 8810 } 8811 if (flex_attribute->combine_attr_counter[counter]. 8812 pkt_resolution_flags & 8813 BCM_STAT_FLEX_PKT_TYPE_KNOWN_TRILL_PKT) { 8814 temp_count = offset_array[loop][0]; 8815 offset_array[loop][temp_count+1]= (known_trill_pkt << 8816 shift_by_bits); 8817 offset_array[loop][0] = temp_count+1; 8818 } 8819 if (flex_attribute->combine_attr_counter[counter]. 8820 pkt_resolution_flags & 8821 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_TRILL_PKT) { 8822 temp_count = offset_array[loop][0]; 8823 offset_array[loop][temp_count+1]= (unknown_trill_pkt << 8824 shift_by_bits); 8825 offset_array[loop][0] = temp_count+1; 8826 } 8827 if (flex_attribute->combine_attr_counter[counter]. 8828 pkt_resolution_flags & 8829 BCM_STAT_FLEX_PKT_TYPE_KNOWN_NIV_PKT) { 8830 temp_count = offset_array[loop][0]; 8831 offset_array[loop][temp_count+1]= (known_niv_pkt << 8832 shift_by_bits); 8833 offset_array[loop][0] = temp_count+1; 8834 } 8835 if (flex_attribute->combine_attr_counter[counter]. 8836 pkt_resolution_flags & 8837 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_NIV_PKT) { 8838 temp_count = offset_array[loop][0]; 8839 offset_array[loop][temp_count+1]= (unknown_niv_pkt << 8840 shift_by_bits); 8841 offset_array[loop][0] = temp_count+1; 8842 } 8843 #if defined(BCM_TRIDENT2_SUPPORT) 8844 if (SOC_IS_TD2_TT2(unit)) { 8845 if (flex_attribute->combine_attr_counter[counter]. 8846 pkt_resolution_flags & 8847 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2GRE_PKT) { 8848 temp_count = offset_array[loop][0]; 8849 offset_array[loop][temp_count+1]= (known_l2gre_pkt << 8850 shift_by_bits); 8851 offset_array[loop][0] = temp_count+1; 8852 } 8853 if (flex_attribute->combine_attr_counter[counter]. 8854 pkt_resolution_flags & 8855 BCM_STAT_FLEX_PKT_TYPE_KNOWN_VXLAN_PKT) { 8856 temp_count = offset_array[loop][0]; 8857 offset_array[loop][temp_count+1]= (known_vxlan_pkt << 8858 shift_by_bits); 8859 offset_array[loop][0] = temp_count+1; 8860 } 8861 if (flex_attribute->combine_attr_counter[counter]. 8862 pkt_resolution_flags & 8863 BCM_STAT_FLEX_PKT_TYPE_KNOWN_FCOE_PKT) { 8864 temp_count = offset_array[loop][0]; 8865 offset_array[loop][temp_count+1]= (known_fcoe_pkt << 8866 shift_by_bits); 8867 offset_array[loop][0] = temp_count+1; 8868 } 8869 if (flex_attribute->combine_attr_counter[counter]. 8870 pkt_resolution_flags & 8871 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_FCOE_PKT) { 8872 temp_count = offset_array[loop][0]; 8873 offset_array[loop][temp_count+1]= (unknown_fcoe_pkt << 8874 shift_by_bits); 8875 offset_array[loop][0] = temp_count+1; 8876 } 8877 } 8878 #endif 8879 loop++; 8880 } 8881 /* Logical Group 5 */ 8882 if ((flex_attribute->svp != 0) && 8883 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 8884 shift_by_bits = dvp_bits + 8885 drop_bits + 8886 ip_pkt_bits ; 8887 if (direction == bcmStatFlexDirectionIngress) { 8888 max_count= (1 << ing_pkt_attr_uncmprsd_bits_g[unit].svp_type)-1; 8889 } else { 8890 max_count= (1 << egr_pkt_attr_uncmprsd_bits_g[unit].svp_type)-1; 8891 } 8892 for (loop_index=0; loop_index <= max_count ; loop_index++) { 8893 if (BCM_STAT_FLEX_VALUE_GET( 8894 flex_attribute->combine_attr_counter[counter]. 8895 value_array[bcmStatFlexAttrSvp],loop_index)) { 8896 temp_count = offset_array[loop][0]; 8897 offset_array[loop][temp_count+1]= (loop_index /*value*/ 8898 << shift_by_bits); 8899 offset_array[loop][0] = temp_count+1; 8900 } 8901 } 8902 loop++; 8903 } 8904 if ((flex_attribute->dvp != 0) && 8905 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 8906 shift_by_bits = drop_bits + 8907 ip_pkt_bits ; 8908 max_count= (1 << egr_pkt_attr_uncmprsd_bits_g[unit].dvp_type)-1; 8909 for (loop_index=0; loop_index <= max_count ; loop_index++) { 8910 if (BCM_STAT_FLEX_VALUE_GET( 8911 flex_attribute->combine_attr_counter[counter]. 8912 value_array[bcmStatFlexAttrDvp],loop_index)) { 8913 temp_count = offset_array[loop][0]; 8914 offset_array[loop][temp_count+1]= (loop_index /*value*/ 8915 << shift_by_bits); 8916 offset_array[loop][0] = temp_count+1; 8917 } 8918 } 8919 loop++; 8920 } 8921 if ((flex_attribute->drop != 0) && 8922 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 8923 shift_by_bits = ip_pkt_bits ; 8924 if (flex_attribute->combine_attr_counter[counter]. 8925 drop_flags & BCM_STAT_FLEX_DROP_DISABLE) { 8926 temp_count = offset_array[loop][0]; 8927 offset_array[loop][temp_count+1]= (0 << shift_by_bits); 8928 offset_array[loop][0] = temp_count+1; 8929 } 8930 if (flex_attribute->combine_attr_counter[counter]. 8931 drop_flags & BCM_STAT_FLEX_DROP_ENABLE) { 8932 temp_count = offset_array[loop][0]; 8933 offset_array[loop][temp_count+1]= (1 << shift_by_bits); 8934 offset_array[loop][0] = temp_count+1; 8935 } 8936 loop++; 8937 } 8938 if ((flex_attribute->ip_pkt != 0) && 8939 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 8940 shift_by_bits = 0; 8941 if (flex_attribute->combine_attr_counter[counter]. 8942 ip_pkt_flags & BCM_STAT_FLEX_IP_PKT_DISABLE) { 8943 temp_count = offset_array[loop][0]; 8944 offset_array[loop][temp_count+1]= (0 << shift_by_bits); 8945 offset_array[loop][0] = temp_count+1; 8946 } 8947 if (flex_attribute->combine_attr_counter[counter]. 8948 ip_pkt_flags & BCM_STAT_FLEX_IP_PKT_ENABLE) { 8949 temp_count = offset_array[loop][0]; 8950 offset_array[loop][temp_count+1]= (1 << shift_by_bits); 8951 offset_array[loop][0] = temp_count+1; 8952 } 8953 loop++; 8954 } 8955 /* Third and Final Level Update: Make Absolute Offset */ 8956 for (index0=0; 8957 index0 < offset_array[0][0] ; 8958 index0++) { 8959 offset = offset_array[0][index0+1]; 8960 if (offset_array[1][0] != 0) { 8961 for (index1=0; 8962 index1 < offset_array[1][0] ; 8963 index1++) { 8964 offset = offset_array[0][index0+1] | offset_array[1][index1+1]; 8965 if (offset_array[2][0] != 0) { 8966 for (index2=0; 8967 index2 < offset_array[2][0] ; 8968 index2++) { 8969 offset = offset_array[0][index0+1] | 8970 offset_array[1][index1+1] | 8971 offset_array[2][index2+1]; 8972 if (offset_array[3][0] != 0) { 8973 for (index3=0; 8974 index3 < offset_array[3][0] ; 8975 index3++) { 8976 offset = offset_array[0][index0+1] | 8977 offset_array[1][index1+1] | 8978 offset_array[2][index2+1] | 8979 offset_array[3][index3+1]; 8980 if (offset_array[4][0] != 0) { 8981 for (index4=0; 8982 index4 < offset_array[4][0] ; 8983 index4++) { 8984 offset = offset_array[0][index0+1] | 8985 offset_array[1][index1+1] | 8986 offset_array[2][index2+1] | 8987 offset_array[3][index3+1] | 8988 offset_array[4][index4+1]; 8989 if (offset_array[5][0] != 0) { 8990 for (index5=0; 8991 index5 < offset_array[5][0] ; 8992 index5++) { 8993 offset = offset_array[0][index0+1] | 8994 offset_array[1][index1+1] | 8995 offset_array[2][index2+1] | 8996 offset_array[3][index3+1] | 8997 offset_array[4][index4+1] | 8998 offset_array[5][index5+1]; 8999 if (offset_array[6][0] != 0) { 9000 for (index6=0; 9001 index6 < offset_array[6][0] ; 9002 index6++) { 9003 offset = offset_array[0][index0+1] | 9004 offset_array[1][index1+1] | 9005 offset_array[2][index2+1] | 9006 offset_array[3][index3+1] | 9007 offset_array[4][index4+1] | 9008 offset_array[5][index5+1] | 9009 offset_array[6][index6+1]; 9010 if (offset_array[7][0] != 0) { 9011 for (index7=0; 9012 index7 < offset_array[7][0] ; 9013 index7++) { 9014 offset = offset_array[0][index0+1] | 9015 offset_array[1][index1+1] | 9016 offset_array[2][index2+1] | 9017 offset_array[3][index3+1] | 9018 offset_array[4][index4+1] | 9019 offset_array[5][index5+1] | 9020 offset_array[6][index6+1] | 9021 offset_array[7][index6+1]; 9022 rv = _bcm_stat_flex_update_map(direction,attr, 9023 offset,counter); 9024 BCMI_IF_ERROR_CLEANUP(rv); 9025 } 9026 } else { 9027 rv = _bcm_stat_flex_update_map(direction,attr, 9028 offset,counter); 9029 BCMI_IF_ERROR_CLEANUP(rv); 9030 } 9031 } 9032 } else { 9033 rv = _bcm_stat_flex_update_map(direction,attr,offset,counter); 9034 BCMI_IF_ERROR_CLEANUP(rv); 9035 } 9036 } 9037 } else { 9038 rv = _bcm_stat_flex_update_map(direction,attr,offset,counter); 9039 BCMI_IF_ERROR_CLEANUP(rv); 9040 } 9041 } 9042 } else { 9043 rv = _bcm_stat_flex_update_map(direction,attr,offset,counter); 9044 BCMI_IF_ERROR_CLEANUP(rv); 9045 } 9046 } 9047 } else { 9048 rv = _bcm_stat_flex_update_map(direction,attr,offset,counter); 9049 BCMI_IF_ERROR_CLEANUP(rv); 9050 } 9051 } 9052 } else { 9053 rv = _bcm_stat_flex_update_map(direction,attr,offset,counter); 9054 BCMI_IF_ERROR_CLEANUP(rv); 9055 } 9056 } 9057 } else { 9058 rv = _bcm_stat_flex_update_map(direction,attr,offset,counter); 9059 BCMI_IF_ERROR_CLEANUP(rv); 9060 } 9061 } 9062 } 9063 } else { 9064 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, 9065 (BSL_META_U(unit, 9066 "INFO: TotalBits=%d Trying out CompressedMode\n"), 9067 total_bits)); 9068 if (direction == bcmStatFlexDirectionIngress) { 9069 ing_attr->packet_attr_type = bcmStatFlexPacketAttrTypeCompressed; 9070 ing_attr->cmprsd_attr_selectors.total_counters = 9071 flex_attribute->total_counters; 9072 } else { 9073 egr_attr->packet_attr_type = bcmStatFlexPacketAttrTypeCompressed; 9074 egr_attr->cmprsd_attr_selectors.total_counters = 9075 flex_attribute->total_counters; 9076 } 9077 9078 if (soc_feature(unit, soc_feature_flex_stat_compression_share)) { 9079 /* If compression tables sharing is supported, verify attributes */ 9080 rv = _bcm_stat_flex_compressed_attr_selectors_verify(unit, 9081 direction, bcmStatFlexPacketAttrTypeCompressed, 9082 flex_attribute,ing_cmprsd_pkt_attr_bits, 9083 egr_cmprsd_pkt_attr_bits); 9084 if (BCM_FAILURE(rv)) { 9085 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, (BSL_META_U(unit, "Compression" 9086 " tables cannot be modified\n"))); 9087 goto cleanup; 9088 } 9089 /* BEGIN: PRI_CNG_MAP */ 9090 /* fill map_array for pre_ifp_color */ 9091 if (flex_attribute->pre_ifp_color != 0) { 9092 if (map_array[bcmStatGroupModeAttrColor] == NULL) { 9093 map_array[bcmStatGroupModeAttrColor] = 9094 (uint8 *) sal_alloc(256+1,"map_array"); 9095 if (map_array[bcmStatGroupModeAttrColor] == NULL) { 9096 rv = BCM_E_MEMORY; 9097 goto cleanup; 9098 } 9099 sal_memset(map_array[bcmStatGroupModeAttrColor], 9100 0xFF,256); 9101 map_array[bcmStatGroupModeAttrColor][256]=0; 9102 } 9103 if (flex_attribute->combine_pre_ifp_color_flags & 9104 BCM_STAT_FLEX_COLOR_GREEN) { 9105 if (map_array[bcmStatGroupModeAttrColor][0] == 0xFF) { 9106 temp_count = map_array[bcmStatGroupModeAttrColor][256]; 9107 map_array[bcmStatGroupModeAttrColor][0] = temp_count; 9108 map_array[bcmStatGroupModeAttrColor][256]=temp_count+1; 9109 } 9110 } 9111 if (flex_attribute->combine_pre_ifp_color_flags & 9112 BCM_STAT_FLEX_COLOR_RED) { 9113 if (map_array[bcmStatGroupModeAttrColor][1] == 0xFF) { 9114 temp_count = map_array[bcmStatGroupModeAttrColor][256]; 9115 map_array[bcmStatGroupModeAttrColor][1] = temp_count; 9116 map_array[bcmStatGroupModeAttrColor][256]=temp_count+1; 9117 } 9118 } 9119 if (flex_attribute->combine_pre_ifp_color_flags & 9120 BCM_STAT_FLEX_COLOR_YELLOW) { 9121 if (map_array[bcmStatGroupModeAttrColor][3] == 0xFF) { 9122 temp_count = map_array[bcmStatGroupModeAttrColor][256]; 9123 map_array[bcmStatGroupModeAttrColor][3] = temp_count; 9124 map_array[bcmStatGroupModeAttrColor][256]=temp_count+1; 9125 } 9126 } 9127 } 9128 /* fill map array for ifp_color */ 9129 if (flex_attribute->ifp_color != 0) { 9130 if (map_array[bcmStatGroupModeAttrFieldIngressColor] == NULL) { 9131 map_array[bcmStatGroupModeAttrFieldIngressColor] = 9132 (uint8 *) sal_alloc(256+1,"map_array"); 9133 if (map_array[bcmStatGroupModeAttrFieldIngressColor] == NULL) { 9134 rv = BCM_E_MEMORY; 9135 goto cleanup; 9136 } 9137 sal_memset(map_array[bcmStatGroupModeAttrFieldIngressColor], 9138 0xFF,256); 9139 map_array[bcmStatGroupModeAttrFieldIngressColor][256]=0; 9140 } 9141 /* Egress Not Possbile */ 9142 /* 9143 shift_by_bits = ing_pkt_attr_cmprsd_bits_g[unit].int_pri; 9144 */ 9145 if (flex_attribute->combine_ifp_color_flags & 9146 BCM_STAT_FLEX_COLOR_GREEN) { 9147 if (map_array[bcmStatGroupModeAttrFieldIngressColor][0] 9148 == 0xFF) { 9149 temp_count = map_array 9150 [bcmStatGroupModeAttrFieldIngressColor] 9151 [256]; 9152 map_array[bcmStatGroupModeAttrFieldIngressColor][0] = 9153 temp_count; 9154 map_array[bcmStatGroupModeAttrFieldIngressColor][256] = 9155 temp_count+1; 9156 } 9157 } 9158 if (flex_attribute->combine_ifp_color_flags & 9159 BCM_STAT_FLEX_COLOR_RED) { 9160 if (map_array[bcmStatGroupModeAttrFieldIngressColor][1] 9161 == 0xFF) { 9162 temp_count = map_array 9163 [bcmStatGroupModeAttrFieldIngressColor] 9164 [256]; 9165 map_array[bcmStatGroupModeAttrFieldIngressColor][1] = 9166 temp_count; 9167 map_array[bcmStatGroupModeAttrFieldIngressColor][256] = 9168 temp_count+1; 9169 } 9170 } 9171 if (flex_attribute->combine_ifp_color_flags & 9172 BCM_STAT_FLEX_COLOR_YELLOW) { 9173 if (map_array[bcmStatGroupModeAttrFieldIngressColor][3] 9174 == 0xFF) { 9175 temp_count = map_array 9176 [bcmStatGroupModeAttrFieldIngressColor] 9177 [256]; 9178 map_array[bcmStatGroupModeAttrFieldIngressColor][3] = 9179 temp_count; 9180 map_array[bcmStatGroupModeAttrFieldIngressColor][256] = 9181 temp_count+1; 9182 } 9183 } 9184 } 9185 /* fill map array for int_pri */ 9186 if (flex_attribute->int_pri != 0) { 9187 /* 9188 shift_by_bits = 0; 9189 */ 9190 if (map_array[bcmStatGroupModeAttrIntPri] == NULL) { 9191 map_array[bcmStatGroupModeAttrIntPri] = 9192 (uint8 *) sal_alloc(256+1,"map_array"); 9193 9194 if (map_array[bcmStatGroupModeAttrIntPri] == NULL) { 9195 rv = BCM_E_MEMORY; 9196 goto cleanup; 9197 } 9198 9199 sal_memset(map_array[bcmStatGroupModeAttrIntPri], 9200 0xFF,256); 9201 map_array[bcmStatGroupModeAttrIntPri][256]=0; 9202 } 9203 if (flex_attribute->combine_int_pri_flags & 9204 BCM_STAT_FLEX_PRI0) { 9205 if (map_array[bcmStatGroupModeAttrIntPri][0] == 0xFF) { 9206 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 9207 map_array[bcmStatGroupModeAttrIntPri][0] = temp_count; 9208 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 9209 } 9210 } 9211 if (flex_attribute->combine_int_pri_flags & 9212 BCM_STAT_FLEX_PRI1) { 9213 if (map_array[bcmStatGroupModeAttrIntPri][1] == 0xFF) { 9214 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 9215 map_array[bcmStatGroupModeAttrIntPri][1] = temp_count; 9216 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 9217 } 9218 } 9219 if (flex_attribute->combine_int_pri_flags & 9220 BCM_STAT_FLEX_PRI2) { 9221 if (map_array[bcmStatGroupModeAttrIntPri][2] == 0xFF) { 9222 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 9223 map_array[bcmStatGroupModeAttrIntPri][2] = temp_count; 9224 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 9225 } 9226 } 9227 if (flex_attribute->combine_int_pri_flags & 9228 BCM_STAT_FLEX_PRI3) { 9229 if (map_array[bcmStatGroupModeAttrIntPri][3] == 0xFF) { 9230 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 9231 map_array[bcmStatGroupModeAttrIntPri][3] = temp_count; 9232 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 9233 } 9234 } 9235 if (flex_attribute->combine_int_pri_flags & 9236 BCM_STAT_FLEX_PRI4) { 9237 if (map_array[bcmStatGroupModeAttrIntPri][4] == 0xFF) { 9238 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 9239 map_array[bcmStatGroupModeAttrIntPri][4] = temp_count; 9240 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 9241 } 9242 } 9243 if (flex_attribute->combine_int_pri_flags & 9244 BCM_STAT_FLEX_PRI5) { 9245 if (map_array[bcmStatGroupModeAttrIntPri][5] == 0xFF) { 9246 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 9247 map_array[bcmStatGroupModeAttrIntPri][5] = temp_count; 9248 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 9249 } 9250 } 9251 if (flex_attribute->combine_int_pri_flags & 9252 BCM_STAT_FLEX_PRI6) { 9253 if (map_array[bcmStatGroupModeAttrIntPri][6] == 0xFF) { 9254 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 9255 map_array[bcmStatGroupModeAttrIntPri][6] = temp_count; 9256 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 9257 } 9258 } 9259 if (flex_attribute->combine_int_pri_flags & 9260 BCM_STAT_FLEX_PRI7) { 9261 if (map_array[bcmStatGroupModeAttrIntPri][7] == 0xFF) { 9262 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 9263 map_array[bcmStatGroupModeAttrIntPri][7] = temp_count; 9264 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 9265 } 9266 } 9267 if (flex_attribute->combine_int_pri_flags & 9268 BCM_STAT_FLEX_PRI8) { 9269 if (map_array[bcmStatGroupModeAttrIntPri][8] == 0xFF) { 9270 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 9271 map_array[bcmStatGroupModeAttrIntPri][8] = temp_count; 9272 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 9273 } 9274 } 9275 if (flex_attribute->combine_int_pri_flags & 9276 BCM_STAT_FLEX_PRI9) { 9277 if (map_array[bcmStatGroupModeAttrIntPri][9] == 0xFF) { 9278 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 9279 map_array[bcmStatGroupModeAttrIntPri][9] = temp_count; 9280 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 9281 } 9282 } 9283 if (flex_attribute->combine_int_pri_flags & 9284 BCM_STAT_FLEX_PRI10) { 9285 if (map_array[bcmStatGroupModeAttrIntPri][10] == 0xFF) { 9286 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 9287 map_array[bcmStatGroupModeAttrIntPri][10] = temp_count; 9288 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 9289 } 9290 } 9291 if (flex_attribute->combine_int_pri_flags & 9292 BCM_STAT_FLEX_PRI11) { 9293 if (map_array[bcmStatGroupModeAttrIntPri][11] == 0xFF) { 9294 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 9295 map_array[bcmStatGroupModeAttrIntPri][11] = temp_count; 9296 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 9297 } 9298 } 9299 if (flex_attribute->combine_int_pri_flags & 9300 BCM_STAT_FLEX_PRI12) { 9301 if (map_array[bcmStatGroupModeAttrIntPri][12] == 0xFF) { 9302 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 9303 map_array[bcmStatGroupModeAttrIntPri][12] = temp_count; 9304 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 9305 } 9306 } 9307 if (flex_attribute->combine_int_pri_flags & 9308 BCM_STAT_FLEX_PRI13) { 9309 if (map_array[bcmStatGroupModeAttrIntPri][13] == 0xFF) { 9310 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 9311 map_array[bcmStatGroupModeAttrIntPri][13] = temp_count; 9312 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 9313 } 9314 } 9315 if (flex_attribute->combine_int_pri_flags & 9316 BCM_STAT_FLEX_PRI14) { 9317 if (map_array[bcmStatGroupModeAttrIntPri][14] == 0xFF) { 9318 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 9319 map_array[bcmStatGroupModeAttrIntPri][14] = temp_count; 9320 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 9321 } 9322 } 9323 if (flex_attribute->combine_int_pri_flags & 9324 BCM_STAT_FLEX_PRI15) { 9325 if (map_array[bcmStatGroupModeAttrIntPri][15] == 0xFF) { 9326 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 9327 map_array[bcmStatGroupModeAttrIntPri][15] = temp_count; 9328 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 9329 } 9330 } 9331 } 9332 /* END: PRI_CNG_MAP */ 9333 9334 /* fill map array for vlan_format,outer_dot1p,inner_dot1p 9335 * BEGIN: PKT_PRI_MAP */ 9336 if (flex_attribute->vlan_format != 0) { 9337 if (map_array[bcmStatGroupModeAttrVlan] == NULL) { 9338 map_array[bcmStatGroupModeAttrVlan] = 9339 (uint8 *) sal_alloc(256+1,"map_array"); 9340 9341 if (map_array[bcmStatGroupModeAttrVlan] == NULL) { 9342 rv = BCM_E_MEMORY; 9343 goto cleanup; 9344 } 9345 9346 sal_memset(map_array[bcmStatGroupModeAttrVlan], 9347 0xFF,256); 9348 map_array[bcmStatGroupModeAttrVlan][256]=0; 9349 } 9350 if (flex_attribute->combine_vlan_format_flags & 9351 BCM_STAT_FLEX_VLAN_FORMAT_UNTAGGED) { 9352 if (map_array[bcmStatGroupModeAttrVlan][0] == 0xFF) { 9353 temp_count = map_array[bcmStatGroupModeAttrVlan][256]; 9354 map_array[bcmStatGroupModeAttrVlan][0] = temp_count; 9355 map_array[bcmStatGroupModeAttrVlan][256]=temp_count+1; 9356 } 9357 } 9358 if (flex_attribute->combine_vlan_format_flags & 9359 BCM_STAT_FLEX_VLAN_FORMAT_INNER) { 9360 if (map_array[bcmStatGroupModeAttrVlan][1] == 0xFF) { 9361 temp_count = map_array[bcmStatGroupModeAttrVlan][256]; 9362 map_array[bcmStatGroupModeAttrVlan][1] = temp_count; 9363 map_array[bcmStatGroupModeAttrVlan][256]=temp_count+1; 9364 } 9365 } 9366 if (flex_attribute->combine_vlan_format_flags & 9367 BCM_STAT_FLEX_VLAN_FORMAT_OUTER) { 9368 if (map_array[bcmStatGroupModeAttrVlan][2] == 0xFF) { 9369 temp_count = map_array[bcmStatGroupModeAttrVlan][256]; 9370 map_array[bcmStatGroupModeAttrVlan][2] = temp_count; 9371 map_array[bcmStatGroupModeAttrVlan][256]=temp_count+1; 9372 } 9373 } 9374 if (flex_attribute->combine_vlan_format_flags & 9375 BCM_STAT_FLEX_VLAN_FORMAT_BOTH) { 9376 if (map_array[bcmStatGroupModeAttrVlan][3] == 0xFF) { 9377 temp_count = map_array[bcmStatGroupModeAttrVlan][256]; 9378 map_array[bcmStatGroupModeAttrVlan][3] = temp_count; 9379 map_array[bcmStatGroupModeAttrVlan][256]=temp_count+1; 9380 } 9381 } 9382 } 9383 9384 if (flex_attribute->outer_dot1p != 0) { 9385 if (map_array[bcmStatGroupModeAttrOuterPri] == NULL) { 9386 map_array[bcmStatGroupModeAttrOuterPri] = 9387 (uint8 *) sal_alloc(256+1,"map_array"); 9388 9389 if (map_array[bcmStatGroupModeAttrOuterPri] == NULL) { 9390 rv = BCM_E_MEMORY; 9391 goto cleanup; 9392 } 9393 9394 sal_memset(map_array[bcmStatGroupModeAttrOuterPri], 9395 0xFF,256); 9396 map_array[bcmStatGroupModeAttrOuterPri][256]=0; 9397 } 9398 if (flex_attribute->combine_outer_dot1p_flags & 9399 BCM_STAT_FLEX_PRI0) { 9400 if (map_array[bcmStatGroupModeAttrOuterPri][0] == 0xFF) { 9401 temp_count = map_array[bcmStatGroupModeAttrOuterPri] 9402 [256]; 9403 map_array[bcmStatGroupModeAttrOuterPri][0] = 9404 temp_count; 9405 map_array[bcmStatGroupModeAttrOuterPri][256] = 9406 temp_count+1; 9407 } 9408 } 9409 if (flex_attribute->combine_outer_dot1p_flags & 9410 BCM_STAT_FLEX_PRI1) { 9411 if (map_array[bcmStatGroupModeAttrOuterPri][1] == 0xFF) { 9412 temp_count = map_array[bcmStatGroupModeAttrOuterPri] 9413 [256]; 9414 map_array[bcmStatGroupModeAttrOuterPri][1] = 9415 temp_count; 9416 9417 map_array[bcmStatGroupModeAttrOuterPri][256] = 9418 temp_count+1; 9419 } 9420 } 9421 if (flex_attribute->combine_outer_dot1p_flags & 9422 BCM_STAT_FLEX_PRI2) { 9423 if (map_array[bcmStatGroupModeAttrOuterPri][2] == 0xFF) { 9424 temp_count = map_array[bcmStatGroupModeAttrOuterPri] 9425 [256]; 9426 map_array[bcmStatGroupModeAttrOuterPri][2] = 9427 temp_count; 9428 map_array[bcmStatGroupModeAttrOuterPri][256] = 9429 temp_count+1; 9430 } 9431 } 9432 if (flex_attribute->combine_outer_dot1p_flags & 9433 BCM_STAT_FLEX_PRI3) { 9434 if (map_array[bcmStatGroupModeAttrOuterPri][3] == 0xFF) { 9435 temp_count = map_array[bcmStatGroupModeAttrOuterPri] 9436 [256]; 9437 map_array[bcmStatGroupModeAttrOuterPri][3] = 9438 temp_count; 9439 map_array[bcmStatGroupModeAttrOuterPri][256] = 9440 temp_count+1; 9441 } 9442 } 9443 if (flex_attribute->combine_outer_dot1p_flags & 9444 BCM_STAT_FLEX_PRI4) { 9445 if (map_array[bcmStatGroupModeAttrOuterPri][4] == 0xFF) { 9446 temp_count = map_array[bcmStatGroupModeAttrOuterPri] 9447 [256]; 9448 map_array[bcmStatGroupModeAttrOuterPri][4] = 9449 temp_count; 9450 map_array[bcmStatGroupModeAttrOuterPri][256] = 9451 temp_count+1; 9452 } 9453 } 9454 if (flex_attribute->combine_outer_dot1p_flags & 9455 BCM_STAT_FLEX_PRI5) { 9456 if (map_array[bcmStatGroupModeAttrOuterPri][5] == 0xFF) { 9457 temp_count = map_array[bcmStatGroupModeAttrOuterPri] 9458 [256]; 9459 map_array[bcmStatGroupModeAttrOuterPri][5] = 9460 temp_count; 9461 map_array[bcmStatGroupModeAttrOuterPri][256] = 9462 temp_count+1; 9463 } 9464 } 9465 if (flex_attribute->combine_outer_dot1p_flags & 9466 BCM_STAT_FLEX_PRI6) { 9467 if (map_array[bcmStatGroupModeAttrOuterPri][6] == 0xFF) { 9468 temp_count = map_array[bcmStatGroupModeAttrOuterPri] 9469 [256]; 9470 map_array[bcmStatGroupModeAttrOuterPri][6] = 9471 temp_count; 9472 map_array[bcmStatGroupModeAttrOuterPri][256] = 9473 temp_count+1; 9474 } 9475 } 9476 if (flex_attribute->combine_outer_dot1p_flags & 9477 BCM_STAT_FLEX_PRI7) { 9478 if (map_array[bcmStatGroupModeAttrOuterPri][7] == 0xFF) { 9479 temp_count = map_array[bcmStatGroupModeAttrOuterPri] 9480 [256]; 9481 map_array[bcmStatGroupModeAttrOuterPri][7] = 9482 temp_count; 9483 map_array[bcmStatGroupModeAttrOuterPri][256] = 9484 temp_count+1; 9485 } 9486 } 9487 } 9488 if (flex_attribute->inner_dot1p != 0) { 9489 if (map_array[bcmStatGroupModeAttrInnerPri] == NULL) { 9490 map_array[bcmStatGroupModeAttrInnerPri] = 9491 (uint8 *) sal_alloc(256+1,"map_array"); 9492 9493 if (map_array[bcmStatGroupModeAttrInnerPri] == NULL) { 9494 rv = BCM_E_MEMORY; 9495 goto cleanup; 9496 } 9497 9498 sal_memset(map_array[bcmStatGroupModeAttrInnerPri], 9499 0xFF,256); 9500 map_array[bcmStatGroupModeAttrInnerPri][256]=0; 9501 } 9502 if (flex_attribute->combine_inner_dot1p_flags & 9503 BCM_STAT_FLEX_PRI0) { 9504 if (map_array[bcmStatGroupModeAttrInnerPri][0] == 0xFF) { 9505 temp_count = map_array[bcmStatGroupModeAttrInnerPri] 9506 [256]; 9507 map_array[bcmStatGroupModeAttrInnerPri][0] = 9508 temp_count; 9509 map_array[bcmStatGroupModeAttrInnerPri][256] = 9510 temp_count+1; 9511 } 9512 } 9513 if (flex_attribute->combine_inner_dot1p_flags & 9514 BCM_STAT_FLEX_PRI1) { 9515 if (map_array[bcmStatGroupModeAttrInnerPri][1] == 0xFF) { 9516 temp_count = map_array[bcmStatGroupModeAttrInnerPri] 9517 [256]; 9518 map_array[bcmStatGroupModeAttrInnerPri][1] = 9519 temp_count; 9520 map_array[bcmStatGroupModeAttrInnerPri][256] = 9521 temp_count+1; 9522 } 9523 } 9524 if (flex_attribute->combine_inner_dot1p_flags & 9525 BCM_STAT_FLEX_PRI2) { 9526 if (map_array[bcmStatGroupModeAttrInnerPri][2] == 0xFF) { 9527 temp_count = map_array[bcmStatGroupModeAttrInnerPri] 9528 [256]; 9529 map_array[bcmStatGroupModeAttrInnerPri][2] = 9530 temp_count; 9531 map_array[bcmStatGroupModeAttrInnerPri][256] = 9532 temp_count+1; 9533 } 9534 } 9535 if (flex_attribute->combine_inner_dot1p_flags & 9536 BCM_STAT_FLEX_PRI3) { 9537 if (map_array[bcmStatGroupModeAttrInnerPri][3] == 0xFF) { 9538 temp_count = map_array[bcmStatGroupModeAttrInnerPri] 9539 [256]; 9540 map_array[bcmStatGroupModeAttrInnerPri][3] = 9541 temp_count; 9542 map_array[bcmStatGroupModeAttrInnerPri][256] = 9543 temp_count+1; 9544 } 9545 } 9546 if (flex_attribute->combine_inner_dot1p_flags & 9547 BCM_STAT_FLEX_PRI4) { 9548 if (map_array[bcmStatGroupModeAttrInnerPri][4] == 0xFF) { 9549 temp_count = map_array[bcmStatGroupModeAttrInnerPri] 9550 [256]; 9551 map_array[bcmStatGroupModeAttrInnerPri][4] = 9552 temp_count; 9553 map_array[bcmStatGroupModeAttrInnerPri][256] = 9554 temp_count+1; 9555 } 9556 } 9557 if (flex_attribute->combine_attr_counter[counter]. 9558 inner_dot1p_flags & BCM_STAT_FLEX_PRI5) { 9559 if (map_array[bcmStatGroupModeAttrInnerPri][5] == 0xFF) { 9560 temp_count = map_array[bcmStatGroupModeAttrInnerPri] 9561 [256]; 9562 map_array[bcmStatGroupModeAttrInnerPri][5] = 9563 temp_count; 9564 map_array[bcmStatGroupModeAttrInnerPri][256] = 9565 temp_count+1; 9566 } 9567 } 9568 if (flex_attribute->combine_inner_dot1p_flags & 9569 BCM_STAT_FLEX_PRI6) { 9570 if (map_array[bcmStatGroupModeAttrInnerPri][6] == 0xFF) { 9571 temp_count = map_array[bcmStatGroupModeAttrInnerPri] 9572 [256]; 9573 map_array[bcmStatGroupModeAttrInnerPri][6] = 9574 temp_count; 9575 map_array[bcmStatGroupModeAttrInnerPri][256] = 9576 temp_count+1; 9577 } 9578 } 9579 if (flex_attribute->combine_inner_dot1p_flags & 9580 BCM_STAT_FLEX_PRI7) { 9581 if (map_array[bcmStatGroupModeAttrInnerPri][7] == 0xFF) { 9582 temp_count = map_array[bcmStatGroupModeAttrInnerPri] 9583 [256]; 9584 map_array[bcmStatGroupModeAttrInnerPri][7] = 9585 temp_count; 9586 map_array[bcmStatGroupModeAttrInnerPri][256] = 9587 temp_count+1; 9588 } 9589 } 9590 } 9591 9592 /* BEGIN: PORT_MAP*/ 9593 if (flex_attribute->port != 0) { 9594 if (map_array[bcmStatGroupModeAttrPort] == NULL) { 9595 map_array[bcmStatGroupModeAttrPort] = 9596 (uint8 *) sal_alloc(256+1,"map_array"); 9597 9598 if (map_array[bcmStatGroupModeAttrPort] == NULL) { 9599 rv = BCM_E_MEMORY; 9600 goto cleanup; 9601 } 9602 9603 sal_memset(map_array[bcmStatGroupModeAttrPort], 9604 0xFF,256); 9605 map_array[bcmStatGroupModeAttrPort][256]=0; 9606 } 9607 if (direction == bcmStatFlexDirectionIngress) { 9608 max_count= (1 << ing_pkt_attr_cmprsd_bits_g[unit].ing_port) - 1; 9609 } else { 9610 max_count= (1 << egr_pkt_attr_cmprsd_bits_g[unit].egr_port) - 1; 9611 } 9612 for (loop_index=0; loop_index <= max_count ; loop_index++) { 9613 if (BCM_STAT_FLEX_VALUE_GET( 9614 flex_attribute->combine_value_array[bcmStatFlexAttrPort],loop_index)) { 9615 if (map_array[bcmStatGroupModeAttrPort][loop_index] 9616 == 0xFF) { 9617 temp_count = map_array[bcmStatGroupModeAttrPort] 9618 [256]; 9619 map_array[bcmStatGroupModeAttrPort][loop_index] = 9620 temp_count; 9621 map_array[bcmStatGroupModeAttrPort][256] = 9622 temp_count+1; 9623 } 9624 } 9625 } 9626 } 9627 /* END: PORT_MAP*/ 9628 /* BEGIN: TOS_MAP*/ 9629 if (flex_attribute->tos_dscp != 0) { 9630 if (map_array[bcmStatGroupModeAttrTosDscp] == NULL) { 9631 map_array[bcmStatGroupModeAttrTosDscp] = 9632 (uint8 *) sal_alloc(256+1,"map_array"); 9633 9634 if (map_array[bcmStatGroupModeAttrTosDscp] == NULL) { 9635 rv = BCM_E_MEMORY; 9636 goto cleanup; 9637 } 9638 9639 sal_memset(map_array[bcmStatGroupModeAttrTosDscp], 9640 0xFF,256); 9641 map_array[bcmStatGroupModeAttrTosDscp][256]=0; 9642 } 9643 if (direction == bcmStatFlexDirectionIngress) { 9644 max_count= (1 << ing_pkt_attr_cmprsd_bits_g[unit].tos_dscp) - 1; 9645 } else { 9646 max_count= (1 << egr_pkt_attr_cmprsd_bits_g[unit].tos_dscp) - 1; 9647 } 9648 for (loop_index=0; loop_index <= max_count ; loop_index++) { 9649 if (BCM_STAT_FLEX_VALUE_GET( 9650 flex_attribute->combine_value_array[bcmStatFlexAttrTosDscp],loop_index)) { 9651 if (map_array[bcmStatGroupModeAttrTosDscp][loop_index] 9652 == 0xFF) { 9653 temp_count = map_array[bcmStatGroupModeAttrTosDscp] 9654 [256]; 9655 map_array[bcmStatGroupModeAttrTosDscp][loop_index] = 9656 temp_count; 9657 map_array[bcmStatGroupModeAttrTosDscp][256] = 9658 temp_count+1; 9659 } 9660 } 9661 } 9662 } 9663 if (flex_attribute->tos_ecn != 0) { 9664 if (map_array[bcmStatGroupModeAttrTosEcn] == NULL) { 9665 map_array[bcmStatGroupModeAttrTosEcn] = 9666 (uint8 *) sal_alloc(256+1,"map_array"); 9667 9668 if (map_array[bcmStatGroupModeAttrTosEcn] == NULL) { 9669 rv = BCM_E_MEMORY; 9670 goto cleanup; 9671 } 9672 9673 sal_memset(map_array[bcmStatGroupModeAttrTosEcn], 9674 0xFF,256); 9675 map_array[bcmStatGroupModeAttrTosEcn][256]=0; 9676 } 9677 if (direction == bcmStatFlexDirectionIngress) { 9678 max_count= (1 << ing_pkt_attr_cmprsd_bits_g[unit].tos_ecn) - 1; 9679 } else { 9680 max_count= (1 << egr_pkt_attr_cmprsd_bits_g[unit].tos_ecn) - 1; 9681 } 9682 for (loop_index=0; loop_index <= max_count ; loop_index++) { 9683 if (BCM_STAT_FLEX_VALUE_GET( 9684 flex_attribute->combine_value_array[bcmStatFlexAttrTosEcn],loop_index)) { 9685 if (map_array[bcmStatGroupModeAttrTosEcn][loop_index] 9686 == 0xFF) { 9687 temp_count = map_array[bcmStatGroupModeAttrTosEcn] 9688 [256]; 9689 map_array[bcmStatGroupModeAttrTosEcn][loop_index] = 9690 temp_count; 9691 map_array[bcmStatGroupModeAttrTosEcn][256] = 9692 temp_count+1; 9693 } 9694 } 9695 } 9696 } 9697 /* END: TOS_MAP*/ 9698 /* BEGIN: PKT_RES_MAP*/ 9699 if (flex_attribute->pkt_resolution != 0) { 9700 #ifdef BCM_KATANA2_SUPPORT 9701 if (soc_feature(unit, soc_feature_flex_stat_attributes_class)) { 9702 if (map_array[bcmStatGroupModeAttrClassType] == NULL) { 9703 map_array[bcmStatGroupModeAttrClassType] = 9704 (uint8 *) sal_alloc(256+1,"map_array"); 9705 if (map_array[bcmStatGroupModeAttrClassType] == NULL) { 9706 rv = BCM_E_MEMORY; 9707 goto cleanup; 9708 } 9709 9710 sal_memset(map_array[bcmStatGroupModeAttrClassType], 9711 0xFF,256); 9712 } 9713 for (i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 9714 if (BCM_STAT_FLEX_VALUE_GET( 9715 flex_attribute->combine_value_array[bcmStatFlexAttrComb], i)) { 9716 hw_class_id = i; 9717 break; 9718 } 9719 } 9720 9721 if (flex_attribute->combine_pkt_resolution_flags & 9722 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_PKT) { 9723 if (map_array[bcmStatGroupModeAttrClassType] 9724 [unknown_pkt] == 0xFF) { 9725 map_array[bcmStatGroupModeAttrClassType] 9726 [unknown_pkt] = hw_class_id; 9727 } 9728 } 9729 if (flex_attribute->combine_pkt_resolution_flags & 9730 BCM_STAT_FLEX_PKT_TYPE_CONTROL_PKT) { 9731 if (map_array[bcmStatGroupModeAttrClassType] 9732 [control_pkt] == 0xFF) { 9733 map_array[bcmStatGroupModeAttrClassType] 9734 [control_pkt] = hw_class_id; 9735 } 9736 } 9737 if (flex_attribute->combine_pkt_resolution_flags & 9738 BCM_STAT_FLEX_PKT_TYPE_OAM_PKT) { 9739 if (map_array[bcmStatGroupModeAttrClassType] 9740 [oam_pkt] == 0xFF) { 9741 map_array[bcmStatGroupModeAttrClassType] 9742 [oam_pkt] = hw_class_id; 9743 } 9744 } 9745 if (flex_attribute->combine_pkt_resolution_flags & 9746 BCM_STAT_FLEX_PKT_TYPE_BFD_PKT) { 9747 if (map_array[bcmStatGroupModeAttrClassType] 9748 [bfd_pkt] == 0xFF) { 9749 map_array[bcmStatGroupModeAttrClassType] 9750 [bfd_pkt] = hw_class_id; 9751 } 9752 } 9753 if (flex_attribute->combine_pkt_resolution_flags & 9754 BCM_STAT_FLEX_PKT_TYPE_BPDU_PKT) { 9755 if (map_array[bcmStatGroupModeAttrClassType] 9756 [bpdu_pkt] == 0xFF) { 9757 map_array[bcmStatGroupModeAttrClassType] 9758 [bpdu_pkt] = hw_class_id; 9759 } 9760 } 9761 if (flex_attribute->combine_pkt_resolution_flags & 9762 BCM_STAT_FLEX_PKT_TYPE_ICNM_PKT) { 9763 if (map_array[bcmStatGroupModeAttrClassType] 9764 [icnm_pkt] == 0xFF) { 9765 map_array[bcmStatGroupModeAttrClassType] 9766 [icnm_pkt] = hw_class_id; 9767 } 9768 } 9769 if (flex_attribute->combine_pkt_resolution_flags & 9770 BCM_STAT_FLEX_PKT_TYPE_PKT_IS_1588) { 9771 if (map_array[bcmStatGroupModeAttrClassType] 9772 [_1588_pkt] == 0xFF) { 9773 map_array[bcmStatGroupModeAttrClassType] 9774 [_1588_pkt] = hw_class_id; 9775 } 9776 } 9777 if (flex_attribute->combine_pkt_resolution_flags & 9778 BCM_STAT_FLEX_PKT_TYPE_BFD_PKT) { 9779 if (map_array[bcmStatGroupModeAttrClassType] 9780 [bfd_pkt] == 0xFF) { 9781 map_array[bcmStatGroupModeAttrClassType] 9782 [bfd_pkt] = hw_class_id; 9783 } 9784 } 9785 if (flex_attribute->combine_pkt_resolution_flags & 9786 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2UC_PKT) { 9787 if (map_array[bcmStatGroupModeAttrClassType] 9788 [known_l2uc_pkt] == 0xFF) { 9789 map_array[bcmStatGroupModeAttrClassType] 9790 [known_l2uc_pkt] = hw_class_id; 9791 } 9792 } 9793 if (flex_attribute->combine_pkt_resolution_flags & 9794 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L2UC_PKT) { 9795 if (map_array[bcmStatGroupModeAttrClassType] 9796 [unknown_l2uc_pkt] == 0xFF) { 9797 map_array[bcmStatGroupModeAttrClassType] 9798 [unknown_l2uc_pkt] = hw_class_id; 9799 } 9800 } 9801 if (flex_attribute->combine_pkt_resolution_flags & 9802 BCM_STAT_FLEX_PKT_TYPE_L2BC_PKT) { 9803 if (map_array[bcmStatGroupModeAttrClassType] 9804 [l2bc_pkt] == 0xFF) { 9805 map_array[bcmStatGroupModeAttrClassType] 9806 [l2bc_pkt] = hw_class_id; 9807 } 9808 } 9809 if (flex_attribute->combine_pkt_resolution_flags & 9810 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2MC_PKT) { 9811 if (map_array[bcmStatGroupModeAttrClassType] 9812 [known_l2mc_pkt] == 0xFF) { 9813 map_array[bcmStatGroupModeAttrClassType] 9814 [known_l2mc_pkt] = hw_class_id; 9815 } 9816 } 9817 if (flex_attribute->combine_pkt_resolution_flags & 9818 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L2MC_PKT) { 9819 if (map_array[bcmStatGroupModeAttrClassType] 9820 [unknown_l2mc_pkt] == 0xFF) { 9821 map_array[bcmStatGroupModeAttrClassType] 9822 [unknown_l2mc_pkt] = hw_class_id; 9823 } 9824 } 9825 if (flex_attribute->combine_pkt_resolution_flags & 9826 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L3UC_PKT) { 9827 if (map_array[bcmStatGroupModeAttrClassType] 9828 [known_l3uc_pkt] == 0xFF) { 9829 map_array[bcmStatGroupModeAttrClassType] 9830 [known_l3uc_pkt] = hw_class_id; 9831 } 9832 } 9833 if (flex_attribute->combine_pkt_resolution_flags & 9834 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L3UC_PKT) { 9835 if (map_array[bcmStatGroupModeAttrClassType] 9836 [unknown_l3uc_pkt] == 0xFF) { 9837 map_array[bcmStatGroupModeAttrClassType] 9838 [unknown_l3uc_pkt] = hw_class_id; 9839 } 9840 } 9841 if (flex_attribute->combine_pkt_resolution_flags & 9842 BCM_STAT_FLEX_PKT_TYPE_KNOWN_IPMC_PKT) { 9843 if (map_array[bcmStatGroupModeAttrClassType] 9844 [known_ipmc_pkt] == 0xFF) { 9845 map_array[bcmStatGroupModeAttrClassType] 9846 [known_ipmc_pkt] = hw_class_id; 9847 } 9848 } 9849 if (flex_attribute->combine_pkt_resolution_flags & 9850 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_IPMC_PKT) { 9851 if (map_array[bcmStatGroupModeAttrClassType] 9852 [unknown_ipmc_pkt] == 0xFF) { 9853 map_array[bcmStatGroupModeAttrClassType] 9854 [unknown_ipmc_pkt] = hw_class_id; 9855 } 9856 } 9857 if (flex_attribute->combine_pkt_resolution_flags & 9858 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_L2_PKT) { 9859 if (map_array[bcmStatGroupModeAttrClassType] 9860 [known_mpls_l2_pkt] == 0xFF) { 9861 map_array[bcmStatGroupModeAttrClassType] 9862 [known_mpls_l2_pkt] = hw_class_id; 9863 } 9864 } 9865 if (flex_attribute->combine_pkt_resolution_flags & 9866 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_L3_PKT) { 9867 if (map_array[bcmStatGroupModeAttrClassType] 9868 [known_mpls_l3_pkt] == 0xFF) { 9869 map_array[bcmStatGroupModeAttrClassType] 9870 [known_mpls_l3_pkt] = hw_class_id; 9871 } 9872 } 9873 if (flex_attribute->combine_pkt_resolution_flags & 9874 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_PKT) { 9875 if (map_array[bcmStatGroupModeAttrClassType] 9876 [known_mpls_pkt] == 0xFF) { 9877 map_array[bcmStatGroupModeAttrClassType] 9878 [known_mpls_pkt] = hw_class_id; 9879 } 9880 } 9881 if (flex_attribute->combine_attr_counter[counter]. 9882 pkt_resolution_flags & 9883 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_MPLS_PKT) { 9884 if (map_array[bcmStatGroupModeAttrClassType] 9885 [unknown_mpls_pkt] == 0xFF) { 9886 map_array[bcmStatGroupModeAttrClassType] 9887 [unknown_mpls_pkt] = hw_class_id; 9888 } 9889 } 9890 if (flex_attribute->combine_pkt_resolution_flags & 9891 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_MULTICAST_PKT) { 9892 if (map_array[bcmStatGroupModeAttrClassType] 9893 [known_mpls_multicast_pkt] == 0xFF) { 9894 map_array[bcmStatGroupModeAttrClassType] 9895 [known_mpls_multicast_pkt] = hw_class_id; 9896 } 9897 } 9898 if (flex_attribute->combine_pkt_resolution_flags & 9899 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MIM_PKT) { 9900 if (map_array[bcmStatGroupModeAttrClassType] 9901 [known_mim_pkt] == 0xFF) { 9902 map_array[bcmStatGroupModeAttrClassType] 9903 [known_mim_pkt] = hw_class_id; 9904 } 9905 } 9906 if (flex_attribute->combine_pkt_resolution_flags & 9907 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_MIM_PKT) { 9908 if (map_array[bcmStatGroupModeAttrClassType] 9909 [unknown_mim_pkt] == 0xFF) { 9910 map_array[bcmStatGroupModeAttrClassType] 9911 [unknown_mim_pkt] = hw_class_id; 9912 } 9913 } 9914 if (flex_attribute->combine_pkt_resolution_flags & 9915 BCM_STAT_FLEX_PKT_TYPE_KNOWN_TRILL_PKT) { 9916 if (map_array[bcmStatGroupModeAttrClassType] 9917 [known_trill_pkt] == 0xFF) { 9918 map_array[bcmStatGroupModeAttrClassType] 9919 [known_trill_pkt] = hw_class_id; 9920 } 9921 } 9922 if (flex_attribute->combine_pkt_resolution_flags & 9923 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_TRILL_PKT) { 9924 if (map_array[bcmStatGroupModeAttrClassType] 9925 [unknown_trill_pkt] == 0xFF) { 9926 map_array[bcmStatGroupModeAttrClassType] 9927 [unknown_trill_pkt] = hw_class_id; 9928 } 9929 } 9930 if (flex_attribute->combine_pkt_resolution_flags & 9931 BCM_STAT_FLEX_PKT_TYPE_KNOWN_NIV_PKT) { 9932 if (map_array[bcmStatGroupModeAttrClassType] 9933 [known_niv_pkt] == 0xFF) { 9934 9935 map_array[bcmStatGroupModeAttrClassType] 9936 [known_niv_pkt] = hw_class_id; 9937 } 9938 } 9939 if (flex_attribute->combine_pkt_resolution_flags & 9940 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_NIV_PKT) { 9941 if (map_array[bcmStatGroupModeAttrClassType] 9942 [unknown_niv_pkt] == 0xFF) { 9943 map_array[bcmStatGroupModeAttrClassType] 9944 [unknown_niv_pkt] = hw_class_id; 9945 } 9946 } 9947 map_array[bcmStatGroupModeAttrClassType][256] = hw_class_id; 9948 } else 9949 #endif 9950 { 9951 if (map_array[bcmStatGroupModeAttrPktType] == NULL) { 9952 map_array[bcmStatGroupModeAttrPktType] = 9953 (uint8 *) sal_alloc(256+1,"map_array"); 9954 if (map_array[bcmStatGroupModeAttrPktType] == NULL) { 9955 rv = BCM_E_MEMORY; 9956 goto cleanup; 9957 } 9958 9959 sal_memset(map_array[bcmStatGroupModeAttrPktType], 9960 0xFF,256); 9961 map_array[bcmStatGroupModeAttrPktType][256]=0; 9962 } 9963 if (flex_attribute->combine_pkt_resolution_flags & 9964 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_PKT) { 9965 if (map_array[bcmStatGroupModeAttrPktType] 9966 [unknown_pkt] == 0xFF) { 9967 temp_count = map_array[bcmStatGroupModeAttrPktType] 9968 [256]; 9969 map_array[bcmStatGroupModeAttrPktType] 9970 [unknown_pkt] = temp_count; 9971 map_array[bcmStatGroupModeAttrPktType][256] = 9972 temp_count+1; 9973 } 9974 } 9975 if (flex_attribute->combine_pkt_resolution_flags & 9976 BCM_STAT_FLEX_PKT_TYPE_CONTROL_PKT) { 9977 if (map_array[bcmStatGroupModeAttrPktType] 9978 [control_pkt] == 0xFF) { 9979 temp_count = map_array[bcmStatGroupModeAttrPktType] 9980 [256]; 9981 map_array[bcmStatGroupModeAttrPktType] 9982 [control_pkt] = temp_count; 9983 map_array[bcmStatGroupModeAttrPktType][256] = 9984 temp_count+1; 9985 } 9986 } 9987 if (flex_attribute->combine_pkt_resolution_flags & 9988 BCM_STAT_FLEX_PKT_TYPE_OAM_PKT) { 9989 if (map_array[bcmStatGroupModeAttrPktType] 9990 [oam_pkt] == 0xFF) { 9991 temp_count = map_array[bcmStatGroupModeAttrPktType] 9992 [256]; 9993 map_array[bcmStatGroupModeAttrPktType] 9994 [oam_pkt] = temp_count; 9995 map_array[bcmStatGroupModeAttrPktType][256] = 9996 temp_count+1; 9997 } 9998 } 9999 if (flex_attribute->combine_pkt_resolution_flags & 10000 BCM_STAT_FLEX_PKT_TYPE_BFD_PKT) { 10001 if (map_array[bcmStatGroupModeAttrPktType] 10002 [bfd_pkt] == 0xFF) { 10003 temp_count = map_array[bcmStatGroupModeAttrPktType] 10004 [256]; 10005 map_array[bcmStatGroupModeAttrPktType] 10006 [bfd_pkt] = temp_count; 10007 map_array[bcmStatGroupModeAttrPktType][256] = 10008 temp_count+1; 10009 } 10010 } 10011 if (flex_attribute->combine_pkt_resolution_flags & 10012 BCM_STAT_FLEX_PKT_TYPE_BPDU_PKT) { 10013 if (map_array[bcmStatGroupModeAttrPktType] 10014 [bpdu_pkt] == 0xFF) { 10015 temp_count = map_array[bcmStatGroupModeAttrPktType] 10016 [256]; 10017 map_array[bcmStatGroupModeAttrPktType] 10018 [bpdu_pkt] = temp_count; 10019 map_array[bcmStatGroupModeAttrPktType][256] = 10020 temp_count+1; 10021 } 10022 } 10023 if (flex_attribute->combine_pkt_resolution_flags & 10024 BCM_STAT_FLEX_PKT_TYPE_ICNM_PKT) { 10025 if (map_array[bcmStatGroupModeAttrPktType] 10026 [icnm_pkt] == 0xFF) { 10027 temp_count = map_array[bcmStatGroupModeAttrPktType] 10028 [256]; 10029 map_array[bcmStatGroupModeAttrPktType] 10030 [icnm_pkt] = temp_count; 10031 map_array[bcmStatGroupModeAttrPktType][256] = 10032 temp_count+1; 10033 } 10034 } 10035 if (flex_attribute->combine_pkt_resolution_flags & 10036 BCM_STAT_FLEX_PKT_TYPE_PKT_IS_1588) { 10037 if (map_array[bcmStatGroupModeAttrPktType] 10038 [_1588_pkt] == 0xFF) { 10039 temp_count = map_array[bcmStatGroupModeAttrPktType] 10040 [256]; 10041 map_array[bcmStatGroupModeAttrPktType] 10042 [_1588_pkt] = temp_count; 10043 map_array[bcmStatGroupModeAttrPktType][256] = 10044 temp_count+1; 10045 } 10046 } 10047 if (flex_attribute->combine_pkt_resolution_flags & 10048 BCM_STAT_FLEX_PKT_TYPE_BFD_PKT) { 10049 if (map_array[bcmStatGroupModeAttrPktType] 10050 [bfd_pkt] == 0xFF) { 10051 temp_count = map_array[bcmStatGroupModeAttrPktType] 10052 [256]; 10053 map_array[bcmStatGroupModeAttrPktType] 10054 [bfd_pkt] = temp_count; 10055 map_array[bcmStatGroupModeAttrPktType][256] = 10056 temp_count+1; 10057 } 10058 } 10059 if (flex_attribute->combine_pkt_resolution_flags & 10060 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2UC_PKT) { 10061 if (map_array[bcmStatGroupModeAttrPktType] 10062 [known_l2uc_pkt] == 0xFF) { 10063 temp_count = map_array[bcmStatGroupModeAttrPktType] 10064 [256]; 10065 map_array[bcmStatGroupModeAttrPktType] 10066 [known_l2uc_pkt] = temp_count; 10067 map_array[bcmStatGroupModeAttrPktType][256] = 10068 temp_count+1; 10069 } 10070 } 10071 if (flex_attribute->combine_pkt_resolution_flags & 10072 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L2UC_PKT) { 10073 if (map_array[bcmStatGroupModeAttrPktType] 10074 [unknown_l2uc_pkt] == 0xFF) { 10075 temp_count = map_array[bcmStatGroupModeAttrPktType] 10076 [256]; 10077 map_array[bcmStatGroupModeAttrPktType] 10078 [unknown_l2uc_pkt] = temp_count; 10079 map_array[bcmStatGroupModeAttrPktType][256] = 10080 temp_count+1; 10081 } 10082 } 10083 if (flex_attribute->combine_pkt_resolution_flags & 10084 BCM_STAT_FLEX_PKT_TYPE_L2BC_PKT) { 10085 if (map_array[bcmStatGroupModeAttrPktType] 10086 [l2bc_pkt] == 0xFF) { 10087 temp_count = map_array[bcmStatGroupModeAttrPktType] 10088 [256]; 10089 map_array[bcmStatGroupModeAttrPktType] 10090 [l2bc_pkt] = temp_count; 10091 map_array[bcmStatGroupModeAttrPktType][256] = 10092 temp_count+1; 10093 } 10094 } 10095 if (flex_attribute->combine_pkt_resolution_flags & 10096 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2MC_PKT) { 10097 if (map_array[bcmStatGroupModeAttrPktType] 10098 [known_l2mc_pkt] == 0xFF) { 10099 temp_count = map_array[bcmStatGroupModeAttrPktType] 10100 [256]; 10101 map_array[bcmStatGroupModeAttrPktType] 10102 [known_l2mc_pkt] = temp_count; 10103 map_array[bcmStatGroupModeAttrPktType][256] = 10104 temp_count+1; 10105 } 10106 } 10107 if (flex_attribute->combine_pkt_resolution_flags & 10108 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L2MC_PKT) { 10109 if (map_array[bcmStatGroupModeAttrPktType] 10110 [unknown_l2mc_pkt] == 0xFF) { 10111 temp_count = map_array[bcmStatGroupModeAttrPktType] 10112 [256]; 10113 map_array[bcmStatGroupModeAttrPktType] 10114 [unknown_l2mc_pkt] = temp_count; 10115 map_array[bcmStatGroupModeAttrPktType][256] = 10116 temp_count+1; 10117 } 10118 } 10119 if (flex_attribute->combine_pkt_resolution_flags & 10120 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L3UC_PKT) { 10121 if (map_array[bcmStatGroupModeAttrPktType] 10122 [known_l3uc_pkt] == 0xFF) { 10123 temp_count = map_array[bcmStatGroupModeAttrPktType] 10124 [256]; 10125 map_array[bcmStatGroupModeAttrPktType] 10126 [known_l3uc_pkt] = temp_count; 10127 map_array[bcmStatGroupModeAttrPktType][256] = 10128 temp_count+1; 10129 } 10130 } 10131 if (flex_attribute->combine_pkt_resolution_flags & 10132 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L3UC_PKT) { 10133 if (map_array[bcmStatGroupModeAttrPktType] 10134 [unknown_l3uc_pkt] == 0xFF) { 10135 temp_count = map_array[bcmStatGroupModeAttrPktType] 10136 [256]; 10137 map_array[bcmStatGroupModeAttrPktType] 10138 [unknown_l3uc_pkt] = temp_count; 10139 map_array[bcmStatGroupModeAttrPktType][256] = 10140 temp_count+1; 10141 } 10142 } 10143 if (flex_attribute->combine_pkt_resolution_flags & 10144 BCM_STAT_FLEX_PKT_TYPE_KNOWN_IPMC_PKT) { 10145 if (map_array[bcmStatGroupModeAttrPktType] 10146 [known_ipmc_pkt] == 0xFF) { 10147 temp_count = map_array[bcmStatGroupModeAttrPktType] 10148 [256]; 10149 map_array[bcmStatGroupModeAttrPktType] 10150 [known_ipmc_pkt] = temp_count; 10151 map_array[bcmStatGroupModeAttrPktType][256] = 10152 temp_count+1; 10153 } 10154 } 10155 if (flex_attribute->combine_pkt_resolution_flags & 10156 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_IPMC_PKT) { 10157 if (map_array[bcmStatGroupModeAttrPktType] 10158 [unknown_ipmc_pkt] == 0xFF) { 10159 temp_count = map_array[bcmStatGroupModeAttrPktType] 10160 [256]; 10161 map_array[bcmStatGroupModeAttrPktType] 10162 [unknown_ipmc_pkt] = temp_count; 10163 map_array[bcmStatGroupModeAttrPktType][256] = 10164 temp_count+1; 10165 } 10166 } 10167 if (flex_attribute->combine_pkt_resolution_flags & 10168 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_L2_PKT) { 10169 if (map_array[bcmStatGroupModeAttrPktType] 10170 [known_mpls_l2_pkt] == 0xFF) { 10171 temp_count = map_array[bcmStatGroupModeAttrPktType] 10172 [256]; 10173 map_array[bcmStatGroupModeAttrPktType] 10174 [known_mpls_l2_pkt] = temp_count; 10175 map_array[bcmStatGroupModeAttrPktType][256] = 10176 temp_count+1; 10177 } 10178 } 10179 if (flex_attribute->combine_pkt_resolution_flags & 10180 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_L3_PKT) { 10181 if (map_array[bcmStatGroupModeAttrPktType] 10182 [known_mpls_l3_pkt] == 0xFF) { 10183 temp_count = map_array[bcmStatGroupModeAttrPktType] 10184 [256]; 10185 map_array[bcmStatGroupModeAttrPktType] 10186 [known_mpls_l3_pkt] = temp_count; 10187 map_array[bcmStatGroupModeAttrPktType][256] = 10188 temp_count+1; 10189 } 10190 } 10191 if (flex_attribute->combine_pkt_resolution_flags & 10192 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_PKT) { 10193 if (map_array[bcmStatGroupModeAttrPktType] 10194 [known_mpls_pkt] == 0xFF) { 10195 temp_count = map_array[bcmStatGroupModeAttrPktType] 10196 [256]; 10197 map_array[bcmStatGroupModeAttrPktType] 10198 [known_mpls_pkt] = temp_count; 10199 map_array[bcmStatGroupModeAttrPktType][256] = 10200 temp_count+1; 10201 } 10202 } 10203 if (flex_attribute->combine_attr_counter[counter]. 10204 pkt_resolution_flags & 10205 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_MPLS_PKT) { 10206 if (map_array[bcmStatGroupModeAttrPktType] 10207 [unknown_mpls_pkt] == 0xFF) { 10208 temp_count = map_array[bcmStatGroupModeAttrPktType] 10209 [256]; 10210 map_array[bcmStatGroupModeAttrPktType] 10211 [unknown_mpls_pkt] = temp_count; 10212 map_array[bcmStatGroupModeAttrPktType][256] = 10213 temp_count+1; 10214 } 10215 } 10216 if (flex_attribute->combine_pkt_resolution_flags & 10217 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_MULTICAST_PKT) { 10218 if (map_array[bcmStatGroupModeAttrPktType] 10219 [known_mpls_multicast_pkt] == 0xFF) { 10220 temp_count = map_array[bcmStatGroupModeAttrPktType] 10221 [256]; 10222 map_array[bcmStatGroupModeAttrPktType] 10223 [known_mpls_multicast_pkt] = temp_count; 10224 map_array[bcmStatGroupModeAttrPktType][256] = 10225 temp_count+1; 10226 } 10227 } 10228 if (flex_attribute->combine_pkt_resolution_flags & 10229 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MIM_PKT) { 10230 if (map_array[bcmStatGroupModeAttrPktType] 10231 [known_mim_pkt] == 0xFF) { 10232 temp_count = map_array[bcmStatGroupModeAttrPktType] 10233 [256]; 10234 map_array[bcmStatGroupModeAttrPktType] 10235 [known_mim_pkt] = temp_count; 10236 map_array[bcmStatGroupModeAttrPktType][256] = 10237 temp_count+1; 10238 } 10239 } 10240 if (flex_attribute->combine_pkt_resolution_flags & 10241 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_MIM_PKT) { 10242 if (map_array[bcmStatGroupModeAttrPktType] 10243 [unknown_mim_pkt] == 0xFF) { 10244 temp_count = map_array[bcmStatGroupModeAttrPktType] 10245 [256]; 10246 map_array[bcmStatGroupModeAttrPktType] 10247 [unknown_mim_pkt] = temp_count; 10248 map_array[bcmStatGroupModeAttrPktType][256] = 10249 temp_count+1; 10250 } 10251 } 10252 if (flex_attribute->combine_pkt_resolution_flags & 10253 BCM_STAT_FLEX_PKT_TYPE_KNOWN_TRILL_PKT) { 10254 if (map_array[bcmStatGroupModeAttrPktType] 10255 [known_trill_pkt] == 0xFF) { 10256 temp_count = map_array[bcmStatGroupModeAttrPktType] 10257 [256]; 10258 map_array[bcmStatGroupModeAttrPktType] 10259 [known_trill_pkt] = temp_count; 10260 map_array[bcmStatGroupModeAttrPktType][256] = 10261 temp_count+1; 10262 } 10263 } 10264 if (flex_attribute->combine_pkt_resolution_flags & 10265 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_TRILL_PKT) { 10266 if (map_array[bcmStatGroupModeAttrPktType] 10267 [unknown_trill_pkt] == 0xFF) { 10268 temp_count = map_array[bcmStatGroupModeAttrPktType] 10269 [256]; 10270 map_array[bcmStatGroupModeAttrPktType] 10271 [unknown_trill_pkt] = temp_count; 10272 map_array[bcmStatGroupModeAttrPktType][256] = 10273 temp_count+1; 10274 } 10275 } 10276 if (flex_attribute->combine_pkt_resolution_flags & 10277 BCM_STAT_FLEX_PKT_TYPE_KNOWN_NIV_PKT) { 10278 if (map_array[bcmStatGroupModeAttrPktType] 10279 [known_niv_pkt] == 0xFF) { 10280 temp_count = map_array[bcmStatGroupModeAttrPktType] 10281 [256]; 10282 map_array[bcmStatGroupModeAttrPktType] 10283 [known_niv_pkt] = temp_count; 10284 map_array[bcmStatGroupModeAttrPktType][256] = 10285 temp_count+1; 10286 } 10287 } 10288 if (flex_attribute->combine_pkt_resolution_flags & 10289 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_NIV_PKT) { 10290 if (map_array[bcmStatGroupModeAttrPktType] 10291 [unknown_niv_pkt] == 0xFF) { 10292 temp_count = map_array[bcmStatGroupModeAttrPktType] 10293 [256]; 10294 map_array[bcmStatGroupModeAttrPktType] 10295 [unknown_niv_pkt] = temp_count; 10296 map_array[bcmStatGroupModeAttrPktType][256] = 10297 temp_count+1; 10298 } 10299 } 10300 #if defined(BCM_TRIDENT2_SUPPORT) 10301 if (SOC_IS_TD2_TT2(unit)) { 10302 if (flex_attribute->combine_pkt_resolution_flags & 10303 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2GRE_PKT) { 10304 if (map_array[bcmStatGroupModeAttrPktType] 10305 [known_l2gre_pkt] == 0xFF) { 10306 temp_count = map_array[bcmStatGroupModeAttrPktType] 10307 [256]; 10308 map_array[bcmStatGroupModeAttrPktType] 10309 [known_l2gre_pkt] = temp_count; 10310 map_array[bcmStatGroupModeAttrPktType][256] = 10311 temp_count+1; 10312 } 10313 } 10314 if (flex_attribute->combine_pkt_resolution_flags & 10315 BCM_STAT_FLEX_PKT_TYPE_KNOWN_VXLAN_PKT) { 10316 if (map_array[bcmStatGroupModeAttrPktType] 10317 [known_fcoe_pkt] == 0xFF) { 10318 temp_count = map_array[bcmStatGroupModeAttrPktType] 10319 [256]; 10320 map_array[bcmStatGroupModeAttrPktType] 10321 [known_fcoe_pkt] = temp_count; 10322 map_array[bcmStatGroupModeAttrPktType][256] = 10323 temp_count+1; 10324 } 10325 } 10326 if (flex_attribute->combine_pkt_resolution_flags & 10327 BCM_STAT_FLEX_PKT_TYPE_KNOWN_FCOE_PKT) { 10328 if (map_array[bcmStatGroupModeAttrPktType] 10329 [known_vxlan_pkt] == 0xFF) { 10330 temp_count = map_array[bcmStatGroupModeAttrPktType] 10331 [256]; 10332 map_array[bcmStatGroupModeAttrPktType] 10333 [known_vxlan_pkt] = temp_count; 10334 map_array[bcmStatGroupModeAttrPktType][256] = 10335 temp_count+1; 10336 } 10337 } 10338 if (flex_attribute->combine_pkt_resolution_flags & 10339 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_FCOE_PKT) { 10340 if (map_array[bcmStatGroupModeAttrPktType] 10341 [unknown_fcoe_pkt] == 0xFF) { 10342 temp_count = map_array[bcmStatGroupModeAttrPktType] 10343 [256]; 10344 map_array[bcmStatGroupModeAttrPktType] 10345 [unknown_fcoe_pkt] = temp_count; 10346 map_array[bcmStatGroupModeAttrPktType][256] = 10347 temp_count+1; 10348 } 10349 } 10350 } 10351 #endif 10352 } 10353 } 10354 if (flex_attribute->svp != 0) { 10355 if (map_array[bcmStatGroupModeAttrIngNetworkGroup] == NULL) { 10356 map_array[bcmStatGroupModeAttrIngNetworkGroup] = 10357 (uint8 *) sal_alloc(256+1,"map_array"); 10358 10359 if (map_array[bcmStatGroupModeAttrIngNetworkGroup] == NULL) { 10360 rv = BCM_E_MEMORY; 10361 goto cleanup; 10362 } 10363 10364 sal_memset(map_array[bcmStatGroupModeAttrIngNetworkGroup], 10365 0xFF,256); 10366 map_array[bcmStatGroupModeAttrIngNetworkGroup][256]=0; 10367 } 10368 if (direction == bcmStatFlexDirectionIngress) { 10369 max_count= (1 << ing_pkt_attr_cmprsd_bits_g[unit].svp_type)-1; 10370 } else { 10371 max_count= (1 << egr_pkt_attr_cmprsd_bits_g[unit].svp_type)-1; 10372 } 10373 for (loop_index=0; loop_index <= max_count ; loop_index++) { 10374 if (BCM_STAT_FLEX_VALUE_GET( 10375 flex_attribute->combine_value_array[bcmStatFlexAttrSvp], 10376 loop_index)) { 10377 if (map_array[bcmStatGroupModeAttrIngNetworkGroup] 10378 [loop_index] == 0xFF) { 10379 temp_count = map_array 10380 [bcmStatGroupModeAttrIngNetworkGroup] 10381 [256]; 10382 map_array[bcmStatGroupModeAttrIngNetworkGroup] 10383 [loop_index] = temp_count; 10384 map_array[bcmStatGroupModeAttrIngNetworkGroup] 10385 [256] = temp_count + 1; 10386 } 10387 } 10388 } 10389 } 10390 if (flex_attribute->dvp != 0) { 10391 if (map_array[bcmStatGroupModeAttrEgrNetworkGroup] == NULL) { 10392 map_array[bcmStatGroupModeAttrEgrNetworkGroup] = 10393 (uint8 *) sal_alloc(256+1,"map_array"); 10394 10395 if (map_array[bcmStatGroupModeAttrEgrNetworkGroup] == NULL) { 10396 rv = BCM_E_MEMORY; 10397 goto cleanup; 10398 } 10399 10400 sal_memset(map_array[bcmStatGroupModeAttrEgrNetworkGroup], 10401 0xFF,256); 10402 map_array[bcmStatGroupModeAttrEgrNetworkGroup][256]=0; 10403 } 10404 max_count= (1 << egr_pkt_attr_cmprsd_bits_g[unit].dvp_type)-1; 10405 for (loop_index=0; loop_index <= max_count ; loop_index++) { 10406 if (BCM_STAT_FLEX_VALUE_GET( 10407 flex_attribute->combine_value_array[bcmStatFlexAttrDvp], 10408 loop_index)) { 10409 if (map_array[bcmStatGroupModeAttrEgrNetworkGroup] 10410 [loop_index] == 0xFF) { 10411 temp_count = map_array 10412 [bcmStatGroupModeAttrEgrNetworkGroup] 10413 [256]; 10414 map_array[bcmStatGroupModeAttrEgrNetworkGroup] 10415 [loop_index] = temp_count; 10416 map_array[bcmStatGroupModeAttrEgrNetworkGroup] 10417 [256] = temp_count + 1; 10418 } 10419 } 10420 } 10421 } 10422 if (flex_attribute->drop != 0) { 10423 if (map_array[bcmStatGroupModeAttrDrop] == NULL) { 10424 map_array[bcmStatGroupModeAttrDrop] = 10425 (uint8 *) sal_alloc(256+1,"map_array"); 10426 10427 if (map_array[bcmStatGroupModeAttrDrop] == NULL) { 10428 rv = BCM_E_MEMORY; 10429 goto cleanup; 10430 } 10431 10432 sal_memset(map_array[bcmStatGroupModeAttrDrop], 10433 0xFF,256); 10434 map_array[bcmStatGroupModeAttrDrop][256]=0; 10435 } 10436 if (flex_attribute->combine_drop_flags & BCM_STAT_FLEX_DROP_DISABLE) { 10437 if (map_array[bcmStatGroupModeAttrDrop][0] == 0xFF) { 10438 temp_count = map_array[bcmStatGroupModeAttrDrop][256]; 10439 map_array[bcmStatGroupModeAttrDrop][0] = temp_count; 10440 map_array[bcmStatGroupModeAttrDrop][256]=temp_count + 1; 10441 } 10442 } 10443 if (flex_attribute->combine_drop_flags & BCM_STAT_FLEX_DROP_ENABLE) { 10444 if (map_array[bcmStatGroupModeAttrDrop][1] == 0xFF) { 10445 temp_count = map_array[bcmStatGroupModeAttrDrop][256]; 10446 map_array[bcmStatGroupModeAttrDrop][1] = temp_count; 10447 map_array[bcmStatGroupModeAttrDrop][256]=temp_count + 1; 10448 } 10449 } 10450 } 10451 /* END: PKT_RES_MAP*/ 10452 if (flex_attribute->ip_pkt!= 0) { 10453 if (map_array[bcmStatGroupModeAttrPacketTypeIp] == NULL) { 10454 map_array[bcmStatGroupModeAttrPacketTypeIp] = 10455 (uint8 *) sal_alloc(256+1,"map_array"); 10456 10457 if (map_array[bcmStatGroupModeAttrPacketTypeIp] == NULL) { 10458 rv = BCM_E_MEMORY; 10459 goto cleanup; 10460 } 10461 10462 sal_memset(map_array[bcmStatGroupModeAttrPacketTypeIp], 10463 0xFF,256); 10464 map_array[bcmStatGroupModeAttrPacketTypeIp][256]=0; 10465 } 10466 if (flex_attribute->combine_ip_pkt_flags & BCM_STAT_FLEX_IP_PKT_DISABLE) { 10467 if (map_array[bcmStatGroupModeAttrPacketTypeIp][0] == 0xFF) { 10468 temp_count = map_array[bcmStatGroupModeAttrPacketTypeIp][256]; 10469 map_array[bcmStatGroupModeAttrPacketTypeIp][0] = temp_count; 10470 map_array[bcmStatGroupModeAttrPacketTypeIp][256]=temp_count + 1; 10471 } 10472 } 10473 if (flex_attribute->combine_ip_pkt_flags & BCM_STAT_FLEX_IP_PKT_ENABLE) { 10474 if (map_array[bcmStatGroupModeAttrPacketTypeIp][1] == 0xFF) { 10475 temp_count = map_array[bcmStatGroupModeAttrPacketTypeIp][256]; 10476 map_array[bcmStatGroupModeAttrPacketTypeIp][1] = temp_count; 10477 map_array[bcmStatGroupModeAttrPacketTypeIp][256]=temp_count + 1; 10478 } 10479 } 10480 } 10481 } else { 10482 for (counter = 0;counter < flex_attribute->total_counters ; counter ++ ) { 10483 #ifdef BCM_APACHE_SUPPORT 10484 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 10485 if (flex_attribute->cng_3 != 0) { 10486 if (map_array[bcmStatGroupModeAttrColorMplsLabelThird] == NULL) { 10487 map_array[bcmStatGroupModeAttrColorMplsLabelThird] = 10488 (uint8 *) sal_alloc(256+1,"map_array"); 10489 sal_memset(map_array[bcmStatGroupModeAttrColorMplsLabelThird], 10490 0xFF,256); 10491 map_array[bcmStatGroupModeAttrColorMplsLabelThird][256]=0; 10492 } 10493 temp_count = map_array[bcmStatGroupModeAttrColorMplsLabelThird][256]; 10494 if (flex_attribute->combine_attr_counter[counter]. 10495 pre_ifp_color_mpls_label3_flags & BCM_STAT_FLEX_COLOR_GREEN) { 10496 if (map_array[bcmStatGroupModeAttrColorMplsLabelThird][0] == 0xFF) { 10497 map_array[bcmStatGroupModeAttrColorMplsLabelThird][0] = temp_count; 10498 temp_count++; 10499 } 10500 } 10501 if (flex_attribute->combine_attr_counter[counter]. 10502 pre_ifp_color_mpls_label3_flags & BCM_STAT_FLEX_COLOR_RED) { 10503 if (map_array[bcmStatGroupModeAttrColorMplsLabelThird][1] == 0xFF) { 10504 map_array[bcmStatGroupModeAttrColorMplsLabelThird][1] = temp_count; 10505 temp_count++; 10506 } 10507 } 10508 if (flex_attribute->combine_attr_counter[counter]. 10509 pre_ifp_color_mpls_label3_flags & BCM_STAT_FLEX_COLOR_YELLOW) { 10510 if (map_array[bcmStatGroupModeAttrColorMplsLabelThird][3] == 0xFF) { 10511 map_array[bcmStatGroupModeAttrColorMplsLabelThird][3] = temp_count; 10512 temp_count++; 10513 } 10514 } 10515 map_array[bcmStatGroupModeAttrColorMplsLabelThird][256] = temp_count; 10516 } 10517 if (flex_attribute->phb_3 != 0) { 10518 /* 10519 shift_by_bits = 0; 10520 */ 10521 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelThird] == NULL) { 10522 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird] = 10523 (uint8 *) sal_alloc(256+1,"map_array"); 10524 sal_memset(map_array[bcmStatGroupModeAttrIntPriMplsLabelThird], 10525 0xFF,256); 10526 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][256]=0; 10527 } 10528 temp_count = map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][256]; 10529 if (flex_attribute->combine_attr_counter[counter]. 10530 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI0) { 10531 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][0] == 0xFF) { 10532 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][0] = temp_count; 10533 temp_count++; 10534 } 10535 } 10536 if (flex_attribute->combine_attr_counter[counter]. 10537 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI1) { 10538 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][1] == 0xFF) { 10539 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][1] = temp_count; 10540 temp_count++; 10541 } 10542 } 10543 if (flex_attribute->combine_attr_counter[counter]. 10544 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI2) { 10545 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][2] == 0xFF) { 10546 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][2] = temp_count; 10547 temp_count++; 10548 } 10549 } 10550 if (flex_attribute->combine_attr_counter[counter]. 10551 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI3) { 10552 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][3] == 0xFF) { 10553 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][3] = temp_count; 10554 temp_count++; 10555 } 10556 } 10557 if (flex_attribute->combine_attr_counter[counter]. 10558 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI4) { 10559 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][4] == 0xFF) { 10560 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][4] = temp_count; 10561 temp_count++; 10562 } 10563 } 10564 if (flex_attribute->combine_attr_counter[counter]. 10565 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI5) { 10566 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][5] == 0xFF) { 10567 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][5] = temp_count; 10568 temp_count++; 10569 } 10570 } 10571 if (flex_attribute->combine_attr_counter[counter]. 10572 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI6) { 10573 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][6] == 0xFF) { 10574 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][6] = temp_count; 10575 temp_count++; 10576 } 10577 } 10578 if (flex_attribute->combine_attr_counter[counter]. 10579 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI7) { 10580 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][7] == 0xFF) { 10581 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][7] = temp_count; 10582 temp_count++; 10583 } 10584 } 10585 if (flex_attribute->combine_attr_counter[counter]. 10586 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI8) { 10587 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][8] == 0xFF) { 10588 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][8] = temp_count; 10589 temp_count++; 10590 } 10591 } 10592 if (flex_attribute->combine_attr_counter[counter]. 10593 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI9) { 10594 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][9] == 0xFF) { 10595 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][9] = temp_count; 10596 temp_count++; 10597 } 10598 } 10599 if (flex_attribute->combine_attr_counter[counter]. 10600 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI10) { 10601 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][10] == 0xFF) { 10602 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][10] = temp_count; 10603 temp_count++; 10604 } 10605 } 10606 if (flex_attribute->combine_attr_counter[counter]. 10607 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI11) { 10608 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][11] == 0xFF) { 10609 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][11] = temp_count; 10610 temp_count++; 10611 } 10612 } 10613 if (flex_attribute->combine_attr_counter[counter]. 10614 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI12) { 10615 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][12] == 0xFF) { 10616 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][12] = temp_count; 10617 temp_count++; 10618 } 10619 } 10620 if (flex_attribute->combine_attr_counter[counter]. 10621 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI13) { 10622 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][13] == 0xFF) { 10623 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][13] = temp_count; 10624 temp_count++; 10625 } 10626 } 10627 if (flex_attribute->combine_attr_counter[counter]. 10628 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI14) { 10629 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][14] == 0xFF) { 10630 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][14] = temp_count; 10631 temp_count++; 10632 } 10633 } 10634 if (flex_attribute->combine_attr_counter[counter]. 10635 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI15) { 10636 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][15] == 0xFF) { 10637 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][15] = temp_count; 10638 temp_count++; 10639 } 10640 } 10641 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][256] = temp_count; 10642 } 10643 if (flex_attribute->cng_2 != 0) { 10644 if (map_array[bcmStatGroupModeAttrColorMplsLabelSecond] == NULL) { 10645 map_array[bcmStatGroupModeAttrColorMplsLabelSecond] = 10646 (uint8 *) sal_alloc(256+1,"map_array"); 10647 sal_memset(map_array[bcmStatGroupModeAttrColorMplsLabelSecond], 10648 0xFF,256); 10649 map_array[bcmStatGroupModeAttrColorMplsLabelSecond][256]=0; 10650 } 10651 temp_count = map_array[bcmStatGroupModeAttrColorMplsLabelSecond][256]; 10652 if (flex_attribute->combine_attr_counter[counter]. 10653 pre_ifp_color_mpls_label2_flags & BCM_STAT_FLEX_COLOR_GREEN) { 10654 if (map_array[bcmStatGroupModeAttrColorMplsLabelSecond][0] == 0xFF) { 10655 map_array[bcmStatGroupModeAttrColorMplsLabelSecond][0] = temp_count; 10656 temp_count++; 10657 } 10658 } 10659 if (flex_attribute->combine_attr_counter[counter]. 10660 pre_ifp_color_mpls_label2_flags & BCM_STAT_FLEX_COLOR_RED) { 10661 if (map_array[bcmStatGroupModeAttrColorMplsLabelSecond][1] == 0xFF) { 10662 map_array[bcmStatGroupModeAttrColorMplsLabelSecond][1] = temp_count; 10663 temp_count++; 10664 } 10665 } 10666 if (flex_attribute->combine_attr_counter[counter]. 10667 pre_ifp_color_mpls_label2_flags & BCM_STAT_FLEX_COLOR_YELLOW) { 10668 if (map_array[bcmStatGroupModeAttrColorMplsLabelSecond][3] == 0xFF) { 10669 map_array[bcmStatGroupModeAttrColorMplsLabelSecond][3] = temp_count; 10670 temp_count++; 10671 } 10672 } 10673 map_array[bcmStatGroupModeAttrColorMplsLabelSecond][256] = temp_count; 10674 } 10675 if (flex_attribute->phb_2 != 0) { 10676 /* 10677 shift_by_bits = 0; 10678 */ 10679 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond] == NULL) { 10680 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond] = 10681 (uint8 *) sal_alloc(256+1,"map_array"); 10682 sal_memset(map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond], 10683 0xFF,256); 10684 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][256]=0; 10685 } 10686 temp_count = map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][256]; 10687 if (flex_attribute->combine_attr_counter[counter]. 10688 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI0) { 10689 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][0] == 0xFF) { 10690 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][0] = temp_count; 10691 temp_count++; 10692 } 10693 } 10694 if (flex_attribute->combine_attr_counter[counter]. 10695 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI1) { 10696 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][1] == 0xFF) { 10697 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][1] = temp_count; 10698 temp_count++; 10699 } 10700 } 10701 if (flex_attribute->combine_attr_counter[counter]. 10702 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI2) { 10703 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][2] == 0xFF) { 10704 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][2] = temp_count; 10705 temp_count++; 10706 } 10707 } 10708 if (flex_attribute->combine_attr_counter[counter]. 10709 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI3) { 10710 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][3] == 0xFF) { 10711 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][3] = temp_count; 10712 temp_count++; 10713 } 10714 } 10715 if (flex_attribute->combine_attr_counter[counter]. 10716 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI4) { 10717 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][4] == 0xFF) { 10718 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][4] = temp_count; 10719 temp_count++; 10720 } 10721 } 10722 if (flex_attribute->combine_attr_counter[counter]. 10723 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI5) { 10724 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][5] == 0xFF) { 10725 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][5] = temp_count; 10726 temp_count++; 10727 } 10728 } 10729 if (flex_attribute->combine_attr_counter[counter]. 10730 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI6) { 10731 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][6] == 0xFF) { 10732 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][6] = temp_count; 10733 temp_count++; 10734 } 10735 } 10736 if (flex_attribute->combine_attr_counter[counter]. 10737 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI7) { 10738 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][7] == 0xFF) { 10739 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][7] = temp_count; 10740 temp_count++; 10741 } 10742 } 10743 if (flex_attribute->combine_attr_counter[counter]. 10744 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI8) { 10745 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][8] == 0xFF) { 10746 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][8] = temp_count; 10747 temp_count++; 10748 } 10749 } 10750 if (flex_attribute->combine_attr_counter[counter]. 10751 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI9) { 10752 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][9] == 0xFF) { 10753 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][9] = temp_count; 10754 temp_count++; 10755 } 10756 } 10757 if (flex_attribute->combine_attr_counter[counter]. 10758 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI10) { 10759 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][10] == 0xFF) { 10760 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][10] = temp_count; 10761 temp_count++; 10762 } 10763 } 10764 if (flex_attribute->combine_attr_counter[counter]. 10765 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI11) { 10766 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][11] == 0xFF) { 10767 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][11] = temp_count; 10768 temp_count++; 10769 } 10770 } 10771 if (flex_attribute->combine_attr_counter[counter]. 10772 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI12) { 10773 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][12] == 0xFF) { 10774 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][12] = temp_count; 10775 temp_count++; 10776 } 10777 } 10778 if (flex_attribute->combine_attr_counter[counter]. 10779 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI13) { 10780 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][13] == 0xFF) { 10781 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][13] = temp_count; 10782 temp_count++; 10783 } 10784 } 10785 if (flex_attribute->combine_attr_counter[counter]. 10786 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI14) { 10787 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][14] == 0xFF) { 10788 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][14] = temp_count; 10789 temp_count++; 10790 } 10791 } 10792 if (flex_attribute->combine_attr_counter[counter]. 10793 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI15) { 10794 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][15] == 0xFF) { 10795 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][15] = temp_count; 10796 temp_count++; 10797 } 10798 } 10799 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][256] = temp_count; 10800 } 10801 if (flex_attribute->cng_1 != 0) { 10802 if (map_array[bcmStatGroupModeAttrColorMplsLabelFirst] == NULL) { 10803 map_array[bcmStatGroupModeAttrColorMplsLabelFirst] = 10804 (uint8 *) sal_alloc(256+1,"map_array"); 10805 sal_memset(map_array[bcmStatGroupModeAttrColorMplsLabelFirst], 10806 0xFF,256); 10807 map_array[bcmStatGroupModeAttrColorMplsLabelFirst][256]=0; 10808 } 10809 temp_count = map_array[bcmStatGroupModeAttrColorMplsLabelFirst][256]; 10810 if (flex_attribute->combine_attr_counter[counter]. 10811 pre_ifp_color_mpls_label1_flags & BCM_STAT_FLEX_COLOR_GREEN) { 10812 if (map_array[bcmStatGroupModeAttrColorMplsLabelFirst][0] == 0xFF) { 10813 map_array[bcmStatGroupModeAttrColorMplsLabelFirst][0] = temp_count; 10814 temp_count++; 10815 } 10816 } 10817 if (flex_attribute->combine_attr_counter[counter]. 10818 pre_ifp_color_mpls_label1_flags & BCM_STAT_FLEX_COLOR_RED) { 10819 if (map_array[bcmStatGroupModeAttrColorMplsLabelFirst][1] == 0xFF) { 10820 map_array[bcmStatGroupModeAttrColorMplsLabelFirst][1] = temp_count; 10821 temp_count++; 10822 } 10823 } 10824 if (flex_attribute->combine_attr_counter[counter]. 10825 pre_ifp_color_mpls_label1_flags & BCM_STAT_FLEX_COLOR_YELLOW) { 10826 if (map_array[bcmStatGroupModeAttrColorMplsLabelFirst][3] == 0xFF) { 10827 map_array[bcmStatGroupModeAttrColorMplsLabelFirst][3] = temp_count; 10828 temp_count++; 10829 } 10830 } 10831 map_array[bcmStatGroupModeAttrColorMplsLabelFirst][256] = temp_count; 10832 } 10833 if (flex_attribute->phb_1 != 0) { 10834 /* 10835 shift_by_bits = 0; 10836 */ 10837 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst] == NULL) { 10838 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst] = 10839 (uint8 *) sal_alloc(256+1,"map_array"); 10840 sal_memset(map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst], 10841 0xFF,256); 10842 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][256] = 0; 10843 } 10844 temp_count = map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][256]; 10845 if (flex_attribute->combine_attr_counter[counter]. 10846 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI0) { 10847 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][0] == 0xFF) { 10848 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][0] = temp_count; 10849 temp_count++; 10850 } 10851 } 10852 if (flex_attribute->combine_attr_counter[counter]. 10853 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI1) { 10854 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][1] == 0xFF) { 10855 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][1] = temp_count; 10856 temp_count++; 10857 } 10858 } 10859 if (flex_attribute->combine_attr_counter[counter]. 10860 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI2) { 10861 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][2] == 0xFF) { 10862 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][2] = temp_count; 10863 temp_count++; 10864 } 10865 } 10866 if (flex_attribute->combine_attr_counter[counter]. 10867 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI3) { 10868 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][3] == 0xFF) { 10869 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][3] = temp_count; 10870 temp_count++; 10871 } 10872 } 10873 if (flex_attribute->combine_attr_counter[counter]. 10874 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI4) { 10875 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][4] == 0xFF) { 10876 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][4] = temp_count; 10877 temp_count++; 10878 } 10879 } 10880 if (flex_attribute->combine_attr_counter[counter]. 10881 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI5) { 10882 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][5] == 0xFF) { 10883 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][5] = temp_count; 10884 temp_count++; 10885 } 10886 } 10887 if (flex_attribute->combine_attr_counter[counter]. 10888 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI6) { 10889 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][6] == 0xFF) { 10890 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][6] = temp_count; 10891 temp_count++; 10892 } 10893 } 10894 if (flex_attribute->combine_attr_counter[counter]. 10895 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI7) { 10896 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][7] == 0xFF) { 10897 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][7] = temp_count; 10898 temp_count++; 10899 } 10900 } 10901 if (flex_attribute->combine_attr_counter[counter]. 10902 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI8) { 10903 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][8] == 0xFF) { 10904 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][8] = temp_count; 10905 temp_count++; 10906 } 10907 } 10908 if (flex_attribute->combine_attr_counter[counter]. 10909 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI9) { 10910 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][9] == 0xFF) { 10911 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][9] = temp_count; 10912 temp_count++; 10913 } 10914 } 10915 if (flex_attribute->combine_attr_counter[counter]. 10916 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI10) { 10917 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][10] == 0xFF) { 10918 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][10] = temp_count; 10919 temp_count++; 10920 } 10921 } 10922 if (flex_attribute->combine_attr_counter[counter]. 10923 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI11) { 10924 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][11] == 0xFF) { 10925 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][11] = temp_count; 10926 temp_count++; 10927 } 10928 } 10929 if (flex_attribute->combine_attr_counter[counter]. 10930 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI12) { 10931 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][12] == 0xFF) { 10932 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][12] = temp_count; 10933 temp_count++; 10934 } 10935 } 10936 if (flex_attribute->combine_attr_counter[counter]. 10937 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI13) { 10938 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][13] == 0xFF) { 10939 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][13] = temp_count; 10940 temp_count++; 10941 } 10942 } 10943 if (flex_attribute->combine_attr_counter[counter]. 10944 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI14) { 10945 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][14] == 0xFF) { 10946 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][14] = temp_count; 10947 temp_count++; 10948 } 10949 } 10950 if (flex_attribute->combine_attr_counter[counter]. 10951 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI15) { 10952 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][15] == 0xFF) { 10953 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][15] = temp_count; 10954 temp_count++; 10955 } 10956 } 10957 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][256] = temp_count; 10958 } 10959 } 10960 #endif 10961 10962 #if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TRIDENT3_SUPPORT) 10963 if (soc_feature(unit, soc_feature_flex_stat_egr_queue_congestion_marked)) { 10964 if (flex_attribute->mmu_cos != 0) { 10965 if (map_array[bcmStatGroupModeAttrCos] == NULL) { 10966 map_array[bcmStatGroupModeAttrCos] = 10967 (uint8 *) sal_alloc(256+1,"map_array"); 10968 10969 if (map_array[bcmStatGroupModeAttrCos] == NULL) { 10970 rv = BCM_E_MEMORY; 10971 goto cleanup; 10972 } 10973 10974 sal_memset(map_array[bcmStatGroupModeAttrCos], 10975 0xFF,256); 10976 map_array[bcmStatGroupModeAttrCos][256] = 0; 10977 } 10978 if (flex_attribute->combine_attr_counter[counter]. 10979 mmu_cos_flags & BCM_STAT_FLEX_COS0) { 10980 if (map_array[bcmStatGroupModeAttrCos][0] == 0xFF) { 10981 temp_count = map_array[bcmStatGroupModeAttrCos][256]; 10982 map_array[bcmStatGroupModeAttrCos][0] = temp_count; 10983 map_array[bcmStatGroupModeAttrCos][256] = temp_count+1; 10984 } 10985 } 10986 if (flex_attribute->combine_attr_counter[counter]. 10987 mmu_cos_flags & BCM_STAT_FLEX_COS1) { 10988 if (map_array[bcmStatGroupModeAttrCos][1] == 0xFF) { 10989 temp_count = map_array[bcmStatGroupModeAttrCos][256]; 10990 map_array[bcmStatGroupModeAttrCos][1] = temp_count; 10991 map_array[bcmStatGroupModeAttrCos][256] = temp_count+1; 10992 } 10993 } 10994 if (flex_attribute->combine_attr_counter[counter]. 10995 mmu_cos_flags & BCM_STAT_FLEX_COS2) { 10996 if (map_array[bcmStatGroupModeAttrCos][2] == 0xFF) { 10997 temp_count = map_array[bcmStatGroupModeAttrCos][256]; 10998 map_array[bcmStatGroupModeAttrCos][2] = temp_count; 10999 map_array[bcmStatGroupModeAttrCos][256] = temp_count+1; 11000 } 11001 } 11002 if (flex_attribute->combine_attr_counter[counter]. 11003 mmu_cos_flags & BCM_STAT_FLEX_COS3) { 11004 if (map_array[bcmStatGroupModeAttrCos][3] == 0xFF) { 11005 temp_count = map_array[bcmStatGroupModeAttrCos][256]; 11006 map_array[bcmStatGroupModeAttrCos][3] = temp_count; 11007 map_array[bcmStatGroupModeAttrCos][256] = temp_count+1; 11008 } 11009 } 11010 if (flex_attribute->combine_attr_counter[counter]. 11011 mmu_cos_flags & BCM_STAT_FLEX_COS4) { 11012 if (map_array[bcmStatGroupModeAttrCos][4] == 0xFF) { 11013 temp_count = map_array[bcmStatGroupModeAttrCos][256]; 11014 map_array[bcmStatGroupModeAttrCos][4] = temp_count; 11015 map_array[bcmStatGroupModeAttrCos][256] = temp_count+1; 11016 } 11017 } 11018 if (flex_attribute->combine_attr_counter[counter]. 11019 mmu_cos_flags & BCM_STAT_FLEX_COS5) { 11020 if (map_array[bcmStatGroupModeAttrCos][5] == 0xFF) { 11021 temp_count = map_array[bcmStatGroupModeAttrCos][256]; 11022 map_array[bcmStatGroupModeAttrCos][5] = temp_count; 11023 map_array[bcmStatGroupModeAttrCos][256] = temp_count+1; 11024 } 11025 } 11026 if (flex_attribute->combine_attr_counter[counter]. 11027 mmu_cos_flags & BCM_STAT_FLEX_COS6) { 11028 if (map_array[bcmStatGroupModeAttrCos][6] == 0xFF) { 11029 temp_count = map_array[bcmStatGroupModeAttrCos][256]; 11030 map_array[bcmStatGroupModeAttrCos][6] = temp_count; 11031 map_array[bcmStatGroupModeAttrCos][256] = temp_count+1; 11032 } 11033 } 11034 if (flex_attribute->combine_attr_counter[counter]. 11035 mmu_cos_flags & BCM_STAT_FLEX_COS7) { 11036 if (map_array[bcmStatGroupModeAttrCos][7] == 0xFF) { 11037 temp_count = map_array[bcmStatGroupModeAttrCos][256]; 11038 map_array[bcmStatGroupModeAttrCos][7] = temp_count; 11039 map_array[bcmStatGroupModeAttrCos][256] = temp_count+1; 11040 } 11041 } 11042 if (flex_attribute->combine_attr_counter[counter]. 11043 mmu_cos_flags & BCM_STAT_FLEX_COS8) { 11044 if (map_array[bcmStatGroupModeAttrCos][8] == 0xFF) { 11045 temp_count = map_array[bcmStatGroupModeAttrCos][256]; 11046 map_array[bcmStatGroupModeAttrCos][8] = temp_count; 11047 map_array[bcmStatGroupModeAttrCos][256] = temp_count+1; 11048 } 11049 } 11050 if (flex_attribute->combine_attr_counter[counter]. 11051 mmu_cos_flags & BCM_STAT_FLEX_COS9) { 11052 if (map_array[bcmStatGroupModeAttrCos][9] == 0xFF) { 11053 temp_count = map_array[bcmStatGroupModeAttrCos][256]; 11054 map_array[bcmStatGroupModeAttrCos][9] = temp_count; 11055 map_array[bcmStatGroupModeAttrCos][256] = temp_count+1; 11056 } 11057 } 11058 if (flex_attribute->combine_attr_counter[counter]. 11059 mmu_cos_flags & BCM_STAT_FLEX_COS10) { 11060 if (map_array[bcmStatGroupModeAttrCos][10] == 0xFF) { 11061 temp_count = map_array[bcmStatGroupModeAttrCos][256]; 11062 map_array[bcmStatGroupModeAttrCos][10] = temp_count; 11063 map_array[bcmStatGroupModeAttrCos][256] = temp_count+1; 11064 } 11065 } 11066 if (flex_attribute->combine_attr_counter[counter]. 11067 mmu_cos_flags & BCM_STAT_FLEX_COS11) { 11068 if (map_array[bcmStatGroupModeAttrCos][11] == 0xFF) { 11069 temp_count = map_array[bcmStatGroupModeAttrCos][256]; 11070 map_array[bcmStatGroupModeAttrCos][11] = temp_count; 11071 map_array[bcmStatGroupModeAttrCos][256] = temp_count+1; 11072 } 11073 } 11074 if (flex_attribute->combine_attr_counter[counter]. 11075 mmu_cos_flags & BCM_STAT_FLEX_COS12) { 11076 if (map_array[bcmStatGroupModeAttrCos][12] == 0xFF) { 11077 temp_count = map_array[bcmStatGroupModeAttrCos][256]; 11078 map_array[bcmStatGroupModeAttrCos][12] = temp_count; 11079 map_array[bcmStatGroupModeAttrCos][256] = temp_count+1; 11080 } 11081 } 11082 if (flex_attribute->combine_attr_counter[counter]. 11083 mmu_cos_flags & BCM_STAT_FLEX_COS13) { 11084 if (map_array[bcmStatGroupModeAttrCos][13] == 0xFF) { 11085 temp_count = map_array[bcmStatGroupModeAttrCos][256]; 11086 map_array[bcmStatGroupModeAttrCos][13] = temp_count; 11087 map_array[bcmStatGroupModeAttrCos][256] = temp_count+1; 11088 } 11089 } 11090 if (flex_attribute->combine_attr_counter[counter]. 11091 mmu_cos_flags & BCM_STAT_FLEX_COS14) { 11092 if (map_array[bcmStatGroupModeAttrCos][14] == 0xFF) { 11093 temp_count = map_array[bcmStatGroupModeAttrCos][256]; 11094 map_array[bcmStatGroupModeAttrCos][14] = temp_count; 11095 map_array[bcmStatGroupModeAttrCos][256] = temp_count+1; 11096 } 11097 } 11098 if (flex_attribute->combine_attr_counter[counter]. 11099 mmu_cos_flags & BCM_STAT_FLEX_COS15) { 11100 if (map_array[bcmStatGroupModeAttrCos][15] == 0xFF) { 11101 temp_count = map_array[bcmStatGroupModeAttrCos][256]; 11102 map_array[bcmStatGroupModeAttrCos][15] = temp_count; 11103 map_array[bcmStatGroupModeAttrCos][256] = temp_count+1; 11104 } 11105 } 11106 } 11107 11108 if (flex_attribute->uc_queueing != 0) { 11109 if (map_array[bcmStatGroupModeAttrQueueType] == NULL) { 11110 map_array[bcmStatGroupModeAttrQueueType] = 11111 (uint8 *) sal_alloc(256+1,"map_array"); 11112 11113 if (map_array[bcmStatGroupModeAttrQueueType] == NULL) { 11114 rv = BCM_E_MEMORY; 11115 goto cleanup; 11116 } 11117 11118 sal_memset(map_array[bcmStatGroupModeAttrQueueType], 11119 0xFF,256); 11120 map_array[bcmStatGroupModeAttrQueueType][256] = 0; 11121 } 11122 if (flex_attribute->combine_attr_counter[counter]. 11123 uc_queueing_flags & BCM_STAT_FLEX_UC_QUEUEING_DISABLE) { 11124 if (map_array[bcmStatGroupModeAttrQueueType][0] == 0xFF) { 11125 temp_count = map_array[bcmStatGroupModeAttrQueueType][256]; 11126 map_array[bcmStatGroupModeAttrQueueType][0] = temp_count; 11127 map_array[bcmStatGroupModeAttrQueueType][256] = temp_count + 1; 11128 } 11129 } 11130 if (flex_attribute->combine_attr_counter[counter]. 11131 uc_queueing_flags & BCM_STAT_FLEX_UC_QUEUEING_ENABLE) { 11132 if (map_array[bcmStatGroupModeAttrQueueType][1] == 0xFF) { 11133 temp_count = map_array[bcmStatGroupModeAttrQueueType][256]; 11134 map_array[bcmStatGroupModeAttrQueueType][1] = temp_count; 11135 map_array[bcmStatGroupModeAttrQueueType][256] = temp_count + 1; 11136 } 11137 } 11138 } 11139 11140 if (flex_attribute->congestion_marked != 0) { 11141 if (map_array[bcmStatGroupModeAttrCongestionMarked] == NULL) { 11142 map_array[bcmStatGroupModeAttrCongestionMarked] = 11143 (uint8 *) sal_alloc(256+1,"map_array"); 11144 11145 if (map_array[bcmStatGroupModeAttrCongestionMarked] == NULL) { 11146 rv = BCM_E_MEMORY; 11147 goto cleanup; 11148 } 11149 11150 sal_memset(map_array[bcmStatGroupModeAttrCongestionMarked], 11151 0xFF,256); 11152 map_array[bcmStatGroupModeAttrCongestionMarked][256]=0; 11153 } 11154 if (flex_attribute->combine_attr_counter[counter]. 11155 congestion_marked_flags & BCM_STAT_FLEX_CONGESTION_MARKED_DISABLE) { 11156 if (map_array[bcmStatGroupModeAttrCongestionMarked][0] == 0xFF) { 11157 temp_count = map_array[bcmStatGroupModeAttrCongestionMarked][256]; 11158 map_array[bcmStatGroupModeAttrCongestionMarked][0] = temp_count; 11159 map_array[bcmStatGroupModeAttrCongestionMarked][256] = temp_count + 1; 11160 } 11161 } 11162 if (flex_attribute->combine_attr_counter[counter]. 11163 congestion_marked_flags & BCM_STAT_FLEX_CONGESTION_MARKED_ENABLE) { 11164 if (map_array[bcmStatGroupModeAttrCongestionMarked][1] == 0xFF) { 11165 temp_count = map_array[bcmStatGroupModeAttrCongestionMarked][256]; 11166 map_array[bcmStatGroupModeAttrCongestionMarked][1] = temp_count; 11167 map_array[bcmStatGroupModeAttrCongestionMarked][256] = temp_count + 1; 11168 } 11169 } 11170 } 11171 } 11172 #endif 11173 /* BEGIN: PRI_CNG_MAP */ 11174 if (flex_attribute->pre_ifp_color != 0) { 11175 if (map_array[bcmStatGroupModeAttrColor] == NULL) { 11176 map_array[bcmStatGroupModeAttrColor] = 11177 (uint8 *) sal_alloc(256+1,"map_array"); 11178 if (map_array[bcmStatGroupModeAttrColor] == NULL) { 11179 rv = BCM_E_MEMORY; 11180 goto cleanup; 11181 } 11182 sal_memset(map_array[bcmStatGroupModeAttrColor], 11183 0xFF,256); 11184 map_array[bcmStatGroupModeAttrColor][256]=0; 11185 } 11186 if (flex_attribute->combine_attr_counter[counter]. 11187 pre_ifp_color_flags & BCM_STAT_FLEX_COLOR_GREEN) { 11188 if (map_array[bcmStatGroupModeAttrColor][0] == 0xFF) { 11189 temp_count = map_array[bcmStatGroupModeAttrColor][256]; 11190 map_array[bcmStatGroupModeAttrColor][0] = temp_count; 11191 map_array[bcmStatGroupModeAttrColor][256]=temp_count+1; 11192 } 11193 } 11194 if (flex_attribute->combine_attr_counter[counter]. 11195 pre_ifp_color_flags & BCM_STAT_FLEX_COLOR_RED) { 11196 if (map_array[bcmStatGroupModeAttrColor][1] == 0xFF) { 11197 temp_count = map_array[bcmStatGroupModeAttrColor][256]; 11198 map_array[bcmStatGroupModeAttrColor][1] = temp_count; 11199 map_array[bcmStatGroupModeAttrColor][256]=temp_count+1; 11200 } 11201 } 11202 if (flex_attribute->combine_attr_counter[counter]. 11203 pre_ifp_color_flags & BCM_STAT_FLEX_COLOR_YELLOW) { 11204 if (map_array[bcmStatGroupModeAttrColor][3] == 0xFF) { 11205 temp_count = map_array[bcmStatGroupModeAttrColor][256]; 11206 map_array[bcmStatGroupModeAttrColor][3] = temp_count; 11207 map_array[bcmStatGroupModeAttrColor][256]=temp_count+1; 11208 } 11209 } 11210 } 11211 if (flex_attribute->ifp_color != 0) { 11212 if (map_array[bcmStatGroupModeAttrFieldIngressColor] == NULL) { 11213 map_array[bcmStatGroupModeAttrFieldIngressColor] = 11214 (uint8 *) sal_alloc(256+1,"map_array"); 11215 if (map_array[bcmStatGroupModeAttrFieldIngressColor] == NULL) { 11216 rv = BCM_E_MEMORY; 11217 goto cleanup; 11218 } 11219 sal_memset(map_array[bcmStatGroupModeAttrFieldIngressColor], 11220 0xFF,256); 11221 map_array[bcmStatGroupModeAttrFieldIngressColor][256]=0; 11222 } 11223 /* Egress Not Possbile */ 11224 /* 11225 shift_by_bits = ing_pkt_attr_cmprsd_bits_g[unit].int_pri; 11226 */ 11227 if (flex_attribute->combine_attr_counter[counter]. 11228 ifp_color_flags & BCM_STAT_FLEX_COLOR_GREEN) { 11229 if (map_array[bcmStatGroupModeAttrFieldIngressColor][0] 11230 == 0xFF) { 11231 temp_count = map_array 11232 [bcmStatGroupModeAttrFieldIngressColor] 11233 [256]; 11234 map_array[bcmStatGroupModeAttrFieldIngressColor][0] = 11235 temp_count; 11236 map_array[bcmStatGroupModeAttrFieldIngressColor][256] = 11237 temp_count+1; 11238 } 11239 } 11240 if (flex_attribute->combine_attr_counter[counter]. 11241 ifp_color_flags & BCM_STAT_FLEX_COLOR_RED) { 11242 if (map_array[bcmStatGroupModeAttrFieldIngressColor][1] 11243 == 0xFF) { 11244 temp_count = map_array 11245 [bcmStatGroupModeAttrFieldIngressColor] 11246 [256]; 11247 map_array[bcmStatGroupModeAttrFieldIngressColor][1] = 11248 temp_count; 11249 map_array[bcmStatGroupModeAttrFieldIngressColor][256] = 11250 temp_count+1; 11251 } 11252 } 11253 if (flex_attribute->combine_attr_counter[counter]. 11254 ifp_color_flags & BCM_STAT_FLEX_COLOR_YELLOW) { 11255 if (map_array[bcmStatGroupModeAttrFieldIngressColor][3] 11256 == 0xFF) { 11257 temp_count = map_array 11258 [bcmStatGroupModeAttrFieldIngressColor] 11259 [256]; 11260 map_array[bcmStatGroupModeAttrFieldIngressColor][3] = 11261 temp_count; 11262 map_array[bcmStatGroupModeAttrFieldIngressColor][256] = 11263 temp_count+1; 11264 } 11265 } 11266 } 11267 if (flex_attribute->int_pri != 0) { 11268 /* 11269 shift_by_bits = 0; 11270 */ 11271 if (map_array[bcmStatGroupModeAttrIntPri] == NULL) { 11272 map_array[bcmStatGroupModeAttrIntPri] = 11273 (uint8 *) sal_alloc(256+1,"map_array"); 11274 11275 if (map_array[bcmStatGroupModeAttrIntPri] == NULL) { 11276 rv = BCM_E_MEMORY; 11277 goto cleanup; 11278 } 11279 11280 sal_memset(map_array[bcmStatGroupModeAttrIntPri], 11281 0xFF,256); 11282 map_array[bcmStatGroupModeAttrIntPri][256]=0; 11283 } 11284 if (flex_attribute->combine_attr_counter[counter]. 11285 int_pri_flags & BCM_STAT_FLEX_PRI0) { 11286 if (map_array[bcmStatGroupModeAttrIntPri][0] == 0xFF) { 11287 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 11288 map_array[bcmStatGroupModeAttrIntPri][0] = temp_count; 11289 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 11290 } 11291 } 11292 if (flex_attribute->combine_attr_counter[counter]. 11293 int_pri_flags & BCM_STAT_FLEX_PRI1) { 11294 if (map_array[bcmStatGroupModeAttrIntPri][1] == 0xFF) { 11295 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 11296 map_array[bcmStatGroupModeAttrIntPri][1] = temp_count; 11297 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 11298 } 11299 } 11300 if (flex_attribute->combine_attr_counter[counter]. 11301 int_pri_flags & BCM_STAT_FLEX_PRI2) { 11302 if (map_array[bcmStatGroupModeAttrIntPri][2] == 0xFF) { 11303 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 11304 map_array[bcmStatGroupModeAttrIntPri][2] = temp_count; 11305 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 11306 } 11307 } 11308 if (flex_attribute->combine_attr_counter[counter]. 11309 int_pri_flags & BCM_STAT_FLEX_PRI3) { 11310 if (map_array[bcmStatGroupModeAttrIntPri][3] == 0xFF) { 11311 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 11312 map_array[bcmStatGroupModeAttrIntPri][3] = temp_count; 11313 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 11314 } 11315 } 11316 if (flex_attribute->combine_attr_counter[counter]. 11317 int_pri_flags & BCM_STAT_FLEX_PRI4) { 11318 if (map_array[bcmStatGroupModeAttrIntPri][4] == 0xFF) { 11319 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 11320 map_array[bcmStatGroupModeAttrIntPri][4] = temp_count; 11321 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 11322 } 11323 } 11324 if (flex_attribute->combine_attr_counter[counter]. 11325 int_pri_flags & BCM_STAT_FLEX_PRI5) { 11326 if (map_array[bcmStatGroupModeAttrIntPri][5] == 0xFF) { 11327 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 11328 map_array[bcmStatGroupModeAttrIntPri][5] = temp_count; 11329 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 11330 } 11331 } 11332 if (flex_attribute->combine_attr_counter[counter]. 11333 int_pri_flags & BCM_STAT_FLEX_PRI6) { 11334 if (map_array[bcmStatGroupModeAttrIntPri][6] == 0xFF) { 11335 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 11336 map_array[bcmStatGroupModeAttrIntPri][6] = temp_count; 11337 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 11338 } 11339 } 11340 if (flex_attribute->combine_attr_counter[counter]. 11341 int_pri_flags & BCM_STAT_FLEX_PRI7) { 11342 if (map_array[bcmStatGroupModeAttrIntPri][7] == 0xFF) { 11343 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 11344 map_array[bcmStatGroupModeAttrIntPri][7] = temp_count; 11345 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 11346 } 11347 } 11348 if (flex_attribute->combine_attr_counter[counter]. 11349 int_pri_flags & BCM_STAT_FLEX_PRI8) { 11350 if (map_array[bcmStatGroupModeAttrIntPri][8] == 0xFF) { 11351 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 11352 map_array[bcmStatGroupModeAttrIntPri][8] = temp_count; 11353 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 11354 } 11355 } 11356 if (flex_attribute->combine_attr_counter[counter]. 11357 int_pri_flags & BCM_STAT_FLEX_PRI9) { 11358 if (map_array[bcmStatGroupModeAttrIntPri][9] == 0xFF) { 11359 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 11360 map_array[bcmStatGroupModeAttrIntPri][9] = temp_count; 11361 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 11362 } 11363 } 11364 if (flex_attribute->combine_attr_counter[counter]. 11365 int_pri_flags & BCM_STAT_FLEX_PRI10) { 11366 if (map_array[bcmStatGroupModeAttrIntPri][10] == 0xFF) { 11367 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 11368 map_array[bcmStatGroupModeAttrIntPri][10] = temp_count; 11369 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 11370 } 11371 } 11372 if (flex_attribute->combine_attr_counter[counter]. 11373 int_pri_flags & BCM_STAT_FLEX_PRI11) { 11374 if (map_array[bcmStatGroupModeAttrIntPri][11] == 0xFF) { 11375 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 11376 map_array[bcmStatGroupModeAttrIntPri][11] = temp_count; 11377 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 11378 } 11379 } 11380 if (flex_attribute->combine_attr_counter[counter]. 11381 int_pri_flags & BCM_STAT_FLEX_PRI12) { 11382 if (map_array[bcmStatGroupModeAttrIntPri][12] == 0xFF) { 11383 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 11384 map_array[bcmStatGroupModeAttrIntPri][12] = temp_count; 11385 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 11386 } 11387 } 11388 if (flex_attribute->combine_attr_counter[counter]. 11389 int_pri_flags & BCM_STAT_FLEX_PRI13) { 11390 if (map_array[bcmStatGroupModeAttrIntPri][13] == 0xFF) { 11391 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 11392 map_array[bcmStatGroupModeAttrIntPri][13] = temp_count; 11393 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 11394 } 11395 } 11396 if (flex_attribute->combine_attr_counter[counter]. 11397 int_pri_flags & BCM_STAT_FLEX_PRI14) { 11398 if (map_array[bcmStatGroupModeAttrIntPri][14] == 0xFF) { 11399 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 11400 map_array[bcmStatGroupModeAttrIntPri][14] = temp_count; 11401 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 11402 } 11403 } 11404 if (flex_attribute->combine_attr_counter[counter]. 11405 int_pri_flags & BCM_STAT_FLEX_PRI15) { 11406 if (map_array[bcmStatGroupModeAttrIntPri][15] == 0xFF) { 11407 temp_count = map_array[bcmStatGroupModeAttrIntPri][256]; 11408 map_array[bcmStatGroupModeAttrIntPri][15] = temp_count; 11409 map_array[bcmStatGroupModeAttrIntPri][256]=temp_count+1; 11410 } 11411 } 11412 } 11413 /* END: PRI_CNG_MAP */ 11414 /* BEGIN: PKT_PRI_MAP*/ 11415 if (flex_attribute->vlan_format != 0) { 11416 if (map_array[bcmStatGroupModeAttrVlan] == NULL) { 11417 map_array[bcmStatGroupModeAttrVlan] = 11418 (uint8 *) sal_alloc(256+1,"map_array"); 11419 11420 if (map_array[bcmStatGroupModeAttrVlan] == NULL) { 11421 rv = BCM_E_MEMORY; 11422 goto cleanup; 11423 } 11424 11425 sal_memset(map_array[bcmStatGroupModeAttrVlan], 11426 0xFF,256); 11427 map_array[bcmStatGroupModeAttrVlan][256]=0; 11428 } 11429 if (flex_attribute->combine_attr_counter[counter]. 11430 vlan_format_flags & BCM_STAT_FLEX_VLAN_FORMAT_UNTAGGED) { 11431 if (map_array[bcmStatGroupModeAttrVlan][0] == 0xFF) { 11432 temp_count = map_array[bcmStatGroupModeAttrVlan][256]; 11433 map_array[bcmStatGroupModeAttrVlan][0] = temp_count; 11434 map_array[bcmStatGroupModeAttrVlan][256]=temp_count+1; 11435 } 11436 } 11437 if (flex_attribute->combine_attr_counter[counter]. 11438 vlan_format_flags & BCM_STAT_FLEX_VLAN_FORMAT_INNER) { 11439 if (map_array[bcmStatGroupModeAttrVlan][1] == 0xFF) { 11440 temp_count = map_array[bcmStatGroupModeAttrVlan][256]; 11441 map_array[bcmStatGroupModeAttrVlan][1] = temp_count; 11442 map_array[bcmStatGroupModeAttrVlan][256]=temp_count+1; 11443 } 11444 } 11445 if (flex_attribute->combine_attr_counter[counter]. 11446 vlan_format_flags & BCM_STAT_FLEX_VLAN_FORMAT_OUTER) { 11447 if (map_array[bcmStatGroupModeAttrVlan][2] == 0xFF) { 11448 temp_count = map_array[bcmStatGroupModeAttrVlan][256]; 11449 map_array[bcmStatGroupModeAttrVlan][2] = temp_count; 11450 map_array[bcmStatGroupModeAttrVlan][256]=temp_count+1; 11451 } 11452 } 11453 if (flex_attribute->combine_attr_counter[counter]. 11454 vlan_format_flags & BCM_STAT_FLEX_VLAN_FORMAT_BOTH) { 11455 if (map_array[bcmStatGroupModeAttrVlan][3] == 0xFF) { 11456 temp_count = map_array[bcmStatGroupModeAttrVlan][256]; 11457 map_array[bcmStatGroupModeAttrVlan][3] = temp_count; 11458 map_array[bcmStatGroupModeAttrVlan][256]=temp_count+1; 11459 } 11460 } 11461 } 11462 if (flex_attribute->outer_dot1p != 0) { 11463 if (map_array[bcmStatGroupModeAttrOuterPri] == NULL) { 11464 map_array[bcmStatGroupModeAttrOuterPri] = 11465 (uint8 *) sal_alloc(256+1,"map_array"); 11466 11467 if (map_array[bcmStatGroupModeAttrOuterPri] == NULL) { 11468 rv = BCM_E_MEMORY; 11469 goto cleanup; 11470 } 11471 11472 sal_memset(map_array[bcmStatGroupModeAttrOuterPri], 11473 0xFF,256); 11474 map_array[bcmStatGroupModeAttrOuterPri][256]=0; 11475 } 11476 if (flex_attribute->combine_attr_counter[counter]. 11477 outer_dot1p_flags & BCM_STAT_FLEX_PRI0) { 11478 if (map_array[bcmStatGroupModeAttrOuterPri][0] == 0xFF) { 11479 temp_count = map_array[bcmStatGroupModeAttrOuterPri] 11480 [256]; 11481 map_array[bcmStatGroupModeAttrOuterPri][0] = 11482 temp_count; 11483 map_array[bcmStatGroupModeAttrOuterPri][256] = 11484 temp_count+1; 11485 } 11486 } 11487 if (flex_attribute->combine_attr_counter[counter]. 11488 outer_dot1p_flags & BCM_STAT_FLEX_PRI1) { 11489 if (map_array[bcmStatGroupModeAttrOuterPri][1] == 0xFF) { 11490 temp_count = map_array[bcmStatGroupModeAttrOuterPri] 11491 [256]; 11492 map_array[bcmStatGroupModeAttrOuterPri][1] = 11493 temp_count; 11494 map_array[bcmStatGroupModeAttrOuterPri][256] = 11495 temp_count+1; 11496 } 11497 } 11498 if (flex_attribute->combine_attr_counter[counter]. 11499 outer_dot1p_flags & BCM_STAT_FLEX_PRI2) { 11500 if (map_array[bcmStatGroupModeAttrOuterPri][2] == 0xFF) { 11501 temp_count = map_array[bcmStatGroupModeAttrOuterPri] 11502 [256]; 11503 map_array[bcmStatGroupModeAttrOuterPri][2] = 11504 temp_count; 11505 map_array[bcmStatGroupModeAttrOuterPri][256] = 11506 temp_count+1; 11507 } 11508 } 11509 if (flex_attribute->combine_attr_counter[counter]. 11510 outer_dot1p_flags & BCM_STAT_FLEX_PRI3) { 11511 if (map_array[bcmStatGroupModeAttrOuterPri][3] == 0xFF) { 11512 temp_count = map_array[bcmStatGroupModeAttrOuterPri] 11513 [256]; 11514 map_array[bcmStatGroupModeAttrOuterPri][3] = 11515 temp_count; 11516 map_array[bcmStatGroupModeAttrOuterPri][256] = 11517 temp_count+1; 11518 } 11519 } 11520 if (flex_attribute->combine_attr_counter[counter]. 11521 outer_dot1p_flags & BCM_STAT_FLEX_PRI4) { 11522 if (map_array[bcmStatGroupModeAttrOuterPri][4] == 0xFF) { 11523 temp_count = map_array[bcmStatGroupModeAttrOuterPri] 11524 [256]; 11525 map_array[bcmStatGroupModeAttrOuterPri][4] = 11526 temp_count; 11527 map_array[bcmStatGroupModeAttrOuterPri][256] = 11528 temp_count+1; 11529 } 11530 } 11531 if (flex_attribute->combine_attr_counter[counter]. 11532 outer_dot1p_flags & BCM_STAT_FLEX_PRI5) { 11533 if (map_array[bcmStatGroupModeAttrOuterPri][5] == 0xFF) { 11534 temp_count = map_array[bcmStatGroupModeAttrOuterPri] 11535 [256]; 11536 map_array[bcmStatGroupModeAttrOuterPri][5] = 11537 temp_count; 11538 map_array[bcmStatGroupModeAttrOuterPri][256] = 11539 temp_count+1; 11540 } 11541 } 11542 if (flex_attribute->combine_attr_counter[counter]. 11543 outer_dot1p_flags & BCM_STAT_FLEX_PRI6) { 11544 if (map_array[bcmStatGroupModeAttrOuterPri][6] == 0xFF) { 11545 temp_count = map_array[bcmStatGroupModeAttrOuterPri] 11546 [256]; 11547 map_array[bcmStatGroupModeAttrOuterPri][6] = 11548 temp_count; 11549 map_array[bcmStatGroupModeAttrOuterPri][256] = 11550 temp_count+1; 11551 } 11552 } 11553 if (flex_attribute->combine_attr_counter[counter]. 11554 outer_dot1p_flags & BCM_STAT_FLEX_PRI7) { 11555 if (map_array[bcmStatGroupModeAttrOuterPri][7] == 0xFF) { 11556 temp_count = map_array[bcmStatGroupModeAttrOuterPri] 11557 [256]; 11558 map_array[bcmStatGroupModeAttrOuterPri][7] = 11559 temp_count; 11560 map_array[bcmStatGroupModeAttrOuterPri][256] = 11561 temp_count+1; 11562 } 11563 } 11564 } 11565 if (flex_attribute->inner_dot1p != 0) { 11566 if (map_array[bcmStatGroupModeAttrInnerPri] == NULL) { 11567 map_array[bcmStatGroupModeAttrInnerPri] = 11568 (uint8 *) sal_alloc(256+1,"map_array"); 11569 11570 if (map_array[bcmStatGroupModeAttrInnerPri] == NULL) { 11571 rv = BCM_E_MEMORY; 11572 goto cleanup; 11573 } 11574 11575 sal_memset(map_array[bcmStatGroupModeAttrInnerPri], 11576 0xFF,256); 11577 map_array[bcmStatGroupModeAttrInnerPri][256]=0; 11578 } 11579 if (flex_attribute->combine_attr_counter[counter]. 11580 inner_dot1p_flags & BCM_STAT_FLEX_PRI0) { 11581 if (map_array[bcmStatGroupModeAttrInnerPri][0] == 0xFF) { 11582 temp_count = map_array[bcmStatGroupModeAttrInnerPri] 11583 [256]; 11584 map_array[bcmStatGroupModeAttrInnerPri][0] = 11585 temp_count; 11586 map_array[bcmStatGroupModeAttrInnerPri][256] = 11587 temp_count+1; 11588 } 11589 } 11590 if (flex_attribute->combine_attr_counter[counter]. 11591 inner_dot1p_flags & BCM_STAT_FLEX_PRI1) { 11592 if (map_array[bcmStatGroupModeAttrInnerPri][1] == 0xFF) { 11593 temp_count = map_array[bcmStatGroupModeAttrInnerPri] 11594 [256]; 11595 map_array[bcmStatGroupModeAttrInnerPri][1] = 11596 temp_count; 11597 map_array[bcmStatGroupModeAttrInnerPri][256] = 11598 temp_count+1; 11599 } 11600 } 11601 if (flex_attribute->combine_attr_counter[counter]. 11602 inner_dot1p_flags & BCM_STAT_FLEX_PRI2) { 11603 if (map_array[bcmStatGroupModeAttrInnerPri][2] == 0xFF) { 11604 temp_count = map_array[bcmStatGroupModeAttrInnerPri] 11605 [256]; 11606 map_array[bcmStatGroupModeAttrInnerPri][2] = 11607 temp_count; 11608 map_array[bcmStatGroupModeAttrInnerPri][256] = 11609 temp_count+1; 11610 } 11611 } 11612 if (flex_attribute->combine_attr_counter[counter]. 11613 inner_dot1p_flags & BCM_STAT_FLEX_PRI3) { 11614 if (map_array[bcmStatGroupModeAttrInnerPri][3] == 0xFF) { 11615 temp_count = map_array[bcmStatGroupModeAttrInnerPri] 11616 [256]; 11617 map_array[bcmStatGroupModeAttrInnerPri][3] = 11618 temp_count; 11619 map_array[bcmStatGroupModeAttrInnerPri][256] = 11620 temp_count+1; 11621 } 11622 } 11623 if (flex_attribute->combine_attr_counter[counter]. 11624 inner_dot1p_flags & BCM_STAT_FLEX_PRI4) { 11625 if (map_array[bcmStatGroupModeAttrInnerPri][4] == 0xFF) { 11626 temp_count = map_array[bcmStatGroupModeAttrInnerPri] 11627 [256]; 11628 map_array[bcmStatGroupModeAttrInnerPri][4] = 11629 temp_count; 11630 map_array[bcmStatGroupModeAttrInnerPri][256] = 11631 temp_count+1; 11632 } 11633 } 11634 if (flex_attribute->combine_attr_counter[counter]. 11635 inner_dot1p_flags & BCM_STAT_FLEX_PRI5) { 11636 if (map_array[bcmStatGroupModeAttrInnerPri][5] == 0xFF) { 11637 temp_count = map_array[bcmStatGroupModeAttrInnerPri] 11638 [256]; 11639 map_array[bcmStatGroupModeAttrInnerPri][5] = 11640 temp_count; 11641 map_array[bcmStatGroupModeAttrInnerPri][256] = 11642 temp_count+1; 11643 } 11644 } 11645 if (flex_attribute->combine_attr_counter[counter]. 11646 inner_dot1p_flags & BCM_STAT_FLEX_PRI6) { 11647 if (map_array[bcmStatGroupModeAttrInnerPri][6] == 0xFF) { 11648 temp_count = map_array[bcmStatGroupModeAttrInnerPri] 11649 [256]; 11650 map_array[bcmStatGroupModeAttrInnerPri][6] = 11651 temp_count; 11652 map_array[bcmStatGroupModeAttrInnerPri][256] = 11653 temp_count+1; 11654 } 11655 } 11656 if (flex_attribute->combine_attr_counter[counter]. 11657 inner_dot1p_flags & BCM_STAT_FLEX_PRI7) { 11658 if (map_array[bcmStatGroupModeAttrInnerPri][7] == 0xFF) { 11659 temp_count = map_array[bcmStatGroupModeAttrInnerPri] 11660 [256]; 11661 map_array[bcmStatGroupModeAttrInnerPri][7] = 11662 temp_count; 11663 map_array[bcmStatGroupModeAttrInnerPri][256] = 11664 temp_count+1; 11665 } 11666 } 11667 } 11668 /* END: PKT_PRI_MAP*/ 11669 /* BEGIN: PORT_MAP*/ 11670 if (flex_attribute->port != 0) { 11671 if (map_array[bcmStatGroupModeAttrPort] == NULL) { 11672 map_array[bcmStatGroupModeAttrPort] = 11673 (uint8 *) sal_alloc(256+1,"map_array"); 11674 11675 if (map_array[bcmStatGroupModeAttrPort] == NULL) { 11676 rv = BCM_E_MEMORY; 11677 goto cleanup; 11678 } 11679 11680 sal_memset(map_array[bcmStatGroupModeAttrPort], 11681 0xFF,256); 11682 map_array[bcmStatGroupModeAttrPort][256]=0; 11683 } 11684 if (direction == bcmStatFlexDirectionIngress) { 11685 max_count= (1 << ing_pkt_attr_cmprsd_bits_g[unit].ing_port) - 1; 11686 } else { 11687 max_count= (1 << egr_pkt_attr_cmprsd_bits_g[unit].egr_port) - 1; 11688 } 11689 for (loop_index=0; loop_index <= max_count ; loop_index++) { 11690 if (BCM_STAT_FLEX_VALUE_GET( 11691 flex_attribute->combine_attr_counter[counter]. 11692 value_array[bcmStatFlexAttrPort],loop_index)) { 11693 if (map_array[bcmStatGroupModeAttrPort][loop_index] 11694 == 0xFF) { 11695 temp_count = map_array[bcmStatGroupModeAttrPort] 11696 [256]; 11697 map_array[bcmStatGroupModeAttrPort][loop_index] = 11698 temp_count; 11699 map_array[bcmStatGroupModeAttrPort][256] = 11700 temp_count+1; 11701 } 11702 } 11703 } 11704 } 11705 /* END: PORT_MAP*/ 11706 /* BEGIN: TOS_MAP*/ 11707 if (flex_attribute->tos_dscp != 0) { 11708 if (map_array[bcmStatGroupModeAttrTosDscp] == NULL) { 11709 map_array[bcmStatGroupModeAttrTosDscp] = 11710 (uint8 *) sal_alloc(256+1,"map_array"); 11711 11712 if (map_array[bcmStatGroupModeAttrTosDscp] == NULL) { 11713 rv = BCM_E_MEMORY; 11714 goto cleanup; 11715 } 11716 11717 sal_memset(map_array[bcmStatGroupModeAttrTosDscp], 11718 0xFF,256); 11719 map_array[bcmStatGroupModeAttrTosDscp][256]=0; 11720 } 11721 if (direction == bcmStatFlexDirectionIngress) { 11722 max_count= (1 << ing_pkt_attr_cmprsd_bits_g[unit].tos_dscp) - 1; 11723 } else { 11724 max_count= (1 << egr_pkt_attr_cmprsd_bits_g[unit].tos_dscp) - 1; 11725 } 11726 for (loop_index=0; loop_index <= max_count ; loop_index++) { 11727 if (BCM_STAT_FLEX_VALUE_GET( 11728 flex_attribute->combine_attr_counter[counter]. 11729 value_array[bcmStatFlexAttrTosDscp],loop_index)) { 11730 if (map_array[bcmStatGroupModeAttrTosDscp][loop_index] 11731 == 0xFF) { 11732 temp_count = map_array[bcmStatGroupModeAttrTosDscp] 11733 [256]; 11734 map_array[bcmStatGroupModeAttrTosDscp][loop_index] = 11735 temp_count; 11736 map_array[bcmStatGroupModeAttrTosDscp][256] = 11737 temp_count+1; 11738 } 11739 } 11740 } 11741 } 11742 if (flex_attribute->tos_ecn != 0) { 11743 if (map_array[bcmStatGroupModeAttrTosEcn] == NULL) { 11744 map_array[bcmStatGroupModeAttrTosEcn] = 11745 (uint8 *) sal_alloc(256+1,"map_array"); 11746 11747 if (map_array[bcmStatGroupModeAttrTosEcn] == NULL) { 11748 rv = BCM_E_MEMORY; 11749 goto cleanup; 11750 } 11751 11752 sal_memset(map_array[bcmStatGroupModeAttrTosEcn], 11753 0xFF,256); 11754 map_array[bcmStatGroupModeAttrTosEcn][256]=0; 11755 } 11756 if (direction == bcmStatFlexDirectionIngress) { 11757 max_count= (1 << ing_pkt_attr_cmprsd_bits_g[unit].tos_ecn) - 1; 11758 } else { 11759 max_count= (1 << egr_pkt_attr_cmprsd_bits_g[unit].tos_ecn) - 1; 11760 } 11761 for (loop_index=0; loop_index <= max_count ; loop_index++) { 11762 if (BCM_STAT_FLEX_VALUE_GET( 11763 flex_attribute->combine_attr_counter[counter]. 11764 value_array[bcmStatFlexAttrTosEcn],loop_index)) { 11765 if (map_array[bcmStatGroupModeAttrTosEcn][loop_index] 11766 == 0xFF) { 11767 temp_count = map_array[bcmStatGroupModeAttrTosEcn] 11768 [256]; 11769 map_array[bcmStatGroupModeAttrTosEcn][loop_index] = 11770 temp_count; 11771 map_array[bcmStatGroupModeAttrTosEcn][256] = 11772 temp_count+1; 11773 } 11774 } 11775 } 11776 } 11777 /* END: TOS_MAP*/ 11778 /* BEGIN: PKT_RES_MAP*/ 11779 if (flex_attribute->pkt_resolution != 0) { 11780 #ifdef BCM_KATANA2_SUPPORT 11781 if soc_feature(unit, soc_feature_flex_stat_attributes_class) { 11782 if (map_array[bcmStatGroupModeAttrClassType] == NULL) { 11783 map_array[bcmStatGroupModeAttrClassType] = 11784 (uint8 *) sal_alloc(256+1,"map_array"); 11785 11786 if (map_array[bcmStatGroupModeAttrClassType] == NULL) { 11787 rv = BCM_E_MEMORY; 11788 goto cleanup; 11789 } 11790 11791 sal_memset(map_array[bcmStatGroupModeAttrClassType], 11792 0xFF,256); 11793 map_array[bcmStatGroupModeAttrClassType][256]=0; 11794 } 11795 for (i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 11796 if (BCM_STAT_FLEX_VALUE_GET( 11797 flex_attribute->combine_attr_counter[counter].value_array[bcmStatFlexAttrComb], i)) { 11798 if (!combine_attr_per_mode[bcmStatFlexAttrComb][i]) { 11799 combine_attr_per_mode[bcmStatFlexAttrComb][i] = 11800 1; 11801 hw_class_id++; 11802 11803 } 11804 } 11805 } 11806 11807 if (flex_attribute->combine_attr_counter[counter]. 11808 pkt_resolution_flags & 11809 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_PKT) { 11810 if (map_array[bcmStatGroupModeAttrClassType] 11811 [unknown_pkt] == 0xFF) { 11812 map_array[bcmStatGroupModeAttrClassType] 11813 [unknown_pkt] = hw_class_id; 11814 } 11815 } 11816 if (flex_attribute->combine_attr_counter[counter]. 11817 pkt_resolution_flags & 11818 BCM_STAT_FLEX_PKT_TYPE_CONTROL_PKT) { 11819 if (map_array[bcmStatGroupModeAttrClassType] 11820 [control_pkt] == 0xFF) { 11821 map_array[bcmStatGroupModeAttrClassType] 11822 [control_pkt] = hw_class_id; 11823 } 11824 } 11825 if (flex_attribute->combine_attr_counter[counter]. 11826 pkt_resolution_flags & 11827 BCM_STAT_FLEX_PKT_TYPE_OAM_PKT) { 11828 if (map_array[bcmStatGroupModeAttrClassType] 11829 [oam_pkt] == 0xFF) { 11830 map_array[bcmStatGroupModeAttrClassType] 11831 [oam_pkt] = hw_class_id; 11832 } 11833 } 11834 if (flex_attribute->combine_attr_counter[counter]. 11835 pkt_resolution_flags & 11836 BCM_STAT_FLEX_PKT_TYPE_BFD_PKT) { 11837 if (map_array[bcmStatGroupModeAttrClassType] 11838 [bfd_pkt] == 0xFF) { 11839 map_array[bcmStatGroupModeAttrClassType] 11840 [bfd_pkt] = hw_class_id; 11841 } 11842 } 11843 if (flex_attribute->combine_attr_counter[counter]. 11844 pkt_resolution_flags & 11845 BCM_STAT_FLEX_PKT_TYPE_BPDU_PKT) { 11846 if (map_array[bcmStatGroupModeAttrClassType] 11847 [bpdu_pkt] == 0xFF) { 11848 map_array[bcmStatGroupModeAttrClassType] 11849 [bpdu_pkt] = hw_class_id; 11850 } 11851 } 11852 if (flex_attribute->combine_attr_counter[counter]. 11853 pkt_resolution_flags & 11854 BCM_STAT_FLEX_PKT_TYPE_ICNM_PKT) { 11855 if (map_array[bcmStatGroupModeAttrClassType] 11856 [icnm_pkt] == 0xFF) { 11857 map_array[bcmStatGroupModeAttrClassType] 11858 [icnm_pkt] = hw_class_id; 11859 } 11860 } 11861 if (flex_attribute->combine_attr_counter[counter]. 11862 pkt_resolution_flags & 11863 BCM_STAT_FLEX_PKT_TYPE_PKT_IS_1588) { 11864 if (map_array[bcmStatGroupModeAttrClassType] 11865 [_1588_pkt] == 0xFF) { 11866 map_array[bcmStatGroupModeAttrClassType] 11867 [_1588_pkt] = hw_class_id; 11868 } 11869 } 11870 if (flex_attribute->combine_attr_counter[counter]. 11871 pkt_resolution_flags & 11872 BCM_STAT_FLEX_PKT_TYPE_BFD_PKT) { 11873 if (map_array[bcmStatGroupModeAttrClassType] 11874 [bfd_pkt] == 0xFF) { 11875 map_array[bcmStatGroupModeAttrClassType] 11876 [bfd_pkt] = hw_class_id; 11877 } 11878 } 11879 if (flex_attribute->combine_attr_counter[counter]. 11880 pkt_resolution_flags & 11881 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2UC_PKT) { 11882 if (map_array[bcmStatGroupModeAttrClassType] 11883 [known_l2uc_pkt] == 0xFF) { 11884 map_array[bcmStatGroupModeAttrClassType] 11885 [known_l2uc_pkt] = hw_class_id; 11886 } 11887 } 11888 if (flex_attribute->combine_attr_counter[counter]. 11889 pkt_resolution_flags & 11890 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L2UC_PKT) { 11891 if (map_array[bcmStatGroupModeAttrClassType] 11892 [unknown_l2uc_pkt] == 0xFF) { 11893 map_array[bcmStatGroupModeAttrClassType] 11894 [unknown_l2uc_pkt] = hw_class_id; 11895 } 11896 } 11897 if (flex_attribute->combine_attr_counter[counter]. 11898 pkt_resolution_flags & 11899 BCM_STAT_FLEX_PKT_TYPE_L2BC_PKT) { 11900 if (map_array[bcmStatGroupModeAttrClassType] 11901 [l2bc_pkt] == 0xFF) { 11902 map_array[bcmStatGroupModeAttrClassType] 11903 [l2bc_pkt] = hw_class_id; 11904 } 11905 } 11906 if (flex_attribute->combine_attr_counter[counter]. 11907 pkt_resolution_flags & 11908 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2MC_PKT) { 11909 if (map_array[bcmStatGroupModeAttrClassType] 11910 [known_l2mc_pkt] == 0xFF) { 11911 map_array[bcmStatGroupModeAttrClassType] 11912 [known_l2mc_pkt] = hw_class_id; 11913 } 11914 } 11915 if (flex_attribute->combine_attr_counter[counter]. 11916 pkt_resolution_flags & 11917 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L2MC_PKT) { 11918 if (map_array[bcmStatGroupModeAttrClassType] 11919 [unknown_l2mc_pkt] == 0xFF) { 11920 map_array[bcmStatGroupModeAttrClassType] 11921 [unknown_l2mc_pkt] = hw_class_id; 11922 } 11923 } 11924 if (flex_attribute->combine_attr_counter[counter]. 11925 pkt_resolution_flags & 11926 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L3UC_PKT) { 11927 if (map_array[bcmStatGroupModeAttrClassType] 11928 [known_l3uc_pkt] == 0xFF) { 11929 map_array[bcmStatGroupModeAttrClassType] 11930 [known_l3uc_pkt] = hw_class_id; 11931 } 11932 } 11933 if (flex_attribute->combine_attr_counter[counter]. 11934 pkt_resolution_flags & 11935 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L3UC_PKT) { 11936 if (map_array[bcmStatGroupModeAttrClassType] 11937 [unknown_l3uc_pkt] == 0xFF) { 11938 map_array[bcmStatGroupModeAttrClassType] 11939 [unknown_l3uc_pkt] = hw_class_id; 11940 } 11941 } 11942 if (flex_attribute->combine_attr_counter[counter]. 11943 pkt_resolution_flags & 11944 BCM_STAT_FLEX_PKT_TYPE_KNOWN_IPMC_PKT) { 11945 if (map_array[bcmStatGroupModeAttrClassType] 11946 [known_ipmc_pkt] == 0xFF) { 11947 map_array[bcmStatGroupModeAttrClassType] 11948 [known_ipmc_pkt] = hw_class_id; 11949 } 11950 } 11951 if (flex_attribute->combine_attr_counter[counter]. 11952 pkt_resolution_flags & 11953 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_IPMC_PKT) { 11954 if (map_array[bcmStatGroupModeAttrClassType] 11955 [unknown_ipmc_pkt] == 0xFF) { 11956 map_array[bcmStatGroupModeAttrClassType] 11957 [unknown_ipmc_pkt] = hw_class_id; 11958 } 11959 } 11960 if (flex_attribute->combine_attr_counter[counter]. 11961 pkt_resolution_flags & 11962 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_L2_PKT) { 11963 if (map_array[bcmStatGroupModeAttrClassType] 11964 [known_mpls_l2_pkt] == 0xFF) { 11965 map_array[bcmStatGroupModeAttrClassType] 11966 [known_mpls_l2_pkt] = hw_class_id; 11967 } 11968 } 11969 if (flex_attribute->combine_attr_counter[counter]. 11970 pkt_resolution_flags & 11971 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_L3_PKT) { 11972 if (map_array[bcmStatGroupModeAttrClassType] 11973 [known_mpls_l3_pkt] == 0xFF) { 11974 map_array[bcmStatGroupModeAttrClassType] 11975 [known_mpls_l3_pkt] = hw_class_id; 11976 } 11977 } 11978 if (flex_attribute->combine_attr_counter[counter]. 11979 pkt_resolution_flags & 11980 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_PKT) { 11981 if (map_array[bcmStatGroupModeAttrClassType] 11982 [known_mpls_pkt] == 0xFF) { 11983 map_array[bcmStatGroupModeAttrClassType] 11984 [known_mpls_pkt] = hw_class_id; 11985 } 11986 } 11987 if (flex_attribute->combine_attr_counter[counter]. 11988 pkt_resolution_flags & 11989 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_MPLS_PKT) { 11990 if (map_array[bcmStatGroupModeAttrClassType] 11991 [unknown_mpls_pkt] == 0xFF) { 11992 map_array[bcmStatGroupModeAttrClassType] 11993 [unknown_mpls_pkt] = hw_class_id; 11994 } 11995 } 11996 if (flex_attribute->combine_attr_counter[counter]. 11997 pkt_resolution_flags & 11998 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_MULTICAST_PKT) { 11999 if (map_array[bcmStatGroupModeAttrClassType] 12000 [known_mpls_multicast_pkt] == 0xFF) { 12001 map_array[bcmStatGroupModeAttrClassType] 12002 [known_mpls_multicast_pkt] = hw_class_id; 12003 } 12004 } 12005 if (flex_attribute->combine_attr_counter[counter]. 12006 pkt_resolution_flags & 12007 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MIM_PKT) { 12008 if (map_array[bcmStatGroupModeAttrClassType] 12009 [known_mim_pkt] == 0xFF) { 12010 map_array[bcmStatGroupModeAttrClassType] 12011 [known_mim_pkt] = hw_class_id; 12012 } 12013 } 12014 if (flex_attribute->combine_attr_counter[counter]. 12015 pkt_resolution_flags & 12016 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_MIM_PKT) { 12017 if (map_array[bcmStatGroupModeAttrClassType] 12018 [unknown_mim_pkt] == 0xFF) { 12019 map_array[bcmStatGroupModeAttrClassType] 12020 [unknown_mim_pkt] = hw_class_id; 12021 } 12022 } 12023 if (flex_attribute->combine_attr_counter[counter]. 12024 pkt_resolution_flags & 12025 BCM_STAT_FLEX_PKT_TYPE_KNOWN_TRILL_PKT) { 12026 if (map_array[bcmStatGroupModeAttrClassType] 12027 [known_trill_pkt] == 0xFF) { 12028 map_array[bcmStatGroupModeAttrClassType] 12029 [known_trill_pkt] = hw_class_id; 12030 } 12031 } 12032 if (flex_attribute->combine_attr_counter[counter]. 12033 pkt_resolution_flags & 12034 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_TRILL_PKT) { 12035 if (map_array[bcmStatGroupModeAttrClassType] 12036 [unknown_trill_pkt] == 0xFF) { 12037 map_array[bcmStatGroupModeAttrClassType] 12038 [unknown_trill_pkt] = hw_class_id; 12039 } 12040 } 12041 if (flex_attribute->combine_attr_counter[counter]. 12042 pkt_resolution_flags & 12043 BCM_STAT_FLEX_PKT_TYPE_KNOWN_NIV_PKT) { 12044 if (map_array[bcmStatGroupModeAttrClassType] 12045 [known_niv_pkt] == 0xFF) { 12046 map_array[bcmStatGroupModeAttrClassType] 12047 [known_niv_pkt] = hw_class_id; 12048 } 12049 } 12050 if (flex_attribute->combine_attr_counter[counter]. 12051 pkt_resolution_flags & 12052 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_NIV_PKT) { 12053 if (map_array[bcmStatGroupModeAttrClassType] 12054 [unknown_niv_pkt] == 0xFF) { 12055 map_array[bcmStatGroupModeAttrClassType] 12056 [unknown_niv_pkt] = hw_class_id; 12057 } 12058 } 12059 map_array[bcmStatGroupModeAttrClassType][256] = hw_class_id; 12060 } else 12061 #endif 12062 { 12063 if (map_array[bcmStatGroupModeAttrPktType] == NULL) { 12064 map_array[bcmStatGroupModeAttrPktType] = 12065 (uint8 *) sal_alloc(256+1,"map_array"); 12066 12067 if (map_array[bcmStatGroupModeAttrPktType] == NULL) { 12068 rv = BCM_E_MEMORY; 12069 goto cleanup; 12070 } 12071 12072 sal_memset(map_array[bcmStatGroupModeAttrPktType], 12073 0xFF,256); 12074 map_array[bcmStatGroupModeAttrPktType][256]=0; 12075 } 12076 if (flex_attribute->combine_attr_counter[counter]. 12077 pkt_resolution_flags & 12078 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_PKT) { 12079 if (map_array[bcmStatGroupModeAttrPktType] 12080 [unknown_pkt] == 0xFF) { 12081 temp_count = map_array[bcmStatGroupModeAttrPktType] 12082 [256]; 12083 map_array[bcmStatGroupModeAttrPktType] 12084 [unknown_pkt] = temp_count; 12085 map_array[bcmStatGroupModeAttrPktType][256] = 12086 temp_count+1; 12087 } 12088 } 12089 if (flex_attribute->combine_attr_counter[counter]. 12090 pkt_resolution_flags & 12091 BCM_STAT_FLEX_PKT_TYPE_CONTROL_PKT) { 12092 if (map_array[bcmStatGroupModeAttrPktType] 12093 [control_pkt] == 0xFF) { 12094 temp_count = map_array[bcmStatGroupModeAttrPktType] 12095 [256]; 12096 map_array[bcmStatGroupModeAttrPktType] 12097 [control_pkt] = temp_count; 12098 map_array[bcmStatGroupModeAttrPktType][256] = 12099 temp_count+1; 12100 } 12101 } 12102 if (flex_attribute->combine_attr_counter[counter]. 12103 pkt_resolution_flags & 12104 BCM_STAT_FLEX_PKT_TYPE_OAM_PKT) { 12105 if (map_array[bcmStatGroupModeAttrPktType] 12106 [oam_pkt] == 0xFF) { 12107 temp_count = map_array[bcmStatGroupModeAttrPktType] 12108 [256]; 12109 map_array[bcmStatGroupModeAttrPktType] 12110 [oam_pkt] = temp_count; 12111 map_array[bcmStatGroupModeAttrPktType][256] = 12112 temp_count+1; 12113 } 12114 } 12115 if (flex_attribute->combine_attr_counter[counter]. 12116 pkt_resolution_flags & 12117 BCM_STAT_FLEX_PKT_TYPE_BFD_PKT) { 12118 if (map_array[bcmStatGroupModeAttrPktType] 12119 [bfd_pkt] == 0xFF) { 12120 temp_count = map_array[bcmStatGroupModeAttrPktType] 12121 [256]; 12122 map_array[bcmStatGroupModeAttrPktType] 12123 [bfd_pkt] = temp_count; 12124 map_array[bcmStatGroupModeAttrPktType][256] = 12125 temp_count+1; 12126 } 12127 } 12128 if (flex_attribute->combine_attr_counter[counter]. 12129 pkt_resolution_flags & 12130 BCM_STAT_FLEX_PKT_TYPE_BPDU_PKT) { 12131 if (map_array[bcmStatGroupModeAttrPktType] 12132 [bpdu_pkt] == 0xFF) { 12133 temp_count = map_array[bcmStatGroupModeAttrPktType] 12134 [256]; 12135 map_array[bcmStatGroupModeAttrPktType] 12136 [bpdu_pkt] = temp_count; 12137 map_array[bcmStatGroupModeAttrPktType][256] = 12138 temp_count+1; 12139 } 12140 } 12141 if (flex_attribute->combine_attr_counter[counter]. 12142 pkt_resolution_flags & 12143 BCM_STAT_FLEX_PKT_TYPE_ICNM_PKT) { 12144 if (map_array[bcmStatGroupModeAttrPktType] 12145 [icnm_pkt] == 0xFF) { 12146 temp_count = map_array[bcmStatGroupModeAttrPktType] 12147 [256]; 12148 map_array[bcmStatGroupModeAttrPktType] 12149 [icnm_pkt] = temp_count; 12150 map_array[bcmStatGroupModeAttrPktType][256] = 12151 temp_count+1; 12152 } 12153 } 12154 if (flex_attribute->combine_attr_counter[counter]. 12155 pkt_resolution_flags & 12156 BCM_STAT_FLEX_PKT_TYPE_PKT_IS_1588) { 12157 if (map_array[bcmStatGroupModeAttrPktType] 12158 [_1588_pkt] == 0xFF) { 12159 temp_count = map_array[bcmStatGroupModeAttrPktType] 12160 [256]; 12161 map_array[bcmStatGroupModeAttrPktType] 12162 [_1588_pkt] = temp_count; 12163 map_array[bcmStatGroupModeAttrPktType][256] = 12164 temp_count+1; 12165 } 12166 } 12167 if (flex_attribute->combine_attr_counter[counter]. 12168 pkt_resolution_flags & 12169 BCM_STAT_FLEX_PKT_TYPE_BFD_PKT) { 12170 if (map_array[bcmStatGroupModeAttrPktType] 12171 [bfd_pkt] == 0xFF) { 12172 temp_count = map_array[bcmStatGroupModeAttrPktType] 12173 [256]; 12174 map_array[bcmStatGroupModeAttrPktType] 12175 [bfd_pkt] = temp_count; 12176 map_array[bcmStatGroupModeAttrPktType][256] = 12177 temp_count+1; 12178 } 12179 } 12180 if (flex_attribute->combine_attr_counter[counter]. 12181 pkt_resolution_flags & 12182 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2UC_PKT) { 12183 if (map_array[bcmStatGroupModeAttrPktType] 12184 [known_l2uc_pkt] == 0xFF) { 12185 temp_count = map_array[bcmStatGroupModeAttrPktType] 12186 [256]; 12187 map_array[bcmStatGroupModeAttrPktType] 12188 [known_l2uc_pkt] = temp_count; 12189 map_array[bcmStatGroupModeAttrPktType][256] = 12190 temp_count+1; 12191 } 12192 } 12193 if (flex_attribute->combine_attr_counter[counter]. 12194 pkt_resolution_flags & 12195 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L2UC_PKT) { 12196 if (map_array[bcmStatGroupModeAttrPktType] 12197 [unknown_l2uc_pkt] == 0xFF) { 12198 temp_count = map_array[bcmStatGroupModeAttrPktType] 12199 [256]; 12200 map_array[bcmStatGroupModeAttrPktType] 12201 [unknown_l2uc_pkt] = temp_count; 12202 map_array[bcmStatGroupModeAttrPktType][256] = 12203 temp_count+1; 12204 } 12205 } 12206 if (flex_attribute->combine_attr_counter[counter]. 12207 pkt_resolution_flags & 12208 BCM_STAT_FLEX_PKT_TYPE_L2BC_PKT) { 12209 if (map_array[bcmStatGroupModeAttrPktType] 12210 [l2bc_pkt] == 0xFF) { 12211 temp_count = map_array[bcmStatGroupModeAttrPktType] 12212 [256]; 12213 map_array[bcmStatGroupModeAttrPktType] 12214 [l2bc_pkt] = temp_count; 12215 map_array[bcmStatGroupModeAttrPktType][256] = 12216 temp_count+1; 12217 } 12218 } 12219 if (flex_attribute->combine_attr_counter[counter]. 12220 pkt_resolution_flags & 12221 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2MC_PKT) { 12222 if (map_array[bcmStatGroupModeAttrPktType] 12223 [known_l2mc_pkt] == 0xFF) { 12224 temp_count = map_array[bcmStatGroupModeAttrPktType] 12225 [256]; 12226 map_array[bcmStatGroupModeAttrPktType] 12227 [known_l2mc_pkt] = temp_count; 12228 map_array[bcmStatGroupModeAttrPktType][256] = 12229 temp_count+1; 12230 } 12231 } 12232 if (flex_attribute->combine_attr_counter[counter]. 12233 pkt_resolution_flags & 12234 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L2MC_PKT) { 12235 if (map_array[bcmStatGroupModeAttrPktType] 12236 [unknown_l2mc_pkt] == 0xFF) { 12237 temp_count = map_array[bcmStatGroupModeAttrPktType] 12238 [256]; 12239 map_array[bcmStatGroupModeAttrPktType] 12240 [unknown_l2mc_pkt] = temp_count; 12241 map_array[bcmStatGroupModeAttrPktType][256] = 12242 temp_count+1; 12243 } 12244 } 12245 if (flex_attribute->combine_attr_counter[counter]. 12246 pkt_resolution_flags & 12247 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L3UC_PKT) { 12248 if (map_array[bcmStatGroupModeAttrPktType] 12249 [known_l3uc_pkt] == 0xFF) { 12250 temp_count = map_array[bcmStatGroupModeAttrPktType] 12251 [256]; 12252 map_array[bcmStatGroupModeAttrPktType] 12253 [known_l3uc_pkt] = temp_count; 12254 map_array[bcmStatGroupModeAttrPktType][256] = 12255 temp_count+1; 12256 } 12257 } 12258 if (flex_attribute->combine_attr_counter[counter]. 12259 pkt_resolution_flags & 12260 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L3UC_PKT) { 12261 if (map_array[bcmStatGroupModeAttrPktType] 12262 [unknown_l3uc_pkt] == 0xFF) { 12263 temp_count = map_array[bcmStatGroupModeAttrPktType] 12264 [256]; 12265 map_array[bcmStatGroupModeAttrPktType] 12266 [unknown_l3uc_pkt] = temp_count; 12267 map_array[bcmStatGroupModeAttrPktType][256] = 12268 temp_count+1; 12269 } 12270 } 12271 if (flex_attribute->combine_attr_counter[counter]. 12272 pkt_resolution_flags & 12273 BCM_STAT_FLEX_PKT_TYPE_KNOWN_IPMC_PKT) { 12274 if (map_array[bcmStatGroupModeAttrPktType] 12275 [known_ipmc_pkt] == 0xFF) { 12276 temp_count = map_array[bcmStatGroupModeAttrPktType] 12277 [256]; 12278 map_array[bcmStatGroupModeAttrPktType] 12279 [known_ipmc_pkt] = temp_count; 12280 map_array[bcmStatGroupModeAttrPktType][256] = 12281 temp_count+1; 12282 } 12283 } 12284 if (flex_attribute->combine_attr_counter[counter]. 12285 pkt_resolution_flags & 12286 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_IPMC_PKT) { 12287 if (map_array[bcmStatGroupModeAttrPktType] 12288 [unknown_ipmc_pkt] == 0xFF) { 12289 temp_count = map_array[bcmStatGroupModeAttrPktType] 12290 [256]; 12291 map_array[bcmStatGroupModeAttrPktType] 12292 [unknown_ipmc_pkt] = temp_count; 12293 map_array[bcmStatGroupModeAttrPktType][256] = 12294 temp_count+1; 12295 } 12296 } 12297 if (flex_attribute->combine_attr_counter[counter]. 12298 pkt_resolution_flags & 12299 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_L2_PKT) { 12300 if (map_array[bcmStatGroupModeAttrPktType] 12301 [known_mpls_l2_pkt] == 0xFF) { 12302 temp_count = map_array[bcmStatGroupModeAttrPktType] 12303 [256]; 12304 map_array[bcmStatGroupModeAttrPktType] 12305 [known_mpls_l2_pkt] = temp_count; 12306 map_array[bcmStatGroupModeAttrPktType][256] = 12307 temp_count+1; 12308 } 12309 } 12310 if (flex_attribute->combine_attr_counter[counter]. 12311 pkt_resolution_flags & 12312 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_L3_PKT) { 12313 if (map_array[bcmStatGroupModeAttrPktType] 12314 [known_mpls_l3_pkt] == 0xFF) { 12315 temp_count = map_array[bcmStatGroupModeAttrPktType] 12316 [256]; 12317 map_array[bcmStatGroupModeAttrPktType] 12318 [known_mpls_l3_pkt] = temp_count; 12319 map_array[bcmStatGroupModeAttrPktType][256] = 12320 temp_count+1; 12321 } 12322 } 12323 if (flex_attribute->combine_attr_counter[counter]. 12324 pkt_resolution_flags & 12325 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_PKT) { 12326 if (map_array[bcmStatGroupModeAttrPktType] 12327 [known_mpls_pkt] == 0xFF) { 12328 temp_count = map_array[bcmStatGroupModeAttrPktType] 12329 [256]; 12330 map_array[bcmStatGroupModeAttrPktType] 12331 [known_mpls_pkt] = temp_count; 12332 map_array[bcmStatGroupModeAttrPktType][256] = 12333 temp_count+1; 12334 } 12335 } 12336 if (flex_attribute->combine_attr_counter[counter]. 12337 pkt_resolution_flags & 12338 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_MPLS_PKT) { 12339 if (map_array[bcmStatGroupModeAttrPktType] 12340 [unknown_mpls_pkt] == 0xFF) { 12341 temp_count = map_array[bcmStatGroupModeAttrPktType] 12342 [256]; 12343 map_array[bcmStatGroupModeAttrPktType] 12344 [unknown_mpls_pkt] = temp_count; 12345 map_array[bcmStatGroupModeAttrPktType][256] = 12346 temp_count+1; 12347 } 12348 } 12349 if (flex_attribute->combine_attr_counter[counter]. 12350 pkt_resolution_flags & 12351 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_MULTICAST_PKT) { 12352 if (map_array[bcmStatGroupModeAttrPktType] 12353 [known_mpls_multicast_pkt] == 0xFF) { 12354 temp_count = map_array[bcmStatGroupModeAttrPktType] 12355 [256]; 12356 map_array[bcmStatGroupModeAttrPktType] 12357 [known_mpls_multicast_pkt] = temp_count; 12358 map_array[bcmStatGroupModeAttrPktType][256] = 12359 temp_count+1; 12360 } 12361 } 12362 if (flex_attribute->combine_attr_counter[counter]. 12363 pkt_resolution_flags & 12364 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MIM_PKT) { 12365 if (map_array[bcmStatGroupModeAttrPktType] 12366 [known_mim_pkt] == 0xFF) { 12367 temp_count = map_array[bcmStatGroupModeAttrPktType] 12368 [256]; 12369 map_array[bcmStatGroupModeAttrPktType] 12370 [known_mim_pkt] = temp_count; 12371 map_array[bcmStatGroupModeAttrPktType][256] = 12372 temp_count+1; 12373 } 12374 } 12375 if (flex_attribute->combine_attr_counter[counter]. 12376 pkt_resolution_flags & 12377 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_MIM_PKT) { 12378 if (map_array[bcmStatGroupModeAttrPktType] 12379 [unknown_mim_pkt] == 0xFF) { 12380 temp_count = map_array[bcmStatGroupModeAttrPktType] 12381 [256]; 12382 map_array[bcmStatGroupModeAttrPktType] 12383 [unknown_mim_pkt] = temp_count; 12384 map_array[bcmStatGroupModeAttrPktType][256] = 12385 temp_count+1; 12386 } 12387 } 12388 if (flex_attribute->combine_attr_counter[counter]. 12389 pkt_resolution_flags & 12390 BCM_STAT_FLEX_PKT_TYPE_KNOWN_TRILL_PKT) { 12391 if (map_array[bcmStatGroupModeAttrPktType] 12392 [known_trill_pkt] == 0xFF) { 12393 temp_count = map_array[bcmStatGroupModeAttrPktType] 12394 [256]; 12395 map_array[bcmStatGroupModeAttrPktType] 12396 [known_trill_pkt] = temp_count; 12397 map_array[bcmStatGroupModeAttrPktType][256] = 12398 temp_count+1; 12399 } 12400 } 12401 if (flex_attribute->combine_attr_counter[counter]. 12402 pkt_resolution_flags & 12403 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_TRILL_PKT) { 12404 if (map_array[bcmStatGroupModeAttrPktType] 12405 [unknown_trill_pkt] == 0xFF) { 12406 temp_count = map_array[bcmStatGroupModeAttrPktType] 12407 [256]; 12408 map_array[bcmStatGroupModeAttrPktType] 12409 [unknown_trill_pkt] = temp_count; 12410 map_array[bcmStatGroupModeAttrPktType][256] = 12411 temp_count+1; 12412 } 12413 } 12414 if (flex_attribute->combine_attr_counter[counter]. 12415 pkt_resolution_flags & 12416 BCM_STAT_FLEX_PKT_TYPE_KNOWN_NIV_PKT) { 12417 if (map_array[bcmStatGroupModeAttrPktType] 12418 [known_niv_pkt] == 0xFF) { 12419 temp_count = map_array[bcmStatGroupModeAttrPktType] 12420 [256]; 12421 map_array[bcmStatGroupModeAttrPktType] 12422 [known_niv_pkt] = temp_count; 12423 map_array[bcmStatGroupModeAttrPktType][256] = 12424 temp_count+1; 12425 } 12426 } 12427 if (flex_attribute->combine_attr_counter[counter]. 12428 pkt_resolution_flags & 12429 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_NIV_PKT) { 12430 if (map_array[bcmStatGroupModeAttrPktType] 12431 [unknown_niv_pkt] == 0xFF) { 12432 temp_count = map_array[bcmStatGroupModeAttrPktType] 12433 [256]; 12434 map_array[bcmStatGroupModeAttrPktType] 12435 [unknown_niv_pkt] = temp_count; 12436 map_array[bcmStatGroupModeAttrPktType][256] = 12437 temp_count+1; 12438 } 12439 } 12440 #if defined(BCM_TRIDENT2_SUPPORT) 12441 if (SOC_IS_TD2_TT2(unit)) { 12442 if (flex_attribute->combine_attr_counter[counter]. 12443 pkt_resolution_flags & 12444 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2GRE_PKT) { 12445 if (map_array[bcmStatGroupModeAttrPktType] 12446 [known_l2gre_pkt] == 0xFF) { 12447 temp_count = map_array[bcmStatGroupModeAttrPktType] 12448 [256]; 12449 map_array[bcmStatGroupModeAttrPktType] 12450 [known_l2gre_pkt] = temp_count; 12451 map_array[bcmStatGroupModeAttrPktType][256] = 12452 temp_count+1; 12453 } 12454 } 12455 if (flex_attribute->combine_attr_counter[counter]. 12456 pkt_resolution_flags & 12457 BCM_STAT_FLEX_PKT_TYPE_KNOWN_VXLAN_PKT) { 12458 if (map_array[bcmStatGroupModeAttrPktType] 12459 [known_fcoe_pkt] == 0xFF) { 12460 temp_count = map_array[bcmStatGroupModeAttrPktType] 12461 [256]; 12462 map_array[bcmStatGroupModeAttrPktType] 12463 [known_fcoe_pkt] = temp_count; 12464 map_array[bcmStatGroupModeAttrPktType][256] = 12465 temp_count+1; 12466 } 12467 } 12468 if (flex_attribute->combine_attr_counter[counter]. 12469 pkt_resolution_flags & 12470 BCM_STAT_FLEX_PKT_TYPE_KNOWN_FCOE_PKT) { 12471 if (map_array[bcmStatGroupModeAttrPktType] 12472 [known_vxlan_pkt] == 0xFF) { 12473 temp_count = map_array[bcmStatGroupModeAttrPktType] 12474 [256]; 12475 map_array[bcmStatGroupModeAttrPktType] 12476 [known_vxlan_pkt] = temp_count; 12477 map_array[bcmStatGroupModeAttrPktType][256] = 12478 temp_count+1; 12479 } 12480 } 12481 if (flex_attribute->combine_attr_counter[counter]. 12482 pkt_resolution_flags & 12483 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_FCOE_PKT) { 12484 if (map_array[bcmStatGroupModeAttrPktType] 12485 [unknown_fcoe_pkt] == 0xFF) { 12486 temp_count = map_array[bcmStatGroupModeAttrPktType] 12487 [256]; 12488 map_array[bcmStatGroupModeAttrPktType] 12489 [unknown_fcoe_pkt] = temp_count; 12490 map_array[bcmStatGroupModeAttrPktType][256] = 12491 temp_count+1; 12492 } 12493 } 12494 } 12495 #endif 12496 } 12497 } 12498 if (flex_attribute->svp != 0) { 12499 if (map_array[bcmStatGroupModeAttrIngNetworkGroup] == NULL) { 12500 map_array[bcmStatGroupModeAttrIngNetworkGroup] = 12501 (uint8 *) sal_alloc(256+1,"map_array"); 12502 12503 if (map_array[bcmStatGroupModeAttrIngNetworkGroup] == NULL) { 12504 rv = BCM_E_MEMORY; 12505 goto cleanup; 12506 } 12507 12508 sal_memset(map_array[bcmStatGroupModeAttrIngNetworkGroup], 12509 0xFF,256); 12510 map_array[bcmStatGroupModeAttrIngNetworkGroup][256]=0; 12511 } 12512 if (direction == bcmStatFlexDirectionIngress) { 12513 max_count= (1 << ing_pkt_attr_cmprsd_bits_g[unit].svp_type)-1; 12514 } else { 12515 max_count= (1 << egr_pkt_attr_cmprsd_bits_g[unit].svp_type)-1; 12516 } 12517 for (loop_index=0; loop_index <= max_count ; loop_index++) { 12518 if (BCM_STAT_FLEX_VALUE_GET( 12519 flex_attribute->combine_attr_counter[counter]. 12520 value_array[bcmStatFlexAttrSvp], 12521 loop_index)) { 12522 if (map_array[bcmStatGroupModeAttrIngNetworkGroup] 12523 [loop_index] == 0xFF) { 12524 temp_count = map_array 12525 [bcmStatGroupModeAttrIngNetworkGroup] 12526 [256]; 12527 map_array[bcmStatGroupModeAttrIngNetworkGroup] 12528 [loop_index] = temp_count; 12529 map_array[bcmStatGroupModeAttrIngNetworkGroup] 12530 [256] = temp_count + 1; 12531 } 12532 } 12533 } 12534 } 12535 if (flex_attribute->dvp != 0) { 12536 if (map_array[bcmStatGroupModeAttrEgrNetworkGroup] == NULL) { 12537 map_array[bcmStatGroupModeAttrEgrNetworkGroup] = 12538 (uint8 *) sal_alloc(256+1,"map_array"); 12539 12540 if (map_array[bcmStatGroupModeAttrEgrNetworkGroup] == NULL) { 12541 rv = BCM_E_MEMORY; 12542 goto cleanup; 12543 } 12544 12545 sal_memset(map_array[bcmStatGroupModeAttrEgrNetworkGroup], 12546 0xFF,256); 12547 map_array[bcmStatGroupModeAttrEgrNetworkGroup][256]=0; 12548 } 12549 max_count= (1 << egr_pkt_attr_cmprsd_bits_g[unit].dvp_type)-1; 12550 for (loop_index=0; loop_index <= max_count ; loop_index++) { 12551 if (BCM_STAT_FLEX_VALUE_GET( 12552 flex_attribute->combine_attr_counter[counter]. 12553 value_array[bcmStatFlexAttrDvp], 12554 loop_index)) { 12555 if (map_array[bcmStatGroupModeAttrEgrNetworkGroup] 12556 [loop_index] == 0xFF) { 12557 temp_count = map_array 12558 [bcmStatGroupModeAttrEgrNetworkGroup] 12559 [256]; 12560 map_array[bcmStatGroupModeAttrEgrNetworkGroup] 12561 [loop_index] = temp_count; 12562 map_array[bcmStatGroupModeAttrEgrNetworkGroup] 12563 [256] = temp_count + 1; 12564 } 12565 } 12566 } 12567 } 12568 if (flex_attribute->drop != 0) { 12569 if (map_array[bcmStatGroupModeAttrDrop] == NULL) { 12570 map_array[bcmStatGroupModeAttrDrop] = 12571 (uint8 *) sal_alloc(256+1,"map_array"); 12572 12573 if (map_array[bcmStatGroupModeAttrDrop] == NULL) { 12574 rv = BCM_E_MEMORY; 12575 goto cleanup; 12576 } 12577 12578 sal_memset(map_array[bcmStatGroupModeAttrDrop], 12579 0xFF,256); 12580 map_array[bcmStatGroupModeAttrDrop][256]=0; 12581 } 12582 if (flex_attribute->combine_attr_counter[counter]. 12583 drop_flags & BCM_STAT_FLEX_DROP_DISABLE) { 12584 if (map_array[bcmStatGroupModeAttrDrop][0] == 0xFF) { 12585 temp_count = map_array[bcmStatGroupModeAttrDrop][256]; 12586 map_array[bcmStatGroupModeAttrDrop][0] = temp_count; 12587 map_array[bcmStatGroupModeAttrDrop][256]=temp_count + 1; 12588 } 12589 } 12590 if (flex_attribute->combine_attr_counter[counter]. 12591 drop_flags & BCM_STAT_FLEX_DROP_ENABLE) { 12592 if (map_array[bcmStatGroupModeAttrDrop][1] == 0xFF) { 12593 temp_count = map_array[bcmStatGroupModeAttrDrop][256]; 12594 map_array[bcmStatGroupModeAttrDrop][1] = temp_count; 12595 map_array[bcmStatGroupModeAttrDrop][256]=temp_count + 1; 12596 } 12597 } 12598 } 12599 /* END: PKT_RES_MAP*/ 12600 if (flex_attribute->ip_pkt!= 0) { 12601 if (map_array[bcmStatGroupModeAttrPacketTypeIp] == NULL) { 12602 map_array[bcmStatGroupModeAttrPacketTypeIp] = 12603 (uint8 *) sal_alloc(256+1,"map_array"); 12604 12605 if (map_array[bcmStatGroupModeAttrPacketTypeIp] == NULL) { 12606 rv = BCM_E_MEMORY; 12607 goto cleanup; 12608 } 12609 12610 sal_memset(map_array[bcmStatGroupModeAttrPacketTypeIp], 12611 0xFF,256); 12612 map_array[bcmStatGroupModeAttrPacketTypeIp][256]=0; 12613 } 12614 if (flex_attribute->combine_attr_counter[counter]. 12615 ip_pkt_flags & BCM_STAT_FLEX_IP_PKT_DISABLE) { 12616 if (map_array[bcmStatGroupModeAttrPacketTypeIp][0] == 0xFF) { 12617 temp_count = map_array[bcmStatGroupModeAttrPacketTypeIp][256]; 12618 map_array[bcmStatGroupModeAttrPacketTypeIp][0] = temp_count; 12619 map_array[bcmStatGroupModeAttrPacketTypeIp][256]=temp_count + 1; 12620 } 12621 } 12622 if (flex_attribute->combine_attr_counter[counter]. 12623 ip_pkt_flags & BCM_STAT_FLEX_IP_PKT_ENABLE) { 12624 if (map_array[bcmStatGroupModeAttrPacketTypeIp][1] == 0xFF) { 12625 temp_count = map_array[bcmStatGroupModeAttrPacketTypeIp][256]; 12626 map_array[bcmStatGroupModeAttrPacketTypeIp][1] = temp_count; 12627 map_array[bcmStatGroupModeAttrPacketTypeIp][256]=temp_count + 1; 12628 } 12629 } 12630 } 12631 } 12632 } 12633 #ifdef BCM_APACHE_SUPPORT 12634 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 12635 if (map_array[bcmStatGroupModeAttrColorMplsLabelThird] != NULL) { 12636 pre_ifp_cng_mpls_3_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12637 map_array[bcmStatGroupModeAttrColorMplsLabelThird][256]); 12638 if (pre_ifp_cng_mpls_3_cmprsd_max_bits > cng_3_bits) { 12639 pre_ifp_cng_mpls_3_cmprsd_max_bits = cng_3_bits; 12640 } 12641 } 12642 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelThird] != NULL) { 12643 int_pri_mpls_3_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12644 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][256]); 12645 if (int_pri_mpls_3_cmprsd_max_bits > phb_3_bits) { 12646 int_pri_mpls_3_cmprsd_max_bits = phb_3_bits; 12647 } 12648 } 12649 if (map_array[bcmStatGroupModeAttrColorMplsLabelSecond] != NULL) { 12650 pre_ifp_cng_mpls_2_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12651 map_array[bcmStatGroupModeAttrColorMplsLabelSecond][256]); 12652 if (pre_ifp_cng_mpls_2_cmprsd_max_bits > cng_2_bits) { 12653 pre_ifp_cng_mpls_2_cmprsd_max_bits = cng_2_bits; 12654 } 12655 } 12656 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond] != NULL) { 12657 int_pri_mpls_2_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12658 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][256]); 12659 if (int_pri_mpls_2_cmprsd_max_bits > phb_2_bits) { 12660 int_pri_mpls_2_cmprsd_max_bits = phb_2_bits; 12661 } 12662 } 12663 if (map_array[bcmStatGroupModeAttrColorMplsLabelFirst] != NULL) { 12664 pre_ifp_cng_mpls_1_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12665 map_array[bcmStatGroupModeAttrColorMplsLabelFirst][256]); 12666 if (pre_ifp_cng_mpls_1_cmprsd_max_bits > cng_1_bits) { 12667 pre_ifp_cng_mpls_1_cmprsd_max_bits = cng_1_bits; 12668 } 12669 } 12670 if (map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst] != NULL) { 12671 int_pri_mpls_1_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12672 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][256]); 12673 if (int_pri_mpls_1_cmprsd_max_bits > phb_1_bits) { 12674 int_pri_mpls_1_cmprsd_max_bits = phb_1_bits; 12675 } 12676 } 12677 } 12678 #endif 12679 /* 12680 * In flex counter, compressed mode is handled via compression HW tables. 12681 * Various sets attributes are mapped to particular compression tables 12682 * and are grouped together. 12683 * 12684 * For each Logical Group, 12685 * 1. Based on number of attribute values per attribute belonging 12686 * to that logical group, required bits are calculated to represent 12687 * that attribute selector. 12688 * 2. For non conforming packet ie. the packet that does not have the 12689 * selected attribute value, one more counter offset is required. 12690 * To get that offset, either we can use any vacant offset value that 12691 * is not used by the attribute value and if this condition is not met 12692 * then we need to increment one bit in the compressed attribute bit set. 12693 * 3. Once an extra offset is acquired, we need to validate with the max 12694 * number of bits supported. 12695 */ 12696 12697 #if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TRIDENT3_SUPPORT) 12698 if (soc_feature(unit, soc_feature_flex_stat_egr_queue_congestion_marked)) { 12699 if (map_array[bcmStatGroupModeAttrCos] != NULL || 12700 map_array[bcmStatGroupModeAttrQueueType] != NULL) { 12701 unused_attr_val_found = FALSE; 12702 if (map_array[bcmStatGroupModeAttrCos] != NULL) { 12703 mmu_cos_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12704 map_array[bcmStatGroupModeAttrCos][256]); 12705 if (mmu_cos_cmprsd_max_bits > mmu_cos_bits) { 12706 mmu_cos_cmprsd_max_bits = mmu_cos_bits; 12707 } 12708 values = map_array[bcmStatGroupModeAttrCos][256]; 12709 values_max = 1 << mmu_cos_cmprsd_max_bits; 12710 unused_attr_val_found = (values_max > values) ? TRUE : unused_attr_val_found; 12711 } 12712 if (map_array[bcmStatGroupModeAttrQueueType] != NULL) { 12713 uc_queueing_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12714 map_array[bcmStatGroupModeAttrQueueType][256]); 12715 if (uc_queueing_cmprsd_max_bits > uc_queueing_bits) { 12716 uc_queueing_cmprsd_max_bits = uc_queueing_bits; 12717 } 12718 values = map_array[bcmStatGroupModeAttrQueueType][256]; 12719 values_max = 1 << uc_queueing_cmprsd_max_bits; 12720 unused_attr_val_found = (values_max > 12721 values) ? TRUE : unused_attr_val_found; 12722 } 12723 if (!unused_attr_val_found) { 12724 if (mmu_cos_cmprsd_max_bits && 12725 (mmu_cos_cmprsd_max_bits < mmu_cos_bits)) { 12726 mmu_cos_cmprsd_max_bits++ ; 12727 } else if (uc_queueing_cmprsd_max_bits && 12728 (uc_queueing_cmprsd_max_bits < uc_queueing_bits)) { 12729 uc_queueing_cmprsd_max_bits++ ; 12730 } 12731 } 12732 } 12733 12734 if (map_array[bcmStatGroupModeAttrCongestionMarked] != NULL) { 12735 congestion_marked_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12736 map_array[bcmStatGroupModeAttrCongestionMarked][256]); 12737 if (congestion_marked_cmprsd_max_bits > congestion_marked_bits) { 12738 congestion_marked_cmprsd_max_bits = congestion_marked_bits; 12739 } 12740 } 12741 } 12742 #endif 12743 12744 if (map_array[bcmStatGroupModeAttrColor] != NULL || 12745 map_array[bcmStatGroupModeAttrFieldIngressColor] != NULL || 12746 map_array[bcmStatGroupModeAttrIntPri] != NULL) { 12747 unused_attr_val_found = FALSE; 12748 if (map_array[bcmStatGroupModeAttrColor] != NULL) { 12749 pre_ifp_cng_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12750 map_array[bcmStatGroupModeAttrColor][256]); 12751 if (pre_ifp_cng_cmprsd_max_bits > cng_bits) { 12752 pre_ifp_cng_cmprsd_max_bits = cng_bits; 12753 } 12754 values = map_array[bcmStatGroupModeAttrColor][256]; 12755 values_max = 1 << pre_ifp_cng_cmprsd_max_bits; 12756 unused_attr_val_found = (values_max > values) ? TRUE : unused_attr_val_found; 12757 } 12758 if (map_array[bcmStatGroupModeAttrFieldIngressColor] != NULL) { 12759 ifp_cng_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12760 map_array[bcmStatGroupModeAttrFieldIngressColor][256]); 12761 if (ifp_cng_cmprsd_max_bits > ifp_cng_bits) { 12762 ifp_cng_cmprsd_max_bits = ifp_cng_bits; 12763 } 12764 values = map_array[bcmStatGroupModeAttrFieldIngressColor][256]; 12765 values_max = 1 << ifp_cng_cmprsd_max_bits; 12766 unused_attr_val_found = (values_max > 12767 values) ? TRUE : unused_attr_val_found; 12768 } 12769 if (map_array[bcmStatGroupModeAttrIntPri] != NULL) { 12770 int_pri_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12771 map_array[bcmStatGroupModeAttrIntPri][256]); 12772 if (int_pri_cmprsd_max_bits > int_pri_bits) { 12773 int_pri_cmprsd_max_bits = int_pri_bits; 12774 } 12775 values = map_array[bcmStatGroupModeAttrIntPri][256]; 12776 values_max = 1 << int_pri_cmprsd_max_bits; 12777 unused_attr_val_found = (values_max > 12778 values) ? TRUE : unused_attr_val_found; 12779 } 12780 if (!unused_attr_val_found) { 12781 if (pre_ifp_cng_cmprsd_max_bits && 12782 (pre_ifp_cng_cmprsd_max_bits < cng_bits)) { 12783 pre_ifp_cng_cmprsd_max_bits++ ; 12784 } else if (ifp_cng_cmprsd_max_bits && 12785 (ifp_cng_cmprsd_max_bits < ifp_cng_bits)) { 12786 ifp_cng_cmprsd_max_bits++ ; 12787 } else if (int_pri_cmprsd_max_bits && 12788 (int_pri_cmprsd_max_bits < int_pri_bits)) { 12789 int_pri_cmprsd_max_bits++ ; 12790 } 12791 } 12792 } 12793 12794 if (map_array[bcmStatGroupModeAttrVlan] != NULL || 12795 map_array[bcmStatGroupModeAttrOuterPri] != NULL || 12796 map_array[bcmStatGroupModeAttrInnerPri] != NULL) { 12797 unused_attr_val_found = FALSE; 12798 if (map_array[bcmStatGroupModeAttrVlan] != NULL) { 12799 vlan_format_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12800 map_array[bcmStatGroupModeAttrVlan][256]); 12801 if (vlan_format_cmprsd_max_bits > vlan_format_bits) { 12802 vlan_format_cmprsd_max_bits = vlan_format_bits; 12803 } 12804 values = map_array[bcmStatGroupModeAttrVlan][256]; 12805 values_max = 1 << vlan_format_cmprsd_max_bits; 12806 unused_attr_val_found = (values_max > 12807 values) ? TRUE : unused_attr_val_found; 12808 } 12809 if (map_array[bcmStatGroupModeAttrOuterPri] != NULL) { 12810 outer_dot1p_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12811 map_array[bcmStatGroupModeAttrOuterPri][256]); 12812 if (outer_dot1p_cmprsd_max_bits > outer_dot1p_bits) { 12813 outer_dot1p_cmprsd_max_bits = outer_dot1p_bits; 12814 } 12815 values = map_array[bcmStatGroupModeAttrOuterPri][256]; 12816 values_max = 1 << outer_dot1p_cmprsd_max_bits; 12817 unused_attr_val_found = (values_max > 12818 values) ? TRUE : unused_attr_val_found; 12819 } 12820 if (map_array[bcmStatGroupModeAttrInnerPri] != NULL) { 12821 inner_dot1p_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12822 map_array[bcmStatGroupModeAttrInnerPri][256]); 12823 if (inner_dot1p_cmprsd_max_bits > inner_dot1p_bits) { 12824 inner_dot1p_cmprsd_max_bits = inner_dot1p_bits; 12825 } 12826 values = map_array[bcmStatGroupModeAttrInnerPri][256]; 12827 values_max = 1 << inner_dot1p_cmprsd_max_bits; 12828 unused_attr_val_found = (values_max > 12829 values) ? TRUE : unused_attr_val_found; 12830 } 12831 if (!unused_attr_val_found) { 12832 if (vlan_format_cmprsd_max_bits && 12833 (vlan_format_cmprsd_max_bits < vlan_format_bits)) { 12834 vlan_format_cmprsd_max_bits++ ; 12835 } else if (outer_dot1p_cmprsd_max_bits && 12836 (outer_dot1p_cmprsd_max_bits < outer_dot1p_bits)) { 12837 outer_dot1p_cmprsd_max_bits++ ; 12838 } else if (inner_dot1p_cmprsd_max_bits && 12839 (inner_dot1p_cmprsd_max_bits < inner_dot1p_bits)) { 12840 inner_dot1p_cmprsd_max_bits++ ; 12841 } 12842 } 12843 } 12844 if (map_array[bcmStatGroupModeAttrPort] != NULL) { 12845 port_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12846 map_array[bcmStatGroupModeAttrPort][256] + 1); 12847 if (port_cmprsd_max_bits > port_bits) { 12848 port_cmprsd_max_bits = port_bits; 12849 } 12850 } 12851 if (map_array[bcmStatGroupModeAttrTosDscp] != NULL || 12852 map_array[bcmStatGroupModeAttrTosEcn] != NULL) { 12853 unused_attr_val_found = FALSE; 12854 if (map_array[bcmStatGroupModeAttrTosDscp] != NULL) { 12855 tos_dscp_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12856 map_array[bcmStatGroupModeAttrTosDscp][256]); 12857 if (tos_dscp_cmprsd_max_bits > tos_dscp_bits) { 12858 tos_dscp_cmprsd_max_bits = tos_dscp_bits; 12859 } 12860 values = map_array[bcmStatGroupModeAttrTosDscp][256]; 12861 values_max = 1 << tos_dscp_cmprsd_max_bits; 12862 unused_attr_val_found = (values_max > 12863 values) ? TRUE : unused_attr_val_found; 12864 } 12865 if (map_array[bcmStatGroupModeAttrTosEcn] != NULL) { 12866 tos_ecn_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12867 map_array[bcmStatGroupModeAttrTosEcn][256]); 12868 if (tos_ecn_cmprsd_max_bits > tos_ecn_bits) { 12869 tos_ecn_cmprsd_max_bits = tos_ecn_bits; 12870 } 12871 values = map_array[bcmStatGroupModeAttrTosEcn][256]; 12872 values_max = 1 << tos_ecn_cmprsd_max_bits; 12873 unused_attr_val_found = (values_max > 12874 values) ? TRUE : unused_attr_val_found; 12875 } 12876 if (!unused_attr_val_found) { 12877 if (tos_dscp_cmprsd_max_bits && 12878 (tos_dscp_cmprsd_max_bits < tos_dscp_bits)) { 12879 tos_dscp_cmprsd_max_bits++ ; 12880 } else if (tos_ecn_cmprsd_max_bits && 12881 (tos_ecn_cmprsd_max_bits < tos_ecn_bits)) { 12882 tos_ecn_cmprsd_max_bits++ ; 12883 } 12884 } 12885 } 12886 12887 if (map_array[bcmStatGroupModeAttrPktType] != NULL || 12888 map_array[bcmStatGroupModeAttrClassType] != NULL || 12889 map_array[bcmStatGroupModeAttrIngNetworkGroup] != NULL || 12890 map_array[bcmStatGroupModeAttrEgrNetworkGroup] != NULL || 12891 map_array[bcmStatGroupModeAttrDrop] != NULL) { 12892 unused_attr_val_found = FALSE; 12893 #ifdef BCM_KATANA2_SUPPORT 12894 if soc_feature(unit, soc_feature_flex_stat_attributes_class) { 12895 if (map_array[bcmStatGroupModeAttrClassType] != NULL) { 12896 pkt_resolution_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12897 map_array[bcmStatGroupModeAttrClassType][256]); 12898 if (pkt_resolution_cmprsd_max_bits > pkt_resolution_bits) { 12899 pkt_resolution_cmprsd_max_bits = pkt_resolution_bits; 12900 } 12901 values = map_array[bcmStatGroupModeAttrClassType][256]; 12902 values_max = 1 << pkt_resolution_cmprsd_max_bits; 12903 unused_attr_val_found = (values_max > 12904 values) ? TRUE : unused_attr_val_found; 12905 } 12906 } else 12907 #endif 12908 { 12909 if (map_array[bcmStatGroupModeAttrPktType] != NULL) { 12910 pkt_resolution_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12911 map_array[bcmStatGroupModeAttrPktType][256]); 12912 if (pkt_resolution_cmprsd_max_bits > pkt_resolution_bits) { 12913 pkt_resolution_cmprsd_max_bits = pkt_resolution_bits; 12914 } 12915 values = map_array[bcmStatGroupModeAttrPktType][256]; 12916 values_max = 1 << pkt_resolution_cmprsd_max_bits; 12917 unused_attr_val_found = (values_max > 12918 values) ? TRUE : unused_attr_val_found; 12919 } 12920 } 12921 if (map_array[bcmStatGroupModeAttrIngNetworkGroup] != NULL) { 12922 svp_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12923 map_array[bcmStatGroupModeAttrIngNetworkGroup][256]); 12924 if (svp_cmprsd_max_bits > svp_bits) { 12925 svp_cmprsd_max_bits = svp_bits; 12926 } 12927 values = map_array[bcmStatGroupModeAttrIngNetworkGroup][256]; 12928 values_max = 1 << svp_cmprsd_max_bits; 12929 unused_attr_val_found = (values_max > 12930 values) ? TRUE : unused_attr_val_found; 12931 } 12932 if (map_array[bcmStatGroupModeAttrEgrNetworkGroup] != NULL) { 12933 dvp_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12934 map_array[bcmStatGroupModeAttrEgrNetworkGroup][256]); 12935 if (dvp_cmprsd_max_bits > dvp_bits) { 12936 dvp_cmprsd_max_bits = dvp_bits; 12937 } 12938 values = map_array[bcmStatGroupModeAttrEgrNetworkGroup][256]; 12939 values_max = 1 << dvp_cmprsd_max_bits; 12940 unused_attr_val_found = (values_max > 12941 values) ? TRUE : unused_attr_val_found; 12942 } 12943 if (map_array[bcmStatGroupModeAttrDrop] != NULL) { 12944 drop_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12945 map_array[bcmStatGroupModeAttrDrop][256]); 12946 if (drop_cmprsd_max_bits > drop_bits) { 12947 drop_cmprsd_max_bits = drop_bits; 12948 } 12949 values = map_array[bcmStatGroupModeAttrDrop][256]; 12950 values_max = 1 << drop_cmprsd_max_bits; 12951 unused_attr_val_found = (values_max > 12952 values) ? TRUE : unused_attr_val_found; 12953 } 12954 if (!unused_attr_val_found) { 12955 if (pkt_resolution_cmprsd_max_bits && 12956 (pkt_resolution_cmprsd_max_bits < pkt_resolution_bits)) { 12957 pkt_resolution_cmprsd_max_bits++ ; 12958 } else if (svp_cmprsd_max_bits && 12959 (svp_cmprsd_max_bits < svp_bits)) { 12960 svp_cmprsd_max_bits++ ; 12961 } else if (dvp_cmprsd_max_bits && 12962 (dvp_cmprsd_max_bits < int_pri_bits)) { 12963 dvp_cmprsd_max_bits++ ; 12964 } else if (drop_cmprsd_max_bits && 12965 (drop_cmprsd_max_bits < drop_bits)) { 12966 drop_cmprsd_max_bits++ ; 12967 } 12968 } 12969 } 12970 if (map_array[bcmStatGroupModeAttrPacketTypeIp] != NULL) { 12971 ip_pkt_cmprsd_max_bits = _bcm_stat_flex_get_num_bits( 12972 map_array[bcmStatGroupModeAttrPacketTypeIp][256]); 12973 if (ip_pkt_cmprsd_max_bits > ip_pkt_bits) { 12974 ip_pkt_cmprsd_max_bits = ip_pkt_bits; 12975 } 12976 } 12977 total_bits = 0; 12978 #ifdef BCM_APACHE_SUPPORT 12979 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 12980 total_bits = pre_ifp_cng_mpls_3_cmprsd_max_bits + 12981 int_pri_mpls_3_cmprsd_max_bits + 12982 pre_ifp_cng_mpls_2_cmprsd_max_bits + 12983 int_pri_mpls_2_cmprsd_max_bits + 12984 pre_ifp_cng_mpls_1_cmprsd_max_bits; 12985 } 12986 #endif 12987 #if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TRIDENT3_SUPPORT) 12988 if (soc_feature(unit, soc_feature_flex_stat_egr_queue_congestion_marked)) { 12989 total_bits += mmu_cos_cmprsd_max_bits + 12990 uc_queueing_cmprsd_max_bits + congestion_marked_cmprsd_max_bits; 12991 } 12992 #endif 12993 12994 if ((total_bits = total_bits + 12995 pre_ifp_cng_cmprsd_max_bits + ifp_cng_cmprsd_max_bits + 12996 int_pri_cmprsd_max_bits + vlan_format_cmprsd_max_bits + 12997 outer_dot1p_cmprsd_max_bits + inner_dot1p_cmprsd_max_bits + 12998 port_cmprsd_max_bits + 12999 tos_dscp_cmprsd_max_bits + tos_ecn_cmprsd_max_bits + 13000 pkt_resolution_cmprsd_max_bits + svp_cmprsd_max_bits + 13001 dvp_cmprsd_max_bits + drop_cmprsd_max_bits + ip_pkt_cmprsd_max_bits) > BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS) { 13002 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 13003 (BSL_META_U(unit, 13004 "TotalBits=%d Even Compressed mode cannot be used\n"), 13005 total_bits)); 13006 for (loop = 0; loop < bcmStatGroupModeAttrMaxValue; loop++) { 13007 if (map_array[loop] != NULL) { 13008 sal_free(map_array[loop]); 13009 } 13010 } 13011 sal_free(attr); 13012 return BCM_E_PARAM; 13013 } 13014 /* Creating MAP..there will be some unnecessary entries but no harm */ 13015 switch(direction) { 13016 case bcmStatFlexDirectionIngress: 13017 #ifdef BCM_APACHE_SUPPORT 13018 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 13019 max_bits = 0; 13020 if ((flex_attribute->cng_3 != 0) && 13021 (map_array[bcmStatGroupModeAttrColorMplsLabelThird] != NULL)) { 13022 max_bits = pre_ifp_cng_mpls_3_cmprsd_max_bits; 13023 ing_cmprsd_pkt_attr_bits->cng_3 = max_bits; 13024 ing_cmprsd_pkt_attr_bits->cng_3_mask = (1 << max_bits) - 1; 13025 ing_cmprsd_pkt_attr_bits->cng_3_pos = ing_pkt_attr_cmprsd_bits_g[unit]. 13026 cng_3_pos; 13027 } 13028 if ((flex_attribute->phb_3 != 0) && 13029 (map_array[bcmStatGroupModeAttrIntPriMplsLabelThird] != NULL)) { 13030 max_bits = int_pri_mpls_3_cmprsd_max_bits; 13031 ing_cmprsd_pkt_attr_bits->phb_3 = max_bits; 13032 ing_cmprsd_pkt_attr_bits->phb_3_mask = (1 << max_bits) - 1; 13033 ing_cmprsd_pkt_attr_bits->phb_3_pos = ing_pkt_attr_cmprsd_bits_g[unit]. 13034 phb_3_pos; 13035 13036 } 13037 if ((flex_attribute->cng_2 != 0) && 13038 (map_array[bcmStatGroupModeAttrColorMplsLabelSecond] != NULL)) { 13039 max_bits = pre_ifp_cng_mpls_2_cmprsd_max_bits; 13040 ing_cmprsd_pkt_attr_bits->cng_2 = max_bits; 13041 ing_cmprsd_pkt_attr_bits->cng_2_mask = (1 << max_bits) - 1; 13042 ing_cmprsd_pkt_attr_bits->cng_2_pos = ing_pkt_attr_cmprsd_bits_g[unit]. 13043 cng_2_pos; 13044 } 13045 if ((flex_attribute->phb_2 != 0) && 13046 (map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond] != NULL)) { 13047 max_bits = int_pri_mpls_2_cmprsd_max_bits; 13048 ing_cmprsd_pkt_attr_bits->phb_2 = max_bits; 13049 ing_cmprsd_pkt_attr_bits->phb_2_mask = (1 << max_bits) - 1; 13050 ing_cmprsd_pkt_attr_bits->phb_2_pos = ing_pkt_attr_cmprsd_bits_g[unit]. 13051 phb_2_pos; 13052 13053 } 13054 if ((flex_attribute->cng_1 != 0) && 13055 (map_array[bcmStatGroupModeAttrColorMplsLabelFirst] != NULL)) { 13056 max_bits = pre_ifp_cng_mpls_1_cmprsd_max_bits; 13057 ing_cmprsd_pkt_attr_bits->cng_1 = max_bits; 13058 ing_cmprsd_pkt_attr_bits->cng_1_mask = (1 << max_bits) - 1; 13059 ing_cmprsd_pkt_attr_bits->cng_1_pos = ing_pkt_attr_cmprsd_bits_g[unit]. 13060 cng_1_pos; 13061 } 13062 if ((flex_attribute->phb_1 != 0) && 13063 (map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst] != NULL)) { 13064 max_bits = int_pri_mpls_1_cmprsd_max_bits; 13065 ing_cmprsd_pkt_attr_bits->phb_1 = max_bits; 13066 ing_cmprsd_pkt_attr_bits->phb_1_mask = (1 << max_bits) - 1; 13067 ing_cmprsd_pkt_attr_bits->phb_1_pos = ing_pkt_attr_cmprsd_bits_g[unit]. 13068 phb_1_pos; 13069 13070 } 13071 } 13072 #endif 13073 if ((flex_attribute->pre_ifp_color != 0) || 13074 (flex_attribute->ifp_color != 0) || 13075 (flex_attribute->int_pri != 0)) { 13076 mapped_value0 = 0; 13077 mapped_value1 = 0; 13078 mapped_value2 = 0; 13079 max_bits=0; 13080 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, 13081 (BSL_META_U(unit, 13082 "Ing: PRI_CNG_MAP Creation \n"))); 13083 if (map_array[bcmStatGroupModeAttrColor] != NULL) { 13084 max_bits = pre_ifp_cng_cmprsd_max_bits; 13085 ing_cmprsd_pkt_attr_bits->cng = max_bits; 13086 ing_cmprsd_pkt_attr_bits->cng_mask = (1 << max_bits) - 1; 13087 ing_cmprsd_pkt_attr_bits->cng_pos = ing_pkt_attr_cmprsd_bits_g[unit]. 13088 cng_pos; 13089 } 13090 if (map_array[bcmStatGroupModeAttrFieldIngressColor] != NULL) { 13091 max_bits = ifp_cng_cmprsd_max_bits; 13092 ing_cmprsd_pkt_attr_bits->ifp_cng = max_bits; 13093 ing_cmprsd_pkt_attr_bits->ifp_cng_mask = (1 << max_bits)-1; 13094 ing_cmprsd_pkt_attr_bits->ifp_cng_pos = 13095 ing_pkt_attr_cmprsd_bits_g[unit].ifp_cng_pos; 13096 } 13097 if (map_array[bcmStatGroupModeAttrIntPri] != NULL) { 13098 max_bits = int_pri_cmprsd_max_bits; 13099 ing_cmprsd_pkt_attr_bits->int_pri = max_bits; 13100 ing_cmprsd_pkt_attr_bits->int_pri_mask = (1 << max_bits)-1; 13101 ing_cmprsd_pkt_attr_bits->int_pri_pos= ing_pkt_attr_cmprsd_bits_g[unit]. 13102 int_pri_pos; 13103 } 13104 invalid_map_value = (1 << (ing_pkt_attr_cmprsd_bits_g[unit].cng + 13105 ing_pkt_attr_cmprsd_bits_g[unit].ifp_cng + 13106 ing_pkt_attr_cmprsd_bits_g[unit].int_pri)) - 1; 13107 for (index0 =0; 13108 index0 < (1 << ing_pkt_attr_cmprsd_bits_g[unit].cng); 13109 index0++ ) { 13110 invalid_index0 = FALSE; 13111 if (map_array[bcmStatGroupModeAttrColor] != NULL) { 13112 if (map_array[bcmStatGroupModeAttrColor][index0] == 13113 0xFF ) { 13114 invalid_index0 = TRUE; 13115 } else { 13116 mapped_value0 = map_array 13117 [bcmStatGroupModeAttrColor][index0]; 13118 } 13119 } 13120 for (index1 =0; 13121 index1 < (1 << ing_pkt_attr_cmprsd_bits_g[unit].ifp_cng); 13122 index1++ ) { 13123 invalid_index1 = FALSE; 13124 if (map_array[bcmStatGroupModeAttrFieldIngressColor] 13125 != NULL) { 13126 if (map_array 13127 [bcmStatGroupModeAttrFieldIngressColor] 13128 [index1] == 0xFF){ 13129 invalid_index1 = TRUE; 13130 } else { 13131 mapped_value1 = map_array 13132 [bcmStatGroupModeAttrFieldIngressColor] 13133 [index1]; 13134 } 13135 } 13136 for (index2 =0; 13137 index2 < (1 << ing_pkt_attr_cmprsd_bits_g[unit].int_pri); 13138 index2++ ) { 13139 invalid_index2 = FALSE; 13140 if (map_array[bcmStatGroupModeAttrIntPri] 13141 != NULL) { 13142 if (map_array 13143 [bcmStatGroupModeAttrIntPri][index2] 13144 == 0xFF){ 13145 invalid_index2 = TRUE; 13146 } else { 13147 mapped_value2 = map_array 13148 [bcmStatGroupModeAttrIntPri] 13149 [index2]; 13150 } 13151 } 13152 final_index = 13153 (index0 << 13154 (ing_pkt_attr_cmprsd_bits_g[unit].ifp_cng + 13155 ing_pkt_attr_cmprsd_bits_g[unit].int_pri)) + 13156 (index1 << 13157 (ing_pkt_attr_cmprsd_bits_g[unit].int_pri)) + 13158 (index2) ; 13159 if (invalid_index0 || invalid_index1 || 13160 invalid_index2) { 13161 final_mapped_value = invalid_map_value; 13162 } else { 13163 final_mapped_value = 13164 (mapped_value0 << 13165 (ing_pkt_attr_cmprsd_bits_g[unit].ifp_cng + 13166 ing_pkt_attr_cmprsd_bits_g[unit].int_pri)) + 13167 (mapped_value1 << 13168 (ing_pkt_attr_cmprsd_bits_g[unit].int_pri)) + 13169 (mapped_value2) ; 13170 } 13171 ing_cmprsd_attr_selectors->pri_cnf_attr_map 13172 [final_index] = final_mapped_value; 13173 } 13174 } 13175 } 13176 } 13177 if ((flex_attribute->vlan_format != 0) || 13178 (flex_attribute->outer_dot1p != 0) || 13179 (flex_attribute->inner_dot1p != 0)) { 13180 mapped_value0 = 0; 13181 mapped_value1 = 0; 13182 mapped_value2 = 0; 13183 max_bits=0; 13184 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, 13185 (BSL_META_U(unit, 13186 "Ing: PKT_PRI_MAP Creation \n"))); 13187 if (map_array[bcmStatGroupModeAttrVlan] != NULL) { 13188 max_bits = vlan_format_cmprsd_max_bits; 13189 ing_cmprsd_pkt_attr_bits->vlan_format = max_bits; 13190 ing_cmprsd_pkt_attr_bits->vlan_format_mask = 13191 (1 << max_bits) - 1; 13192 ing_cmprsd_pkt_attr_bits->vlan_format_pos = 13193 ing_pkt_attr_cmprsd_bits_g[unit]. 13194 vlan_format_pos; 13195 } 13196 if (map_array[bcmStatGroupModeAttrOuterPri] != NULL) { 13197 max_bits = outer_dot1p_cmprsd_max_bits; 13198 ing_cmprsd_pkt_attr_bits->outer_dot1p = max_bits; 13199 ing_cmprsd_pkt_attr_bits->outer_dot1p_mask=(1<<max_bits)-1; 13200 ing_cmprsd_pkt_attr_bits->outer_dot1p_pos = 13201 ing_pkt_attr_cmprsd_bits_g[unit].outer_dot1p_pos; 13202 } 13203 if (map_array[bcmStatGroupModeAttrInnerPri] != NULL) { 13204 max_bits = inner_dot1p_cmprsd_max_bits; 13205 ing_cmprsd_pkt_attr_bits->inner_dot1p = max_bits; 13206 ing_cmprsd_pkt_attr_bits->inner_dot1p_mask=(1<<max_bits)-1; 13207 ing_cmprsd_pkt_attr_bits->inner_dot1p_pos= 13208 ing_pkt_attr_cmprsd_bits_g[unit].inner_dot1p_pos; 13209 } 13210 invalid_map_value = (1 << 13211 (ing_pkt_attr_cmprsd_bits_g[unit].vlan_format + 13212 ing_pkt_attr_cmprsd_bits_g[unit].outer_dot1p + 13213 ing_pkt_attr_cmprsd_bits_g[unit].inner_dot1p)) - 1; 13214 for (index0 =0; 13215 index0 < (1 << ing_pkt_attr_cmprsd_bits_g[unit].vlan_format); 13216 index0++ ) { 13217 invalid_index0 = FALSE; 13218 if (map_array[bcmStatGroupModeAttrVlan] != NULL) { 13219 if (map_array[bcmStatGroupModeAttrVlan][index0] == 13220 0xFF ) { 13221 invalid_index0 = TRUE; 13222 } 13223 else { 13224 mapped_value0 = map_array 13225 [bcmStatGroupModeAttrVlan][index0]; 13226 } 13227 } 13228 13229 for (index1 =0; 13230 index1 < (1 << ing_pkt_attr_cmprsd_bits_g[unit].outer_dot1p); 13231 index1++ ) { 13232 invalid_index1 = FALSE; 13233 if (map_array[bcmStatGroupModeAttrOuterPri] 13234 != NULL) { 13235 if (map_array 13236 [bcmStatGroupModeAttrOuterPri] 13237 [index1] == 0xFF){ 13238 invalid_index1 = TRUE; 13239 } else { 13240 mapped_value1 = map_array 13241 [bcmStatGroupModeAttrOuterPri] 13242 [index1]; 13243 } 13244 } 13245 for (index2 =0; 13246 index2 < (1 << ing_pkt_attr_cmprsd_bits_g[unit].inner_dot1p); 13247 index2++ ) { 13248 invalid_index2 = FALSE; 13249 if (map_array[bcmStatGroupModeAttrInnerPri] 13250 != NULL) { 13251 if (map_array 13252 [bcmStatGroupModeAttrInnerPri][index2] 13253 == 0xFF){ 13254 invalid_index2 = TRUE; 13255 } else { 13256 mapped_value2 = map_array 13257 [bcmStatGroupModeAttrInnerPri] 13258 [index2]; 13259 } 13260 } 13261 final_index = 13262 (index0 << 13263 (ing_pkt_attr_cmprsd_bits_g[unit].outer_dot1p + 13264 ing_pkt_attr_cmprsd_bits_g[unit].inner_dot1p)) + 13265 (index1 << 13266 (ing_pkt_attr_cmprsd_bits_g[unit].inner_dot1p)) + 13267 (index2) ; 13268 if (invalid_index0 || invalid_index1 || 13269 invalid_index2) { 13270 final_mapped_value = invalid_map_value; 13271 } else { 13272 final_mapped_value = 13273 (mapped_value0 << 13274 (ing_pkt_attr_cmprsd_bits_g[unit].outer_dot1p + 13275 ing_pkt_attr_cmprsd_bits_g[unit].inner_dot1p)) + 13276 (mapped_value1 << 13277 (ing_pkt_attr_cmprsd_bits_g[unit].inner_dot1p)) + 13278 (mapped_value2) ; 13279 } 13280 ing_cmprsd_attr_selectors->pkt_pri_attr_map 13281 [final_index] = final_mapped_value; 13282 } 13283 } 13284 } 13285 } 13286 if (flex_attribute->port != 0) { 13287 mapped_value0 = 0; 13288 max_bits=0; 13289 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, 13290 (BSL_META_U(unit, 13291 "Ing: PORT_MAP Creation \n"))); 13292 if (map_array[bcmStatGroupModeAttrPort] != NULL) { 13293 max_bits = port_cmprsd_max_bits; 13294 ing_cmprsd_pkt_attr_bits->ing_port = max_bits; 13295 ing_cmprsd_pkt_attr_bits->ing_port_mask = 13296 (1 << max_bits) - 1; 13297 ing_cmprsd_pkt_attr_bits->ing_port_pos = 13298 ing_pkt_attr_cmprsd_bits_g[unit].ing_port_pos; 13299 } 13300 for (index0 =0; 13301 index0 < (1 << ing_pkt_attr_cmprsd_bits_g[unit].ing_port); 13302 index0++ ) { 13303 invalid_index0 = FALSE; 13304 if (map_array[bcmStatGroupModeAttrPort] != NULL) { 13305 if (map_array[bcmStatGroupModeAttrPort][index0] == 13306 0xFF ) { 13307 invalid_index0 = TRUE; 13308 } 13309 else { 13310 mapped_value0 = map_array 13311 [bcmStatGroupModeAttrPort][index0]; 13312 } 13313 } 13314 final_index = index0 ; 13315 if (invalid_index0) { 13316 final_mapped_value = ing_cmprsd_pkt_attr_bits->ing_port_mask; 13317 } else { 13318 final_mapped_value = mapped_value0 ; 13319 } 13320 ing_cmprsd_attr_selectors->port_attr_map[final_index] = 13321 final_mapped_value; 13322 } 13323 } 13324 if ((flex_attribute->tos_dscp != 0) || 13325 (flex_attribute->tos_ecn != 0)) { 13326 mapped_value0 = 0; 13327 mapped_value1 = 0; 13328 max_bits=0; 13329 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, 13330 (BSL_META_U(unit, 13331 "Ing: TOS_MAP Creation \n"))); 13332 if (map_array[bcmStatGroupModeAttrTosDscp] != NULL) { 13333 max_bits = tos_dscp_cmprsd_max_bits; 13334 ing_cmprsd_pkt_attr_bits->tos_dscp = max_bits; 13335 ing_cmprsd_pkt_attr_bits->tos_dscp_mask = 13336 (1 << max_bits) - 1; 13337 ing_cmprsd_pkt_attr_bits->tos_dscp_pos = 13338 ing_pkt_attr_cmprsd_bits_g[unit].tos_dscp_pos; 13339 } 13340 if (map_array[bcmStatGroupModeAttrTosEcn] != NULL) { 13341 max_bits = tos_ecn_cmprsd_max_bits; 13342 ing_cmprsd_pkt_attr_bits->tos_ecn = max_bits; 13343 ing_cmprsd_pkt_attr_bits->tos_ecn_mask = 13344 (1 << max_bits) - 1; 13345 ing_cmprsd_pkt_attr_bits->tos_ecn_pos = 13346 ing_pkt_attr_cmprsd_bits_g[unit].tos_ecn_pos; 13347 } 13348 invalid_map_value = (1 << 13349 (ing_pkt_attr_cmprsd_bits_g[unit].tos_dscp + 13350 ing_pkt_attr_cmprsd_bits_g[unit].tos_ecn)) - 1; 13351 for (index0 =0; 13352 index0 < (1 << ing_pkt_attr_cmprsd_bits_g[unit].tos_dscp); 13353 index0++ ) { 13354 invalid_index0 = FALSE; 13355 if (map_array[bcmStatGroupModeAttrTosDscp] != NULL) { 13356 if (map_array[bcmStatGroupModeAttrTosDscp][index0] == 13357 0xFF ) { 13358 invalid_index0 = TRUE; 13359 } else { 13360 mapped_value0 = map_array 13361 [bcmStatGroupModeAttrTosDscp][index0]; 13362 } 13363 } 13364 for (index1 =0; 13365 index1 < (1 << ing_pkt_attr_cmprsd_bits_g[unit].tos_ecn); 13366 index1++ ) { 13367 invalid_index1 = FALSE; 13368 if (map_array[bcmStatGroupModeAttrTosEcn] != NULL) { 13369 if (map_array[bcmStatGroupModeAttrTosEcn] 13370 [index1] == 0xFF ) { 13371 invalid_index1 = TRUE; 13372 } else { 13373 mapped_value1 = map_array 13374 [bcmStatGroupModeAttrTosEcn][index1]; 13375 } 13376 } 13377 final_index = (index0 << 13378 ing_pkt_attr_cmprsd_bits_g[unit].tos_ecn) + 13379 index1; 13380 if (invalid_index0 || invalid_index1) { 13381 final_mapped_value = invalid_map_value; 13382 } else { 13383 final_mapped_value = (mapped_value0 << 13384 ing_pkt_attr_cmprsd_bits_g[unit].tos_ecn) + 13385 mapped_value1; 13386 } 13387 ing_cmprsd_attr_selectors->tos_attr_map[final_index] = 13388 final_mapped_value; 13389 } 13390 } 13391 } 13392 if ((flex_attribute->pkt_resolution != 0) || 13393 (flex_attribute->svp != 0) || 13394 (flex_attribute->drop != 0)) { 13395 mapped_value0 = 0; 13396 mapped_value1 = 0; 13397 mapped_value2 = 0; 13398 max_bits=0; 13399 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, 13400 (BSL_META_U(unit, 13401 "Ing: PKT_RES_MAP Creation \n"))); 13402 #ifdef BCM_KATANA2_SUPPORT 13403 if soc_feature(unit, soc_feature_flex_stat_attributes_class) { 13404 if (map_array[bcmStatGroupModeAttrClassType] != NULL) { 13405 max_bits = pkt_resolution_cmprsd_max_bits; 13406 ing_cmprsd_pkt_attr_bits->pkt_resolution = max_bits; 13407 ing_cmprsd_pkt_attr_bits->pkt_resolution_mask = 13408 (1 << max_bits) - 1; 13409 ing_cmprsd_pkt_attr_bits->pkt_resolution_pos = 13410 ing_pkt_attr_cmprsd_bits_g[unit]. 13411 pkt_resolution_pos; 13412 } 13413 } else 13414 #endif 13415 { 13416 if (map_array[bcmStatGroupModeAttrPktType] != NULL) { 13417 max_bits = pkt_resolution_cmprsd_max_bits; 13418 ing_cmprsd_pkt_attr_bits->pkt_resolution = max_bits; 13419 ing_cmprsd_pkt_attr_bits->pkt_resolution_mask = 13420 (1 << max_bits) - 1; 13421 ing_cmprsd_pkt_attr_bits->pkt_resolution_pos = 13422 ing_pkt_attr_cmprsd_bits_g[unit]. 13423 pkt_resolution_pos; 13424 } 13425 } 13426 if (map_array[bcmStatGroupModeAttrIngNetworkGroup] != NULL) { 13427 max_bits = svp_cmprsd_max_bits; 13428 ing_cmprsd_pkt_attr_bits->svp_type = max_bits; 13429 ing_cmprsd_pkt_attr_bits->svp_type_mask=(1<<max_bits)-1; 13430 ing_cmprsd_pkt_attr_bits->svp_type_pos = 13431 ing_pkt_attr_cmprsd_bits_g[unit].svp_type_pos; 13432 } 13433 if (map_array[bcmStatGroupModeAttrDrop] != NULL) { 13434 max_bits = drop_cmprsd_max_bits; 13435 ing_cmprsd_pkt_attr_bits->drop = max_bits; 13436 ing_cmprsd_pkt_attr_bits->drop_mask=(1<<max_bits)-1; 13437 ing_cmprsd_pkt_attr_bits->drop_pos= 13438 ing_pkt_attr_cmprsd_bits_g[unit].drop_pos; 13439 } 13440 invalid_map_value = (1 << 13441 (ing_pkt_attr_cmprsd_bits_g[unit].pkt_resolution + 13442 ing_pkt_attr_cmprsd_bits_g[unit].svp_type + 13443 ing_pkt_attr_cmprsd_bits_g[unit].drop)) - 1; 13444 13445 /* 13446 * map_array of pkt_resolution is filled based on bit position 13447 * of corresponding pkt_type in hw. And hence, they are not 13448 * sequential like map_array of other attributes. Use number of 13449 * bits in uncompressed mode to cover all position bit position. 13450 */ 13451 for (index0 =0; 13452 index0 < (1 << ing_pkt_attr_uncmprsd_bits_g[unit].pkt_resolution); 13453 index0++ ) { 13454 invalid_index0 = FALSE; 13455 #ifdef BCM_KATANA2_SUPPORT 13456 if (soc_feature(unit, soc_feature_flex_stat_attributes_class)) { 13457 if (map_array[bcmStatGroupModeAttrClassType] != NULL) { 13458 if (map_array[bcmStatGroupModeAttrClassType][index0] == 13459 0xFF ) { 13460 invalid_index0 = TRUE; 13461 } else { 13462 mapped_value0 = map_array 13463 [bcmStatGroupModeAttrClassType][index0]; 13464 } 13465 } 13466 } else 13467 #endif 13468 { 13469 if (map_array[bcmStatGroupModeAttrPktType] != NULL) { 13470 if (map_array[bcmStatGroupModeAttrPktType][index0] == 13471 0xFF ) { 13472 invalid_index0 = TRUE; 13473 } else { 13474 mapped_value0 = map_array 13475 [bcmStatGroupModeAttrPktType][index0]; 13476 } 13477 } 13478 } 13479 for (index1 =0; 13480 index1 < (1 << ing_pkt_attr_cmprsd_bits_g[unit].svp_type); 13481 index1++ ) { 13482 invalid_index1 = FALSE; 13483 if (map_array[bcmStatGroupModeAttrIngNetworkGroup] 13484 != NULL) { 13485 if (map_array 13486 [bcmStatGroupModeAttrIngNetworkGroup] 13487 [index1] == 0xFF){ 13488 invalid_index1 = TRUE; 13489 } else { 13490 mapped_value1 = map_array 13491 [bcmStatGroupModeAttrIngNetworkGroup] 13492 [index1]; 13493 } 13494 } 13495 for (index2 =0; 13496 index2 < (1 << ing_pkt_attr_cmprsd_bits_g[unit].drop); 13497 index2++ ) { 13498 invalid_index2 = FALSE; 13499 if (map_array[bcmStatGroupModeAttrDrop] 13500 != NULL) { 13501 if (map_array 13502 [bcmStatGroupModeAttrDrop][index2] 13503 == 0xFF){ 13504 invalid_index2 = TRUE; 13505 } else { 13506 mapped_value2 = map_array 13507 [bcmStatGroupModeAttrDrop] 13508 [index2]; 13509 } 13510 } 13511 final_index = 13512 (index0 << 13513 (ing_pkt_attr_cmprsd_bits_g[unit].svp_type + 13514 ing_pkt_attr_cmprsd_bits_g[unit].drop)) + 13515 (index1 << 13516 (ing_pkt_attr_cmprsd_bits_g[unit].drop)) + 13517 (index2) ; 13518 if (invalid_index0 || invalid_index1 || invalid_index2) { 13519 final_mapped_value = invalid_map_value; 13520 } else { 13521 final_mapped_value = 13522 (mapped_value0 << 13523 (ing_pkt_attr_cmprsd_bits_g[unit].svp_type + 13524 ing_pkt_attr_cmprsd_bits_g[unit].drop)) + 13525 (mapped_value1 << 13526 (ing_pkt_attr_cmprsd_bits_g[unit].drop)) + 13527 (mapped_value2) ; 13528 } 13529 ing_cmprsd_attr_selectors->pkt_res_attr_map 13530 [final_index] = final_mapped_value; 13531 } 13532 } 13533 } 13534 } 13535 if (flex_attribute->ip_pkt != 0) { 13536 max_bits=0; 13537 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, 13538 (BSL_META_U(unit, 13539 "Ing: ip packet Creation \n"))); 13540 if (map_array[bcmStatGroupModeAttrPacketTypeIp] != NULL) { 13541 max_bits = ip_pkt_cmprsd_max_bits; 13542 ing_cmprsd_pkt_attr_bits->ip_pkt= max_bits; 13543 ing_cmprsd_pkt_attr_bits->ip_pkt_mask = 13544 (1 << max_bits) - 1; 13545 ing_cmprsd_pkt_attr_bits->ip_pkt_pos = 13546 ing_pkt_attr_cmprsd_bits_g[unit].ip_pkt_pos; 13547 } 13548 } 13549 break; 13550 case bcmStatFlexDirectionEgress: 13551 mapped_value0 = 0; 13552 mapped_value1 = 0; 13553 mapped_value2 = 0; 13554 max_bits=0; 13555 #ifdef BCM_APACHE_SUPPORT 13556 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 13557 max_bits = 0; 13558 if ((flex_attribute->cng_3 != 0) && 13559 (map_array[bcmStatGroupModeAttrColorMplsLabelThird] != NULL)) { 13560 max_bits = pre_ifp_cng_mpls_3_cmprsd_max_bits; 13561 egr_cmprsd_pkt_attr_bits->cng_3 = max_bits; 13562 egr_cmprsd_pkt_attr_bits->cng_3_mask = (1 << max_bits) - 1; 13563 egr_cmprsd_pkt_attr_bits->cng_3_pos = egr_pkt_attr_cmprsd_bits_g[unit]. 13564 cng_3_pos; 13565 } 13566 if ((flex_attribute->phb_3 != 0) && 13567 (map_array[bcmStatGroupModeAttrIntPriMplsLabelThird] != NULL)) { 13568 max_bits = int_pri_mpls_3_cmprsd_max_bits; 13569 egr_cmprsd_pkt_attr_bits->phb_3 = max_bits; 13570 egr_cmprsd_pkt_attr_bits->phb_3_mask = (1 << max_bits) - 1; 13571 egr_cmprsd_pkt_attr_bits->phb_3_pos = egr_pkt_attr_cmprsd_bits_g[unit]. 13572 phb_3_pos; 13573 13574 } 13575 if ((flex_attribute->cng_2 != 0) && 13576 (map_array[bcmStatGroupModeAttrColorMplsLabelSecond] != NULL)) { 13577 max_bits = pre_ifp_cng_mpls_2_cmprsd_max_bits; 13578 egr_cmprsd_pkt_attr_bits->cng_2 = max_bits; 13579 egr_cmprsd_pkt_attr_bits->cng_2_mask = (1 << max_bits) - 1; 13580 egr_cmprsd_pkt_attr_bits->cng_2_pos = egr_pkt_attr_cmprsd_bits_g[unit]. 13581 cng_2_pos; 13582 } 13583 if ((flex_attribute->phb_2 != 0) && 13584 (map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond] != NULL)) { 13585 max_bits = int_pri_mpls_2_cmprsd_max_bits; 13586 egr_cmprsd_pkt_attr_bits->phb_2 = max_bits; 13587 egr_cmprsd_pkt_attr_bits->phb_2_mask = (1 << max_bits) - 1; 13588 egr_cmprsd_pkt_attr_bits->phb_2_pos = egr_pkt_attr_cmprsd_bits_g[unit]. 13589 phb_2_pos; 13590 13591 } 13592 if ((flex_attribute->cng_1 != 0) && 13593 (map_array[bcmStatGroupModeAttrColorMplsLabelFirst] != NULL)) { 13594 max_bits = pre_ifp_cng_mpls_1_cmprsd_max_bits; 13595 egr_cmprsd_pkt_attr_bits->cng_1 = max_bits; 13596 egr_cmprsd_pkt_attr_bits->cng_1_mask = (1 << max_bits) - 1; 13597 egr_cmprsd_pkt_attr_bits->cng_1_pos = egr_pkt_attr_cmprsd_bits_g[unit]. 13598 cng_1_pos; 13599 } 13600 if ((flex_attribute->phb_1 != 0) && 13601 (map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst] != NULL)) { 13602 max_bits = int_pri_mpls_1_cmprsd_max_bits; 13603 egr_cmprsd_pkt_attr_bits->phb_1 = max_bits; 13604 egr_cmprsd_pkt_attr_bits->phb_1_mask = (1 << max_bits) - 1; 13605 egr_cmprsd_pkt_attr_bits->phb_1_pos = egr_pkt_attr_cmprsd_bits_g[unit]. 13606 phb_1_pos; 13607 13608 } 13609 } 13610 #endif 13611 #if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TRIDENT3_SUPPORT) 13612 if (soc_feature(unit, soc_feature_flex_stat_egr_queue_congestion_marked)) { 13613 if ((flex_attribute->mmu_cos != 0) || 13614 (flex_attribute->uc_queueing != 0)) { 13615 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, 13616 (BSL_META_U(unit, 13617 "Egr: COS_MAP Creation \n"))); 13618 max_bits = 0; 13619 if (map_array[bcmStatGroupModeAttrCos] != NULL) { 13620 max_bits = mmu_cos_cmprsd_max_bits; 13621 egr_cmprsd_pkt_attr_bits->mmu_cos = max_bits; 13622 egr_cmprsd_pkt_attr_bits->mmu_cos_mask = (1 << max_bits) - 1; 13623 egr_cmprsd_pkt_attr_bits->mmu_cos_pos = egr_pkt_attr_cmprsd_bits_g[unit]. 13624 mmu_cos_pos; 13625 } 13626 if (map_array[bcmStatGroupModeAttrQueueType] != NULL) { 13627 max_bits = uc_queueing_cmprsd_max_bits; 13628 egr_cmprsd_pkt_attr_bits->uc_queueing = max_bits; 13629 egr_cmprsd_pkt_attr_bits->uc_queueing_mask = (1 << max_bits) - 1; 13630 egr_cmprsd_pkt_attr_bits->uc_queueing_pos = egr_pkt_attr_cmprsd_bits_g[unit]. 13631 uc_queueing_pos; 13632 13633 } 13634 13635 invalid_map_value = (1 << (egr_pkt_attr_cmprsd_bits_g[unit].mmu_cos + 13636 egr_pkt_attr_cmprsd_bits_g[unit].uc_queueing)) - 1; 13637 for (index0 = 0; 13638 index0 < (1 << egr_pkt_attr_cmprsd_bits_g[unit].mmu_cos); 13639 index0++ ) { 13640 invalid_index0 = FALSE; 13641 if (map_array[bcmStatGroupModeAttrCos] != NULL) { 13642 if (map_array[bcmStatGroupModeAttrCos][index0] == 13643 0xFF) { 13644 invalid_index0 = TRUE; 13645 } else { 13646 mapped_value0 = map_array 13647 [bcmStatGroupModeAttrCos] 13648 [index0]; 13649 } 13650 } 13651 for (index1 = 0; 13652 index1 < (1 << egr_pkt_attr_cmprsd_bits_g[unit].uc_queueing); 13653 index1++ ) { 13654 invalid_index1 = FALSE; 13655 if (map_array[bcmStatGroupModeAttrQueueType] != NULL) { 13656 if (map_array[bcmStatGroupModeAttrQueueType] 13657 [index1] == 0xFF){ 13658 invalid_index1 = TRUE; 13659 } else { 13660 mapped_value1 = map_array 13661 [bcmStatGroupModeAttrQueueType] 13662 [index1]; 13663 } 13664 } 13665 final_index = 13666 (index0 << 13667 (egr_pkt_attr_cmprsd_bits_g[unit].uc_queueing)) + 13668 (index1) ; 13669 if (invalid_index0 || invalid_index1) { 13670 final_mapped_value = invalid_map_value; 13671 } else { 13672 final_mapped_value = 13673 (mapped_value0 << 13674 (egr_pkt_attr_cmprsd_bits_g[unit].uc_queueing)) + 13675 (mapped_value1) ; 13676 } 13677 egr_cmprsd_attr_selectors->cos_uc_attr_map 13678 [final_index] = final_mapped_value; 13679 } 13680 } 13681 } 13682 if (flex_attribute->congestion_marked != 0) { 13683 max_bits = 0; 13684 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, 13685 (BSL_META_U(unit, 13686 "Egr: congestion marked Creation \n"))); 13687 if (map_array[bcmStatGroupModeAttrCongestionMarked] != NULL) { 13688 max_bits = congestion_marked_cmprsd_max_bits; 13689 egr_cmprsd_pkt_attr_bits->congestion_marked = max_bits; 13690 egr_cmprsd_pkt_attr_bits->congestion_marked_mask = 13691 (1 << max_bits) - 1; 13692 egr_cmprsd_pkt_attr_bits->congestion_marked_pos = 13693 egr_pkt_attr_cmprsd_bits_g[unit].congestion_marked_pos; 13694 } 13695 } 13696 } 13697 #endif 13698 13699 if ((flex_attribute->pre_ifp_color != 0) || 13700 (flex_attribute->int_pri != 0)) { 13701 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, 13702 (BSL_META_U(unit, 13703 "Egr: PRI_CNG_MAP Creation \n"))); 13704 if (map_array[bcmStatGroupModeAttrColor] != NULL) { 13705 max_bits = pre_ifp_cng_cmprsd_max_bits; 13706 egr_cmprsd_pkt_attr_bits->cng = max_bits; 13707 egr_cmprsd_pkt_attr_bits->cng_mask = (1 << max_bits) - 1; 13708 egr_cmprsd_pkt_attr_bits->cng_pos = egr_pkt_attr_cmprsd_bits_g[unit]. 13709 cng_pos; 13710 } 13711 if (map_array[bcmStatGroupModeAttrIntPri] != NULL) { 13712 max_bits = int_pri_cmprsd_max_bits; 13713 egr_cmprsd_pkt_attr_bits->int_pri = max_bits; 13714 egr_cmprsd_pkt_attr_bits->int_pri_mask=(1 << max_bits) - 1; 13715 egr_cmprsd_pkt_attr_bits->int_pri_pos= egr_pkt_attr_cmprsd_bits_g[unit]. 13716 int_pri_pos; 13717 } 13718 invalid_map_value = (1 << (egr_pkt_attr_cmprsd_bits_g[unit].cng + 13719 egr_pkt_attr_cmprsd_bits_g[unit].int_pri)) - 1; 13720 for (index0 =0; 13721 index0 < (1 << egr_pkt_attr_cmprsd_bits_g[unit].cng); 13722 index0++ ) { 13723 invalid_index0 = FALSE; 13724 if (map_array[bcmStatGroupModeAttrColor] != NULL) { 13725 if (map_array[bcmStatGroupModeAttrColor][index0] == 13726 0xFF) { 13727 invalid_index0 = TRUE; 13728 } else { 13729 mapped_value0 = map_array 13730 [bcmStatGroupModeAttrColor] 13731 [index0]; 13732 } 13733 } 13734 for (index1 =0; 13735 index1 < (1 << egr_pkt_attr_cmprsd_bits_g[unit].int_pri); 13736 index1++ ) { 13737 invalid_index1 = FALSE; 13738 if (map_array[bcmStatGroupModeAttrIntPri] != NULL) { 13739 if (map_array[bcmStatGroupModeAttrIntPri] 13740 [index1] == 0xFF){ 13741 invalid_index1 = TRUE; 13742 } else { 13743 mapped_value1 = map_array 13744 [bcmStatGroupModeAttrIntPri] 13745 [index1]; 13746 } 13747 } 13748 final_index = 13749 (index0 << 13750 (egr_pkt_attr_cmprsd_bits_g[unit].int_pri)) + 13751 (index1) ; 13752 if (invalid_index0 || invalid_index1) { 13753 final_mapped_value = invalid_map_value; 13754 } else { 13755 final_mapped_value = 13756 (mapped_value0 << 13757 (egr_pkt_attr_cmprsd_bits_g[unit].int_pri)) + 13758 (mapped_value1) ; 13759 } 13760 egr_cmprsd_attr_selectors->pri_cnf_attr_map 13761 [final_index] = final_mapped_value; 13762 } 13763 } 13764 } 13765 if ((flex_attribute->vlan_format != 0) || 13766 (flex_attribute->outer_dot1p != 0) || 13767 (flex_attribute->inner_dot1p != 0)) { 13768 mapped_value0 = 0; 13769 mapped_value1 = 0; 13770 mapped_value2 = 0; 13771 max_bits=0; 13772 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, 13773 (BSL_META_U(unit, 13774 "Egr: PKT_PRI_MAP Creation \n"))); 13775 if (map_array[bcmStatGroupModeAttrVlan] != NULL) { 13776 max_bits = vlan_format_cmprsd_max_bits; 13777 egr_cmprsd_pkt_attr_bits->vlan_format = max_bits; 13778 egr_cmprsd_pkt_attr_bits->vlan_format_mask = 13779 (1 << max_bits) - 1; 13780 egr_cmprsd_pkt_attr_bits->vlan_format_pos = 13781 egr_pkt_attr_cmprsd_bits_g[unit]. 13782 vlan_format_pos; 13783 } 13784 if (map_array[bcmStatGroupModeAttrOuterPri] != NULL) { 13785 max_bits = outer_dot1p_cmprsd_max_bits; 13786 egr_cmprsd_pkt_attr_bits->outer_dot1p = max_bits; 13787 egr_cmprsd_pkt_attr_bits->outer_dot1p_mask=(1<<max_bits)-1; 13788 egr_cmprsd_pkt_attr_bits->outer_dot1p_pos = 13789 egr_pkt_attr_cmprsd_bits_g[unit].outer_dot1p_pos; 13790 } 13791 if (map_array[bcmStatGroupModeAttrInnerPri] != NULL) { 13792 max_bits = inner_dot1p_cmprsd_max_bits; 13793 egr_cmprsd_pkt_attr_bits->inner_dot1p = max_bits; 13794 egr_cmprsd_pkt_attr_bits->inner_dot1p_mask=(1<<max_bits)-1; 13795 egr_cmprsd_pkt_attr_bits->inner_dot1p_pos= 13796 egr_pkt_attr_cmprsd_bits_g[unit].inner_dot1p_pos; 13797 } 13798 invalid_map_value = (1 << 13799 (egr_pkt_attr_cmprsd_bits_g[unit].vlan_format + 13800 egr_pkt_attr_cmprsd_bits_g[unit].outer_dot1p + 13801 egr_pkt_attr_cmprsd_bits_g[unit].inner_dot1p)) - 1; 13802 for (index0 =0; 13803 index0 < (1 << egr_pkt_attr_cmprsd_bits_g[unit].vlan_format); 13804 index0++ ) { 13805 invalid_index0 = FALSE; 13806 if (map_array[bcmStatGroupModeAttrVlan] != NULL) { 13807 if (map_array[bcmStatGroupModeAttrVlan][index0] == 13808 0xFF ) { 13809 invalid_index0 = TRUE; 13810 } else { 13811 mapped_value0 = map_array 13812 [bcmStatGroupModeAttrVlan][index0]; 13813 } 13814 } 13815 for (index1 =0; 13816 index1 < (1 << egr_pkt_attr_cmprsd_bits_g[unit].outer_dot1p); 13817 index1++ ) { 13818 invalid_index1 = FALSE; 13819 if (map_array[bcmStatGroupModeAttrOuterPri] 13820 != NULL) { 13821 if (map_array 13822 [bcmStatGroupModeAttrOuterPri] 13823 [index1] == 0xFF){ 13824 invalid_index1 = TRUE; 13825 } else { 13826 mapped_value1 = map_array 13827 [bcmStatGroupModeAttrOuterPri] 13828 [index1]; 13829 } 13830 } 13831 for (index2 =0; 13832 index2 < (1 << egr_pkt_attr_cmprsd_bits_g[unit].inner_dot1p); 13833 index2++ ) { 13834 invalid_index2 = FALSE; 13835 if (map_array[bcmStatGroupModeAttrInnerPri] 13836 != NULL) { 13837 if (map_array 13838 [bcmStatGroupModeAttrInnerPri][index2] 13839 == 0xFF){ 13840 invalid_index2 = TRUE; 13841 mapped_value2 = map_array 13842 [bcmStatGroupModeAttrInnerPri] 13843 [256]; 13844 } else { 13845 mapped_value2 = map_array 13846 [bcmStatGroupModeAttrInnerPri] 13847 [index2]; 13848 } 13849 } 13850 final_index = 13851 (index0 << 13852 (egr_pkt_attr_cmprsd_bits_g[unit].outer_dot1p + 13853 egr_pkt_attr_cmprsd_bits_g[unit].inner_dot1p)) + 13854 (index1 << 13855 (egr_pkt_attr_cmprsd_bits_g[unit].inner_dot1p)) + 13856 (index2) ; 13857 if (invalid_index0 || invalid_index1 || 13858 invalid_index2) { 13859 final_mapped_value = invalid_map_value; 13860 } else { 13861 final_mapped_value = 13862 (mapped_value0 << 13863 (egr_pkt_attr_cmprsd_bits_g[unit].outer_dot1p + 13864 egr_pkt_attr_cmprsd_bits_g[unit].inner_dot1p)) + 13865 (mapped_value1 << 13866 (egr_pkt_attr_cmprsd_bits_g[unit].inner_dot1p)) + 13867 (mapped_value2) ; 13868 } 13869 egr_cmprsd_attr_selectors->pkt_pri_attr_map 13870 [final_index] = final_mapped_value; 13871 } 13872 } 13873 } 13874 } 13875 if (flex_attribute->port != 0) { 13876 mapped_value0 = 0; 13877 max_bits=0; 13878 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, 13879 (BSL_META_U(unit, 13880 "Egr: PORT_MAP Creation \n"))); 13881 if (map_array[bcmStatGroupModeAttrPort] != NULL) { 13882 max_bits = port_cmprsd_max_bits; 13883 egr_cmprsd_pkt_attr_bits->egr_port = max_bits; 13884 egr_cmprsd_pkt_attr_bits->egr_port_mask = 13885 (1 << max_bits) - 1; 13886 egr_cmprsd_pkt_attr_bits->egr_port_pos = 13887 egr_pkt_attr_cmprsd_bits_g[unit].egr_port_pos; 13888 } 13889 for (index0 =0; 13890 index0 < (1 << egr_pkt_attr_cmprsd_bits_g[unit].egr_port); 13891 index0++ ) { 13892 invalid_index0 = FALSE; 13893 if (map_array[bcmStatGroupModeAttrPort] != NULL) { 13894 if (map_array[bcmStatGroupModeAttrPort][index0] == 13895 0xFF ) { 13896 invalid_index0 = TRUE; 13897 } else { 13898 mapped_value0 = map_array 13899 [bcmStatGroupModeAttrPort][index0]; 13900 } 13901 } 13902 final_index = index0 ; 13903 if (invalid_index0) { 13904 final_mapped_value = egr_cmprsd_pkt_attr_bits->egr_port_mask; 13905 } else { 13906 final_mapped_value = mapped_value0 ; 13907 } 13908 egr_cmprsd_attr_selectors->port_attr_map[final_index] = 13909 final_mapped_value; 13910 } 13911 } 13912 if ((flex_attribute->tos_dscp != 0) || 13913 (flex_attribute->tos_ecn != 0)) { 13914 mapped_value0 = 0; 13915 mapped_value1 = 0; 13916 max_bits=0; 13917 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, 13918 (BSL_META_U(unit, 13919 "Egr: TOS_MAP Creation \n"))); 13920 if (map_array[bcmStatGroupModeAttrTosDscp] != NULL) { 13921 max_bits = tos_dscp_cmprsd_max_bits; 13922 egr_cmprsd_pkt_attr_bits->tos_dscp = max_bits; 13923 egr_cmprsd_pkt_attr_bits->tos_dscp_mask = 13924 (1 << max_bits) - 1; 13925 egr_cmprsd_pkt_attr_bits->tos_dscp_pos = 13926 egr_pkt_attr_cmprsd_bits_g[unit].tos_dscp_pos; 13927 } 13928 if (map_array[bcmStatGroupModeAttrTosEcn] != NULL) { 13929 max_bits = tos_ecn_cmprsd_max_bits; 13930 egr_cmprsd_pkt_attr_bits->tos_ecn = max_bits; 13931 egr_cmprsd_pkt_attr_bits->tos_ecn_mask = 13932 (1 << max_bits) - 1; 13933 egr_cmprsd_pkt_attr_bits->tos_ecn_pos = 13934 egr_pkt_attr_cmprsd_bits_g[unit].tos_ecn_pos; 13935 } 13936 invalid_map_value = (1 << 13937 (egr_pkt_attr_cmprsd_bits_g[unit].tos_dscp + 13938 egr_pkt_attr_cmprsd_bits_g[unit].tos_ecn)) - 1; 13939 for (index0 =0; 13940 index0 < (1 << egr_pkt_attr_cmprsd_bits_g[unit].tos_dscp); 13941 index0++ ) { 13942 invalid_index0 = FALSE; 13943 if (map_array[bcmStatGroupModeAttrTosDscp] != NULL) { 13944 if (map_array[bcmStatGroupModeAttrTosDscp][index0] == 13945 0xFF ) { 13946 invalid_index0 = TRUE; 13947 } else { 13948 mapped_value0 = map_array 13949 [bcmStatGroupModeAttrTosDscp][index0]; 13950 } 13951 for (index1 =0; 13952 index1 < (1 << egr_pkt_attr_cmprsd_bits_g[unit].tos_ecn); 13953 index1++ ) { 13954 invalid_index1 = FALSE; 13955 if (map_array[bcmStatGroupModeAttrTosEcn] != NULL) { 13956 if (map_array[bcmStatGroupModeAttrTosEcn] 13957 [index1] == 0xFF ) { 13958 invalid_index1 = TRUE; 13959 } else { 13960 mapped_value1 = map_array 13961 [bcmStatGroupModeAttrTosEcn][index1]; 13962 } 13963 } 13964 final_index = (index0 << 13965 egr_pkt_attr_cmprsd_bits_g[unit].tos_ecn) + 13966 index1; 13967 if (invalid_index0 || invalid_index1) { 13968 final_mapped_value = invalid_map_value; 13969 } else { 13970 final_mapped_value = (mapped_value0 << 13971 egr_pkt_attr_cmprsd_bits_g[unit].tos_ecn) + 13972 mapped_value1; 13973 } 13974 egr_cmprsd_attr_selectors->tos_attr_map[final_index] = 13975 final_mapped_value; 13976 } 13977 } 13978 } 13979 } 13980 if ((flex_attribute->pkt_resolution != 0) || 13981 (flex_attribute->svp != 0) || 13982 (flex_attribute->dvp != 0) || 13983 (flex_attribute->drop != 0)) { 13984 uint8 tmp_svp_type = egr_pkt_attr_cmprsd_bits_g[unit].svp_type; 13985 uint8 tmp_dvp_type = egr_pkt_attr_cmprsd_bits_g[unit].dvp_type; 13986 mapped_value0 = 0; 13987 mapped_value1 = 0; 13988 mapped_value2 = 0; 13989 mapped_value3 = 0; 13990 max_bits=0; 13991 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, 13992 (BSL_META_U(unit, 13993 "Egr: PKT_RES_MAP Creation \n"))); 13994 #ifdef BCM_KATANA2_SUPPORT 13995 if soc_feature(unit, soc_feature_flex_stat_attributes_class) { 13996 if (map_array[bcmStatGroupModeAttrClassType] != NULL) { 13997 max_bits = pkt_resolution_cmprsd_max_bits; 13998 egr_cmprsd_pkt_attr_bits->pkt_resolution = max_bits; 13999 egr_cmprsd_pkt_attr_bits->pkt_resolution_mask = 14000 (1 << max_bits) - 1; 14001 egr_cmprsd_pkt_attr_bits->pkt_resolution_pos = 14002 egr_pkt_attr_cmprsd_bits_g[unit]. 14003 pkt_resolution_pos; 14004 } 14005 } else 14006 #endif 14007 { 14008 if (map_array[bcmStatGroupModeAttrPktType] != NULL) { 14009 max_bits = pkt_resolution_cmprsd_max_bits; 14010 egr_cmprsd_pkt_attr_bits->pkt_resolution = max_bits; 14011 egr_cmprsd_pkt_attr_bits->pkt_resolution_mask = 14012 (1 << max_bits) - 1; 14013 egr_cmprsd_pkt_attr_bits->pkt_resolution_pos = 14014 egr_pkt_attr_cmprsd_bits_g[unit]. 14015 pkt_resolution_pos; 14016 } 14017 } 14018 if (map_array[bcmStatGroupModeAttrIngNetworkGroup] != NULL) { 14019 max_bits = svp_cmprsd_max_bits; 14020 egr_cmprsd_pkt_attr_bits->svp_type = max_bits; 14021 egr_cmprsd_pkt_attr_bits->svp_type_mask=(1<<max_bits)-1; 14022 egr_cmprsd_pkt_attr_bits->svp_type_pos = 14023 egr_pkt_attr_cmprsd_bits_g[unit].svp_type_pos; 14024 } 14025 if (map_array[bcmStatGroupModeAttrEgrNetworkGroup] != NULL) { 14026 max_bits = dvp_cmprsd_max_bits; 14027 egr_cmprsd_pkt_attr_bits->dvp_type = max_bits; 14028 egr_cmprsd_pkt_attr_bits->dvp_type_mask=(1<<max_bits)-1; 14029 egr_cmprsd_pkt_attr_bits->dvp_type_pos = 14030 egr_pkt_attr_cmprsd_bits_g[unit].dvp_type_pos; 14031 } 14032 if (map_array[bcmStatGroupModeAttrDrop] != NULL) { 14033 max_bits = drop_cmprsd_max_bits; 14034 egr_cmprsd_pkt_attr_bits->drop = max_bits; 14035 egr_cmprsd_pkt_attr_bits->drop_mask=(1<<max_bits)-1; 14036 egr_cmprsd_pkt_attr_bits->drop_pos= 14037 egr_pkt_attr_cmprsd_bits_g[unit].drop_pos; 14038 } 14039 invalid_map_value = (1 << 14040 (egr_pkt_attr_cmprsd_bits_g[unit].pkt_resolution + 14041 egr_pkt_attr_cmprsd_bits_g[unit].svp_type + 14042 egr_pkt_attr_cmprsd_bits_g[unit].dvp_type + 14043 egr_pkt_attr_cmprsd_bits_g[unit].drop)) - 1; 14044 14045 #if defined(BCM_TRIDENT3_SUPPORT) 14046 if (SOC_IS_TRIDENT3X(unit) && 14047 soc_feature(unit, soc_feature_multiple_split_horizon_group)) { 14048 tmp_svp_type = 0x3; 14049 tmp_dvp_type = 0x3; 14050 } 14051 #endif 14052 for (index0 =0; 14053 index0 < (1 << egr_pkt_attr_cmprsd_bits_g[unit].pkt_resolution); 14054 index0++ ) { 14055 invalid_index0 = FALSE; 14056 if (map_array[bcmStatGroupModeAttrPktType] != NULL) { 14057 if (map_array[bcmStatGroupModeAttrPktType][index0] == 14058 0xFF ) { 14059 invalid_index0 = TRUE; 14060 } else { 14061 mapped_value0 = map_array 14062 [bcmStatGroupModeAttrPktType][index0]; 14063 } 14064 } 14065 for (index1 =0; 14066 index1 < (1 << tmp_svp_type); 14067 index1++ ) { 14068 invalid_index1 = FALSE; 14069 if (map_array[bcmStatGroupModeAttrIngNetworkGroup] 14070 != NULL) { 14071 if (map_array 14072 [bcmStatGroupModeAttrIngNetworkGroup] 14073 [index1] == 0xFF){ 14074 invalid_index1 = TRUE; 14075 } else { 14076 mapped_value1 = map_array 14077 [bcmStatGroupModeAttrIngNetworkGroup] 14078 [index1]; 14079 } 14080 } 14081 for (index2 =0; 14082 index2 < (1 << tmp_dvp_type); 14083 index2++ ) { 14084 invalid_index2 = FALSE; 14085 if (map_array 14086 [bcmStatGroupModeAttrEgrNetworkGroup] 14087 != NULL) { 14088 if (map_array 14089 [bcmStatGroupModeAttrEgrNetworkGroup] 14090 [index2] == 0xFF){ 14091 invalid_index2 = TRUE; 14092 } else { 14093 mapped_value2 = map_array 14094 [bcmStatGroupModeAttrEgrNetworkGroup] 14095 [index2]; 14096 } 14097 } 14098 for (index3 =0; 14099 index3 < (1 << egr_pkt_attr_cmprsd_bits_g[unit].drop); 14100 index3++ ) { 14101 invalid_index3 = FALSE; 14102 if (map_array[bcmStatGroupModeAttrDrop] 14103 != NULL) { 14104 if (map_array 14105 [bcmStatGroupModeAttrDrop][index3] 14106 == 0xFF){ 14107 invalid_index3 = TRUE; 14108 } else { 14109 mapped_value3 = map_array 14110 [bcmStatGroupModeAttrDrop] 14111 [index3]; 14112 } 14113 } 14114 final_index = 14115 (index0 << 14116 (tmp_svp_type + 14117 tmp_dvp_type + 14118 egr_pkt_attr_cmprsd_bits_g[unit].drop)) + 14119 (index1 << 14120 (tmp_dvp_type + 14121 egr_pkt_attr_cmprsd_bits_g[unit].drop)) + 14122 (index2 << 14123 egr_pkt_attr_cmprsd_bits_g[unit].drop) + 14124 (index3) ; 14125 if (invalid_index0 || invalid_index1 || 14126 invalid_index2 || invalid_index3) { 14127 final_mapped_value = invalid_map_value; 14128 } else { 14129 final_mapped_value = 14130 (mapped_value0 << 14131 (tmp_svp_type + 14132 tmp_dvp_type + 14133 egr_pkt_attr_cmprsd_bits_g[unit].drop)) + 14134 (mapped_value1 << 14135 (tmp_dvp_type + 14136 egr_pkt_attr_cmprsd_bits_g[unit].drop)) + 14137 (mapped_value2 << 14138 egr_pkt_attr_cmprsd_bits_g[unit].drop) + 14139 (mapped_value3) ; 14140 } 14141 egr_cmprsd_attr_selectors->pkt_res_attr_map 14142 [final_index] = final_mapped_value; 14143 } 14144 } 14145 } 14146 } 14147 } 14148 if (flex_attribute->ip_pkt != 0) { 14149 max_bits=0; 14150 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, 14151 (BSL_META_U(unit, 14152 "Egr: ip packet Creation \n"))); 14153 if (map_array[bcmStatGroupModeAttrPacketTypeIp] != NULL) { 14154 max_bits = ip_pkt_cmprsd_max_bits; 14155 egr_cmprsd_pkt_attr_bits->ip_pkt= max_bits; 14156 egr_cmprsd_pkt_attr_bits->ip_pkt_mask = 14157 (1 << max_bits) - 1; 14158 egr_cmprsd_pkt_attr_bits->ip_pkt_pos = 14159 egr_pkt_attr_cmprsd_bits_g[unit].ip_pkt_pos; 14160 } 14161 } 14162 break; 14163 default: 14164 break; 14165 } 14166 for (loop=0;loop<8;loop++) { 14167 offset_array[loop] = (uint16 *) sal_alloc((256+1) * sizeof(uint16),"offset_array"); 14168 if (offset_array[loop] == NULL) { 14169 rv = BCM_E_MEMORY; 14170 goto cleanup; 14171 } 14172 } 14173 /* Second Level Analysis: Update offset_array */ 14174 for (counter=0;counter < flex_attribute->total_counters ; counter ++ ) { 14175 for (loop=0;loop<8;loop++) { 14176 sal_memset(offset_array[loop],0,(256+1) * sizeof(uint16)); 14177 } 14178 /* Logical Group0 */ 14179 loop = 0; 14180 #ifdef BCM_APACHE_SUPPORT 14181 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 14182 if (flex_attribute->cng_3 != 0) { 14183 shift_by_bits = int_pri_mpls_3_cmprsd_max_bits + 14184 pre_ifp_cng_mpls_2_cmprsd_max_bits + 14185 int_pri_mpls_2_cmprsd_max_bits + 14186 pre_ifp_cng_mpls_1_cmprsd_max_bits + 14187 int_pri_mpls_1_cmprsd_max_bits + 14188 pre_ifp_cng_cmprsd_max_bits + 14189 ifp_cng_cmprsd_max_bits + 14190 int_pri_cmprsd_max_bits + 14191 vlan_format_cmprsd_max_bits + 14192 outer_dot1p_cmprsd_max_bits + 14193 inner_dot1p_cmprsd_max_bits + 14194 port_cmprsd_max_bits + 14195 tos_dscp_cmprsd_max_bits + 14196 tos_ecn_cmprsd_max_bits + 14197 pkt_resolution_cmprsd_max_bits + 14198 svp_cmprsd_max_bits + 14199 dvp_cmprsd_max_bits + 14200 drop_cmprsd_max_bits + 14201 ip_pkt_bits ; 14202 temp_count = offset_array[loop][0]; 14203 if (flex_attribute->combine_attr_counter[counter]. 14204 pre_ifp_color_mpls_label3_flags & BCM_STAT_FLEX_COLOR_GREEN) { 14205 /* GreenIndex=0*/ 14206 offset_array[loop][temp_count+1] = ( 14207 map_array[bcmStatGroupModeAttrColorMplsLabelThird][0] << shift_by_bits); 14208 temp_count++; 14209 } 14210 if (flex_attribute->combine_attr_counter[counter]. 14211 pre_ifp_color_mpls_label3_flags & BCM_STAT_FLEX_COLOR_RED) { 14212 /* RedIndex=1 */ 14213 offset_array[loop][temp_count+1] = ( 14214 map_array[bcmStatGroupModeAttrColorMplsLabelThird][1] << shift_by_bits); 14215 temp_count++; 14216 } 14217 if (flex_attribute->combine_attr_counter[counter]. 14218 pre_ifp_color_mpls_label3_flags & BCM_STAT_FLEX_COLOR_YELLOW) { 14219 /* YellowIndex=3 */ 14220 offset_array[loop][temp_count+1] = ( 14221 map_array[bcmStatGroupModeAttrColorMplsLabelThird][3] << shift_by_bits); 14222 temp_count++; 14223 } 14224 offset_array[loop][0] = temp_count; 14225 loop++; 14226 } 14227 if (flex_attribute->phb_3 != 0) { 14228 shift_by_bits = pre_ifp_cng_mpls_2_cmprsd_max_bits + 14229 int_pri_mpls_2_cmprsd_max_bits + 14230 pre_ifp_cng_mpls_1_cmprsd_max_bits + 14231 int_pri_mpls_1_cmprsd_max_bits + 14232 pre_ifp_cng_cmprsd_max_bits + 14233 ifp_cng_cmprsd_max_bits + 14234 int_pri_cmprsd_max_bits + 14235 vlan_format_cmprsd_max_bits + 14236 outer_dot1p_cmprsd_max_bits + 14237 inner_dot1p_cmprsd_max_bits + 14238 port_cmprsd_max_bits + 14239 tos_dscp_cmprsd_max_bits + 14240 tos_ecn_cmprsd_max_bits + 14241 pkt_resolution_cmprsd_max_bits + 14242 svp_cmprsd_max_bits + 14243 dvp_cmprsd_max_bits + 14244 drop_cmprsd_max_bits + 14245 ip_pkt_bits ; 14246 temp_count = offset_array[loop][0]; 14247 if (flex_attribute->combine_attr_counter[counter]. 14248 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI0) { 14249 offset_array[loop][temp_count+1] = ( 14250 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][0] << 14251 shift_by_bits); 14252 temp_count++; 14253 } 14254 if (flex_attribute->combine_attr_counter[counter]. 14255 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI1) { 14256 offset_array[loop][temp_count+1] = ( 14257 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][1] << 14258 shift_by_bits); 14259 temp_count++; 14260 } 14261 if (flex_attribute->combine_attr_counter[counter]. 14262 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI2) { 14263 offset_array[loop][temp_count+1] = ( 14264 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][2] << 14265 shift_by_bits); 14266 temp_count++; 14267 } 14268 if (flex_attribute->combine_attr_counter[counter]. 14269 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI3) { 14270 offset_array[loop][temp_count+1] = ( 14271 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][3] << 14272 shift_by_bits); 14273 temp_count++; 14274 } 14275 if (flex_attribute->combine_attr_counter[counter]. 14276 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI4) { 14277 offset_array[loop][temp_count+1] = ( 14278 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][4] << 14279 shift_by_bits); 14280 temp_count++; 14281 } 14282 if (flex_attribute->combine_attr_counter[counter]. 14283 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI5) { 14284 offset_array[loop][temp_count+1] = ( 14285 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][5] << 14286 shift_by_bits); 14287 temp_count++; 14288 } 14289 if (flex_attribute->combine_attr_counter[counter]. 14290 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI6) { 14291 offset_array[loop][temp_count+1] = ( 14292 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][6] << 14293 shift_by_bits); 14294 temp_count++; 14295 } 14296 if (flex_attribute->combine_attr_counter[counter]. 14297 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI7) { 14298 offset_array[loop][temp_count+1] = ( 14299 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][7] << 14300 shift_by_bits); 14301 temp_count++; 14302 } 14303 if (flex_attribute->combine_attr_counter[counter]. 14304 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI8) { 14305 offset_array[loop][temp_count+1] = ( 14306 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][8] << 14307 shift_by_bits); 14308 temp_count++; 14309 } 14310 if (flex_attribute->combine_attr_counter[counter]. 14311 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI9) { 14312 offset_array[loop][temp_count+1] = ( 14313 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][9] << 14314 shift_by_bits); 14315 temp_count++; 14316 } 14317 if (flex_attribute->combine_attr_counter[counter]. 14318 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI10) { 14319 offset_array[loop][temp_count+1] = ( 14320 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][10] << 14321 shift_by_bits); 14322 temp_count++; 14323 } 14324 if (flex_attribute->combine_attr_counter[counter]. 14325 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI11) { 14326 offset_array[loop][temp_count+1] = ( 14327 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][11] << 14328 shift_by_bits); 14329 temp_count++; 14330 } 14331 if (flex_attribute->combine_attr_counter[counter]. 14332 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI12) { 14333 offset_array[loop][temp_count+1] = ( 14334 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][12] << 14335 shift_by_bits); 14336 temp_count++; 14337 } 14338 if (flex_attribute->combine_attr_counter[counter]. 14339 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI13) { 14340 offset_array[loop][temp_count+1] = ( 14341 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][13] << 14342 shift_by_bits); 14343 temp_count++; 14344 } 14345 if (flex_attribute->combine_attr_counter[counter]. 14346 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI14) { 14347 offset_array[loop][temp_count+1] = ( 14348 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][14] << 14349 shift_by_bits); 14350 temp_count++; 14351 } 14352 if (flex_attribute->combine_attr_counter[counter]. 14353 int_pri_mpls_label3_flags & BCM_STAT_FLEX_PRI15) { 14354 offset_array[loop][temp_count+1] = ( 14355 map_array[bcmStatGroupModeAttrIntPriMplsLabelThird][15] << 14356 shift_by_bits); 14357 temp_count++; 14358 } 14359 offset_array[loop][0] = temp_count; 14360 loop++; 14361 } 14362 if (flex_attribute->cng_2 != 0) { 14363 shift_by_bits = int_pri_mpls_2_cmprsd_max_bits + 14364 pre_ifp_cng_mpls_1_cmprsd_max_bits + 14365 int_pri_mpls_1_cmprsd_max_bits + 14366 pre_ifp_cng_cmprsd_max_bits + 14367 ifp_cng_cmprsd_max_bits + 14368 int_pri_cmprsd_max_bits + 14369 vlan_format_cmprsd_max_bits + 14370 outer_dot1p_cmprsd_max_bits + 14371 inner_dot1p_cmprsd_max_bits + 14372 port_cmprsd_max_bits + 14373 tos_dscp_cmprsd_max_bits + 14374 tos_ecn_cmprsd_max_bits + 14375 pkt_resolution_cmprsd_max_bits + 14376 svp_cmprsd_max_bits + 14377 dvp_cmprsd_max_bits + 14378 drop_cmprsd_max_bits + 14379 ip_pkt_bits ; 14380 temp_count = offset_array[loop][0]; 14381 if (flex_attribute->combine_attr_counter[counter]. 14382 pre_ifp_color_mpls_label2_flags & BCM_STAT_FLEX_COLOR_GREEN) { 14383 /* GreenIndex=0*/ 14384 offset_array[loop][temp_count+1] = ( 14385 map_array[bcmStatGroupModeAttrColorMplsLabelSecond][0] << shift_by_bits); 14386 temp_count++; 14387 } 14388 if (flex_attribute->combine_attr_counter[counter]. 14389 pre_ifp_color_mpls_label2_flags & BCM_STAT_FLEX_COLOR_RED) { 14390 /* RedIndex=1 */ 14391 offset_array[loop][temp_count+1] = ( 14392 map_array[bcmStatGroupModeAttrColorMplsLabelSecond][1] << shift_by_bits); 14393 temp_count++; 14394 } 14395 if (flex_attribute->combine_attr_counter[counter]. 14396 pre_ifp_color_mpls_label2_flags & BCM_STAT_FLEX_COLOR_YELLOW) { 14397 /* YellowIndex=3 */ 14398 offset_array[loop][temp_count+1] = ( 14399 map_array[bcmStatGroupModeAttrColorMplsLabelSecond][3] << shift_by_bits); 14400 temp_count++; 14401 } 14402 offset_array[loop][0] = temp_count; 14403 loop++; 14404 } 14405 if (flex_attribute->phb_2 != 0) { 14406 shift_by_bits = pre_ifp_cng_mpls_1_cmprsd_max_bits + 14407 int_pri_mpls_1_cmprsd_max_bits + 14408 pre_ifp_cng_cmprsd_max_bits + 14409 ifp_cng_cmprsd_max_bits + 14410 int_pri_cmprsd_max_bits + 14411 vlan_format_cmprsd_max_bits + 14412 outer_dot1p_cmprsd_max_bits + 14413 inner_dot1p_cmprsd_max_bits + 14414 port_cmprsd_max_bits + 14415 tos_dscp_cmprsd_max_bits + 14416 tos_ecn_cmprsd_max_bits + 14417 pkt_resolution_cmprsd_max_bits + 14418 svp_cmprsd_max_bits + 14419 dvp_cmprsd_max_bits + 14420 drop_cmprsd_max_bits + 14421 ip_pkt_bits ; 14422 temp_count = offset_array[loop][0]; 14423 if (flex_attribute->combine_attr_counter[counter]. 14424 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI0) { 14425 offset_array[loop][temp_count+1] = ( 14426 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][0] << 14427 shift_by_bits); 14428 temp_count++; 14429 } 14430 if (flex_attribute->combine_attr_counter[counter]. 14431 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI1) { 14432 offset_array[loop][temp_count+1] = ( 14433 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][1] << 14434 shift_by_bits); 14435 temp_count++; 14436 } 14437 if (flex_attribute->combine_attr_counter[counter]. 14438 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI2) { 14439 offset_array[loop][temp_count+1] = ( 14440 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][2] << 14441 shift_by_bits); 14442 temp_count++; 14443 } 14444 if (flex_attribute->combine_attr_counter[counter]. 14445 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI3) { 14446 offset_array[loop][temp_count+1] = ( 14447 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][3] << 14448 shift_by_bits); 14449 temp_count++; 14450 } 14451 if (flex_attribute->combine_attr_counter[counter]. 14452 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI4) { 14453 offset_array[loop][temp_count+1] = ( 14454 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][4] << 14455 shift_by_bits); 14456 temp_count++; 14457 } 14458 if (flex_attribute->combine_attr_counter[counter]. 14459 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI5) { 14460 offset_array[loop][temp_count+1] = ( 14461 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][5] << 14462 shift_by_bits); 14463 temp_count++; 14464 } 14465 if (flex_attribute->combine_attr_counter[counter]. 14466 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI6) { 14467 offset_array[loop][temp_count+1] = ( 14468 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][6] << 14469 shift_by_bits); 14470 temp_count++; 14471 } 14472 if (flex_attribute->combine_attr_counter[counter]. 14473 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI7) { 14474 offset_array[loop][temp_count+1] = ( 14475 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][7] << 14476 shift_by_bits); 14477 temp_count++; 14478 } 14479 if (flex_attribute->combine_attr_counter[counter]. 14480 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI8) { 14481 offset_array[loop][temp_count+1] = ( 14482 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][8] << 14483 shift_by_bits); 14484 temp_count++; 14485 } 14486 if (flex_attribute->combine_attr_counter[counter]. 14487 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI9) { 14488 offset_array[loop][temp_count+1] = ( 14489 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][9] << 14490 shift_by_bits); 14491 temp_count++; 14492 } 14493 if (flex_attribute->combine_attr_counter[counter]. 14494 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI10) { 14495 offset_array[loop][temp_count+1] = ( 14496 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][10] << 14497 shift_by_bits); 14498 temp_count++; 14499 } 14500 if (flex_attribute->combine_attr_counter[counter]. 14501 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI11) { 14502 offset_array[loop][temp_count+1] = ( 14503 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][11] << 14504 shift_by_bits); 14505 temp_count++; 14506 } 14507 if (flex_attribute->combine_attr_counter[counter]. 14508 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI12) { 14509 offset_array[loop][temp_count+1] = ( 14510 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][12] << 14511 shift_by_bits); 14512 temp_count++; 14513 } 14514 if (flex_attribute->combine_attr_counter[counter]. 14515 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI13) { 14516 offset_array[loop][temp_count+1] = ( 14517 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][13] << 14518 shift_by_bits); 14519 temp_count++; 14520 } 14521 if (flex_attribute->combine_attr_counter[counter]. 14522 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI14) { 14523 offset_array[loop][temp_count+1] = ( 14524 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][14] << 14525 shift_by_bits); 14526 temp_count++; 14527 } 14528 if (flex_attribute->combine_attr_counter[counter]. 14529 int_pri_mpls_label2_flags & BCM_STAT_FLEX_PRI15) { 14530 offset_array[loop][temp_count+1] = ( 14531 map_array[bcmStatGroupModeAttrIntPriMplsLabelSecond][15] << 14532 shift_by_bits); 14533 temp_count++; 14534 } 14535 offset_array[loop][0] = temp_count; 14536 loop++; 14537 } 14538 if (flex_attribute->cng_1 != 0) { 14539 shift_by_bits = int_pri_mpls_1_cmprsd_max_bits + 14540 pre_ifp_cng_cmprsd_max_bits + 14541 ifp_cng_cmprsd_max_bits + 14542 int_pri_cmprsd_max_bits + 14543 vlan_format_cmprsd_max_bits + 14544 outer_dot1p_cmprsd_max_bits + 14545 inner_dot1p_cmprsd_max_bits + 14546 port_cmprsd_max_bits + 14547 tos_dscp_cmprsd_max_bits + 14548 tos_ecn_cmprsd_max_bits + 14549 pkt_resolution_cmprsd_max_bits + 14550 svp_cmprsd_max_bits + 14551 dvp_cmprsd_max_bits + 14552 drop_cmprsd_max_bits + 14553 ip_pkt_bits ; 14554 temp_count = offset_array[loop][0]; 14555 if (flex_attribute->combine_attr_counter[counter]. 14556 pre_ifp_color_mpls_label1_flags & BCM_STAT_FLEX_COLOR_GREEN) { 14557 /* GreenIndex=0*/ 14558 offset_array[loop][temp_count+1] = ( 14559 map_array[bcmStatGroupModeAttrColorMplsLabelFirst][0] << shift_by_bits); 14560 temp_count++; 14561 } 14562 if (flex_attribute->combine_attr_counter[counter]. 14563 pre_ifp_color_mpls_label1_flags & BCM_STAT_FLEX_COLOR_RED) { 14564 /* RedIndex=1 */ 14565 offset_array[loop][temp_count+1] = ( 14566 map_array[bcmStatGroupModeAttrColorMplsLabelFirst][1] << shift_by_bits); 14567 temp_count++; 14568 } 14569 if (flex_attribute->combine_attr_counter[counter]. 14570 pre_ifp_color_mpls_label1_flags & BCM_STAT_FLEX_COLOR_YELLOW) { 14571 /* YellowIndex=3 */ 14572 offset_array[loop][temp_count+1] = ( 14573 map_array[bcmStatGroupModeAttrColorMplsLabelFirst][3] << shift_by_bits); 14574 temp_count++; 14575 } 14576 offset_array[loop][0] = temp_count; 14577 loop++; 14578 } 14579 if (flex_attribute->phb_1 != 0) { 14580 shift_by_bits = pre_ifp_cng_cmprsd_max_bits + 14581 ifp_cng_cmprsd_max_bits + 14582 int_pri_cmprsd_max_bits + 14583 vlan_format_cmprsd_max_bits + 14584 outer_dot1p_cmprsd_max_bits + 14585 inner_dot1p_cmprsd_max_bits + 14586 port_cmprsd_max_bits + 14587 tos_dscp_cmprsd_max_bits + 14588 tos_ecn_cmprsd_max_bits + 14589 pkt_resolution_cmprsd_max_bits + 14590 svp_cmprsd_max_bits + 14591 dvp_cmprsd_max_bits + 14592 drop_cmprsd_max_bits + 14593 ip_pkt_bits ; 14594 temp_count = offset_array[loop][0]; 14595 if (flex_attribute->combine_attr_counter[counter]. 14596 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI0) { 14597 offset_array[loop][temp_count+1] = ( 14598 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][0] << 14599 shift_by_bits); 14600 temp_count++; 14601 } 14602 if (flex_attribute->combine_attr_counter[counter]. 14603 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI1) { 14604 offset_array[loop][temp_count+1] = ( 14605 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][1] << 14606 shift_by_bits); 14607 temp_count++; 14608 } 14609 if (flex_attribute->combine_attr_counter[counter]. 14610 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI2) { 14611 offset_array[loop][temp_count+1] = ( 14612 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][2] << 14613 shift_by_bits); 14614 temp_count++; 14615 } 14616 if (flex_attribute->combine_attr_counter[counter]. 14617 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI3) { 14618 offset_array[loop][temp_count+1] = ( 14619 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][3] << 14620 shift_by_bits); 14621 temp_count++; 14622 } 14623 if (flex_attribute->combine_attr_counter[counter]. 14624 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI4) { 14625 offset_array[loop][temp_count+1] = ( 14626 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][4] << 14627 shift_by_bits); 14628 temp_count++; 14629 } 14630 if (flex_attribute->combine_attr_counter[counter]. 14631 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI5) { 14632 offset_array[loop][temp_count+1] = ( 14633 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][5] << 14634 shift_by_bits); 14635 temp_count++; 14636 } 14637 if (flex_attribute->combine_attr_counter[counter]. 14638 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI6) { 14639 offset_array[loop][temp_count+1] = ( 14640 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][6] << 14641 shift_by_bits); 14642 temp_count++; 14643 } 14644 if (flex_attribute->combine_attr_counter[counter]. 14645 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI7) { 14646 offset_array[loop][temp_count+1] = ( 14647 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][7] << 14648 shift_by_bits); 14649 temp_count++; 14650 } 14651 if (flex_attribute->combine_attr_counter[counter]. 14652 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI8) { 14653 offset_array[loop][temp_count+1] = ( 14654 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][8] << 14655 shift_by_bits); 14656 temp_count++; 14657 } 14658 if (flex_attribute->combine_attr_counter[counter]. 14659 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI9) { 14660 offset_array[loop][temp_count+1] = ( 14661 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][9] << 14662 shift_by_bits); 14663 temp_count++; 14664 } 14665 if (flex_attribute->combine_attr_counter[counter]. 14666 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI10) { 14667 offset_array[loop][temp_count+1] = ( 14668 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][10] << 14669 shift_by_bits); 14670 temp_count++; 14671 } 14672 if (flex_attribute->combine_attr_counter[counter]. 14673 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI11) { 14674 offset_array[loop][temp_count+1] = ( 14675 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][11] << 14676 shift_by_bits); 14677 temp_count++; 14678 } 14679 if (flex_attribute->combine_attr_counter[counter]. 14680 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI12) { 14681 offset_array[loop][temp_count+1] = ( 14682 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][12] << 14683 shift_by_bits); 14684 temp_count++; 14685 } 14686 if (flex_attribute->combine_attr_counter[counter]. 14687 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI13) { 14688 offset_array[loop][temp_count+1] = ( 14689 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][13] << 14690 shift_by_bits); 14691 temp_count++; 14692 } 14693 if (flex_attribute->combine_attr_counter[counter]. 14694 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI14) { 14695 offset_array[loop][temp_count+1] = ( 14696 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][14] << 14697 shift_by_bits); 14698 temp_count++; 14699 } 14700 if (flex_attribute->combine_attr_counter[counter]. 14701 int_pri_mpls_label1_flags & BCM_STAT_FLEX_PRI15) { 14702 offset_array[loop][temp_count+1] = ( 14703 map_array[bcmStatGroupModeAttrIntPriMplsLabelFirst][15] << 14704 shift_by_bits); 14705 temp_count++; 14706 } 14707 offset_array[loop][0] = temp_count; 14708 loop++; 14709 } 14710 } 14711 #endif 14712 #if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TRIDENT3_SUPPORT) 14713 if (soc_feature(unit, soc_feature_flex_stat_egr_queue_congestion_marked)) { 14714 if (flex_attribute->mmu_cos != 0) { 14715 shift_by_bits = uc_queueing_cmprsd_max_bits + 14716 congestion_marked_cmprsd_max_bits + 14717 ifp_cng_cmprsd_max_bits + 14718 int_pri_cmprsd_max_bits + 14719 vlan_format_cmprsd_max_bits + 14720 outer_dot1p_cmprsd_max_bits + 14721 inner_dot1p_cmprsd_max_bits + 14722 port_cmprsd_max_bits + 14723 tos_dscp_cmprsd_max_bits + 14724 tos_ecn_cmprsd_max_bits + 14725 pkt_resolution_cmprsd_max_bits + 14726 svp_cmprsd_max_bits + 14727 dvp_cmprsd_max_bits + 14728 drop_cmprsd_max_bits + 14729 ip_pkt_bits; 14730 if (loop >= 7) { 14731 rv = BCM_E_PARAM; 14732 goto cleanup; 14733 } 14734 if (flex_attribute->combine_attr_counter[counter]. 14735 mmu_cos_flags & BCM_STAT_FLEX_COS0) { 14736 temp_count = offset_array[loop][0]; 14737 offset_array[loop][temp_count+1] = ( 14738 map_array[bcmStatGroupModeAttrCos][0] << 14739 shift_by_bits); 14740 offset_array[loop][0] = temp_count + 1; 14741 } 14742 if (flex_attribute->combine_attr_counter[counter]. 14743 mmu_cos_flags & BCM_STAT_FLEX_COS1) { 14744 temp_count = offset_array[loop][0]; 14745 offset_array[loop][temp_count+1] = ( 14746 map_array[bcmStatGroupModeAttrCos][1] << 14747 shift_by_bits); 14748 offset_array[loop][0] = temp_count + 1; 14749 } 14750 if (flex_attribute->combine_attr_counter[counter]. 14751 mmu_cos_flags & BCM_STAT_FLEX_COS2) { 14752 temp_count = offset_array[loop][0]; 14753 offset_array[loop][temp_count+1] = ( 14754 map_array[bcmStatGroupModeAttrCos][2] << 14755 shift_by_bits); 14756 offset_array[loop][0] = temp_count + 1; 14757 } 14758 if (flex_attribute->combine_attr_counter[counter]. 14759 mmu_cos_flags & BCM_STAT_FLEX_COS3) { 14760 temp_count = offset_array[loop][0]; 14761 offset_array[loop][temp_count+1] = ( 14762 map_array[bcmStatGroupModeAttrCos][3] << 14763 shift_by_bits); 14764 offset_array[loop][0] = temp_count + 1; 14765 } 14766 if (flex_attribute->combine_attr_counter[counter]. 14767 mmu_cos_flags & BCM_STAT_FLEX_COS4) { 14768 temp_count = offset_array[loop][0]; 14769 offset_array[loop][temp_count+1] = ( 14770 map_array[bcmStatGroupModeAttrCos][4] << 14771 shift_by_bits); 14772 offset_array[loop][0] = temp_count + 1; 14773 } 14774 if (flex_attribute->combine_attr_counter[counter]. 14775 mmu_cos_flags & BCM_STAT_FLEX_COS5) { 14776 temp_count = offset_array[loop][0]; 14777 offset_array[loop][temp_count+1] = ( 14778 map_array[bcmStatGroupModeAttrCos][5] << 14779 shift_by_bits); 14780 offset_array[loop][0] = temp_count + 1; 14781 } 14782 if (flex_attribute->combine_attr_counter[counter]. 14783 mmu_cos_flags & BCM_STAT_FLEX_COS6) { 14784 temp_count = offset_array[loop][0]; 14785 offset_array[loop][temp_count+1] = ( 14786 map_array[bcmStatGroupModeAttrCos][6] << 14787 shift_by_bits); 14788 offset_array[loop][0] = temp_count + 1; 14789 } 14790 if (flex_attribute->combine_attr_counter[counter]. 14791 mmu_cos_flags & BCM_STAT_FLEX_COS7) { 14792 temp_count = offset_array[loop][0]; 14793 offset_array[loop][temp_count+1] = ( 14794 map_array[bcmStatGroupModeAttrCos][7] << 14795 shift_by_bits); 14796 offset_array[loop][0] = temp_count + 1; 14797 } 14798 if (flex_attribute->combine_attr_counter[counter]. 14799 mmu_cos_flags & BCM_STAT_FLEX_COS8) { 14800 temp_count = offset_array[loop][0]; 14801 offset_array[loop][temp_count+1] = ( 14802 map_array[bcmStatGroupModeAttrCos][8] << 14803 shift_by_bits); 14804 offset_array[loop][0] = temp_count + 1; 14805 } 14806 if (flex_attribute->combine_attr_counter[counter]. 14807 mmu_cos_flags & BCM_STAT_FLEX_COS9) { 14808 temp_count = offset_array[loop][0]; 14809 offset_array[loop][temp_count+1] = ( 14810 map_array[bcmStatGroupModeAttrCos][9] << 14811 shift_by_bits); 14812 offset_array[loop][0] = temp_count + 1; 14813 } 14814 if (flex_attribute->combine_attr_counter[counter]. 14815 mmu_cos_flags & BCM_STAT_FLEX_COS10) { 14816 temp_count = offset_array[loop][0]; 14817 offset_array[loop][temp_count+1] = ( 14818 map_array[bcmStatGroupModeAttrCos][10] << 14819 shift_by_bits); 14820 offset_array[loop][0] = temp_count + 1; 14821 } 14822 if (flex_attribute->combine_attr_counter[counter]. 14823 mmu_cos_flags & BCM_STAT_FLEX_COS11) { 14824 temp_count = offset_array[loop][0]; 14825 offset_array[loop][temp_count+1] = ( 14826 map_array[bcmStatGroupModeAttrCos][11] << 14827 shift_by_bits); 14828 offset_array[loop][0] = temp_count + 1; 14829 } 14830 if (flex_attribute->combine_attr_counter[counter]. 14831 mmu_cos_flags & BCM_STAT_FLEX_COS12) { 14832 temp_count = offset_array[loop][0]; 14833 offset_array[loop][temp_count+1] = ( 14834 map_array[bcmStatGroupModeAttrCos][12] << 14835 shift_by_bits); 14836 offset_array[loop][0] = temp_count + 1; 14837 } 14838 if (flex_attribute->combine_attr_counter[counter]. 14839 mmu_cos_flags & BCM_STAT_FLEX_COS13) { 14840 temp_count = offset_array[loop][0]; 14841 offset_array[loop][temp_count+1] = ( 14842 map_array[bcmStatGroupModeAttrCos][13] << 14843 shift_by_bits); 14844 offset_array[loop][0] = temp_count + 1; 14845 } 14846 if (flex_attribute->combine_attr_counter[counter]. 14847 mmu_cos_flags & BCM_STAT_FLEX_COS14) { 14848 temp_count = offset_array[loop][0]; 14849 offset_array[loop][temp_count+1] = ( 14850 map_array[bcmStatGroupModeAttrCos][14] << 14851 shift_by_bits); 14852 offset_array[loop][0] = temp_count + 1; 14853 } 14854 if (flex_attribute->combine_attr_counter[counter]. 14855 mmu_cos_flags & BCM_STAT_FLEX_COS15) { 14856 temp_count = offset_array[loop][0]; 14857 offset_array[loop][temp_count+1] = ( 14858 map_array[bcmStatGroupModeAttrCos][15] << 14859 shift_by_bits); 14860 offset_array[loop][0] = temp_count + 1; 14861 } 14862 loop++; 14863 } 14864 if ((flex_attribute->uc_queueing != 0) && 14865 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 14866 shift_by_bits = congestion_marked_cmprsd_max_bits + 14867 ifp_cng_cmprsd_max_bits + 14868 int_pri_cmprsd_max_bits + 14869 vlan_format_cmprsd_max_bits + 14870 outer_dot1p_cmprsd_max_bits + 14871 inner_dot1p_cmprsd_max_bits + 14872 port_cmprsd_max_bits + 14873 tos_dscp_cmprsd_max_bits + 14874 tos_ecn_cmprsd_max_bits + 14875 pkt_resolution_cmprsd_max_bits + 14876 svp_cmprsd_max_bits + 14877 dvp_cmprsd_max_bits + 14878 drop_cmprsd_max_bits + 14879 ip_pkt_bits; 14880 if (flex_attribute->combine_attr_counter[counter]. 14881 uc_queueing_flags & BCM_STAT_FLEX_UC_QUEUEING_DISABLE) { 14882 temp_count = offset_array[loop][0]; 14883 offset_array[loop][temp_count+1] = ( 14884 map_array[bcmStatGroupModeAttrQueueType][0] << shift_by_bits); 14885 offset_array[loop][0] = temp_count + 1; 14886 } 14887 if (flex_attribute->combine_attr_counter[counter]. 14888 uc_queueing_flags & BCM_STAT_FLEX_UC_QUEUEING_ENABLE) { 14889 temp_count = offset_array[loop][0]; 14890 offset_array[loop][temp_count+1] = ( 14891 map_array[bcmStatGroupModeAttrQueueType][1] << shift_by_bits); 14892 offset_array[loop][0] = temp_count + 1; 14893 } 14894 loop++; 14895 } 14896 if ((flex_attribute->congestion_marked != 0) && 14897 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 14898 shift_by_bits = ifp_cng_cmprsd_max_bits + 14899 int_pri_cmprsd_max_bits + 14900 vlan_format_cmprsd_max_bits + 14901 outer_dot1p_cmprsd_max_bits + 14902 inner_dot1p_cmprsd_max_bits + 14903 port_cmprsd_max_bits + 14904 tos_dscp_cmprsd_max_bits + 14905 tos_ecn_cmprsd_max_bits + 14906 pkt_resolution_cmprsd_max_bits + 14907 svp_cmprsd_max_bits + 14908 dvp_cmprsd_max_bits + 14909 drop_cmprsd_max_bits + 14910 ip_pkt_bits; 14911 if (flex_attribute->combine_attr_counter[counter]. 14912 congestion_marked_flags & BCM_STAT_FLEX_CONGESTION_MARKED_DISABLE) { 14913 temp_count = offset_array[loop][0]; 14914 offset_array[loop][temp_count+1] = (0 << shift_by_bits); 14915 offset_array[loop][0] = temp_count + 1; 14916 } 14917 if (flex_attribute->combine_attr_counter[counter]. 14918 congestion_marked_flags & BCM_STAT_FLEX_CONGESTION_MARKED_ENABLE) { 14919 temp_count = offset_array[loop][0]; 14920 offset_array[loop][temp_count+1] = (1 << shift_by_bits); 14921 offset_array[loop][0] = temp_count + 1; 14922 } 14923 loop++; 14924 } 14925 } 14926 #endif 14927 14928 if (flex_attribute->pre_ifp_color != 0) { 14929 shift_by_bits = ifp_cng_cmprsd_max_bits + 14930 int_pri_cmprsd_max_bits + 14931 vlan_format_cmprsd_max_bits + 14932 outer_dot1p_cmprsd_max_bits + 14933 inner_dot1p_cmprsd_max_bits + 14934 port_cmprsd_max_bits + 14935 tos_dscp_cmprsd_max_bits + 14936 tos_ecn_cmprsd_max_bits + 14937 pkt_resolution_cmprsd_max_bits + 14938 svp_cmprsd_max_bits + 14939 dvp_cmprsd_max_bits + 14940 drop_cmprsd_max_bits + 14941 ip_pkt_bits ; 14942 if (flex_attribute->combine_attr_counter[counter]. 14943 pre_ifp_color_flags & BCM_STAT_FLEX_COLOR_GREEN) { 14944 temp_count = offset_array[loop][0]; 14945 /* GreenIndex=0*/ 14946 offset_array[loop][temp_count+1] = ( 14947 map_array[bcmStatGroupModeAttrColor][0] << shift_by_bits); 14948 offset_array[loop][0] = temp_count+1; 14949 } 14950 if (flex_attribute->combine_attr_counter[counter]. 14951 pre_ifp_color_flags & BCM_STAT_FLEX_COLOR_RED) { 14952 temp_count = offset_array[loop][0]; 14953 /* RedIndex=1 */ 14954 offset_array[loop][temp_count+1]= ( 14955 map_array[bcmStatGroupModeAttrColor][1] << shift_by_bits); 14956 offset_array[loop][0] = temp_count+1; 14957 } 14958 if (flex_attribute->combine_attr_counter[counter]. 14959 pre_ifp_color_flags & BCM_STAT_FLEX_COLOR_YELLOW) { 14960 temp_count = offset_array[loop][0]; 14961 /* YellowIndex=3 */ 14962 offset_array[loop][temp_count+1]= ( 14963 map_array[bcmStatGroupModeAttrColor][3] << shift_by_bits); 14964 offset_array[loop][0] = temp_count+1; 14965 } 14966 loop++; 14967 } 14968 if (flex_attribute->ifp_color != 0) { 14969 shift_by_bits = int_pri_cmprsd_max_bits + 14970 vlan_format_cmprsd_max_bits + 14971 outer_dot1p_cmprsd_max_bits + 14972 inner_dot1p_cmprsd_max_bits + 14973 port_cmprsd_max_bits + 14974 tos_dscp_cmprsd_max_bits + 14975 tos_ecn_cmprsd_max_bits + 14976 pkt_resolution_cmprsd_max_bits + 14977 svp_cmprsd_max_bits + 14978 dvp_cmprsd_max_bits + 14979 drop_cmprsd_max_bits + 14980 ip_pkt_bits ; 14981 if (flex_attribute->combine_attr_counter[counter]. 14982 ifp_color_flags & BCM_STAT_FLEX_COLOR_GREEN) { 14983 temp_count = offset_array[loop][0]; 14984 /* GreenIndex=0*/ 14985 offset_array[loop][temp_count+1] = ( 14986 map_array[bcmStatGroupModeAttrFieldIngressColor][0] << 14987 shift_by_bits); 14988 offset_array[loop][0] = temp_count+1; 14989 } 14990 if (flex_attribute->combine_attr_counter[counter]. 14991 ifp_color_flags & BCM_STAT_FLEX_COLOR_RED) { 14992 temp_count = offset_array[loop][0]; 14993 /* RedIndex=1 */ 14994 offset_array[loop][temp_count+1]= ( 14995 map_array[bcmStatGroupModeAttrFieldIngressColor][1] << 14996 shift_by_bits); 14997 offset_array[loop][0] = temp_count+1; 14998 } 14999 if (flex_attribute->combine_attr_counter[counter]. 15000 ifp_color_flags & BCM_STAT_FLEX_COLOR_YELLOW) { 15001 temp_count = offset_array[loop][0]; 15002 /* YellowIndex=3 */ 15003 offset_array[loop][temp_count+1]= ( 15004 map_array[bcmStatGroupModeAttrFieldIngressColor][3] << 15005 shift_by_bits); 15006 offset_array[loop][0] = temp_count+1; 15007 } 15008 loop++; 15009 } 15010 if (flex_attribute->int_pri != 0) { 15011 shift_by_bits = vlan_format_cmprsd_max_bits + 15012 outer_dot1p_cmprsd_max_bits + 15013 inner_dot1p_cmprsd_max_bits + 15014 port_cmprsd_max_bits + 15015 tos_dscp_cmprsd_max_bits + 15016 tos_ecn_cmprsd_max_bits + 15017 pkt_resolution_cmprsd_max_bits + 15018 svp_cmprsd_max_bits + 15019 dvp_cmprsd_max_bits + 15020 drop_cmprsd_max_bits + 15021 ip_pkt_bits ; 15022 /* 15023 * Although logically the value of loop is safeguarded before 15024 * hitting this logic but for coverity static analysis adding 15025 * a fail-safe condition. 15026 */ 15027 if (loop >= 8) { 15028 rv = BCM_E_PARAM; 15029 goto cleanup; 15030 } 15031 if (flex_attribute->combine_attr_counter[counter]. 15032 int_pri_flags & BCM_STAT_FLEX_PRI0) { 15033 temp_count = offset_array[loop][0]; 15034 offset_array[loop][temp_count+1]= ( 15035 map_array[bcmStatGroupModeAttrIntPri][0] << 15036 shift_by_bits); 15037 offset_array[loop][0] = temp_count+1; 15038 } 15039 if (flex_attribute->combine_attr_counter[counter]. 15040 int_pri_flags & BCM_STAT_FLEX_PRI1) { 15041 temp_count = offset_array[loop][0]; 15042 offset_array[loop][temp_count+1]= ( 15043 map_array[bcmStatGroupModeAttrIntPri][1] << 15044 shift_by_bits); 15045 offset_array[loop][0] = temp_count+1; 15046 } 15047 if (flex_attribute->combine_attr_counter[counter]. 15048 int_pri_flags & BCM_STAT_FLEX_PRI2) { 15049 temp_count = offset_array[loop][0]; 15050 offset_array[loop][temp_count+1]= ( 15051 map_array[bcmStatGroupModeAttrIntPri][2] << 15052 shift_by_bits); 15053 offset_array[loop][0] = temp_count+1; 15054 } 15055 if (flex_attribute->combine_attr_counter[counter]. 15056 int_pri_flags & BCM_STAT_FLEX_PRI3) { 15057 temp_count = offset_array[loop][0]; 15058 offset_array[loop][temp_count+1]= ( 15059 map_array[bcmStatGroupModeAttrIntPri][3] << 15060 shift_by_bits); 15061 offset_array[loop][0] = temp_count+1; 15062 } 15063 if (flex_attribute->combine_attr_counter[counter]. 15064 int_pri_flags & BCM_STAT_FLEX_PRI4) { 15065 temp_count = offset_array[loop][0]; 15066 offset_array[loop][temp_count+1]= ( 15067 map_array[bcmStatGroupModeAttrIntPri][4] << 15068 shift_by_bits); 15069 offset_array[loop][0] = temp_count+1; 15070 } 15071 if (flex_attribute->combine_attr_counter[counter]. 15072 int_pri_flags & BCM_STAT_FLEX_PRI5) { 15073 temp_count = offset_array[loop][0]; 15074 offset_array[loop][temp_count+1]= ( 15075 map_array[bcmStatGroupModeAttrIntPri][5] << 15076 shift_by_bits); 15077 offset_array[loop][0] = temp_count+1; 15078 } 15079 if (flex_attribute->combine_attr_counter[counter]. 15080 int_pri_flags & BCM_STAT_FLEX_PRI6) { 15081 temp_count = offset_array[loop][0]; 15082 offset_array[loop][temp_count+1]= ( 15083 map_array[bcmStatGroupModeAttrIntPri][6] << 15084 shift_by_bits); 15085 offset_array[loop][0] = temp_count+1; 15086 } 15087 if (flex_attribute->combine_attr_counter[counter]. 15088 int_pri_flags & BCM_STAT_FLEX_PRI7) { 15089 temp_count = offset_array[loop][0]; 15090 offset_array[loop][temp_count+1]= ( 15091 map_array[bcmStatGroupModeAttrIntPri][7] << 15092 shift_by_bits); 15093 offset_array[loop][0] = temp_count+1; 15094 } 15095 if (flex_attribute->combine_attr_counter[counter]. 15096 int_pri_flags & BCM_STAT_FLEX_PRI8) { 15097 temp_count = offset_array[loop][0]; 15098 offset_array[loop][temp_count+1]= ( 15099 map_array[bcmStatGroupModeAttrIntPri][8] << 15100 shift_by_bits); 15101 offset_array[loop][0] = temp_count+1; 15102 } 15103 if (flex_attribute->combine_attr_counter[counter]. 15104 int_pri_flags & BCM_STAT_FLEX_PRI9) { 15105 temp_count = offset_array[loop][0]; 15106 offset_array[loop][temp_count+1]= ( 15107 map_array[bcmStatGroupModeAttrIntPri][9] << 15108 shift_by_bits); 15109 offset_array[loop][0] = temp_count+1; 15110 } 15111 if (flex_attribute->combine_attr_counter[counter]. 15112 int_pri_flags & BCM_STAT_FLEX_PRI10) { 15113 temp_count = offset_array[loop][0]; 15114 offset_array[loop][temp_count+1]= ( 15115 map_array[bcmStatGroupModeAttrIntPri][10] << 15116 shift_by_bits); 15117 offset_array[loop][0] = temp_count+1; 15118 } 15119 if (flex_attribute->combine_attr_counter[counter]. 15120 int_pri_flags & BCM_STAT_FLEX_PRI11) { 15121 temp_count = offset_array[loop][0]; 15122 offset_array[loop][temp_count+1]= ( 15123 map_array[bcmStatGroupModeAttrIntPri][11] << 15124 shift_by_bits); 15125 offset_array[loop][0] = temp_count+1; 15126 } 15127 if (flex_attribute->combine_attr_counter[counter]. 15128 int_pri_flags & BCM_STAT_FLEX_PRI12) { 15129 temp_count = offset_array[loop][0]; 15130 offset_array[loop][temp_count+1]= ( 15131 map_array[bcmStatGroupModeAttrIntPri][12] << 15132 shift_by_bits); 15133 offset_array[loop][0] = temp_count+1; 15134 } 15135 if (flex_attribute->combine_attr_counter[counter]. 15136 int_pri_flags & BCM_STAT_FLEX_PRI13) { 15137 temp_count = offset_array[loop][0]; 15138 offset_array[loop][temp_count+1]= ( 15139 map_array[bcmStatGroupModeAttrIntPri][13] << 15140 shift_by_bits); 15141 offset_array[loop][0] = temp_count+1; 15142 } 15143 if (flex_attribute->combine_attr_counter[counter]. 15144 int_pri_flags & BCM_STAT_FLEX_PRI14) { 15145 temp_count = offset_array[loop][0]; 15146 offset_array[loop][temp_count+1]= ( 15147 map_array[bcmStatGroupModeAttrIntPri][14] << 15148 shift_by_bits); 15149 offset_array[loop][0] = temp_count+1; 15150 } 15151 if (flex_attribute->combine_attr_counter[counter]. 15152 int_pri_flags & BCM_STAT_FLEX_PRI15) { 15153 temp_count = offset_array[loop][0]; 15154 offset_array[loop][temp_count+1]= ( 15155 map_array[bcmStatGroupModeAttrIntPri][15] << 15156 shift_by_bits); 15157 offset_array[loop][0] = temp_count+1; 15158 } 15159 loop++; 15160 } 15161 /* LogicalGroup1 */ 15162 if (flex_attribute->vlan_format != 0) { 15163 shift_by_bits = outer_dot1p_cmprsd_max_bits + 15164 inner_dot1p_cmprsd_max_bits + 15165 port_cmprsd_max_bits + 15166 tos_dscp_cmprsd_max_bits + 15167 tos_ecn_cmprsd_max_bits + 15168 pkt_resolution_cmprsd_max_bits + 15169 svp_cmprsd_max_bits + 15170 dvp_cmprsd_max_bits + 15171 drop_cmprsd_max_bits + 15172 ip_pkt_bits ; 15173 if (loop >= 8) { 15174 rv = BCM_E_PARAM; 15175 goto cleanup; 15176 } 15177 if (flex_attribute->combine_attr_counter[counter]. 15178 vlan_format_flags & BCM_STAT_FLEX_VLAN_FORMAT_UNTAGGED) { 15179 temp_count = offset_array[loop][0]; 15180 offset_array[loop][temp_count+1]= ( 15181 map_array[bcmStatGroupModeAttrVlan][0] << 15182 shift_by_bits); 15183 offset_array[loop][0] = temp_count+1; 15184 } 15185 if (flex_attribute->combine_attr_counter[counter]. 15186 vlan_format_flags & BCM_STAT_FLEX_VLAN_FORMAT_INNER) { 15187 temp_count = offset_array[loop][0]; 15188 offset_array[loop][temp_count+1]= ( 15189 map_array[bcmStatGroupModeAttrVlan][1] << 15190 shift_by_bits); 15191 offset_array[loop][0] = temp_count+1; 15192 } 15193 if (flex_attribute->combine_attr_counter[counter]. 15194 vlan_format_flags & BCM_STAT_FLEX_VLAN_FORMAT_OUTER) { 15195 temp_count = offset_array[loop][0]; 15196 offset_array[loop][temp_count+1]= ( 15197 map_array[bcmStatGroupModeAttrVlan][2] << 15198 shift_by_bits); 15199 offset_array[loop][0] = temp_count+1; 15200 } 15201 if (flex_attribute->combine_attr_counter[counter]. 15202 vlan_format_flags & BCM_STAT_FLEX_VLAN_FORMAT_BOTH) { 15203 temp_count = offset_array[loop][0]; 15204 offset_array[loop][temp_count+1]= ( 15205 map_array[bcmStatGroupModeAttrVlan][3] << 15206 shift_by_bits); 15207 offset_array[loop][0] = temp_count+1; 15208 } 15209 loop++; 15210 } 15211 if (flex_attribute->outer_dot1p != 0) { 15212 shift_by_bits = inner_dot1p_cmprsd_max_bits + 15213 port_cmprsd_max_bits + 15214 tos_dscp_cmprsd_max_bits + 15215 tos_ecn_cmprsd_max_bits + 15216 pkt_resolution_cmprsd_max_bits + 15217 svp_cmprsd_max_bits + 15218 dvp_cmprsd_max_bits + 15219 drop_cmprsd_max_bits + 15220 ip_pkt_bits ; 15221 if (loop >= 8) { 15222 rv = BCM_E_PARAM; 15223 goto cleanup; 15224 } 15225 if (flex_attribute->combine_attr_counter[counter]. 15226 outer_dot1p_flags & BCM_STAT_FLEX_PRI0) { 15227 temp_count = offset_array[loop][0]; 15228 offset_array[loop][temp_count+1]= ( 15229 map_array[bcmStatGroupModeAttrOuterPri][0] << 15230 shift_by_bits); 15231 offset_array[loop][0] = temp_count+1; 15232 } 15233 if (flex_attribute->combine_attr_counter[counter]. 15234 outer_dot1p_flags & BCM_STAT_FLEX_PRI1) { 15235 temp_count = offset_array[loop][0]; 15236 offset_array[loop][temp_count+1]= ( 15237 map_array[bcmStatGroupModeAttrOuterPri][1] << 15238 shift_by_bits); 15239 offset_array[loop][0] = temp_count+1; 15240 } 15241 if (flex_attribute->combine_attr_counter[counter]. 15242 outer_dot1p_flags & BCM_STAT_FLEX_PRI2) { 15243 temp_count = offset_array[loop][0]; 15244 offset_array[loop][temp_count+1]= ( 15245 map_array[bcmStatGroupModeAttrOuterPri][2] << 15246 shift_by_bits); 15247 offset_array[loop][0] = temp_count+1; 15248 } 15249 if (flex_attribute->combine_attr_counter[counter]. 15250 outer_dot1p_flags & BCM_STAT_FLEX_PRI3) { 15251 temp_count = offset_array[loop][0]; 15252 offset_array[loop][temp_count+1]= ( 15253 map_array[bcmStatGroupModeAttrOuterPri][3] << 15254 shift_by_bits); 15255 offset_array[loop][0] = temp_count+1; 15256 } 15257 if (flex_attribute->combine_attr_counter[counter]. 15258 outer_dot1p_flags & BCM_STAT_FLEX_PRI4) { 15259 temp_count = offset_array[loop][0]; 15260 offset_array[loop][temp_count+1]= ( 15261 map_array[bcmStatGroupModeAttrOuterPri][4] << 15262 shift_by_bits); 15263 offset_array[loop][0] = temp_count+1; 15264 } 15265 if (flex_attribute->combine_attr_counter[counter]. 15266 outer_dot1p_flags & BCM_STAT_FLEX_PRI5) { 15267 temp_count = offset_array[loop][0]; 15268 offset_array[loop][temp_count+1]= ( 15269 map_array[bcmStatGroupModeAttrOuterPri][5] << 15270 shift_by_bits); 15271 offset_array[loop][0] = temp_count+1; 15272 } 15273 if (flex_attribute->combine_attr_counter[counter]. 15274 outer_dot1p_flags & BCM_STAT_FLEX_PRI6) { 15275 temp_count = offset_array[loop][0]; 15276 offset_array[loop][temp_count+1]= ( 15277 map_array[bcmStatGroupModeAttrOuterPri][6] << 15278 shift_by_bits); 15279 offset_array[loop][0] = temp_count+1; 15280 } 15281 if (flex_attribute->combine_attr_counter[counter]. 15282 outer_dot1p_flags & BCM_STAT_FLEX_PRI7) { 15283 temp_count = offset_array[loop][0]; 15284 offset_array[loop][temp_count+1]= ( 15285 map_array[bcmStatGroupModeAttrOuterPri][7] << 15286 shift_by_bits); 15287 offset_array[loop][0] = temp_count+1; 15288 } 15289 loop++; 15290 } 15291 if (flex_attribute->inner_dot1p != 0) { 15292 shift_by_bits = port_cmprsd_max_bits + 15293 tos_dscp_cmprsd_max_bits + 15294 tos_ecn_cmprsd_max_bits + 15295 pkt_resolution_cmprsd_max_bits + 15296 svp_cmprsd_max_bits + 15297 dvp_cmprsd_max_bits + 15298 drop_cmprsd_max_bits + 15299 ip_pkt_bits ; 15300 if (loop >= 8) { 15301 rv = BCM_E_PARAM; 15302 goto cleanup; 15303 } 15304 if (flex_attribute->combine_attr_counter[counter]. 15305 inner_dot1p_flags & BCM_STAT_FLEX_PRI0) { 15306 temp_count = offset_array[loop][0]; 15307 offset_array[loop][temp_count+1]= ( 15308 map_array[bcmStatGroupModeAttrInnerPri][0] << 15309 shift_by_bits); 15310 offset_array[loop][0] = temp_count+1; 15311 } 15312 if (flex_attribute->combine_attr_counter[counter]. 15313 inner_dot1p_flags & BCM_STAT_FLEX_PRI1) { 15314 temp_count = offset_array[loop][0]; 15315 offset_array[loop][temp_count+1]= ( 15316 map_array[bcmStatGroupModeAttrInnerPri][1] << 15317 shift_by_bits); 15318 offset_array[loop][0] = temp_count+1; 15319 } 15320 if (flex_attribute->combine_attr_counter[counter]. 15321 inner_dot1p_flags & BCM_STAT_FLEX_PRI2) { 15322 temp_count = offset_array[loop][0]; 15323 offset_array[loop][temp_count+1]= ( 15324 map_array[bcmStatGroupModeAttrInnerPri][2] << 15325 shift_by_bits); 15326 offset_array[loop][0] = temp_count+1; 15327 } 15328 if (flex_attribute->combine_attr_counter[counter]. 15329 inner_dot1p_flags & BCM_STAT_FLEX_PRI3) { 15330 temp_count = offset_array[loop][0]; 15331 offset_array[loop][temp_count+1]= ( 15332 map_array[bcmStatGroupModeAttrInnerPri][3] << 15333 shift_by_bits); 15334 offset_array[loop][0] = temp_count+1; 15335 } 15336 if (flex_attribute->combine_attr_counter[counter]. 15337 inner_dot1p_flags & BCM_STAT_FLEX_PRI4) { 15338 temp_count = offset_array[loop][0]; 15339 offset_array[loop][temp_count+1]= ( 15340 map_array[bcmStatGroupModeAttrInnerPri][4] << 15341 shift_by_bits); 15342 offset_array[loop][0] = temp_count+1; 15343 } 15344 if (flex_attribute->combine_attr_counter[counter]. 15345 inner_dot1p_flags & BCM_STAT_FLEX_PRI5) { 15346 temp_count = offset_array[loop][0]; 15347 offset_array[loop][temp_count+1]= ( 15348 map_array[bcmStatGroupModeAttrInnerPri][5] << 15349 shift_by_bits); 15350 offset_array[loop][0] = temp_count+1; 15351 } 15352 if (flex_attribute->combine_attr_counter[counter]. 15353 inner_dot1p_flags & BCM_STAT_FLEX_PRI6) { 15354 temp_count = offset_array[loop][0]; 15355 offset_array[loop][temp_count+1]= ( 15356 map_array[bcmStatGroupModeAttrInnerPri][6] << 15357 shift_by_bits); 15358 offset_array[loop][0] = temp_count+1; 15359 } 15360 if (flex_attribute->combine_attr_counter[counter]. 15361 inner_dot1p_flags & BCM_STAT_FLEX_PRI7) { 15362 temp_count = offset_array[loop][0]; 15363 offset_array[loop][temp_count+1]= ( 15364 map_array[bcmStatGroupModeAttrInnerPri][7] << 15365 shift_by_bits); 15366 offset_array[loop][0] = temp_count+1; 15367 } 15368 loop++; 15369 } 15370 /* LogicalGroup2 */ 15371 if (flex_attribute->port != 0) { 15372 shift_by_bits = tos_dscp_cmprsd_max_bits + 15373 tos_ecn_cmprsd_max_bits + 15374 pkt_resolution_cmprsd_max_bits + 15375 svp_cmprsd_max_bits + 15376 dvp_cmprsd_max_bits + 15377 drop_cmprsd_max_bits + 15378 ip_pkt_bits ; 15379 if (loop >= 8) { 15380 rv = BCM_E_PARAM; 15381 goto cleanup; 15382 } 15383 if (direction == bcmStatFlexDirectionIngress) { 15384 max_count= (1 << ing_pkt_attr_cmprsd_bits_g[unit].ing_port) - 1; 15385 } else { 15386 max_count= (1 << egr_pkt_attr_cmprsd_bits_g[unit].egr_port) - 1; 15387 } 15388 for (loop_index=0; loop_index <= max_count ; loop_index++) { 15389 if (BCM_STAT_FLEX_VALUE_GET( 15390 flex_attribute->combine_attr_counter[counter]. 15391 value_array[bcmStatFlexAttrPort],loop_index)) { 15392 temp_count = offset_array[loop][0]; 15393 offset_array[loop][temp_count+1]= ( 15394 map_array[bcmStatGroupModeAttrPort][loop_index] << 15395 shift_by_bits); 15396 offset_array[loop][0] = temp_count+1; 15397 } 15398 } 15399 loop++; 15400 } 15401 /* LogicalGroup3 */ 15402 if ((flex_attribute->tos_dscp != 0) && 15403 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 15404 shift_by_bits = tos_ecn_cmprsd_max_bits + 15405 pkt_resolution_cmprsd_max_bits + 15406 svp_cmprsd_max_bits + 15407 dvp_cmprsd_max_bits + 15408 drop_cmprsd_max_bits + 15409 ip_pkt_bits ; 15410 if (direction == bcmStatFlexDirectionIngress) { 15411 max_count= (1 << ing_pkt_attr_cmprsd_bits_g[unit].tos_dscp) - 1; 15412 } else { 15413 max_count= (1 << egr_pkt_attr_cmprsd_bits_g[unit].tos_dscp) - 1; 15414 } 15415 for (loop_index=0; loop_index <= max_count ; loop_index++) { 15416 if (BCM_STAT_FLEX_VALUE_GET( 15417 flex_attribute->combine_attr_counter[counter]. 15418 value_array[bcmStatFlexAttrTosDscp],loop_index)) { 15419 temp_count = offset_array[loop][0]; 15420 offset_array[loop][temp_count+1]= ( 15421 map_array[bcmStatGroupModeAttrTosDscp][loop_index] << 15422 shift_by_bits); 15423 offset_array[loop][0] = temp_count+1; 15424 } 15425 } 15426 loop++; 15427 } 15428 if ((flex_attribute->tos_ecn != 0) && 15429 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 15430 shift_by_bits = pkt_resolution_cmprsd_max_bits + 15431 svp_cmprsd_max_bits + 15432 dvp_cmprsd_max_bits + 15433 drop_cmprsd_max_bits + 15434 ip_pkt_bits ; 15435 if (direction == bcmStatFlexDirectionIngress) { 15436 max_count= (1 << ing_pkt_attr_cmprsd_bits_g[unit].tos_ecn) - 1; 15437 } else { 15438 max_count= (1 << egr_pkt_attr_cmprsd_bits_g[unit].tos_ecn) - 1; 15439 } 15440 for (loop_index=0; loop_index <= max_count ; loop_index++) { 15441 if (BCM_STAT_FLEX_VALUE_GET( 15442 flex_attribute->combine_attr_counter[counter]. 15443 value_array[bcmStatFlexAttrTosEcn],loop_index)) { 15444 temp_count = offset_array[loop][0]; 15445 offset_array[loop][temp_count+1]= ( 15446 map_array[bcmStatGroupModeAttrTosEcn][loop_index] << 15447 shift_by_bits); 15448 offset_array[loop][0] = temp_count+1; 15449 } 15450 } 15451 loop++; 15452 } 15453 /* LogicalGroup4 */ 15454 if ((flex_attribute->pkt_resolution != 0) && 15455 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 15456 #ifdef BCM_KATANA2_SUPPORT 15457 if soc_feature(unit, soc_feature_flex_stat_attributes_class) { 15458 shift_by_bits = svp_cmprsd_max_bits + 15459 dvp_cmprsd_max_bits + 15460 drop_cmprsd_max_bits + 15461 ip_pkt_bits ; 15462 if (flex_attribute->combine_attr_counter[counter]. 15463 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_PKT) { 15464 temp_count = offset_array[loop][0]; 15465 offset_array[loop][temp_count+1]= ( 15466 map_array[bcmStatGroupModeAttrClassType][unknown_pkt] << 15467 shift_by_bits); 15468 offset_array[loop][0] = temp_count+1; 15469 } 15470 if (flex_attribute->combine_attr_counter[counter]. 15471 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_CONTROL_PKT) { 15472 temp_count = offset_array[loop][0]; 15473 offset_array[loop][temp_count+1]= ( 15474 map_array[bcmStatGroupModeAttrClassType][control_pkt] << 15475 shift_by_bits); 15476 offset_array[loop][0] = temp_count+1; 15477 } 15478 if (flex_attribute->combine_attr_counter[counter]. 15479 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_OAM_PKT) { 15480 temp_count = offset_array[loop][0]; 15481 offset_array[loop][temp_count+1]= ( 15482 map_array[bcmStatGroupModeAttrClassType][oam_pkt] << 15483 shift_by_bits); 15484 offset_array[loop][0] = temp_count+1; 15485 } 15486 if (flex_attribute->combine_attr_counter[counter]. 15487 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_BFD_PKT) { 15488 temp_count = offset_array[loop][0]; 15489 offset_array[loop][temp_count+1]= ( 15490 map_array[bcmStatGroupModeAttrClassType][bfd_pkt] << 15491 shift_by_bits); 15492 offset_array[loop][0] = temp_count+1; 15493 } 15494 if (flex_attribute->combine_attr_counter[counter]. 15495 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_BPDU_PKT) { 15496 temp_count = offset_array[loop][0]; 15497 offset_array[loop][temp_count+1]= ( 15498 map_array[bcmStatGroupModeAttrClassType][bpdu_pkt] << 15499 shift_by_bits); 15500 offset_array[loop][0] = temp_count+1; 15501 } 15502 if (flex_attribute->combine_attr_counter[counter]. 15503 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_ICNM_PKT) { 15504 temp_count = offset_array[loop][0]; 15505 offset_array[loop][temp_count+1]= ( 15506 map_array[bcmStatGroupModeAttrClassType][icnm_pkt] << 15507 shift_by_bits); 15508 offset_array[loop][0] = temp_count+1; 15509 } 15510 if (flex_attribute->combine_attr_counter[counter]. 15511 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_PKT_IS_1588) { 15512 temp_count = offset_array[loop][0]; 15513 offset_array[loop][temp_count+1]= ( 15514 map_array[bcmStatGroupModeAttrClassType][_1588_pkt] << 15515 shift_by_bits); 15516 offset_array[loop][0] = temp_count+1; 15517 } 15518 if (flex_attribute->combine_attr_counter[counter]. 15519 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_BFD_PKT) { 15520 temp_count = offset_array[loop][0]; 15521 offset_array[loop][temp_count+1]= ( 15522 map_array[bcmStatGroupModeAttrClassType][bfd_pkt] << 15523 shift_by_bits); 15524 offset_array[loop][0] = temp_count+1; 15525 } 15526 if (flex_attribute->combine_attr_counter[counter]. 15527 pkt_resolution_flags & 15528 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2UC_PKT) { 15529 temp_count = offset_array[loop][0]; 15530 offset_array[loop][temp_count+1]= ( 15531 map_array[bcmStatGroupModeAttrClassType][known_l2uc_pkt] << 15532 shift_by_bits); 15533 offset_array[loop][0] = temp_count+1; 15534 } 15535 if (flex_attribute->combine_attr_counter[counter]. 15536 pkt_resolution_flags & 15537 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L2UC_PKT) { 15538 temp_count = offset_array[loop][0]; 15539 offset_array[loop][temp_count+1]= ( 15540 map_array[bcmStatGroupModeAttrClassType][unknown_l2uc_pkt] << 15541 shift_by_bits); 15542 offset_array[loop][0] = temp_count+1; 15543 } 15544 if (flex_attribute->combine_attr_counter[counter]. 15545 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_L2BC_PKT) { 15546 temp_count = offset_array[loop][0]; 15547 offset_array[loop][temp_count+1]= ( 15548 map_array[bcmStatGroupModeAttrClassType][l2bc_pkt] << 15549 shift_by_bits); 15550 offset_array[loop][0] = temp_count+1; 15551 } 15552 if (flex_attribute->combine_attr_counter[counter]. 15553 pkt_resolution_flags & 15554 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2MC_PKT) { 15555 temp_count = offset_array[loop][0]; 15556 offset_array[loop][temp_count+1]= ( 15557 map_array[bcmStatGroupModeAttrClassType][known_l2mc_pkt] << 15558 shift_by_bits); 15559 offset_array[loop][0] = temp_count+1; 15560 } 15561 if (flex_attribute->combine_attr_counter[counter]. 15562 pkt_resolution_flags & 15563 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L2MC_PKT) { 15564 temp_count = offset_array[loop][0]; 15565 offset_array[loop][temp_count+1]= ( 15566 map_array[bcmStatGroupModeAttrClassType][unknown_l2mc_pkt] << 15567 shift_by_bits); 15568 offset_array[loop][0] = temp_count+1; 15569 } 15570 if (flex_attribute->combine_attr_counter[counter]. 15571 pkt_resolution_flags & 15572 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L3UC_PKT) { 15573 temp_count = offset_array[loop][0]; 15574 offset_array[loop][temp_count+1]= ( 15575 map_array[bcmStatGroupModeAttrClassType][known_l3uc_pkt] << 15576 shift_by_bits); 15577 offset_array[loop][0] = temp_count+1; 15578 } 15579 if (flex_attribute->combine_attr_counter[counter]. 15580 pkt_resolution_flags & 15581 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L3UC_PKT) { 15582 temp_count = offset_array[loop][0]; 15583 offset_array[loop][temp_count+1]= ( 15584 map_array[bcmStatGroupModeAttrClassType][unknown_l3uc_pkt] << 15585 shift_by_bits); 15586 offset_array[loop][0] = temp_count+1; 15587 } 15588 if (flex_attribute->combine_attr_counter[counter]. 15589 pkt_resolution_flags & 15590 BCM_STAT_FLEX_PKT_TYPE_KNOWN_IPMC_PKT) { 15591 temp_count = offset_array[loop][0]; 15592 offset_array[loop][temp_count+1]= ( 15593 map_array[bcmStatGroupModeAttrClassType][known_ipmc_pkt] << 15594 shift_by_bits); 15595 offset_array[loop][0] = temp_count+1; 15596 } 15597 if (flex_attribute->combine_attr_counter[counter]. 15598 pkt_resolution_flags & 15599 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_IPMC_PKT) { 15600 temp_count = offset_array[loop][0]; 15601 offset_array[loop][temp_count+1]= ( 15602 map_array[bcmStatGroupModeAttrClassType][unknown_ipmc_pkt] << 15603 shift_by_bits); 15604 offset_array[loop][0] = temp_count+1; 15605 } 15606 if (flex_attribute->combine_attr_counter[counter]. 15607 pkt_resolution_flags & 15608 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_L2_PKT) { 15609 temp_count = offset_array[loop][0]; 15610 offset_array[loop][temp_count+1]= ( 15611 map_array[bcmStatGroupModeAttrClassType][known_mpls_l2_pkt] << 15612 shift_by_bits); 15613 offset_array[loop][0] = temp_count+1; 15614 } 15615 if (flex_attribute->combine_attr_counter[counter]. 15616 pkt_resolution_flags & 15617 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_L3_PKT) { 15618 temp_count = offset_array[loop][0]; 15619 offset_array[loop][temp_count+1]= ( 15620 map_array[bcmStatGroupModeAttrClassType][known_mpls_l3_pkt] << 15621 shift_by_bits); 15622 offset_array[loop][0] = temp_count+1; 15623 } 15624 if (flex_attribute->combine_attr_counter[counter]. 15625 pkt_resolution_flags & 15626 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_PKT) { 15627 temp_count = offset_array[loop][0]; 15628 offset_array[loop][temp_count+1]= ( 15629 map_array[bcmStatGroupModeAttrClassType][known_mpls_pkt] << 15630 shift_by_bits); 15631 offset_array[loop][0] = temp_count+1; 15632 } 15633 if (flex_attribute->combine_attr_counter[counter]. 15634 pkt_resolution_flags & 15635 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_MPLS_PKT) { 15636 temp_count = offset_array[loop][0]; 15637 offset_array[loop][temp_count+1]= ( 15638 map_array[bcmStatGroupModeAttrClassType][unknown_mpls_pkt] << 15639 shift_by_bits); 15640 offset_array[loop][0] = temp_count+1; 15641 } 15642 if (flex_attribute->combine_attr_counter[counter]. 15643 pkt_resolution_flags & 15644 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_MULTICAST_PKT) { 15645 temp_count = offset_array[loop][0]; 15646 offset_array[loop][temp_count+1]= ( 15647 map_array[bcmStatGroupModeAttrClassType][known_mpls_multicast_pkt] << 15648 shift_by_bits); 15649 offset_array[loop][0] = temp_count+1; 15650 } 15651 if (flex_attribute->combine_attr_counter[counter]. 15652 pkt_resolution_flags & 15653 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MIM_PKT) { 15654 temp_count = offset_array[loop][0]; 15655 offset_array[loop][temp_count+1]= ( 15656 map_array[bcmStatGroupModeAttrClassType][known_mim_pkt] << 15657 shift_by_bits); 15658 offset_array[loop][0] = temp_count+1; 15659 } 15660 if (flex_attribute->combine_attr_counter[counter]. 15661 pkt_resolution_flags & 15662 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_MIM_PKT) { 15663 temp_count = offset_array[loop][0]; 15664 offset_array[loop][temp_count+1]= ( 15665 map_array[bcmStatGroupModeAttrClassType][unknown_mim_pkt] << 15666 shift_by_bits); 15667 offset_array[loop][0] = temp_count+1; 15668 } 15669 if (flex_attribute->combine_attr_counter[counter]. 15670 pkt_resolution_flags & 15671 BCM_STAT_FLEX_PKT_TYPE_KNOWN_TRILL_PKT) { 15672 temp_count = offset_array[loop][0]; 15673 offset_array[loop][temp_count+1]= ( 15674 map_array[bcmStatGroupModeAttrClassType][known_trill_pkt] << 15675 shift_by_bits); 15676 offset_array[loop][0] = temp_count+1; 15677 } 15678 if (flex_attribute->combine_attr_counter[counter]. 15679 pkt_resolution_flags & 15680 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_TRILL_PKT) { 15681 temp_count = offset_array[loop][0]; 15682 offset_array[loop][temp_count+1]= ( 15683 map_array[bcmStatGroupModeAttrClassType][unknown_trill_pkt] << 15684 shift_by_bits); 15685 offset_array[loop][0] = temp_count+1; 15686 } 15687 if (flex_attribute->combine_attr_counter[counter]. 15688 pkt_resolution_flags & 15689 BCM_STAT_FLEX_PKT_TYPE_KNOWN_NIV_PKT) { 15690 temp_count = offset_array[loop][0]; 15691 offset_array[loop][temp_count+1]= ( 15692 map_array[bcmStatGroupModeAttrClassType][known_niv_pkt]<< 15693 shift_by_bits); 15694 offset_array[loop][0] = temp_count+1; 15695 } 15696 if (flex_attribute->combine_attr_counter[counter]. 15697 pkt_resolution_flags & 15698 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_NIV_PKT) { 15699 temp_count = offset_array[loop][0]; 15700 offset_array[loop][temp_count+1]= ( 15701 map_array[bcmStatGroupModeAttrClassType][unknown_niv_pkt] << 15702 shift_by_bits); 15703 offset_array[loop][0] = temp_count+1; 15704 } 15705 loop++; 15706 } else 15707 #endif 15708 { 15709 shift_by_bits = svp_cmprsd_max_bits + 15710 dvp_cmprsd_max_bits + 15711 drop_cmprsd_max_bits + 15712 ip_pkt_bits ; 15713 if (flex_attribute->combine_attr_counter[counter]. 15714 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_PKT) { 15715 temp_count = offset_array[loop][0]; 15716 offset_array[loop][temp_count+1]= ( 15717 map_array[bcmStatGroupModeAttrPktType][unknown_pkt] << 15718 shift_by_bits); 15719 offset_array[loop][0] = temp_count+1; 15720 } 15721 if (flex_attribute->combine_attr_counter[counter]. 15722 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_CONTROL_PKT) { 15723 temp_count = offset_array[loop][0]; 15724 offset_array[loop][temp_count+1]= ( 15725 map_array[bcmStatGroupModeAttrPktType][control_pkt] << 15726 shift_by_bits); 15727 offset_array[loop][0] = temp_count+1; 15728 } 15729 if (flex_attribute->combine_attr_counter[counter]. 15730 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_OAM_PKT) { 15731 temp_count = offset_array[loop][0]; 15732 offset_array[loop][temp_count+1]= ( 15733 map_array[bcmStatGroupModeAttrPktType][oam_pkt] << 15734 shift_by_bits); 15735 offset_array[loop][0] = temp_count+1; 15736 } 15737 if (flex_attribute->combine_attr_counter[counter]. 15738 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_BFD_PKT) { 15739 temp_count = offset_array[loop][0]; 15740 offset_array[loop][temp_count+1]= ( 15741 map_array[bcmStatGroupModeAttrPktType][bfd_pkt] << 15742 shift_by_bits); 15743 offset_array[loop][0] = temp_count+1; 15744 } 15745 if (flex_attribute->combine_attr_counter[counter]. 15746 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_BPDU_PKT) { 15747 temp_count = offset_array[loop][0]; 15748 offset_array[loop][temp_count+1]= ( 15749 map_array[bcmStatGroupModeAttrPktType][bpdu_pkt] << 15750 shift_by_bits); 15751 offset_array[loop][0] = temp_count+1; 15752 } 15753 if (flex_attribute->combine_attr_counter[counter]. 15754 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_ICNM_PKT) { 15755 temp_count = offset_array[loop][0]; 15756 offset_array[loop][temp_count+1]= ( 15757 map_array[bcmStatGroupModeAttrPktType][icnm_pkt] << 15758 shift_by_bits); 15759 offset_array[loop][0] = temp_count+1; 15760 } 15761 if (flex_attribute->combine_attr_counter[counter]. 15762 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_PKT_IS_1588) { 15763 temp_count = offset_array[loop][0]; 15764 offset_array[loop][temp_count+1]= ( 15765 map_array[bcmStatGroupModeAttrPktType][_1588_pkt] << 15766 shift_by_bits); 15767 offset_array[loop][0] = temp_count+1; 15768 } 15769 if (flex_attribute->combine_attr_counter[counter]. 15770 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_BFD_PKT) { 15771 temp_count = offset_array[loop][0]; 15772 offset_array[loop][temp_count+1]= ( 15773 map_array[bcmStatGroupModeAttrPktType][bfd_pkt] << 15774 shift_by_bits); 15775 offset_array[loop][0] = temp_count+1; 15776 } 15777 if (flex_attribute->combine_attr_counter[counter]. 15778 pkt_resolution_flags & 15779 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2UC_PKT) { 15780 temp_count = offset_array[loop][0]; 15781 offset_array[loop][temp_count+1]= ( 15782 map_array[bcmStatGroupModeAttrPktType][known_l2uc_pkt] << 15783 shift_by_bits); 15784 offset_array[loop][0] = temp_count+1; 15785 } 15786 if (flex_attribute->combine_attr_counter[counter]. 15787 pkt_resolution_flags & 15788 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L2UC_PKT) { 15789 temp_count = offset_array[loop][0]; 15790 offset_array[loop][temp_count+1]= ( 15791 map_array[bcmStatGroupModeAttrPktType][unknown_l2uc_pkt] << 15792 shift_by_bits); 15793 offset_array[loop][0] = temp_count+1; 15794 } 15795 if (flex_attribute->combine_attr_counter[counter]. 15796 pkt_resolution_flags & BCM_STAT_FLEX_PKT_TYPE_L2BC_PKT) { 15797 temp_count = offset_array[loop][0]; 15798 offset_array[loop][temp_count+1]= ( 15799 map_array[bcmStatGroupModeAttrPktType][l2bc_pkt] << 15800 shift_by_bits); 15801 offset_array[loop][0] = temp_count+1; 15802 } 15803 if (flex_attribute->combine_attr_counter[counter]. 15804 pkt_resolution_flags & 15805 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2MC_PKT) { 15806 temp_count = offset_array[loop][0]; 15807 offset_array[loop][temp_count+1]= ( 15808 map_array[bcmStatGroupModeAttrPktType][known_l2mc_pkt] << 15809 shift_by_bits); 15810 offset_array[loop][0] = temp_count+1; 15811 } 15812 if (flex_attribute->combine_attr_counter[counter]. 15813 pkt_resolution_flags & 15814 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L2MC_PKT) { 15815 temp_count = offset_array[loop][0]; 15816 offset_array[loop][temp_count+1]= ( 15817 map_array[bcmStatGroupModeAttrPktType][unknown_l2mc_pkt] << 15818 shift_by_bits); 15819 offset_array[loop][0] = temp_count+1; 15820 } 15821 if (flex_attribute->combine_attr_counter[counter]. 15822 pkt_resolution_flags & 15823 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L3UC_PKT) { 15824 temp_count = offset_array[loop][0]; 15825 offset_array[loop][temp_count+1]= ( 15826 map_array[bcmStatGroupModeAttrPktType][known_l3uc_pkt] << 15827 shift_by_bits); 15828 offset_array[loop][0] = temp_count+1; 15829 } 15830 if (flex_attribute->combine_attr_counter[counter]. 15831 pkt_resolution_flags & 15832 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L3UC_PKT) { 15833 temp_count = offset_array[loop][0]; 15834 offset_array[loop][temp_count+1]= ( 15835 map_array[bcmStatGroupModeAttrPktType][unknown_l3uc_pkt] << 15836 shift_by_bits); 15837 offset_array[loop][0] = temp_count+1; 15838 } 15839 if (flex_attribute->combine_attr_counter[counter]. 15840 pkt_resolution_flags & 15841 BCM_STAT_FLEX_PKT_TYPE_KNOWN_IPMC_PKT) { 15842 temp_count = offset_array[loop][0]; 15843 offset_array[loop][temp_count+1]= ( 15844 map_array[bcmStatGroupModeAttrPktType][known_ipmc_pkt] << 15845 shift_by_bits); 15846 offset_array[loop][0] = temp_count+1; 15847 } 15848 if (flex_attribute->combine_attr_counter[counter]. 15849 pkt_resolution_flags & 15850 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_IPMC_PKT) { 15851 temp_count = offset_array[loop][0]; 15852 offset_array[loop][temp_count+1]= ( 15853 map_array[bcmStatGroupModeAttrPktType][unknown_ipmc_pkt] << 15854 shift_by_bits); 15855 offset_array[loop][0] = temp_count+1; 15856 } 15857 if (flex_attribute->combine_attr_counter[counter]. 15858 pkt_resolution_flags & 15859 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_L2_PKT) { 15860 temp_count = offset_array[loop][0]; 15861 offset_array[loop][temp_count+1]= ( 15862 map_array[bcmStatGroupModeAttrPktType][known_mpls_l2_pkt] << 15863 shift_by_bits); 15864 offset_array[loop][0] = temp_count+1; 15865 } 15866 if (flex_attribute->combine_attr_counter[counter]. 15867 pkt_resolution_flags & 15868 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_L3_PKT) { 15869 temp_count = offset_array[loop][0]; 15870 offset_array[loop][temp_count+1]= ( 15871 map_array[bcmStatGroupModeAttrPktType][known_mpls_l3_pkt] << 15872 shift_by_bits); 15873 offset_array[loop][0] = temp_count+1; 15874 } 15875 if (flex_attribute->combine_attr_counter[counter]. 15876 pkt_resolution_flags & 15877 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_PKT) { 15878 temp_count = offset_array[loop][0]; 15879 offset_array[loop][temp_count+1]= ( 15880 map_array[bcmStatGroupModeAttrPktType][known_mpls_pkt] << 15881 shift_by_bits); 15882 offset_array[loop][0] = temp_count+1; 15883 } 15884 if (flex_attribute->combine_attr_counter[counter]. 15885 pkt_resolution_flags & 15886 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_MPLS_PKT) { 15887 temp_count = offset_array[loop][0]; 15888 offset_array[loop][temp_count+1]= ( 15889 map_array[bcmStatGroupModeAttrPktType][unknown_mpls_pkt] << 15890 shift_by_bits); 15891 offset_array[loop][0] = temp_count+1; 15892 } 15893 if (flex_attribute->combine_attr_counter[counter]. 15894 pkt_resolution_flags & 15895 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_MULTICAST_PKT) { 15896 temp_count = offset_array[loop][0]; 15897 offset_array[loop][temp_count+1]= ( 15898 map_array[bcmStatGroupModeAttrPktType][known_mpls_multicast_pkt] << 15899 shift_by_bits); 15900 offset_array[loop][0] = temp_count+1; 15901 } 15902 if (flex_attribute->combine_attr_counter[counter]. 15903 pkt_resolution_flags & 15904 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MIM_PKT) { 15905 temp_count = offset_array[loop][0]; 15906 offset_array[loop][temp_count+1]= ( 15907 map_array[bcmStatGroupModeAttrPktType][known_mim_pkt] << 15908 shift_by_bits); 15909 offset_array[loop][0] = temp_count+1; 15910 } 15911 if (flex_attribute->combine_attr_counter[counter]. 15912 pkt_resolution_flags & 15913 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_MIM_PKT) { 15914 temp_count = offset_array[loop][0]; 15915 offset_array[loop][temp_count+1]= ( 15916 map_array[bcmStatGroupModeAttrPktType][unknown_mim_pkt] << 15917 shift_by_bits); 15918 offset_array[loop][0] = temp_count+1; 15919 } 15920 if (flex_attribute->combine_attr_counter[counter]. 15921 pkt_resolution_flags & 15922 BCM_STAT_FLEX_PKT_TYPE_KNOWN_TRILL_PKT) { 15923 temp_count = offset_array[loop][0]; 15924 offset_array[loop][temp_count+1]= ( 15925 map_array[bcmStatGroupModeAttrPktType][known_trill_pkt] << 15926 shift_by_bits); 15927 offset_array[loop][0] = temp_count+1; 15928 } 15929 if (flex_attribute->combine_attr_counter[counter]. 15930 pkt_resolution_flags & 15931 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_TRILL_PKT) { 15932 temp_count = offset_array[loop][0]; 15933 offset_array[loop][temp_count+1]= ( 15934 map_array[bcmStatGroupModeAttrPktType][unknown_trill_pkt] << 15935 shift_by_bits); 15936 offset_array[loop][0] = temp_count+1; 15937 } 15938 if (flex_attribute->combine_attr_counter[counter]. 15939 pkt_resolution_flags & 15940 BCM_STAT_FLEX_PKT_TYPE_KNOWN_NIV_PKT) { 15941 temp_count = offset_array[loop][0]; 15942 offset_array[loop][temp_count+1]= ( 15943 map_array[bcmStatGroupModeAttrPktType][known_niv_pkt]<< 15944 shift_by_bits); 15945 offset_array[loop][0] = temp_count+1; 15946 } 15947 if (flex_attribute->combine_attr_counter[counter]. 15948 pkt_resolution_flags & 15949 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_NIV_PKT) { 15950 temp_count = offset_array[loop][0]; 15951 offset_array[loop][temp_count+1]= ( 15952 map_array[bcmStatGroupModeAttrPktType][unknown_niv_pkt] << 15953 shift_by_bits); 15954 offset_array[loop][0] = temp_count+1; 15955 } 15956 #if defined(BCM_TRIDENT2_SUPPORT) 15957 if (SOC_IS_TD2_TT2(unit)) { 15958 if (flex_attribute->combine_attr_counter[counter]. 15959 pkt_resolution_flags & 15960 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2GRE_PKT) { 15961 temp_count = offset_array[loop][0]; 15962 offset_array[loop][temp_count+1]= ( 15963 map_array[bcmStatGroupModeAttrPktType][known_l2gre_pkt] << 15964 shift_by_bits); 15965 offset_array[loop][0] = temp_count+1; 15966 } 15967 if (flex_attribute->combine_attr_counter[counter]. 15968 pkt_resolution_flags & 15969 BCM_STAT_FLEX_PKT_TYPE_KNOWN_VXLAN_PKT) { 15970 temp_count = offset_array[loop][0]; 15971 offset_array[loop][temp_count+1]= ( 15972 map_array[bcmStatGroupModeAttrPktType][known_vxlan_pkt] << 15973 shift_by_bits); 15974 offset_array[loop][0] = temp_count+1; 15975 } 15976 if (flex_attribute->combine_attr_counter[counter]. 15977 pkt_resolution_flags & 15978 BCM_STAT_FLEX_PKT_TYPE_KNOWN_FCOE_PKT) { 15979 temp_count = offset_array[loop][0]; 15980 offset_array[loop][temp_count+1]= ( 15981 map_array[bcmStatGroupModeAttrPktType][known_fcoe_pkt] << 15982 shift_by_bits); 15983 offset_array[loop][0] = temp_count+1; 15984 } 15985 if (flex_attribute->combine_attr_counter[counter]. 15986 pkt_resolution_flags & 15987 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_FCOE_PKT) { 15988 temp_count = offset_array[loop][0]; 15989 offset_array[loop][temp_count+1]= ( 15990 map_array[bcmStatGroupModeAttrPktType][unknown_fcoe_pkt] << 15991 shift_by_bits); 15992 offset_array[loop][0] = temp_count+1; 15993 } 15994 } 15995 #endif 15996 loop++; 15997 } 15998 } 15999 /* Logical Group 5 */ 16000 if ((flex_attribute->svp != 0) && 16001 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 16002 shift_by_bits = dvp_cmprsd_max_bits + 16003 drop_cmprsd_max_bits + 16004 ip_pkt_bits ; 16005 if (direction == bcmStatFlexDirectionIngress) { 16006 max_count= (1 << ing_pkt_attr_cmprsd_bits_g[unit].svp_type)-1; 16007 } else { 16008 max_count= (1 << egr_pkt_attr_cmprsd_bits_g[unit].svp_type)-1; 16009 } 16010 for (loop_index=0; loop_index <= max_count ; loop_index++) { 16011 if (BCM_STAT_FLEX_VALUE_GET( 16012 flex_attribute->combine_attr_counter[counter]. 16013 value_array[bcmStatFlexAttrSvp],loop_index)) { 16014 temp_count = offset_array[loop][0]; 16015 offset_array[loop][temp_count+1]= ( 16016 map_array[bcmStatGroupModeAttrIngNetworkGroup][loop_index] << 16017 shift_by_bits); 16018 offset_array[loop][0] = temp_count+1; 16019 } 16020 } 16021 loop++; 16022 } 16023 if ((flex_attribute->dvp != 0) && 16024 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 16025 shift_by_bits = drop_cmprsd_max_bits + 16026 ip_pkt_bits ; 16027 max_count= (1 << egr_pkt_attr_cmprsd_bits_g[unit].dvp_type)-1; 16028 for (loop_index=0; loop_index <= max_count ; loop_index++) { 16029 if (BCM_STAT_FLEX_VALUE_GET( 16030 flex_attribute->combine_attr_counter[counter]. 16031 value_array[bcmStatFlexAttrDvp],loop_index)) { 16032 temp_count = offset_array[loop][0]; 16033 offset_array[loop][temp_count+1]= ( 16034 map_array[bcmStatGroupModeAttrEgrNetworkGroup][loop_index] << 16035 shift_by_bits); 16036 offset_array[loop][0] = temp_count+1; 16037 } 16038 } 16039 loop++; 16040 } 16041 if ((flex_attribute->drop != 0) && 16042 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 16043 shift_by_bits = ip_pkt_bits ; 16044 if (flex_attribute->combine_attr_counter[counter]. 16045 drop_flags & BCM_STAT_FLEX_DROP_DISABLE) { 16046 temp_count = offset_array[loop][0]; 16047 offset_array[loop][temp_count+1]= ( 16048 map_array[bcmStatGroupModeAttrDrop][0] << shift_by_bits); 16049 offset_array[loop][0] = temp_count+1; 16050 } 16051 if (flex_attribute->combine_attr_counter[counter]. 16052 drop_flags & BCM_STAT_FLEX_DROP_ENABLE) { 16053 temp_count = offset_array[loop][0]; 16054 offset_array[loop][temp_count+1]= ( 16055 map_array[bcmStatGroupModeAttrDrop][1] << shift_by_bits); 16056 offset_array[loop][0] = temp_count+1; 16057 } 16058 loop++; 16059 } 16060 if ((flex_attribute->ip_pkt != 0) && 16061 (loop <= (BCM_STAT_FLEX_COUNTER_MAX_TOTAL_BITS - 2))) { 16062 shift_by_bits = 0; 16063 if (flex_attribute->combine_attr_counter[counter]. 16064 ip_pkt_flags & BCM_STAT_FLEX_IP_PKT_DISABLE) { 16065 temp_count = offset_array[loop][0]; 16066 offset_array[loop][temp_count+1]= (0 << shift_by_bits); 16067 offset_array[loop][0] = temp_count+1; 16068 } 16069 if (flex_attribute->combine_attr_counter[counter]. 16070 ip_pkt_flags & BCM_STAT_FLEX_IP_PKT_ENABLE) { 16071 temp_count = offset_array[loop][0]; 16072 offset_array[loop][temp_count+1]= (1 << shift_by_bits); 16073 offset_array[loop][0] = temp_count+1; 16074 } 16075 loop++; 16076 } 16077 /* Third and Final Level Update: Make Absolute Offset */ 16078 for (index0=0; 16079 index0 < offset_array[0][0] ; 16080 index0++) { 16081 offset = offset_array[0][index0+1]; 16082 if (offset_array[1][0] != 0) { 16083 for (index1=0; 16084 index1 < offset_array[1][0] ; 16085 index1++) { 16086 offset = offset_array[0][index0+1] | offset_array[1][index1+1]; 16087 if (offset_array[2][0] != 0) { 16088 for (index2=0; 16089 index2 < offset_array[2][0] ; 16090 index2++) { 16091 offset = offset_array[0][index0+1] | 16092 offset_array[1][index1+1] | 16093 offset_array[2][index2+1]; 16094 if (offset_array[3][0] != 0) { 16095 for (index3=0; 16096 index3 < offset_array[3][0] ; 16097 index3++) { 16098 offset = offset_array[0][index0+1] | 16099 offset_array[1][index1+1] | 16100 offset_array[2][index2+1] | 16101 offset_array[3][index3+1]; 16102 if (offset_array[4][0] != 0) { 16103 for (index4=0; 16104 index4 < offset_array[4][0] ; 16105 index4++) { 16106 offset = offset_array[0][index0+1] | 16107 offset_array[1][index1+1] | 16108 offset_array[2][index2+1] | 16109 offset_array[3][index3+1] | 16110 offset_array[4][index4+1]; 16111 if (offset_array[5][0] != 0) { 16112 for (index5=0; 16113 index5 < offset_array[5][0] ; 16114 index5++) { 16115 offset = offset_array[0][index0+1] | 16116 offset_array[1][index1+1] | 16117 offset_array[2][index2+1] | 16118 offset_array[3][index3+1] | 16119 offset_array[4][index4+1] | 16120 offset_array[5][index5+1]; 16121 if (offset_array[6][0] != 0) { 16122 for (index6=0; 16123 index6 < offset_array[6][0] ; 16124 index6++) { 16125 offset = offset_array[0][index0+1] | 16126 offset_array[1][index1+1] | 16127 offset_array[2][index2+1] | 16128 offset_array[3][index3+1] | 16129 offset_array[4][index4+1] | 16130 offset_array[5][index5+1] | 16131 offset_array[6][index6+1]; 16132 if (offset_array[7][0] != 0) { 16133 for (index7=0; 16134 index7 < offset_array[7][0] ; 16135 index7++) { 16136 offset = offset_array[0][index0+1] | 16137 offset_array[1][index1+1] | 16138 offset_array[2][index2+1] | 16139 offset_array[3][index3+1] | 16140 offset_array[4][index4+1] | 16141 offset_array[5][index5+1] | 16142 offset_array[6][index6+1] | 16143 offset_array[7][index6+1]; 16144 rv = _bcm_stat_flex_update_map(direction,attr, 16145 offset,counter); 16146 BCMI_IF_ERROR_CLEANUP(rv); 16147 } 16148 } else { 16149 rv = _bcm_stat_flex_update_map(direction,attr, 16150 offset,counter); 16151 BCMI_IF_ERROR_CLEANUP(rv); 16152 } 16153 } 16154 } else { 16155 rv = _bcm_stat_flex_update_map(direction,attr,offset,counter); 16156 BCMI_IF_ERROR_CLEANUP(rv); 16157 } 16158 } 16159 } else { 16160 rv = _bcm_stat_flex_update_map(direction,attr,offset,counter); 16161 BCMI_IF_ERROR_CLEANUP(rv); 16162 } 16163 } 16164 } else { 16165 rv = _bcm_stat_flex_update_map(direction,attr,offset,counter); 16166 BCMI_IF_ERROR_CLEANUP(rv); 16167 } 16168 } 16169 } else { 16170 rv = _bcm_stat_flex_update_map(direction,attr,offset,counter); 16171 BCMI_IF_ERROR_CLEANUP(rv); 16172 } 16173 } 16174 } else { 16175 rv = _bcm_stat_flex_update_map(direction,attr,offset,counter); 16176 BCMI_IF_ERROR_CLEANUP(rv); 16177 } 16178 } 16179 } else { 16180 rv = _bcm_stat_flex_update_map(direction,attr,offset,counter); 16181 BCMI_IF_ERROR_CLEANUP(rv); 16182 } 16183 } 16184 } 16185 } 16186 /* 16187 * COVERITY 16188 * 16189 * Intentional stack usage. 16190 */ 16191 /* coverity[stack_use_callee_max : FALSE] */ 16192 /* coverity[stack_use_overflow : FALSE] */ 16193 rv = _bcm_esw_stat_flex_create_mode(unit,attr,&mode,flex_attribute); 16194 if (soc_feature(unit, soc_feature_flex_stat_compression_share)) { 16195 if (rv == BCM_E_NONE) { 16196 if(ing_attr != NULL) { 16197 if (direction == bcmStatFlexDirectionIngress && 16198 ing_attr->packet_attr_type == 16199 bcmStatFlexPacketAttrTypeCompressed) { 16200 rv = _bcm_esw_stat_flex_compressed_attr_map_update(unit, 16201 direction,flex_attribute,ing_cmprsd_pkt_attr_bits, 16202 NULL); 16203 } 16204 } 16205 if (egr_attr != NULL) { 16206 if(direction == bcmStatFlexDirectionEgress && 16207 egr_attr->packet_attr_type == 16208 bcmStatFlexPacketAttrTypeCompressed) { 16209 rv = _bcm_esw_stat_flex_compressed_attr_map_update(unit, 16210 direction,flex_attribute,NULL, 16211 egr_cmprsd_pkt_attr_bits); 16212 } 16213 } 16214 } 16215 } 16216 16217 if (NULL != mode_id) { 16218 *mode_id = mode; 16219 } else { 16220 for (loop = 0; loop < 8; loop++) { 16221 if (offset_array[loop] != NULL) { 16222 sal_free(offset_array[loop]); 16223 } 16224 } 16225 16226 for (loop = 0; loop < bcmStatGroupModeAttrMaxValue; loop++) { 16227 if (map_array[loop] != NULL) { 16228 sal_free(map_array[loop]); 16229 } 16230 } 16231 16232 sal_free(attr); 16233 return BCM_E_PARAM; 16234 } 16235 16236 cleanup: 16237 16238 for (loop = 0; loop < 8; loop++) { 16239 if (offset_array[loop] != NULL) { 16240 sal_free(offset_array[loop]); 16241 } 16242 } 16243 for (loop = 0; loop < bcmStatGroupModeAttrMaxValue; loop++) { 16244 if (map_array[loop] != NULL) { 16245 sal_free(map_array[loop]); 16246 } 16247 } 16248 if (attr != NULL) { 16249 sal_free(attr); 16250 } 16251 return rv; 16252 } 16253 16254 /* Create Customized Stat Group mode for given Counter Attributes:FillUpValues*/ 16255 static 16256 bcm_error_t _bcm_esw_stat_group_mode_fillup_values( 16257 int unit, 16258 uint32 flags, 16259 uint32 total_counters, 16260 uint32 num_selectors, 16261 bcm_stat_group_mode_attr_selector_t *attr_selectors, 16262 bcm_stat_flex_attribute_t *flex_attribute) 16263 { 16264 uint32 sel=0; 16265 uint32 counter_offset=0; /* Counter Offset */ 16266 bcm_stat_group_mode_attr_t attr=0; /* (Invalid)Attribute Selector */ 16267 uint32 attr_value=0; /* Attribute Values */ 16268 uint32 value=0; 16269 uint32 max_value=0; 16270 uint32 array_index=0; 16271 uint32 udf_bitmap = 0, i, udf_max_num_bits = 0; 16272 #ifdef BCM_KATANA2_SUPPORT 16273 uint32 iter = 0; 16274 #endif 16275 16276 for (sel = 0; sel < num_selectors ; sel++) { 16277 counter_offset = attr_selectors[sel].counter_offset; 16278 attr = attr_selectors[sel].attr; 16279 attr_value = attr_selectors[sel].attr_value; 16280 if (counter_offset >= total_counters) { 16281 return BCM_E_PARAM; 16282 } 16283 16284 if (flags & BCM_STAT_GROUP_MODE_UDF) { 16285 switch(attr) { 16286 case bcmStatGroupModeAttrDrop: 16287 flex_attribute->drop = 1; 16288 switch(attr_value) { 16289 case 0: 16290 flex_attribute->combine_attr_counter[counter_offset]. 16291 drop_flags |= BCM_STAT_FLEX_DROP_DISABLE; 16292 break; 16293 case 1: 16294 flex_attribute->combine_attr_counter[counter_offset]. 16295 drop_flags |= BCM_STAT_FLEX_DROP_ENABLE; 16296 break; 16297 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 16298 flex_attribute->combine_attr_counter[counter_offset]. 16299 drop_flags |= (BCM_STAT_FLEX_DROP_ENABLE | 16300 BCM_STAT_FLEX_DROP_DISABLE); 16301 break; 16302 default: 16303 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 16304 (BSL_META_U(unit, 16305 "BAD PARAM(DropType)" 16306 ":sel=%d offset=%d attr=%d value=%d\n"), 16307 sel, counter_offset , attr, attr_value )); 16308 return BCM_E_PARAM; 16309 } 16310 break; 16311 case bcmStatGroupModeAttrUdf: 16312 flex_attribute->udf = 1; 16313 flex_attribute->udf_bitmap = attr_selectors[sel].udf_bitmap; 16314 /*udf_bitmap should be same in one stat group mode*/ 16315 if (udf_bitmap == 0) { 16316 udf_bitmap = flex_attribute->udf_bitmap; 16317 for (i = 0; i < 32; i++) { 16318 udf_max_num_bits += udf_bitmap & 0x1; 16319 udf_bitmap = udf_bitmap >> 1; 16320 } 16321 udf_bitmap = flex_attribute->udf_bitmap; 16322 } else if (udf_bitmap != flex_attribute->udf_bitmap) { 16323 return BCM_E_PARAM; 16324 } 16325 /*When AttrDrop is enabled, max number of udf bit is 7. 16326 *When AttrDrop is not enabled, max number of udf bit is 8. 16327 * We donot know if AttrDrop is enabled at this moment, so let max bit be 8. 16328 */ 16329 if (udf_max_num_bits > 8 || 16330 attr_value > ((1 << udf_max_num_bits) -1)) { 16331 return BCM_E_PARAM; 16332 } 16333 BCM_STAT_FLEX_VALUE_SET( 16334 flex_attribute->combine_attr_counter[counter_offset]. 16335 value_array[bcmStatFlexAttrUdf], attr_value); 16336 break; 16337 default: 16338 return BCM_E_PARAM; 16339 } 16340 continue; 16341 } 16342 16343 switch(attr) { 16344 case bcmStatGroupModeAttrColor: 16345 flex_attribute->pre_ifp_color=1; 16346 switch(attr_value) { 16347 case bcmColorGreen: 16348 flex_attribute->combine_attr_counter[counter_offset]. 16349 pre_ifp_color_flags |= BCM_STAT_FLEX_COLOR_GREEN; 16350 break; 16351 case bcmColorYellow: 16352 flex_attribute->combine_attr_counter[counter_offset]. 16353 pre_ifp_color_flags |= BCM_STAT_FLEX_COLOR_YELLOW; 16354 break; 16355 case bcmColorRed: 16356 flex_attribute->combine_attr_counter[counter_offset]. 16357 pre_ifp_color_flags |= BCM_STAT_FLEX_COLOR_RED; 16358 break; 16359 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 16360 flex_attribute->combine_attr_counter[counter_offset]. 16361 pre_ifp_color_flags |= (BCM_STAT_FLEX_COLOR_GREEN | 16362 BCM_STAT_FLEX_COLOR_YELLOW | 16363 BCM_STAT_FLEX_COLOR_RED); 16364 break; 16365 default: 16366 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 16367 (BSL_META_U(unit, 16368 "BAD PARAM(Color):sel=%d offset=%d" 16369 "attr=%d value=%d\n"), sel, 16370 counter_offset, attr, attr_value)); 16371 return BCM_E_PARAM; 16372 } 16373 if (soc_feature(unit, soc_feature_flex_stat_compression_share)) { 16374 flex_attribute->combine_pre_ifp_color_flags |= 16375 flex_attribute->combine_attr_counter[counter_offset]. 16376 pre_ifp_color_flags; 16377 } 16378 16379 break; 16380 case bcmStatGroupModeAttrFieldIngressColor: 16381 flex_attribute->ifp_color=1; 16382 switch(attr_value) { 16383 case bcmColorGreen: 16384 flex_attribute->combine_attr_counter[counter_offset]. 16385 ifp_color_flags |= BCM_STAT_FLEX_COLOR_GREEN; 16386 break; 16387 case bcmColorYellow: 16388 flex_attribute->combine_attr_counter[counter_offset]. 16389 ifp_color_flags |= BCM_STAT_FLEX_COLOR_YELLOW; 16390 break; 16391 case bcmColorRed: 16392 flex_attribute->combine_attr_counter[counter_offset]. 16393 ifp_color_flags |= BCM_STAT_FLEX_COLOR_RED; 16394 break; 16395 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 16396 flex_attribute->combine_attr_counter[counter_offset]. 16397 ifp_color_flags |= (BCM_STAT_FLEX_COLOR_GREEN | 16398 BCM_STAT_FLEX_COLOR_YELLOW | 16399 BCM_STAT_FLEX_COLOR_RED); 16400 break; 16401 default: 16402 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 16403 (BSL_META_U(unit, 16404 "BAD PARAM(FieldIngressColor)" 16405 ":sel=%d offset=%d attr=%d value=%d\n"), 16406 sel, counter_offset , attr, attr_value )); 16407 return BCM_E_PARAM; 16408 } 16409 16410 if (soc_feature(unit, soc_feature_flex_stat_compression_share)) { 16411 flex_attribute->combine_ifp_color_flags |= 16412 flex_attribute->combine_attr_counter[counter_offset]. 16413 ifp_color_flags; 16414 } 16415 break; 16416 case bcmStatGroupModeAttrIntPri: 16417 flex_attribute->int_pri=1; 16418 switch(attr_value) { 16419 case 0: 16420 flex_attribute->combine_attr_counter[counter_offset]. 16421 int_pri_flags |= BCM_STAT_FLEX_PRI0; 16422 break; 16423 case 1: 16424 flex_attribute->combine_attr_counter[counter_offset]. 16425 int_pri_flags |= BCM_STAT_FLEX_PRI1; 16426 break; 16427 case 2: 16428 flex_attribute->combine_attr_counter[counter_offset]. 16429 int_pri_flags |= BCM_STAT_FLEX_PRI2; 16430 break; 16431 case 3: 16432 flex_attribute->combine_attr_counter[counter_offset]. 16433 int_pri_flags |= BCM_STAT_FLEX_PRI3; 16434 break; 16435 case 4: 16436 flex_attribute->combine_attr_counter[counter_offset]. 16437 int_pri_flags |= BCM_STAT_FLEX_PRI4; 16438 break; 16439 case 5: 16440 flex_attribute->combine_attr_counter[counter_offset]. 16441 int_pri_flags |= BCM_STAT_FLEX_PRI5; 16442 break; 16443 case 6: 16444 flex_attribute->combine_attr_counter[counter_offset]. 16445 int_pri_flags |= BCM_STAT_FLEX_PRI6; 16446 break; 16447 case 7: 16448 flex_attribute->combine_attr_counter[counter_offset]. 16449 int_pri_flags |= BCM_STAT_FLEX_PRI7; 16450 break; 16451 case 8: 16452 flex_attribute->combine_attr_counter[counter_offset]. 16453 int_pri_flags |= BCM_STAT_FLEX_PRI8; 16454 break; 16455 case 9: 16456 flex_attribute->combine_attr_counter[counter_offset]. 16457 int_pri_flags |= BCM_STAT_FLEX_PRI9; 16458 break; 16459 case 10: 16460 flex_attribute->combine_attr_counter[counter_offset]. 16461 int_pri_flags |= BCM_STAT_FLEX_PRI10; 16462 break; 16463 case 11: 16464 flex_attribute->combine_attr_counter[counter_offset]. 16465 int_pri_flags |= BCM_STAT_FLEX_PRI11; 16466 break; 16467 case 12: 16468 flex_attribute->combine_attr_counter[counter_offset]. 16469 int_pri_flags |= BCM_STAT_FLEX_PRI12; 16470 break; 16471 case 13: 16472 flex_attribute->combine_attr_counter[counter_offset]. 16473 int_pri_flags |= BCM_STAT_FLEX_PRI13; 16474 break; 16475 case 14: 16476 flex_attribute->combine_attr_counter[counter_offset]. 16477 int_pri_flags |= BCM_STAT_FLEX_PRI14; 16478 break; 16479 case 15: 16480 flex_attribute->combine_attr_counter[counter_offset]. 16481 int_pri_flags |= BCM_STAT_FLEX_PRI15; 16482 break; 16483 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 16484 flex_attribute->combine_attr_counter[counter_offset]. 16485 int_pri_flags |= (BCM_STAT_FLEX_PRI0 | 16486 BCM_STAT_FLEX_PRI1 | 16487 BCM_STAT_FLEX_PRI2 | 16488 BCM_STAT_FLEX_PRI3 | 16489 BCM_STAT_FLEX_PRI4 | 16490 BCM_STAT_FLEX_PRI5 | 16491 BCM_STAT_FLEX_PRI6 | 16492 BCM_STAT_FLEX_PRI7 | 16493 BCM_STAT_FLEX_PRI8 | 16494 BCM_STAT_FLEX_PRI9 | 16495 BCM_STAT_FLEX_PRI10 | 16496 BCM_STAT_FLEX_PRI11 | 16497 BCM_STAT_FLEX_PRI12 | 16498 BCM_STAT_FLEX_PRI13 | 16499 BCM_STAT_FLEX_PRI14 | 16500 BCM_STAT_FLEX_PRI15); 16501 break; 16502 default: 16503 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 16504 (BSL_META_U(unit, 16505 "BAD PARAM(IntPri)" 16506 ":sel=%d offset=%d attr=%d value=%d\n"), 16507 sel, counter_offset , attr, attr_value )); 16508 return BCM_E_PARAM; 16509 } 16510 16511 if (soc_feature(unit, soc_feature_flex_stat_compression_share)) { 16512 flex_attribute->combine_int_pri_flags |= 16513 flex_attribute->combine_attr_counter[counter_offset]. 16514 int_pri_flags; 16515 } 16516 break; 16517 case bcmStatGroupModeAttrVlan: 16518 flex_attribute->vlan_format = 1; 16519 switch(attr_value) { 16520 case bcmStatGroupModeAttrVlanUnTagged: 16521 flex_attribute->combine_attr_counter[counter_offset]. 16522 vlan_format_flags |= BCM_STAT_FLEX_VLAN_FORMAT_UNTAGGED; 16523 break; 16524 case bcmStatGroupModeAttrVlanInnerTag: 16525 flex_attribute->combine_attr_counter[counter_offset]. 16526 vlan_format_flags |= BCM_STAT_FLEX_VLAN_FORMAT_INNER; 16527 break; 16528 case bcmStatGroupModeAttrVlanOuterTag: 16529 flex_attribute->combine_attr_counter[counter_offset]. 16530 vlan_format_flags |= BCM_STAT_FLEX_VLAN_FORMAT_OUTER; 16531 break; 16532 case bcmStatGroupModeAttrVlanStackedTag: 16533 flex_attribute->combine_attr_counter[counter_offset]. 16534 vlan_format_flags |= BCM_STAT_FLEX_VLAN_FORMAT_BOTH; 16535 break; 16536 case bcmStatGroupModeAttrVlanAll: 16537 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 16538 flex_attribute->combine_attr_counter[counter_offset]. 16539 vlan_format_flags |= (BCM_STAT_FLEX_VLAN_FORMAT_BOTH | 16540 BCM_STAT_FLEX_VLAN_FORMAT_INNER | 16541 BCM_STAT_FLEX_VLAN_FORMAT_OUTER | 16542 BCM_STAT_FLEX_VLAN_FORMAT_UNTAGGED); 16543 break; 16544 default: 16545 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 16546 (BSL_META_U(unit, 16547 "BAD PARAM(VlanFormat)" 16548 ":sel=%d offset=%d attr=%d value=%d\n"), 16549 sel, counter_offset , attr, attr_value )); 16550 return BCM_E_PARAM; 16551 } 16552 16553 if (soc_feature(unit, soc_feature_flex_stat_compression_share)) { 16554 flex_attribute->combine_vlan_format_flags |= 16555 flex_attribute->combine_attr_counter[counter_offset]. 16556 vlan_format_flags; 16557 } 16558 break; 16559 case bcmStatGroupModeAttrOuterPri: 16560 flex_attribute->outer_dot1p = 1; 16561 switch(attr_value) { 16562 case 0: 16563 flex_attribute->combine_attr_counter[counter_offset]. 16564 outer_dot1p_flags |= BCM_STAT_FLEX_PRI0; 16565 break; 16566 case 1: 16567 flex_attribute->combine_attr_counter[counter_offset]. 16568 outer_dot1p_flags |= BCM_STAT_FLEX_PRI1; 16569 break; 16570 case 2: 16571 flex_attribute->combine_attr_counter[counter_offset]. 16572 outer_dot1p_flags |= BCM_STAT_FLEX_PRI2; 16573 break; 16574 case 3: 16575 flex_attribute->combine_attr_counter[counter_offset]. 16576 outer_dot1p_flags |= BCM_STAT_FLEX_PRI3; 16577 break; 16578 case 4: 16579 flex_attribute->combine_attr_counter[counter_offset]. 16580 outer_dot1p_flags |= BCM_STAT_FLEX_PRI4; 16581 break; 16582 case 5: 16583 flex_attribute->combine_attr_counter[counter_offset]. 16584 outer_dot1p_flags |= BCM_STAT_FLEX_PRI5; 16585 break; 16586 case 6: 16587 flex_attribute->combine_attr_counter[counter_offset]. 16588 outer_dot1p_flags |= BCM_STAT_FLEX_PRI6; 16589 break; 16590 case 7: 16591 flex_attribute->combine_attr_counter[counter_offset]. 16592 outer_dot1p_flags |= BCM_STAT_FLEX_PRI7; 16593 break; 16594 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 16595 flex_attribute->combine_attr_counter[counter_offset]. 16596 outer_dot1p_flags |= (BCM_STAT_FLEX_PRI0 | 16597 BCM_STAT_FLEX_PRI1 | 16598 BCM_STAT_FLEX_PRI2 | 16599 BCM_STAT_FLEX_PRI3 | 16600 BCM_STAT_FLEX_PRI4 | 16601 BCM_STAT_FLEX_PRI5 | 16602 BCM_STAT_FLEX_PRI6 | 16603 BCM_STAT_FLEX_PRI7); 16604 break; 16605 default: 16606 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 16607 (BSL_META_U(unit, 16608 "BAD PARAM(OuterPri)" 16609 ":sel=%d offset=%d attr=%d value=%d\n"), 16610 sel, counter_offset , attr, attr_value )); 16611 return BCM_E_PARAM; 16612 } 16613 16614 if (soc_feature(unit, soc_feature_flex_stat_compression_share)) { 16615 flex_attribute->combine_outer_dot1p_flags |= 16616 flex_attribute->combine_attr_counter[counter_offset]. 16617 outer_dot1p_flags; 16618 } 16619 break; 16620 case bcmStatGroupModeAttrInnerPri: 16621 flex_attribute->inner_dot1p = 1; 16622 switch(attr_value) { 16623 case 0: 16624 flex_attribute->combine_attr_counter[counter_offset]. 16625 inner_dot1p_flags |= BCM_STAT_FLEX_PRI0; 16626 break; 16627 case 1: 16628 flex_attribute->combine_attr_counter[counter_offset]. 16629 inner_dot1p_flags |= BCM_STAT_FLEX_PRI1; 16630 break; 16631 case 2: 16632 flex_attribute->combine_attr_counter[counter_offset]. 16633 inner_dot1p_flags |= BCM_STAT_FLEX_PRI2; 16634 break; 16635 case 3: 16636 flex_attribute->combine_attr_counter[counter_offset]. 16637 inner_dot1p_flags |= BCM_STAT_FLEX_PRI3; 16638 break; 16639 case 4: 16640 flex_attribute->combine_attr_counter[counter_offset]. 16641 inner_dot1p_flags |= BCM_STAT_FLEX_PRI4; 16642 break; 16643 case 5: 16644 flex_attribute->combine_attr_counter[counter_offset]. 16645 inner_dot1p_flags |= BCM_STAT_FLEX_PRI5; 16646 break; 16647 case 6: 16648 flex_attribute->combine_attr_counter[counter_offset]. 16649 inner_dot1p_flags |= BCM_STAT_FLEX_PRI6; 16650 break; 16651 case 7: 16652 flex_attribute->combine_attr_counter[counter_offset]. 16653 inner_dot1p_flags |= BCM_STAT_FLEX_PRI7; 16654 break; 16655 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 16656 flex_attribute->combine_attr_counter[counter_offset]. 16657 inner_dot1p_flags |= (BCM_STAT_FLEX_PRI0 | 16658 BCM_STAT_FLEX_PRI1 | 16659 BCM_STAT_FLEX_PRI2 | 16660 BCM_STAT_FLEX_PRI3 | 16661 BCM_STAT_FLEX_PRI4 | 16662 BCM_STAT_FLEX_PRI5 | 16663 BCM_STAT_FLEX_PRI6 | 16664 BCM_STAT_FLEX_PRI7); 16665 break; 16666 default: 16667 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 16668 (BSL_META_U(unit, 16669 "BAD PARAM(InnerPri)" 16670 ":sel=%d offset=%d attr=%d value=%d\n"), 16671 sel, counter_offset , attr, attr_value )); 16672 return BCM_E_PARAM; 16673 } 16674 16675 if (soc_feature(unit, soc_feature_flex_stat_compression_share)) { 16676 flex_attribute->combine_inner_dot1p_flags |= 16677 flex_attribute->combine_attr_counter[counter_offset]. 16678 inner_dot1p_flags; 16679 } 16680 break; 16681 case bcmStatGroupModeAttrPort: 16682 flex_attribute->port = 1; 16683 if (flags & BCM_STAT_GROUP_MODE_INGRESS) { 16684 max_value = (1 << ing_pkt_attr_uncmprsd_bits_g[unit].ing_port) - 1; 16685 } else { 16686 max_value = (1 << egr_pkt_attr_uncmprsd_bits_g[unit].egr_port) - 1; 16687 } 16688 switch(attr_value) { 16689 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 16690 for(value=0;value <= max_value ; value++) { 16691 BCM_STAT_FLEX_VALUE_SET( 16692 flex_attribute->combine_attr_counter[counter_offset]. 16693 value_array[bcmStatFlexAttrPort], value); 16694 } 16695 break; 16696 default: 16697 if (attr_value > max_value) { 16698 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 16699 (BSL_META_U(unit, 16700 "BAD PARAM(Port)" 16701 ":sel=%d offset=%d attr=%d value=%d\n"), 16702 sel, counter_offset , attr, attr_value )); 16703 return BCM_E_PARAM; 16704 } 16705 BCM_STAT_FLEX_VALUE_SET( 16706 flex_attribute->combine_attr_counter[counter_offset]. 16707 value_array[bcmStatFlexAttrPort], attr_value); 16708 break; 16709 } 16710 break; 16711 case bcmStatGroupModeAttrTosDscp: 16712 flex_attribute->tos_dscp = 1; 16713 if (flags & BCM_STAT_GROUP_MODE_INGRESS) { 16714 max_value = (1 << ing_pkt_attr_uncmprsd_bits_g[unit].tos_dscp) - 1; 16715 } else { 16716 max_value = (1 << egr_pkt_attr_uncmprsd_bits_g[unit].tos_dscp) - 1; 16717 } 16718 switch(attr_value) { 16719 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 16720 for(value=0;value <= max_value ; value++) { 16721 BCM_STAT_FLEX_VALUE_SET( 16722 flex_attribute->combine_attr_counter[counter_offset]. 16723 value_array[bcmStatFlexAttrTosDscp], value); 16724 } 16725 break; 16726 default: 16727 if (attr_value > max_value) { 16728 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 16729 (BSL_META_U(unit, 16730 "BAD PARAM(Tos)" 16731 ":sel=%d offset=%d attr=%d value=%d\n"), 16732 sel, counter_offset , attr, attr_value )); 16733 return BCM_E_PARAM; 16734 } 16735 BCM_STAT_FLEX_VALUE_SET( 16736 flex_attribute->combine_attr_counter[counter_offset]. 16737 value_array[bcmStatFlexAttrTosDscp], attr_value); 16738 break; 16739 } 16740 break; 16741 case bcmStatGroupModeAttrTosEcn: 16742 flex_attribute->tos_ecn = 1; 16743 if (flags & BCM_STAT_GROUP_MODE_INGRESS) { 16744 max_value = (1 << ing_pkt_attr_uncmprsd_bits_g[unit].tos_ecn) - 1; 16745 } else { 16746 max_value = (1 << egr_pkt_attr_uncmprsd_bits_g[unit].tos_ecn) - 1; 16747 } 16748 switch(attr_value) { 16749 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 16750 for(value=0;value <= max_value ; value++) { 16751 BCM_STAT_FLEX_VALUE_SET( 16752 flex_attribute->combine_attr_counter[counter_offset]. 16753 value_array[bcmStatFlexAttrTosEcn], value); 16754 } 16755 break; 16756 default: 16757 if (attr_value > max_value) { 16758 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 16759 (BSL_META_U(unit, 16760 "BAD PARAM(Tos)" 16761 ":sel=%d offset=%d attr=%d value=%d\n"), 16762 sel, counter_offset , attr, attr_value )); 16763 return BCM_E_PARAM; 16764 } 16765 BCM_STAT_FLEX_VALUE_SET( 16766 flex_attribute->combine_attr_counter[counter_offset]. 16767 value_array[bcmStatFlexAttrTosEcn], attr_value); 16768 break; 16769 } 16770 break; 16771 case bcmStatGroupModeAttrPktType: 16772 flex_attribute->pkt_resolution = 1; 16773 switch(attr_value) { 16774 case bcmStatGroupModeAttrPktTypeUnknown: 16775 flex_attribute->combine_attr_counter[counter_offset]. 16776 pkt_resolution_flags |= 16777 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_PKT; 16778 break; 16779 case bcmStatGroupModeAttrPktTypeControl: 16780 flex_attribute->combine_attr_counter[counter_offset]. 16781 pkt_resolution_flags |= 16782 BCM_STAT_FLEX_PKT_TYPE_CONTROL_PKT ; 16783 break; 16784 case bcmStatGroupModeAttrPktTypeOAM: 16785 flex_attribute->combine_attr_counter[counter_offset]. 16786 pkt_resolution_flags |= 16787 BCM_STAT_FLEX_PKT_TYPE_OAM_PKT ; 16788 break; 16789 case bcmStatGroupModeAttrPktTypeBFD: 16790 flex_attribute->combine_attr_counter[counter_offset]. 16791 pkt_resolution_flags |= 16792 BCM_STAT_FLEX_PKT_TYPE_BFD_PKT ; 16793 break; 16794 case bcmStatGroupModeAttrPktTypeBPDU: 16795 flex_attribute->combine_attr_counter[counter_offset]. 16796 pkt_resolution_flags |= 16797 BCM_STAT_FLEX_PKT_TYPE_BPDU_PKT ; 16798 break; 16799 case bcmStatGroupModeAttrPktTypeICNM: 16800 flex_attribute->combine_attr_counter[counter_offset]. 16801 pkt_resolution_flags |= 16802 BCM_STAT_FLEX_PKT_TYPE_ICNM_PKT ; 16803 break; 16804 case bcmStatGroupModeAttrPktType1588: 16805 flex_attribute->combine_attr_counter[counter_offset]. 16806 pkt_resolution_flags |= 16807 BCM_STAT_FLEX_PKT_TYPE_PKT_IS_1588 ; 16808 break; 16809 case bcmStatGroupModeAttrPktTypeKnownL2UC: 16810 flex_attribute->combine_attr_counter[counter_offset]. 16811 pkt_resolution_flags |= 16812 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2UC_PKT ; 16813 break; 16814 case bcmStatGroupModeAttrPktTypeUnknownL2UC: 16815 flex_attribute->combine_attr_counter[counter_offset]. 16816 pkt_resolution_flags |= 16817 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L2UC_PKT ; 16818 break; 16819 case bcmStatGroupModeAttrPktTypeL2BC: 16820 flex_attribute->combine_attr_counter[counter_offset]. 16821 pkt_resolution_flags |= 16822 BCM_STAT_FLEX_PKT_TYPE_L2BC_PKT ; 16823 break; 16824 case bcmStatGroupModeAttrPktTypeKnownL2MC: 16825 flex_attribute->combine_attr_counter[counter_offset]. 16826 pkt_resolution_flags |= 16827 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2MC_PKT ; 16828 break; 16829 case bcmStatGroupModeAttrPktTypeUnknownL2MC: 16830 flex_attribute->combine_attr_counter[counter_offset]. 16831 pkt_resolution_flags |= 16832 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L2MC_PKT ; 16833 break; 16834 case bcmStatGroupModeAttrPktTypeKnownL3UC: 16835 flex_attribute->combine_attr_counter[counter_offset]. 16836 pkt_resolution_flags |= 16837 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L3UC_PKT ; 16838 break; 16839 case bcmStatGroupModeAttrPktTypeUnknownL3UC: 16840 flex_attribute->combine_attr_counter[counter_offset]. 16841 pkt_resolution_flags |= 16842 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L3UC_PKT ; 16843 break; 16844 case bcmStatGroupModeAttrPktTypeKnownIPMC : 16845 flex_attribute->combine_attr_counter[counter_offset]. 16846 pkt_resolution_flags |= 16847 BCM_STAT_FLEX_PKT_TYPE_KNOWN_IPMC_PKT ; 16848 break; 16849 case bcmStatGroupModeAttrPktTypeUnknownIPMC : 16850 flex_attribute->combine_attr_counter[counter_offset]. 16851 pkt_resolution_flags |= 16852 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_IPMC_PKT ; 16853 break; 16854 case bcmStatGroupModeAttrPktTypeKnownMplsL2 : 16855 flex_attribute->combine_attr_counter[counter_offset]. 16856 pkt_resolution_flags |= 16857 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_L2_PKT ; 16858 break; 16859 case bcmStatGroupModeAttrPktTypeKnownMplsL3 : 16860 flex_attribute->combine_attr_counter[counter_offset]. 16861 pkt_resolution_flags |= 16862 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_L3_PKT ; 16863 break; 16864 case bcmStatGroupModeAttrPktTypeKnownMpls : 16865 flex_attribute->combine_attr_counter[counter_offset]. 16866 pkt_resolution_flags |= 16867 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_PKT ; 16868 break; 16869 case bcmStatGroupModeAttrPktTypeUnknownMpls : 16870 flex_attribute->combine_attr_counter[counter_offset]. 16871 pkt_resolution_flags |= 16872 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_MPLS_PKT ; 16873 break; 16874 case bcmStatGroupModeAttrPktTypeKnownMplsMulticast: 16875 flex_attribute->combine_attr_counter[counter_offset]. 16876 pkt_resolution_flags |= 16877 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_MULTICAST_PKT ; 16878 break; 16879 case bcmStatGroupModeAttrPktTypeKnownMim: 16880 flex_attribute->combine_attr_counter[counter_offset]. 16881 pkt_resolution_flags |= 16882 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MIM_PKT ; 16883 break; 16884 case bcmStatGroupModeAttrPktTypeUnknownMim: 16885 flex_attribute->combine_attr_counter[counter_offset]. 16886 pkt_resolution_flags |= 16887 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_MIM_PKT ; 16888 break; 16889 case bcmStatGroupModeAttrPktTypeKnownTrill: 16890 flex_attribute->combine_attr_counter[counter_offset]. 16891 pkt_resolution_flags |= 16892 BCM_STAT_FLEX_PKT_TYPE_KNOWN_TRILL_PKT ; 16893 break; 16894 case bcmStatGroupModeAttrPktTypeUnknownTrill: 16895 flex_attribute->combine_attr_counter[counter_offset]. 16896 pkt_resolution_flags |= 16897 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_TRILL_PKT ; 16898 break; 16899 case bcmStatGroupModeAttrPktTypeKnownNiv: 16900 flex_attribute->combine_attr_counter[counter_offset]. 16901 pkt_resolution_flags |= 16902 BCM_STAT_FLEX_PKT_TYPE_KNOWN_NIV_PKT ; 16903 break; 16904 case bcmStatGroupModeAttrPktTypeUnknownNiv: 16905 flex_attribute->combine_attr_counter[counter_offset]. 16906 pkt_resolution_flags |= 16907 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_NIV_PKT ; 16908 break; 16909 case bcmStatGroupModeAttrPktTypeAll: 16910 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 16911 flex_attribute->combine_attr_counter[counter_offset]. 16912 pkt_resolution_flags |= ( 16913 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_PKT | 16914 BCM_STAT_FLEX_PKT_TYPE_CONTROL_PKT | 16915 BCM_STAT_FLEX_PKT_TYPE_OAM_PKT | 16916 BCM_STAT_FLEX_PKT_TYPE_BFD_PKT | 16917 BCM_STAT_FLEX_PKT_TYPE_BPDU_PKT | 16918 BCM_STAT_FLEX_PKT_TYPE_ICNM_PKT | 16919 BCM_STAT_FLEX_PKT_TYPE_PKT_IS_1588 | 16920 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2UC_PKT | 16921 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L2UC_PKT | 16922 BCM_STAT_FLEX_PKT_TYPE_L2BC_PKT | 16923 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2MC_PKT | 16924 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L2MC_PKT | 16925 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L3UC_PKT | 16926 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L3UC_PKT | 16927 BCM_STAT_FLEX_PKT_TYPE_KNOWN_IPMC_PKT | 16928 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_IPMC_PKT | 16929 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_L2_PKT | 16930 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_L3_PKT | 16931 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_PKT | 16932 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_MPLS_PKT | 16933 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_MULTICAST_PKT | 16934 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MIM_PKT | 16935 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_MIM_PKT | 16936 BCM_STAT_FLEX_PKT_TYPE_KNOWN_TRILL_PKT | 16937 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_TRILL_PKT | 16938 BCM_STAT_FLEX_PKT_TYPE_KNOWN_NIV_PKT | 16939 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_NIV_PKT ); 16940 #if defined(BCM_TRIDENT2_SUPPORT) 16941 if (SOC_IS_TD2_TT2(unit)) { 16942 flex_attribute->combine_attr_counter[counter_offset]. 16943 pkt_resolution_flags |= ( 16944 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2GRE_PKT | 16945 BCM_STAT_FLEX_PKT_TYPE_KNOWN_VXLAN_PKT | 16946 BCM_STAT_FLEX_PKT_TYPE_KNOWN_FCOE_PKT | 16947 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_FCOE_PKT ); 16948 } 16949 #endif 16950 break; 16951 default: 16952 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 16953 (BSL_META_U(unit, 16954 "BAD PARAM(PktType)" 16955 ":sel=%d offset=%d attr=%d value=%d\n"), 16956 sel, counter_offset , attr, attr_value )); 16957 return BCM_E_PARAM; 16958 } 16959 16960 if (soc_feature(unit, soc_feature_flex_stat_compression_share)) { 16961 flex_attribute->combine_pkt_resolution_flags |= 16962 flex_attribute->combine_attr_counter[counter_offset]. 16963 pkt_resolution_flags; 16964 } 16965 break; 16966 case bcmStatGroupModeAttrClassType: 16967 #ifdef BCM_KATANA2_SUPPORT 16968 if soc_feature(unit, soc_feature_flex_stat_attributes_class) { 16969 flex_attribute->pkt_resolution = 1; 16970 if (attr_value) { 16971 attr_value--; 16972 } else { 16973 return BCM_E_PARAM; 16974 } 16975 iter = 0; 16976 BCM_STAT_FLEX_VALUE_SET( 16977 flex_attribute->combine_attr_counter[counter_offset]. 16978 value_array[bcmStatFlexAttrComb], attr_value); 16979 while (class_attr_comb[unit].class_pkt_attr_comb[attr_value][iter] != 0) { 16980 switch(class_attr_comb[unit].class_pkt_attr_comb[attr_value][iter]) { 16981 case bcmStatGroupModeAttrPktTypeUnknown: 16982 flex_attribute->combine_attr_counter[counter_offset]. 16983 pkt_resolution_flags |= 16984 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_PKT; 16985 iter++; 16986 break; 16987 case bcmStatGroupModeAttrPktTypeControl: 16988 flex_attribute->combine_attr_counter[counter_offset]. 16989 pkt_resolution_flags |= 16990 BCM_STAT_FLEX_PKT_TYPE_CONTROL_PKT ; 16991 iter++; 16992 break; 16993 case bcmStatGroupModeAttrPktTypeOAM: 16994 flex_attribute->combine_attr_counter[counter_offset]. 16995 pkt_resolution_flags |= 16996 BCM_STAT_FLEX_PKT_TYPE_OAM_PKT ; 16997 iter++; 16998 break; 16999 case bcmStatGroupModeAttrPktTypeBFD: 17000 flex_attribute->combine_attr_counter[counter_offset]. 17001 pkt_resolution_flags |= 17002 BCM_STAT_FLEX_PKT_TYPE_BFD_PKT ; 17003 iter++; 17004 break; 17005 case bcmStatGroupModeAttrPktTypeBPDU: 17006 flex_attribute->combine_attr_counter[counter_offset]. 17007 pkt_resolution_flags |= 17008 BCM_STAT_FLEX_PKT_TYPE_BPDU_PKT ; 17009 iter++; 17010 break; 17011 case bcmStatGroupModeAttrPktTypeICNM: 17012 flex_attribute->combine_attr_counter[counter_offset]. 17013 pkt_resolution_flags |= 17014 BCM_STAT_FLEX_PKT_TYPE_ICNM_PKT ; 17015 iter++; 17016 break; 17017 case bcmStatGroupModeAttrPktType1588: 17018 flex_attribute->combine_attr_counter[counter_offset]. 17019 pkt_resolution_flags |= 17020 BCM_STAT_FLEX_PKT_TYPE_PKT_IS_1588 ; 17021 iter++; 17022 break; 17023 case bcmStatGroupModeAttrPktTypeKnownL2UC: 17024 flex_attribute->combine_attr_counter[counter_offset]. 17025 pkt_resolution_flags |= 17026 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2UC_PKT ; 17027 iter++; 17028 break; 17029 case bcmStatGroupModeAttrPktTypeUnknownL2UC: 17030 flex_attribute->combine_attr_counter[counter_offset]. 17031 pkt_resolution_flags |= 17032 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L2UC_PKT ; 17033 iter++; 17034 break; 17035 case bcmStatGroupModeAttrPktTypeL2BC: 17036 flex_attribute->combine_attr_counter[counter_offset]. 17037 pkt_resolution_flags |= 17038 BCM_STAT_FLEX_PKT_TYPE_L2BC_PKT ; 17039 iter++; 17040 break; 17041 case bcmStatGroupModeAttrPktTypeKnownL2MC: 17042 flex_attribute->combine_attr_counter[counter_offset]. 17043 pkt_resolution_flags |= 17044 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2MC_PKT ; 17045 iter++; 17046 break; 17047 case bcmStatGroupModeAttrPktTypeUnknownL2MC: 17048 flex_attribute->combine_attr_counter[counter_offset]. 17049 pkt_resolution_flags |= 17050 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L2MC_PKT ; 17051 iter++; 17052 break; 17053 case bcmStatGroupModeAttrPktTypeKnownL3UC: 17054 flex_attribute->combine_attr_counter[counter_offset]. 17055 pkt_resolution_flags |= 17056 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L3UC_PKT ; 17057 iter++; 17058 break; 17059 case bcmStatGroupModeAttrPktTypeUnknownL3UC: 17060 flex_attribute->combine_attr_counter[counter_offset]. 17061 pkt_resolution_flags |= 17062 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L3UC_PKT ; 17063 iter++; 17064 break; 17065 case bcmStatGroupModeAttrPktTypeKnownIPMC : 17066 flex_attribute->combine_attr_counter[counter_offset]. 17067 pkt_resolution_flags |= 17068 BCM_STAT_FLEX_PKT_TYPE_KNOWN_IPMC_PKT ; 17069 iter++; 17070 break; 17071 case bcmStatGroupModeAttrPktTypeUnknownIPMC : 17072 flex_attribute->combine_attr_counter[counter_offset]. 17073 pkt_resolution_flags |= 17074 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_IPMC_PKT ; 17075 iter++; 17076 break; 17077 case bcmStatGroupModeAttrPktTypeKnownMplsL2 : 17078 flex_attribute->combine_attr_counter[counter_offset]. 17079 pkt_resolution_flags |= 17080 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_L2_PKT ; 17081 iter++; 17082 break; 17083 case bcmStatGroupModeAttrPktTypeKnownMplsL3 : 17084 flex_attribute->combine_attr_counter[counter_offset]. 17085 pkt_resolution_flags |= 17086 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_L3_PKT ; 17087 iter++; 17088 break; 17089 case bcmStatGroupModeAttrPktTypeKnownMpls : 17090 flex_attribute->combine_attr_counter[counter_offset]. 17091 pkt_resolution_flags |= 17092 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_PKT ; 17093 iter++; 17094 break; 17095 case bcmStatGroupModeAttrPktTypeUnknownMpls : 17096 flex_attribute->combine_attr_counter[counter_offset]. 17097 pkt_resolution_flags |= 17098 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_MPLS_PKT ; 17099 iter++; 17100 break; 17101 case bcmStatGroupModeAttrPktTypeKnownMplsMulticast: 17102 flex_attribute->combine_attr_counter[counter_offset]. 17103 pkt_resolution_flags |= 17104 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_MULTICAST_PKT ; 17105 iter++; 17106 break; 17107 case bcmStatGroupModeAttrPktTypeKnownMim: 17108 flex_attribute->combine_attr_counter[counter_offset]. 17109 pkt_resolution_flags |= 17110 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MIM_PKT ; 17111 iter++; 17112 break; 17113 case bcmStatGroupModeAttrPktTypeUnknownMim: 17114 flex_attribute->combine_attr_counter[counter_offset]. 17115 pkt_resolution_flags |= 17116 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_MIM_PKT ; 17117 iter++; 17118 break; 17119 case bcmStatGroupModeAttrPktTypeKnownTrill: 17120 flex_attribute->combine_attr_counter[counter_offset]. 17121 pkt_resolution_flags |= 17122 BCM_STAT_FLEX_PKT_TYPE_KNOWN_TRILL_PKT ; 17123 iter++; 17124 break; 17125 case bcmStatGroupModeAttrPktTypeUnknownTrill: 17126 flex_attribute->combine_attr_counter[counter_offset]. 17127 pkt_resolution_flags |= 17128 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_TRILL_PKT ; 17129 iter++; 17130 break; 17131 case bcmStatGroupModeAttrPktTypeKnownNiv: 17132 flex_attribute->combine_attr_counter[counter_offset]. 17133 pkt_resolution_flags |= 17134 BCM_STAT_FLEX_PKT_TYPE_KNOWN_NIV_PKT ; 17135 iter++; 17136 break; 17137 case bcmStatGroupModeAttrPktTypeUnknownNiv: 17138 flex_attribute->combine_attr_counter[counter_offset]. 17139 pkt_resolution_flags |= 17140 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_NIV_PKT ; 17141 iter++; 17142 break; 17143 case bcmStatGroupModeAttrPktTypeAll: 17144 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 17145 flex_attribute->combine_attr_counter[counter_offset]. 17146 pkt_resolution_flags |= ( 17147 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_PKT | 17148 BCM_STAT_FLEX_PKT_TYPE_CONTROL_PKT | 17149 BCM_STAT_FLEX_PKT_TYPE_OAM_PKT | 17150 BCM_STAT_FLEX_PKT_TYPE_BFD_PKT | 17151 BCM_STAT_FLEX_PKT_TYPE_BPDU_PKT | 17152 BCM_STAT_FLEX_PKT_TYPE_ICNM_PKT | 17153 BCM_STAT_FLEX_PKT_TYPE_PKT_IS_1588 | 17154 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2UC_PKT | 17155 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L2UC_PKT | 17156 BCM_STAT_FLEX_PKT_TYPE_L2BC_PKT | 17157 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L2MC_PKT | 17158 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L2MC_PKT | 17159 BCM_STAT_FLEX_PKT_TYPE_KNOWN_L3UC_PKT | 17160 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_L3UC_PKT | 17161 BCM_STAT_FLEX_PKT_TYPE_KNOWN_IPMC_PKT | 17162 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_IPMC_PKT | 17163 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_L2_PKT | 17164 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_L3_PKT | 17165 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_PKT | 17166 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_MPLS_PKT | 17167 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MPLS_MULTICAST_PKT | 17168 BCM_STAT_FLEX_PKT_TYPE_KNOWN_MIM_PKT | 17169 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_MIM_PKT | 17170 BCM_STAT_FLEX_PKT_TYPE_KNOWN_TRILL_PKT | 17171 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_TRILL_PKT | 17172 BCM_STAT_FLEX_PKT_TYPE_KNOWN_NIV_PKT | 17173 BCM_STAT_FLEX_PKT_TYPE_UNKNOWN_NIV_PKT ); 17174 break; 17175 default: 17176 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 17177 (BSL_META_U(unit, 17178 "BAD PARAM(PktType)" 17179 ":sel=%d offset=%d attr=%d value=%d\n"), 17180 sel, counter_offset , attr, 17181 class_attr_comb[unit].class_pkt_attr_comb[attr_value][iter] )); 17182 return BCM_E_PARAM; 17183 } 17184 } 17185 17186 if (soc_feature(unit, soc_feature_flex_stat_compression_share)) { 17187 flex_attribute->combine_pkt_resolution_flags |= 17188 flex_attribute->combine_attr_counter[counter_offset]. 17189 pkt_resolution_flags; 17190 BCM_STAT_FLEX_VALUE_SET( 17191 flex_attribute->combine_value_array[bcmStatFlexAttrComb], attr_value); 17192 } 17193 } 17194 #endif 17195 break; 17196 case bcmStatGroupModeAttrIngNetworkGroup: 17197 flex_attribute->svp = 1; 17198 if (flags & BCM_STAT_GROUP_MODE_INGRESS) { 17199 max_value = (1 << ing_pkt_attr_uncmprsd_bits_g[unit].svp_type) - 1; 17200 } else { 17201 max_value = (1 << egr_pkt_attr_uncmprsd_bits_g[unit].svp_type) - 1; 17202 } 17203 switch(attr_value) { 17204 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 17205 for(value=0;value <= max_value ; value++) { 17206 BCM_STAT_FLEX_VALUE_SET( 17207 flex_attribute->combine_attr_counter[counter_offset]. 17208 value_array[bcmStatFlexAttrSvp], value); 17209 } 17210 break; 17211 default: 17212 if (attr_value > max_value) { 17213 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 17214 (BSL_META_U(unit, 17215 "BAD PARAM(Svp)" 17216 ":sel=%d offset=%d attr=%d value=%d\n"), 17217 sel, counter_offset , attr, attr_value )); 17218 return BCM_E_PARAM; 17219 } 17220 BCM_STAT_FLEX_VALUE_SET( 17221 flex_attribute->combine_attr_counter[counter_offset]. 17222 value_array[bcmStatFlexAttrSvp], attr_value); 17223 break; 17224 } 17225 break; 17226 case bcmStatGroupModeAttrEgrNetworkGroup: 17227 flex_attribute->dvp = 1; 17228 if (flags & BCM_STAT_GROUP_MODE_INGRESS) { 17229 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 17230 (BSL_META_U(unit, 17231 "BAD PARAM(DVP) for Ingress Direction\n"))); 17232 return BCM_E_PARAM; 17233 } else { 17234 max_value = (1 << egr_pkt_attr_uncmprsd_bits_g[unit].dvp_type) - 1; 17235 } 17236 switch(attr_value) { 17237 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 17238 for(value=0;value <= max_value ; value++) { 17239 BCM_STAT_FLEX_VALUE_SET( 17240 flex_attribute->combine_attr_counter[counter_offset]. 17241 value_array[bcmStatFlexAttrDvp], value); 17242 } 17243 break; 17244 default: 17245 if (attr_value > max_value) { 17246 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 17247 (BSL_META_U(unit, 17248 "BAD PARAM(Dvp)" 17249 ":sel=%d offset=%d attr=%d value=%d\n"), 17250 sel, counter_offset , attr, attr_value )); 17251 return BCM_E_PARAM; 17252 } 17253 BCM_STAT_FLEX_VALUE_SET( 17254 flex_attribute->combine_attr_counter[counter_offset]. 17255 value_array[bcmStatFlexAttrDvp], attr_value); 17256 break; 17257 } 17258 break; 17259 case bcmStatGroupModeAttrDrop: 17260 flex_attribute->drop = 1; 17261 switch(attr_value) { 17262 case 0: 17263 flex_attribute->combine_attr_counter[counter_offset]. 17264 drop_flags |= BCM_STAT_FLEX_DROP_DISABLE; 17265 break; 17266 case 1: 17267 flex_attribute->combine_attr_counter[counter_offset]. 17268 drop_flags |= BCM_STAT_FLEX_DROP_ENABLE; 17269 break; 17270 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 17271 flex_attribute->combine_attr_counter[counter_offset]. 17272 drop_flags |= (BCM_STAT_FLEX_DROP_ENABLE | 17273 BCM_STAT_FLEX_DROP_DISABLE); 17274 break; 17275 default: 17276 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 17277 (BSL_META_U(unit, 17278 "BAD PARAM(DropType)" 17279 ":sel=%d offset=%d attr=%d value=%d\n"), 17280 sel, counter_offset , attr, attr_value )); 17281 return BCM_E_PARAM; 17282 } 17283 17284 if (soc_feature(unit, soc_feature_flex_stat_compression_share)) { 17285 flex_attribute->combine_drop_flags |= 17286 flex_attribute->combine_attr_counter[counter_offset]. 17287 drop_flags; 17288 } 17289 break; 17290 case bcmStatGroupModeAttrPacketTypeIp: 17291 flex_attribute->ip_pkt = 1; 17292 switch(attr_value) { 17293 case 0: 17294 flex_attribute->combine_attr_counter[counter_offset]. 17295 ip_pkt_flags |= BCM_STAT_FLEX_IP_PKT_DISABLE; 17296 break; 17297 case 1: 17298 flex_attribute->combine_attr_counter[counter_offset]. 17299 ip_pkt_flags |= BCM_STAT_FLEX_IP_PKT_ENABLE; 17300 break; 17301 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 17302 flex_attribute->combine_attr_counter[counter_offset]. 17303 ip_pkt_flags |= (BCM_STAT_FLEX_IP_PKT_ENABLE | 17304 BCM_STAT_FLEX_IP_PKT_DISABLE); 17305 break; 17306 default: 17307 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 17308 (BSL_META_U(unit, 17309 "BAD PARAM(Ip)" 17310 ":sel=%d offset=%d attr=%d value=%d\n"), 17311 sel, counter_offset , attr, attr_value )); 17312 return BCM_E_PARAM; 17313 } 17314 17315 if (soc_feature(unit, soc_feature_flex_stat_compression_share)) { 17316 flex_attribute->combine_ip_pkt_flags |= 17317 flex_attribute->combine_attr_counter[counter_offset]. 17318 ip_pkt_flags; 17319 } 17320 break; 17321 #ifdef BCM_APACHE_SUPPORT 17322 case bcmStatGroupModeAttrColorMplsLabelFirst: 17323 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 17324 flex_attribute->cng_1 = 1; 17325 switch(attr_value) { 17326 case bcmColorGreen: 17327 flex_attribute->combine_attr_counter[counter_offset]. 17328 pre_ifp_color_mpls_label1_flags |= BCM_STAT_FLEX_COLOR_GREEN; 17329 break; 17330 case bcmColorYellow: 17331 flex_attribute->combine_attr_counter[counter_offset]. 17332 pre_ifp_color_mpls_label1_flags |= BCM_STAT_FLEX_COLOR_YELLOW; 17333 break; 17334 case bcmColorRed: 17335 flex_attribute->combine_attr_counter[counter_offset]. 17336 pre_ifp_color_mpls_label1_flags |= BCM_STAT_FLEX_COLOR_RED; 17337 break; 17338 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 17339 flex_attribute->combine_attr_counter[counter_offset]. 17340 pre_ifp_color_mpls_label1_flags |= (BCM_STAT_FLEX_COLOR_GREEN | 17341 BCM_STAT_FLEX_COLOR_YELLOW | 17342 BCM_STAT_FLEX_COLOR_RED); 17343 17344 break; 17345 17346 default: 17347 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 17348 (BSL_META_U(unit, 17349 "BAD PARAM(ColorMplsLabelFirst)" 17350 ":sel=%d offset=%d attr=%d value=%d\n"), 17351 sel, counter_offset , attr, attr_value )); 17352 return BCM_E_PARAM; 17353 } 17354 } else { 17355 return BCM_E_UNAVAIL; 17356 } 17357 break; 17358 case bcmStatGroupModeAttrIntPriMplsLabelFirst: 17359 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 17360 flex_attribute->phb_1 = 1; 17361 switch(attr_value) { 17362 case 0: 17363 flex_attribute->combine_attr_counter[counter_offset]. 17364 int_pri_mpls_label1_flags |= BCM_STAT_FLEX_PRI0; 17365 break; 17366 case 1: 17367 flex_attribute->combine_attr_counter[counter_offset]. 17368 int_pri_mpls_label1_flags |= BCM_STAT_FLEX_PRI1; 17369 break; 17370 case 2: 17371 flex_attribute->combine_attr_counter[counter_offset]. 17372 int_pri_mpls_label1_flags |= BCM_STAT_FLEX_PRI2; 17373 break; 17374 case 3: 17375 flex_attribute->combine_attr_counter[counter_offset]. 17376 int_pri_mpls_label1_flags |= BCM_STAT_FLEX_PRI3; 17377 break; 17378 case 4: 17379 flex_attribute->combine_attr_counter[counter_offset]. 17380 int_pri_mpls_label1_flags |= BCM_STAT_FLEX_PRI4; 17381 break; 17382 case 5: 17383 flex_attribute->combine_attr_counter[counter_offset]. 17384 int_pri_mpls_label1_flags |= BCM_STAT_FLEX_PRI5; 17385 break; 17386 case 6: 17387 flex_attribute->combine_attr_counter[counter_offset]. 17388 int_pri_mpls_label1_flags |= BCM_STAT_FLEX_PRI6; 17389 break; 17390 case 7: 17391 flex_attribute->combine_attr_counter[counter_offset]. 17392 int_pri_mpls_label1_flags |= BCM_STAT_FLEX_PRI7; 17393 break; 17394 case 8: 17395 flex_attribute->combine_attr_counter[counter_offset]. 17396 int_pri_mpls_label1_flags |= BCM_STAT_FLEX_PRI8; 17397 break; 17398 case 9: 17399 flex_attribute->combine_attr_counter[counter_offset]. 17400 int_pri_mpls_label1_flags |= BCM_STAT_FLEX_PRI9; 17401 break; 17402 case 10: 17403 flex_attribute->combine_attr_counter[counter_offset]. 17404 int_pri_mpls_label1_flags |= BCM_STAT_FLEX_PRI10; 17405 break; 17406 case 11: 17407 flex_attribute->combine_attr_counter[counter_offset]. 17408 int_pri_mpls_label1_flags |= BCM_STAT_FLEX_PRI11; 17409 break; 17410 case 12: 17411 flex_attribute->combine_attr_counter[counter_offset]. 17412 int_pri_mpls_label1_flags |= BCM_STAT_FLEX_PRI12; 17413 break; 17414 case 13: 17415 flex_attribute->combine_attr_counter[counter_offset]. 17416 int_pri_mpls_label1_flags |= BCM_STAT_FLEX_PRI13; 17417 break; 17418 case 14: 17419 flex_attribute->combine_attr_counter[counter_offset]. 17420 int_pri_mpls_label1_flags |= BCM_STAT_FLEX_PRI14; 17421 break; 17422 case 15: 17423 flex_attribute->combine_attr_counter[counter_offset]. 17424 int_pri_mpls_label1_flags |= BCM_STAT_FLEX_PRI15; 17425 break; 17426 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 17427 flex_attribute->combine_attr_counter[counter_offset]. 17428 int_pri_mpls_label1_flags |= (BCM_STAT_FLEX_PRI0 | 17429 BCM_STAT_FLEX_PRI1 | 17430 BCM_STAT_FLEX_PRI2 | 17431 BCM_STAT_FLEX_PRI3 | 17432 BCM_STAT_FLEX_PRI4 | 17433 BCM_STAT_FLEX_PRI5 | 17434 BCM_STAT_FLEX_PRI6 | 17435 BCM_STAT_FLEX_PRI7 | 17436 BCM_STAT_FLEX_PRI8 | 17437 BCM_STAT_FLEX_PRI9 | 17438 BCM_STAT_FLEX_PRI10 | 17439 BCM_STAT_FLEX_PRI11 | 17440 BCM_STAT_FLEX_PRI12 | 17441 BCM_STAT_FLEX_PRI13 | 17442 BCM_STAT_FLEX_PRI14 | 17443 BCM_STAT_FLEX_PRI15); 17444 break; 17445 default: 17446 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 17447 (BSL_META_U(unit, 17448 "BAD PARAM(IntPriMplsLabelFirst)" 17449 ":sel=%d offset=%d attr=%d value=%d\n"), 17450 sel, counter_offset , attr, attr_value )); 17451 return BCM_E_PARAM; 17452 } 17453 } else { 17454 return BCM_E_UNAVAIL; 17455 } 17456 break; 17457 case bcmStatGroupModeAttrColorMplsLabelSecond: 17458 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 17459 flex_attribute->cng_2 = 1; 17460 switch(attr_value) { 17461 case bcmColorGreen: 17462 flex_attribute->combine_attr_counter[counter_offset]. 17463 pre_ifp_color_mpls_label2_flags |= BCM_STAT_FLEX_COLOR_GREEN; 17464 break; 17465 case bcmColorYellow: 17466 flex_attribute->combine_attr_counter[counter_offset]. 17467 pre_ifp_color_mpls_label2_flags |= BCM_STAT_FLEX_COLOR_YELLOW; 17468 break; 17469 case bcmColorRed: 17470 flex_attribute->combine_attr_counter[counter_offset]. 17471 pre_ifp_color_mpls_label2_flags |= BCM_STAT_FLEX_COLOR_RED; 17472 break; 17473 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 17474 flex_attribute->combine_attr_counter[counter_offset]. 17475 pre_ifp_color_mpls_label2_flags |= (BCM_STAT_FLEX_COLOR_GREEN | 17476 BCM_STAT_FLEX_COLOR_YELLOW | 17477 BCM_STAT_FLEX_COLOR_RED); 17478 break; 17479 default: 17480 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 17481 (BSL_META_U(unit, 17482 "BAD PARAM(ColorMplsLabelSecond)" 17483 ":sel=%d offset=%d attr=%d value=%d\n"), 17484 sel, counter_offset , attr, attr_value )); 17485 return BCM_E_PARAM; 17486 } 17487 } else { 17488 return BCM_E_UNAVAIL; 17489 } 17490 break; 17491 case bcmStatGroupModeAttrIntPriMplsLabelSecond: 17492 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 17493 flex_attribute->phb_2 = 1; 17494 switch(attr_value) { 17495 case 0: 17496 flex_attribute->combine_attr_counter[counter_offset]. 17497 int_pri_mpls_label2_flags |= BCM_STAT_FLEX_PRI0; 17498 break; 17499 case 1: 17500 flex_attribute->combine_attr_counter[counter_offset]. 17501 int_pri_mpls_label2_flags |= BCM_STAT_FLEX_PRI1; 17502 break; 17503 case 2: 17504 flex_attribute->combine_attr_counter[counter_offset]. 17505 int_pri_mpls_label2_flags |= BCM_STAT_FLEX_PRI2; 17506 break; 17507 case 3: 17508 flex_attribute->combine_attr_counter[counter_offset]. 17509 int_pri_mpls_label2_flags |= BCM_STAT_FLEX_PRI3; 17510 break; 17511 case 4: 17512 flex_attribute->combine_attr_counter[counter_offset]. 17513 int_pri_mpls_label2_flags |= BCM_STAT_FLEX_PRI4; 17514 break; 17515 case 5: 17516 flex_attribute->combine_attr_counter[counter_offset]. 17517 int_pri_mpls_label2_flags |= BCM_STAT_FLEX_PRI5; 17518 break; 17519 case 6: 17520 flex_attribute->combine_attr_counter[counter_offset]. 17521 int_pri_mpls_label2_flags |= BCM_STAT_FLEX_PRI6; 17522 break; 17523 case 7: 17524 flex_attribute->combine_attr_counter[counter_offset]. 17525 int_pri_mpls_label2_flags |= BCM_STAT_FLEX_PRI7; 17526 break; 17527 case 8: 17528 flex_attribute->combine_attr_counter[counter_offset]. 17529 int_pri_mpls_label2_flags |= BCM_STAT_FLEX_PRI8; 17530 break; 17531 case 9: 17532 flex_attribute->combine_attr_counter[counter_offset]. 17533 int_pri_mpls_label2_flags |= BCM_STAT_FLEX_PRI9; 17534 break; 17535 case 10: 17536 flex_attribute->combine_attr_counter[counter_offset]. 17537 int_pri_mpls_label2_flags |= BCM_STAT_FLEX_PRI10; 17538 break; 17539 case 11: 17540 flex_attribute->combine_attr_counter[counter_offset]. 17541 int_pri_mpls_label2_flags |= BCM_STAT_FLEX_PRI11; 17542 break; 17543 case 12: 17544 flex_attribute->combine_attr_counter[counter_offset]. 17545 int_pri_mpls_label2_flags |= BCM_STAT_FLEX_PRI12; 17546 break; 17547 case 13: 17548 flex_attribute->combine_attr_counter[counter_offset]. 17549 int_pri_mpls_label2_flags |= BCM_STAT_FLEX_PRI13; 17550 break; 17551 case 14: 17552 flex_attribute->combine_attr_counter[counter_offset]. 17553 int_pri_mpls_label2_flags |= BCM_STAT_FLEX_PRI14; 17554 break; 17555 case 15: 17556 flex_attribute->combine_attr_counter[counter_offset]. 17557 int_pri_mpls_label2_flags |= BCM_STAT_FLEX_PRI15; 17558 break; 17559 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 17560 flex_attribute->combine_attr_counter[counter_offset]. 17561 int_pri_mpls_label2_flags |= (BCM_STAT_FLEX_PRI0 | 17562 BCM_STAT_FLEX_PRI1 | 17563 BCM_STAT_FLEX_PRI2 | 17564 BCM_STAT_FLEX_PRI3 | 17565 BCM_STAT_FLEX_PRI4 | 17566 BCM_STAT_FLEX_PRI5 | 17567 BCM_STAT_FLEX_PRI6 | 17568 BCM_STAT_FLEX_PRI7 | 17569 BCM_STAT_FLEX_PRI8 | 17570 BCM_STAT_FLEX_PRI9 | 17571 BCM_STAT_FLEX_PRI10 | 17572 BCM_STAT_FLEX_PRI11 | 17573 BCM_STAT_FLEX_PRI12 | 17574 BCM_STAT_FLEX_PRI13 | 17575 BCM_STAT_FLEX_PRI14 | 17576 BCM_STAT_FLEX_PRI15); 17577 break; 17578 default: 17579 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 17580 (BSL_META_U(unit, 17581 "BAD PARAM(IntPriMplsLabelSecond)" 17582 ":sel=%d offset=%d attr=%d value=%d\n"), 17583 sel, counter_offset , attr, attr_value )); 17584 return BCM_E_PARAM; 17585 } 17586 } else { 17587 return BCM_E_UNAVAIL; 17588 } 17589 break; 17590 case bcmStatGroupModeAttrColorMplsLabelThird: 17591 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 17592 flex_attribute->cng_3 = 1; 17593 switch(attr_value) { 17594 case bcmColorGreen: 17595 flex_attribute->combine_attr_counter[counter_offset]. 17596 pre_ifp_color_mpls_label3_flags |= BCM_STAT_FLEX_COLOR_GREEN; 17597 break; 17598 case bcmColorYellow: 17599 flex_attribute->combine_attr_counter[counter_offset]. 17600 pre_ifp_color_mpls_label3_flags |= BCM_STAT_FLEX_COLOR_YELLOW; 17601 break; 17602 case bcmColorRed: 17603 flex_attribute->combine_attr_counter[counter_offset]. 17604 pre_ifp_color_mpls_label3_flags |= BCM_STAT_FLEX_COLOR_RED; 17605 break; 17606 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 17607 flex_attribute->combine_attr_counter[counter_offset]. 17608 pre_ifp_color_mpls_label3_flags |= (BCM_STAT_FLEX_COLOR_GREEN | 17609 BCM_STAT_FLEX_COLOR_YELLOW | 17610 BCM_STAT_FLEX_COLOR_RED); 17611 break; 17612 default: 17613 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 17614 (BSL_META_U(unit, 17615 "BAD PARAM(ColorMplsLabelThird)" 17616 ":sel=%d offset=%d attr=%d value=%d\n"), 17617 sel, counter_offset , attr, attr_value )); 17618 return BCM_E_PARAM; 17619 } 17620 } else { 17621 return BCM_E_UNAVAIL; 17622 } 17623 break; 17624 case bcmStatGroupModeAttrIntPriMplsLabelThird: 17625 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 17626 flex_attribute->phb_3 = 1; 17627 switch(attr_value) { 17628 case 0: 17629 flex_attribute->combine_attr_counter[counter_offset]. 17630 int_pri_mpls_label3_flags |= BCM_STAT_FLEX_PRI0; 17631 break; 17632 case 1: 17633 flex_attribute->combine_attr_counter[counter_offset]. 17634 int_pri_mpls_label3_flags |= BCM_STAT_FLEX_PRI1; 17635 break; 17636 case 2: 17637 flex_attribute->combine_attr_counter[counter_offset]. 17638 int_pri_mpls_label3_flags |= BCM_STAT_FLEX_PRI2; 17639 break; 17640 case 3: 17641 flex_attribute->combine_attr_counter[counter_offset]. 17642 int_pri_mpls_label3_flags |= BCM_STAT_FLEX_PRI3; 17643 break; 17644 case 4: 17645 flex_attribute->combine_attr_counter[counter_offset]. 17646 int_pri_mpls_label3_flags |= BCM_STAT_FLEX_PRI4; 17647 break; 17648 case 5: 17649 flex_attribute->combine_attr_counter[counter_offset]. 17650 int_pri_mpls_label3_flags |= BCM_STAT_FLEX_PRI5; 17651 break; 17652 case 6: 17653 flex_attribute->combine_attr_counter[counter_offset]. 17654 int_pri_mpls_label3_flags |= BCM_STAT_FLEX_PRI6; 17655 break; 17656 case 7: 17657 flex_attribute->combine_attr_counter[counter_offset]. 17658 int_pri_mpls_label3_flags |= BCM_STAT_FLEX_PRI7; 17659 break; 17660 case 8: 17661 flex_attribute->combine_attr_counter[counter_offset]. 17662 int_pri_mpls_label3_flags |= BCM_STAT_FLEX_PRI8; 17663 break; 17664 case 9: 17665 flex_attribute->combine_attr_counter[counter_offset]. 17666 int_pri_mpls_label3_flags |= BCM_STAT_FLEX_PRI9; 17667 break; 17668 case 10: 17669 flex_attribute->combine_attr_counter[counter_offset]. 17670 int_pri_mpls_label3_flags |= BCM_STAT_FLEX_PRI10; 17671 break; 17672 case 11: 17673 flex_attribute->combine_attr_counter[counter_offset]. 17674 int_pri_mpls_label3_flags |= BCM_STAT_FLEX_PRI11; 17675 break; 17676 case 12: 17677 flex_attribute->combine_attr_counter[counter_offset]. 17678 int_pri_mpls_label3_flags |= BCM_STAT_FLEX_PRI12; 17679 break; 17680 case 13: 17681 flex_attribute->combine_attr_counter[counter_offset]. 17682 int_pri_mpls_label3_flags |= BCM_STAT_FLEX_PRI13; 17683 break; 17684 case 14: 17685 flex_attribute->combine_attr_counter[counter_offset]. 17686 int_pri_mpls_label3_flags |= BCM_STAT_FLEX_PRI14; 17687 break; 17688 case 15: 17689 flex_attribute->combine_attr_counter[counter_offset]. 17690 int_pri_mpls_label3_flags |= BCM_STAT_FLEX_PRI15; 17691 break; 17692 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 17693 flex_attribute->combine_attr_counter[counter_offset]. 17694 int_pri_mpls_label3_flags |= (BCM_STAT_FLEX_PRI0 | 17695 BCM_STAT_FLEX_PRI1 | 17696 BCM_STAT_FLEX_PRI2 | 17697 BCM_STAT_FLEX_PRI3 | 17698 BCM_STAT_FLEX_PRI4 | 17699 BCM_STAT_FLEX_PRI5 | 17700 BCM_STAT_FLEX_PRI6 | 17701 BCM_STAT_FLEX_PRI7 | 17702 BCM_STAT_FLEX_PRI8 | 17703 BCM_STAT_FLEX_PRI9 | 17704 BCM_STAT_FLEX_PRI10 | 17705 BCM_STAT_FLEX_PRI11 | 17706 BCM_STAT_FLEX_PRI12 | 17707 BCM_STAT_FLEX_PRI13 | 17708 BCM_STAT_FLEX_PRI14 | 17709 BCM_STAT_FLEX_PRI15); 17710 break; 17711 default: 17712 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 17713 (BSL_META_U(unit, 17714 "BAD PARAM(IntPriMplsLabelThird)" 17715 ":sel=%d offset=%d attr=%d value=%d\n"), 17716 sel, counter_offset , attr, attr_value )); 17717 return BCM_E_PARAM; 17718 } 17719 } else { 17720 return BCM_E_UNAVAIL; 17721 } 17722 break; 17723 #endif 17724 #if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TRIDENT3_SUPPORT) 17725 case bcmStatGroupModeAttrCos: 17726 if (soc_feature(unit, soc_feature_flex_stat_egr_queue_congestion_marked)) { 17727 flex_attribute->mmu_cos = 1; 17728 switch(attr_value) { 17729 case 0: 17730 flex_attribute->combine_attr_counter[counter_offset]. 17731 mmu_cos_flags |= BCM_STAT_FLEX_COS0; 17732 break; 17733 case 1: 17734 flex_attribute->combine_attr_counter[counter_offset]. 17735 mmu_cos_flags |= BCM_STAT_FLEX_COS1; 17736 break; 17737 case 2: 17738 flex_attribute->combine_attr_counter[counter_offset]. 17739 mmu_cos_flags |= BCM_STAT_FLEX_COS2; 17740 break; 17741 case 3: 17742 flex_attribute->combine_attr_counter[counter_offset]. 17743 mmu_cos_flags |= BCM_STAT_FLEX_COS3; 17744 break; 17745 case 4: 17746 flex_attribute->combine_attr_counter[counter_offset]. 17747 mmu_cos_flags |= BCM_STAT_FLEX_COS4; 17748 break; 17749 case 5: 17750 flex_attribute->combine_attr_counter[counter_offset]. 17751 mmu_cos_flags |= BCM_STAT_FLEX_COS5; 17752 break; 17753 case 6: 17754 flex_attribute->combine_attr_counter[counter_offset]. 17755 mmu_cos_flags |= BCM_STAT_FLEX_COS6; 17756 break; 17757 case 7: 17758 flex_attribute->combine_attr_counter[counter_offset]. 17759 mmu_cos_flags |= BCM_STAT_FLEX_COS7; 17760 break; 17761 case 8: 17762 flex_attribute->combine_attr_counter[counter_offset]. 17763 mmu_cos_flags |= BCM_STAT_FLEX_COS8; 17764 break; 17765 case 9: 17766 flex_attribute->combine_attr_counter[counter_offset]. 17767 mmu_cos_flags |= BCM_STAT_FLEX_COS9; 17768 break; 17769 case 10: 17770 flex_attribute->combine_attr_counter[counter_offset]. 17771 mmu_cos_flags |= BCM_STAT_FLEX_COS10; 17772 break; 17773 case 11: 17774 flex_attribute->combine_attr_counter[counter_offset]. 17775 mmu_cos_flags |= BCM_STAT_FLEX_COS11; 17776 break; 17777 case 12: 17778 flex_attribute->combine_attr_counter[counter_offset]. 17779 mmu_cos_flags |= BCM_STAT_FLEX_COS12; 17780 break; 17781 case 13: 17782 flex_attribute->combine_attr_counter[counter_offset]. 17783 mmu_cos_flags |= BCM_STAT_FLEX_COS13; 17784 break; 17785 case 14: 17786 flex_attribute->combine_attr_counter[counter_offset]. 17787 mmu_cos_flags |= BCM_STAT_FLEX_COS14; 17788 break; 17789 case 15: 17790 flex_attribute->combine_attr_counter[counter_offset]. 17791 mmu_cos_flags |= BCM_STAT_FLEX_COS15; 17792 break; 17793 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 17794 flex_attribute->combine_attr_counter[counter_offset]. 17795 mmu_cos_flags |= (BCM_STAT_FLEX_COS0 | 17796 BCM_STAT_FLEX_COS1 | 17797 BCM_STAT_FLEX_COS2 | 17798 BCM_STAT_FLEX_COS3 | 17799 BCM_STAT_FLEX_COS4 | 17800 BCM_STAT_FLEX_COS5 | 17801 BCM_STAT_FLEX_COS6 | 17802 BCM_STAT_FLEX_COS7 | 17803 BCM_STAT_FLEX_COS8 | 17804 BCM_STAT_FLEX_COS9 | 17805 BCM_STAT_FLEX_COS10 | 17806 BCM_STAT_FLEX_COS11 | 17807 BCM_STAT_FLEX_COS12 | 17808 BCM_STAT_FLEX_COS13 | 17809 BCM_STAT_FLEX_COS14 | 17810 BCM_STAT_FLEX_COS15); 17811 break; 17812 default: 17813 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 17814 (BSL_META_U(unit, 17815 "BAD PARAM(mmu_cos)" 17816 ":sel=%d offset=%d attr=%d value=%d\n"), 17817 sel, counter_offset , attr, attr_value )); 17818 return BCM_E_PARAM; 17819 } 17820 }else { 17821 return BCM_E_UNAVAIL; 17822 } 17823 17824 break; 17825 case bcmStatGroupModeAttrQueueType: 17826 if (soc_feature(unit, soc_feature_flex_stat_egr_queue_congestion_marked)) { 17827 flex_attribute->uc_queueing = 1; 17828 switch(attr_value) { 17829 case 0: 17830 flex_attribute->combine_attr_counter[counter_offset]. 17831 uc_queueing_flags |= BCM_STAT_FLEX_UC_QUEUEING_DISABLE; 17832 break; 17833 case 1: 17834 flex_attribute->combine_attr_counter[counter_offset]. 17835 uc_queueing_flags |= BCM_STAT_FLEX_UC_QUEUEING_ENABLE; 17836 break; 17837 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 17838 flex_attribute->combine_attr_counter[counter_offset]. 17839 uc_queueing_flags |= (BCM_STAT_FLEX_UC_QUEUEING_DISABLE | 17840 BCM_STAT_FLEX_UC_QUEUEING_ENABLE); 17841 break; 17842 default: 17843 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 17844 (BSL_META_U(unit, 17845 "BAD PARAM(uc_queueing)" 17846 ":sel=%d offset=%d attr=%d value=%d\n"), 17847 sel, counter_offset , attr, attr_value )); 17848 return BCM_E_PARAM; 17849 } 17850 } else { 17851 return BCM_E_UNAVAIL; 17852 } 17853 break; 17854 case bcmStatGroupModeAttrCongestionMarked: 17855 if (soc_feature(unit, soc_feature_flex_stat_egr_queue_congestion_marked)) { 17856 flex_attribute->congestion_marked = 1; 17857 switch(attr_value) { 17858 case 0: 17859 flex_attribute->combine_attr_counter[counter_offset]. 17860 congestion_marked_flags |= BCM_STAT_FLEX_CONGESTION_MARKED_DISABLE; 17861 break; 17862 case 1: 17863 flex_attribute->combine_attr_counter[counter_offset]. 17864 congestion_marked_flags |= BCM_STAT_FLEX_CONGESTION_MARKED_ENABLE; 17865 break; 17866 case BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES: 17867 flex_attribute->combine_attr_counter[counter_offset]. 17868 congestion_marked_flags |= (BCM_STAT_FLEX_CONGESTION_MARKED_DISABLE | 17869 BCM_STAT_FLEX_CONGESTION_MARKED_ENABLE); 17870 break; 17871 default: 17872 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 17873 (BSL_META_U(unit, 17874 "BAD PARAM(congestion_marked)" 17875 ":sel=%d offset=%d attr=%d value=%d\n"), 17876 sel, counter_offset , attr, attr_value )); 17877 return BCM_E_PARAM; 17878 } 17879 } else { 17880 return BCM_E_UNAVAIL; 17881 } 17882 17883 break; 17884 #endif 17885 case bcmStatGroupModeAttrTcpFlagsType: 17886 if (soc_feature(unit, soc_feature_flex_stat_ing_tcp_flags_support)) { 17887 flex_attribute->tcp_flags = 1; 17888 switch(attr_value) { 17889 case bcmStatGroupModeAttrTcpFlagsTypeSyn: 17890 flex_attribute->combine_attr_counter[counter_offset]. 17891 tcp_flags |= BCM_STAT_FLEX_TCP_FLAG_TYPE_SYN; 17892 break; 17893 case bcmStatGroupModeAttrTcpFlagsTypeFin: 17894 flex_attribute->combine_attr_counter[counter_offset]. 17895 tcp_flags |= BCM_STAT_FLEX_TCP_FLAG_TYPE_FIN; 17896 break; 17897 case bcmStatGroupModeAttrTcpFlagsTypeRst: 17898 flex_attribute->combine_attr_counter[counter_offset]. 17899 tcp_flags |= BCM_STAT_FLEX_TCP_FLAG_TYPE_RST; 17900 break; 17901 case bcmStatGroupModeAttrTcpFlagsTypePsh: 17902 flex_attribute->combine_attr_counter[counter_offset]. 17903 tcp_flags |= BCM_STAT_FLEX_TCP_FLAG_TYPE_PSH; 17904 break; 17905 case bcmStatGroupModeAttrTcpFlagsTypeAck: 17906 flex_attribute->combine_attr_counter[counter_offset]. 17907 tcp_flags |= BCM_STAT_FLEX_TCP_FLAG_TYPE_ACK; 17908 break; 17909 case bcmStatGroupModeAttrTcpFlagsTypeUrg: 17910 flex_attribute->combine_attr_counter[counter_offset]. 17911 tcp_flags |= BCM_STAT_FLEX_TCP_FLAG_TYPE_URG; 17912 break; 17913 case bcmStatGroupModeAttrTcpFlagsTypeEce: 17914 flex_attribute->combine_attr_counter[counter_offset]. 17915 tcp_flags |= BCM_STAT_FLEX_TCP_FLAG_TYPE_ECE; 17916 break; 17917 case bcmStatGroupModeAttrTcpFlagsTypeCwr: 17918 flex_attribute->combine_attr_counter[counter_offset]. 17919 tcp_flags |= BCM_STAT_FLEX_TCP_FLAG_TYPE_CWR; 17920 break; 17921 default: 17922 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 17923 (BSL_META_U(unit, 17924 "BAD PARAM(tcp_flags)" 17925 ":sel=%d offset=%d attr=%d value=%d\n"), 17926 sel, counter_offset , attr, attr_value )); 17927 return BCM_E_PARAM; 17928 } 17929 } else { 17930 return BCM_E_UNAVAIL; 17931 } 17932 break; 17933 case bcmStatGroupModeAttrIntCongestion: 17934 if (soc_feature(unit, soc_feature_flex_stat_int_cn_support)) { 17935 flex_attribute->int_cn = 1; 17936 switch(attr_value) { 17937 case 0: 17938 flex_attribute->combine_attr_counter[counter_offset]. 17939 int_cn |= BCM_STAT_FLEX_INT_CN0; 17940 break; 17941 case 1: 17942 flex_attribute->combine_attr_counter[counter_offset]. 17943 int_cn |= BCM_STAT_FLEX_INT_CN1; 17944 break; 17945 case 2: 17946 flex_attribute->combine_attr_counter[counter_offset]. 17947 int_cn |= BCM_STAT_FLEX_INT_CN2; 17948 break; 17949 case 3: 17950 flex_attribute->combine_attr_counter[counter_offset]. 17951 int_cn |= BCM_STAT_FLEX_INT_CN3; 17952 break; 17953 default: 17954 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 17955 (BSL_META_U(unit, 17956 "BAD PARAM(int_cn)" 17957 ":sel=%d offset=%d attr=%d value=%d\n"), 17958 sel, counter_offset , attr, attr_value )); 17959 return BCM_E_PARAM; 17960 } 17961 } else { 17962 return BCM_E_UNAVAIL; 17963 } 17964 break; 17965 17966 default: 17967 return BCM_E_PARAM; 17968 } 17969 } 17970 for (counter_offset = 0; 17971 counter_offset < total_counters ; 17972 counter_offset++) { 17973 if (flex_attribute->pre_ifp_color) { 17974 if (flex_attribute->combine_attr_counter[counter_offset]. 17975 pre_ifp_color_flags == 0) { 17976 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 17977 (BSL_META_U(unit, 17978 "PreIfpColor:Combination issue..Check parameters" 17979 "And Assign dummy attributes\n"))); 17980 return BCM_E_PARAM; 17981 } 17982 } 17983 if (flex_attribute->ifp_color) { 17984 if (flex_attribute->combine_attr_counter[counter_offset]. 17985 ifp_color_flags == 0) { 17986 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 17987 (BSL_META_U(unit, 17988 "IfpColor:Combination issue..Check parameters" 17989 17990 "And Assign dummy attributes\n"))); 17991 return BCM_E_PARAM; 17992 } 17993 } 17994 if (flex_attribute->int_pri) { 17995 if (flex_attribute->combine_attr_counter[counter_offset]. 17996 int_pri_flags == 0) { 17997 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 17998 (BSL_META_U(unit, 17999 "IntPri:Combination issue..Check parameters" 18000 "And Assign dummy attributes\n"))); 18001 return BCM_E_PARAM; 18002 } 18003 } 18004 if (flex_attribute->vlan_format) { 18005 if (flex_attribute->combine_attr_counter[counter_offset]. 18006 vlan_format_flags == 0) { 18007 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18008 (BSL_META_U(unit, 18009 "Combination issue..Check parameters" 18010 "And Assign dummy attributes\n"))); 18011 return BCM_E_PARAM; 18012 } 18013 } 18014 if (flex_attribute->outer_dot1p) { 18015 if (flex_attribute->combine_attr_counter[counter_offset]. 18016 outer_dot1p_flags == 0) { 18017 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18018 (BSL_META_U(unit, 18019 "OuterPri: Combination issue..Check parameters" 18020 "And Assign dummy attributes\n"))); 18021 return BCM_E_PARAM; 18022 } 18023 } 18024 if (flex_attribute->inner_dot1p) { 18025 if (flex_attribute->combine_attr_counter[counter_offset]. 18026 inner_dot1p_flags == 0) { 18027 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18028 (BSL_META_U(unit, 18029 "InnerPri: Combination issue..Check parameters" 18030 "And Assign dummy attributes\n"))); 18031 return BCM_E_PARAM; 18032 } 18033 } 18034 if (flex_attribute->port) { 18035 for (array_index=0; 18036 array_index < BCM_STAT_FLEX_BIT_ARRAY_SIZE; 18037 array_index++) { 18038 if (flex_attribute->combine_attr_counter[counter_offset]. 18039 value_array[bcmStatFlexAttrPort][array_index]) { 18040 break; 18041 } 18042 } 18043 if (array_index == BCM_STAT_FLEX_BIT_ARRAY_SIZE ) { 18044 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18045 (BSL_META_U(unit, 18046 "Port: Combination issue..Check parameters" 18047 "And Assign dummy attributes\n"))); 18048 return BCM_E_PARAM; 18049 } 18050 } 18051 if (flex_attribute->tos_dscp) { 18052 for (array_index=0; 18053 array_index < BCM_STAT_FLEX_BIT_ARRAY_SIZE; 18054 array_index++) { 18055 if (flex_attribute->combine_attr_counter[counter_offset]. 18056 value_array[bcmStatFlexAttrTosDscp][array_index]) { 18057 break; 18058 } 18059 } 18060 if (array_index == BCM_STAT_FLEX_BIT_ARRAY_SIZE ) { 18061 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18062 (BSL_META_U(unit, 18063 "Tos: Combination issue..Check parameters" 18064 "And Assign dummy attributes\n"))); 18065 return BCM_E_PARAM; 18066 } 18067 } 18068 if (flex_attribute->tos_ecn) { 18069 for (array_index=0; 18070 array_index < BCM_STAT_FLEX_BIT_ARRAY_SIZE; 18071 array_index++) { 18072 if (flex_attribute->combine_attr_counter[counter_offset]. 18073 value_array[bcmStatFlexAttrTosEcn][array_index]) { 18074 break; 18075 } 18076 } 18077 if (array_index == BCM_STAT_FLEX_BIT_ARRAY_SIZE ) { 18078 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18079 (BSL_META_U(unit, 18080 "Tos: Combination issue..Check parameters" 18081 "And Assign dummy attributes\n"))); 18082 return BCM_E_PARAM; 18083 } 18084 } 18085 if (flex_attribute->pkt_resolution) { 18086 if (flex_attribute->combine_attr_counter[counter_offset]. 18087 pkt_resolution_flags == 0) { 18088 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18089 (BSL_META_U(unit, 18090 "Combination issue..Check parameters" 18091 "And Assign dummy attributes\n"))); 18092 return BCM_E_PARAM; 18093 } 18094 } 18095 if (flex_attribute->svp) { 18096 for (array_index=0; 18097 array_index < BCM_STAT_FLEX_BIT_ARRAY_SIZE; 18098 array_index++) { 18099 if (flex_attribute->combine_attr_counter[counter_offset]. 18100 value_array[bcmStatFlexAttrSvp][array_index]) { 18101 break; 18102 } 18103 } 18104 if (array_index == BCM_STAT_FLEX_BIT_ARRAY_SIZE ) { 18105 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18106 (BSL_META_U(unit, 18107 "SVP: Combination issue..Check parameters" 18108 "And Assign dummy attributes\n"))); 18109 return BCM_E_PARAM; 18110 } 18111 } 18112 if (flex_attribute->dvp) { 18113 for (array_index=0; 18114 array_index < BCM_STAT_FLEX_BIT_ARRAY_SIZE; 18115 array_index++) { 18116 if (flex_attribute->combine_attr_counter[counter_offset]. 18117 value_array[bcmStatFlexAttrDvp][array_index]) { 18118 break; 18119 } 18120 } 18121 if (array_index == BCM_STAT_FLEX_BIT_ARRAY_SIZE ) { 18122 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18123 (BSL_META_U(unit, 18124 "DVP: Combination issue..Check parameters" 18125 "And Assign dummy attributes\n"))); 18126 return BCM_E_PARAM; 18127 } 18128 } 18129 if (flex_attribute->drop) { 18130 if (flex_attribute->combine_attr_counter[counter_offset]. 18131 drop_flags == 0) { 18132 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18133 (BSL_META_U(unit, 18134 "Combination issue..Check parameters" 18135 "And Assign dummy attributes\n"))); 18136 return BCM_E_PARAM; 18137 } 18138 } 18139 if (flex_attribute->ip_pkt) { 18140 if (flex_attribute->combine_attr_counter[counter_offset]. 18141 ip_pkt_flags == 0) { 18142 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18143 (BSL_META_U(unit, 18144 "DROP: Combination issue..Check parameters" 18145 "And Assign dummy attributes\n"))); 18146 return BCM_E_PARAM; 18147 } 18148 } 18149 #ifdef BCM_APACHE_SUPPORT 18150 if (soc_feature(unit,soc_feature_flex_ctr_mpls_3_label_count)) { 18151 if (flex_attribute->cng_1) { 18152 if (flex_attribute->combine_attr_counter[counter_offset]. 18153 pre_ifp_color_mpls_label1_flags == 0) { 18154 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18155 (BSL_META_U(unit, 18156 "PreIfpColorMpls1:Combination issue..Check parameters" 18157 "And Assign dummy attributes\n"))); 18158 return BCM_E_PARAM; 18159 } 18160 } 18161 if (flex_attribute->phb_1) { 18162 if (flex_attribute->combine_attr_counter[counter_offset]. 18163 int_pri_mpls_label1_flags == 0) { 18164 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18165 (BSL_META_U(unit, 18166 "IntpriMpls1:Combination issue..Check parameters" 18167 "And Assign dummy attributes\n"))); 18168 return BCM_E_PARAM; 18169 } 18170 } 18171 if (flex_attribute->cng_2) { 18172 if (flex_attribute->combine_attr_counter[counter_offset]. 18173 pre_ifp_color_mpls_label2_flags == 0) { 18174 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18175 (BSL_META_U(unit, 18176 "PreIfpColorMpls2:Combination issue..Check parameters" 18177 "And Assign dummy attributes\n"))); 18178 return BCM_E_PARAM; 18179 } 18180 } 18181 if (flex_attribute->phb_2) { 18182 if (flex_attribute->combine_attr_counter[counter_offset]. 18183 int_pri_mpls_label2_flags == 0) { 18184 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18185 (BSL_META_U(unit, 18186 "IntpriMpls2:Combination issue..Check parameters" 18187 "And Assign dummy attributes\n"))); 18188 return BCM_E_PARAM; 18189 } 18190 } 18191 if (flex_attribute->cng_3) { 18192 if (flex_attribute->combine_attr_counter[counter_offset]. 18193 pre_ifp_color_mpls_label3_flags == 0) { 18194 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18195 (BSL_META_U(unit, 18196 "PreIfpColorMpls3:Combination issue..Check parameters" 18197 "And Assign dummy attributes\n"))); 18198 return BCM_E_PARAM; 18199 } 18200 } 18201 if (flex_attribute->phb_3) { 18202 if (flex_attribute->combine_attr_counter[counter_offset]. 18203 int_pri_mpls_label3_flags == 0) { 18204 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18205 (BSL_META_U(unit, 18206 "IntpriMpls3:Combination issue..Check parameters" 18207 "And Assign dummy attributes\n"))); 18208 return BCM_E_PARAM; 18209 } 18210 } 18211 } 18212 #endif 18213 if (flex_attribute->udf) { 18214 for (array_index=0; 18215 array_index < BCM_STAT_FLEX_BIT_ARRAY_SIZE; 18216 array_index++) { 18217 if (flex_attribute->combine_attr_counter[counter_offset]. 18218 value_array[bcmStatFlexAttrUdf][array_index]) { 18219 break; 18220 } 18221 } 18222 if (array_index == BCM_STAT_FLEX_BIT_ARRAY_SIZE ) { 18223 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18224 (BSL_META_U(unit, 18225 "Udf: Combination issue..Check parameters" 18226 "And Assign dummy attributes\n"))); 18227 return BCM_E_PARAM; 18228 } 18229 /*When drop is enabled, udf max bit is 7.*/ 18230 if (flex_attribute->drop && udf_max_num_bits == 8) { 18231 return BCM_E_PARAM; 18232 } 18233 } 18234 18235 #if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TRIDENT3_SUPPORT) 18236 if (soc_feature(unit, soc_feature_flex_stat_egr_queue_congestion_marked)) { 18237 if (flex_attribute->mmu_cos) { 18238 if (flex_attribute->combine_attr_counter[counter_offset]. 18239 mmu_cos_flags == 0) { 18240 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18241 (BSL_META_U(unit, 18242 "mmu_cos: Combination issue..Check parameters" 18243 "And Assign dummy attributes\n"))); 18244 return BCM_E_PARAM; 18245 } 18246 } 18247 if (flex_attribute->uc_queueing) { 18248 if (flex_attribute->combine_attr_counter[counter_offset]. 18249 uc_queueing_flags == 0) { 18250 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18251 (BSL_META_U(unit, 18252 "uc_queueing: Combination issue..Check parameters" 18253 "And Assign dummy attributes\n"))); 18254 return BCM_E_PARAM; 18255 } 18256 } 18257 if (flex_attribute->congestion_marked) { 18258 if (flex_attribute->combine_attr_counter[counter_offset]. 18259 congestion_marked_flags == 0) { 18260 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18261 (BSL_META_U(unit, 18262 "congestion_marked: Combination issue..Check parameters" 18263 "And Assign dummy attributes\n"))); 18264 return BCM_E_PARAM; 18265 } 18266 } 18267 } 18268 #endif 18269 if (soc_feature(unit, soc_feature_flex_stat_ing_tcp_flags_support)) { 18270 if (flex_attribute->tcp_flags) { 18271 if (flex_attribute->combine_attr_counter[counter_offset]. 18272 tcp_flags == 0) { 18273 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18274 (BSL_META_U(unit, 18275 "tcp_flags: Combination issue..Check parameters" 18276 "And Assign dummy attributes\n"))); 18277 return BCM_E_PARAM; 18278 } 18279 } 18280 } 18281 if (soc_feature(unit, soc_feature_flex_stat_int_cn_support)) { 18282 if (flex_attribute->int_cn) { 18283 if (flex_attribute->combine_attr_counter[counter_offset]. 18284 int_cn == 0) { 18285 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18286 (BSL_META_U(unit, 18287 "int_cn: Combination issue..Check parameters" 18288 "And Assign dummy attributes\n"))); 18289 return BCM_E_PARAM; 18290 } 18291 } 18292 } 18293 } 18294 flex_attribute->total_counters = total_counters; 18295 flex_attribute->total_selectors = num_selectors; 18296 return BCM_E_NONE; 18297 } 18298 18299 18300 static int _bcm_esw_stat_group_mode_id_check(int unit, 18301 uint32 flags, 18302 uint32 total_counters, 18303 uint32 num_selectors, 18304 bcm_stat_group_mode_attr_selector_t *attr_selectors, 18305 int share_hw_mode, 18306 uint32 *mode_id) { 18307 18308 bcm_error_t rv=BCM_E_NONE; 18309 bcm_stat_flex_ingress_mode_t *flex_ingress_mode=NULL; 18310 bcm_stat_flex_egress_mode_t *flex_egress_mode=NULL; 18311 uint32 mode=0; 18312 18313 if (flags & BCM_STAT_GROUP_MODE_INGRESS) { 18314 flex_ingress_mode = sal_alloc(sizeof(bcm_stat_flex_ingress_mode_t), 18315 "flex_ingress_mod"); 18316 if (flex_ingress_mode == NULL) { 18317 return BCM_E_MEMORY; 18318 } 18319 18320 sal_memset(flex_ingress_mode,0,sizeof(bcm_stat_flex_ingress_mode_t)); 18321 18322 for (mode = 0; mode < BCM_STAT_FLEX_COUNTER_MAX_MODE; mode++) { 18323 if (_bcm_esw_stat_flex_get_ingress_mode_info( 18324 unit,mode,flex_ingress_mode) == BCM_E_NONE) { 18325 if ((flex_ingress_mode->num_selectors == num_selectors) && 18326 (share_hw_mode || (flex_ingress_mode->total_counters == total_counters))) { 18327 18328 if (share_hw_mode && (flex_ingress_mode->group_mode < bcmStatGroupModeCount)) { 18329 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, 18330 (BSL_META_U(unit, 18331 "Cannot reuse Mode %d \n"), mode)); 18332 continue; 18333 } 18334 18335 if (sal_memcmp(flex_ingress_mode->attr_selectors, 18336 attr_selectors, 18337 sizeof(bcm_stat_group_mode_attr_selector_t) * 18338 num_selectors) == 0 ) { 18339 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, 18340 (BSL_META_U(unit, 18341 "Mode exist \n"))); 18342 sal_free(flex_ingress_mode); 18343 if (flags & BCM_STAT_GROUP_MODE_CAPABILITY_OAM) { 18344 *mode_id = mode|BCM_STAT_GROUP_MODE_ID_OAM_SUFFIX; 18345 } else { 18346 *mode_id = mode; 18347 } 18348 BCM_IF_ERROR_RETURN( 18349 _bcm_esw_stat_flex_update_ingress_flex_info( 18350 unit, mode, flags, num_selectors, 18351 attr_selectors)); 18352 return BCM_E_EXISTS; 18353 } 18354 } 18355 } 18356 } 18357 sal_free(flex_ingress_mode); 18358 } else { 18359 flex_egress_mode = sal_alloc(sizeof(bcm_stat_flex_egress_mode_t), 18360 "flex_egress_mod"); 18361 if (flex_egress_mode == NULL) { 18362 return BCM_E_MEMORY; 18363 } 18364 18365 sal_memset(flex_egress_mode, 0, sizeof(bcm_stat_flex_egress_mode_t)); 18366 18367 for (mode = 0; mode < BCM_STAT_FLEX_COUNTER_MAX_MODE; mode++) { 18368 if (_bcm_esw_stat_flex_get_egress_mode_info( 18369 unit,mode,flex_egress_mode) == BCM_E_NONE) { 18370 if (flex_egress_mode->num_selectors == num_selectors) { 18371 if (sal_memcmp(flex_egress_mode->attr_selectors, 18372 attr_selectors, 18373 sizeof(bcm_stat_group_mode_attr_selector_t) * 18374 num_selectors) == 0 ) { 18375 LOG_VERBOSE(BSL_LS_BCM_FLEXCTR, 18376 (BSL_META_U(unit, 18377 "Mode exist \n"))); 18378 sal_free(flex_egress_mode); 18379 *mode_id = mode + BCM_STAT_FLEX_COUNTER_MAX_MODE; 18380 return BCM_E_EXISTS; 18381 } 18382 } 18383 } 18384 } 18385 sal_free(flex_egress_mode); 18386 } 18387 return rv; 18388 18389 } 18390 18391 #ifdef BCM_KATANA2_SUPPORT 18392 18393 /* 18394 * Function: 18395 * _bcm_esw_stat_group_mode_attr_class_id_cleanup 18396 * Description: 18397 * Cleanup Customized Stat class identifier related structures 18398 * 18399 * Parameters: 18400 * unit (IN) Unit number. 18401 * 18402 * Return Value: 18403 * BCM_E_XXX 18404 */ 18405 18406 int _bcm_esw_stat_group_mode_attr_class_id_cleanup( 18407 int unit) 18408 { 18409 uint32 flex_pkt_res_values_count=0, i = 0; 18410 18411 if (SOC_IS_KATANAX(unit)) { 18412 flex_pkt_res_values_count = sizeof(_flex_pkt_res_values_katana)/ 18413 sizeof(_flex_pkt_res_values_katana[0]); 18414 } 18415 if (class_attr_comb[unit].class_pkt_attr_comb) { 18416 for (i = 0; i < flex_pkt_res_values_count; i++) { 18417 if (class_attr_comb[unit].class_pkt_attr_comb[i] != NULL) { 18418 sal_free(class_attr_comb[unit].class_pkt_attr_comb[i]); 18419 } 18420 } 18421 sal_free(class_attr_comb[unit].class_pkt_attr_comb); 18422 } 18423 18424 return BCM_E_NONE; 18425 } 18426 18427 /* 18428 * Function: 18429 * _bcm_esw_stat_combine_attr_matrix_init 18430 * Description: 18431 * Initialize and allocate Matrix for combining 18432 * Counter Attributes. 18433 * 18434 * Parameters: 18435 * unit (IN) Unit number. 18436 * 18437 * Return Value: 18438 * BCM_E_XXX 18439 */ 18440 18441 int _bcm_esw_stat_combine_attr_matrix_init( 18442 int unit, 18443 int *size) 18444 { 18445 18446 uint32 flex_pkt_res_values_count=0, i = 0; 18447 18448 if (SOC_IS_KATANAX(unit)) { 18449 flex_pkt_res_values_count = sizeof(_flex_pkt_res_values_katana)/ 18450 sizeof(_flex_pkt_res_values_katana[0]); 18451 } 18452 18453 /* Compression matrix creation. */ 18454 class_attr_comb[unit].class_pkt_attr_comb = 18455 (uint32 **)sal_alloc(flex_pkt_res_values_count* 18456 sizeof(uint32 *), 18457 "class_attr_comb"); 18458 if (class_attr_comb[unit].class_pkt_attr_comb == NULL) { 18459 return BCM_E_INTERNAL; 18460 } 18461 for (i = 0; i < flex_pkt_res_values_count; i++) { 18462 class_attr_comb[unit].class_pkt_attr_comb[i] = 18463 (uint32 *) sal_alloc(flex_pkt_res_values_count* 18464 sizeof(uint32 ), 18465 "class_attr_comb"); 18466 if (class_attr_comb[unit].class_pkt_attr_comb[i] == NULL) { 18467 _bcm_esw_stat_group_mode_attr_class_id_cleanup(unit); 18468 return BCM_E_INTERNAL; 18469 } 18470 sal_memset(class_attr_comb[unit].class_pkt_attr_comb[i], 0, 18471 flex_pkt_res_values_count*sizeof(uint32 )); 18472 } 18473 18474 *size = flex_pkt_res_values_count; 18475 return BCM_E_NONE; 18476 } 18477 18478 /* 18479 * Function: 18480 * _bcm_esw_stat_group_mode_attr_class_id_create 18481 * Description: 18482 * Create Customized Stat class identifiers for combining 18483 * Counter Attributes. 18484 * 18485 * Parameters: 18486 * unit (IN) Unit number. 18487 * attr (IN) Stat Attribute Flex Group Mode 18488 * num_of_attr_values (IN) Number of combined Attributes 18489 * attr_values (IN) Attribute Combined types 18490 * attr_class_id (OUT) Created Class Identifier for the Combined type. 18491 * 18492 * Return Value: 18493 * BCM_E_XXX 18494 */ 18495 18496 int _bcm_esw_stat_group_mode_attr_class_id_create( 18497 int unit, 18498 bcm_stat_group_mode_attr_t attr, 18499 int num_of_attr_values, 18500 uint32 *attr_values, 18501 bcm_stat_group_mode_attr_class_id_t *attr_class_id) 18502 { 18503 18504 uint32 flex_pkt_res_values_count=0, class_id = 0, attr_val = 0; 18505 uint32 empty_class_id = 0, i = 0; 18506 18507 if (attr == bcmStatGroupModeAttrPktType) { 18508 if (SOC_IS_KATANAX(unit)) { 18509 flex_pkt_res_values_count = sizeof(_flex_pkt_res_values_katana)/ 18510 sizeof(_flex_pkt_res_values_katana[0]); 18511 } 18512 if (flex_pkt_res_values_count < num_of_attr_values) { 18513 return BCM_E_PARAM; 18514 } 18515 18516 /* Validation for new class creation with existing combination. */ 18517 for (class_id = 0; class_id < flex_pkt_res_values_count; class_id++) { 18518 if ((class_attr_comb[unit].class_pkt_attr_comb[class_id][0] == 0) && (empty_class_id == 0)) { 18519 empty_class_id = class_id + 1; 18520 class_id++; 18521 } 18522 for (attr_val = 0; attr_val < flex_pkt_res_values_count; attr_val++) { 18523 if (class_attr_comb[unit].class_pkt_attr_comb[class_id][attr_val] == 0) { 18524 break; 18525 } 18526 for (i = 0; i < num_of_attr_values; i++) { 18527 if (class_attr_comb[unit].class_pkt_attr_comb[class_id][attr_val] == attr_values[i]) { 18528 return BCM_E_PARAM; 18529 } 18530 } 18531 } 18532 } 18533 if (empty_class_id >= flex_pkt_res_values_count) { 18534 return BCM_E_FULL; 18535 } 18536 18537 *attr_class_id = empty_class_id; 18538 18539 /* Populate Compression matrix. */ 18540 for (i = 0; i < num_of_attr_values; i++) { 18541 class_attr_comb[unit].class_pkt_attr_comb[empty_class_id - 1][i] = attr_values[i]; 18542 } 18543 return BCM_E_NONE; 18544 } 18545 return BCM_E_PARAM; 18546 } 18547 18548 18549 /* 18550 * Function: 18551 * _bcm_esw_stat_group_mode_attr_class_id_destroy 18552 * Description: 18553 * Destroy Customized Stat class identifiers created for combining 18554 * Counter Attributes. 18555 * 18556 * Parameters: 18557 * unit (IN) Unit number. 18558 * class_id (IN) Created Class Identifier for the Combined type. 18559 * 18560 * Return Value: 18561 * BCM_E_XXX 18562 */ 18563 18564 int _bcm_esw_stat_group_mode_attr_class_id_destroy( 18565 int unit, 18566 bcm_stat_group_mode_attr_class_id_t attr_class_id) 18567 { 18568 uint32 flex_pkt_res_values_count=0, attr_val = 0; 18569 18570 if (SOC_IS_KATANAX(unit)) { 18571 flex_pkt_res_values_count = sizeof(_flex_pkt_res_values_katana)/ 18572 sizeof(_flex_pkt_res_values_katana[0]); 18573 } 18574 if (attr_class_id > 0 && (flex_pkt_res_values_count >= attr_class_id)) { 18575 attr_class_id--; 18576 } else { 18577 return BCM_E_PARAM; 18578 } 18579 if (class_attr_comb[unit].class_pkt_attr_comb[attr_class_id][0] == 0) { 18580 return BCM_E_EMPTY; 18581 } 18582 18583 /* Destroy the Compression matrix entries related to the class_id. */ 18584 for (attr_val = 0; attr_val < flex_pkt_res_values_count; attr_val++) { 18585 if (class_attr_comb[unit].class_pkt_attr_comb[attr_class_id][attr_val] == 0) { 18586 break; 18587 } 18588 class_attr_comb[unit].class_pkt_attr_comb[attr_class_id][attr_val] = 0; 18589 } 18590 18591 return BCM_E_NONE; 18592 } 18593 18594 /* 18595 * Function: 18596 * _bcm_esw_stat_flex_compressed_attr_matrix_sync 18597 * Purpose: 18598 * Sync compressed attr matrix to scache. 18599 * Parameters: 18600 * unit - (IN) unit number 18601 * scache_position - (IN/OUT) Scache position 18602 * Returns: 18603 * BCM_E_XXX 18604 */ 18605 int 18606 _bcm_esw_stat_flex_compressed_attr_matrix_sync(int unit, 18607 uint8 **scache_position) 18608 { 18609 uint32 *scache_ptr = NULL; 18610 uint32 flex_pkt_res_values_count = 0, i = 0; 18611 18612 if (SOC_IS_KATANAX(unit)) { 18613 flex_pkt_res_values_count = sizeof(_flex_pkt_res_values_katana)/ 18614 sizeof(_flex_pkt_res_values_katana[0]); 18615 } 18616 18617 scache_ptr = (uint32 *)*scache_position; 18618 if (soc_feature(unit, soc_feature_flex_stat_attributes_class)) { 18619 for (i = 0; i < flex_pkt_res_values_count; i++) { 18620 sal_memcpy(scache_ptr, 18621 class_attr_comb[unit].class_pkt_attr_comb[i], 18622 flex_pkt_res_values_count*sizeof(uint32)); 18623 scache_ptr += flex_pkt_res_values_count; 18624 } 18625 } else { 18626 sal_memset(scache_ptr, 0, 18627 flex_pkt_res_values_count*flex_pkt_res_values_count*sizeof(uint32)); 18628 scache_ptr += 18629 flex_pkt_res_values_count*flex_pkt_res_values_count; 18630 18631 } 18632 *scache_position = (uint8 *)scache_ptr; 18633 return BCM_E_NONE; 18634 } 18635 18636 /* 18637 * Function: 18638 * _bcm_esw_stat_flex_compressed_attr_matrix_recover 18639 * Purpose: 18640 * Recover compressed attr matrix from scache. 18641 * Parameters: 18642 * unit - (IN) unit number 18643 * scache_position - (IN/OUT) Scache position 18644 * Returns: 18645 * BCM_E_XXX 18646 */ 18647 int _bcm_esw_stat_flex_compressed_attr_matrix_recover(int unit, 18648 uint8 **scache_position) 18649 { 18650 uint32 *scache_ptr = NULL; 18651 uint32 flex_pkt_res_values_count = 0, i = 0; 18652 18653 if (SOC_IS_KATANAX(unit)) { 18654 flex_pkt_res_values_count = sizeof(_flex_pkt_res_values_katana)/ 18655 sizeof(_flex_pkt_res_values_katana[0]); 18656 } 18657 18658 scache_ptr = (uint32 *)*scache_position; 18659 /* Combined pkt attributes matrix */ 18660 if (soc_feature(unit, soc_feature_flex_stat_attributes_class)) { 18661 for (i = 0; i < flex_pkt_res_values_count; i++) { 18662 sal_memcpy(class_attr_comb[unit].class_pkt_attr_comb[i], scache_ptr, 18663 flex_pkt_res_values_count*sizeof(uint32)); 18664 scache_ptr += flex_pkt_res_values_count; 18665 } 18666 } else { 18667 scache_ptr += 18668 flex_pkt_res_values_count*flex_pkt_res_values_count; 18669 } 18670 *scache_position = (uint8 *)scache_ptr; 18671 return BCM_E_NONE; 18672 } 18673 18674 #endif 18675 18676 /* Create New Customized Stat Group mode for given Counter Attributes */ 18677 /* Doesn't check for existing HW mode */ 18678 static 18679 int _bcm_esw_stat_group_new_mode_id_create( 18680 int unit, 18681 uint32 flags, 18682 uint32 total_counters, 18683 uint32 num_selectors, 18684 bcm_stat_group_mode_attr_selector_t *attr_selectors, 18685 uint32 *mode_id) 18686 { 18687 bcm_stat_flex_attribute_t flex_attribute={0}; 18688 bcm_error_t rv=BCM_E_NONE; 18689 *mode_id = 0; 18690 /* Perform Sanity Checks */ 18691 /* Unit will be surely valid */ 18692 if (!((flags & BCM_STAT_GROUP_MODE_INGRESS) || 18693 (flags & BCM_STAT_GROUP_MODE_EGRESS))) { 18694 return BCM_E_PARAM; 18695 } 18696 18697 if (soc_feature(unit, soc_feature_use_flex_ctr_oam_lm)) { 18698 /* Capability for OAM is defined only on the Ingress. 18699 */ 18700 if ((flags & BCM_STAT_GROUP_MODE_EGRESS) && 18701 (flags & BCM_STAT_GROUP_MODE_CAPABILITY_OAM)) { 18702 return BCM_E_PARAM; 18703 } 18704 } else { 18705 /* Capability for OAM shall be created only when use_flex_ctr_oam_lm 18706 * feature is defined. 18707 */ 18708 if (flags & BCM_STAT_GROUP_MODE_CAPABILITY_OAM) { 18709 return BCM_E_PARAM; 18710 } 18711 } 18712 18713 if ((total_counters == 0) || 18714 (total_counters > BCM_STAT_FLEX_MAX_COUNTER)) { 18715 return BCM_E_PARAM; 18716 } 18717 if (attr_selectors == NULL) { 18718 return BCM_E_PARAM; 18719 } 18720 18721 if (num_selectors > BCM_STAT_FLEX_MAX_SELECTORS) { 18722 return BCM_E_PARAM; 18723 } 18724 18725 flex_attribute.combine_attr_counter = 18726 sal_alloc(sizeof(bcm_stat_flex_combine_attr_counter_t) * 18727 total_counters, "flex_attribute"); 18728 if (flex_attribute.combine_attr_counter == NULL) { 18729 return BCM_E_MEMORY; 18730 } 18731 sal_memset(flex_attribute.combine_attr_counter, 18732 0,sizeof(bcm_stat_flex_combine_attr_counter_t) * total_counters); 18733 rv = _bcm_esw_stat_group_mode_fillup_values(unit, 18734 flags, total_counters, num_selectors, attr_selectors, &flex_attribute); 18735 if (BCM_FAILURE(rv)) { 18736 sal_free(flex_attribute.combine_attr_counter); 18737 return rv; 18738 } 18739 rv = _bcm_esw_stat_group_mode_associate_id(unit, 18740 flags, &flex_attribute, mode_id); 18741 if ((rv == BCM_E_NONE) || (rv==BCM_E_EXISTS)) { 18742 if (flags & BCM_STAT_GROUP_MODE_INGRESS) { 18743 rv = _bcm_esw_stat_flex_update_ingress_flex_info( 18744 unit, *mode_id, flags, num_selectors, 18745 attr_selectors); 18746 } else { 18747 rv = _bcm_esw_stat_flex_update_egress_flex_info( 18748 unit, *mode_id, flags, num_selectors, 18749 attr_selectors); 18750 } 18751 if (BCM_FAILURE(rv)) { 18752 sal_free(flex_attribute.combine_attr_counter); 18753 return rv; 18754 } 18755 if (flags & BCM_STAT_GROUP_MODE_EGRESS) { 18756 *mode_id += BCM_STAT_FLEX_COUNTER_MAX_MODE; 18757 } 18758 if (flags & BCM_STAT_GROUP_MODE_CAPABILITY_OAM) { 18759 *mode_id |= BCM_STAT_GROUP_MODE_ID_OAM_SUFFIX; 18760 } 18761 rv = BCM_E_NONE; 18762 } 18763 sal_free(flex_attribute.combine_attr_counter); 18764 return rv; 18765 } 18766 18767 /* Create Customized Stat Group mode for given Counter Attributes */ 18768 int _bcm_esw_stat_group_mode_id_create( 18769 int unit, 18770 uint32 flags, 18771 uint32 total_counters, 18772 uint32 num_selectors, 18773 bcm_stat_group_mode_attr_selector_t *attr_selectors, 18774 uint32 *mode_id) 18775 { 18776 bcm_stat_flex_attribute_t flex_attribute={0}; 18777 bcm_error_t rv=BCM_E_NONE; 18778 *mode_id = 0; 18779 /* Perform Sanity Checks */ 18780 /* Unit will be surely valid */ 18781 if (!((flags & BCM_STAT_GROUP_MODE_INGRESS) || 18782 (flags & BCM_STAT_GROUP_MODE_EGRESS))) { 18783 return BCM_E_PARAM; 18784 } 18785 18786 if (soc_feature(unit, soc_feature_use_flex_ctr_oam_lm)) { 18787 /* Capability for OAM is defined only on the Ingress. 18788 */ 18789 if ((flags & BCM_STAT_GROUP_MODE_EGRESS) && 18790 (flags & BCM_STAT_GROUP_MODE_CAPABILITY_OAM)) { 18791 return BCM_E_PARAM; 18792 } 18793 } else { 18794 /* Capability for OAM shall be created only when use_flex_ctr_oam_lm 18795 * feature is defined. 18796 */ 18797 if (flags & BCM_STAT_GROUP_MODE_CAPABILITY_OAM) { 18798 return BCM_E_PARAM; 18799 } 18800 } 18801 18802 /*UDF in egress mode is not supported so far*/ 18803 if ((flags & BCM_STAT_GROUP_MODE_EGRESS) && 18804 (flags & BCM_STAT_GROUP_MODE_UDF)) { 18805 return BCM_E_PARAM; 18806 } 18807 18808 if ((total_counters == 0) || 18809 (total_counters > BCM_STAT_FLEX_MAX_COUNTER)) { 18810 return BCM_E_PARAM; 18811 } 18812 if (attr_selectors == NULL) { 18813 return BCM_E_PARAM; 18814 } 18815 18816 /* Check for existing mode */ 18817 if ((rv = _bcm_esw_stat_group_mode_id_check(unit, flags, total_counters, 18818 num_selectors, attr_selectors, 0, mode_id)) != BCM_E_NONE) { 18819 return rv; 18820 } 18821 18822 flex_attribute.combine_attr_counter = 18823 sal_alloc(sizeof(bcm_stat_flex_combine_attr_counter_t) * 18824 total_counters, "flex_attribute"); 18825 if (flex_attribute.combine_attr_counter == NULL) { 18826 return BCM_E_MEMORY; 18827 } 18828 sal_memset(flex_attribute.combine_attr_counter, 18829 0,sizeof(bcm_stat_flex_combine_attr_counter_t) * total_counters); 18830 rv = _bcm_esw_stat_group_mode_fillup_values(unit, 18831 flags, total_counters, num_selectors, attr_selectors, &flex_attribute); 18832 if (BCM_FAILURE(rv)) { 18833 sal_free(flex_attribute.combine_attr_counter); 18834 return rv; 18835 } 18836 rv = _bcm_esw_stat_group_mode_associate_id(unit, 18837 flags, &flex_attribute, mode_id); 18838 if ((rv == BCM_E_NONE) || (rv==BCM_E_EXISTS)) { 18839 if (flags & BCM_STAT_GROUP_MODE_INGRESS) { 18840 rv = _bcm_esw_stat_flex_update_ingress_flex_info( 18841 unit, *mode_id, flags, num_selectors, 18842 attr_selectors); 18843 } else { 18844 rv = _bcm_esw_stat_flex_update_egress_flex_info( 18845 unit, *mode_id, flags, num_selectors, 18846 attr_selectors); 18847 } 18848 if (BCM_FAILURE(rv)) { 18849 sal_free(flex_attribute.combine_attr_counter); 18850 return rv; 18851 } 18852 if (flags & BCM_STAT_GROUP_MODE_EGRESS) { 18853 *mode_id += BCM_STAT_FLEX_COUNTER_MAX_MODE; 18854 } 18855 if (flags & BCM_STAT_GROUP_MODE_CAPABILITY_OAM) { 18856 *mode_id |= BCM_STAT_GROUP_MODE_ID_OAM_SUFFIX; 18857 } 18858 rv = BCM_E_NONE; 18859 } 18860 sal_free(flex_attribute.combine_attr_counter); 18861 return rv; 18862 } 18863 18864 /* Retrieves Customized Stat Group mode Attributes for given mode_id */ 18865 int _bcm_esw_stat_group_mode_id_get( 18866 int unit, 18867 uint32 mode_id, 18868 uint32 *flags, 18869 uint32 *total_counters, 18870 uint32 num_selectors, 18871 bcm_stat_group_mode_attr_selector_t *attr_selectors, 18872 uint32 *actual_num_selectors) 18873 { 18874 bcm_stat_flex_ingress_mode_t *flex_ingress_mode=NULL; 18875 bcm_stat_flex_egress_mode_t *flex_egress_mode=NULL; 18876 uint32 selector=0; 18877 bcm_error_t rv=BCM_E_NONE; 18878 if ((flags == NULL) || 18879 (total_counters == NULL) || 18880 /* (attr_selectors == NULL) || */ /*Could be used to get num_selectors*/ 18881 (actual_num_selectors == NULL)) { 18882 return BCM_E_PARAM; 18883 } 18884 18885 *flags = 0; 18886 if ( BCM_STAT_GROUP_MODE_ID_OAM_SUFFIX == 18887 (mode_id & BCM_STAT_GROUP_MODE_ID_OAM_MASK)) { 18888 mode_id = mode_id & ~(BCM_STAT_GROUP_MODE_ID_OAM_MASK); 18889 *flags = BCM_STAT_GROUP_MODE_CAPABILITY_OAM; 18890 } 18891 18892 if (mode_id < BCM_STAT_FLEX_COUNTER_MAX_MODE) { 18893 flex_ingress_mode = sal_alloc(sizeof(bcm_stat_flex_ingress_mode_t), 18894 "flex_ingress_mod"); 18895 if (flex_ingress_mode == NULL) { 18896 return BCM_E_MEMORY; 18897 } 18898 18899 sal_memset(flex_ingress_mode, 0, sizeof(bcm_stat_flex_ingress_mode_t)); 18900 18901 rv = _bcm_esw_stat_flex_get_ingress_mode_info(unit, 18902 mode_id,flex_ingress_mode); 18903 if (BCM_SUCCESS(rv)) { 18904 *flags |= flex_ingress_mode->flags; 18905 *total_counters = flex_ingress_mode->total_counters; 18906 *actual_num_selectors = flex_ingress_mode->num_selectors; 18907 if (num_selectors <= *actual_num_selectors) { 18908 for (selector = 0 ; selector < num_selectors; selector++) { 18909 sal_memcpy(&attr_selectors[selector], 18910 &flex_ingress_mode->attr_selectors[selector], 18911 sizeof(bcm_stat_group_mode_attr_selector_t)); 18912 } 18913 } 18914 } 18915 sal_free(flex_ingress_mode); 18916 } else { 18917 flex_egress_mode = sal_alloc(sizeof(bcm_stat_flex_egress_mode_t), 18918 "flex_egress_mod"); 18919 if (flex_egress_mode == NULL) { 18920 return BCM_E_MEMORY; 18921 } 18922 18923 sal_memset(flex_egress_mode, 0, sizeof(bcm_stat_flex_egress_mode_t)); 18924 18925 mode_id -= BCM_STAT_FLEX_COUNTER_MAX_MODE; 18926 rv = _bcm_esw_stat_flex_get_egress_mode_info(unit, 18927 mode_id,flex_egress_mode); 18928 if (BCM_SUCCESS(rv)) { 18929 *flags = flex_egress_mode->flags; 18930 *total_counters = flex_egress_mode->total_counters; 18931 *actual_num_selectors = flex_egress_mode->num_selectors; 18932 if (num_selectors <= *actual_num_selectors) { 18933 for (selector = 0 ; selector < num_selectors; selector++) { 18934 sal_memcpy(&attr_selectors[selector], 18935 &flex_egress_mode->attr_selectors[selector], 18936 sizeof(bcm_stat_group_mode_attr_selector_t)); 18937 } 18938 } 18939 } 18940 sal_free(flex_egress_mode); 18941 } 18942 return rv; 18943 } 18944 18945 bcm_error_t _bcm_esw_stat_flex_get_hw_mode(int unit, uint32 mode_id, uint32 *hw_mode_id) { 18946 18947 bcm_error_t rv = BCM_E_NONE; 18948 bcm_stat_flex_custom_ingress_mode_t cmode; 18949 18950 *hw_mode_id = 0; 18951 if (mode_id >= BCM_CUSTOM_INGRESS_MODE_START) { 18952 if(_bcm_esw_stat_flex_get_custom_ingress_mode_info(unit, mode_id, &cmode) 18953 == BCM_E_NONE) { 18954 *hw_mode_id = cmode.offset_mode; 18955 } 18956 } else { 18957 rv = BCM_E_NOT_FOUND; 18958 } 18959 return rv; 18960 } 18961 18962 18963 18964 /* Destroys Customized Group mode */ 18965 int _bcm_esw_stat_group_mode_id_destroy( 18966 int unit, 18967 uint32 mode_id) 18968 { 18969 uint32 offset_mode=0; 18970 bcm_error_t rv=BCM_E_NONE; 18971 bcm_error_t r_rv=BCM_E_NONE; 18972 bcm_stat_group_mode_t group_mode= bcmStatGroupModeSingle; 18973 uint32 flags = 0; 18974 bcm_stat_flex_custom_ingress_mode_t cmode; 18975 bcm_stat_flex_ingress_mode_t *flex_ingress_mode = NULL; 18976 18977 #if defined (BCM_TOMAHAWK_SUPPORT) && defined (INCLUDE_FLOWTRACKER) 18978 if (soc_feature(unit, soc_feature_uc_flowtracker_learn) && 18979 soc_feature(unit, soc_feature_uc_flowtracker_export)) { 18980 if(_bcm_esw_stat_mod_reserved(unit, mode_id)) { 18981 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 18982 (BSL_META_U(unit, 18983 "Try to destroy mode used by flowtracker\n"))); 18984 return BCM_E_PARAM; 18985 } 18986 } 18987 #endif 18988 18989 flex_ingress_mode = sal_alloc(sizeof(bcm_stat_flex_ingress_mode_t), 18990 "flex_ingress_mod"); 18991 if (flex_ingress_mode == NULL) { 18992 return BCM_E_MEMORY; 18993 } 18994 memset(flex_ingress_mode, 0, sizeof(bcm_stat_flex_ingress_mode_t)); 18995 18996 offset_mode = mode_id; 18997 if ( BCM_STAT_GROUP_MODE_ID_OAM_SUFFIX == 18998 (mode_id & BCM_STAT_GROUP_MODE_ID_OAM_MASK)) { 18999 mode_id = mode_id & ~(BCM_STAT_GROUP_MODE_ID_OAM_MASK); 19000 flags = BCM_STAT_GROUP_MODE_CAPABILITY_OAM; 19001 offset_mode = mode_id; 19002 } else if (mode_id >= BCM_CUSTOM_INGRESS_MODE_START 19003 #if defined(BCM_TRIDENT3_SUPPORT) || defined(BCM_TOMAHAWK3_SUPPORT) 19004 && (mode_id < BCM_CUSTOM_EGRESS_MODE_START) 19005 #endif 19006 ) { 19007 if(_bcm_esw_stat_flex_get_custom_ingress_mode_info(unit, mode_id, &cmode) 19008 == BCM_E_NONE) { 19009 offset_mode = cmode.offset_mode; 19010 flags |= BCM_STAT_GROUP_MODE_INGRESS; 19011 cmode.used = 0; 19012 cmode.AllocPool = -1; 19013 if (cmode.attr_selectors) { 19014 sal_free(cmode.attr_selectors); 19015 cmode.attr_selectors = NULL; 19016 } 19017 _bcm_esw_stat_flex_update_custom_ingress_mode_info(unit, mode_id, &cmode); 19018 } 19019 } 19020 #if defined(BCM_TRIDENT3_SUPPORT) || defined(BCM_TOMAHAWK3_SUPPORT) 19021 else if (mode_id >= BCM_CUSTOM_EGRESS_MODE_START) { 19022 bcm_stat_flex_custom_egress_mode_t egr_cmode; 19023 if(_bcm_esw_stat_flex_get_custom_egress_mode_info(unit, mode_id, 19024 &egr_cmode) == BCM_E_NONE) { 19025 offset_mode = egr_cmode.offset_mode + BCM_STAT_FLEX_COUNTER_MAX_MODE; 19026 flags |= BCM_STAT_GROUP_MODE_EGRESS; 19027 egr_cmode.used = 0; 19028 egr_cmode.AllocPool = -1; 19029 if (egr_cmode.attr_selectors) { 19030 sal_free(egr_cmode.attr_selectors); 19031 egr_cmode.attr_selectors = NULL; 19032 } 19033 _bcm_esw_stat_flex_update_custom_egress_mode_info(unit, mode_id, 19034 &egr_cmode); 19035 } 19036 } 19037 #endif 19038 19039 19040 if (offset_mode >= BCM_STAT_FLEX_COUNTER_MAX_MODE) { 19041 flags = BCM_STAT_GROUP_MODE_EGRESS; 19042 offset_mode -= BCM_STAT_FLEX_COUNTER_MAX_MODE; 19043 } else { 19044 flags |= BCM_STAT_GROUP_MODE_INGRESS; 19045 } 19046 19047 if (flags & BCM_STAT_GROUP_MODE_INGRESS) { 19048 if (soc_feature(unit, soc_feature_use_flex_ctr_oam_lm)) { 19049 if ((rv = _bcm_esw_stat_flex_get_ingress_mode_info( 19050 unit, offset_mode, flex_ingress_mode)) != BCM_E_NONE) { 19051 sal_free(flex_ingress_mode); 19052 return rv; 19053 } 19054 19055 if (flags & BCM_STAT_GROUP_MODE_CAPABILITY_OAM) { 19056 if ((rv=_bcm_esw_stat_flex_delete_ingress_flags( 19057 unit,offset_mode,flags)) != BCM_E_NONE) { 19058 sal_free(flex_ingress_mode); 19059 return rv; 19060 } 19061 } 19062 } 19063 if ((rv=_bcm_esw_stat_flex_delete_ingress_mode( 19064 unit,offset_mode)) == BCM_E_NONE) { 19065 group_mode = bcmStatGroupModeFlex1 + offset_mode; 19066 LOG_DEBUG(BSL_LS_BCM_FLEXCTR, 19067 (BSL_META_U(unit, 19068 "Destroyed Ingress Mode also \n"))); 19069 _bcm_esw_stat_flex_reset_group_mode( 19070 unit,bcmStatFlexDirectionIngress, 19071 offset_mode,group_mode); 19072 } else if ((flags & BCM_STAT_GROUP_MODE_CAPABILITY_OAM) && 19073 soc_feature(unit, soc_feature_use_flex_ctr_oam_lm)) { 19074 if ((r_rv = _bcm_esw_stat_flex_update_ingress_flex_info(unit, 19075 offset_mode, flags, 19076 flex_ingress_mode->num_selectors, 19077 flex_ingress_mode->attr_selectors)) != 19078 BCM_E_NONE) { 19079 sal_free(flex_ingress_mode); 19080 return r_rv; 19081 } 19082 } 19083 } else { 19084 if ((rv=_bcm_esw_stat_flex_delete_egress_mode( 19085 unit,offset_mode)) == BCM_E_NONE) { 19086 group_mode = bcmStatGroupModeFlex1 + offset_mode; 19087 LOG_DEBUG(BSL_LS_BCM_FLEXCTR, 19088 (BSL_META_U(unit, 19089 "Destroyed Egress Mode also \n"))); 19090 _bcm_esw_stat_flex_reset_group_mode( 19091 unit,bcmStatFlexDirectionEgress, 19092 offset_mode,group_mode); 19093 } 19094 } 19095 sal_free(flex_ingress_mode); 19096 return rv; 19097 } 19098 19099 #ifdef BCM_TOMAHAWK_SUPPORT 19100 static bcm_error_t _bcm_esw_get_ingress_ifp_table_from_pipe(int pipe, soc_mem_t *ingress_table) { 19101 bcm_error_t rv=BCM_E_NONE; 19102 switch(pipe) { 19103 case 0: 19104 *ingress_table = IFP_POLICY_TABLE_PIPE0m; 19105 break; 19106 case 1: 19107 *ingress_table = IFP_POLICY_TABLE_PIPE1m; 19108 break; 19109 case 2: 19110 *ingress_table = IFP_POLICY_TABLE_PIPE2m; 19111 break; 19112 case 3: 19113 *ingress_table = IFP_POLICY_TABLE_PIPE3m; 19114 break; 19115 case 4: 19116 *ingress_table = IFP_POLICY_TABLE_PIPE4m; 19117 break; 19118 case 5: 19119 *ingress_table = IFP_POLICY_TABLE_PIPE5m; 19120 break; 19121 case 6: 19122 *ingress_table = IFP_POLICY_TABLE_PIPE6m; 19123 break; 19124 case 7: 19125 *ingress_table = IFP_POLICY_TABLE_PIPE7m; 19126 break; 19127 default: 19128 rv = BCM_E_NOT_FOUND; 19129 break; 19130 } 19131 return rv; 19132 } 19133 static bcm_error_t _bcm_esw_get_ingress_vfp_table_from_pipe(int pipe, soc_mem_t *ingress_table) { 19134 bcm_error_t rv=BCM_E_NONE; 19135 switch(pipe) { 19136 case 0: 19137 *ingress_table = VFP_POLICY_TABLE_PIPE0m; 19138 break; 19139 case 1: 19140 *ingress_table = VFP_POLICY_TABLE_PIPE1m; 19141 break; 19142 case 2: 19143 *ingress_table = VFP_POLICY_TABLE_PIPE2m; 19144 break; 19145 case 3: 19146 *ingress_table = VFP_POLICY_TABLE_PIPE3m; 19147 break; 19148 case 4: 19149 *ingress_table = VFP_POLICY_TABLE_PIPE4m; 19150 break; 19151 case 5: 19152 *ingress_table = VFP_POLICY_TABLE_PIPE5m; 19153 break; 19154 case 6: 19155 *ingress_table = VFP_POLICY_TABLE_PIPE6m; 19156 break; 19157 case 7: 19158 *ingress_table = VFP_POLICY_TABLE_PIPE7m; 19159 break; 19160 default: 19161 rv = BCM_E_NOT_FOUND; 19162 break; 19163 } 19164 return rv; 19165 } 19166 static bcm_error_t _bcm_esw_get_ingress_em_table_from_pipe(int pipe, soc_mem_t *ingress_table) { 19167 bcm_error_t rv=BCM_E_NONE; 19168 switch(pipe) { 19169 case 0: 19170 *ingress_table = EXACT_MATCH_2_PIPE0m; 19171 break; 19172 case 1: 19173 *ingress_table = EXACT_MATCH_2_PIPE1m; 19174 break; 19175 case 2: 19176 *ingress_table = EXACT_MATCH_2_PIPE2m; 19177 break; 19178 case 3: 19179 *ingress_table = EXACT_MATCH_2_PIPE3m; 19180 break; 19181 default: 19182 rv = BCM_E_NOT_FOUND; 19183 break; 19184 } 19185 return rv; 19186 } 19187 19188 #if defined(BCM_TRIDENT3_SUPPORT) 19189 static bcm_error_t _bcm_esw_get_egr_fp_table_from_pipe(int pipe, 19190 soc_mem_t *egress_table) { 19191 bcm_error_t rv = BCM_E_NONE; 19192 switch(pipe) { 19193 case 0: 19194 *egress_table = EFP_POLICY_TABLE_PIPE0m; 19195 break; 19196 case 1: 19197 *egress_table = EFP_POLICY_TABLE_PIPE1m; 19198 break; 19199 default: 19200 rv = BCM_E_NOT_FOUND; 19201 break; 19202 } 19203 return rv; 19204 } 19205 #endif 19206 19207 #endif 19208 19209 /* Associate an accounting object to customized group mode */ 19210 static 19211 int _bcm_esw_stat_custom_group_associate_object( 19212 int unit, 19213 uint32 mode_id, 19214 bcm_stat_object_t object, 19215 uint32 *stat_counter_id, 19216 uint32 *num_entries, 19217 uint32 pool_id, 19218 uint32 base_idx, 19219 bcm_stat_custom_counter_info_t *counter_info) 19220 { 19221 bcm_stat_flex_direction_t direction = bcmStatFlexDirectionIngress; 19222 uint32 mode=0; 19223 uint32 base_index=0; 19224 uint32 pool_number=0; 19225 bcm_error_t rv=BCM_E_NONE; 19226 bcm_stat_group_mode_t group_mode= bcmStatGroupModeSingle; 19227 bcm_stat_flex_ingress_mode_t *flex_ingress_mode=NULL; 19228 bcm_stat_flex_egress_mode_t *flex_egress_mode=NULL; 19229 uint32 total_counters=0; 19230 soc_mem_t ingress_table; 19231 bcm_stat_flex_custom_ingress_mode_t cmode; 19232 #ifdef BCM_TOMAHAWK_SUPPORT 19233 int pipe_num = 0; 19234 uint32 fg_id; 19235 #endif 19236 soc_mem_t mem_tab; 19237 #if defined(BCM_TRIDENT3_SUPPORT) || defined(BCM_TOMAHAWK3_SUPPORT) 19238 bcm_stat_flex_custom_egress_mode_t egr_cmode; 19239 #endif 19240 19241 group_mode = bcmStatGroupModeFlex1 + mode; 19242 19243 /* 1. Deciding direction */ 19244 BCM_IF_ERROR_RETURN(_bcm_esw_stat_validate_object(unit,object,&direction)); 19245 19246 sal_memset(&cmode, 0, sizeof(bcm_stat_flex_custom_ingress_mode_t)); 19247 19248 if ( BCM_STAT_GROUP_MODE_ID_OAM_SUFFIX == 19249 (mode_id & BCM_STAT_GROUP_MODE_ID_OAM_MASK)) { 19250 mode = mode_id & ~(BCM_STAT_GROUP_MODE_ID_OAM_MASK); 19251 } else if (mode_id >= BCM_CUSTOM_INGRESS_MODE_START 19252 #if defined(BCM_TRIDENT3_SUPPORT) || defined(BCM_TOMAHAWK3_SUPPORT) 19253 && (mode_id < BCM_CUSTOM_EGRESS_MODE_START) 19254 #endif 19255 ) { 19256 rv = _bcm_esw_stat_flex_get_custom_ingress_mode_info(unit, mode_id, &cmode); 19257 BCM_IF_ERROR_RETURN(rv); 19258 mode = cmode.offset_mode; 19259 } 19260 #if defined(BCM_TRIDENT3_SUPPORT) || defined(BCM_TOMAHAWK3_SUPPORT) 19261 else if( mode_id >= BCM_CUSTOM_EGRESS_MODE_START ) { 19262 sal_memset(&egr_cmode, 0, sizeof(bcm_stat_flex_custom_egress_mode_t)); 19263 _bcm_esw_stat_flex_get_custom_egress_mode_info(unit, mode_id, &egr_cmode); 19264 mode = egr_cmode.offset_mode; 19265 } 19266 #endif 19267 else { 19268 if(direction == bcmStatFlexDirectionIngress) { 19269 mode = mode_id; 19270 } else { 19271 mode = mode_id - BCM_STAT_FLEX_COUNTER_MAX_MODE; 19272 } 19273 } 19274 19275 if (direction == bcmStatFlexDirectionIngress) { 19276 flex_ingress_mode = sal_alloc(sizeof(bcm_stat_flex_ingress_mode_t), 19277 "flex_ingress_mod"); 19278 if (flex_ingress_mode == NULL) { 19279 return BCM_E_MEMORY; 19280 } 19281 19282 sal_memset(flex_ingress_mode, 0, sizeof(bcm_stat_flex_ingress_mode_t)); 19283 19284 rv= _bcm_esw_stat_flex_get_ingress_mode_info( 19285 unit,mode,flex_ingress_mode); 19286 if (BCM_SUCCESS(rv)) { 19287 total_counters = flex_ingress_mode->total_counters; 19288 } 19289 sal_free(flex_ingress_mode); 19290 BCM_IF_ERROR_RETURN(rv); 19291 } else { 19292 flex_egress_mode = sal_alloc(sizeof(bcm_stat_flex_egress_mode_t), 19293 "flex_egress_mod"); 19294 if (flex_egress_mode == NULL) { 19295 return BCM_E_MEMORY; 19296 } 19297 19298 sal_memset(flex_egress_mode, 0, sizeof(bcm_stat_flex_egress_mode_t)); 19299 19300 rv= _bcm_esw_stat_flex_get_egress_mode_info( 19301 unit,mode,flex_egress_mode); 19302 if (BCM_SUCCESS(rv)) { 19303 total_counters = flex_egress_mode->total_counters; 19304 } 19305 sal_free(flex_egress_mode); 19306 BCM_IF_ERROR_RETURN(rv); 19307 } 19308 19309 if (soc_feature(unit, soc_feature_flex_stat_compaction_support)) { 19310 /* User configured pool and base index */ 19311 pool_number = pool_id; 19312 base_index = base_idx; 19313 } 19314 BCM_IF_ERROR_RETURN(_bcm_esw_stat_flex_set_group_mode( 19315 unit,direction, mode,group_mode)); 19316 switch((int32)object) { 19317 /* Ingress Side */ 19318 case bcmStatObjectIngPort: 19319 #if defined (BCM_TRIDENT3_SUPPORT) 19320 if (SOC_IS_TRIDENT3X(unit)){ 19321 mem_tab = LPORT_TABm; 19322 } else 19323 #endif 19324 { 19325 mem_tab = PORT_TABm; 19326 } 19327 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19328 unit, mem_tab, FIRST_LKUP, object,mode_id, 19329 &base_index,&pool_number); 19330 break; 19331 case bcmStatObjectIngVlan: 19332 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19333 unit, VLAN_TABm, FIRST_LKUP, object,mode_id, 19334 &base_index,&pool_number); 19335 break; 19336 case bcmStatObjectIngVlanXlate: 19337 #if defined (BCM_TRIDENT3_SUPPORT) 19338 if (SOC_IS_TRIDENT3X(unit)){ 19339 mem_tab = VLAN_XLATE_1_DOUBLEm; 19340 } else 19341 #endif 19342 { 19343 mem_tab = VLAN_XLATEm; 19344 } 19345 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19346 unit, mem_tab, FIRST_LKUP, object,mode_id, 19347 &base_index,&pool_number); 19348 break; 19349 case bcmStatObjectIngVlanXlateSecondLookup: 19350 #if defined(BCM_TRIDENT2PLUS_SUPPORT) 19351 if (soc_feature(unit,soc_feature_ing_vlan_xlate_second_lookup)) { 19352 #if defined (BCM_TRIDENT3_SUPPORT) 19353 if (SOC_IS_TRIDENT3X(unit)){ 19354 mem_tab = VLAN_XLATE_1_DOUBLEm; 19355 } else 19356 #endif 19357 { 19358 mem_tab = VLAN_XLATEm; 19359 } 19360 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19361 unit, mem_tab, SECOND_LKUP, object,mode_id, 19362 &base_index,&pool_number); 19363 } else 19364 #endif 19365 { 19366 rv = BCM_E_PARAM; 19367 } 19368 break; 19369 case bcmStatObjectIngVfi: 19370 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19371 unit, VFIm, FIRST_LKUP, object,mode_id, 19372 &base_index,&pool_number); 19373 break; 19374 case bcmStatObjectIngL3Intf: 19375 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19376 unit, L3_IIFm, FIRST_LKUP, object,mode_id, 19377 &base_index,&pool_number); 19378 break; 19379 case bcmStatObjectIngVrf: 19380 #if defined (BCM_TRIDENT3_SUPPORT) 19381 if (SOC_IS_TRIDENT3X(unit)){ 19382 mem_tab = VRF_ATTRS_2m; 19383 } else 19384 #endif 19385 { 19386 mem_tab = VRFm; 19387 } 19388 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19389 unit, mem_tab, FIRST_LKUP, object,mode_id, 19390 &base_index,&pool_number); 19391 break; 19392 case bcmStatObjectIngPolicy: 19393 ingress_table = VFP_POLICY_TABLEm; 19394 #ifdef BCM_TOMAHAWK_SUPPORT 19395 if (soc_feature(unit,soc_feature_stat_multi_pipe_support)) { 19396 _field_counter_pool_bmp_t pool_bmp; 19397 if ((mode_id < BCM_STAT_FLEX_CUSTOM_INGRESS_COUNTER_MAX_MODE) && 19398 (mode_id >= BCM_CUSTOM_INGRESS_MODE_START)) { 19399 fg_id = cmode.hint.value; 19400 rv = _bcm_field_group_flex_ctr_info_get(unit, fg_id, &pipe_num, &pool_bmp); 19401 if (pipe_num >= 0) { 19402 _bcm_esw_get_ingress_vfp_table_from_pipe(pipe_num, &ingress_table); 19403 if (BCM_FAILURE(rv)) { 19404 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 19405 (BSL_META_U(unit, 19406 "cannot get pipe info %d.\n"), pipe_num)); 19407 } 19408 } 19409 19410 for (pool_number = 0; pool_number < BCM_STAT_TH_FLEX_COUNTER_MAX_POOL; pool_number++) { 19411 if (!_FP_COUNTER_POOL_BMP_TEST( pool_bmp, pool_number)) { 19412 if (pool_number >= BCM_STAT_TH_FLEX_COUNTER_MAX_POOL - 1) { 19413 pool_number = 0xff; 19414 } 19415 else { 19416 continue; 19417 } 19418 } 19419 19420 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19421 unit, ingress_table, FIRST_LKUP, object, mode_id, 19422 &base_index, &pool_number); 19423 if (rv != BCM_E_RESOURCE) { 19424 cmode.AllocPool = pool_number; 19425 _bcm_esw_stat_flex_update_custom_ingress_mode_info(unit, mode_id, &cmode); 19426 _bcm_field_group_flex_ctr_pool_bmp_update(unit, fg_id, pool_number); 19427 break; 19428 } 19429 } 19430 } 19431 } else 19432 #endif 19433 { 19434 if (!soc_feature(unit, soc_feature_flex_stat_compaction_support)) { 19435 pool_number = 0xff; 19436 } 19437 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19438 unit, VFP_POLICY_TABLEm, FIRST_LKUP, object, mode_id, 19439 &base_index, &pool_number); 19440 } 19441 break; 19442 case bcmStatObjectIngNiv: 19443 case bcmStatObjectIngMplsVcLabel: 19444 case bcmStatObjectIngGport: 19445 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19446 unit, SOURCE_VPm, FIRST_LKUP, object,mode_id, 19447 &base_index,&pool_number); 19448 break; 19449 case bcmStatObjectIngMplsSwitchLabel: 19450 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19451 unit, MPLS_ENTRYm, FIRST_LKUP, object,mode_id, 19452 &base_index,&pool_number); 19453 break; 19454 case bcmStatObjectIngMplsSwitchSecondLabel: 19455 #if defined(BCM_APACHE_SUPPORT) 19456 if (soc_feature(unit, soc_feature_mpls_entry_second_label_lookup)) { 19457 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19458 unit, MPLS_ENTRYm, SECOND_LKUP, object,mode_id, 19459 &base_index,&pool_number); 19460 } else 19461 #endif 19462 { 19463 rv = BCM_E_PARAM; 19464 } 19465 break; 19466 case bcmStatObjectIngMplsFrrLabel: 19467 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19468 unit, L3_TUNNELm, FIRST_LKUP, object,mode_id, 19469 &base_index,&pool_number); 19470 break; 19471 case bcmStatObjectIngL3Host: 19472 /* To Be Completed..L3_ENTRY_2/4,EXT_IPV4/6_128_UCAST_WIDE */ 19473 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19474 unit, EXT_IPV4_UCAST_WIDEm, FIRST_LKUP, object,mode_id, 19475 &base_index,&pool_number); 19476 break; 19477 case bcmStatObjectIngTrill: 19478 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19479 unit, MPLS_ENTRY_EXTDm, FIRST_LKUP, object,mode_id, 19480 &base_index,&pool_number); 19481 break; 19482 case bcmStatObjectIngMimLookupId: 19483 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19484 unit, MPLS_ENTRY_EXTDm, FIRST_LKUP, object,mode_id, 19485 &base_index,&pool_number); 19486 break; 19487 case bcmStatObjectIngL2Gre: 19488 /* To Be Completed..SOURCE_VPm, VLAN_XLATE_1m L2GRE_DIP view */ 19489 #if defined (BCM_TRIDENT3_SUPPORT) 19490 if (SOC_IS_TRIDENT3X(unit)){ 19491 mem_tab = VLAN_XLATE_1_DOUBLEm; 19492 } else 19493 #endif 19494 { 19495 mem_tab = VLAN_XLATEm; 19496 } 19497 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19498 unit, mem_tab, FIRST_LKUP, object,mode_id, 19499 &base_index,&pool_number); 19500 break; 19501 case bcmStatObjectIngEXTPolicy: 19502 /* To Be Completed..*/ 19503 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19504 unit, VFP_POLICY_TABLEm, FIRST_LKUP, object,mode_id, 19505 &base_index,&pool_number); 19506 break; 19507 case bcmStatObjectIngVxlan: 19508 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19509 unit, SOURCE_VPm, FIRST_LKUP, object,mode_id, 19510 &base_index,&pool_number); 19511 break; 19512 case bcmStatObjectIngVsan: 19513 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19514 unit, ING_VSANm, FIRST_LKUP, object,mode_id, 19515 &base_index,&pool_number); 19516 break; 19517 case bcmStatObjectIngFcoe: 19518 #if defined (BCM_TRIDENT3_SUPPORT) 19519 if (SOC_IS_TRIDENT3X(unit)){ 19520 mem_tab = L3_ENTRY_DOUBLEm; 19521 } else 19522 #endif 19523 { 19524 mem_tab = L3_ENTRY_IPV4_MULTICASTm; 19525 } 19526 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19527 unit, mem_tab, FIRST_LKUP, object,mode_id, 19528 &base_index,&pool_number); 19529 break; 19530 case bcmStatObjectIngL3Route: 19531 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19532 unit, L3_DEFIPm, FIRST_LKUP, object,mode_id, 19533 &base_index,&pool_number); 19534 break; 19535 case bcmStatObjectIngIpmc: 19536 #if defined (BCM_TRIDENT3_SUPPORT) 19537 if (SOC_IS_TRIDENT3X(unit)){ 19538 mem_tab = L3_ENTRY_DOUBLEm; 19539 } else 19540 #endif 19541 { 19542 mem_tab = L3_ENTRY_IPV4_MULTICASTm; 19543 } 19544 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19545 unit, mem_tab, FIRST_LKUP, object,mode_id, 19546 &base_index,&pool_number); 19547 break; 19548 case bcmStatObjectIngVxlanDip: 19549 #if defined (BCM_TRIDENT3_SUPPORT) 19550 if (SOC_IS_TRIDENT3X(unit)){ 19551 mem_tab = VLAN_XLATE_1_DOUBLEm; 19552 } else 19553 #endif 19554 { 19555 mem_tab = VLAN_XLATEm; 19556 } 19557 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19558 unit, mem_tab, FIRST_LKUP, object, mode_id, 19559 &base_index, &pool_number); 19560 break; 19561 case bcmStatObjectIngFieldStageIngress: 19562 /* IFP can potentially request for counter allocation from 19563 * a specific pool. Hence, check stat_counter_id to determine 19564 * the pool number from which to allocate counters. 19565 */ 19566 19567 ingress_table = IFP_POLICY_TABLEm; 19568 #ifdef BCM_TOMAHAWK_SUPPORT 19569 if (soc_feature(unit,soc_feature_stat_multi_pipe_support)) { 19570 _field_counter_pool_bmp_t pool_bmp; 19571 if ((mode_id < BCM_STAT_FLEX_CUSTOM_INGRESS_COUNTER_MAX_MODE) && 19572 (mode_id >= BCM_CUSTOM_INGRESS_MODE_START)) { 19573 fg_id = cmode.hint.value; 19574 rv = _bcm_field_group_flex_ctr_info_get(unit, fg_id, &pipe_num, &pool_bmp); 19575 if (pipe_num >= 0) { 19576 _bcm_esw_get_ingress_ifp_table_from_pipe(pipe_num, &ingress_table); 19577 if (BCM_FAILURE(rv)) { 19578 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 19579 (BSL_META_U(unit, 19580 "cannot get pipe info %d.\n"), pipe_num)); 19581 } 19582 } 19583 19584 for (pool_number = 0; pool_number <= BCM_STAT_TH_FLEX_COUNTER_MAX_POOL; pool_number++) { 19585 if (!_FP_COUNTER_POOL_BMP_TEST( pool_bmp, pool_number)) { 19586 if (pool_number <= BCM_STAT_TH_FLEX_COUNTER_MAX_POOL - 1) { 19587 continue; 19588 } 19589 } 19590 if (pool_number >= BCM_STAT_TH_FLEX_COUNTER_MAX_POOL) { 19591 pool_number = 0xff; 19592 } 19593 19594 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19595 unit, ingress_table, FIRST_LKUP, object, mode_id, 19596 &base_index, &pool_number); 19597 if (rv != BCM_E_RESOURCE) { 19598 cmode.AllocPool = pool_number; 19599 _bcm_esw_stat_flex_update_custom_ingress_mode_info(unit, mode_id, &cmode); 19600 _bcm_field_group_flex_ctr_pool_bmp_update(unit, fg_id, pool_number); 19601 break; 19602 } 19603 } 19604 19605 if ((cmode.hint.type == bcmStatGroupAllocHintIngressFieldGroup) && 19606 (cmode.attr_selectors[0].attr == bcmStatGroupModeAttrFieldIngressColor)) { 19607 /* Color counters in legacy mode, shared hw mode in selector setup. 19608 * Counters count for different custom modes can be different. 19609 * Should get correct counters count from flex_custom_ingress_modes. 19610 */ 19611 total_counters = cmode.total_counters; 19612 } 19613 } 19614 } else 19615 #endif 19616 { 19617 #ifdef BCM_TRIDENT2PLUS_SUPPORT 19618 if ((SOC_IS_TRIDENT2PLUS(unit) || SOC_IS_TITAN2PLUS(unit))) { 19619 ingress_table = FP_POLICY_TABLEm; 19620 } 19621 #endif 19622 pool_number = 0xff; 19623 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19624 unit, ingress_table, FIRST_LKUP, object, mode_id, 19625 &base_index, &pool_number); 19626 } 19627 break; 19628 case bcmStatObjectIngExactMatch: 19629 /* EM can potentially request for counter allocation from 19630 * a specific pool. Hence, check stat_counter_id to determine 19631 * the pool number from which to allocate counters. 19632 */ 19633 ingress_table = EXACT_MATCH_2m; 19634 rv = BCM_E_PARAM; 19635 #ifdef BCM_TOMAHAWK_SUPPORT 19636 if (soc_feature(unit,soc_feature_stat_multi_pipe_support)) { 19637 _field_counter_pool_bmp_t pool_bmp; 19638 if ((mode_id < BCM_STAT_FLEX_CUSTOM_INGRESS_COUNTER_MAX_MODE) && 19639 (mode_id >= BCM_CUSTOM_INGRESS_MODE_START)) { 19640 fg_id = cmode.hint.value; 19641 rv = _bcm_field_group_flex_ctr_info_get(unit, fg_id, &pipe_num, &pool_bmp); 19642 if (BCM_FAILURE(rv)) { 19643 return rv; 19644 } 19645 19646 if (pipe_num >= 0) { 19647 _bcm_esw_get_ingress_em_table_from_pipe(pipe_num, &ingress_table); 19648 if (BCM_FAILURE(rv)) { 19649 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 19650 (BSL_META_U(unit, 19651 "cannot get pipe info %d.\n"), pipe_num)); 19652 } 19653 } 19654 19655 for (pool_number = 0; pool_number < BCM_STAT_TH_FLEX_COUNTER_MAX_POOL; pool_number++) { 19656 if (!_FP_COUNTER_POOL_BMP_TEST( pool_bmp, pool_number)) { 19657 if (pool_number >= BCM_STAT_TH_FLEX_COUNTER_MAX_POOL - 1) { 19658 pool_number = 0xff; 19659 } 19660 else { 19661 continue; 19662 } 19663 } 19664 19665 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19666 unit, ingress_table, FIRST_LKUP, object, mode_id, 19667 &base_index, &pool_number); 19668 if (rv != BCM_E_RESOURCE) { 19669 cmode.AllocPool = pool_number; 19670 _bcm_esw_stat_flex_update_custom_ingress_mode_info(unit, mode_id, &cmode); 19671 _bcm_field_group_flex_ctr_pool_bmp_update(unit, fg_id, pool_number); 19672 break; 19673 } 19674 } 19675 } 19676 } 19677 #endif 19678 19679 break; 19680 case bcmIntStatObjectIngAgm: 19681 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19682 unit, AGM_MONITOR_TABLEm, FIRST_LKUP, object, mode, 19683 &base_index, &pool_number); 19684 break; 19685 case bcmIntStatObjectIngAgmSecondLookup: 19686 rv = _bcm_esw_stat_flex_create_ingress_table_counters( 19687 unit, AGM_MONITOR_TABLEm, SECOND_LKUP, object, mode, 19688 &base_index, &pool_number); 19689 break; 19690 /* Egress Side */ 19691 case bcmStatObjectEgrPort: 19692 #if defined (BCM_TRIDENT3_SUPPORT) 19693 if (SOC_IS_TRIDENT3X(unit)){ 19694 mem_tab = EGR_LPORT_PROFILEm; 19695 } else 19696 #endif 19697 { 19698 mem_tab = EGR_PORTm; 19699 } 19700 rv = _bcm_esw_stat_flex_create_egress_table_counters( 19701 unit, mem_tab, FIRST_LKUP, object,mode, 19702 &base_index,&pool_number); 19703 break; 19704 case bcmStatObjectEgrVlan: 19705 rv = _bcm_esw_stat_flex_create_egress_table_counters( 19706 unit, EGR_VLANm, FIRST_LKUP, object,mode, 19707 &base_index,&pool_number); 19708 break; 19709 case bcmStatObjectEgrVlanXlate: 19710 #if defined (BCM_TRIDENT3_SUPPORT) 19711 if (SOC_IS_TRIDENT3X(unit)){ 19712 mem_tab = EGR_VLAN_XLATE_1_DOUBLEm; 19713 } else 19714 #endif 19715 { 19716 mem_tab = EGR_VLAN_XLATEm; 19717 } 19718 rv = _bcm_esw_stat_flex_create_egress_table_counters( 19719 unit, mem_tab, FIRST_LKUP, object,mode, 19720 &base_index,&pool_number); 19721 break; 19722 case bcmStatObjectEgrVlanXlateSecondLookup: 19723 #if defined(BCM_APACHE_SUPPORT) || defined(BCM_TRIDENT3_SUPPORT) 19724 if (soc_feature(unit, soc_feature_egr_vlan_xlate_second_lookup)) { 19725 #if defined(BCM_TRIDENT3_SUPPORT) 19726 if (SOC_IS_TRIDENT3X(unit)){ 19727 mem_tab = EGR_VLAN_XLATE_1_DOUBLEm; 19728 } else 19729 #endif 19730 { 19731 mem_tab = EGR_VLAN_XLATEm; 19732 } 19733 rv = _bcm_esw_stat_flex_create_egress_table_counters( 19734 unit, mem_tab, SECOND_LKUP, object,mode, 19735 &base_index,&pool_number); 19736 } else 19737 #endif 19738 { 19739 rv = BCM_E_PARAM; 19740 } 19741 break; 19742 case bcmStatObjectEgrVfi: 19743 rv = _bcm_esw_stat_flex_create_egress_table_counters( 19744 unit, EGR_VFIm, FIRST_LKUP, object,mode, 19745 &base_index,&pool_number); 19746 break; 19747 case bcmStatObjectEgrNiv: 19748 case bcmStatObjectEgrL3Intf: 19749 rv = _bcm_esw_stat_flex_create_egress_table_counters( 19750 unit, EGR_L3_NEXT_HOPm, FIRST_LKUP, object,mode, 19751 &base_index,&pool_number); 19752 break; 19753 case bcmStatObjectEgrWlan: 19754 rv = _bcm_esw_stat_flex_create_egress_table_counters( 19755 unit, EGR_L3_NEXT_HOPm, FIRST_LKUP, object,mode, 19756 &base_index,&pool_number); 19757 break; 19758 case bcmStatObjectEgrMim: 19759 rv = _bcm_esw_stat_flex_create_egress_table_counters( 19760 unit, EGR_L3_NEXT_HOPm, FIRST_LKUP, object,mode, 19761 &base_index,&pool_number); 19762 break; 19763 case bcmStatObjectEgrMimLookupId: 19764 #if defined (BCM_TRIDENT3_SUPPORT) 19765 if (SOC_IS_TRIDENT3X(unit)){ 19766 mem_tab = EGR_VLAN_XLATE_1_DOUBLEm; 19767 } else 19768 #endif 19769 { 19770 mem_tab = EGR_VLAN_XLATEm; 19771 } 19772 rv = _bcm_esw_stat_flex_create_egress_table_counters( 19773 unit, mem_tab, FIRST_LKUP, object,mode, 19774 &base_index,&pool_number); 19775 break; 19776 case bcmStatObjectEgrL2Gre: 19777 #if defined (BCM_TRIDENT3_SUPPORT) 19778 if (SOC_IS_TRIDENT3X(unit)){ 19779 mem_tab = EGR_DVP_ATTRIBUTEm; 19780 } else 19781 #endif 19782 { 19783 mem_tab = EGR_DVP_ATTRIBUTE_1m; 19784 } 19785 rv = _bcm_esw_stat_flex_create_egress_table_counters( 19786 unit, mem_tab, FIRST_LKUP, object,mode, 19787 &base_index,&pool_number); 19788 break; 19789 case bcmStatObjectEgrVxlan: 19790 #if defined (BCM_TRIDENT3_SUPPORT) 19791 if (SOC_IS_TRIDENT3X(unit)){ 19792 mem_tab = EGR_DVP_ATTRIBUTEm; 19793 } else 19794 #endif 19795 { 19796 mem_tab = EGR_DVP_ATTRIBUTE_1m; 19797 } 19798 rv = _bcm_esw_stat_flex_create_egress_table_counters( 19799 unit, mem_tab, FIRST_LKUP, object,mode, 19800 &base_index, &pool_number); 19801 break; 19802 case bcmStatObjectEgrL3Nat: 19803 rv = _bcm_esw_stat_flex_create_egress_table_counters( 19804 unit, EGR_NAT_PACKET_EDIT_INFOm, FIRST_LKUP, object,mode, 19805 &base_index, &pool_number); 19806 break; 19807 case bcmStatObjectEgrFieldStageEgress: 19808 mem_tab = EFP_POLICY_TABLEm; 19809 if (-1 != *stat_counter_id 19810 && (!(SOC_IS_TD2P_TT2P(unit) || SOC_IS_APACHE(unit) || 19811 SOC_IS_TRIDENT3X(unit)))) { 19812 uint32 l_pool = 0, l_mode, l_baseidx; 19813 bcm_stat_object_t l_object; 19814 bcm_stat_group_mode_t l_group; 19815 19816 _bcm_esw_stat_get_counter_id_info(unit, *stat_counter_id, 19817 &l_group, &l_object, 19818 &l_mode, &l_pool, 19819 &l_baseidx); 19820 if (l_pool < SOC_INFO(unit).num_flex_egress_pools) { 19821 pool_number = l_pool; 19822 } else { 19823 /* Invalid pool number specified */ 19824 return BCM_E_PARAM; 19825 } 19826 } else { 19827 /* Set pool_number to -1 to indicate that counters 19828 * can be allocated from any available pool 19829 */ 19830 pool_number = -1; 19831 } 19832 #ifdef BCM_TRIDENT3_SUPPORT 19833 if((soc_feature(unit,soc_feature_stat_egr_multi_pipe_support)) && 19834 (!_bcm_esw_get_fp_mode_global(unit, bcmFieldQualifyStageEgress))) { 19835 _field_counter_pool_bmp_t pool_bmp; 19836 if ((mode_id < BCM_STAT_FLEX_CUSTOM_EGRESS_COUNTER_MAX_MODE) && 19837 (mode_id >= BCM_CUSTOM_EGRESS_MODE_START)) { 19838 fg_id = egr_cmode.hint.value; 19839 rv = _bcm_field_group_flex_ctr_info_get(unit, fg_id, 19840 &pipe_num, &pool_bmp); 19841 if (BCM_FAILURE(rv)) { 19842 return rv; 19843 } 19844 19845 if (pipe_num >= 0) { 19846 _bcm_esw_get_egr_fp_table_from_pipe(pipe_num, &mem_tab); 19847 if (BCM_FAILURE(rv)) { 19848 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 19849 (BSL_META_U(unit, 19850 "cannot get pipe info %d.\n"), pipe_num)); 19851 } 19852 } 19853 for (pool_number = 0; pool_number < BCM_STAT_TD3_FLEX_COUNTER_MAX_EGR_POOL; pool_number++) { 19854 if (!_FP_COUNTER_POOL_BMP_TEST( pool_bmp, pool_number)) { 19855 if (pool_number >= BCM_STAT_TD3_FLEX_COUNTER_MAX_EGR_POOL - 1) { 19856 pool_number = -1; 19857 } 19858 else { 19859 continue; 19860 } 19861 } 19862 rv = _bcm_esw_stat_flex_create_egress_table_counters( 19863 unit, mem_tab, FIRST_LKUP, object, mode_id, 19864 &base_index, &pool_number); 19865 if (rv != BCM_E_RESOURCE) { 19866 egr_cmode.AllocPool = pool_number; 19867 _bcm_esw_stat_flex_update_custom_egress_mode_info(unit, 19868 mode_id, &egr_cmode); 19869 _bcm_field_group_flex_ctr_pool_bmp_update(unit, fg_id, 19870 pool_number); 19871 break; 19872 } 19873 } 19874 } 19875 }else 19876 #endif 19877 { 19878 rv = _bcm_esw_stat_flex_create_egress_table_counters( 19879 unit, mem_tab, FIRST_LKUP, object,mode, 19880 &base_index, &pool_number); 19881 } 19882 break; 19883 case bcmStatObjectEgrMplsTunnelLabel: 19884 rv = _bcm_esw_stat_flex_create_egress_table_counters( 19885 unit, EGR_IP_TUNNEL_MPLSm, FIRST_LKUP, object,mode, 19886 &base_index, &pool_number); 19887 break; 19888 case bcmStatObjectEgrMplsTunnelSecondLabel: 19889 #if defined(BCM_APACHE_SUPPORT) 19890 if (soc_feature(unit, soc_feature_multi_tunnel_label_count)) { 19891 rv = _bcm_esw_stat_flex_create_egress_table_counters( 19892 unit, EGR_IP_TUNNEL_MPLSm, SECOND_LKUP, object,mode, 19893 &base_index, &pool_number); 19894 } else 19895 #endif 19896 { 19897 rv = BCM_E_PARAM; 19898 } 19899 break; 19900 default: 19901 rv = BCM_E_PARAM; 19902 break; 19903 } 19904 if (BCM_FAILURE(rv)) { 19905 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 19906 (BSL_META_U(unit, 19907 "creation of counters failed..\n"))); 19908 } else { 19909 /* For Egress, use the HW mode to get the stat counter id */ 19910 if (direction != bcmStatFlexDirectionIngress) { 19911 #if defined(BCM_TRIDENT3_SUPPORT) || defined(BCM_TOMAHAWK3_SUPPORT) 19912 if (mode_id < BCM_CUSTOM_EGRESS_MODE_START) 19913 #endif 19914 { 19915 mode_id = mode; 19916 } 19917 } 19918 _bcm_esw_stat_get_counter_id(unit, group_mode,object, mode_id, 19919 pool_number,base_index,stat_counter_id); 19920 19921 if (*stat_counter_id == 0) { 19922 return BCM_E_FAIL; 19923 } 19924 19925 #ifdef BCM_TOMAHAWK_SUPPORT 19926 if (pipe_num < 0) { 19927 /* For global mode field module returns pipe as -1 */ 19928 pipe_num = 0; 19929 } 19930 19931 if (((direction == bcmStatFlexDirectionIngress) 19932 #if defined(BCM_TRIDENT3_SUPPORT) 19933 || (SOC_IS_TRIDENT3X(unit)) 19934 #endif 19935 ) && 19936 soc_feature(unit, soc_feature_flex_counter_opaque_stat_id)) { 19937 stat_counter_map[unit][*stat_counter_id].pipe = pipe_num; 19938 } 19939 #endif 19940 LOG_DEBUG(BSL_LS_BCM_FLEXCTR, 19941 (BSL_META_U(unit, 19942 "Create: mode:%d group_mode:%d pool:%d object:%d" 19943 " base:%d\n stat_counter_id:%d\n"), 19944 mode,group_mode,pool_number,object,base_index, 19945 *stat_counter_id)); 19946 #if defined(BCM_TRIDENT2_SUPPORT) 19947 if (SOC_IS_TRIDENT2X(unit) && 19948 soc_feature(unit, soc_feature_advanced_flex_counter)) { 19949 _flex_stat_mode_base_map[unit][direction] 19950 [pool_number][mode][base_index] = 1; 19951 } 19952 #endif 19953 *num_entries= total_counters ; 19954 if (soc_feature(unit, soc_feature_flex_stat_compaction_support)) { 19955 if (counter_info != NULL) { 19956 if (direction != bcmStatFlexDirectionIngress) { 19957 counter_info->ctr_tbl_mode_id = 19958 mode + BCM_STAT_FLEX_COUNTER_MAX_MODE; 19959 } else { 19960 counter_info->ctr_tbl_mode_id = mode; 19961 } 19962 counter_info->ctr_tbl_pool_id = pool_number; 19963 counter_info->ctr_tbl_pool_base_idx = base_index; 19964 counter_info->num_counters = total_counters; 19965 counter_info->stat_counter_id = *stat_counter_id; 19966 counter_info->object = object; 19967 } 19968 } 19969 } 19970 return rv; 19971 } 19972 19973 /* Associate an accounting object to customized group mode */ 19974 int _bcm_esw_stat_custom_group_create( 19975 int unit, 19976 uint32 mode_id, 19977 bcm_stat_object_t object, 19978 uint32 *stat_counter_id, 19979 uint32 *num_entries) 19980 { 19981 bcm_error_t rv = BCM_E_NONE; 19982 #if defined(BCM_TOMAHAWK_SUPPORT) 19983 bcm_stat_flex_custom_ingress_mode_t cmode; 19984 _bcm_ifp_color_map_t ifp_counter_color; 19985 int i, ctr_idx = 0; 19986 for(i = 0; i< BCM_MAX_IFP_COLOR_COUNTERS; ++i) { 19987 ifp_counter_color.map[i] = 0; 19988 } 19989 19990 #endif 19991 rv = _bcm_esw_stat_custom_group_associate_object( 19992 unit, mode_id, object, stat_counter_id, num_entries, 19993 0,0,NULL); 19994 19995 BCM_IF_ERROR_RETURN(rv); 19996 19997 if ( BCM_STAT_GROUP_MODE_ID_OAM_SUFFIX == 19998 (mode_id & BCM_STAT_GROUP_MODE_ID_OAM_MASK)) { 19999 return rv; 20000 } 20001 20002 if ((object != bcmStatObjectIngFieldStageIngress) && 20003 (object != bcmStatObjectIngFieldStageLookup) && 20004 (object != bcmStatObjectIngExactMatch)) { 20005 return rv; 20006 } 20007 20008 #if defined(BCM_TOMAHAWK_SUPPORT) 20009 cmode.hint.type = 0; 20010 if (mode_id >= BCM_CUSTOM_INGRESS_MODE_START 20011 #if defined(BCM_TRIDENT3_SUPPORT) || defined(BCM_TOMAHAWK3_SUPPORT) 20012 && (mode_id < BCM_CUSTOM_EGRESS_MODE_START) 20013 #endif 20014 ) { 20015 _bcm_esw_stat_flex_get_custom_ingress_mode_info(unit, mode_id, &cmode); 20016 } 20017 20018 if ((cmode.hint.type == bcmStatGroupAllocHintIngressFieldGroup) && cmode.attr_selectors) { 20019 if ((cmode.attr_selectors[0].attr == bcmStatGroupModeAttrFieldIngressColor) && 20020 (BCM_STAT_GROUP_MODE_ATTR_ALL_VALUES == cmode.attr_selectors[0].attr_value)) { 20021 ifp_counter_color.map[ctr_idx] = BCM_STAT_FLEX_COLOR_GREEN | BCM_STAT_FLEX_COLOR_YELLOW | 20022 BCM_STAT_FLEX_COLOR_RED; 20023 } else { 20024 for(i = 0; i < cmode.num_selectors; ++i) { 20025 if (cmode.attr_selectors && (cmode.attr_selectors[i].attr == bcmStatGroupModeAttrFieldIngressColor)) { 20026 ctr_idx = cmode.attr_selectors[i].counter_offset; 20027 ifp_counter_color.map[ctr_idx] |= (1 << cmode.attr_selectors[i].attr_value); 20028 20029 } 20030 } 20031 } 20032 /*set ifp_color map*/ 20033 rv = _bcm_esw_ifp_color_map_set(unit, *stat_counter_id, &ifp_counter_color); 20034 } 20035 #endif 20036 return rv; 20037 } 20038 20039 20040 bcm_error_t _bcm_esw_stat_group_mode_id_config_create( 20041 int unit, 20042 uint32 options, 20043 bcm_stat_group_mode_id_config_t *stat_config, 20044 uint32 num_selectors, 20045 bcm_stat_group_mode_attr_selector_t *attr_sel, 20046 uint32 *mode_id) 20047 { 20048 bcm_error_t rv=BCM_E_NONE; 20049 int ing_mode = 0; 20050 bcm_stat_flex_ingress_mode_t *flex_ingress_mode = NULL; 20051 bcm_stat_flex_custom_ingress_mode_t custom_ing_mode; 20052 int nsel = 0; 20053 int share_hw_mode = 0; 20054 20055 nsel = num_selectors; 20056 if ((stat_config->hint.type == bcmStatGroupAllocHintIngressFieldGroup) || 20057 (stat_config->hint.type == bcmStatGroupAllocHintExactMatchFieldGroup)) { 20058 if (num_selectors && (attr_sel[0].attr == bcmStatGroupModeAttrFieldIngressColor)) { 20059 /* Color counters in legacy mode, doesnt require any flex-counter style selector setup */ 20060 nsel = 0; 20061 share_hw_mode = 1; 20062 } 20063 } else if (stat_config->hint.type == 20064 (bcm_stat_group_mode_hint_type_t)bcmIntStatGroupAllocHintIngressAgmGroup) { 20065 nsel = 0; 20066 } 20067 20068 /* Check if the HW mode already exists */ 20069 rv = _bcm_esw_stat_group_mode_id_check(unit, stat_config->flags, 20070 stat_config->total_counters, 20071 nsel, attr_sel, share_hw_mode, 20072 mode_id); 20073 20074 if (rv != BCM_E_EXISTS) { 20075 rv = _bcm_esw_stat_group_new_mode_id_create(unit, stat_config->flags, 20076 stat_config->total_counters, 20077 nsel, attr_sel, 20078 mode_id); 20079 } 20080 20081 if (!BCM_SUCCESS(rv) && (rv != BCM_E_EXISTS)) { 20082 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 20083 (BSL_META_U(unit, 20084 "creation of mode failed..\n"))); 20085 return rv; 20086 } 20087 20088 custom_ing_mode.total_counters = stat_config->total_counters; 20089 20090 if ((stat_config->hint.type == bcmStatGroupAllocHintIngressFieldGroup) || 20091 (stat_config->hint.type == bcmStatGroupAllocHintVlanFieldGroup) || 20092 (stat_config->hint.type == bcmStatGroupAllocHintExactMatchFieldGroup)) { 20093 20094 for (ing_mode = BCM_CUSTOM_INGRESS_MODE_START; 20095 ing_mode < BCM_STAT_FLEX_CUSTOM_INGRESS_COUNTER_MAX_MODE; 20096 ing_mode++) { 20097 if (_bcm_esw_stat_flex_get_custom_ingress_mode_info(unit, 20098 ing_mode, &custom_ing_mode) == BCM_E_NOT_FOUND) { 20099 sal_memset(&custom_ing_mode, 0, sizeof(bcm_stat_flex_custom_ingress_mode_t)); 20100 custom_ing_mode.used = 1; 20101 custom_ing_mode.hint.type = stat_config->hint.type; 20102 custom_ing_mode.hint.value = stat_config->hint.value; 20103 custom_ing_mode.AllocPool = -1; 20104 custom_ing_mode.offset_mode = *mode_id; 20105 custom_ing_mode.num_selectors = num_selectors; 20106 custom_ing_mode.total_counters = stat_config->total_counters; 20107 _bcm_esw_stat_flex_update_custom_ingress_mode_info(unit, ing_mode, &custom_ing_mode); 20108 rv = BCM_E_NONE; 20109 break; 20110 } 20111 } 20112 if (ing_mode == BCM_STAT_FLEX_CUSTOM_INGRESS_COUNTER_MAX_MODE) { 20113 /* destroy offset mode */ 20114 _bcm_esw_stat_group_mode_id_destroy(unit, *mode_id); 20115 return BCM_E_MEMORY; 20116 } 20117 20118 if ((stat_config->hint.type == bcmStatGroupAllocHintIngressFieldGroup) || 20119 (stat_config->hint.type == bcmStatGroupAllocHintExactMatchFieldGroup)) { 20120 if (num_selectors && (attr_sel[0].attr == bcmStatGroupModeAttrFieldIngressColor)) { 20121 /* Color counters in legacy mode, doesnt require any flex-counter style selector setup */ 20122 _bcm_esw_stat_flex_set_group_mode( 20123 unit,bcmStatFlexDirectionIngress, *mode_id,bcmStatGroupModeFlex1); 20124 custom_ing_mode.attr_selectors = sal_alloc(num_selectors * sizeof(bcm_stat_group_mode_attr_selector_t),"attr"); 20125 if (custom_ing_mode.attr_selectors == NULL) { 20126 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 20127 (BSL_META_U(unit, 20128 "Failed to allocate memory for custom_ing_mode.attr_selectors "))); 20129 return BCM_E_MEMORY; 20130 } 20131 sal_memcpy(custom_ing_mode.attr_selectors, 20132 attr_sel, 20133 num_selectors * sizeof(bcm_stat_group_mode_attr_selector_t)); 20134 } 20135 custom_ing_mode.num_selectors = num_selectors; 20136 custom_ing_mode.total_counters = stat_config->total_counters; 20137 _bcm_esw_stat_flex_update_custom_ingress_mode_info(unit, ing_mode, &custom_ing_mode); 20138 20139 } 20140 20141 flex_ingress_mode = sal_alloc(sizeof(bcm_stat_flex_ingress_mode_t), 20142 "flex_ingress_mod"); 20143 20144 if (flex_ingress_mode == NULL) { 20145 return BCM_E_MEMORY; 20146 } 20147 20148 sal_memset(flex_ingress_mode, 0, sizeof(bcm_stat_flex_ingress_mode_t)); 20149 if (_bcm_esw_stat_flex_get_ingress_mode_info( 20150 unit,*mode_id,flex_ingress_mode) == BCM_E_NONE) { 20151 20152 (void)_bcm_esw_stat_flex_update_ingress_flex_info( 20153 unit, *mode_id, stat_config->flags, nsel, 20154 attr_sel); 20155 } 20156 20157 sal_free(flex_ingress_mode); 20158 20159 *mode_id = ing_mode; 20160 20161 } 20162 20163 #if defined(BCM_TRIDENT3_SUPPORT) || defined(BCM_TOMAHAWK3_SUPPORT) 20164 if (stat_config->hint.type == bcmStatGroupAllocHintEgressFieldGroup) { 20165 int egr_mode = 0; 20166 bcm_stat_flex_egress_mode_t *flex_egress_mode = NULL; 20167 bcm_stat_flex_custom_egress_mode_t custom_egr_mode; 20168 int off_mode = *mode_id - BCM_STAT_FLEX_COUNTER_MAX_MODE; 20169 20170 for (egr_mode = BCM_CUSTOM_EGRESS_MODE_START; 20171 egr_mode < BCM_STAT_FLEX_CUSTOM_EGRESS_COUNTER_MAX_MODE; 20172 egr_mode++) { 20173 if (_bcm_esw_stat_flex_get_custom_egress_mode_info(unit, 20174 egr_mode, &custom_egr_mode) == BCM_E_NOT_FOUND) { 20175 sal_memset(&custom_egr_mode, 0, 20176 sizeof(bcm_stat_flex_custom_egress_mode_t)); 20177 custom_egr_mode.used = 1; 20178 custom_egr_mode.hint.type = stat_config->hint.type; 20179 custom_egr_mode.hint.value = stat_config->hint.value; 20180 custom_egr_mode.AllocPool = -1; 20181 custom_egr_mode.offset_mode = off_mode; 20182 custom_egr_mode.num_selectors = num_selectors; 20183 custom_egr_mode.total_counters = stat_config->total_counters; 20184 _bcm_esw_stat_flex_update_custom_egress_mode_info(unit, 20185 egr_mode, &custom_egr_mode); 20186 rv = BCM_E_NONE; 20187 break; 20188 } 20189 } 20190 if (egr_mode == BCM_STAT_FLEX_CUSTOM_EGRESS_COUNTER_MAX_MODE) { 20191 _bcm_esw_stat_group_mode_id_destroy(unit, *mode_id); 20192 return BCM_E_MEMORY; 20193 } 20194 20195 custom_egr_mode.num_selectors = num_selectors; 20196 custom_egr_mode.total_counters = stat_config->total_counters; 20197 _bcm_esw_stat_flex_update_custom_egress_mode_info(unit, egr_mode, 20198 &custom_egr_mode); 20199 20200 flex_egress_mode = sal_alloc(sizeof(bcm_stat_flex_egress_mode_t), 20201 "flex_egress_mod"); 20202 if (flex_egress_mode == NULL) { 20203 return BCM_E_MEMORY; 20204 } 20205 20206 sal_memset(flex_egress_mode, 0, sizeof(bcm_stat_flex_egress_mode_t)); 20207 20208 if (_bcm_esw_stat_flex_get_egress_mode_info( 20209 unit, off_mode, flex_egress_mode) == BCM_E_NONE) { 20210 (void)_bcm_esw_stat_flex_update_egress_flex_info( 20211 unit, off_mode, stat_config->flags, nsel, 20212 attr_sel); 20213 } 20214 20215 sal_free(flex_egress_mode); 20216 20217 *mode_id = egr_mode; 20218 } 20219 #endif 20220 20221 return rv; 20222 } 20223 20224 bcm_error_t 20225 _bcm_esw_stat_group_mode_id_config_get( 20226 int unit, 20227 uint32 mode_id, 20228 bcm_stat_group_mode_id_config_t *stat_config, 20229 uint32 num_selectors, 20230 bcm_stat_group_mode_attr_selector_t *attr_sel, 20231 uint32 *actual_num_selectors) 20232 { 20233 bcm_error_t rv=BCM_E_CONFIG; 20234 bcm_stat_flex_custom_ingress_mode_t custom_ing_mode; 20235 int ing_mode = 0; 20236 20237 if ((mode_id < BCM_STAT_FLEX_CUSTOM_INGRESS_COUNTER_MAX_MODE) && 20238 (mode_id >= BCM_CUSTOM_INGRESS_MODE_START)) { 20239 rv = _bcm_esw_stat_flex_get_custom_ingress_mode_info(unit, mode_id, 20240 &custom_ing_mode); 20241 ing_mode = custom_ing_mode.offset_mode; 20242 if ((rv == BCM_E_NONE) && custom_ing_mode.used != 0) { 20243 rv = _bcm_esw_stat_group_mode_id_get(unit, ing_mode, &stat_config->flags, 20244 &stat_config->total_counters, 20245 num_selectors, 20246 attr_sel, actual_num_selectors); 20247 stat_config->hint = custom_ing_mode.hint; 20248 } 20249 } 20250 20251 #if defined(BCM_TRIDENT3_SUPPORT) 20252 if (SOC_IS_TRIDENT3X(unit)){ 20253 bcm_stat_flex_custom_egress_mode_t custom_egr_mode; 20254 int egr_mode = 0; 20255 20256 if ((mode_id < BCM_STAT_FLEX_CUSTOM_EGRESS_COUNTER_MAX_MODE) && 20257 (mode_id >= BCM_CUSTOM_EGRESS_MODE_START)) { 20258 rv = _bcm_esw_stat_flex_get_custom_egress_mode_info(unit, mode_id, 20259 &custom_egr_mode); 20260 egr_mode = custom_egr_mode.offset_mode; 20261 egr_mode += BCM_STAT_FLEX_COUNTER_MAX_MODE; 20262 if ((rv == BCM_E_NONE) && custom_egr_mode.used != 0) { 20263 rv = _bcm_esw_stat_group_mode_id_get(unit, egr_mode, &stat_config->flags, 20264 &stat_config->total_counters, 20265 num_selectors, 20266 attr_sel, actual_num_selectors); 20267 stat_config->hint = custom_egr_mode.hint; 20268 } 20269 } 20270 } 20271 #endif 20272 20273 return rv; 20274 } 20275 20276 int _bcm_esw_stat_flex_compress_mode_id_compare(int unit, 20277 bcm_stat_flex_direction_t direction, 20278 bcm_stat_flex_mode_t *mode, 20279 bcm_stat_flex_attribute_t *flex_attribute) 20280 { 20281 int total_counters,num_selectors; 20282 int rv = BCM_E_NONE; 20283 int attribute_set_is_same = TRUE; 20284 int index,counter,flags=0; 20285 bcm_stat_group_mode_attr_selector_t *old_attr_selectors=NULL; 20286 bcm_stat_flex_combine_attr_counter_t *old_combine_attr_counter = NULL; 20287 bcm_stat_flex_combine_attr_counter_t *new_combine_attr_counter = NULL; 20288 bcm_stat_flex_ingress_mode_t *flex_ingress_mode=NULL; 20289 bcm_stat_flex_egress_mode_t *flex_egress_mode=NULL; 20290 bcm_stat_flex_attribute_t old_flex_attributes = {0}; 20291 20292 if (direction == bcmStatFlexDirectionIngress && 20293 flex_attribute != NULL) { 20294 flex_ingress_mode = sal_alloc(sizeof(bcm_stat_flex_ingress_mode_t), 20295 "flex_ingress_mode"); 20296 if (flex_ingress_mode == NULL) { 20297 return BCM_E_MEMORY; 20298 } 20299 for (index =0 ; index < BCM_STAT_FLEX_COUNTER_MAX_MODE ; index++) { 20300 sal_memset(flex_ingress_mode,0,sizeof(bcm_stat_flex_ingress_mode_t)); 20301 if (old_attr_selectors != NULL) { 20302 sal_free(old_attr_selectors); 20303 old_attr_selectors = NULL; 20304 } 20305 if (_bcm_esw_stat_flex_get_ingress_mode_info( 20306 unit, 20307 index, 20308 flex_ingress_mode) == BCM_E_NONE) { 20309 20310 total_counters = flex_ingress_mode->total_counters; 20311 num_selectors = flex_ingress_mode->num_selectors; 20312 old_attr_selectors = flex_ingress_mode->attr_selectors; 20313 20314 if (flex_ingress_mode->ing_attr.packet_attr_type != 20315 bcmStatFlexPacketAttrTypeCompressed) { 20316 continue; 20317 } 20318 20319 if (old_flex_attributes.combine_attr_counter != NULL) { 20320 sal_free(old_flex_attributes.combine_attr_counter); 20321 old_flex_attributes.combine_attr_counter = NULL; 20322 } 20323 old_flex_attributes.combine_attr_counter = 20324 sal_alloc(sizeof(bcm_stat_flex_combine_attr_counter_t) * 20325 total_counters, "combine_attr_counter"); 20326 if (old_flex_attributes.combine_attr_counter == NULL) { 20327 sal_free(flex_ingress_mode); 20328 sal_free(old_attr_selectors); 20329 return BCM_E_MEMORY; 20330 } 20331 sal_memset(old_flex_attributes.combine_attr_counter, 20332 0,sizeof(bcm_stat_flex_combine_attr_counter_t) * total_counters); 20333 rv = _bcm_esw_stat_group_mode_fillup_values(unit, 20334 flags, total_counters, num_selectors, old_attr_selectors, &old_flex_attributes); 20335 20336 /* Check counters set */ 20337 if (flex_attribute->total_counters != 20338 old_flex_attributes.total_counters) { 20339 continue; 20340 } 20341 20342 old_combine_attr_counter = sal_alloc( 20343 sizeof(bcm_stat_flex_combine_attr_counter_t), 20344 "old_combine_attr_counter"); 20345 if (old_combine_attr_counter == NULL) { 20346 sal_free(flex_ingress_mode); 20347 sal_free(old_attr_selectors); 20348 sal_free(old_flex_attributes.combine_attr_counter); 20349 return BCM_E_MEMORY; 20350 } 20351 new_combine_attr_counter = 20352 sal_alloc(sizeof(bcm_stat_flex_combine_attr_counter_t), 20353 "new_combine_attr_counter"); 20354 if (new_combine_attr_counter == NULL) { 20355 sal_free(flex_ingress_mode); 20356 sal_free(old_attr_selectors); 20357 sal_free(old_combine_attr_counter); 20358 sal_free(old_flex_attributes.combine_attr_counter); 20359 return BCM_E_MEMORY; 20360 } 20361 for (counter=0; counter < flex_attribute->total_counters ; counter++) { 20362 sal_memset(old_combine_attr_counter, 20363 0,sizeof(bcm_stat_flex_combine_attr_counter_t)); 20364 sal_memset(new_combine_attr_counter, 20365 0,sizeof(bcm_stat_flex_combine_attr_counter_t)); 20366 sal_memcpy(old_combine_attr_counter, 20367 &old_flex_attributes.combine_attr_counter[counter], 20368 sizeof(bcm_stat_flex_combine_attr_counter_t)); 20369 sal_memcpy(new_combine_attr_counter, 20370 &flex_attribute->combine_attr_counter[counter], 20371 sizeof(bcm_stat_flex_combine_attr_counter_t)); 20372 /* compare combine attribute set */ 20373 if (sal_memcmp(old_combine_attr_counter, new_combine_attr_counter, 20374 sizeof(bcm_stat_flex_combine_attr_counter_t)) != 0) { 20375 attribute_set_is_same = FALSE; 20376 break; 20377 } 20378 } 20379 /* If attribute set are same */ 20380 if (attribute_set_is_same == TRUE) { 20381 rv = BCM_E_EXISTS; 20382 } 20383 if (old_combine_attr_counter != NULL) { 20384 sal_free(old_combine_attr_counter); 20385 old_combine_attr_counter = NULL; 20386 } 20387 if (new_combine_attr_counter != NULL) { 20388 sal_free(new_combine_attr_counter); 20389 new_combine_attr_counter = NULL; 20390 } 20391 } 20392 } 20393 if(flex_ingress_mode != NULL) { 20394 sal_free(flex_ingress_mode); 20395 flex_ingress_mode = NULL; 20396 } 20397 if (old_attr_selectors != NULL) { 20398 sal_free(old_attr_selectors); 20399 old_attr_selectors = NULL; 20400 } 20401 if (old_flex_attributes.combine_attr_counter != NULL) { 20402 sal_free(old_flex_attributes.combine_attr_counter); 20403 old_flex_attributes.combine_attr_counter = NULL; 20404 } 20405 } 20406 /* Egress direction */ 20407 if (direction == bcmStatFlexDirectionEgress && 20408 flex_attribute != NULL) { 20409 flex_egress_mode = sal_alloc(sizeof(bcm_stat_flex_egress_mode_t), 20410 "flex_egress_mode"); 20411 if (flex_egress_mode == NULL) { 20412 return BCM_E_MEMORY; 20413 } 20414 for (index =0 ; index < BCM_STAT_FLEX_COUNTER_MAX_MODE ; index++) { 20415 sal_memset(flex_egress_mode,0,sizeof(bcm_stat_flex_egress_mode_t)); 20416 if (old_attr_selectors != NULL) { 20417 sal_free(old_attr_selectors); 20418 old_attr_selectors = NULL; 20419 } 20420 if (_bcm_esw_stat_flex_get_egress_mode_info( 20421 unit, 20422 index, 20423 flex_egress_mode) == BCM_E_NONE) { 20424 20425 total_counters = flex_egress_mode->total_counters; 20426 num_selectors = flex_egress_mode->num_selectors; 20427 old_attr_selectors = flex_egress_mode->attr_selectors; 20428 20429 if (flex_egress_mode->egr_attr.packet_attr_type != 20430 bcmStatFlexPacketAttrTypeCompressed) { 20431 continue; 20432 } 20433 20434 if (old_flex_attributes.combine_attr_counter != NULL) { 20435 sal_free(old_flex_attributes.combine_attr_counter); 20436 old_flex_attributes.combine_attr_counter = NULL; 20437 } 20438 old_flex_attributes.combine_attr_counter = 20439 sal_alloc(sizeof(bcm_stat_flex_combine_attr_counter_t) * 20440 total_counters, "combine_attr_counter"); 20441 if (old_flex_attributes.combine_attr_counter == NULL) { 20442 sal_free(flex_egress_mode); 20443 sal_free(old_attr_selectors); 20444 return BCM_E_MEMORY; 20445 } 20446 sal_memset(old_flex_attributes.combine_attr_counter, 20447 0,sizeof(bcm_stat_flex_combine_attr_counter_t) * total_counters); 20448 rv = _bcm_esw_stat_group_mode_fillup_values(unit, 20449 flags, total_counters, num_selectors, old_attr_selectors, &old_flex_attributes); 20450 20451 /* Check counters set */ 20452 if (flex_attribute->total_counters != 20453 old_flex_attributes.total_counters) { 20454 continue; 20455 } 20456 20457 old_combine_attr_counter = sal_alloc( 20458 sizeof(bcm_stat_flex_combine_attr_counter_t), 20459 "old_combine_attr_counter"); 20460 20461 if (old_combine_attr_counter == NULL) { 20462 sal_free(flex_egress_mode); 20463 sal_free(old_attr_selectors); 20464 sal_free(old_flex_attributes.combine_attr_counter); 20465 return BCM_E_MEMORY; 20466 } 20467 new_combine_attr_counter = 20468 sal_alloc(sizeof(bcm_stat_flex_combine_attr_counter_t), 20469 "new_combine_attr_counter"); 20470 20471 if (new_combine_attr_counter == NULL) { 20472 sal_free(flex_egress_mode); 20473 sal_free(old_attr_selectors); 20474 sal_free(old_combine_attr_counter); 20475 sal_free(old_flex_attributes.combine_attr_counter); 20476 return BCM_E_MEMORY; 20477 } 20478 for (counter=0; counter < flex_attribute->total_counters ; counter++) { 20479 sal_memset(old_combine_attr_counter, 20480 0,sizeof(bcm_stat_flex_combine_attr_counter_t)); 20481 sal_memset(new_combine_attr_counter, 20482 0,sizeof(bcm_stat_flex_combine_attr_counter_t)); 20483 sal_memcpy(old_combine_attr_counter, 20484 &old_flex_attributes.combine_attr_counter[counter], 20485 sizeof(bcm_stat_flex_combine_attr_counter_t)); 20486 sal_memcpy(new_combine_attr_counter, 20487 &flex_attribute->combine_attr_counter[counter], 20488 sizeof(bcm_stat_flex_combine_attr_counter_t)); 20489 /* compare combine attribute set */ 20490 if (sal_memcmp(old_combine_attr_counter, new_combine_attr_counter, 20491 sizeof(bcm_stat_flex_combine_attr_counter_t)) != 0) { 20492 attribute_set_is_same = FALSE; 20493 break; 20494 } 20495 } 20496 /* If attribute set are same */ 20497 if (attribute_set_is_same == TRUE) { 20498 rv = BCM_E_EXISTS; 20499 } 20500 if (old_combine_attr_counter != NULL) { 20501 sal_free(old_combine_attr_counter); 20502 old_combine_attr_counter = NULL; 20503 } 20504 if (new_combine_attr_counter != NULL) { 20505 sal_free(new_combine_attr_counter); 20506 new_combine_attr_counter = NULL; 20507 } 20508 } 20509 } 20510 if(flex_egress_mode != NULL) { 20511 sal_free(flex_egress_mode); 20512 flex_egress_mode = NULL; 20513 } 20514 if (old_attr_selectors != NULL) { 20515 sal_free(old_attr_selectors); 20516 old_attr_selectors = NULL; 20517 } 20518 if (old_flex_attributes.combine_attr_counter != NULL) { 20519 sal_free(old_flex_attributes.combine_attr_counter); 20520 old_flex_attributes.combine_attr_counter = NULL; 20521 } 20522 } 20523 return rv; 20524 } 20525 20526 STATIC 20527 int _bcm_stat_flex_compressed_tbl_dma_write(int unit, 20528 soc_mem_t tbl_mem, soc_field_t field, 20529 int alloc_size,uint8 *data_ptr) 20530 { 20531 uint32 *dma_map_ptr= NULL; 20532 uint32 map_array_value = 0; 20533 int index =0; 20534 20535 dma_map_ptr=soc_cm_salloc(unit,alloc_size, "dma_map_ptr"); 20536 if (dma_map_ptr== NULL) { 20537 return BCM_E_MEMORY; 20538 } 20539 20540 sal_memset(dma_map_ptr, 0,alloc_size); 20541 if (soc_mem_read_range( 20542 unit, 20543 tbl_mem, 20544 MEM_BLOCK_ANY, 20545 soc_mem_index_min(unit,tbl_mem), 20546 soc_mem_index_max(unit,tbl_mem), 20547 dma_map_ptr) != BCM_E_NONE){ 20548 soc_cm_sfree(unit,dma_map_ptr); 20549 return BCM_E_INTERNAL; 20550 } 20551 20552 for (index=0; 20553 index< soc_mem_index_count(unit,tbl_mem); 20554 index++) { 20555 map_array_value = data_ptr[index]; 20556 soc_mem_field_set( 20557 unit, 20558 tbl_mem, 20559 &dma_map_ptr[index], 20560 field, 20561 &map_array_value); 20562 } 20563 20564 if (soc_mem_write_range( 20565 unit, 20566 tbl_mem, 20567 MEM_BLOCK_ALL, 20568 soc_mem_index_min(unit,tbl_mem), 20569 soc_mem_index_max(unit,tbl_mem), 20570 dma_map_ptr) != BCM_E_NONE){ 20571 soc_cm_sfree(unit,dma_map_ptr); 20572 return BCM_E_INTERNAL; 20573 } 20574 20575 soc_cm_sfree(unit,dma_map_ptr); 20576 return BCM_E_NONE; 20577 } 20578 20579 int _bcm_stat_flex_compressed_attr_tbl_write(int unit, 20580 bcm_stat_flex_direction_t direction, 20581 bcm_stat_flex_ing_cmprsd_attr_selectors_t *cmprsd_attr_selectors, 20582 bcm_stat_flex_egr_cmprsd_attr_selectors_t *egr_cmprsd_attr_selectors) 20583 { 20584 uint8 *ref_count_p = NULL; 20585 bcm_stat_flex_ing_pkt_attr_bits_t pkt_attr_bits={0}; 20586 bcm_stat_flex_egr_pkt_attr_bits_t egr_pkt_attr_bits={0}; 20587 _bcm_stat_flex_compressed_mode_attr_sel_map_t *cmprsd_attr_map = NULL; 20588 uint32 alloc_size=0; 20589 20590 /* Update reference count per compression table to 20591 * avoid overwriting */ 20592 /* Ingress direction */ 20593 if (direction == bcmStatFlexDirectionIngress) { 20594 cmprsd_attr_map = global_stat_flex_compressed_attr_map[unit]; 20595 if (cmprsd_attr_map == NULL || cmprsd_attr_selectors == NULL) { 20596 return BCM_E_MEMORY; 20597 } 20598 20599 /* User configured values */ 20600 pkt_attr_bits = cmprsd_attr_selectors->pkt_attr_bits; 20601 /* ING_FLEX_CTR_PRI_CNG_MAPm */ 20602 if ((pkt_attr_bits.cng != 0) || 20603 (pkt_attr_bits.ifp_cng) || 20604 (pkt_attr_bits.int_pri)) { 20605 /* Get refrence count of ING_FLEX_CTR_PRI_CNG_MAPm table */ 20606 ref_count_p = &cmprsd_attr_map->ref_counts[ing_pkt_attr_pri_cng_map]; 20607 /* If ref count is zero table is not in use hence allowed to write 20608 * only once for a set of packet attributes */ 20609 if (*ref_count_p == 0) { 20610 alloc_size = soc_mem_index_count(unit,ING_FLEX_CTR_PRI_CNG_MAPm) * 20611 sizeof(ing_flex_ctr_pri_cng_map_entry_t); 20612 if(_bcm_stat_flex_compressed_tbl_dma_write(unit, 20613 ING_FLEX_CTR_PRI_CNG_MAPm, 20614 PRI_CNG_FNf, 20615 alloc_size, 20616 cmprsd_attr_selectors->pri_cnf_attr_map) != 20617 BCM_E_NONE) { 20618 return BCM_E_INTERNAL; 20619 } 20620 /* update global structure */ 20621 cmprsd_attr_map->cng = 1; 20622 cmprsd_attr_map->ifp_cng = 1; 20623 cmprsd_attr_map->int_pri = 1; 20624 } 20625 (*ref_count_p)++; 20626 } 20627 20628 /* ING_FLEX_CTR_PKT_PRI_MAPm */ 20629 if ((pkt_attr_bits.vlan_format != 0) || 20630 (pkt_attr_bits.outer_dot1p) || 20631 (pkt_attr_bits.inner_dot1p)) { 20632 /* Get refrence count of ING_FLEX_CTR_PKT_PRI_MAPm table */ 20633 ref_count_p = &cmprsd_attr_map->ref_counts[ing_pkt_attr_pkt_pri_map]; 20634 /* If ref count is zero table is not in use hence allowed to write 20635 * only once for a set of packet attributes */ 20636 if (*ref_count_p == 0) { 20637 /* Sanity Check */ 20638 alloc_size = soc_mem_index_count(unit, ING_FLEX_CTR_PKT_PRI_MAPm) * 20639 sizeof(ing_flex_ctr_pkt_pri_map_entry_t); 20640 if(_bcm_stat_flex_compressed_tbl_dma_write(unit, 20641 ING_FLEX_CTR_PKT_PRI_MAPm, 20642 PKT_PRI_FNf, 20643 alloc_size, 20644 cmprsd_attr_selectors->pkt_pri_attr_map) != 20645 BCM_E_NONE) { 20646 return BCM_E_INTERNAL; 20647 } 20648 /* update global structure */ 20649 cmprsd_attr_map->vlan_format = 1; 20650 cmprsd_attr_map->outer_dot1p = 1; 20651 cmprsd_attr_map->inner_dot1p = 1; 20652 } 20653 (*ref_count_p)++; 20654 } 20655 20656 /* ING_FLEX_CTR_PORT_MAPm */ 20657 if (pkt_attr_bits.ing_port != 0) { 20658 /* Get refrence count of ING_FLEX_CTR_PORT_MAPm table */ 20659 ref_count_p = &cmprsd_attr_map->ref_counts[ing_pkt_attr_port_map]; 20660 /* If ref count is zero table is not in use hence allowed to write 20661 * only once for a set of packet attributes */ 20662 if (*ref_count_p == 0) { 20663 alloc_size = soc_mem_index_count(unit, ING_FLEX_CTR_PORT_MAPm) * 20664 sizeof(ing_flex_ctr_port_map_entry_t); 20665 if(_bcm_stat_flex_compressed_tbl_dma_write(unit, 20666 ING_FLEX_CTR_PORT_MAPm, 20667 PORT_FNf, 20668 alloc_size, 20669 cmprsd_attr_selectors->port_attr_map) != 20670 BCM_E_NONE) { 20671 return BCM_E_INTERNAL; 20672 } 20673 /* update global structure */ 20674 cmprsd_attr_map->port= 1; 20675 } 20676 (*ref_count_p)++; 20677 } 20678 20679 /* ING_FLEX_CTR_TOS_MAPm */ 20680 if ((pkt_attr_bits.tos_dscp != 0) || 20681 (pkt_attr_bits.tos_ecn != 0)) { 20682 /* Get refrence count of ING_FLEX_CTR_TOS_MAPm table */ 20683 ref_count_p = &cmprsd_attr_map->ref_counts[ing_pkt_attr_tos_map]; 20684 if (*ref_count_p == 0) { 20685 alloc_size = soc_mem_index_count(unit,ING_FLEX_CTR_TOS_MAPm) * 20686 sizeof(ing_flex_ctr_tos_map_entry_t); 20687 if(_bcm_stat_flex_compressed_tbl_dma_write(unit, 20688 ING_FLEX_CTR_TOS_MAPm, 20689 TOS_FNf, 20690 alloc_size, 20691 cmprsd_attr_selectors->tos_attr_map) != 20692 BCM_E_NONE) { 20693 return BCM_E_INTERNAL; 20694 } 20695 cmprsd_attr_map->tos_dscp = 1; 20696 cmprsd_attr_map->tos_ecn = 1; 20697 } 20698 (*ref_count_p)++; 20699 } 20700 20701 /* ING_FLEX_CTR_PKT_RES_MAPm */ 20702 if ((pkt_attr_bits.pkt_resolution != 0) || 20703 (pkt_attr_bits.svp_type) || 20704 (pkt_attr_bits.drop)) { 20705 /* Get refrence count of ING_FLEX_CTR_PKT_RES_MAPm table */ 20706 ref_count_p = &cmprsd_attr_map->ref_counts[ing_pkt_attr_pkt_res_map]; 20707 if (*ref_count_p == 0) { 20708 alloc_size = soc_mem_index_count(unit, ING_FLEX_CTR_PKT_RES_MAPm) * 20709 sizeof(ing_flex_ctr_pkt_res_map_entry_t); 20710 if(_bcm_stat_flex_compressed_tbl_dma_write(unit, 20711 ING_FLEX_CTR_PKT_RES_MAPm, 20712 PKT_RES_FNf, 20713 alloc_size, 20714 cmprsd_attr_selectors->pkt_res_attr_map) != 20715 BCM_E_NONE) { 20716 return BCM_E_INTERNAL; 20717 } 20718 cmprsd_attr_map->pkt_resolution = 1; 20719 cmprsd_attr_map->svp_type = 1; 20720 cmprsd_attr_map->drop = 1; 20721 } 20722 (*ref_count_p)++; 20723 } 20724 } 20725 20726 /* Egress direction */ 20727 if (direction == bcmStatFlexDirectionEgress) { 20728 cmprsd_attr_map = egr_global_stat_flex_compressed_attr_map[unit]; 20729 if (cmprsd_attr_map == NULL || 20730 egr_cmprsd_attr_selectors == NULL) { 20731 return BCM_E_MEMORY; 20732 } 20733 20734 egr_pkt_attr_bits = egr_cmprsd_attr_selectors->pkt_attr_bits; 20735 /* EGR_FLEX_CTR_PRI_CNG_MAPm */ 20736 if ((egr_pkt_attr_bits.cng != 0) || 20737 (egr_pkt_attr_bits.int_pri)) { 20738 ref_count_p = &cmprsd_attr_map->ref_counts[egr_pkt_attr_pri_cng_map]; 20739 if (*ref_count_p == 0) { 20740 alloc_size = soc_mem_index_count(unit,EGR_FLEX_CTR_PRI_CNG_MAPm) * 20741 sizeof(egr_flex_ctr_pri_cng_map_entry_t); 20742 if(_bcm_stat_flex_compressed_tbl_dma_write(unit, 20743 EGR_FLEX_CTR_PRI_CNG_MAPm, 20744 PRI_CNG_FNf, 20745 alloc_size, 20746 egr_cmprsd_attr_selectors->pri_cnf_attr_map) != 20747 BCM_E_NONE) { 20748 return BCM_E_INTERNAL; 20749 } 20750 cmprsd_attr_map->cng = 1; 20751 cmprsd_attr_map->int_pri = 1; 20752 } 20753 (*ref_count_p)++; 20754 } 20755 /* EGR_FLEX_CTR_PKT_PRI_MAPm */ 20756 if ((egr_pkt_attr_bits.vlan_format != 0) || 20757 (egr_pkt_attr_bits.outer_dot1p) || 20758 (egr_pkt_attr_bits.inner_dot1p)) { 20759 ref_count_p = &cmprsd_attr_map->ref_counts[egr_pkt_attr_pkt_pri_map]; 20760 if (*ref_count_p == 0) { 20761 alloc_size= soc_mem_index_count(unit,EGR_FLEX_CTR_PKT_PRI_MAPm) * 20762 sizeof(egr_flex_ctr_pkt_pri_map_entry_t); 20763 if(_bcm_stat_flex_compressed_tbl_dma_write(unit, 20764 EGR_FLEX_CTR_PKT_PRI_MAPm, 20765 PKT_PRI_FNf, 20766 alloc_size, 20767 egr_cmprsd_attr_selectors->pkt_pri_attr_map) != 20768 BCM_E_NONE) { 20769 return BCM_E_INTERNAL; 20770 } 20771 /* update global structure */ 20772 cmprsd_attr_map->vlan_format = 1; 20773 cmprsd_attr_map->outer_dot1p = 1; 20774 cmprsd_attr_map->inner_dot1p = 1; 20775 } 20776 (*ref_count_p)++; 20777 } 20778 20779 /* EGR_FLEX_CTR_PORT_MAPm */ 20780 if (egr_pkt_attr_bits.egr_port != 0){ 20781 ref_count_p = &cmprsd_attr_map->ref_counts[egr_pkt_attr_port_map]; 20782 if (*ref_count_p == 0) { 20783 alloc_size= soc_mem_index_count(unit,EGR_FLEX_CTR_PORT_MAPm) * 20784 sizeof(egr_flex_ctr_port_map_entry_t); 20785 if(_bcm_stat_flex_compressed_tbl_dma_write(unit, 20786 EGR_FLEX_CTR_PORT_MAPm, 20787 PORT_FNf, 20788 alloc_size, 20789 egr_cmprsd_attr_selectors->port_attr_map) != 20790 BCM_E_NONE) { 20791 return BCM_E_INTERNAL; 20792 } 20793 /* update global structure */ 20794 cmprsd_attr_map->port= 1; 20795 } 20796 (*ref_count_p)++; 20797 } 20798 /* EGR_FLEX_CTR_TOS_MAPm */ 20799 if ((egr_pkt_attr_bits.tos_dscp != 0) || 20800 (egr_pkt_attr_bits.tos_ecn != 0)) { 20801 ref_count_p = &cmprsd_attr_map->ref_counts[egr_pkt_attr_tos_map]; 20802 if (*ref_count_p == 0) { 20803 alloc_size = soc_mem_index_count(unit,EGR_FLEX_CTR_TOS_MAPm) * 20804 sizeof(egr_flex_ctr_tos_map_entry_t); 20805 if(_bcm_stat_flex_compressed_tbl_dma_write(unit, 20806 EGR_FLEX_CTR_TOS_MAPm, 20807 TOS_FNf, 20808 alloc_size, 20809 egr_cmprsd_attr_selectors->tos_attr_map) != 20810 BCM_E_NONE) { 20811 return BCM_E_INTERNAL; 20812 } 20813 cmprsd_attr_map->tos_dscp = 1; 20814 cmprsd_attr_map->tos_ecn = 1; 20815 } 20816 (*ref_count_p)++; 20817 } 20818 20819 if ((egr_pkt_attr_bits.pkt_resolution != 0) || 20820 (egr_pkt_attr_bits.svp_type) || 20821 (egr_pkt_attr_bits.dvp_type) || 20822 (egr_pkt_attr_bits.drop)){ 20823 ref_count_p = &cmprsd_attr_map->ref_counts[egr_pkt_attr_pkt_res_map]; 20824 if (*ref_count_p == 0) { 20825 alloc_size = soc_mem_index_count(unit,EGR_FLEX_CTR_PKT_RES_MAPm) * 20826 sizeof(egr_flex_ctr_pkt_res_map_entry_t); 20827 if(_bcm_stat_flex_compressed_tbl_dma_write(unit, 20828 EGR_FLEX_CTR_PKT_RES_MAPm, 20829 PKT_RES_FNf, 20830 alloc_size, 20831 egr_cmprsd_attr_selectors->pkt_res_attr_map) != 20832 BCM_E_NONE) { 20833 return BCM_E_INTERNAL; 20834 } 20835 cmprsd_attr_map->pkt_resolution = 1; 20836 cmprsd_attr_map->svp_type = 1; 20837 cmprsd_attr_map->dvp_type = 1; 20838 cmprsd_attr_map->drop = 1; 20839 } 20840 (*ref_count_p)++; 20841 } 20842 } 20843 return BCM_E_NONE; 20844 } 20845 20846 int _bcm_stat_flex_compressed_attr_tbl_clear(int unit, 20847 bcm_stat_flex_direction_t direction, 20848 bcm_stat_flex_ing_cmprsd_attr_selectors_t *cmprsd_attr_selectors, 20849 bcm_stat_flex_egr_cmprsd_attr_selectors_t *egr_cmprsd_attr_selectors) 20850 { 20851 20852 uint8 *ref_count_p = NULL; 20853 bcm_stat_flex_ing_pkt_attr_bits_t pkt_attr_bits={0}; 20854 bcm_stat_flex_egr_pkt_attr_bits_t egr_pkt_attr_bits={0}; 20855 _bcm_stat_flex_compressed_mode_attr_sel_map_t *cmprsd_attr_map = NULL; 20856 20857 if (direction == bcmStatFlexDirectionIngress) { 20858 cmprsd_attr_map = global_stat_flex_compressed_attr_map[unit]; 20859 if (cmprsd_attr_map == NULL || cmprsd_attr_selectors == NULL) { 20860 return BCM_E_FAIL; 20861 } 20862 20863 pkt_attr_bits = cmprsd_attr_selectors->pkt_attr_bits; 20864 /* ING_FLEX_CTR_PRI_CNG_MAPm */ 20865 if ((pkt_attr_bits.cng != 0) || 20866 (pkt_attr_bits.ifp_cng) || 20867 (pkt_attr_bits.int_pri)) { 20868 ref_count_p = &cmprsd_attr_map->ref_counts[ing_pkt_attr_pri_cng_map]; 20869 if (*ref_count_p == 1) { 20870 SOC_IF_ERROR_RETURN(soc_mem_clear(unit, 20871 ING_FLEX_CTR_PRI_CNG_MAPm, 20872 MEM_BLOCK_ALL,TRUE)); 20873 cmprsd_attr_map->cng = 0; 20874 cmprsd_attr_map->ifp_cng = 0; 20875 cmprsd_attr_map->int_pri = 0; 20876 } 20877 (*ref_count_p)--; 20878 } 20879 20880 /* ING_FLEX_CTR_PKT_PRI_MAPm */ 20881 if ((pkt_attr_bits.vlan_format != 0) || 20882 (pkt_attr_bits.outer_dot1p) || 20883 (pkt_attr_bits.inner_dot1p)) { 20884 ref_count_p = &cmprsd_attr_map->ref_counts[ing_pkt_attr_pkt_pri_map]; 20885 if (*ref_count_p == 1) { 20886 SOC_IF_ERROR_RETURN(soc_mem_clear(unit, 20887 ING_FLEX_CTR_PKT_PRI_MAPm, 20888 MEM_BLOCK_ALL,TRUE)); 20889 /* update global structure */ 20890 cmprsd_attr_map->vlan_format = 0; 20891 cmprsd_attr_map->outer_dot1p = 0; 20892 cmprsd_attr_map->inner_dot1p = 0; 20893 } 20894 (*ref_count_p)--; 20895 } 20896 20897 /* ING_FLEX_CTR_PORT_MAPm */ 20898 if (pkt_attr_bits.ing_port != 0) { 20899 ref_count_p = &cmprsd_attr_map->ref_counts[ing_pkt_attr_port_map]; 20900 if (*ref_count_p == 1) { 20901 SOC_IF_ERROR_RETURN(soc_mem_clear(unit, 20902 ING_FLEX_CTR_PORT_MAPm, 20903 MEM_BLOCK_ALL,TRUE)); 20904 /* update global structure */ 20905 cmprsd_attr_map->port= 0; 20906 } 20907 (*ref_count_p)--; 20908 } 20909 20910 /* ING_FLEX_CTR_TOS_MAPm */ 20911 if ((pkt_attr_bits.tos_dscp != 0) || 20912 (pkt_attr_bits.tos_ecn != 0)) { 20913 ref_count_p = &cmprsd_attr_map->ref_counts[ing_pkt_attr_tos_map]; 20914 if (*ref_count_p == 1) { 20915 SOC_IF_ERROR_RETURN(soc_mem_clear(unit, 20916 ING_FLEX_CTR_TOS_MAPm, 20917 MEM_BLOCK_ALL,TRUE)); 20918 cmprsd_attr_map->tos_dscp = 1; 20919 cmprsd_attr_map->tos_ecn = 1; 20920 } 20921 (*ref_count_p)--; 20922 } 20923 20924 /* ING_FLEX_CTR_PKT_RES_MAPm */ 20925 if ((pkt_attr_bits.pkt_resolution != 0) || 20926 (pkt_attr_bits.svp_type) || 20927 (pkt_attr_bits.drop)) { 20928 ref_count_p = &cmprsd_attr_map->ref_counts[ing_pkt_attr_pkt_res_map]; 20929 if (*ref_count_p == 1) { 20930 SOC_IF_ERROR_RETURN(soc_mem_clear(unit, 20931 ING_FLEX_CTR_PKT_RES_MAPm, 20932 MEM_BLOCK_ALL,TRUE)); 20933 cmprsd_attr_map->pkt_resolution = 0; 20934 cmprsd_attr_map->svp_type = 0; 20935 cmprsd_attr_map->drop = 0; 20936 } 20937 (*ref_count_p)--; 20938 } 20939 } 20940 20941 if (direction == bcmStatFlexDirectionEgress) { 20942 cmprsd_attr_map = egr_global_stat_flex_compressed_attr_map[unit]; 20943 if (cmprsd_attr_map == NULL || egr_cmprsd_attr_selectors == NULL) { 20944 return BCM_E_MEMORY; 20945 } 20946 20947 egr_pkt_attr_bits = egr_cmprsd_attr_selectors->pkt_attr_bits; 20948 if ((egr_pkt_attr_bits.cng != 0) || 20949 (egr_pkt_attr_bits.int_pri)) { 20950 ref_count_p = &cmprsd_attr_map->ref_counts[ing_pkt_attr_pri_cng_map]; 20951 if (*ref_count_p == 1) { 20952 SOC_IF_ERROR_RETURN(soc_mem_clear(unit, 20953 EGR_FLEX_CTR_PRI_CNG_MAPm, 20954 MEM_BLOCK_ALL,TRUE)); 20955 cmprsd_attr_map->cng = 0; 20956 cmprsd_attr_map->int_pri = 0; 20957 } 20958 (*ref_count_p)--; 20959 } 20960 20961 if ((egr_pkt_attr_bits.vlan_format != 0) || 20962 (egr_pkt_attr_bits.outer_dot1p) || 20963 (egr_pkt_attr_bits.inner_dot1p)) { 20964 ref_count_p = &cmprsd_attr_map->ref_counts[egr_pkt_attr_pkt_pri_map]; 20965 if (*ref_count_p == 1) { 20966 SOC_IF_ERROR_RETURN(soc_mem_clear(unit, 20967 EGR_FLEX_CTR_PKT_PRI_MAPm, 20968 MEM_BLOCK_ALL,TRUE)); 20969 /* update global structure */ 20970 cmprsd_attr_map->vlan_format = 0; 20971 cmprsd_attr_map->outer_dot1p = 0; 20972 cmprsd_attr_map->inner_dot1p = 0; 20973 } 20974 (*ref_count_p)--; 20975 } 20976 20977 if (egr_pkt_attr_bits.egr_port != 0){ 20978 ref_count_p = &cmprsd_attr_map->ref_counts[egr_pkt_attr_port_map]; 20979 if (*ref_count_p == 1) { 20980 SOC_IF_ERROR_RETURN(soc_mem_clear(unit, 20981 EGR_FLEX_CTR_PORT_MAPm, 20982 MEM_BLOCK_ALL,TRUE)); 20983 /* update global structure */ 20984 cmprsd_attr_map->port= 0; 20985 } 20986 (*ref_count_p)--; 20987 } 20988 20989 if ((egr_pkt_attr_bits.tos_dscp != 0) || 20990 (egr_pkt_attr_bits.tos_ecn != 0)) { 20991 ref_count_p = &cmprsd_attr_map->ref_counts[egr_pkt_attr_tos_map]; 20992 if (*ref_count_p == 1) { 20993 SOC_IF_ERROR_RETURN(soc_mem_clear(unit, 20994 EGR_FLEX_CTR_TOS_MAPm, 20995 MEM_BLOCK_ALL,TRUE)); 20996 cmprsd_attr_map->tos_dscp = 0; 20997 cmprsd_attr_map->tos_ecn = 0; 20998 } 20999 (*ref_count_p)--; 21000 } 21001 21002 if ((egr_pkt_attr_bits.pkt_resolution != 0) || 21003 (egr_pkt_attr_bits.svp_type) || 21004 (egr_pkt_attr_bits.dvp_type) || 21005 (egr_pkt_attr_bits.drop)){ 21006 ref_count_p = &cmprsd_attr_map->ref_counts[egr_pkt_attr_pkt_res_map]; 21007 if (*ref_count_p == 1) { 21008 SOC_IF_ERROR_RETURN(soc_mem_clear(unit, 21009 EGR_FLEX_CTR_PKT_RES_MAPm, 21010 MEM_BLOCK_ALL,TRUE)); 21011 cmprsd_attr_map->pkt_resolution = 0; 21012 cmprsd_attr_map->svp_type = 0; 21013 cmprsd_attr_map->dvp_type = 0; 21014 cmprsd_attr_map->drop = 0; 21015 } 21016 (*ref_count_p)--; 21017 } 21018 } 21019 return BCM_E_NONE; 21020 } 21021 21022 int _bcm_esw_stat_flex_compressed_shared_attr_map_init(int unit,int alloc) 21023 { 21024 if (alloc == TRUE) { 21025 if (global_stat_flex_compressed_attr_map[unit] == NULL) { 21026 /* For Ingress direction */ 21027 global_stat_flex_compressed_attr_map[unit] = sal_alloc( 21028 sizeof (_bcm_stat_flex_compressed_mode_attr_sel_map_t), 21029 "compressed attr map"); 21030 if (global_stat_flex_compressed_attr_map[unit] == NULL) { 21031 return BCM_E_MEMORY; 21032 } 21033 sal_memset(global_stat_flex_compressed_attr_map[unit], 0, 21034 sizeof (_bcm_stat_flex_compressed_mode_attr_sel_map_t)); 21035 } 21036 /* For Egress direction */ 21037 if (egr_global_stat_flex_compressed_attr_map[unit] == NULL) { 21038 21039 egr_global_stat_flex_compressed_attr_map[unit] = sal_alloc( 21040 sizeof (_bcm_stat_flex_compressed_mode_attr_sel_map_t), 21041 "compressed attr map"); 21042 if (egr_global_stat_flex_compressed_attr_map[unit] == NULL) { 21043 return BCM_E_MEMORY; 21044 } 21045 sal_memset(egr_global_stat_flex_compressed_attr_map[unit], 0, 21046 sizeof (_bcm_stat_flex_compressed_mode_attr_sel_map_t)); 21047 } 21048 } else { 21049 sal_free(global_stat_flex_compressed_attr_map[unit]); 21050 global_stat_flex_compressed_attr_map[unit] = NULL; 21051 21052 sal_free(egr_global_stat_flex_compressed_attr_map[unit]); 21053 egr_global_stat_flex_compressed_attr_map[unit] = NULL; 21054 21055 } 21056 return BCM_E_NONE; 21057 } 21058 21059 /* 21060 * Function: 21061 * _bcm_esw_stat_flex_compressed_attr_flags_sync 21062 * Purpose: 21063 * Sync compressed attr maps to scache. 21064 * Parameters: 21065 * unit - (IN) unit number 21066 * scache_position - (IN/OUT) Scache position 21067 * Returns: 21068 * BCM_E_XXX 21069 */ 21070 int 21071 _bcm_esw_stat_flex_compressed_attr_flags_sync(int unit, uint8 **scache_position) 21072 { 21073 int i = 0; 21074 uint8 *scache_ptr = NULL; 21075 uint32 array_size = 0; 21076 _bcm_stat_flex_compressed_mode_attr_sel_map_t *cmprsd_attr_map = NULL; 21077 _bcm_stat_flex_compressed_mode_attr_sel_map_t *egr_cmprsd_attr_map = NULL; 21078 21079 scache_ptr = (uint8 *)*scache_position; 21080 21081 cmprsd_attr_map = global_stat_flex_compressed_attr_map[unit]; 21082 egr_cmprsd_attr_map = egr_global_stat_flex_compressed_attr_map[unit]; 21083 if (cmprsd_attr_map != NULL) { 21084 if (cmprsd_attr_map->int_pri != 0) { 21085 sal_memcpy(scache_ptr, 21086 &cmprsd_attr_map->combine_int_pri_flags, 21087 sizeof(uint32)); 21088 } else { 21089 sal_memset(scache_ptr, 0, sizeof(uint32)); 21090 } 21091 scache_ptr += sizeof(uint32); 21092 21093 if (cmprsd_attr_map->vlan_format != 0) { 21094 sal_memcpy(scache_ptr, 21095 &cmprsd_attr_map->combine_vlan_format_flags, 21096 sizeof(uint32)); 21097 } else { 21098 sal_memset(scache_ptr, 0, sizeof(uint32)); 21099 } 21100 scache_ptr += sizeof(uint32); 21101 21102 if (cmprsd_attr_map->outer_dot1p != 0) { 21103 sal_memcpy(scache_ptr, 21104 &cmprsd_attr_map->combine_outer_dot1p_flags, 21105 sizeof(uint32)); 21106 } else { 21107 sal_memset(scache_ptr, 0, sizeof(uint32)); 21108 } 21109 scache_ptr += sizeof(uint32); 21110 21111 if (cmprsd_attr_map->inner_dot1p != 0) { 21112 sal_memcpy(scache_ptr, 21113 &cmprsd_attr_map->combine_inner_dot1p_flags, 21114 sizeof(uint32)); 21115 } else { 21116 sal_memset(scache_ptr, 0, sizeof(uint32)); 21117 } 21118 scache_ptr += sizeof(uint32); 21119 21120 if (cmprsd_attr_map->pkt_resolution != 0) { 21121 sal_memcpy(scache_ptr, 21122 &cmprsd_attr_map->combine_pkt_resolution_flags, 21123 sizeof(uint32)); 21124 } else { 21125 sal_memset(scache_ptr, 0, sizeof(uint32)); 21126 } 21127 scache_ptr += sizeof(uint32); 21128 21129 if (cmprsd_attr_map->drop != 0) { 21130 sal_memcpy(scache_ptr, 21131 &cmprsd_attr_map->combine_drop_flags, 21132 sizeof(uint32)); 21133 } else { 21134 sal_memset(scache_ptr, 0, sizeof(uint32)); 21135 } 21136 scache_ptr += sizeof(uint32); 21137 21138 if (cmprsd_attr_map->ip_pkt != 0) { 21139 sal_memcpy(scache_ptr, 21140 &cmprsd_attr_map->combine_ip_pkt_flags, 21141 sizeof(uint32)); 21142 } else { 21143 sal_memset(scache_ptr, 0, sizeof(uint32)); 21144 } 21145 scache_ptr += sizeof(uint32); 21146 21147 /* Syncing Attributes which are array. */ 21148 if (cmprsd_attr_map->port != 0) { 21149 array_size = BCM_STAT_FLEX_BIT_ARRAY_SIZE; 21150 sal_memcpy(scache_ptr, &array_size, sizeof(uint32)); 21151 scache_ptr += sizeof(uint32); 21152 for(i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 21153 sal_memcpy(scache_ptr, 21154 &cmprsd_attr_map->combine_value_array[bcmStatFlexAttrPort][i], 21155 sizeof(uint32)); 21156 scache_ptr += sizeof(uint32); 21157 } 21158 } else { 21159 array_size = BCM_STAT_FLEX_BIT_ARRAY_SIZE; 21160 sal_memcpy(scache_ptr, &array_size, sizeof(uint32)); 21161 scache_ptr += sizeof(uint32); 21162 sal_memset(scache_ptr, 0, sizeof(uint32) * BCM_STAT_FLEX_BIT_ARRAY_SIZE); 21163 scache_ptr += (sizeof(uint32) * BCM_STAT_FLEX_BIT_ARRAY_SIZE); 21164 } 21165 21166 if (cmprsd_attr_map->tos_dscp != 0) { 21167 array_size = BCM_STAT_FLEX_BIT_ARRAY_SIZE; 21168 sal_memcpy(scache_ptr, &array_size, sizeof(uint32)); 21169 scache_ptr += sizeof(uint32); 21170 for(i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 21171 sal_memcpy(scache_ptr, 21172 &cmprsd_attr_map->combine_value_array[bcmStatFlexAttrTosDscp][i], 21173 sizeof(uint32)); 21174 scache_ptr += sizeof(uint32); 21175 } 21176 } else { 21177 array_size = BCM_STAT_FLEX_BIT_ARRAY_SIZE; 21178 sal_memcpy(scache_ptr, &array_size, sizeof(uint32)); 21179 scache_ptr += sizeof(uint32); 21180 sal_memset(scache_ptr, 0, sizeof(uint32) * BCM_STAT_FLEX_BIT_ARRAY_SIZE); 21181 scache_ptr += (sizeof(uint32) * BCM_STAT_FLEX_BIT_ARRAY_SIZE); 21182 } 21183 21184 if (cmprsd_attr_map->tos_ecn != 0) { 21185 array_size = BCM_STAT_FLEX_BIT_ARRAY_SIZE; 21186 sal_memcpy(scache_ptr, &array_size, sizeof(uint32)); 21187 scache_ptr += sizeof(uint32); 21188 for(i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 21189 sal_memcpy(scache_ptr, 21190 &cmprsd_attr_map->combine_value_array[bcmStatFlexAttrTosEcn][i], 21191 sizeof(uint32)); 21192 scache_ptr += sizeof(uint32); 21193 } 21194 } else { 21195 array_size = BCM_STAT_FLEX_BIT_ARRAY_SIZE; 21196 sal_memcpy(scache_ptr, &array_size, sizeof(uint32)); 21197 scache_ptr += sizeof(uint32); 21198 sal_memset(scache_ptr, 0, sizeof(uint32) * BCM_STAT_FLEX_BIT_ARRAY_SIZE); 21199 scache_ptr += (sizeof(uint32) * BCM_STAT_FLEX_BIT_ARRAY_SIZE); 21200 } 21201 21202 if (cmprsd_attr_map->svp_type != 0) { 21203 array_size = BCM_STAT_FLEX_BIT_ARRAY_SIZE; 21204 sal_memcpy(scache_ptr, &array_size, sizeof(uint32)); 21205 scache_ptr += sizeof(uint32); 21206 for(i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 21207 sal_memcpy(scache_ptr, 21208 &cmprsd_attr_map->combine_value_array[bcmStatFlexAttrSvp][i], 21209 sizeof(uint32)); 21210 scache_ptr += sizeof(uint32); 21211 } 21212 } else { 21213 array_size = BCM_STAT_FLEX_BIT_ARRAY_SIZE; 21214 sal_memcpy(scache_ptr, &array_size, sizeof(uint32)); 21215 scache_ptr += sizeof(uint32); 21216 sal_memset(scache_ptr, 0, sizeof(uint32) * BCM_STAT_FLEX_BIT_ARRAY_SIZE); 21217 scache_ptr += (sizeof(uint32) * BCM_STAT_FLEX_BIT_ARRAY_SIZE); 21218 } 21219 } 21220 21221 /* sync for egress direction */ 21222 if (egr_cmprsd_attr_map != NULL) { 21223 if (egr_cmprsd_attr_map->int_pri != 0) { 21224 sal_memcpy(scache_ptr, 21225 &egr_cmprsd_attr_map->combine_int_pri_flags, 21226 sizeof(uint32)); 21227 } else { 21228 sal_memset(scache_ptr, 0, sizeof(uint32)); 21229 } 21230 scache_ptr += sizeof(uint32); 21231 21232 if (egr_cmprsd_attr_map->vlan_format != 0) { 21233 sal_memcpy(scache_ptr, 21234 &egr_cmprsd_attr_map->combine_vlan_format_flags, 21235 sizeof(uint32)); 21236 } else { 21237 sal_memset(scache_ptr, 0, sizeof(uint32)); 21238 } 21239 scache_ptr += sizeof(uint32); 21240 21241 if (egr_cmprsd_attr_map->outer_dot1p != 0) { 21242 sal_memcpy(scache_ptr, 21243 &egr_cmprsd_attr_map->combine_outer_dot1p_flags, 21244 sizeof(uint32)); 21245 } else { 21246 sal_memset(scache_ptr, 0, sizeof(uint32)); 21247 } 21248 scache_ptr += sizeof(uint32); 21249 21250 if (egr_cmprsd_attr_map->inner_dot1p != 0) { 21251 sal_memcpy(scache_ptr, 21252 &egr_cmprsd_attr_map->combine_inner_dot1p_flags, 21253 sizeof(uint32)); 21254 } else { 21255 sal_memset(scache_ptr, 0, sizeof(uint32)); 21256 } 21257 scache_ptr += sizeof(uint32); 21258 21259 if (egr_cmprsd_attr_map->pkt_resolution != 0) { 21260 sal_memcpy(scache_ptr, 21261 &egr_cmprsd_attr_map->combine_pkt_resolution_flags, 21262 sizeof(uint32)); 21263 } else { 21264 sal_memset(scache_ptr, 0, sizeof(uint32)); 21265 } 21266 scache_ptr += sizeof(uint32); 21267 21268 if (egr_cmprsd_attr_map->drop != 0) { 21269 sal_memcpy(scache_ptr, 21270 &egr_cmprsd_attr_map->combine_drop_flags, 21271 sizeof(uint32)); 21272 } else { 21273 sal_memset(scache_ptr, 0, sizeof(uint32)); 21274 } 21275 scache_ptr += sizeof(uint32); 21276 21277 if (egr_cmprsd_attr_map->ip_pkt != 0) { 21278 sal_memcpy(scache_ptr, 21279 &egr_cmprsd_attr_map->combine_ip_pkt_flags, 21280 sizeof(uint32)); 21281 } else { 21282 sal_memset(scache_ptr, 0, sizeof(uint32)); 21283 } 21284 scache_ptr += sizeof(uint32); 21285 21286 /* Syncing Attributes which are array. */ 21287 if (egr_cmprsd_attr_map->port != 0) { 21288 array_size = BCM_STAT_FLEX_BIT_ARRAY_SIZE; 21289 sal_memcpy(scache_ptr, &array_size, sizeof(uint32)); 21290 scache_ptr += sizeof(uint32); 21291 for(i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 21292 sal_memcpy(scache_ptr, 21293 &egr_cmprsd_attr_map->combine_value_array[bcmStatFlexAttrPort][i], 21294 sizeof(uint32)); 21295 scache_ptr += sizeof(uint32); 21296 } 21297 } else { 21298 array_size = BCM_STAT_FLEX_BIT_ARRAY_SIZE; 21299 sal_memcpy(scache_ptr, &array_size, sizeof(uint32)); 21300 scache_ptr += sizeof(uint32); 21301 sal_memset(scache_ptr, 0, sizeof(uint32) * BCM_STAT_FLEX_BIT_ARRAY_SIZE); 21302 scache_ptr += (sizeof(uint32) * BCM_STAT_FLEX_BIT_ARRAY_SIZE); 21303 } 21304 21305 if (egr_cmprsd_attr_map->tos_dscp != 0) { 21306 array_size = BCM_STAT_FLEX_BIT_ARRAY_SIZE; 21307 sal_memcpy(scache_ptr, &array_size, sizeof(uint32)); 21308 scache_ptr += sizeof(uint32); 21309 for(i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 21310 sal_memcpy(scache_ptr, 21311 &egr_cmprsd_attr_map->combine_value_array[bcmStatFlexAttrTosDscp][i], 21312 sizeof(uint32)); 21313 scache_ptr += sizeof(uint32); 21314 } 21315 } else { 21316 array_size = BCM_STAT_FLEX_BIT_ARRAY_SIZE; 21317 sal_memcpy(scache_ptr, &array_size, sizeof(uint32)); 21318 scache_ptr += sizeof(uint32); 21319 sal_memset(scache_ptr, 0, sizeof(uint32) * BCM_STAT_FLEX_BIT_ARRAY_SIZE); 21320 scache_ptr += (sizeof(uint32) * BCM_STAT_FLEX_BIT_ARRAY_SIZE); 21321 } 21322 21323 if (egr_cmprsd_attr_map->tos_ecn != 0) { 21324 array_size = BCM_STAT_FLEX_BIT_ARRAY_SIZE; 21325 sal_memcpy(scache_ptr, &array_size, sizeof(uint32)); 21326 scache_ptr += sizeof(uint32); 21327 for(i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 21328 sal_memcpy(scache_ptr, 21329 &egr_cmprsd_attr_map->combine_value_array[bcmStatFlexAttrTosEcn][i], 21330 sizeof(uint32)); 21331 scache_ptr += sizeof(uint32); 21332 } 21333 } else { 21334 array_size = BCM_STAT_FLEX_BIT_ARRAY_SIZE; 21335 sal_memcpy(scache_ptr, &array_size, sizeof(uint32)); 21336 scache_ptr += sizeof(uint32); 21337 sal_memset(scache_ptr, 0, sizeof(uint32) * BCM_STAT_FLEX_BIT_ARRAY_SIZE); 21338 scache_ptr += (sizeof(uint32) * BCM_STAT_FLEX_BIT_ARRAY_SIZE); 21339 } 21340 21341 if (egr_cmprsd_attr_map->svp_type != 0) { 21342 array_size = BCM_STAT_FLEX_BIT_ARRAY_SIZE; 21343 sal_memcpy(scache_ptr, &array_size, sizeof(uint32)); 21344 scache_ptr += sizeof(uint32); 21345 for(i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 21346 sal_memcpy(scache_ptr, 21347 &egr_cmprsd_attr_map->combine_value_array[bcmStatFlexAttrSvp][i], 21348 sizeof(uint32)); 21349 scache_ptr += sizeof(uint32); 21350 } 21351 } else { 21352 array_size = BCM_STAT_FLEX_BIT_ARRAY_SIZE; 21353 sal_memcpy(scache_ptr, &array_size, sizeof(uint32)); 21354 scache_ptr += sizeof(uint32); 21355 sal_memset(scache_ptr, 0, sizeof(uint32) * BCM_STAT_FLEX_BIT_ARRAY_SIZE); 21356 scache_ptr += (sizeof(uint32) * BCM_STAT_FLEX_BIT_ARRAY_SIZE); 21357 } 21358 21359 if (egr_cmprsd_attr_map->dvp_type != 0) { 21360 array_size = BCM_STAT_FLEX_BIT_ARRAY_SIZE; 21361 sal_memcpy(scache_ptr, &array_size, sizeof(uint32)); 21362 scache_ptr += sizeof(uint32); 21363 for(i = 0; i < BCM_STAT_FLEX_BIT_ARRAY_SIZE; i++) { 21364 sal_memcpy(scache_ptr, 21365 &egr_cmprsd_attr_map->combine_value_array[bcmStatFlexAttrDvp][i], 21366 sizeof(uint32)); 21367 scache_ptr += sizeof(uint32); 21368 } 21369 } else { 21370 array_size = BCM_STAT_FLEX_BIT_ARRAY_SIZE; 21371 sal_memcpy(scache_ptr, &array_size, sizeof(uint32)); 21372 scache_ptr += sizeof(uint32); 21373 sal_memset(scache_ptr, 0, sizeof(uint32) * BCM_STAT_FLEX_BIT_ARRAY_SIZE); 21374 scache_ptr += (sizeof(uint32) * BCM_STAT_FLEX_BIT_ARRAY_SIZE); 21375 } 21376 } 21377 21378 *scache_position = scache_ptr; 21379 return BCM_E_NONE; 21380 } 21381 21382 21383 /* 21384 * Function: 21385 * _bcm_esw_stat_flex_compressed_attr_flags_recover 21386 * Purpose: 21387 * Recover compressed attr maps from scache. 21388 * Parameters: 21389 * unit - (IN) unit number 21390 * recovered_ver - (IN) recovered wb version 21391 * scache_position - (IN/OUT) Scache position 21392 * Returns: 21393 * BCM_E_XXX 21394 */ 21395 int _bcm_esw_stat_flex_compressed_attr_flags_recover(int unit, 21396 uint8 **scache_position) 21397 { 21398 int i = 0; 21399 uint8 *scache_ptr = NULL; 21400 uint32 array_size = 0; 21401 _bcm_stat_flex_compressed_mode_attr_sel_map_t *cmprsd_attr_maps = NULL; 21402 _bcm_stat_flex_compressed_mode_attr_sel_map_t *egr_cmprsd_attr_maps = NULL; 21403 21404 scache_ptr = (uint8 *)*scache_position; 21405 cmprsd_attr_maps = global_stat_flex_compressed_attr_map[unit]; 21406 egr_cmprsd_attr_maps = egr_global_stat_flex_compressed_attr_map[unit]; 21407 21408 /* Recover in ingress direction. */ 21409 if (cmprsd_attr_maps != NULL) { 21410 /* combine_int_pri_flags */ 21411 sal_memcpy(&cmprsd_attr_maps->combine_int_pri_flags, 21412 scache_ptr, sizeof(uint32)); 21413 scache_ptr += sizeof(uint32); 21414 21415 /* combine_vlan_format_flags */ 21416 sal_memcpy(&cmprsd_attr_maps->combine_vlan_format_flags, 21417 scache_ptr, sizeof(uint32)); 21418 scache_ptr += sizeof(uint32); 21419 21420 /* combine_outer_dot1p_flags */ 21421 sal_memcpy(&cmprsd_attr_maps->combine_outer_dot1p_flags, 21422 scache_ptr, sizeof(uint32)); 21423 scache_ptr += sizeof(uint32); 21424 21425 /* combine_inner_dot1p_flags */ 21426 sal_memcpy(&cmprsd_attr_maps->combine_inner_dot1p_flags, 21427 scache_ptr, sizeof(uint32)); 21428 scache_ptr += sizeof(uint32); 21429 21430 /* combine_pkt_res_flags */ 21431 sal_memcpy(&cmprsd_attr_maps->combine_pkt_resolution_flags, 21432 scache_ptr, sizeof(uint32)); 21433 scache_ptr += sizeof(uint32); 21434 21435 /* combine_drop_flags */ 21436 sal_memcpy(&cmprsd_attr_maps->combine_drop_flags, 21437 scache_ptr, sizeof(uint32)); 21438 scache_ptr += sizeof(uint32); 21439 21440 /* combine_ip_pkt_flags */ 21441 sal_memcpy(&cmprsd_attr_maps->combine_ip_pkt_flags, 21442 scache_ptr, sizeof(uint32)); 21443 scache_ptr += sizeof(uint32); 21444 21445 /* Recovering Attributes which are array. */ 21446 sal_memcpy(&array_size, scache_ptr, sizeof(uint32)); 21447 scache_ptr += sizeof(uint32); 21448 for(i = 0; i < array_size; i++) { 21449 sal_memcpy(&cmprsd_attr_maps->combine_value_array[bcmStatFlexAttrPort][i], 21450 scache_ptr, sizeof(uint32)); 21451 scache_ptr += sizeof(uint32); 21452 } 21453 sal_memcpy(&array_size, scache_ptr, sizeof(uint32)); 21454 scache_ptr += sizeof(uint32); 21455 for(i = 0; i < array_size; i++) { 21456 sal_memcpy(&cmprsd_attr_maps->combine_value_array[bcmStatFlexAttrTosDscp][i], 21457 scache_ptr, sizeof(uint32)); 21458 scache_ptr += sizeof(uint32); 21459 } 21460 sal_memcpy(&array_size, scache_ptr, sizeof(uint32)); 21461 scache_ptr += sizeof(uint32); 21462 for(i = 0; i < array_size; i++) { 21463 sal_memcpy(&cmprsd_attr_maps->combine_value_array[bcmStatFlexAttrTosEcn][i], 21464 scache_ptr, sizeof(uint32)); 21465 scache_ptr += sizeof(uint32); 21466 } 21467 sal_memcpy(&array_size, scache_ptr, sizeof(uint32)); 21468 scache_ptr += sizeof(uint32); 21469 for(i = 0; i < array_size; i++) { 21470 sal_memcpy(&cmprsd_attr_maps->combine_value_array[bcmStatFlexAttrSvp][i], 21471 scache_ptr, sizeof(uint32)); 21472 scache_ptr += sizeof(uint32); 21473 } 21474 } 21475 21476 /* Recover for egress direction */ 21477 if (egr_cmprsd_attr_maps != NULL) { 21478 /* combine_int_pri_flags */ 21479 sal_memcpy(&egr_cmprsd_attr_maps->combine_int_pri_flags, 21480 scache_ptr, sizeof(uint32)); 21481 scache_ptr += sizeof(uint32); 21482 21483 /* combine_vlan_format_flags */ 21484 sal_memcpy(&egr_cmprsd_attr_maps->combine_vlan_format_flags, 21485 scache_ptr, sizeof(uint32)); 21486 scache_ptr += sizeof(uint32); 21487 21488 /* combine_outer_dot1p_flags */ 21489 sal_memcpy(&egr_cmprsd_attr_maps->combine_outer_dot1p_flags, 21490 scache_ptr, sizeof(uint32)); 21491 scache_ptr += sizeof(uint32); 21492 21493 /* combine_inner_dot1p_flags */ 21494 sal_memcpy(&egr_cmprsd_attr_maps->combine_inner_dot1p_flags, 21495 scache_ptr, sizeof(uint32)); 21496 scache_ptr += sizeof(uint32); 21497 21498 /* combine_pkt_res_flags */ 21499 sal_memcpy(&egr_cmprsd_attr_maps->combine_pkt_resolution_flags, 21500 scache_ptr, sizeof(uint32)); 21501 scache_ptr += sizeof(uint32); 21502 21503 /* combine_drop_flags */ 21504 sal_memcpy(&egr_cmprsd_attr_maps->combine_drop_flags, 21505 scache_ptr, sizeof(uint32)); 21506 scache_ptr += sizeof(uint32); 21507 21508 /* combine_ip_pkt_flags */ 21509 sal_memcpy(&egr_cmprsd_attr_maps->combine_ip_pkt_flags, 21510 scache_ptr, sizeof(uint32)); 21511 scache_ptr += sizeof(uint32); 21512 21513 /* Recovering Attributes which are array. */ 21514 sal_memcpy(&array_size, scache_ptr, sizeof(uint32)); 21515 scache_ptr += sizeof(uint32); 21516 for(i = 0; i < array_size; i++) { 21517 sal_memcpy(&egr_cmprsd_attr_maps->combine_value_array[bcmStatFlexAttrPort][i], 21518 scache_ptr, sizeof(uint32)); 21519 scache_ptr += sizeof(uint32); 21520 } 21521 sal_memcpy(&array_size, scache_ptr, sizeof(uint32)); 21522 scache_ptr += sizeof(uint32); 21523 for(i = 0; i < array_size; i++) { 21524 sal_memcpy(&egr_cmprsd_attr_maps->combine_value_array[bcmStatFlexAttrTosDscp][i], 21525 scache_ptr, sizeof(uint32)); 21526 scache_ptr += sizeof(uint32); 21527 } 21528 sal_memcpy(&array_size, scache_ptr, sizeof(uint32)); 21529 scache_ptr += sizeof(uint32); 21530 for(i = 0; i < array_size; i++) { 21531 sal_memcpy(&egr_cmprsd_attr_maps->combine_value_array[bcmStatFlexAttrTosEcn][i], 21532 scache_ptr, sizeof(uint32)); 21533 scache_ptr += sizeof(uint32); 21534 } 21535 sal_memcpy(&array_size, scache_ptr, sizeof(uint32)); 21536 scache_ptr += sizeof(uint32); 21537 for(i = 0; i < array_size; i++) { 21538 sal_memcpy(&egr_cmprsd_attr_maps->combine_value_array[bcmStatFlexAttrSvp][i], 21539 scache_ptr, sizeof(uint32)); 21540 scache_ptr += sizeof(uint32); 21541 } 21542 } 21543 21544 *scache_position = scache_ptr; 21545 return BCM_E_NONE; 21546 } 21547 21548 /* 21549 * flex counter flexible pool allocation and 21550 * compaction. 21551 */ 21552 int 21553 _bcm_esw_stat_custom_group_id_create (int unit, 21554 uint32 mode_id, 21555 bcm_stat_object_t object, 21556 uint32 pool_id, 21557 uint32 base_idx, 21558 bcm_stat_custom_counter_info_t *counter_info) 21559 { 21560 bcm_error_t rv = BCM_E_NONE; 21561 uint32 stat_counter_id = 0; 21562 uint32 num_counters = 0; 21563 21564 if (!soc_feature(unit, soc_feature_flex_stat_compaction_support)) { 21565 return BCM_E_UNAVAIL; 21566 } 21567 /* Counter base index should be non zero */ 21568 if (base_idx <= 1 || pool_id >= BCM_STAT_FLEX_COUNTER_MAX_POOL) { 21569 return BCM_E_PARAM; 21570 } 21571 /* 21572 * Check resource allocation for required 21573 * base_idx in the requested pool 21574 */ 21575 rv = _bcm_esw_stat_custom_group_associate_object( 21576 unit, mode_id, object, &stat_counter_id, &num_counters, 21577 pool_id, base_idx, counter_info); 21578 21579 BCM_IF_ERROR_RETURN(rv); 21580 21581 if (BCM_STAT_GROUP_MODE_ID_OAM_SUFFIX == 21582 (mode_id & BCM_STAT_GROUP_MODE_ID_OAM_MASK)) { 21583 return rv; 21584 } 21585 21586 if ((object != bcmStatObjectIngFieldStageIngress) && 21587 (object != bcmStatObjectIngFieldStageLookup) && 21588 (object != bcmStatObjectIngExactMatch)) { 21589 return rv; 21590 } 21591 21592 return rv; 21593 } 21594 21595 int 21596 _bcm_stat_flex_counter_id_move (int unit, 21597 bcm_stat_custom_base_index_action_t idx_action, 21598 bcm_stat_custom_counter_info_t counter_info_old, 21599 bcm_stat_custom_counter_info_t *counter_info_new) 21600 { 21601 uint32 new_base_idx = 0; 21602 uint32 new_pool_id = 0; 21603 uint32 new_object = 0; 21604 uint32 new_mode_id = 0; 21605 uint32 stat_counter_id = 0, num_counters = 0; 21606 int rv = BCM_E_NONE; 21607 21608 if (soc_feature(unit, soc_feature_flex_stat_compaction_support)) { 21609 switch(idx_action) { 21610 case bcmStatCustomBaseIdxAlloc: 21611 /* 21612 * Allocates new set of counters based on couter_info_new parameter. 21613 * After this API call, customer needs to attach new counter_stat_id 21614 * to the individual module HW entries that were referencing the old 21615 * counter,using the respective legacy counter attach APIs for each 21616 * module before disabling old set of counters based on 21617 * counter_info_old parameter to ensure no loss of counter values. 21618 */ 21619 if (counter_info_new != NULL) { 21620 if(compaction_info[unit].in_progress == FALSE) { 21621 new_pool_id = counter_info_new->ctr_tbl_pool_id; 21622 new_base_idx = counter_info_new->ctr_tbl_pool_base_idx; 21623 new_mode_id = counter_info_new->ctr_tbl_mode_id; 21624 new_object = counter_info_new->object; 21625 21626 if (_bcm_esw_stat_validate_counter_info(unit, 21627 counter_info_old, 21628 counter_info_new) != BCM_E_NONE) { 21629 LOG_DEBUG(BSL_LS_BCM_FLEXCTR, 21630 (BSL_META_U(unit, 21631 "StatBaseIdxAlloc: Config Error \n"))); 21632 return BCM_E_PARAM; 21633 } 21634 21635 rv = _bcm_esw_stat_custom_group_associate_object(unit, 21636 new_mode_id, new_object, &stat_counter_id, 21637 &num_counters, new_pool_id, new_base_idx, 21638 counter_info_new); 21639 LOG_DEBUG(BSL_LS_BCM_FLEXCTR, 21640 (BSL_META_U(unit, 21641 "StatBaseIdxAlloc: Created new stat counter id: %d new base index %d\n"), 21642 stat_counter_id,new_base_idx)); 21643 if (rv == BCM_E_NONE) { 21644 counter_info_new->stat_counter_id = stat_counter_id; 21645 compaction_info[unit].base_idx = counter_info_old.ctr_tbl_pool_base_idx; 21646 compaction_info[unit].pool_number = counter_info_old.ctr_tbl_pool_id; 21647 compaction_info[unit].in_progress = TRUE; 21648 } 21649 } else { 21650 rv = BCM_E_CONFIG; 21651 } 21652 } else { 21653 rv = BCM_E_PARAM; 21654 } 21655 break; 21656 case bcmStatCustomBaseIdxMove: 21657 /* 21658 * Disables existing counter set pointed by 21659 * counter_info_old parameter 21660 */ 21661 if (counter_info_new == NULL) { 21662 return BCM_E_PARAM; 21663 } 21664 if (compaction_info[unit].in_progress == FALSE) { 21665 LOG_DEBUG(BSL_LS_BCM_FLEXCTR, 21666 (BSL_META_U(unit, 21667 "StatBaseIdxMove:Counter Move is not initiated\n"))); 21668 return BCM_E_CONFIG; 21669 } 21670 /* 21671 * Do not allow old base-idx,pool-id and 21672 * different mode id in new counter info 21673 * structure in counter movement. 21674 */ 21675 if (((counter_info_new->ctr_tbl_pool_base_idx == 21676 counter_info_old.ctr_tbl_pool_base_idx) && 21677 (counter_info_new->ctr_tbl_pool_id == 21678 counter_info_old.ctr_tbl_pool_id)) || 21679 (counter_info_new->ctr_tbl_mode_id != 21680 counter_info_old.ctr_tbl_mode_id)) { 21681 return BCM_E_CONFIG; 21682 } 21683 rv = _bcm_stat_flex_counter_base_idx_move(unit, 21684 counter_info_old, counter_info_new); 21685 compaction_info[unit].base_idx = 0; 21686 compaction_info[unit].pool_number = 0; 21687 compaction_info[unit].in_progress = FALSE; 21688 break; 21689 default: 21690 rv = BCM_E_PARAM; 21691 break; 21692 } 21693 } 21694 return rv; 21695 } 21696 21697 #ifdef BCM_TOMAHAWK_SUPPORT 21698 void _bcm_fill_stat_counter_map(int unit, int id, uint32 mode, uint32 pool, 21699 uint32 base_idx, bcm_stat_object_t object, 21700 bcm_stat_group_mode_t group) 21701 { 21702 if (!stat_counter_map[unit]) { 21703 #if 0 21704 stat_counter_map[unit][id] = 21705 sal_alloc(sizeof(bcm_stat_counter_map_t),"attr"); 21706 21707 if (stat_counter_map[unit][id] == NULL) { 21708 LOG_ERROR(BSL_LS_BCM_FLEXCTR, 21709 (BSL_META_U(0, 21710 "Memory alloc failed! "))); 21711 return; 21712 } 21713 sal_memset(stat_counter_map[id], 0, sizeof(bcm_stat_counter_map_t)); 21714 #endif 21715 return; 21716 } 21717 stat_counter_map[unit][id].mode = mode; 21718 stat_counter_map[unit][id].group = group; 21719 stat_counter_map[unit][id].object = object; 21720 stat_counter_map[unit][id].pool = pool; 21721 stat_counter_map[unit][id].base_idx = base_idx; 21722 stat_counter_map[unit][id].used = 1; 21723 } 21724 21725 void _bcm_get_stat_counter_map(int unit, int id, bcm_stat_counter_map_t *stat_ctr_map) 21726 { 21727 if (stat_counter_map[unit][id].used == 0) { 21728 stat_ctr_map->used = 0; 21729 return; 21730 } 21731 stat_ctr_map->mode = stat_counter_map[unit][id].mode; 21732 stat_ctr_map->group = stat_counter_map[unit][id].group; 21733 stat_ctr_map->object = stat_counter_map[unit][id].object; 21734 stat_ctr_map->pool = stat_counter_map[unit][id].pool; 21735 stat_ctr_map->base_idx = stat_counter_map[unit][id].base_idx; 21736 stat_ctr_map->used = stat_counter_map[unit][id].used; 21737 stat_ctr_map->pipe = stat_counter_map[unit][id].pipe; 21738 } 21739 21740 void stat_ctr_map_init(int unit) 21741 { 21742 21743 stat_counter_map[unit] = 21744 sal_alloc((BCM_MAX_STAT_COUNTER_IDS + 1) * 21745 sizeof(bcm_stat_counter_map_t),"attr"); 21746 sal_memset(stat_counter_map[unit], 0, (BCM_MAX_STAT_COUNTER_IDS + 1) * 21747 sizeof(bcm_stat_counter_map_t)); 21748 } 21749 void stat_ctr_map_deinit(int unit) 21750 { 21751 if (stat_counter_map[unit]) { 21752 sal_free(stat_counter_map[unit]); 21753 stat_counter_map[unit] = NULL; 21754 } 21755 } 21756 21757 #endif 21758