cpri.c (167900B)
1 /**************************************************************************** 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 */ 8 9 #include <bcm/cpri.h> 10 #define MAX_NUM_OF_DATA_AXCS 64 11 #ifdef CPRIMOD_SUPPORT 12 #include <soc/cprimod/cprimod.h> 13 #endif /* CPRIMOD_SUPPORT */ 14 #include <bcm/error.h> 15 #include <bcm/debug.h> 16 #include <shared/bsl.h> 17 #include <soc/drv.h> 18 #ifdef PORTMOD_SUPPORT 19 #include <soc/portmod/portmod.h> 20 21 extern int 22 bcmi_esw_portctrl_detach(int unit, pbmp_t pbmp, pbmp_t *detached); 23 int _bcm_esw_port_gport_validate(int unit, bcm_port_t port_in, 24 bcm_port_t *port_out); 25 26 #endif /* PORTMOD_SUPPORT */ 27 28 29 #ifdef CPRIMOD_SUPPORT 30 static bcm_cpri_port_speed_t 31 _int_to_bcm_cpri_port_speed_t ( 32 int speed_i) 33 { 34 bcm_cpri_port_speed_t speed; 35 36 switch(speed_i) { 37 case 1228: 38 speed = bcmCpriPortSpeed1228p8; 39 break; 40 case 2457: 41 speed = bcmCpriPortSpeed2457p6; 42 break; 43 case 3072: 44 speed = bcmCpriPortSpeed3072p0; 45 break; 46 case 4915: 47 speed = bcmCpriPortSpeed4915p2; 48 break; 49 case 6144: 50 speed = bcmCpriPortSpeed6144p0; 51 break; 52 case 9830: 53 speed = bcmCpriPortSpeed9830p4; 54 break; 55 case 10137: 56 speed = bcmCpriPortSpeed10137p6; 57 break; 58 case 12165: 59 speed = bcmCpriPortSpeed12165p12; 60 break; 61 case 24330: 62 speed = bcmCpriPortSpeed24330p24; 63 break; 64 default: 65 speed = bcmCpriPortSpeed1228p8; 66 break; 67 } 68 69 return speed; 70 } 71 72 static int 73 _bcm_cpri_port_speed_t_to_int ( 74 bcm_cpri_port_speed_t speed) 75 { 76 int speed_i; 77 78 switch(speed) { 79 case bcmCpriPortSpeed1228p8: 80 speed_i = 1228; 81 break; 82 case bcmCpriPortSpeed2457p6: 83 speed_i = 2457; 84 break; 85 case bcmCpriPortSpeed3072p0: 86 speed_i = 3072; 87 break; 88 case bcmCpriPortSpeed4915p2: 89 speed_i = 4915; 90 break; 91 case bcmCpriPortSpeed6144p0: 92 speed_i = 6144; 93 break; 94 case bcmCpriPortSpeed9830p4: 95 speed_i = 9830; 96 break; 97 case bcmCpriPortSpeed10137p6: 98 speed_i = 10137; 99 break; 100 case bcmCpriPortSpeed12165p12: 101 speed_i = 12165; 102 break; 103 case bcmCpriPortSpeed24330p24: 104 speed_i = 24330; 105 break; 106 default: 107 speed_i = 1228; 108 break; 109 } 110 111 return speed_i; 112 } 113 114 115 static int 116 _portmod_cpri_axc_frame_info_t_to_bcm_cpri_axc_frame_info_t( 117 bcm_cpri_dir_t direction, 118 portmod_cpri_axc_frame_info_t *axc_info_t, 119 bcm_cpri_axc_frame_info_t *axc_info) 120 { 121 uint32 adjusted_sample_size = 0; 122 axc_info->start_bit = axc_info_t->start_bit; 123 axc_info->num_bits = axc_info_t->num_bits; 124 axc_info->map_method = axc_info_t->container_info.map_method; 125 if ((axc_info_t->container_info.map_method == cprimod_cpri_frame_map_method_1) || (axc_info_t->container_info.map_method == cprimod_cpri_frame_map_method_3)) { 126 axc_info->stuffing_count = axc_info_t->container_info.Nst; 127 } 128 129 axc_info->K = axc_info_t->container_info.K; 130 axc_info->sample_size_M = axc_info_t->encap_data_info.sample_size; 131 axc_info->Nv = axc_info_t->container_info.Nv; 132 axc_info->Na = axc_info_t->container_info.Na; 133 axc_info->Nc = axc_info_t->container_info.Nc; 134 axc_info->truncation_enable = axc_info_t->encap_data_info.truncation_enable; 135 switch (axc_info_t->container_info.frame_sync_mode) { 136 case CPRIMOD_CPRI_FRAME_SYNC_MODE_HYPER: 137 axc_info->frame_sync_mode = BCM_CPRI_FRAME_SYNC_MODE_HYPER; 138 break; 139 case CPRIMOD_CPRI_FRAME_SYNC_MODE_RADIO: 140 axc_info->frame_sync_mode = BCM_CPRI_FRAME_SYNC_MODE_RADIO; 141 break; 142 case CPRIMOD_CPRI_FRAME_SYNC_MODE_BASIC: 143 axc_info->frame_sync_mode = BCM_CPRI_FRAME_SYNC_MODE_BASIC; 144 break; 145 default: 146 axc_info->frame_sync_mode = BCM_CPRI_FRAME_SYNC_MODE_BASIC; 147 break; 148 } 149 axc_info->basic_frame_offset = axc_info_t->container_info.basic_frame_offset; 150 axc_info->radio_frame_offset = axc_info_t->container_info.radio_frame_offset; 151 axc_info->hyper_frame_offset = axc_info_t->container_info.hyper_frame_offset; 152 switch (axc_info_t->encap_data_info.truncation_type) { 153 case cprimod_truncation_type_15_to_16: 154 axc_info->truncation_mode = bcmCpriFrameTruncMode15_to_16; 155 break; 156 case cprimod_truncation_type_add_0: 157 axc_info->truncation_mode = bcmCpriFrameTruncModeAdd_0; 158 break; 159 case cprimod_truncation_type_16_to_15: 160 axc_info->truncation_mode = bcmCpriFrameTruncMode16_to_15; 161 break; 162 case cprimod_truncation_type_add_1: 163 axc_info->truncation_mode = bcmCpriFrameTruncModeAdd_1; 164 break; 165 default: 166 axc_info->truncation_mode = bcmCpriFrameTruncMode15_to_16; 167 break; 168 } 169 switch (axc_info_t->encap_data_info.compression_type) { 170 case cprimod_compress: 171 axc_info->compress_mode = bcmCpriFrameCompressModeCompress; 172 break; 173 case cprimod_decompress: 174 axc_info->compress_mode = bcmCpriFrameCompressModeDecompress; 175 break; 176 case cprimod_no_compress: 177 axc_info->compress_mode = bcmCpriFrameCompressModeNone; 178 break; 179 default: 180 axc_info->compress_mode = bcmCpriFrameCompressModeCompress; 181 break; 182 } 183 184 /* 185 * Sample size need to be adjusted based on combination of compression/decompression/ 186 * truncation modes in different setting. 187 * If truncation type 15_to_16 or add_0 is set, there is nothing else to check, 188 * sample size can be 16. 189 * If compression is ON, the sample size can be set to 9. Those are two extreme cases. 190 * If any of the decompression, 16_to_15 or add_1, set the sample size to 15. 191 * Otherwise sample size is unchanged. 192 */ 193 194 if ((axc_info_t->encap_data_info.truncation_type == cprimod_truncation_type_15_to_16) || 195 (axc_info_t->encap_data_info.truncation_type == cprimod_truncation_type_add_0)) { 196 adjusted_sample_size = 16; 197 } else if (axc_info_t->encap_data_info.compression_type == cprimod_compress) { 198 adjusted_sample_size = 9; 199 } else if ((axc_info_t->encap_data_info.truncation_type == cprimod_truncation_type_16_to_15) || 200 (axc_info_t->encap_data_info.truncation_type == cprimod_truncation_type_add_1) || 201 (axc_info_t->encap_data_info.compression_type == cprimod_decompress)) { 202 adjusted_sample_size = 15; 203 } else { 204 adjusted_sample_size = axc_info_t->encap_data_info.sample_size; 205 } 206 207 if (direction == BCM_CPRI_DIR_TX) { 208 axc_info->num_samples_per_roe_pkt = axc_info_t->roe_payload_info.packet_size/(2*adjusted_sample_size); 209 } else { 210 axc_info->num_samples_per_roe_pkt = axc_info_t->roe_payload_info.packet_size/(2*axc_info_t->encap_data_info.sample_size); 211 } 212 213 axc_info->priority = axc_info_t->encap_data_info.priority; 214 axc_info->rx_queue_size = axc_info_t->encap_data_info.buffer_size; 215 axc_info->cycle_size = axc_info_t->encap_data_info.cycle_size; 216 217 return BCM_E_NONE; 218 } 219 220 static int 221 _bcm_cpri_axc_frame_info_t_to_portmod_cpri_axc_frame_info_t( 222 int axc_id, 223 bcm_cpri_dir_t direction, 224 bcm_cpri_axc_frame_info_t *axc_info, 225 portmod_cpri_axc_frame_info_t *axc_info_t) 226 { 227 uint32 adjusted_sample_size=0; 228 229 axc_info_t->start_bit = axc_info->start_bit; 230 axc_info_t->num_bits = axc_info->num_bits; 231 axc_info_t->container_info.map_method = axc_info->map_method; 232 axc_info_t->container_info.Nst = axc_info->stuffing_count; 233 axc_info_t->container_info.K = axc_info->K; 234 axc_info_t->encap_data_info.sample_size = axc_info->sample_size_M; 235 if (axc_info->map_method == 0) { 236 axc_info_t->container_info.Naxc = axc_info->num_bits; 237 } else { 238 axc_info_t->container_info.Naxc = 2*axc_info->sample_size_M; 239 } 240 axc_info_t->container_info.Nv = axc_info->Nv; 241 axc_info_t->container_info.Na = axc_info->Na; 242 axc_info_t->container_info.Nc = axc_info->Nc; 243 switch (axc_info->frame_sync_mode) { 244 245 case BCM_CPRI_FRAME_SYNC_MODE_HYPER: 246 axc_info_t->container_info.frame_sync_mode = CPRIMOD_CPRI_FRAME_SYNC_MODE_HYPER; 247 break; 248 case BCM_CPRI_FRAME_SYNC_MODE_RADIO: 249 axc_info_t->container_info.frame_sync_mode = CPRIMOD_CPRI_FRAME_SYNC_MODE_RADIO; 250 break; 251 case BCM_CPRI_FRAME_SYNC_MODE_BASIC: 252 axc_info_t->container_info.frame_sync_mode = CPRIMOD_CPRI_FRAME_SYNC_MODE_BASIC; 253 break; 254 default: 255 axc_info_t->container_info.frame_sync_mode = CPRIMOD_CPRI_FRAME_SYNC_MODE_BASIC; 256 break; 257 } 258 axc_info_t->container_info.basic_frame_offset = axc_info->basic_frame_offset; 259 axc_info_t->container_info.radio_frame_offset = axc_info->radio_frame_offset; 260 axc_info_t->container_info.hyper_frame_offset = axc_info->hyper_frame_offset; 261 262 if (direction == BCM_CPRI_DIR_TX) { 263 /* 264 * Adjust the payload size based on the compression/decompression and 265 * truncation combinations for transmit. 266 */ 267 268 adjusted_sample_size = axc_info->sample_size_M; 269 270 if ((axc_info->truncation_enable == 1) && 271 ((axc_info->truncation_mode == bcmCpriFrameTruncMode16_to_15)|| 272 (axc_info->truncation_mode == bcmCpriFrameTruncModeAdd_1))) { 273 if (adjusted_sample_size == 16) { 274 adjusted_sample_size = 15; 275 } else { 276 LOG_ERROR(BSL_ERROR, 277 ("Truncation can only apply to 16 bit sample.. Sample is %d\n", 278 adjusted_sample_size)); 279 return BCM_E_CONFIG; 280 } 281 } 282 283 if (axc_info->compress_mode == bcmCpriFrameCompressModeCompress) { 284 if (adjusted_sample_size == 15) { 285 adjusted_sample_size = 9; 286 } else { 287 LOG_ERROR(BSL_ERROR, 288 ("Compression can only be done on 15 bit samples. Sample is %d\n", 289 adjusted_sample_size)); 290 return BCM_E_CONFIG; 291 } 292 } else if (axc_info->compress_mode == bcmCpriFrameCompressModeDecompress) { 293 if (adjusted_sample_size == 9) { 294 adjusted_sample_size = 15; 295 } else { 296 LOG_ERROR(BSL_ERROR, 297 ("DeCompression can only be done on 9 bit samples. Sample is %d\n", 298 adjusted_sample_size)); 299 return BCM_E_CONFIG; 300 } 301 } 302 303 if ((axc_info->truncation_enable == 1) && 304 ((axc_info->truncation_mode == bcmCpriFrameTruncMode15_to_16)|| 305 (axc_info->truncation_mode == bcmCpriFrameTruncModeAdd_0))) { 306 if (adjusted_sample_size == 15) { 307 adjusted_sample_size = 16; 308 } else { 309 LOG_ERROR(BSL_ERROR, 310 ("Truncation can only apply to 15 bit sample.. Sample is %d\n", 311 adjusted_sample_size)); 312 return BCM_E_CONFIG; 313 } 314 } 315 316 axc_info_t->roe_payload_info.packet_size = axc_info->num_samples_per_roe_pkt * (2*adjusted_sample_size); 317 axc_info_t->roe_payload_info.last_packet_num = 0; 318 axc_info_t->roe_payload_info.last_packet_size = axc_info->num_samples_per_roe_pkt * (2*adjusted_sample_size); 319 320 } else { /* BCM_CPRI_DIR_RX */ 321 axc_info_t->roe_payload_info.packet_size = axc_info->num_samples_per_roe_pkt * (2*axc_info->sample_size_M); 322 axc_info_t->roe_payload_info.last_packet_num = 0; 323 axc_info_t->roe_payload_info.last_packet_size = axc_info->num_samples_per_roe_pkt * (2*axc_info->sample_size_M); 324 } 325 326 axc_info_t->encap_data_info.truncation_enable = axc_info->truncation_enable; 327 switch (axc_info->truncation_mode) { 328 case bcmCpriFrameTruncMode15_to_16: 329 axc_info_t->encap_data_info.truncation_type = cprimod_truncation_type_15_to_16; 330 break; 331 case bcmCpriFrameTruncModeAdd_0: 332 axc_info_t->encap_data_info.truncation_type = cprimod_truncation_type_add_0; 333 break; 334 case bcmCpriFrameTruncMode16_to_15: 335 axc_info_t->encap_data_info.truncation_type = cprimod_truncation_type_16_to_15; 336 break; 337 case bcmCpriFrameTruncModeAdd_1: 338 axc_info_t->encap_data_info.truncation_type = cprimod_truncation_type_add_1; 339 break; 340 default: 341 axc_info_t->encap_data_info.truncation_type = cprimod_truncation_type_15_to_16; 342 break; 343 } 344 switch (axc_info->compress_mode) { 345 case bcmCpriFrameCompressModeCompress: 346 axc_info_t->encap_data_info.compression_type = cprimod_compress; 347 break; 348 case bcmCpriFrameCompressModeDecompress: 349 axc_info_t->encap_data_info.compression_type = cprimod_decompress; 350 break; 351 case bcmCpriFrameCompressModeNone: 352 axc_info_t->encap_data_info.compression_type = cprimod_no_compress; 353 break; 354 default: 355 axc_info_t->encap_data_info.compression_type = cprimod_compress; 356 break; 357 } 358 if (axc_id < 64) { 359 axc_info_t->encap_data_info.mux_enable = 1; 360 } else { 361 axc_info_t->encap_data_info.mux_enable = 0; 362 } 363 axc_info_t->encap_data_info.bit_reversal = 0; 364 axc_info_t->encap_data_info.priority = axc_info->priority; 365 axc_info_t->encap_data_info.buffer_size = axc_info->rx_queue_size; 366 axc_info_t->encap_data_info.cycle_size = axc_info->cycle_size; 367 axc_info_t->encap_data_info.is_agnostic = 0; 368 369 return BCM_E_NONE; 370 } 371 #endif 372 373 int 374 bcm_esw_cpri_detach( 375 int unit) 376 { 377 #ifdef CPRIMOD_SUPPORT 378 pbmp_t detached; 379 soc_info_t *si = &SOC_INFO(unit); 380 BCM_PBMP_CLEAR(detached); 381 BCM_IF_ERROR_RETURN(bcmi_esw_portctrl_detach(unit, si->cpri.bitmap, &detached)); 382 BCM_PBMP_CLEAR(si->cpri.bitmap); 383 BCM_PBMP_CLEAR(si->rsvd4.bitmap); 384 return SOC_E_NONE; 385 #else 386 return BCM_E_UNAVAIL; 387 #endif 388 } 389 390 int 391 bcm_esw_cpri_init( 392 int unit) 393 { 394 #ifdef CPRIMOD_SUPPORT 395 int port; 396 PBMP_ITER(PBMP_CPRI_ALL(unit), port) { 397 SOC_IF_ERROR_RETURN(portmod_cpri_init(unit, port)); 398 } 399 return SOC_E_NONE; 400 #else 401 return BCM_E_UNAVAIL; 402 #endif 403 } 404 405 #ifdef CPRIMOD_SUPPORT 406 static 407 int _bcm_bcm_to_cprimod_ethertype(bcm_cpri_ethertype_t bcm_type, cprimod_ethertype_t *cprimod_type) 408 { 409 switch (bcm_type) { 410 case bcmCpriEthertypeRoe: 411 *cprimod_type = cprimodEthertypeRoe; 412 break; 413 414 case bcmCpriEthertypeFast: 415 *cprimod_type = cprimodEthertypeFast; 416 break; 417 418 case bcmCpriEthertypeVlan: 419 *cprimod_type = cprimodEthertypeVlan; 420 break; 421 422 case bcmCpriEthertypeQinQ: 423 *cprimod_type = cprimodEthertypeQinQ; 424 break; 425 426 default: 427 break; 428 } 429 return SOC_E_NONE; 430 } 431 #endif 432 433 int 434 bcm_esw_cpri_port_decap_ethertype_get( 435 int unit, 436 bcm_gport_t port, 437 bcm_cpri_ethertype_t type, 438 uint16 *tpid) 439 { 440 #ifdef CPRIMOD_SUPPORT 441 cprimod_ethertype_t int_type=0; 442 443 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 444 _bcm_bcm_to_cprimod_ethertype(type, &int_type); 445 446 SOC_IF_ERROR_RETURN 447 (portmod_cpri_port_decap_ethertype_config_get(unit, port, int_type, tpid)); 448 return BCM_E_NONE; 449 #else 450 return BCM_E_UNAVAIL; 451 #endif 452 } 453 454 int 455 bcm_esw_cpri_port_decap_ethertype_set( 456 int unit, 457 bcm_gport_t port, 458 bcm_cpri_ethertype_t type, 459 uint16 tpid) 460 { 461 #ifdef CPRIMOD_SUPPORT 462 cprimod_ethertype_t int_type=0; 463 464 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 465 _bcm_bcm_to_cprimod_ethertype(type, &int_type); 466 467 SOC_IF_ERROR_RETURN 468 (portmod_cpri_port_decap_ethertype_config_set(unit, port, int_type, tpid)); 469 470 return BCM_E_NONE; 471 #else 472 return BCM_E_UNAVAIL; 473 #endif 474 } 475 476 int 477 bcm_esw_cpri_port_decap_flow_config_get( 478 int unit, 479 bcm_gport_t port, 480 uint8 roe_subtype, 481 bcm_cpri_decap_flow_config_t *config) 482 { 483 #ifdef CPRIMOD_SUPPORT 484 cprimod_cls_option_t option; 485 cprimod_cls_flow_type_t flow_type; 486 uint32 queue_num; 487 488 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 489 SOC_IF_ERROR_RETURN 490 (portmod_cpri_port_decap_flow_config_get(unit, port, roe_subtype, &queue_num, &option, &flow_type)); 491 492 switch (option) { 493 case cprimodClsOptionUseQueueNum: 494 config->lookup_option = bcmCpriDecapFlowLookupQueueNum; 495 break; 496 case cprimodClsOptionUseFlowIdToQueue: 497 config->lookup_option = bcmCpriDecapFlowLookupFlowID; 498 break; 499 case cprimodClsOptionUseOpcodeToQueue: 500 config->lookup_option = bcmCpriDecapFlowLookupOpcode; 501 break; 502 default: 503 config->lookup_option = bcmCpriDecapFlowLookupQueueNum; 504 break; 505 } 506 507 switch (flow_type) { 508 case cprimodClsFlowTypeData: 509 config->flow_type = bcmCpriDecapFlowTypeIQData; 510 break; 511 case cprimodClsFlowTypeDataWithExt: 512 config->flow_type = bcmCpriDecapFlowTypeIQDataWithTimestamp; 513 break; 514 case cprimodClsFlowTypeCtrlWithOpcode: 515 config->flow_type = bcmCpriDecapFlowTypeControlWithOpcode; 516 break; 517 case cprimodClsFlowTypeCtrl: 518 config->flow_type = bcmCpriDecapFlowTypeControl; 519 break; 520 default: 521 config->flow_type = bcmCpriDecapFlowTypeIQData; 522 break; 523 } 524 config->queue_num = queue_num; 525 526 return BCM_E_NONE; 527 #else 528 return BCM_E_UNAVAIL; 529 #endif 530 } 531 532 int 533 bcm_esw_cpri_port_decap_flow_config_set( 534 int unit, 535 bcm_gport_t port, 536 uint8 roe_subtype, 537 bcm_cpri_decap_flow_config_t *config) 538 { 539 #ifdef CPRIMOD_SUPPORT 540 cprimod_cls_option_t option; 541 cprimod_cls_flow_type_t flow_type; 542 uint32 queue_num; 543 544 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 545 switch (config->lookup_option) { 546 case bcmCpriDecapFlowLookupQueueNum: 547 option = cprimodClsOptionUseQueueNum; 548 break; 549 case bcmCpriDecapFlowLookupFlowID: 550 option = cprimodClsOptionUseFlowIdToQueue; 551 break; 552 case bcmCpriDecapFlowLookupOpcode: 553 option = cprimodClsOptionUseOpcodeToQueue; 554 break; 555 default: 556 option = cprimodClsOptionUseQueueNum; 557 break; 558 } 559 560 switch (config->flow_type) { 561 case bcmCpriDecapFlowTypeIQData: 562 flow_type = cprimodClsFlowTypeData; 563 break; 564 case bcmCpriDecapFlowTypeIQDataWithTimestamp: 565 flow_type = cprimodClsFlowTypeDataWithExt; 566 break; 567 case bcmCpriDecapFlowTypeControlWithOpcode: 568 flow_type = cprimodClsFlowTypeCtrlWithOpcode; 569 break; 570 case bcmCpriDecapFlowTypeControl: 571 flow_type = cprimodClsFlowTypeCtrl; 572 break; 573 default: 574 flow_type = cprimodClsFlowTypeData; 575 break; 576 577 } 578 queue_num = config->queue_num; 579 580 SOC_IF_ERROR_RETURN 581 (portmod_cpri_port_decap_flow_config_set(unit, port, roe_subtype, queue_num, option, flow_type)); 582 return BCM_E_NONE; 583 #else 584 return BCM_E_UNAVAIL; 585 #endif 586 } 587 588 int 589 bcm_esw_cpri_port_decap_flow_to_queue_mapping_set( 590 int unit, 591 bcm_gport_t port, 592 uint32 flow_id, 593 uint32 queue_num) 594 { 595 #ifdef CPRIMOD_SUPPORT 596 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 597 SOC_IF_ERROR_RETURN 598 (portmod_cpri_port_decap_flow_to_queue_mapping_set(unit, port, flow_id, queue_num)); 599 return SOC_E_NONE; 600 #else 601 return BCM_E_UNAVAIL; 602 #endif 603 } 604 605 int 606 bcm_esw_cpri_port_decap_flow_to_queue_mapping_get( 607 int unit, 608 bcm_gport_t port, 609 uint32 flow_id, 610 uint32 *queue_num) 611 { 612 #ifdef CPRIMOD_SUPPORT 613 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 614 SOC_IF_ERROR_RETURN 615 (portmod_cpri_port_decap_flow_to_queue_mapping_get(unit, port, flow_id, queue_num)); 616 return SOC_E_NONE; 617 #else 618 return BCM_E_UNAVAIL; 619 #endif 620 } 621 622 623 int 624 bcm_esw_cpri_port_decap_queue_to_ordering_info_index_set( 625 int unit, 626 bcm_gport_t port, 627 uint32 queue_num, 628 uint32 ordering_info_index) 629 { 630 #ifdef CPRIMOD_SUPPORT 631 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 632 SOC_IF_ERROR_RETURN 633 (portmod_cpri_port_decap_queue_to_ordering_info_index_set(unit, port, queue_num, ordering_info_index)); 634 635 return SOC_E_NONE; 636 #else 637 return BCM_E_UNAVAIL; 638 #endif 639 } 640 641 int 642 bcm_esw_cpri_port_decap_queue_to_ordering_info_index_get( 643 int unit, 644 bcm_gport_t port, 645 uint32 queue_num, 646 uint32 *ordering_info_index) 647 { 648 #ifdef CPRIMOD_SUPPORT 649 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 650 SOC_IF_ERROR_RETURN 651 (portmod_cpri_port_decap_queue_to_ordering_info_index_get(unit, port, queue_num, ordering_info_index)); 652 653 return SOC_E_NONE; 654 #else 655 return BCM_E_UNAVAIL; 656 #endif 657 } 658 659 #ifdef CPRIMOD_SUPPORT 660 static 661 int _bcm_bcm_to_cprimod_ordering_info_type (bcm_cpri_roe_info_type_t bcm_type, cprimod_ordering_info_type_t *cprimod_type) 662 { 663 switch (bcm_type) { 664 case bcmCpriRoEInfoTypeUseSeq: 665 *cprimod_type = cprimod_ordering_info_type_roe_sequence; 666 break; 667 668 case bcmCpriRoEInfoTypeBfnForQcnt: 669 *cprimod_type = cprimod_ordering_info_type_bfn_for_qcnt; 670 break; 671 672 case bcmCpriRoEInfoTypePInfo: 673 *cprimod_type = cprimod_ordering_info_type_use_pinfo; 674 break; 675 default: 676 break; 677 } 678 return SOC_E_NONE; 679 } 680 681 682 static 683 int _bcm_cprimod_to_bcm_ordering_info_type (cprimod_ordering_info_type_t cprimod_type, bcm_cpri_roe_info_type_t *bcm_type) 684 { 685 switch (cprimod_type) { 686 case cprimod_ordering_info_type_roe_sequence: 687 *bcm_type = bcmCpriRoEInfoTypeUseSeq; 688 break; 689 690 case cprimod_ordering_info_type_bfn_for_qcnt: 691 *bcm_type = bcmCpriRoEInfoTypeBfnForQcnt; 692 break; 693 694 case cprimod_ordering_info_type_use_pinfo: 695 *bcm_type = bcmCpriRoEInfoTypePInfo; 696 break; 697 default: 698 break; 699 } 700 return SOC_E_NONE; 701 } 702 #endif 703 704 int 705 bcm_esw_cpri_port_decap_roe_ordering_info_get( 706 int unit, 707 bcm_gport_t port, 708 int index, 709 bcm_cpri_decap_roe_oi_t *ordering_info) 710 { 711 #ifdef CPRIMOD_SUPPORT 712 cprimod_decap_ordering_info_entry_t entry; 713 714 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 715 cprimod_decap_ordering_info_entry_t_init(&entry); 716 717 SOC_IF_ERROR_RETURN 718 (portmod_cpri_port_decap_roe_ordering_info_get(unit, port, index, &entry)); 719 720 _bcm_cprimod_to_bcm_ordering_info_type(entry.type, &ordering_info->info_type); 721 722 ordering_info->p_ext = entry.pcnt_extended; 723 ordering_info->pcnt_pkt_count = entry.pcnt_pkt_count; 724 ordering_info->pcnt_size = entry.pcnt_size; 725 ordering_info->pcnt_increment = entry.pcnt_increment; 726 ordering_info->pcnt_max = entry.pcnt_max; 727 ordering_info->p_bias = entry.pcnt_bias; 728 ordering_info->p_inc_p2 = entry.pcnt_increment_p2; 729 ordering_info->qcnt_size = entry.qcnt_size; 730 ordering_info->qcnt_increment = entry.qcnt_increment; 731 ordering_info->qcnt_max = entry.qcnt_max; 732 ordering_info->q_bias = entry.qcnt_bias; 733 ordering_info->q_inc_p2 = entry.qcnt_increment_p2; 734 ordering_info->modulo_2 = entry.modulo_2; 735 ordering_info->gsm_tsn_bitmap = entry.gsm_tsn_bitmap; 736 ordering_info->seq_rsvd = entry.seq_reserve_value; 737 738 return BCM_E_NONE; 739 #else 740 return BCM_E_UNAVAIL; 741 #endif 742 } 743 744 int 745 bcm_esw_cpri_port_decap_roe_ordering_info_set( 746 int unit, 747 bcm_gport_t port, 748 int index, 749 bcm_cpri_decap_roe_oi_t *ordering_info) 750 { 751 #ifdef CPRIMOD_SUPPORT 752 cprimod_decap_ordering_info_entry_t entry; 753 754 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 755 cprimod_decap_ordering_info_entry_t_init(&entry); 756 757 _bcm_bcm_to_cprimod_ordering_info_type(ordering_info->info_type, &entry.type); 758 entry.pcnt_extended = ordering_info->p_ext; 759 entry.pcnt_pkt_count = ordering_info->pcnt_pkt_count; 760 entry.pcnt_size = ordering_info->pcnt_size; 761 entry.pcnt_increment = ordering_info->pcnt_increment; 762 entry.pcnt_max = ordering_info->pcnt_max; 763 entry.pcnt_bias = ordering_info->p_bias; 764 entry.pcnt_increment_p2 = ordering_info->p_inc_p2; 765 entry.qcnt_size = ordering_info->qcnt_size; 766 entry.qcnt_increment = ordering_info->qcnt_increment; 767 entry.qcnt_max = ordering_info->qcnt_max; 768 entry.qcnt_bias = ordering_info->q_bias; 769 entry.qcnt_increment_p2 = ordering_info->q_inc_p2; 770 entry.modulo_2 = ordering_info->modulo_2; 771 entry.gsm_tsn_bitmap = ordering_info->gsm_tsn_bitmap; 772 entry.seq_reserve_value = ordering_info->seq_rsvd; 773 774 775 SOC_IF_ERROR_RETURN 776 (portmod_cpri_port_decap_roe_ordering_info_set(unit, port, index, &entry)); 777 return BCM_E_NONE; 778 #else 779 return BCM_E_UNAVAIL; 780 #endif 781 } 782 783 int 784 bcm_esw_cpri_port_decap_roe_ordering_sequence_offset_get( 785 int unit, 786 bcm_gport_t port, 787 int queue, 788 bcm_cpri_roe_oi_seq_offset_t *seq_offset) 789 { 790 #ifdef CPRIMOD_SUPPORT 791 cprimod_cpri_ordering_info_offset_t offset; 792 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 793 /* user need to provide the sizes. */ 794 offset.p_size = seq_offset->pcnt_size; 795 offset.q_size = seq_offset->qcnt_size; 796 797 SOC_IF_ERROR_RETURN 798 (portmod_cpri_port_decap_roe_ordering_sequence_offset_get(unit, port, queue, &offset)); 799 800 seq_offset->pcnt_offset = offset.p_offset; 801 seq_offset->qcnt_offset = offset.q_offset; 802 return BCM_E_NONE; 803 #else 804 return BCM_E_UNAVAIL; 805 #endif 806 } 807 808 int 809 bcm_esw_cpri_port_decap_roe_ordering_sequence_offset_set( 810 int unit, 811 bcm_gport_t port, 812 int queue, 813 bcm_cpri_roe_oi_seq_offset_t *seq_offset) 814 { 815 #ifdef CPRIMOD_SUPPORT 816 cprimod_cpri_ordering_info_offset_t offset; 817 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 818 819 offset.p_size = seq_offset->pcnt_size; 820 offset.p_offset = seq_offset->pcnt_offset; 821 offset.q_size = seq_offset->qcnt_size; 822 offset.q_offset = seq_offset->qcnt_offset; 823 824 SOC_IF_ERROR_RETURN 825 (portmod_cpri_port_decap_roe_ordering_sequence_offset_set(unit, port, queue, &offset)); 826 return BCM_E_NONE; 827 #else 828 return BCM_E_UNAVAIL; 829 #endif 830 } 831 832 #ifdef CPRIMOD_SUPPORT 833 static 834 int _bcm_cprimod_to_bcm_hdr_vlan_type(cprimod_hdr_vlan_type_t cprimod_type, bcm_cpri_vlan_type_t *bcm_type) 835 { 836 switch (cprimod_type) { 837 case cprimodHdrVlanTypeUntagged: 838 *bcm_type = bcmCpriVlanTypeNone; 839 break; 840 841 case cprimodHdrVlanTypeTaggedVlan0: 842 *bcm_type = bcmCpriVlanTypeSingle; 843 break; 844 845 case cprimodHdrVlanTypeQinQ: 846 *bcm_type = bcmCpriVlanTypeQinQ; 847 break; 848 case cprimodHdrVlanTypeTaggedVlan1: 849 *bcm_type = bcmCpriVlanTypeSingleTable1; 850 break; 851 default: 852 *bcm_type = bcmCpriVlanTypeNone; 853 break; 854 } 855 return SOC_E_NONE; 856 857 } 858 #endif 859 860 int 861 bcm_esw_cpri_port_encap_get( 862 int unit, 863 bcm_gport_t port, 864 int queue_num, 865 bcm_cpri_encap_info_t *encap_config) 866 { 867 #ifdef CPRIMOD_SUPPORT 868 cprimod_encap_header_config_t config; 869 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 870 871 cprimod_encap_header_config_t_init(&config); 872 873 SOC_IF_ERROR_RETURN 874 (portmod_cpri_port_encap_get(unit, port, queue_num, &config)); 875 876 _bcm_cprimod_to_bcm_hdr_vlan_type(config.vlan_type, &encap_config->vlan_type); 877 878 encap_config->hdr_type = config.header_type; 879 encap_config->flow_id = config.flow_id ; 880 encap_config->subtype = config.roe_subtype; 881 encap_config->roe_ordering_info_index = config.ordering_info_index; 882 encap_config->macda_index = config.mac_da_index; 883 encap_config->macsa_index = config.mac_sa_index; 884 encap_config->vlan0_idx = config.vlan_id_0_index; 885 encap_config->vlan1_idx = config.vlan_id_1_index; 886 encap_config->vlan0_priority = config.vlan_0_priority; 887 encap_config->vlan1_priority = config.vlan_1_priority; 888 encap_config->vlan_ethertype_idx = config.vlan_eth_type_index; 889 encap_config->opcode = config.roe_opcode; 890 encap_config->version = config.version; 891 encap_config->type = config.roe_frame_format; 892 893 if (config.use_tagid_for_vlan) { 894 encap_config->flags |= BCM_CPRI_ENCAP_USE_TAG_ID_FOR_VLAN; 895 } 896 897 if (config.use_tagid_for_flowid) { 898 encap_config->flags |= BCM_CPRI_ENCAP_USE_TAG_ID_FOR_FLOWID; 899 } 900 901 if (config.use_opcode) { 902 encap_config->flags |= BCM_CPRI_ENCAP_USE_OPCODE; 903 } 904 905 return BCM_E_NONE; 906 #else 907 return BCM_E_UNAVAIL; 908 #endif 909 } 910 911 int 912 bcm_esw_cpri_port_encap_roe_entry_macda_get( 913 int unit, 914 bcm_gport_t port, 915 int index, 916 bcm_mac_t macaddr) 917 { 918 #ifdef CPRIMOD_SUPPORT 919 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 920 SOC_IF_ERROR_RETURN 921 (portmod_cpri_port_roe_encap_macda_entry_get(unit, port, index, macaddr)); 922 return BCM_E_NONE; 923 #else 924 return BCM_E_UNAVAIL; 925 #endif 926 } 927 928 int 929 bcm_esw_cpri_port_encap_roe_entry_macda_set( 930 int unit, 931 bcm_gport_t port, 932 int index, 933 bcm_mac_t macaddr) 934 { 935 #ifdef CPRIMOD_SUPPORT 936 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 937 SOC_IF_ERROR_RETURN 938 (portmod_cpri_port_roe_encap_macda_entry_set(unit, port, index, macaddr)); 939 return BCM_E_NONE; 940 #else 941 return BCM_E_UNAVAIL; 942 #endif 943 } 944 945 int 946 bcm_esw_cpri_port_encap_roe_entry_macsa_get( 947 int unit, 948 bcm_gport_t port, 949 int index, 950 bcm_mac_t macaddr) 951 { 952 #ifdef CPRIMOD_SUPPORT 953 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 954 SOC_IF_ERROR_RETURN 955 (portmod_cpri_port_roe_encap_macsa_entry_get(unit, port, index, macaddr)); 956 return BCM_E_NONE; 957 #else 958 return BCM_E_UNAVAIL; 959 #endif 960 } 961 962 int 963 bcm_esw_cpri_port_encap_roe_entry_macsa_set( 964 int unit, 965 bcm_gport_t port, 966 int index, 967 bcm_mac_t macaddr) 968 { 969 #ifdef CPRIMOD_SUPPORT 970 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 971 SOC_IF_ERROR_RETURN 972 (portmod_cpri_port_roe_encap_macsa_entry_set(unit, port, index, macaddr)); 973 return BCM_E_NONE; 974 #else 975 return BCM_E_UNAVAIL; 976 #endif 977 } 978 979 int 980 bcm_esw_cpri_port_encap_roe_entry_vlan_get( 981 int unit, 982 bcm_gport_t port, 983 uint32 flags, 984 uint32 index, 985 bcm_vlan_t *vlan_id) 986 { 987 #ifdef CPRIMOD_SUPPORT 988 cprimod_vlan_table_id_t table_id = cprimodVlanTable0; 989 uint32 int_vlan_id; 990 991 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 992 if (flags == BCM_CPRI_VLAN_FLAG_VLAN_0) { 993 table_id = cprimodVlanTable0; 994 } else { 995 table_id = cprimodVlanTable1; 996 } 997 998 SOC_IF_ERROR_RETURN 999 (portmod_cpri_port_roe_encap_vlan_entry_get(unit, port, index, table_id, &int_vlan_id)); 1000 1001 *vlan_id = int_vlan_id; 1002 return BCM_E_NONE; 1003 #else 1004 return BCM_E_UNAVAIL; 1005 #endif 1006 } 1007 1008 int 1009 bcm_esw_cpri_port_encap_roe_entry_vlan_set( 1010 int unit, 1011 bcm_gport_t port, 1012 uint32 flags, 1013 uint32 index, 1014 bcm_vlan_t vlan_id) 1015 { 1016 #ifdef CPRIMOD_SUPPORT 1017 cprimod_vlan_table_id_t table_id = cprimodVlanTable0; 1018 uint32 int_vlan_id; 1019 1020 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1021 if (flags == BCM_CPRI_VLAN_FLAG_VLAN_0) { 1022 table_id = cprimodVlanTable0; 1023 } else { 1024 table_id = cprimodVlanTable1; 1025 } 1026 int_vlan_id = vlan_id; 1027 SOC_IF_ERROR_RETURN 1028 (portmod_cpri_port_roe_encap_vlan_entry_set(unit, port, index, table_id, int_vlan_id)); 1029 return BCM_E_NONE; 1030 #else 1031 return BCM_E_UNAVAIL; 1032 #endif 1033 } 1034 1035 #ifdef CPRIMOD_SUPPORT 1036 static 1037 int _bcm_bcm_to_cprimod_ordering_info_incr_type(bcm_cpri_roe_incr_type_t bcm_type, cprimod_ordering_info_prop_t *cprimod_type) 1038 { 1039 switch (bcm_type) { 1040 case bcmCpriRoEIncrTypeNone: 1041 *cprimod_type = cprimod_ordering_info_prop_no_increment; 1042 break; 1043 1044 case bcmCpriRoEIncrTypeConstant: 1045 *cprimod_type = cprimod_ordering_info_prop_increment_by_constant; 1046 break; 1047 1048 case bcmCpriRoEIncrTypePayloadSize: 1049 *cprimod_type = cprimod_ordering_info_prop_increment_by_payload; 1050 break; 1051 default: 1052 break; 1053 } 1054 return SOC_E_NONE; 1055 } 1056 1057 static 1058 int _bcm_cprimod_to_bcm_ordering_info_incr_type(cprimod_ordering_info_prop_t cprimod_type, bcm_cpri_roe_incr_type_t* bcm_type) 1059 { 1060 switch (cprimod_type) { 1061 case cprimod_ordering_info_prop_no_increment: 1062 *bcm_type = bcmCpriRoEIncrTypeNone; 1063 break; 1064 1065 case cprimod_ordering_info_prop_increment_by_constant: 1066 *bcm_type = bcmCpriRoEIncrTypeConstant; 1067 break; 1068 1069 case cprimod_ordering_info_prop_increment_by_payload: 1070 *bcm_type = bcmCpriRoEIncrTypePayloadSize; 1071 break; 1072 default: 1073 break; 1074 } 1075 return SOC_E_NONE; 1076 } 1077 #endif 1078 int 1079 bcm_esw_cpri_port_encap_roe_ordering_info_get( 1080 int unit, 1081 bcm_gport_t port, 1082 int index, 1083 bcm_cpri_encap_roe_oi_t *ordering_info) 1084 { 1085 #ifdef CPRIMOD_SUPPORT 1086 cprimod_encap_ordering_info_entry_t entry; 1087 1088 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1089 cprimod_encap_ordering_info_entry_t_init(&entry); 1090 1091 SOC_IF_ERROR_RETURN 1092 (portmod_cpri_port_encap_roe_ordering_info_get(unit, port, index, &entry)); 1093 1094 _bcm_cprimod_to_bcm_ordering_info_type(entry.type, &ordering_info->info_type); 1095 _bcm_cprimod_to_bcm_ordering_info_incr_type(entry.pcnt_prop, &ordering_info->p_seq_incr); 1096 _bcm_cprimod_to_bcm_ordering_info_incr_type(entry.qcnt_prop, &ordering_info->q_seq_incr); 1097 ordering_info->pcnt_size = entry.pcnt_size; 1098 ordering_info->pcnt_increment = entry.pcnt_increment; 1099 ordering_info->pcnt_max = entry.pcnt_max; 1100 ordering_info->qcnt_size = entry.qcnt_size; 1101 ordering_info->qcnt_increment = entry.qcnt_increment; 1102 ordering_info->qcnt_max = entry.qcnt_max; 1103 ordering_info->seq_rsvd = entry.seq_reserve_value; 1104 1105 return BCM_E_NONE; 1106 #else 1107 return BCM_E_UNAVAIL; 1108 #endif 1109 } 1110 1111 int 1112 bcm_esw_cpri_port_encap_roe_ordering_info_set( 1113 int unit, 1114 bcm_gport_t port, 1115 int index, 1116 bcm_cpri_encap_roe_oi_t *ordering_info) 1117 { 1118 #ifdef CPRIMOD_SUPPORT 1119 cprimod_encap_ordering_info_entry_t entry; 1120 1121 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1122 cprimod_encap_ordering_info_entry_t_init(&entry); 1123 1124 _bcm_bcm_to_cprimod_ordering_info_type(ordering_info->info_type, &entry.type); 1125 _bcm_bcm_to_cprimod_ordering_info_incr_type(ordering_info->p_seq_incr, &entry.pcnt_prop); 1126 _bcm_bcm_to_cprimod_ordering_info_incr_type(ordering_info->q_seq_incr, &entry.qcnt_prop); 1127 entry.pcnt_size = ordering_info->pcnt_size; 1128 entry.pcnt_increment = ordering_info->pcnt_increment; 1129 entry.pcnt_max = ordering_info->pcnt_max; 1130 entry.qcnt_size = ordering_info->qcnt_size; 1131 entry.qcnt_increment = ordering_info->qcnt_increment; 1132 entry.qcnt_max = ordering_info->qcnt_max; 1133 entry.seq_reserve_value = ordering_info->seq_rsvd; 1134 1135 1136 SOC_IF_ERROR_RETURN 1137 (portmod_cpri_port_encap_roe_ordering_info_set(unit, port, index, &entry)); 1138 return BCM_E_NONE; 1139 #else 1140 return BCM_E_UNAVAIL; 1141 #endif 1142 1143 } 1144 1145 int 1146 bcm_esw_cpri_port_encap_roe_ordering_sequence_offset_get( 1147 int unit, 1148 bcm_gport_t port, 1149 int queue, 1150 int control, 1151 bcm_cpri_roe_oi_seq_offset_t *seq_offset) 1152 { 1153 #ifdef CPRIMOD_SUPPORT 1154 cprimod_cpri_ordering_info_offset_t offset; 1155 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1156 /* user need to provide the sizes. */ 1157 offset.p_size = seq_offset->pcnt_size; 1158 offset.q_size = seq_offset->qcnt_size; 1159 1160 SOC_IF_ERROR_RETURN 1161 (portmod_cpri_port_encap_roe_ordering_sequence_offset_get(unit, port, queue, control, &offset)); 1162 1163 seq_offset->pcnt_offset = offset.p_offset; 1164 seq_offset->qcnt_offset = offset.q_offset; 1165 return BCM_E_NONE; 1166 #else 1167 return BCM_E_UNAVAIL; 1168 #endif 1169 } 1170 1171 int 1172 bcm_esw_cpri_port_encap_roe_ordering_sequence_offset_set( 1173 int unit, 1174 bcm_gport_t port, 1175 int queue, 1176 int control, 1177 bcm_cpri_roe_oi_seq_offset_t *seq_offset) 1178 { 1179 #ifdef CPRIMOD_SUPPORT 1180 cprimod_cpri_ordering_info_offset_t offset; 1181 1182 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1183 offset.p_size = seq_offset->pcnt_size; 1184 offset.p_offset = seq_offset->pcnt_offset; 1185 offset.q_size = seq_offset->qcnt_size; 1186 offset.q_offset = seq_offset->qcnt_offset; 1187 1188 SOC_IF_ERROR_RETURN 1189 (portmod_cpri_port_encap_roe_ordering_sequence_offset_set(unit, port, queue, control, &offset)); 1190 return BCM_E_NONE; 1191 #else 1192 return BCM_E_UNAVAIL; 1193 #endif 1194 } 1195 1196 #ifdef CPRIMOD_SUPPORT 1197 static 1198 int _bcm_to_cprimod_hdr_vlan_type(bcm_cpri_vlan_type_t bcm_type, cprimod_hdr_vlan_type_t *cprimod_type) 1199 { 1200 switch (bcm_type) { 1201 case bcmCpriVlanTypeNone: 1202 *cprimod_type = cprimodHdrVlanTypeUntagged; 1203 break; 1204 1205 case bcmCpriVlanTypeSingle: 1206 *cprimod_type = cprimodHdrVlanTypeTaggedVlan0; 1207 break; 1208 1209 case bcmCpriVlanTypeQinQ: 1210 *cprimod_type = cprimodHdrVlanTypeQinQ; 1211 break; 1212 case bcmCpriVlanTypeSingleTable1: 1213 *cprimod_type = cprimodHdrVlanTypeTaggedVlan1; 1214 break; 1215 default: 1216 *cprimod_type = cprimodHdrVlanTypeUntagged; 1217 break; 1218 } 1219 return SOC_E_NONE; 1220 } 1221 #endif 1222 1223 int 1224 bcm_esw_cpri_port_encap_set( 1225 int unit, 1226 bcm_gport_t port, 1227 int queue_num, 1228 bcm_cpri_encap_info_t *encap_config) 1229 { 1230 #ifdef CPRIMOD_SUPPORT 1231 cprimod_encap_header_config_t config; 1232 1233 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1234 cprimod_encap_header_config_t_init(&config); 1235 1236 _bcm_to_cprimod_hdr_vlan_type(encap_config->vlan_type, &config.vlan_type); 1237 1238 config.header_type = encap_config->hdr_type ; 1239 1240 config.flow_id = encap_config->flow_id ; 1241 config.roe_subtype = encap_config->subtype ; 1242 config.ordering_info_index = encap_config->roe_ordering_info_index ; 1243 config.mac_da_index = encap_config->macda_index ; 1244 config.mac_sa_index = encap_config->macsa_index ; 1245 config.vlan_id_0_index = encap_config->vlan0_idx ; 1246 config.vlan_id_1_index = encap_config->vlan1_idx ; 1247 config.vlan_0_priority = encap_config->vlan0_priority ; 1248 config.vlan_1_priority = encap_config->vlan1_priority ; 1249 config.vlan_eth_type_index = encap_config->vlan_ethertype_idx; 1250 config.roe_opcode = encap_config->opcode; 1251 config.version = encap_config->version; 1252 config.roe_frame_format = encap_config->type; 1253 config.ecpri_pc_id = encap_config->ecpri_pc_id; 1254 config.ecpri_msg_type = encap_config->ecpri_msg_type; 1255 1256 if(encap_config->flags & BCM_CPRI_ENCAP_USE_TAG_ID_FOR_VLAN){ 1257 config.use_tagid_for_vlan = 1; 1258 } else { 1259 config.use_tagid_for_vlan = 0; 1260 } 1261 1262 if(encap_config->flags & BCM_CPRI_ENCAP_USE_TAG_ID_FOR_FLOWID){ 1263 config.use_tagid_for_flowid = 1; 1264 } else { 1265 config.use_tagid_for_flowid = 0; 1266 } 1267 1268 if(encap_config->flags & BCM_CPRI_ENCAP_USE_OPCODE){ 1269 config.use_opcode = 1; 1270 } else { 1271 config.use_opcode = 0; 1272 } 1273 1274 SOC_IF_ERROR_RETURN 1275 (portmod_cpri_port_encap_set(unit, port, queue_num, &config)); 1276 return BCM_E_NONE; 1277 #else 1278 return BCM_E_UNAVAIL; 1279 #endif 1280 } 1281 1282 int 1283 bcm_esw_cpri_port_encap_vlan_config_get( 1284 int unit, 1285 bcm_gport_t port, 1286 bcm_cpri_encap_vlan_config_t *vlan_config) 1287 { 1288 #ifdef CPRIMOD_SUPPORT 1289 uint16 ethertype = 0; 1290 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1291 SOC_IF_ERROR_RETURN 1292 (portmod_cpri_port_encap_ethertype_config_get(unit, port, cprimodEthertypeRoe, ðertype)); 1293 vlan_config->roe_ethertype_0 = ethertype; 1294 1295 SOC_IF_ERROR_RETURN 1296 (portmod_cpri_port_encap_ethertype_config_get(unit, port, cprimodEthertypeRoe1, ðertype)); 1297 vlan_config->roe_ethertype_1= ethertype; 1298 1299 SOC_IF_ERROR_RETURN 1300 (portmod_cpri_port_encap_ethertype_config_get(unit, port, cprimodEthertypeVlan, ðertype)); 1301 vlan_config->ethertype_vlan_tagged= ethertype; 1302 1303 SOC_IF_ERROR_RETURN 1304 (portmod_cpri_port_encap_ethertype_config_get(unit, port, cprimodEthertypeQinQ, ðertype)); 1305 vlan_config->ethertype_vlan_qinq= ethertype; 1306 1307 return BCM_E_NONE; 1308 #else 1309 return BCM_E_UNAVAIL; 1310 #endif 1311 } 1312 1313 int 1314 bcm_esw_cpri_port_encap_vlan_config_set( 1315 int unit, 1316 bcm_gport_t port, 1317 bcm_cpri_encap_vlan_config_t *vlan_config) 1318 { 1319 #ifdef CPRIMOD_SUPPORT 1320 uint16 ethertype; 1321 1322 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1323 ethertype = vlan_config->roe_ethertype_0; 1324 SOC_IF_ERROR_RETURN 1325 (portmod_cpri_port_encap_ethertype_config_set(unit, port, cprimodEthertypeRoe, ethertype)); 1326 1327 ethertype = vlan_config->roe_ethertype_1; 1328 SOC_IF_ERROR_RETURN 1329 (portmod_cpri_port_encap_ethertype_config_set(unit, port, cprimodEthertypeRoe1, ethertype)); 1330 1331 ethertype = vlan_config->ethertype_vlan_tagged; 1332 SOC_IF_ERROR_RETURN 1333 (portmod_cpri_port_encap_ethertype_config_set(unit, port, cprimodEthertypeVlan, ethertype)); 1334 1335 ethertype = vlan_config->ethertype_vlan_qinq; 1336 SOC_IF_ERROR_RETURN 1337 (portmod_cpri_port_encap_ethertype_config_set(unit, port, cprimodEthertypeQinQ, ethertype)); 1338 1339 return BCM_E_NONE; 1340 #else 1341 return BCM_E_UNAVAIL; 1342 #endif 1343 } 1344 1345 int 1346 bcm_esw_cpri_port_rsvd4_dbm_entry_clear( 1347 int unit, 1348 bcm_gport_t port, 1349 int index) 1350 { 1351 #ifdef CPRIMOD_SUPPORT 1352 cprimod_dbm_rule_entry_t profile; 1353 1354 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1355 cprimod_dbm_rule_entry_t_init(&profile); 1356 1357 SOC_IF_ERROR_RETURN 1358 (portmod_cpri_port_rsvd4_dbm_entry_set(unit, port, index, &profile)); 1359 1360 return BCM_E_NONE; 1361 #else 1362 return BCM_E_UNAVAIL; 1363 #endif 1364 } 1365 1366 #ifdef CPRIMOD_SUPPORT 1367 static 1368 int _bcm_to_cprimod_position_start(uint8 bcm_pos_index, cprimod_dbm_rule_pos_index_t *pos_grp_index) 1369 { 1370 switch (bcm_pos_index) { 1371 case 0: 1372 *pos_grp_index = cprimodDbmRulePosIndexStart0; 1373 break; 1374 case 10: 1375 *pos_grp_index = cprimodDbmRulePosIndexStart10; 1376 break; 1377 case 20: 1378 *pos_grp_index = cprimodDbmRulePosIndexStart20; 1379 break; 1380 case 30: 1381 *pos_grp_index = cprimodDbmRulePosIndexStart30; 1382 break; 1383 case 40: 1384 *pos_grp_index = cprimodDbmRulePosIndexStart40; 1385 break; 1386 case 50: 1387 *pos_grp_index = cprimodDbmRulePosIndexStart50; 1388 break; 1389 case 60: 1390 *pos_grp_index = cprimodDbmRulePosIndexStart60; 1391 break; 1392 case 70: 1393 *pos_grp_index = cprimodDbmRulePosIndexStart70; 1394 break; 1395 default: 1396 LOG_ERROR(BSL_LS_BCM_PORT, 1397 (BSL_META("DBM Profile Position Table cannot start at %d\n"), bcm_pos_index)); 1398 return BCM_E_PARAM; 1399 break; 1400 } 1401 return BCM_E_NONE; 1402 } 1403 1404 int _cprimod_to_bcm_position_start(cprimod_dbm_rule_pos_index_t pos_grp_index, uint8 *bcm_pos_index) 1405 { 1406 switch (pos_grp_index) { 1407 case cprimodDbmRulePosIndexStart0: 1408 *bcm_pos_index = 0; 1409 break; 1410 case cprimodDbmRulePosIndexStart10: 1411 *bcm_pos_index = 10; 1412 break; 1413 case cprimodDbmRulePosIndexStart20: 1414 *bcm_pos_index = 20; 1415 break; 1416 case cprimodDbmRulePosIndexStart30: 1417 *bcm_pos_index = 30; 1418 break; 1419 case cprimodDbmRulePosIndexStart40: 1420 *bcm_pos_index = 40; 1421 break; 1422 case cprimodDbmRulePosIndexStart50: 1423 *bcm_pos_index = 50; 1424 break; 1425 case cprimodDbmRulePosIndexStart60: 1426 *bcm_pos_index = 60; 1427 break; 1428 case cprimodDbmRulePosIndexStart70: 1429 *bcm_pos_index = 70; 1430 break; 1431 default: 1432 LOG_ERROR(BSL_LS_BCM_PORT, 1433 (BSL_META( "DBM Profile Position Table cannot start at %d\n"), pos_grp_index)); 1434 return BCM_E_PARAM; 1435 break; 1436 } 1437 return BCM_E_NONE; 1438 } 1439 1440 static 1441 int _bcm_to_cprimod_position_table_size(uint8 pos_table_size, cprimod_dbm_rule_pos_grp_size_t *pos_grp_size) 1442 { 1443 switch (pos_table_size) { 1444 case 10: 1445 *pos_grp_size = cprimodDbmRulePosGrpSize10; 1446 break; 1447 case 20: 1448 *pos_grp_size = cprimodDbmRulePosGrpSize20; 1449 break; 1450 case 40: 1451 *pos_grp_size = cprimodDbmRulePosGrpSize40; 1452 break; 1453 case 80: 1454 *pos_grp_size = cprimodDbmRulePosGrpSize80; 1455 break; 1456 default: 1457 LOG_ERROR(BSL_LS_BCM_PORT, 1458 (BSL_META( "DBM Profile Num Position Table cannot be %d\n"), pos_table_size)); 1459 return BCM_E_PARAM; 1460 break; 1461 } 1462 return BCM_E_NONE; 1463 } 1464 1465 static 1466 int _cprimod_to_bcm_position_table_size(cprimod_dbm_rule_pos_grp_size_t pos_grp_size, uint8 *pos_table_size) 1467 { 1468 switch (pos_grp_size) { 1469 case cprimodDbmRulePosGrpSize10: 1470 *pos_table_size = 10; 1471 break; 1472 case cprimodDbmRulePosGrpSize20: 1473 *pos_table_size = 20; 1474 break; 1475 case cprimodDbmRulePosGrpSize40: 1476 *pos_table_size = 40; 1477 break; 1478 case cprimodDbmRulePosGrpSize80: 1479 *pos_table_size = 80; 1480 break; 1481 default: 1482 LOG_ERROR(BSL_LS_BCM_PORT, 1483 (BSL_META( "DBM Profile Num Position Table cannot be %d\n"), pos_grp_size)); 1484 return BCM_E_PARAM; 1485 break; 1486 } 1487 return BCM_E_NONE; 1488 } 1489 #endif 1490 1491 int 1492 bcm_esw_cpri_port_rsvd4_dbm_entry_get( 1493 int unit, 1494 bcm_gport_t port, 1495 int index, 1496 bcm_rsvd4_dbm_entry_t *entry) 1497 { 1498 #ifdef CPRIMOD_SUPPORT 1499 cprimod_dbm_rule_entry_t profile; 1500 1501 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1502 cprimod_dbm_rule_entry_t_init(&profile); 1503 1504 SOC_IF_ERROR_RETURN 1505 (portmod_cpri_port_rsvd4_dbm_entry_get(unit, port, index, &profile)); 1506 entry->bm1_multiple = profile.bm1_mult; 1507 entry->bm1[0] = profile.bm1[0]; 1508 entry->bm1[1] = profile.bm1[1]; 1509 entry->bm1[2] = profile.bm1[2]; 1510 entry->bm1_size = profile.bm1_size; 1511 entry->bm2[0] = profile.bm2[0]; 1512 entry->bm2[1] = profile.bm2[1]; 1513 entry->bm2_size = profile.bm2_size; 1514 entry->num_slots = profile.num_slots; 1515 1516 SOC_IF_ERROR_RETURN 1517 (_cprimod_to_bcm_position_start(profile.pos_grp_index, &entry->pos_index)); 1518 1519 SOC_IF_ERROR_RETURN 1520 (_cprimod_to_bcm_position_table_size(profile.pos_grp_size,&entry->pos_entries)); 1521 1522 return BCM_E_NONE; 1523 #else 1524 return BCM_E_UNAVAIL; 1525 #endif 1526 1527 } 1528 1529 int 1530 bcm_esw_cpri_port_rsvd4_dbm_entry_set( 1531 int unit, 1532 bcm_gport_t port, 1533 int index, 1534 bcm_rsvd4_dbm_entry_t *entry) 1535 { 1536 #ifdef CPRIMOD_SUPPORT 1537 cprimod_dbm_rule_entry_t profile; 1538 1539 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1540 cprimod_dbm_rule_entry_t_init(&profile); 1541 1542 profile.bm1_mult = entry->bm1_multiple; 1543 profile.bm1[0] = entry->bm1[0]; 1544 profile.bm1[1] = entry->bm1[1]; 1545 profile.bm1[2] = entry->bm1[2]; 1546 profile.bm1_size = entry->bm1_size; 1547 profile.bm2[0] = entry->bm2[0]; 1548 profile.bm2[1] = entry->bm2[1]; 1549 profile.bm2_size = entry->bm2_size; 1550 profile.num_slots = entry->num_slots; 1551 1552 SOC_IF_ERROR_RETURN 1553 (_bcm_to_cprimod_position_start(entry->pos_index, &profile.pos_grp_index)); 1554 1555 SOC_IF_ERROR_RETURN 1556 (_bcm_to_cprimod_position_table_size(entry->pos_entries, &profile.pos_grp_size)); 1557 1558 SOC_IF_ERROR_RETURN 1559 (portmod_cpri_port_rsvd4_dbm_entry_set(unit, port, index, &profile)); 1560 1561 return BCM_E_NONE; 1562 #else 1563 return BCM_E_UNAVAIL; 1564 #endif 1565 } 1566 1567 int 1568 bcm_esw_cpri_port_rsvd4_rx_bfn_sync_config_set( 1569 int unit, 1570 bcm_gport_t port, 1571 uint16 master_frame_count, 1572 uint64 master_frame_start) 1573 { 1574 #ifdef CPRIMOD_SUPPORT 1575 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1576 SOC_IF_ERROR_RETURN 1577 (portmod_cpri_port_rsvd4_rx_master_frame_sync_config_set(unit, port, master_frame_count,master_frame_start)); 1578 return BCM_E_NONE; 1579 #else 1580 return BCM_E_UNAVAIL; 1581 #endif 1582 } 1583 1584 int 1585 bcm_esw_cpri_port_rsvd4_rx_flow_add( 1586 int unit, 1587 bcm_gport_t port, 1588 int flow_id, 1589 bcm_rsvd4_rx_flow_info_t *flow_info) 1590 { 1591 #ifdef CPRIMOD_SUPPORT 1592 portmod_rsvd4_rx_flow_info_t int_flow_info; 1593 1594 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1595 int_flow_info.mask = flow_info->mask ; 1596 int_flow_info.match_data = flow_info->match_data ; 1597 1598 int_flow_info.packet_size = flow_info->payload_size ; 1599 int_flow_info.last_packet_size = flow_info->last_payload_size ; 1600 int_flow_info.last_packet_num = flow_info->last_payload_index ; 1601 1602 int_flow_info.axc_id = flow_info->axc_id; 1603 int_flow_info.stuffing_cnt = flow_info->stuffing_count ; 1604 int_flow_info.msg_ts_mode = flow_info->msg_ts_mode; 1605 int_flow_info.msg_ts_count = flow_info-> msg_ts_count; 1606 1607 int_flow_info.master_frame_offset = flow_info->master_frame_offset; 1608 int_flow_info.message_number_offset = flow_info->message_number_offset ; 1609 int_flow_info.container_block_count = flow_info->container_blk_count; 1610 int_flow_info.queue_size = flow_info->queue_size ; 1611 int_flow_info.priority = flow_info->priority ; 1612 int_flow_info.pad_size = flow_info->gsm_pad_size ; 1613 int_flow_info.extra_pad_size = flow_info->gsm_extra_pad_size ; 1614 int_flow_info.pad_enable = flow_info->gsm_pad_en; 1615 int_flow_info.control_location = flow_info->gsm_ctrl_loc ; 1616 int_flow_info.tsn_bitmap = flow_info->gsm_tsn_bitmap ; 1617 int_flow_info.frame_sync_mode = flow_info->sync_mode; 1618 1619 SOC_IF_ERROR_RETURN 1620 (portmod_cpri_port_rsvd4_rx_flow_add(unit, port, flow_id, &int_flow_info)); 1621 return BCM_E_NONE; 1622 #else 1623 return BCM_E_UNAVAIL; 1624 #endif 1625 } 1626 1627 int 1628 bcm_esw_cpri_port_rsvd4_rx_flow_delete( 1629 int unit, 1630 bcm_gport_t port, 1631 int flow_id) 1632 { 1633 #ifdef CPRIMOD_SUPPORT 1634 1635 BCM_IF_ERROR_RETURN 1636 (_bcm_esw_port_gport_validate(unit, port, &port)); 1637 1638 SOC_IF_ERROR_RETURN 1639 (portmod_cpri_port_rsvd4_rx_flow_delete(unit, port, flow_id)); 1640 return BCM_E_NONE; 1641 #else 1642 return BCM_E_UNAVAIL; 1643 #endif 1644 } 1645 1646 int 1647 bcm_esw_cpri_port_rsvd4_rx_frame_config_debug_set( 1648 int unit, 1649 bcm_gport_t port, 1650 bcm_rsvd4_rx_config_t config_type, 1651 uint32 value) 1652 { 1653 #ifdef CPRIMOD_SUPPORT 1654 cprimod_rsvd4_rx_config_field_t field; 1655 1656 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1657 switch (config_type) { 1658 case bcmRsvd4RxConfigDescrambleEnable: 1659 field = cprimodRsvd4RxConfigDescrambleEnable; 1660 break; 1661 case bcmRsvd4RxConfigSyncThreshold: 1662 field = cprimodRsvd4RxConfigSyncThreshold; 1663 break; 1664 case bcmRsvd4RxConfigUnsyncThreshold: 1665 field = cprimodRsvd4RxConfigUnsyncThreshold; 1666 break; 1667 case bcmRsvd4RxConfigFrameSyncThreshold: 1668 field = cprimodRsvd4RxConfigFrameSyncThreshold; 1669 break; 1670 case bcmRsvd4RxConfigFrameUnsyncThreshold: 1671 field = cprimodRsvd4RxConfigFrameUnsyncThreshold; 1672 break; 1673 case bcmRsvd4RxConfigBlockSize: 1674 field = cprimodRsvd4RxConfigBlockSize; 1675 break; 1676 default: 1677 field = cprimodRsvd4RxConfigDescrambleEnable; 1678 break; 1679 } 1680 BCM_IF_ERROR_RETURN(portmod_port_rsvd4_rx_frame_optional_config_set(unit, 1681 port, 1682 field, 1683 value)); 1684 return BCM_E_NONE; 1685 #else 1686 return BCM_E_UNAVAIL; 1687 #endif 1688 } 1689 1690 int 1691 bcm_esw_cpri_port_rsvd4_rx_frame_config_get( 1692 int unit, 1693 bcm_gport_t port, 1694 bcm_rsvd4_rx_frame_config_t *config) 1695 { 1696 #ifdef CPRIMOD_SUPPORT 1697 cprimod_port_rsvd4_speed_mult_t speed; 1698 1699 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1700 BCM_IF_ERROR_RETURN(portmod_port_rsvd4_rx_speed_get(unit, port, &speed)); 1701 if(speed == cprimodRsvd4SpdMult4X) { 1702 config->speed_multiple = 4; 1703 } else if (speed == cprimodRsvd4SpdMult8X) { 1704 config->speed_multiple = 8; 1705 } else { 1706 } 1707 1708 return BCM_E_NONE; 1709 #else 1710 return BCM_E_UNAVAIL; 1711 #endif 1712 } 1713 1714 int 1715 bcm_esw_cpri_port_rsvd4_rx_frame_config_set( 1716 int unit, 1717 bcm_gport_t port, 1718 bcm_rsvd4_rx_frame_config_t *config) 1719 { 1720 #ifdef CPRIMOD_SUPPORT 1721 cprimod_port_rsvd4_speed_mult_t speed = cprimodRsvd4SpdMultCount; 1722 1723 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1724 if(config->speed_multiple == 4) { 1725 speed = cprimodRsvd4SpdMult4X; 1726 } else if(config->speed_multiple == 8) { 1727 speed = cprimodRsvd4SpdMult8X; 1728 } else { 1729 return BCM_E_PARAM; 1730 } 1731 BCM_IF_ERROR_RETURN(portmod_port_rsvd4_rx_speed_set(unit, port, speed)); 1732 1733 return BCM_E_NONE; 1734 #else 1735 return BCM_E_UNAVAIL; 1736 #endif 1737 } 1738 1739 int 1740 bcm_esw_cpri_port_rsvd4_rx_override_set( 1741 int unit, 1742 bcm_gport_t port, 1743 bcm_rsvd4_rx_params_t parameter, 1744 int enable, 1745 int value) 1746 { 1747 #ifdef CPRIMOD_SUPPORT 1748 cprimod_rsvd4_rx_overide_t parameter_t; 1749 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1750 switch (parameter) { 1751 case bcmRsvd4RxParams_Frame_Unsync_T_Invalid_MG_Rcvd: 1752 parameter_t = cprimodRsvd4RxOverideFrameUnsyncTInvldMgRecvd; 1753 break; 1754 case bcmRsvd4RxParams_Frame_Sync_T_Valid_MG_Rcvd: 1755 parameter_t = cprimodRsvd4RxOverideFrameSyncTVldMgRecvd; 1756 break; 1757 case bcmRsvd4RxParams_K_MG_Idles_Rcvd: 1758 parameter_t = cprimodRsvd4RxOverideKMgIdlesRecvd; 1759 break; 1760 case bcmRsvd4RxParams_Idle_Req_Rcvd: 1761 parameter_t = cprimodRsvd4RxOverideIdleReqRecvd; 1762 break; 1763 case bcmRsvd4RxParams_Idle_Ack_Rcvd: 1764 parameter_t = cprimodRsvd4RxOverideIdleAckRecvd; 1765 break; 1766 case bcmRsvd4RxParams_SeedCapAndVerifyDone: 1767 parameter_t = cprimodRsvd4RxOverideSeedCapAndVerifyDone; 1768 break; 1769 default: 1770 parameter_t = cprimodRsvd4RxOverideFrameUnsyncTInvldMgRecvd; 1771 break; 1772 } 1773 BCM_IF_ERROR_RETURN(portmod_cpri_port_rsvd4_rx_override_set(unit, port, 1774 parameter_t, 1775 enable, 1776 value)); 1777 return BCM_E_NONE; 1778 #else 1779 return BCM_E_UNAVAIL; 1780 #endif 1781 } 1782 1783 int 1784 bcm_esw_cpri_port_rsvd4_rx_fsm_state_set( 1785 int unit, 1786 bcm_gport_t port, 1787 bcm_rsvd4_rx_fsm_state_t state) 1788 { 1789 #ifdef CPRIMOD_SUPPORT 1790 cprimod_rsvd4_rx_fsm_state_t state_t; 1791 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1792 switch (state) { 1793 case bcmRsvd4RxFsmStateUnsync: 1794 state_t = cprimodRsvd4RxFsmStateUnsync; 1795 break; 1796 case bcmRsvd4RxFsmStateWaitForSeed: 1797 state_t = cprimodRsvd4RxFsmStateWaitForSeed; 1798 break; 1799 case bcmRsvd4RxFsmStateWaitForAck: 1800 state_t = cprimodRsvd4RxFsmStateWaitForAck; 1801 break; 1802 case bcmRsvd4RxFsmStateWaitForK28p7Idles: 1803 state_t = cprimodRsvd4RxFsmStateWaitForK28p7Idles; 1804 break; 1805 case bcmRsvd4RxFsmStateWaitForFrameSync: 1806 state_t = cprimodRsvd4RxFsmStateWaitForFrameSync; 1807 break; 1808 case bcmRsvd4RxFsmStateFrameSync: 1809 state_t = cprimodRsvd4RxFsmStateFrameSync; 1810 break; 1811 default: 1812 state_t = cprimodRsvd4RxFsmStateUnsync; 1813 break; 1814 } 1815 BCM_IF_ERROR_RETURN(portmod_cpri_port_rsvd4_rx_fsm_state_set(unit, port, 1816 state_t)); 1817 return BCM_E_NONE; 1818 #else 1819 return BCM_E_UNAVAIL; 1820 #endif 1821 } 1822 1823 int 1824 bcm_esw_cpri_port_rsvd4_secondary_dbm_entry_clear( 1825 int unit, 1826 bcm_gport_t port, 1827 int index) 1828 { 1829 #ifdef CPRIMOD_SUPPORT 1830 cprimod_secondary_dbm_rule_entry_t profile; 1831 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1832 cprimod_secondary_dbm_rule_entry_t_init(&profile); 1833 1834 SOC_IF_ERROR_RETURN 1835 (portmod_cpri_port_rsvd4_secondary_dbm_entry_set(unit, port, index, &profile)); 1836 return BCM_E_NONE; 1837 #else 1838 return BCM_E_UNAVAIL; 1839 #endif 1840 } 1841 1842 int 1843 bcm_esw_cpri_port_rsvd4_secondary_dbm_entry_get( 1844 int unit, 1845 bcm_gport_t port, 1846 int index, 1847 bcm_rsvd4_secondary_dbm_entry_t *entry) 1848 { 1849 #ifdef CPRIMOD_SUPPORT 1850 cprimod_secondary_dbm_rule_entry_t profile; 1851 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1852 cprimod_secondary_dbm_rule_entry_t_init(&profile); 1853 1854 SOC_IF_ERROR_RETURN 1855 (portmod_cpri_port_rsvd4_secondary_dbm_entry_get(unit, port, index, &profile)); 1856 1857 entry->bm1_multiple = profile.bm1_mult; 1858 entry->bm1 = profile.bm1; 1859 entry->bm1_size = profile.bm1_size; 1860 entry->bm2 = profile.bm2; 1861 entry->bm2_size = profile.bm2_size; 1862 entry->num_slots = profile.num_slots; 1863 1864 return BCM_E_NONE; 1865 #else 1866 return BCM_E_UNAVAIL; 1867 #endif 1868 1869 } 1870 1871 int 1872 bcm_esw_cpri_port_rsvd4_secondary_dbm_entry_set( 1873 int unit, 1874 bcm_gport_t port, 1875 int index, 1876 bcm_rsvd4_secondary_dbm_entry_t *entry) 1877 { 1878 #ifdef CPRIMOD_SUPPORT 1879 cprimod_secondary_dbm_rule_entry_t profile; 1880 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1881 cprimod_secondary_dbm_rule_entry_t_init(&profile); 1882 1883 profile.bm1_mult = entry->bm1_multiple; 1884 profile.bm1 = entry->bm1; 1885 profile.bm1_size = entry->bm1_size; 1886 profile.bm2 = entry->bm2; 1887 profile.bm2_size = entry->bm2_size; 1888 profile.num_slots = entry->num_slots; 1889 1890 SOC_IF_ERROR_RETURN 1891 (portmod_cpri_port_rsvd4_secondary_dbm_entry_set(unit, port, index, &profile)); 1892 return BCM_E_NONE; 1893 #else 1894 return BCM_E_UNAVAIL; 1895 #endif 1896 } 1897 1898 int 1899 bcm_esw_cpri_port_rsvd4_tx_flow_add( 1900 int unit, 1901 bcm_gport_t port, 1902 int flow_id, 1903 bcm_rsvd4_tx_flow_info_t *flow_info) 1904 { 1905 #ifdef CPRIMOD_SUPPORT 1906 portmod_rsvd4_tx_flow_info_t int_flow_info; 1907 1908 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1909 portmod_rsvd4_tx_flow_info_t_init(unit, &int_flow_info); 1910 1911 int_flow_info.packet_size = flow_info->payload_size; 1912 int_flow_info.last_packet_size = flow_info->last_payload_size; 1913 int_flow_info.last_packet_num = flow_info->last_index ; 1914 1915 int_flow_info.axc_id = flow_info->axc_id; 1916 int_flow_info.stuffing_cnt = flow_info->stuffing_count ; 1917 int_flow_info.msg_ts_mode = flow_info->msg_ts_mode; 1918 int_flow_info.msg_ts_count = flow_info-> msg_ts_count; 1919 int_flow_info.master_frame_offset = flow_info->master_frame_offset; 1920 int_flow_info.message_number_offset = flow_info->message_number_offset; 1921 int_flow_info.container_block_count = flow_info->container_blk_count; 1922 int_flow_info.buffer_size = flow_info->buffer_size ; 1923 int_flow_info.cycle_size = flow_info->cycle_size ; 1924 int_flow_info.use_ts_dbm = flow_info->secondary_dbm_enable; 1925 int_flow_info.ts_dbm_profile_num = flow_info->index_to_secondary_dbm; /* secondary dbm profile num. */ 1926 int_flow_info.num_active_slot = flow_info->num_active_slot; 1927 int_flow_info.msg_addr = flow_info->message_addr; 1928 int_flow_info.msg_type = flow_info->message_type; 1929 int_flow_info.msg_ts_offset = flow_info->msg_ts_offset; 1930 int_flow_info.pad_size = flow_info->pad_size ; 1931 int_flow_info.extra_pad_size = flow_info->extra_pad_size ; 1932 int_flow_info.pad_enable = flow_info->pad_enable; 1933 int_flow_info.control_location = flow_info->gsm_ctrl_loc ; 1934 int_flow_info.frame_sync_mode = flow_info->sync_mode; 1935 1936 BCM_IF_ERROR_RETURN 1937 (portmod_cpri_port_rsvd4_tx_flow_add(unit, port, flow_id, &int_flow_info)); 1938 return BCM_E_NONE; 1939 #else 1940 return BCM_E_UNAVAIL; 1941 #endif 1942 } 1943 1944 int 1945 bcm_esw_cpri_port_rsvd4_tx_flow_delete( 1946 int unit, 1947 bcm_gport_t port, 1948 int flow_id) 1949 { 1950 #ifdef CPRIMOD_SUPPORT 1951 1952 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1953 1954 BCM_IF_ERROR_RETURN 1955 (portmod_cpri_port_rsvd4_tx_flow_delete(unit, port, flow_id)); 1956 return BCM_E_NONE; 1957 #else 1958 return BCM_E_UNAVAIL; 1959 #endif 1960 1961 } 1962 1963 int 1964 bcm_esw_cpri_port_rsvd4_tx_modulo_rule_entry_set( 1965 int unit, 1966 bcm_gport_t port, 1967 uint32 modulo_rule_num, 1968 bcm_cpri_tx_rule_type_t modulo_rule_type, 1969 bcm_cpri_modulo_rule_entry_t* modulo_rule) 1970 1971 { 1972 #ifdef CPRIMOD_SUPPORT 1973 cprimod_modulo_rule_entry_t mod_rule; 1974 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 1975 cprimod_modulo_rule_entry_t_init(&mod_rule); 1976 1977 mod_rule.active = modulo_rule->active; 1978 mod_rule.modulo_value = modulo_rule->modulo_value; 1979 mod_rule.modulo_index = modulo_rule->modulo_index; 1980 mod_rule.dbm_enable = modulo_rule->dbm_enable; 1981 mod_rule.flow_dbm_id = modulo_rule->dbm_dbm_id; 1982 mod_rule.flow_type = modulo_rule->flow_type; 1983 1984 BCM_IF_ERROR_RETURN 1985 (portmod_cpri_port_rsvd4_modulo_rule_entry_set(unit, port, modulo_rule_num, modulo_rule_type, &mod_rule)); 1986 return BCM_E_NONE; 1987 #else 1988 return BCM_E_UNAVAIL; 1989 #endif 1990 } 1991 1992 int 1993 bcm_esw_cpri_port_rsvd4_tx_modulo_rule_entry_get( 1994 int unit, 1995 bcm_gport_t port, 1996 uint32 modulo_rule_num, 1997 bcm_cpri_tx_rule_type_t modulo_rule_type, 1998 bcm_cpri_modulo_rule_entry_t* modulo_rule) 1999 2000 { 2001 #ifdef CPRIMOD_SUPPORT 2002 cprimod_modulo_rule_entry_t mod_rule; 2003 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2004 cprimod_modulo_rule_entry_t_init(&mod_rule); 2005 BCM_IF_ERROR_RETURN 2006 (portmod_cpri_port_rsvd4_modulo_rule_entry_get(unit, port, modulo_rule_num, modulo_rule_type, &mod_rule)); 2007 modulo_rule->active = mod_rule.active; 2008 modulo_rule->modulo_value = mod_rule.modulo_value; 2009 modulo_rule->modulo_index = mod_rule.modulo_index; 2010 modulo_rule->dbm_enable = mod_rule.dbm_enable; 2011 modulo_rule->dbm_dbm_id = mod_rule.flow_dbm_id ; 2012 modulo_rule->flow_type = mod_rule.flow_type; 2013 return BCM_E_NONE; 2014 #else 2015 return BCM_E_UNAVAIL; 2016 #endif 2017 } 2018 2019 int 2020 bcm_esw_cpri_port_rsvd4_tx_position_entry_set( 2021 int unit, 2022 bcm_gport_t port, 2023 uint32 pos_index, 2024 bcm_cpri_dbm_position_entry_t* pos_entry) 2025 2026 { 2027 #ifdef CPRIMOD_SUPPORT 2028 cprimod_dbm_pos_table_entry_t position_entry; 2029 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2030 cprimod_dbm_pos_table_entry_t_init(&position_entry); 2031 2032 position_entry.valid = pos_entry->valid; 2033 position_entry.flow_id = pos_entry->flow_id; 2034 position_entry.flow_type = pos_entry->flow_type; 2035 position_entry.index = pos_entry->index; 2036 2037 BCM_IF_ERROR_RETURN 2038 (portmod_cpri_port_rsvd4_dbm_position_entry_set(unit, port, pos_index, &position_entry)); 2039 return BCM_E_NONE; 2040 #else 2041 return BCM_E_UNAVAIL; 2042 #endif 2043 } 2044 2045 int 2046 bcm_esw_cpri_port_rsvd4_tx_position_entry_get( 2047 int unit, 2048 bcm_gport_t port, 2049 uint32 pos_index, 2050 bcm_cpri_dbm_position_entry_t* pos_entry) 2051 2052 { 2053 #ifdef CPRIMOD_SUPPORT 2054 cprimod_dbm_pos_table_entry_t position_entry; 2055 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2056 cprimod_dbm_pos_table_entry_t_init(&position_entry); 2057 2058 BCM_IF_ERROR_RETURN 2059 (portmod_cpri_port_rsvd4_dbm_position_entry_get(unit, port, pos_index, &position_entry)); 2060 2061 pos_entry->valid = position_entry.valid; 2062 pos_entry->flow_id = position_entry.flow_id; 2063 pos_entry->flow_type = position_entry.flow_type; 2064 pos_entry->index = position_entry.index; 2065 2066 return BCM_E_NONE; 2067 #else 2068 return BCM_E_UNAVAIL; 2069 #endif 2070 } 2071 2072 int 2073 bcm_esw_cpri_port_rsvd4_tx_frame_config_debug_set( 2074 int unit, 2075 bcm_gport_t port, 2076 bcm_rsvd4_tx_config_t config_type, 2077 uint32 value) 2078 { 2079 #ifdef CPRIMOD_SUPPORT 2080 cprimod_rsvd4_tx_config_field_t field; 2081 2082 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2083 switch (config_type) { 2084 case bcmRsvd4TxConfigForceOffState: 2085 field = cprimodRsvd4TxConfigForceOffState; 2086 break; 2087 case bcmRsvd4TxConfigAckT: 2088 field = cprimodRsvd4TxConfigAckT; 2089 break; 2090 case bcmRsvd4TxConfigForceIdleAck: 2091 field = cprimodRsvd4TxConfigForceIdleAck; 2092 break; 2093 case bcmRsvd4TxConfigLosEnable: 2094 field = cprimodRsvd4TxConfigLosEnable; 2095 break; 2096 case bcmRsvd4TxConfigScrambleEnable: 2097 field = cprimodRsvd4TxConfigScrambleEnable; 2098 break; 2099 case bcmRsvd4TxConfigTransmitterEnable: 2100 field = cprimodRsvd4TxConfigTransmitterEnable; 2101 break; 2102 default: 2103 field = cprimodRsvd4TxConfigForceOffState; 2104 break; 2105 } 2106 BCM_IF_ERROR_RETURN(portmod_port_rsvd4_tx_frame_optional_config_set(unit, 2107 port, 2108 field, 2109 value)); 2110 return BCM_E_NONE; 2111 #else 2112 return BCM_E_UNAVAIL; 2113 #endif 2114 } 2115 2116 int 2117 bcm_esw_cpri_port_rsvd4_tx_frame_config_set( 2118 int unit, 2119 bcm_gport_t port, 2120 bcm_rsvd4_tx_frame_config_t *config) 2121 { 2122 #ifdef CPRIMOD_SUPPORT 2123 cprimod_port_rsvd4_speed_mult_t speed = cprimodRsvd4SpdMultCount; 2124 2125 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2126 if(config->speed_multiple == 4) { 2127 speed = cprimodRsvd4SpdMult4X; 2128 } else if(config->speed_multiple == 8) { 2129 speed = cprimodRsvd4SpdMult8X; 2130 } 2131 2132 BCM_IF_ERROR_RETURN(portmod_port_rsvd4_tx_speed_set(unit, port, speed)); 2133 BCM_IF_ERROR_RETURN(portmod_port_rsvd4_tx_frame_optional_config_set(unit, 2134 port, 2135 cprimodRsvd4TxConfigScramblerSeed, 2136 config->rsvd4_scrambler_seed)); 2137 BCM_IF_ERROR_RETURN(portmod_port_rsvd4_tx_frame_optional_config_set(unit, 2138 port, 2139 cprimodRsvd4TxConfigLosEnable, 2140 config->los_enable)); 2141 return BCM_E_NONE; 2142 #else 2143 return BCM_E_UNAVAIL; 2144 #endif 2145 } 2146 2147 int 2148 bcm_esw_cpri_port_rsvd4_tx_frame_config_get( 2149 int unit, 2150 bcm_gport_t port, 2151 bcm_rsvd4_tx_frame_config_t *config) 2152 { 2153 #ifdef CPRIMOD_SUPPORT 2154 cprimod_port_rsvd4_speed_mult_t speed = cprimodRsvd4SpdMultCount; 2155 int scrambler_seed =0; 2156 int los_enable =0; 2157 2158 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2159 2160 BCM_IF_ERROR_RETURN(portmod_port_rsvd4_tx_speed_get(unit, port, &speed)); 2161 2162 if (speed == cprimodRsvd4SpdMult4X) { 2163 config->speed_multiple = 4; 2164 } else if (speed == cprimodRsvd4SpdMult8X) { 2165 config->speed_multiple = 8; 2166 } 2167 2168 BCM_IF_ERROR_RETURN(portmod_port_rsvd4_tx_frame_optional_config_get(unit, 2169 port, 2170 cprimodRsvd4TxConfigScramblerSeed, 2171 &scrambler_seed)); 2172 config->rsvd4_scrambler_seed = scrambler_seed; 2173 BCM_IF_ERROR_RETURN(portmod_port_rsvd4_tx_frame_optional_config_get(unit, 2174 port, 2175 cprimodRsvd4TxConfigLosEnable, 2176 &los_enable)); 2177 config->los_enable = los_enable; 2178 return BCM_E_NONE; 2179 #else 2180 return BCM_E_UNAVAIL; 2181 #endif 2182 } 2183 2184 int 2185 bcm_esw_cpri_port_rsvd4_tx_override_set( 2186 int unit, 2187 bcm_gport_t port, 2188 bcm_rsvd4_tx_params_t parameter, 2189 int enable, 2190 int value) 2191 { 2192 #ifdef CPRIMOD_SUPPORT 2193 cprimod_rsvd4_tx_overide_t parameter_t; 2194 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2195 switch (parameter) { 2196 case bcmRsvd4TxParams_StartTx: 2197 parameter_t = cprimodRsvd4TxOverideStartTx; 2198 break; 2199 case bcmRsvd4TxParams_PCS_Ack_CAP: 2200 parameter_t = cprimodRsvd4TxOverideRxPcsAckCap; 2201 break; 2202 case bcmRsvd4TxParams_PCS_Idle_REQ: 2203 parameter_t = cprimodRsvd4TxOverideRxPcsIdleReq; 2204 break; 2205 case bcmRsvd4TxParams_PCS_SCR_Lock: 2206 parameter_t = cprimodRsvd4TxOverideRxPcsScrLock; 2207 break; 2208 case bcmRsvd4TxParams_LOS_Status: 2209 parameter_t = cprimodRsvd4TxOverideLosStauts; 2210 break; 2211 default: 2212 parameter_t = cprimodRsvd4TxOverideStartTx; 2213 break; 2214 } 2215 BCM_IF_ERROR_RETURN(portmod_cpri_port_rsvd4_tx_override_set(unit, port, 2216 parameter_t, 2217 enable, 2218 value)); 2219 2220 return BCM_E_NONE; 2221 #else 2222 return BCM_E_UNAVAIL; 2223 #endif 2224 } 2225 2226 int 2227 bcm_esw_cpri_port_rsvd4_tx_fsm_state_set( 2228 int unit, 2229 bcm_gport_t port, 2230 bcm_rsvd4_tx_fsm_state_t state) 2231 { 2232 #ifdef CPRIMOD_SUPPORT 2233 cprimod_rsvd4_tx_fsm_state_t state_t; 2234 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2235 switch (state) { 2236 case bcmRsvd4TxFsmStateOff: 2237 state_t = cprimodRsvd4TxFsmStateOff; 2238 break; 2239 case bcmRsvd4TxFsmStateIdle: 2240 state_t = cprimodRsvd4TxFsmStateIdle; 2241 break; 2242 case bcmRsvd4TxFsmStateIdleReq: 2243 state_t = cprimodRsvd4TxFsmStateIdleReq; 2244 break; 2245 case bcmRsvd4TxFsmStateIdleAck: 2246 state_t = cprimodRsvd4TxFsmStateIdleAck; 2247 break; 2248 case bcmRsvd4TxFsmStateFrameTx: 2249 state_t = cprimodRsvd4TxFsmStateFrameTx; 2250 break; 2251 default: 2252 state_t = cprimodRsvd4TxFsmStateOff; 2253 break; 2254 } 2255 BCM_IF_ERROR_RETURN(portmod_cpri_port_rsvd4_tx_fsm_state_set(unit, port, 2256 state_t)); 2257 return BCM_E_NONE; 2258 #else 2259 return BCM_E_UNAVAIL; 2260 #endif 2261 } 2262 2263 int 2264 bcm_esw_cpri_port_rx_axc_frame_add( 2265 int unit, 2266 bcm_gport_t port, 2267 int axc_id, 2268 bcm_cpri_axc_frame_info_t *axc_info) 2269 { 2270 #ifdef CPRIMOD_SUPPORT 2271 portmod_cpri_axc_frame_info_t axc_info_t; 2272 portmod_cpri_rx_agnostic_config_info_t agnostic_config; 2273 int agnostic_enable; 2274 2275 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2276 2277 BCM_IF_ERROR_RETURN 2278 (portmod_cpri_port_rx_agnostic_config_get(unit, port, 2279 &agnostic_enable, 2280 &agnostic_config)); 2281 2282 if (agnostic_enable) { 2283 LOG_ERROR(BSL_LS_BCM_PORT, 2284 (BSL_META("AxC cannot added while Agnostic Mode is Enabled.\n"))); 2285 return BCM_E_CONFIG; 2286 } 2287 2288 BCM_IF_ERROR_RETURN 2289 (_bcm_cpri_axc_frame_info_t_to_portmod_cpri_axc_frame_info_t(axc_id, 2290 BCM_CPRI_DIR_RX, 2291 axc_info, 2292 &axc_info_t)); 2293 BCM_IF_ERROR_RETURN(portmod_cpri_port_rx_axc_frame_add(unit, port, axc_id, 2294 &axc_info_t)); 2295 2296 return BCM_E_NONE; 2297 #else 2298 return BCM_E_UNAVAIL; 2299 #endif 2300 } 2301 2302 int 2303 bcm_esw_cpri_port_rx_axc_frame_delete( 2304 int unit, 2305 bcm_gport_t port, 2306 int axc_id) 2307 { 2308 #ifdef CPRIMOD_SUPPORT 2309 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2310 BCM_IF_ERROR_RETURN(portmod_cpri_port_rx_axc_frame_delete(unit, port, 2311 axc_id)); 2312 return BCM_E_NONE; 2313 #else 2314 return BCM_E_UNAVAIL; 2315 #endif 2316 } 2317 2318 int 2319 bcm_esw_cpri_port_rx_axc_frame_get( 2320 int unit, 2321 bcm_gport_t port, 2322 int axc_id, 2323 bcm_cpri_axc_frame_info_t *axc_info) 2324 { 2325 #ifdef CPRIMOD_SUPPORT 2326 portmod_cpri_axc_frame_info_t axc_info_t; 2327 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2328 BCM_IF_ERROR_RETURN(portmod_cpri_port_rx_axc_frame_get(unit, port, axc_id, 2329 0, &axc_info_t)); 2330 _portmod_cpri_axc_frame_info_t_to_bcm_cpri_axc_frame_info_t(BCM_CPRI_DIR_RX, &axc_info_t, axc_info); 2331 axc_info->axc_id = axc_id; 2332 2333 return BCM_E_NONE; 2334 #else 2335 return BCM_E_UNAVAIL; 2336 #endif 2337 } 2338 2339 int 2340 bcm_esw_cpri_port_rx_axc_frame_get_all( 2341 int unit, 2342 bcm_gport_t port, 2343 int max_count, 2344 bcm_cpri_axc_frame_info_t *axc_info_list, 2345 int *axc_count) 2346 { 2347 #ifdef CPRIMOD_SUPPORT 2348 int i; 2349 int tbl_entry; 2350 portmod_cpri_axc_frame_info_t axc_info_t; 2351 2352 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2353 *axc_count = 0; 2354 tbl_entry=0; 2355 for (i=0; i<max_count && tbl_entry<MAX_NUM_OF_DATA_AXCS;) { 2356 BCM_IF_ERROR_RETURN(portmod_cpri_port_rx_axc_frame_get(unit, port, 2357 tbl_entry, 2358 1, 2359 &axc_info_t)); 2360 if (axc_info_t.start_bit != 0 && axc_info_t.num_bits != 0) { 2361 _portmod_cpri_axc_frame_info_t_to_bcm_cpri_axc_frame_info_t(BCM_CPRI_DIR_RX, &axc_info_t, 2362 axc_info_list); 2363 axc_info_list->axc_id = tbl_entry; 2364 axc_info_list++; 2365 ++(*axc_count); 2366 i++; 2367 } 2368 tbl_entry++; 2369 } 2370 2371 return BCM_E_NONE; 2372 #else 2373 return BCM_E_UNAVAIL; 2374 #endif 2375 } 2376 2377 int 2378 bcm_esw_cpri_port_rx_speed_get( 2379 int unit, 2380 bcm_gport_t port, 2381 bcm_cpri_port_type_t *port_type, 2382 bcm_cpri_port_speed_t *speed) 2383 { 2384 #ifdef CPRIMOD_SUPPORT 2385 portmod_port_interface_config_t config; 2386 2387 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2388 BCM_IF_ERROR_RETURN(portmod_port_interface_config_get(unit, port, &config, 2389 PORTMOD_INIT_F_RX_ONLY)); 2390 *speed = _int_to_bcm_cpri_port_speed_t(config.speed); 2391 *port_type = bcmCpriPortTypeCpri; 2392 2393 return BCM_E_NONE; 2394 #else 2395 return BCM_E_UNAVAIL; 2396 #endif 2397 } 2398 2399 int 2400 bcm_esw_cpri_port_rx_speed_set( 2401 int unit, 2402 bcm_gport_t port, 2403 bcm_cpri_port_type_t port_type, 2404 bcm_cpri_port_speed_t speed) 2405 { 2406 #ifdef CPRIMOD_SUPPORT 2407 portmod_port_interface_config_t config; 2408 2409 if (port_type != bcmCpriPortTypeCpri) { 2410 return BCM_E_PARAM; 2411 } 2412 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2413 config.speed = _bcm_cpri_port_speed_t_to_int(speed); 2414 config.encap_mode = _SHR_PORT_ENCAP_CPRI; 2415 BCM_IF_ERROR_RETURN(portmod_port_interface_config_set(unit, port, &config, 2416 PORTMOD_INIT_F_RX_ONLY)); 2417 2418 return BCM_E_NONE; 2419 #else 2420 return BCM_E_UNAVAIL; 2421 #endif 2422 } 2423 2424 int 2425 bcm_esw_cpri_port_stage_activate( 2426 int unit, 2427 bcm_gport_t port, 2428 bcm_cpri_stage_t stage) 2429 { 2430 #ifdef CPRIMOD_SUPPORT 2431 portmod_cpri_stage_t stage_t; 2432 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2433 switch (stage) { 2434 case bcmCpriStageRxParser: 2435 stage_t = portmodCpriStageRx; 2436 break; 2437 case bcmCpriStageTxAssembler: 2438 stage_t = portmodCpriStageTx; 2439 break; 2440 default: 2441 stage_t = portmodCpriStageRx; 2442 break; 2443 } 2444 BCM_IF_ERROR_RETURN(portmod_cpri_port_stage_activate(unit, port, stage_t)); 2445 2446 return BCM_E_NONE; 2447 #else 2448 return BCM_E_UNAVAIL; 2449 #endif 2450 } 2451 2452 int 2453 bcm_esw_cpri_port_tx_axc_frame_add( 2454 int unit, 2455 bcm_gport_t port, 2456 int axc_id, 2457 bcm_cpri_axc_frame_info_t *axc_info) 2458 { 2459 #ifdef CPRIMOD_SUPPORT 2460 portmod_cpri_axc_frame_info_t axc_info_t; 2461 portmod_cpri_tx_agnostic_config_info_t agnostic_config; 2462 int agnostic_enable; 2463 2464 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2465 2466 BCM_IF_ERROR_RETURN 2467 (portmod_cpri_port_tx_agnostic_config_get(unit, port, 2468 &agnostic_enable, 2469 &agnostic_config)); 2470 2471 if (agnostic_enable) { 2472 LOG_ERROR(BSL_LS_BCM_PORT, 2473 (BSL_META("AxC cannot added while Agnostic Mode is Enabled.\n"))); 2474 return BCM_E_CONFIG; 2475 } 2476 2477 BCM_IF_ERROR_RETURN 2478 (_bcm_cpri_axc_frame_info_t_to_portmod_cpri_axc_frame_info_t(axc_id, 2479 BCM_CPRI_DIR_TX, 2480 axc_info, 2481 &axc_info_t)); 2482 BCM_IF_ERROR_RETURN(portmod_cpri_port_tx_axc_frame_add(unit, port, axc_id, 2483 &axc_info_t)); 2484 2485 return BCM_E_NONE; 2486 #else 2487 return BCM_E_UNAVAIL; 2488 #endif 2489 } 2490 2491 int 2492 bcm_esw_cpri_port_tx_axc_frame_delete( 2493 int unit, 2494 bcm_gport_t port, 2495 int axc_id) 2496 { 2497 #ifdef CPRIMOD_SUPPORT 2498 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2499 BCM_IF_ERROR_RETURN(portmod_cpri_port_tx_axc_frame_delete(unit, port, 2500 axc_id)); 2501 return BCM_E_NONE; 2502 #else 2503 return BCM_E_UNAVAIL; 2504 #endif 2505 } 2506 2507 int 2508 bcm_esw_cpri_port_tx_axc_frame_get( 2509 int unit, 2510 bcm_gport_t port, 2511 int axc_id, 2512 bcm_cpri_axc_frame_info_t *axc_info) 2513 { 2514 #ifdef CPRIMOD_SUPPORT 2515 portmod_cpri_axc_frame_info_t axc_info_t; 2516 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2517 BCM_IF_ERROR_RETURN(portmod_cpri_port_tx_axc_frame_get(unit, port, axc_id, 2518 0, &axc_info_t)); 2519 _portmod_cpri_axc_frame_info_t_to_bcm_cpri_axc_frame_info_t(BCM_CPRI_DIR_TX, &axc_info_t, axc_info); 2520 axc_info->axc_id = axc_id; 2521 2522 return BCM_E_NONE; 2523 #else 2524 return BCM_E_UNAVAIL; 2525 #endif 2526 } 2527 2528 int 2529 bcm_esw_cpri_port_tx_axc_frame_get_all( 2530 int unit, 2531 bcm_gport_t port, 2532 int max_count, 2533 bcm_cpri_axc_frame_info_t *axc_info_list, 2534 int *axc_count) 2535 { 2536 #ifdef CPRIMOD_SUPPORT 2537 int i; 2538 int tbl_entry; 2539 portmod_cpri_axc_frame_info_t axc_info_t; 2540 2541 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2542 *axc_count = 0; 2543 tbl_entry=0; 2544 for (i=0; i<max_count && tbl_entry<MAX_NUM_OF_DATA_AXCS;) { 2545 BCM_IF_ERROR_RETURN(portmod_cpri_port_tx_axc_frame_get(unit, port, 2546 tbl_entry, 2547 1, 2548 &axc_info_t)); 2549 if (axc_info_t.start_bit != 0 && axc_info_t.num_bits != 0) { 2550 _portmod_cpri_axc_frame_info_t_to_bcm_cpri_axc_frame_info_t(BCM_CPRI_DIR_TX, &axc_info_t, 2551 axc_info_list); 2552 axc_info_list->axc_id = tbl_entry; 2553 axc_info_list++; 2554 ++(*axc_count); 2555 i++; 2556 } 2557 tbl_entry++; 2558 } 2559 2560 return BCM_E_NONE; 2561 #else 2562 return BCM_E_UNAVAIL; 2563 #endif 2564 } 2565 2566 int 2567 bcm_esw_cpri_port_tx_frame_tgen_config_set( 2568 int unit, 2569 bcm_gport_t port, 2570 int enable, 2571 bcm_cpri_tx_frame_tgen_config_t *tgen_config) 2572 { 2573 #ifdef CPRIMOD_SUPPORT 2574 2575 portmod_tx_frame_tgen_config_t tgen_cfg_t; 2576 2577 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2578 if (enable) { 2579 tgen_cfg_t.tx_tgen_hfn = tgen_config->tx_tgen_hfn ; 2580 tgen_cfg_t.tx_tgen_bfn = tgen_config->tx_tgen_bfn; 2581 tgen_cfg_t.tx_gen_bfn_hfn_sel = tgen_config->tx_tgen_bfn_sel; 2582 COMPILER_64_COPY(tgen_cfg_t.tx_tgen_ts_offset, tgen_config->tx_tgen_ts_offset); 2583 BCM_IF_ERROR_RETURN 2584 (portmod_cpri_port_tx_frame_tgen_config_set(unit, port, &tgen_cfg_t)); 2585 } 2586 2587 BCM_IF_ERROR_RETURN 2588 (portmod_cpri_port_tx_frame_tgen_enable(unit, port, enable)); 2589 return BCM_E_NONE; 2590 #else 2591 return BCM_E_UNAVAIL; 2592 #endif 2593 } 2594 2595 int 2596 bcm_esw_cpri_port_tx_speed_get( 2597 int unit, 2598 bcm_gport_t port, 2599 bcm_cpri_port_type_t *port_type, 2600 bcm_cpri_port_speed_t *speed) 2601 { 2602 #ifdef CPRIMOD_SUPPORT 2603 portmod_port_interface_config_t config; 2604 2605 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2606 BCM_IF_ERROR_RETURN(portmod_port_interface_config_get(unit, port, &config, 2607 PORTMOD_INIT_F_TX_ONLY)); 2608 *speed = _int_to_bcm_cpri_port_speed_t(config.speed); 2609 *port_type = bcmCpriPortTypeCpri; 2610 return BCM_E_NONE; 2611 #else 2612 return BCM_E_UNAVAIL; 2613 #endif 2614 } 2615 2616 int 2617 bcm_esw_cpri_port_tx_speed_set( 2618 int unit, 2619 bcm_gport_t port, 2620 bcm_cpri_port_type_t port_type, 2621 bcm_cpri_port_speed_t speed) 2622 { 2623 #ifdef CPRIMOD_SUPPORT 2624 portmod_port_interface_config_t config; 2625 2626 if (port_type != bcmCpriPortTypeCpri) { 2627 return BCM_E_PARAM; 2628 } 2629 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2630 config.speed = _bcm_cpri_port_speed_t_to_int(speed); 2631 config.encap_mode = _SHR_PORT_ENCAP_CPRI; 2632 BCM_IF_ERROR_RETURN(portmod_port_interface_config_set(unit, port, &config, 2633 PORTMOD_INIT_F_TX_ONLY)); 2634 2635 return BCM_E_NONE; 2636 #else 2637 return BCM_E_UNAVAIL; 2638 #endif 2639 } 2640 2641 /* Add control message flow. */ 2642 int bcm_esw_cpri_port_rsvd4_rx_control_flow_add( 2643 int unit, 2644 int port, 2645 int control_flow_id, 2646 bcm_rsvd4_control_flow_config_t *config) 2647 { 2648 #ifdef CPRIMOD_SUPPORT 2649 portmod_control_flow_config_t portmod_config; 2650 2651 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2652 2653 portmod_control_flow_config_t_init(unit, &portmod_config); 2654 2655 portmod_config.match_mask = config->match_mask ; 2656 portmod_config.match_data = config->match_data ; 2657 portmod_config.proc_type = config->type ; 2658 portmod_config.queue_num = config->queue_num ; 2659 portmod_config.sync_profile = config->sync_profile ; 2660 portmod_config.sync_enable = config->sync_en ; 2661 portmod_config.priority = config->priority ; 2662 portmod_config.queue_size = config->queue_size ; 2663 2664 BCM_IF_ERROR_RETURN 2665 (portmod_rsvd4_rx_control_flow_add(unit, port, control_flow_id, &portmod_config)); 2666 2667 return BCM_E_NONE; 2668 #else 2669 return BCM_E_UNAVAIL; 2670 #endif 2671 } 2672 2673 /* Delete control message flow. */ 2674 int bcm_esw_cpri_port_rsvd4_rx_control_flow_delete( 2675 int unit, 2676 int port, 2677 int control_flow_id, 2678 bcm_rsvd4_control_flow_config_t *control_flow_cfg) 2679 { 2680 2681 #ifdef CPRIMOD_SUPPORT 2682 portmod_control_flow_config_t portmod_config; 2683 2684 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2685 2686 portmod_control_flow_config_t_init(unit, &portmod_config); 2687 2688 portmod_config.match_mask = control_flow_cfg->match_mask ; 2689 portmod_config.match_data = control_flow_cfg->match_data ; 2690 portmod_config.proc_type = control_flow_cfg->type ; 2691 portmod_config.queue_num = control_flow_cfg->queue_num ; 2692 2693 BCM_IF_ERROR_RETURN 2694 (portmod_rsvd4_rx_control_flow_delete(unit, port, control_flow_id, &portmod_config)); 2695 return BCM_E_NONE; 2696 #else 2697 return BCM_E_UNAVAIL; 2698 #endif 2699 } 2700 2701 /* Setup the fast ethernet control flow. */ 2702 int bcm_esw_cpri_port_rsvd4_cm_fast_eth_config_set( 2703 int unit, 2704 int port, 2705 int control_flow_id, 2706 bcm_rsvd4_fast_eth_config_info_t *config) 2707 { 2708 #ifdef CPRIMOD_SUPPORT 2709 portmod_cpri_fast_eth_config_t int_config; 2710 2711 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2712 2713 int_config.queue_num = config->queue_num; 2714 int_config.no_fcs_err_check = config->no_fcs_err_check; 2715 int_config.min_packet_size = config->min_packet_size; 2716 int_config.max_packet_size = config->max_packet_size; 2717 int_config.min_packet_drop = config->min_packet_drop; 2718 int_config.max_packet_drop = config->max_packet_drop; 2719 int_config.strip_crc = config->strip_crc; 2720 2721 BCM_IF_ERROR_RETURN 2722 (portmod_rsvd4_fast_eth_config_set(unit, port, &int_config)); 2723 return BCM_E_NONE; 2724 #else 2725 return BCM_E_UNAVAIL; 2726 #endif 2727 } 2728 2729 /* Configure sync profile entry. */ 2730 int bcm_esw_cpri_port_rsvd4_sync_profile_entry_set( 2731 int unit, 2732 int port, 2733 int index, 2734 bcm_rsvd4_sync_profile_entry_t *config) 2735 { 2736 #ifdef CPRIMOD_SUPPORT 2737 portmod_sync_profile_entry_t entry; 2738 2739 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2740 2741 portmod_sync_profile_entry_t_init(unit, &entry); 2742 entry.count_cycle = config->count_cycle; 2743 entry.message_offset = config->message_offset; 2744 entry.master_frame_offset = config->master_frame_offset; 2745 2746 BCM_IF_ERROR_RETURN 2747 (portmod_rsvd4_rx_sync_profile_entry_set(unit, port, index, &entry)); 2748 2749 return BCM_E_NONE; 2750 #else 2751 return BCM_E_UNAVAIL; 2752 #endif 2753 } 2754 2755 /* Retrieve sync profile entry. */ 2756 int bcm_esw_cpri_port_rsvd4_sync_profile_entry_get( 2757 int unit, 2758 int port, 2759 int index, 2760 bcm_rsvd4_sync_profile_entry_t *config) 2761 { 2762 #ifdef CPRIMOD_SUPPORT 2763 portmod_sync_profile_entry_t entry; 2764 2765 portmod_sync_profile_entry_t_init(unit, &entry); 2766 2767 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2768 2769 BCM_IF_ERROR_RETURN 2770 (portmod_rsvd4_rx_sync_profile_entry_get(unit, port, index, &entry)); 2771 2772 config->count_cycle = entry.count_cycle; 2773 config->message_offset = entry.message_offset; 2774 config->master_frame_offset = entry.master_frame_offset; 2775 2776 return BCM_E_NONE; 2777 #else 2778 return BCM_E_UNAVAIL; 2779 #endif 2780 } 2781 2782 int bcm_esw_cpri_port_rsvd4_tx_control_flow_group_member_add( 2783 int unit, 2784 int port, 2785 bcm_rsvd4_control_group_id_t group_num, 2786 bcm_rsvd4_tx_control_flow_group_config_t *config) 2787 { 2788 #ifdef CPRIMOD_SUPPORT 2789 2790 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2791 2792 BCM_IF_ERROR_RETURN 2793 (portmod_rsvd4_tx_control_flow_group_member_add(unit, port, group_num, config->priority, config->queue_num, config->type)); 2794 return BCM_E_NONE; 2795 #else 2796 return BCM_E_UNAVAIL; 2797 #endif 2798 } 2799 2800 int bcm_esw_cpri_port_rsvd4_tx_control_flow_group_member_delete ( 2801 int unit, 2802 int port, 2803 bcm_rsvd4_control_group_id_t group_num, 2804 bcm_rsvd4_priority_t priority) 2805 { 2806 #ifdef CPRIMOD_SUPPORT 2807 2808 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2809 2810 BCM_IF_ERROR_RETURN 2811 (portmod_rsvd4_tx_control_flow_group_member_delete(unit, port, group_num, priority)); 2812 return BCM_E_NONE; 2813 #else 2814 return BCM_E_UNAVAIL; 2815 #endif 2816 } 2817 2818 int bcm_esw_cpri_port_rsvd4_tx_cm_eth_config_set( 2819 int unit, 2820 int port, 2821 bcm_rsvd4_tx_cm_eth_config_t *config) 2822 { 2823 #ifdef CPRIMOD_SUPPORT 2824 2825 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2826 2827 BCM_IF_ERROR_RETURN 2828 (portmod_rsvd4_tx_eth_message_config_set(unit, port, config->msg_node, config->msg_subnode, config->msg_type, config->msg_padding)); 2829 return BCM_E_NONE; 2830 #else 2831 return BCM_E_UNAVAIL; 2832 #endif 2833 } 2834 2835 int bcm_esw_cpri_port_rsvd4_tx_cm_raw_config_set( 2836 int unit, 2837 int port, 2838 bcm_rsvd4_tx_cm_raw_config_t *config) 2839 { 2840 #ifdef CPRIMOD_SUPPORT 2841 2842 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2843 2844 BCM_IF_ERROR_RETURN 2845 (portmod_rsvd4_tx_single_raw_message_config_set(unit, port, config->msg_id, config->msg_type)); 2846 return BCM_E_NONE; 2847 #else 2848 return BCM_E_UNAVAIL; 2849 #endif 2850 } 2851 2852 int bcm_esw_cpri_port_rsvd4_tx_control_flow_add( 2853 int unit, 2854 int port, 2855 int control_flow_id, 2856 bcm_rsvd4_tx_control_flow_config_t *config) 2857 { 2858 #ifdef CPRIMOD_SUPPORT 2859 portmod_rsvd4_tx_config_info_t config_info; 2860 2861 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2862 2863 portmod_rsvd4_tx_config_info_t_init(unit, &config_info); 2864 2865 config_info.proc_type = config->type; 2866 config_info.queue_num = config->queue_num; 2867 config_info.queue_size = config->queue_size; 2868 config_info.cycle_size = config->cycle_size; 2869 config_info.crc_mode = config->crc_mode; 2870 2871 2872 BCM_IF_ERROR_RETURN 2873 (portmod_rsvd4_tx_control_flow_config_set(unit, port, control_flow_id, &config_info)); 2874 return BCM_E_NONE; 2875 #else 2876 return BCM_E_UNAVAIL; 2877 #endif 2878 } 2879 2880 /* */ 2881 int bcm_esw_cpri_port_rsvd4_tx_cm_tunnel_crc_config_set( 2882 int unit, 2883 int port, 2884 bcm_rsvd4_cm_tunnel_crc_option_t crc_option) 2885 { 2886 #ifdef CPRIMOD_SUPPORT 2887 2888 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2889 2890 BCM_IF_ERROR_RETURN 2891 (portmod_rsvd4_tx_single_tunnel_message_config_set(unit, port, crc_option)); 2892 return BCM_E_NONE; 2893 #else 2894 return BCM_E_UNAVAIL; 2895 #endif 2896 } 2897 2898 int bcm_esw_cpri_port_rsvd4_tx_cm_hdr_config_entry_set( 2899 int unit, 2900 int port, 2901 int index, 2902 bcm_rsvd4_tx_cm_hdr_entry_t* entry) 2903 { 2904 #ifdef CPRIMOD_SUPPORT 2905 2906 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2907 2908 BCM_IF_ERROR_RETURN 2909 (portmod_rsvd4_tx_control_header_entry_set(unit, port, index, entry->rsvd4_header_node, 2910 entry->rsvd4_header_subnode, entry->rsvd4_control_payload_node)); 2911 return BCM_E_NONE; 2912 #else 2913 return BCM_E_UNAVAIL; 2914 #endif 2915 } 2916 2917 int bcm_esw_cpri_port_rsvd4_tx_cm_hdr_lkup_entry_set( 2918 int unit, 2919 int port, 2920 int flow_id, 2921 int header_index) 2922 { 2923 #ifdef CPRIMOD_SUPPORT 2924 2925 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2926 2927 BCM_IF_ERROR_RETURN 2928 (portmod_rsvd4_tx_control_flow_header_index_set(unit, port, flow_id, header_index)); 2929 return BCM_E_NONE; 2930 #else 2931 return BCM_E_UNAVAIL; 2932 #endif 2933 } 2934 2935 int bcm_esw_cpri_port_rx_cw_sync_info_get( 2936 int unit, 2937 int port, 2938 uint32* hyper_frame_num, 2939 uint32* radio_frame_num) 2940 { 2941 #ifdef CPRIMOD_SUPPORT 2942 2943 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2944 2945 BCM_IF_ERROR_RETURN 2946 (portmod_cpri_port_rx_cw_sync_info_get(unit, port, hyper_frame_num, radio_frame_num)); 2947 2948 return (BCM_E_NONE); 2949 #else 2950 return (BCM_E_UNAVAIL); 2951 #endif 2952 } 2953 2954 int bcm_esw_cpri_port_rx_cw_l1_signal_info_get( 2955 int unit, 2956 int port, 2957 bcm_cpri_cw_l1_protocol_info_t *l1_info) 2958 { 2959 #ifdef CPRIMOD_SUPPORT 2960 portmod_cpri_cw_l1_protocol_info_t l1_data; 2961 2962 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2963 2964 BCM_IF_ERROR_RETURN 2965 (portmod_cpri_port_rx_cw_l1_signal_info_get(unit, port, &l1_data)); 2966 2967 l1_info->protocol_ver = l1_data.protocol_ver; 2968 l1_info->hdlc_rate = l1_data.hdlc_rate; 2969 l1_info->reset = l1_data.reset; 2970 l1_info->l1_lof = l1_data.l1_lof; 2971 l1_info->l1_los = l1_data.l1_los; 2972 l1_info->l1_sdi = l1_data.l1_sdi; 2973 l1_info->l1_rai = l1_data.l1_rai; 2974 l1_info->eth_pointer = l1_data.eth_pointer; 2975 2976 return (BCM_E_NONE); 2977 #else 2978 return (BCM_E_UNAVAIL); 2979 #endif 2980 } 2981 2982 int bcm_esw_cpri_port_rx_cw_l1_signal_protection_set( 2983 int unit, 2984 int port, 2985 uint32 signal_map, 2986 uint32 enable) 2987 { 2988 #ifdef CPRIMOD_SUPPORT 2989 2990 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 2991 2992 BCM_IF_ERROR_RETURN 2993 (portmod_cpri_port_rx_cw_l1_signal_signal_protection_set(unit, port, signal_map, enable)); 2994 return (BCM_E_NONE); 2995 #else 2996 return (BCM_E_UNAVAIL); 2997 #endif 2998 } 2999 3000 int bcm_esw_cpri_port_rx_cw_l1_signal_protection_get( 3001 int unit, 3002 int port, 3003 uint32 signal_map, 3004 uint32 *enable) 3005 { 3006 #ifdef CPRIMOD_SUPPORT 3007 3008 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3009 3010 BCM_IF_ERROR_RETURN 3011 (portmod_cpri_port_rx_cw_l1_signal_signal_protection_get(unit, port, signal_map, enable)); 3012 return (BCM_E_NONE); 3013 #else 3014 return (BCM_E_UNAVAIL); 3015 #endif 3016 } 3017 3018 int bcm_esw_cpri_port_cw_slow_hdlc_config_set( 3019 int unit, 3020 int port, 3021 bcm_cpri_slow_hdlc_config_info_t *config) 3022 { 3023 #ifdef CPRIMOD_SUPPORT 3024 portmod_cpri_slow_hdlc_config_info_t portmod_config; 3025 3026 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3027 3028 portmod_cpri_slow_hdlc_config_info_t_init(unit, &portmod_config); 3029 3030 portmod_config.tx_crc_mode = config->hdlc_crc_mode; 3031 portmod_config.tx_flag_size = config->tx_flag_size; 3032 portmod_config.crc_init_val = config->crc_init_val; 3033 portmod_config.use_fe_mac = config->use_fe_mac; 3034 portmod_config.crc_byte_swap = config->crc_byte_swap; 3035 portmod_config.no_fcs_err_check = config->no_fcs_err_check; 3036 portmod_config.cw_sel = config->hdlc_cw_sel; 3037 portmod_config.cw_size = config->hdlc_cw_size; 3038 portmod_config.fcs_size = config->hdlc_fcs_size; 3039 portmod_config.runt_frame_drop = config->hdlc_run_drop; 3040 portmod_config.long_frame_drop = config->hdlc_max_drop; 3041 portmod_config.min_frame_size = config->hdlc_min_size; 3042 portmod_config.max_frame_size = config->hdlc_max_size; 3043 portmod_config.queue_num = config->hdlc_queue_num; 3044 portmod_config.priority = config->priority; 3045 portmod_config.queue_size = config->queue_size; 3046 portmod_config.cycle_size = config->cycle_size; 3047 portmod_config.buffer_size = config->buffer_size; 3048 3049 portmod_config.tx_filling_flag_pattern = config->tx_filling_pattern; 3050 3051 BCM_IF_ERROR_RETURN 3052 (portmod_cpri_port_cw_slow_hdlc_config_set(unit, port, &portmod_config)); 3053 return (BCM_E_NONE); 3054 #else 3055 return (BCM_E_UNAVAIL); 3056 #endif 3057 } 3058 3059 int bcm_esw_cpri_port_cw_slow_hdlc_config_get( 3060 int unit, 3061 int port, 3062 bcm_cpri_slow_hdlc_config_info_t *config) 3063 { 3064 #ifdef CPRIMOD_SUPPORT 3065 portmod_cpri_slow_hdlc_config_info_t portmod_config; 3066 3067 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3068 3069 portmod_cpri_slow_hdlc_config_info_t_init(unit, &portmod_config); 3070 BCM_IF_ERROR_RETURN 3071 (portmod_cpri_port_cw_slow_hdlc_config_get(unit, port, &portmod_config)); 3072 3073 config->hdlc_crc_mode = portmod_config.tx_crc_mode; 3074 config->tx_flag_size = portmod_config.tx_flag_size; 3075 config->crc_init_val = portmod_config.crc_init_val; 3076 config->use_fe_mac = portmod_config.use_fe_mac; 3077 config->crc_byte_swap = portmod_config.crc_byte_swap; 3078 config->no_fcs_err_check = portmod_config.no_fcs_err_check; 3079 config->hdlc_cw_sel = portmod_config.cw_sel; 3080 config->hdlc_cw_size = portmod_config.cw_size; 3081 config->hdlc_fcs_size = portmod_config.fcs_size; 3082 config->hdlc_run_drop = portmod_config.runt_frame_drop; 3083 config->hdlc_max_drop = portmod_config.long_frame_drop; 3084 config->hdlc_min_size = portmod_config.min_frame_size; 3085 config->hdlc_max_size = portmod_config.max_frame_size; 3086 config->hdlc_queue_num = portmod_config.queue_num; 3087 config->priority = portmod_config.priority; 3088 config->queue_size = portmod_config.queue_size; 3089 config->cycle_size = portmod_config.cycle_size; 3090 config->buffer_size = portmod_config.buffer_size; 3091 3092 config->tx_filling_pattern = portmod_config.tx_filling_flag_pattern; 3093 3094 return (BCM_E_NONE); 3095 #else 3096 return (BCM_E_UNAVAIL); 3097 #endif 3098 } 3099 3100 int bcm_esw_cpri_port_cw_fast_eth_config_set( 3101 int unit, 3102 int port, 3103 bcm_cpri_fast_eth_config_info_t *config) 3104 { 3105 #ifdef CPRIMOD_SUPPORT 3106 portmod_cpri_fast_eth_config_info_t portmod_config; 3107 3108 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3109 3110 portmod_cpri_fast_eth_config_info_t_init(unit, &portmod_config); 3111 3112 portmod_config.tx_crc_mode = config->crc_mode; 3113 portmod_config.schan_start = config->sub_channel_start; 3114 portmod_config.schan_size = config->sub_channel_size; 3115 portmod_config.cw_sel = config->cw_sel; 3116 portmod_config.cw_size = config->cw_size; 3117 portmod_config.min_packet_size = config->min_pkt_size; 3118 portmod_config.max_packet_size = config->max_pkt_size; 3119 portmod_config.min_packet_drop = config->drop_min_pkt_size; 3120 portmod_config.max_packet_drop = config->drop_max_pkt_size; 3121 portmod_config.strip_crc = config->strip_crc; 3122 portmod_config.min_ipg = config->min_ipg; 3123 portmod_config.queue_num = config->queue_num; 3124 portmod_config.priority = config->priority; 3125 portmod_config.queue_size = config->queue_size; 3126 portmod_config.cycle_size = config->cycle_size; 3127 portmod_config.buffer_size = config->buffer_size; 3128 portmod_config.no_fcs_err_check = config->ignore_fcs_err; 3129 3130 BCM_IF_ERROR_RETURN 3131 (portmod_cpri_port_cw_fast_eth_config_set(unit, port, &portmod_config)); 3132 3133 return (BCM_E_NONE); 3134 #else 3135 return (BCM_E_UNAVAIL); 3136 #endif 3137 } 3138 3139 int bcm_esw_cpri_port_cw_fast_eth_config_get( 3140 int unit, 3141 int port, 3142 bcm_cpri_fast_eth_config_info_t *config) 3143 { 3144 #ifdef CPRIMOD_SUPPORT 3145 portmod_cpri_fast_eth_config_info_t portmod_config; 3146 3147 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3148 3149 portmod_cpri_fast_eth_config_info_t_init(unit, &portmod_config); 3150 3151 BCM_IF_ERROR_RETURN 3152 (portmod_cpri_port_cw_fast_eth_config_get(unit, port, &portmod_config)); 3153 3154 config->crc_mode = portmod_config.tx_crc_mode; 3155 config->sub_channel_start = portmod_config.schan_start; 3156 config->sub_channel_size = portmod_config.schan_size; 3157 config->cw_sel = portmod_config.cw_sel; 3158 config->cw_size = portmod_config.cw_size; 3159 config->min_pkt_size = portmod_config.min_packet_size; 3160 config->max_pkt_size = portmod_config.max_packet_size; 3161 config->drop_min_pkt_size = portmod_config.min_packet_drop; 3162 config->drop_max_pkt_size = portmod_config.max_packet_drop; 3163 config->strip_crc = portmod_config.strip_crc; 3164 config->min_ipg = portmod_config.min_ipg; 3165 config->queue_num = portmod_config.queue_num; 3166 config->priority = portmod_config.priority; 3167 config->queue_size = portmod_config.queue_size; 3168 config->cycle_size = portmod_config.cycle_size; 3169 config->buffer_size = portmod_config.buffer_size; 3170 config->ignore_fcs_err = portmod_config.no_fcs_err_check; 3171 3172 return (BCM_E_NONE); 3173 #else 3174 return (BCM_E_UNAVAIL); 3175 #endif 3176 } 3177 3178 int bcm_esw_cpri_port_rx_cw_vsd_config_set( 3179 int unit, 3180 int port, 3181 bcm_cpri_rx_vsd_config_info_t *config) 3182 { 3183 #ifdef CPRIMOD_SUPPORT 3184 portmod_cpri_rx_vsd_config_info_t portmod_config; 3185 3186 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3187 3188 portmod_cpri_rx_vsd_config_info_t_init(unit,&portmod_config); 3189 portmod_config.subchan_start = config->subchan_start; 3190 portmod_config.subchan_size = config->subchan_size; 3191 portmod_config.subchan_bytes = config->subchan_bytes; 3192 portmod_config.subchan_steps = config->subchan_step; 3193 portmod_config.flow_bytes = config->flow_bytes; 3194 portmod_config.queue_num = config->queue_num; 3195 portmod_config.rsvd_sector_mask[0] = config->vsd_valid_sector_mask[0]; 3196 portmod_config.rsvd_sector_mask[1] = config->vsd_valid_sector_mask[1]; 3197 portmod_config.rsvd_sector_mask[2] = config->vsd_valid_sector_mask[2]; 3198 portmod_config.rsvd_sector_mask[3] = config->vsd_valid_sector_mask[3]; 3199 portmod_config.queue_size = config->queue_size; 3200 portmod_config.priority = config->priority; 3201 3202 BCM_IF_ERROR_RETURN 3203 (portmod_cpri_port_rx_vsd_config_set(unit, port, &portmod_config)); 3204 3205 return (BCM_E_NONE); 3206 #else 3207 return (BCM_E_UNAVAIL); 3208 #endif 3209 } 3210 3211 3212 int bcm_esw_cpri_port_rx_cw_vsd_config_get( 3213 int unit, 3214 int port, 3215 bcm_cpri_rx_vsd_config_info_t *config) 3216 { 3217 #ifdef CPRIMOD_SUPPORT 3218 portmod_cpri_rx_vsd_config_info_t portmod_config; 3219 3220 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3221 3222 portmod_cpri_rx_vsd_config_info_t_init(unit,&portmod_config); 3223 3224 BCM_IF_ERROR_RETURN 3225 (portmod_cpri_port_rx_vsd_config_get(unit, port, &portmod_config)); 3226 3227 config->subchan_start = portmod_config.subchan_start; 3228 config->subchan_size = portmod_config.subchan_size; 3229 config->subchan_bytes = portmod_config.subchan_bytes; 3230 config->subchan_step = portmod_config.subchan_steps; 3231 config->flow_bytes = portmod_config.flow_bytes; 3232 config->queue_num = portmod_config.queue_num; 3233 config->queue_size = portmod_config.queue_size; 3234 config->priority = portmod_config.priority; 3235 3236 config->vsd_valid_sector_mask[0] = portmod_config.rsvd_sector_mask[0]; 3237 config->vsd_valid_sector_mask[1] = portmod_config.rsvd_sector_mask[1]; 3238 config->vsd_valid_sector_mask[2] = portmod_config.rsvd_sector_mask[2]; 3239 config->vsd_valid_sector_mask[3] = portmod_config.rsvd_sector_mask[3]; 3240 3241 return (BCM_E_NONE); 3242 #else 3243 return (BCM_E_UNAVAIL); 3244 #endif 3245 } 3246 3247 int bcm_esw_cpri_port_rx_cw_vsd_ctrl_flow_add( 3248 int unit, 3249 int port, 3250 uint16 group_id, 3251 bcm_cpri_rx_vsd_flow_info_t *config) 3252 { 3253 #ifdef CPRIMOD_SUPPORT 3254 portmod_cpri_rx_vsd_flow_info_t flow_config; 3255 3256 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3257 3258 flow_config.hyper_frame_number = config->hyper_frame_number; 3259 flow_config.hyper_frame_modulo = config->hyper_frame_modulo; 3260 flow_config.filter_zero_data = config->filter_zero_data; 3261 flow_config.section_num[0] = config->section_num[0]; 3262 flow_config.section_num[1] = config->section_num[1]; 3263 flow_config.section_num[2] = config->section_num[2]; 3264 flow_config.section_num[3] = config->section_num[3]; 3265 flow_config.num_sector = config->num_sector; 3266 flow_config.tag_id = config->tag_id; 3267 3268 BCM_IF_ERROR_RETURN 3269 (portmod_cpri_port_rx_vsd_flow_add(unit, port, group_id, &flow_config)); 3270 3271 return (BCM_E_NONE); 3272 #else 3273 return (BCM_E_UNAVAIL); 3274 #endif 3275 } 3276 3277 int bcm_esw_cpri_port_rx_cw_vsd_ctrl_flow_delete( 3278 int unit, 3279 int port, 3280 uint16 group_id) { 3281 #ifdef CPRIMOD_SUPPORT 3282 3283 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3284 3285 BCM_IF_ERROR_RETURN 3286 (portmod_cpri_port_rx_vsd_flow_delete(unit, port, group_id)); 3287 3288 return (BCM_E_NONE); 3289 #else 3290 return (BCM_E_UNAVAIL); 3291 #endif 3292 } 3293 3294 int bcm_esw_cpri_port_rx_cw_vsd_ctrl_flow_get( 3295 int unit, 3296 int port, 3297 uint16 group_id, 3298 bcm_cpri_rx_vsd_flow_info_t *config) 3299 { 3300 #ifdef CPRIMOD_SUPPORT 3301 portmod_cpri_rx_vsd_flow_info_t flow_config; 3302 3303 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3304 3305 BCM_IF_ERROR_RETURN 3306 (portmod_cpri_port_rx_vsd_flow_get(unit, port, group_id, &flow_config)); 3307 3308 config->hyper_frame_number = flow_config.hyper_frame_number; 3309 config->hyper_frame_modulo = flow_config.hyper_frame_modulo; 3310 config->filter_zero_data = flow_config.filter_zero_data; 3311 config->section_num[0] = flow_config.section_num[0]; 3312 config->section_num[1] = flow_config.section_num[1]; 3313 config->section_num[2] = flow_config.section_num[2]; 3314 config->section_num[3] = flow_config.section_num[3]; 3315 config->num_sector = flow_config.num_sector; 3316 config->tag_id = flow_config.tag_id; 3317 3318 return (BCM_E_NONE); 3319 #else 3320 return (BCM_E_UNAVAIL); 3321 #endif 3322 } 3323 3324 int bcm_esw_cpri_encap_control_queue_tag_to_flow_id_map_set( 3325 int unit, 3326 int port, 3327 uint32 tag_id, 3328 uint32 flow_id) 3329 { 3330 #ifdef CPRIMOD_SUPPORT 3331 3332 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3333 3334 BCM_IF_ERROR_RETURN 3335 (portmod_cpri_port_encap_queue_control_tag_to_flow_map_set(unit, port, tag_id, flow_id)); 3336 return (BCM_E_NONE); 3337 #else 3338 return (BCM_E_UNAVAIL); 3339 #endif 3340 } 3341 3342 int bcm_esw_cpri_port_rx_cw_vsd_raw_config_set( 3343 int unit, 3344 int port, 3345 uint8 vsd_raw_id, 3346 bcm_cpri_rx_vsd_raw_config_info_t *config) 3347 { 3348 #ifdef CPRIMOD_SUPPORT 3349 portmod_cpri_rx_vsd_raw_config_t portmod_config; 3350 3351 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3352 3353 portmod_cpri_rx_vsd_raw_config_t_init(unit,&portmod_config); 3354 3355 portmod_config.schan_start = config->schan_start; 3356 portmod_config.schan_size = config->schan_size; 3357 portmod_config.cw_sel = config->cw_sel; 3358 portmod_config.cw_size = config->cw_size; 3359 portmod_config.filter_mode = config->filter_mode; 3360 portmod_config.hyper_frame_index = config->hfn_offset; 3361 portmod_config.hyper_frame_modulo = config->hfn_modulo; 3362 portmod_config.match_offset = config->match_offset; 3363 portmod_config.match_value = config->match_value; 3364 portmod_config.match_mask = config->match_mask; 3365 portmod_config.queue_num = config->queue_num; 3366 portmod_config.priority = config->priority; 3367 portmod_config.queue_size = config->queue_size; 3368 3369 BCM_IF_ERROR_RETURN 3370 (portmod_cpri_port_rx_vsd_raw_config_set(unit, port, vsd_raw_id, &portmod_config)); 3371 3372 return (BCM_E_NONE); 3373 #else 3374 return (BCM_E_UNAVAIL); 3375 #endif 3376 } 3377 3378 int bcm_esw_cpri_port_rx_cw_vsd_raw_config_get( 3379 int unit, 3380 int port, 3381 uint8 vsd_raw_id, 3382 bcm_cpri_rx_vsd_raw_config_info_t *config) 3383 { 3384 #ifdef CPRIMOD_SUPPORT 3385 portmod_cpri_rx_vsd_raw_config_t portmod_config; 3386 3387 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3388 3389 portmod_cpri_rx_vsd_raw_config_t_init(unit,&portmod_config); 3390 3391 BCM_IF_ERROR_RETURN 3392 (portmod_cpri_port_rx_vsd_raw_config_get(unit, port, vsd_raw_id, &portmod_config)); 3393 3394 config->schan_start = portmod_config.schan_start; 3395 config->schan_size = portmod_config.schan_size; 3396 config->cw_sel = portmod_config.cw_sel; 3397 config->cw_size = portmod_config.cw_size; 3398 config->filter_mode = portmod_config.filter_mode; 3399 config->hfn_offset = portmod_config.hyper_frame_index; 3400 config->hfn_modulo = portmod_config.hyper_frame_modulo; 3401 config->match_offset= portmod_config.match_offset; 3402 config->match_value = portmod_config.match_value; 3403 config->match_mask = portmod_config.match_mask; 3404 config->queue_num = portmod_config.queue_num; 3405 config->priority = portmod_config.priority; 3406 config->queue_size = portmod_config.queue_size; 3407 3408 return (BCM_E_NONE); 3409 #else 3410 return (BCM_E_UNAVAIL); 3411 #endif 3412 } 3413 3414 int bcm_esw_cpri_port_rx_cw_rsvd5_config_set( 3415 int unit, 3416 int port, 3417 bcm_cpri_rx_rsvd5_config_info_t* config) 3418 { 3419 #ifdef CPRIMOD_SUPPORT 3420 portmod_cpri_rx_brcm_rsvd5_config_t portmod_config; 3421 3422 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3423 3424 portmod_cpri_rx_brcm_rsvd5_config_t_init(unit,&portmod_config); 3425 portmod_config.schan_start = config->schan_start ; 3426 portmod_config.schan_size = config->schan_size ; 3427 portmod_config.parity_disable = config->disable_parity_check ; 3428 portmod_config.queue_num = config->queue_num; 3429 portmod_config.priority = config->priority; 3430 portmod_config.queue_size = config->queue_size; 3431 3432 BCM_IF_ERROR_RETURN 3433 (portmod_cpri_port_rx_brcm_rsvd5_config_set(unit, port, &portmod_config)); 3434 return (BCM_E_NONE); 3435 #else 3436 return (BCM_E_UNAVAIL); 3437 #endif 3438 } 3439 3440 int bcm_esw_cpri_port_rx_cw_rsvd5_config_get( 3441 int unit, 3442 int port, 3443 bcm_cpri_rx_rsvd5_config_info_t *config) 3444 { 3445 #ifdef CPRIMOD_SUPPORT 3446 portmod_cpri_rx_brcm_rsvd5_config_t portmod_config; 3447 3448 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3449 3450 portmod_cpri_rx_brcm_rsvd5_config_t_init(unit,&portmod_config); 3451 3452 BCM_IF_ERROR_RETURN 3453 (portmod_cpri_port_rx_brcm_rsvd5_config_get(unit, port, &portmod_config)); 3454 3455 config->schan_start = portmod_config.schan_start; 3456 config->schan_size = portmod_config.schan_size; 3457 config->disable_parity_check = portmod_config.parity_disable; 3458 config->queue_num = portmod_config.queue_num; 3459 config->priority = portmod_config.priority; 3460 config->queue_size = portmod_config.queue_size; 3461 3462 return (BCM_E_NONE); 3463 #else 3464 return (BCM_E_UNAVAIL); 3465 #endif 3466 } 3467 3468 int bcm_esw_cpri_port_rx_tag_entry_add( 3469 int unit, 3470 int port, 3471 bcm_cpri_tag_gen_entry_t *config) 3472 3473 { 3474 #ifdef CPRIMOD_SUPPORT 3475 portmod_tag_gen_entry_t int_config; 3476 3477 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3478 3479 int_config.tag_id = config->tag_id; 3480 int_config.mask = config->mask; 3481 int_config.header = config->header; 3482 int_config.word_count = config->word_count; 3483 3484 BCM_IF_ERROR_RETURN 3485 (portmod_rx_tag_gen_entry_add(unit, port, &int_config)); 3486 return (BCM_E_NONE); 3487 #else 3488 return (BCM_E_UNAVAIL); 3489 #endif 3490 } 3491 3492 int bcm_esw_cpri_port_rx_tag_entry_delete( 3493 int unit, 3494 int port, 3495 bcm_cpri_tag_gen_entry_t *config) 3496 { 3497 #ifdef CPRIMOD_SUPPORT 3498 portmod_tag_gen_entry_t int_config; 3499 3500 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3501 3502 int_config.tag_id = config->tag_id; 3503 int_config.mask = config->mask; 3504 int_config.header = config->header; 3505 int_config.word_count = config->word_count; 3506 3507 BCM_IF_ERROR_RETURN 3508 (portmod_rx_tag_gen_entry_delete(unit, port, &int_config)); 3509 3510 return (BCM_E_NONE); 3511 #else 3512 return (BCM_E_UNAVAIL); 3513 #endif 3514 } 3515 3516 int bcm_esw_cpri_port_rx_cw_gcw_config_set( 3517 int unit, 3518 int port, 3519 uint8 index, 3520 bcm_cpri_rx_gcw_config_info_t *config) 3521 { 3522 #ifdef CPRIMOD_SUPPORT 3523 portmod_cpri_rx_gcw_config_t portmod_config; 3524 3525 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3526 3527 portmod_cpri_rx_gcw_config_t_init(unit,&portmod_config); 3528 portmod_config.Ns = config->Ns ; 3529 portmod_config.Xs = config->Xs ; 3530 portmod_config.Y = config->Y ; 3531 portmod_config.mask = config->mask ; 3532 portmod_config.filter_mode = config->filter_mode ; 3533 portmod_config.hyper_frame_index = config->hfn_index ; 3534 portmod_config.hyper_frame_modulo = config->hfn_modulo ; 3535 portmod_config.match_mask = config->match_mask ; 3536 portmod_config.match_value = config->match_value; 3537 3538 BCM_IF_ERROR_RETURN 3539 (portmod_cpri_port_rx_gcw_config_set(unit, port, index, &portmod_config)); 3540 return (BCM_E_NONE); 3541 #else 3542 return (BCM_E_UNAVAIL); 3543 #endif 3544 } 3545 3546 int bcm_esw_cpri_port_rx_cw_gcw_config_get( 3547 int unit, 3548 int port, 3549 uint8 index, 3550 bcm_cpri_rx_gcw_config_info_t *config) 3551 { 3552 #ifdef CPRIMOD_SUPPORT 3553 portmod_cpri_rx_gcw_config_t portmod_config; 3554 3555 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3556 3557 portmod_cpri_rx_gcw_config_t_init(unit,&portmod_config); 3558 3559 BCM_IF_ERROR_RETURN 3560 (portmod_cpri_port_rx_gcw_config_get(unit, port, index, &portmod_config)); 3561 3562 config->Ns = portmod_config.Ns; 3563 config->Xs = portmod_config.Xs; 3564 config->Y = portmod_config.Y; 3565 config->mask = portmod_config.mask; 3566 3567 config->filter_mode = portmod_config.filter_mode; 3568 config->hfn_index = portmod_config.hyper_frame_index; 3569 config->hfn_modulo = portmod_config.hyper_frame_modulo; 3570 config->match_mask = portmod_config.match_mask; 3571 config->match_value = portmod_config.match_value; 3572 3573 return (BCM_E_NONE); 3574 #else 3575 return (BCM_E_UNAVAIL); 3576 #endif 3577 } 3578 3579 int bcm_esw_cpri_port_tx_cw_sync_info_set( 3580 int unit, 3581 int port, 3582 bcm_cpri_cw_sync_info_t *entry) 3583 { 3584 #ifdef CPRIMOD_SUPPORT 3585 3586 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3587 3588 BCM_IF_ERROR_RETURN 3589 (portmod_cpri_port_tx_cw_sync_info_set(unit, port, entry->hfn, entry->bfn)); 3590 return (BCM_E_NONE); 3591 #else 3592 return (BCM_E_UNAVAIL); 3593 #endif 3594 } 3595 3596 int bcm_esw_cpri_port_tx_cw_sync_info_get( 3597 int unit, 3598 int port, 3599 bcm_cpri_cw_sync_info_t *entry) 3600 { 3601 #ifdef CPRIMOD_SUPPORT 3602 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3603 3604 BCM_IF_ERROR_RETURN 3605 (portmod_cpri_port_tx_cw_sync_info_get(unit, port, &entry->hfn, &entry->bfn)); 3606 3607 return (BCM_E_NONE); 3608 #else 3609 return (BCM_E_UNAVAIL); 3610 #endif 3611 } 3612 3613 int bcm_esw_cpri_port_tx_cw_l1_config_set( 3614 int unit, 3615 int port, 3616 bcm_cpri_cw_l1_config_info_t *entry) 3617 { 3618 #ifdef CPRIMOD_SUPPORT 3619 portmod_cpri_cw_l1_config_info_t int_entry; 3620 3621 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3622 3623 if ((entry->enet_ptr < 20) || (entry->enet_ptr > 63)) { 3624 LOG_ERROR(BSL_LS_BCM_PORT, 3625 (BSL_META("enet_ptr p= %d Valid Eth Channel should be p=20..63\n"), entry->enet_ptr)); 3626 return BCM_E_PARAM; 3627 } 3628 3629 int_entry.enet_ptr = entry->enet_ptr; 3630 int_entry.l1_fun = entry->l1_fun; 3631 int_entry.hdlc_rate = entry->hdlc_rate; 3632 int_entry.protocol_ver = entry->protocol_ver; 3633 3634 BCM_IF_ERROR_RETURN 3635 (portmod_cpri_port_tx_cw_l1_config_set(unit, port, &int_entry)); 3636 return (BCM_E_NONE); 3637 #else 3638 return (BCM_E_UNAVAIL); 3639 #endif 3640 } 3641 3642 int bcm_esw_cpri_port_tx_cw_vsd_config_set( 3643 int unit, 3644 int port, 3645 bcm_cpri_tx_vsd_config_info_t *entry) 3646 { 3647 #ifdef CPRIMOD_SUPPORT 3648 portmod_cpri_tx_vsd_config_info_t portmod_config; 3649 3650 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3651 3652 portmod_cpri_tx_vsd_config_info_t_init(unit,&portmod_config); 3653 portmod_config.subchan_start = entry->subchan_start; 3654 portmod_config.subchan_size = entry->subchan_size; 3655 portmod_config.subchan_bytes = entry->subchan_bytes; 3656 portmod_config.subchan_steps = entry->subchan_step; 3657 portmod_config.flow_bytes = entry->flow_bytes; 3658 portmod_config.queue_num = entry->queue; 3659 portmod_config.rsvd_sector_mask[0] = entry->vsd_valid_sector_mask[0]; 3660 portmod_config.rsvd_sector_mask[1] = entry->vsd_valid_sector_mask[1]; 3661 portmod_config.rsvd_sector_mask[2] = entry->vsd_valid_sector_mask[2]; 3662 portmod_config.rsvd_sector_mask[3] = entry->vsd_valid_sector_mask[3]; 3663 portmod_config.buffer_size = entry->buffer_size; 3664 portmod_config.cycle_size = entry->cycle_size; 3665 portmod_config.byte_order_swap = entry->byte_order_swap; 3666 3667 BCM_IF_ERROR_RETURN 3668 (portmod_cpri_port_tx_vsd_config_set(unit, port, &portmod_config)); 3669 3670 3671 return (BCM_E_NONE); 3672 #else 3673 return (BCM_E_UNAVAIL); 3674 #endif 3675 } 3676 3677 int bcm_esw_cpri_port_tx_cw_vsd_config_get( 3678 int unit, 3679 int port, 3680 bcm_cpri_tx_vsd_config_info_t *entry) 3681 { 3682 #ifdef CPRIMOD_SUPPORT 3683 portmod_cpri_tx_vsd_config_info_t portmod_config; 3684 3685 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3686 3687 portmod_cpri_tx_vsd_config_info_t_init(unit,&portmod_config); 3688 3689 BCM_IF_ERROR_RETURN 3690 (portmod_cpri_port_tx_vsd_config_get(unit, port, &portmod_config)); 3691 3692 entry->subchan_start = portmod_config.subchan_start; 3693 entry->subchan_size = portmod_config.subchan_size; 3694 entry->subchan_bytes = portmod_config.subchan_bytes; 3695 entry->subchan_step = portmod_config.subchan_steps; 3696 entry->flow_bytes = portmod_config.flow_bytes; 3697 entry->queue = portmod_config.queue_num; 3698 entry->vsd_valid_sector_mask[0] = portmod_config.rsvd_sector_mask[0]; 3699 entry->vsd_valid_sector_mask[1] = portmod_config.rsvd_sector_mask[1]; 3700 entry->vsd_valid_sector_mask[2] = portmod_config.rsvd_sector_mask[2]; 3701 entry->vsd_valid_sector_mask[3] = portmod_config.rsvd_sector_mask[3]; 3702 entry->buffer_size = portmod_config.buffer_size; 3703 entry->cycle_size = portmod_config.cycle_size; 3704 entry->byte_order_swap = portmod_config.byte_order_swap; 3705 3706 return (BCM_E_NONE); 3707 #else 3708 return (BCM_E_UNAVAIL); 3709 #endif 3710 } 3711 3712 int bcm_esw_cpri_port_tx_cw_vsd_raw_flow_config_set( 3713 int unit, 3714 int port, 3715 uint8 index, 3716 bcm_cpri_tx_vsd_raw_config_info_t *config) 3717 { 3718 #ifdef CPRIMOD_SUPPORT 3719 3720 portmod_cpri_tx_vsd_raw_config_t portmod_config; 3721 3722 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3723 3724 portmod_cpri_tx_vsd_raw_config_t_init(unit,&portmod_config); 3725 3726 portmod_config.schan_start = config->schan_start; 3727 portmod_config.schan_size = config->schan_size; 3728 portmod_config.cw_sel = config->cw_sel; 3729 portmod_config.cw_size = config->cw_size; 3730 portmod_config.map_mode = config->map_mode; 3731 portmod_config.repeat_enable = config->repeat_mode; 3732 portmod_config.hyper_frame_index = config->hfn_index; 3733 portmod_config.hyper_frame_modulo = config->hfn_modulo; 3734 portmod_config.bfn0_filter_enable = config->bfn0_filter_enable; 3735 portmod_config.bfn1_filter_enable = config->bfn1_filter_enable; 3736 portmod_config.idle_value = config->idle_value; 3737 portmod_config.queue_num = config->queue_num; 3738 portmod_config.cycle_size = config->cycle_size; 3739 portmod_config.buffer_size = config->buffer_size; 3740 3741 BCM_IF_ERROR_RETURN 3742 (portmod_cpri_port_tx_vsd_raw_config_set(unit, port, index, &portmod_config)) ; 3743 3744 3745 return (BCM_E_NONE); 3746 #else 3747 return (BCM_E_UNAVAIL); 3748 #endif 3749 } 3750 3751 int bcm_esw_cpri_port_tx_cw_vsd_raw_flow_config_get( 3752 int unit, 3753 int port, 3754 uint8 index, 3755 bcm_cpri_tx_vsd_raw_config_info_t *config) 3756 { 3757 #ifdef CPRIMOD_SUPPORT 3758 portmod_cpri_tx_vsd_raw_config_t portmod_config; 3759 3760 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3761 3762 portmod_cpri_tx_vsd_raw_config_t_init(unit,&portmod_config); 3763 3764 BCM_IF_ERROR_RETURN 3765 (portmod_cpri_port_tx_vsd_raw_config_get(unit, port, index, &portmod_config)) ; 3766 3767 3768 config->schan_start = portmod_config.schan_start; 3769 config->schan_size = portmod_config.schan_size; 3770 config->cw_sel = portmod_config.cw_sel; 3771 config->cw_size = portmod_config.cw_size; 3772 config->map_mode = portmod_config.map_mode; 3773 config->repeat_mode = portmod_config.repeat_enable; 3774 config->hfn_index = portmod_config.hyper_frame_index; 3775 config->hfn_modulo = portmod_config.hyper_frame_modulo; 3776 config->bfn0_filter_enable = portmod_config.bfn0_filter_enable; 3777 config->bfn1_filter_enable = portmod_config.bfn1_filter_enable; 3778 config->idle_value = portmod_config.idle_value; 3779 config->queue_num = portmod_config.queue_num; 3780 config->cycle_size = portmod_config.cycle_size; 3781 config->buffer_size = portmod_config.buffer_size; 3782 3783 return (BCM_E_NONE); 3784 #else 3785 return (BCM_E_UNAVAIL); 3786 #endif 3787 } 3788 3789 int bcm_esw_cpri_port_tx_cw_vsd_raw_filter_set( 3790 int unit, 3791 int port, 3792 bcm_cpri_tx_cw_vsd_raw_filter_info_t *config) 3793 { 3794 #ifdef CPRIMOD_SUPPORT 3795 3796 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3797 3798 BCM_IF_ERROR_RETURN 3799 (portmod_cpri_port_tx_vsd_raw_filter_set(unit, port, config->bfn0_value,config->bfn0_mask, config->bfn1_value, config->bfn1_mask)); 3800 return (BCM_E_NONE); 3801 #else 3802 return (BCM_E_UNAVAIL); 3803 #endif 3804 } 3805 3806 int bcm_esw_cpri_port_tx_cw_vsd_raw_filter_get( 3807 int unit, 3808 int port, 3809 bcm_cpri_tx_cw_vsd_raw_filter_info_t *config) 3810 { 3811 #ifdef CPRIMOD_SUPPORT 3812 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3813 3814 BCM_IF_ERROR_RETURN 3815 (portmod_cpri_port_tx_vsd_raw_filter_get(unit, port, 3816 &config->bfn0_value, &config->bfn0_mask, 3817 &config->bfn1_value, &config->bfn1_mask)); 3818 3819 return (BCM_E_NONE); 3820 #else 3821 return (BCM_E_UNAVAIL); 3822 #endif 3823 } 3824 3825 int bcm_esw_cpri_port_tx_cw_rsvd5_config_set( 3826 int unit, 3827 int port, 3828 bcm_cpri_tx_cw_rsvd5_config_info_t *config) 3829 { 3830 #ifdef CPRIMOD_SUPPORT 3831 portmod_cpri_tx_brcm_rsvd5_config_t portmod_config; 3832 3833 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3834 3835 portmod_cpri_tx_brcm_rsvd5_config_t_init(unit,&portmod_config); 3836 3837 portmod_config.schan_start = config->schan_start ; 3838 portmod_config.schan_size = config->schan_size ; 3839 portmod_config.crc_enable = config->crc_check_enable; 3840 portmod_config.queue_num = config->queue_num; 3841 portmod_config.buffer_size = config->buffer_size; 3842 portmod_config.cycle_size = config->cycle_size; 3843 3844 BCM_IF_ERROR_RETURN 3845 (portmod_cpri_port_tx_brcm_rsvd5_config_set(unit, port, &portmod_config)); 3846 3847 return (BCM_E_NONE); 3848 #else 3849 return (BCM_E_UNAVAIL); 3850 #endif 3851 } 3852 3853 int bcm_esw_cpri_port_tx_cw_rsvd5_config_get( 3854 int unit, 3855 int port, 3856 bcm_cpri_tx_cw_rsvd5_config_info_t *config) 3857 { 3858 #ifdef CPRIMOD_SUPPORT 3859 portmod_cpri_tx_brcm_rsvd5_config_t portmod_config; 3860 3861 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3862 3863 portmod_cpri_tx_brcm_rsvd5_config_t_init(unit,&portmod_config); 3864 3865 BCM_IF_ERROR_RETURN 3866 (portmod_cpri_port_tx_brcm_rsvd5_config_get(unit, port, &portmod_config)); 3867 3868 config->schan_start = portmod_config.schan_start; 3869 config->schan_size = portmod_config.schan_size; 3870 config->crc_check_enable = portmod_config.crc_enable; 3871 config->queue_num = portmod_config.queue_num; 3872 config->buffer_size = portmod_config.buffer_size; 3873 config->cycle_size = portmod_config.cycle_size; 3874 3875 return (BCM_E_NONE); 3876 #else 3877 return (BCM_E_UNAVAIL); 3878 #endif 3879 } 3880 3881 int bcm_esw_cpri_port_tx_cw_gcw_config_set( 3882 int unit, 3883 int port, 3884 uint8 index, 3885 bcm_cpri_tx_gcw_config_info_t *config) 3886 { 3887 #ifdef CPRIMOD_SUPPORT 3888 portmod_cpri_tx_gcw_config_t portmod_config; 3889 3890 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3891 3892 portmod_cpri_tx_gcw_config_t_init(unit,&portmod_config); 3893 portmod_config.Ns = config->Ns ; 3894 portmod_config.Xs = config->Xs ; 3895 portmod_config.Y = config->Y ; 3896 portmod_config.mask = config->mask ; 3897 portmod_config.repeat_enable = config->repeat_mode ; 3898 portmod_config.hyper_frame_index = config->hfn_index ; 3899 portmod_config.hyper_frame_modulo = config->hfn_modulo ; 3900 portmod_config.bfn0_filter_enable = config->bfn0_filter_enable; 3901 portmod_config.bfn1_filter_enable = config->bfn1_filter_enable; 3902 3903 3904 BCM_IF_ERROR_RETURN 3905 (portmod_cpri_port_tx_gcw_config_set(unit, port, index, &portmod_config)); 3906 3907 return (BCM_E_NONE); 3908 #else 3909 return (BCM_E_UNAVAIL); 3910 #endif 3911 } 3912 3913 int bcm_esw_cpri_port_tx_cw_gcw_config_get( 3914 int unit, 3915 int port, 3916 uint8 index, 3917 bcm_cpri_tx_gcw_config_info_t *config) 3918 { 3919 #ifdef CPRIMOD_SUPPORT 3920 portmod_cpri_tx_gcw_config_t portmod_config; 3921 3922 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3923 3924 portmod_cpri_tx_gcw_config_t_init(unit,&portmod_config); 3925 BCM_IF_ERROR_RETURN 3926 (portmod_cpri_port_tx_gcw_config_get(unit, port, index, &portmod_config)); 3927 3928 config->Ns = portmod_config.Ns; 3929 config->Xs = portmod_config.Xs; 3930 config->Y = portmod_config.Y; 3931 config->mask = portmod_config.mask; 3932 3933 config->repeat_mode = portmod_config.repeat_enable; 3934 config->hfn_index = portmod_config.hyper_frame_index; 3935 config->hfn_modulo = portmod_config.hyper_frame_modulo; 3936 config->bfn0_filter_enable = portmod_config.bfn0_filter_enable; 3937 config->bfn1_filter_enable = portmod_config.bfn1_filter_enable; 3938 3939 return (BCM_E_NONE); 3940 #else 3941 return (BCM_E_UNAVAIL); 3942 #endif 3943 } 3944 3945 int bcm_esw_cpri_port_tx_cw_gcw_filter_set( 3946 int unit, 3947 int port, 3948 bcm_cpri_tx_gcw_tx_filter_info_t *config) 3949 { 3950 #ifdef CPRIMOD_SUPPORT 3951 3952 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3953 3954 BCM_IF_ERROR_RETURN 3955 (portmod_cpri_port_tx_gcw_filter_set(unit, port, config->bfn0_value,config->bfn0_mask, config->bfn1_value, config->bfn1_mask)); 3956 return (BCM_E_NONE); 3957 #else 3958 return (BCM_E_UNAVAIL); 3959 #endif 3960 } 3961 3962 int bcm_esw_cpri_port_tx_cw_gcw_filter_get( 3963 int unit, 3964 int port, 3965 bcm_cpri_tx_gcw_tx_filter_info_t *config) 3966 { 3967 #ifdef CPRIMOD_SUPPORT 3968 3969 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3970 3971 BCM_IF_ERROR_RETURN 3972 (portmod_cpri_port_tx_gcw_filter_get( unit, port, 3973 &config->bfn0_value, &config->bfn0_mask, 3974 &config->bfn1_value, &config->bfn1_mask)); 3975 return (BCM_E_NONE); 3976 #else 3977 return (BCM_E_UNAVAIL); 3978 #endif 3979 } 3980 3981 int bcm_esw_cpri_port_tx_cw_vsd_ctrl_flow_add( 3982 int unit, 3983 int port, 3984 uint16 group_id, 3985 bcm_cpri_tx_vsd_flow_info_t *config) 3986 { 3987 #ifdef CPRIMOD_SUPPORT 3988 portmod_cpri_tx_vsd_flow_info_t flow_config; 3989 3990 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 3991 3992 flow_config.hyper_frame_number = config->hyper_frame_number; 3993 flow_config.hyper_frame_modulo = config->hyper_frame_modulo; 3994 flow_config.repeat_mode = config->repeat_mode; 3995 flow_config.section_num[0] = config->section_num[0]; 3996 flow_config.section_num[1] = config->section_num[1]; 3997 flow_config.section_num[2] = config->section_num[2]; 3998 flow_config.section_num[3] = config->section_num[3]; 3999 flow_config.num_sector = config->num_sector; 4000 flow_config.roe_flow_id = config->roe_flow_id; 4001 4002 BCM_IF_ERROR_RETURN 4003 (portmod_cpri_port_tx_vsd_flow_add(unit, port, group_id, &flow_config)); 4004 4005 return (BCM_E_NONE); 4006 #else 4007 return (BCM_E_UNAVAIL); 4008 #endif 4009 } 4010 4011 int bcm_esw_cpri_port_tx_cw_vsd_ctrl_flow_delete( 4012 int unit, 4013 int port, 4014 uint16 group_id) { 4015 #ifdef CPRIMOD_SUPPORT 4016 4017 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 4018 4019 BCM_IF_ERROR_RETURN 4020 (portmod_cpri_port_tx_vsd_flow_delete(unit, port, group_id)); 4021 return (BCM_E_NONE); 4022 #else 4023 return (BCM_E_UNAVAIL); 4024 #endif 4025 } 4026 4027 int bcm_esw_cpri_port_tx_cw_vsd_ctrl_flow_get( 4028 int unit, 4029 int port, 4030 uint16 group_id, 4031 bcm_cpri_tx_vsd_flow_info_t *config) 4032 { 4033 #ifdef CPRIMOD_SUPPORT 4034 portmod_cpri_tx_vsd_flow_info_t flow_config; 4035 4036 4037 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 4038 4039 BCM_IF_ERROR_RETURN 4040 (portmod_cpri_port_tx_vsd_flow_get(unit, port, group_id, &flow_config)); 4041 4042 config->hyper_frame_number = flow_config.hyper_frame_number; 4043 config->hyper_frame_modulo = flow_config.hyper_frame_modulo; 4044 config->repeat_mode = flow_config.repeat_mode; 4045 config->section_num[0] = flow_config.section_num[0]; 4046 config->section_num[1] = flow_config.section_num[1]; 4047 config->section_num[2] = flow_config.section_num[2]; 4048 config->section_num[3] = flow_config.section_num[3]; 4049 config->num_sector = flow_config.num_sector; 4050 config->roe_flow_id = flow_config.roe_flow_id; 4051 4052 return (BCM_E_NONE); 4053 #else 4054 return (BCM_E_UNAVAIL); 4055 #endif 4056 } 4057 4058 int bcm_esw_cpri_port_rx_tag_config_set( 4059 int unit, 4060 int port, 4061 bcm_cpri_control_tag_config_t *config) 4062 { 4063 #ifdef CPRIMOD_SUPPORT 4064 4065 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 4066 4067 BCM_IF_ERROR_RETURN 4068 (portmod_rx_tag_config_set(unit, port, config->default_tag, config->no_match_tag)); 4069 4070 return (BCM_E_NONE); 4071 #else 4072 return (BCM_E_UNAVAIL); 4073 #endif 4074 } 4075 4076 /* Register a callback routine for CPRI port interrupts. */ 4077 int bcm_esw_cpri_port_interrupt_callback_register( 4078 int unit, 4079 bcm_cpri_interrupt_type_t cpri_intr_type, 4080 bcm_cpri_port_interrupt_callback_t callback, 4081 void *cb_data) 4082 { 4083 #ifdef CPRIMOD_SUPPORT 4084 portmod_cpri_port_interrupt_callback_register(unit, 4085 cpri_intr_type, 4086 callback, 4087 cb_data); 4088 return (BCM_E_NONE); 4089 #else 4090 return (BCM_E_UNAVAIL); 4091 #endif 4092 } 4093 4094 /* Unregister a callback routine registered for CPRI port interrupts. */ 4095 int bcm_esw_cpri_port_interrupt_callback_unregister( 4096 int unit, 4097 bcm_cpri_interrupt_type_t cpri_intr_type, 4098 bcm_cpri_port_interrupt_callback_t callback) 4099 { 4100 #ifdef CPRIMOD_SUPPORT 4101 portmod_cpri_port_interrupt_callback_unregister(unit, 4102 cpri_intr_type, 4103 callback);; 4104 return (BCM_E_NONE); 4105 #else 4106 return (BCM_E_UNAVAIL); 4107 #endif 4108 } 4109 4110 /* Register a callback routine for CPRI port interrupts. */ 4111 int bcm_esw_cpri_port_interrupt_enable_set( 4112 int unit, 4113 bcm_port_t port, 4114 bcm_cpri_interrupt_type_t cpri_intr_type, int data, 4115 int enable) 4116 { 4117 #ifdef CPRIMOD_SUPPORT 4118 4119 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 4120 4121 return (portmod_cpri_port_interrupt_enable_set(unit, port, cpri_intr_type, 4122 data, enable)); 4123 #else 4124 return (BCM_E_UNAVAIL); 4125 #endif 4126 } 4127 4128 /* Set CPRI port 1588 timestamp capture configuration. */ 4129 int bcm_esw_cpri_port_1588_timestamp_capture_config_set( 4130 int unit, 4131 bcm_port_t port, 4132 int direction, 4133 bcm_cpri_1588_capture_config_t *config) 4134 { 4135 #ifdef CPRIMOD_SUPPORT 4136 cprimod_1588_capture_config_t cfg; 4137 4138 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 4139 4140 cfg.mode = config->mode; 4141 cfg.capture_bfn_num = config->capture_bfn_num; 4142 cfg.capture_hfn_num = config->capture_hfn_num; 4143 4144 BCM_IF_ERROR_RETURN( 4145 portmod_1588_timestamp_capture_config_set(unit, port, direction, &cfg)); 4146 4147 return (BCM_E_NONE); 4148 #else 4149 return (BCM_E_UNAVAIL); 4150 #endif 4151 } 4152 4153 /* Get CPRI port 1588 timestamp capture configuration. */ 4154 int bcm_esw_cpri_port_1588_timestamp_capture_config_get( 4155 int unit, 4156 bcm_port_t port, 4157 int direction, 4158 bcm_cpri_1588_capture_config_t *config) 4159 { 4160 #ifdef CPRIMOD_SUPPORT 4161 cprimod_1588_capture_config_t cfg; 4162 4163 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 4164 4165 BCM_IF_ERROR_RETURN( 4166 portmod_1588_timestamp_capture_config_get(unit, port, direction, &cfg)); 4167 4168 config->mode = cfg.mode; 4169 config->capture_bfn_num = cfg.capture_bfn_num; 4170 config->capture_hfn_num = cfg.capture_hfn_num; 4171 4172 return (BCM_E_NONE); 4173 #else 4174 return (BCM_E_UNAVAIL); 4175 #endif 4176 } 4177 4178 /* API to setup the agnostic mode and its configuration. */ 4179 int bcm_esw_cpri_port_agnostic_config_set(int unit, bcm_port_t port, 4180 int dir, 4181 int enable, 4182 bcm_cpri_port_agnostic_config_t *config) 4183 { 4184 #ifdef CPRIMOD_SUPPORT 4185 4186 portmod_cpri_rx_agnostic_config_info_t rx_config; 4187 portmod_cpri_tx_agnostic_config_info_t tx_config; 4188 4189 /* 4190 * convert the gport to local port. 4191 */ 4192 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 4193 4194 if (dir == BCM_CPRI_DIR_RX ) { 4195 portmod_cpri_rx_agnostic_config_info_t_init(unit, &rx_config); 4196 if (enable) { 4197 rx_config.sync_mode = config->frame_sync_mode; 4198 rx_config.basic_frame_offset = config->basic_frame_offset; 4199 rx_config.hyper_frame_offset = config->hyper_frame_offset; 4200 rx_config.radio_frame_offset = config->radio_frame_offset; 4201 rx_config.payload_multiple = config->payload_multiple; 4202 rx_config.pres_mod_count = config->presentation_mod_count; 4203 rx_config.ordering_info_option = config->ordering_info_option; 4204 } 4205 BCM_IF_ERROR_RETURN 4206 (portmod_cpri_port_rx_agnostic_config_set(unit, port, enable, &rx_config)); 4207 4208 } else { /* BCM_CPRI_DIR_TX */ 4209 portmod_cpri_tx_agnostic_config_info_t_init(unit, &tx_config); 4210 if (enable) { 4211 tx_config.sync_mode = config->frame_sync_mode; 4212 tx_config.basic_frame_offset = config->basic_frame_offset; 4213 tx_config.hyper_frame_offset = config->hyper_frame_offset; 4214 tx_config.radio_frame_offset = config->radio_frame_offset; 4215 tx_config.payload_multiple = config->payload_multiple; 4216 tx_config.queue_mod_count = config->tx_queue_mod_cnt; 4217 tx_config.pres_mod_count = config->presentation_mod_count; 4218 tx_config.pres_mod_offset = config->presentation_mod_offset; 4219 tx_config.ordering_info_option = config->ordering_info_option; 4220 } 4221 BCM_IF_ERROR_RETURN 4222 (portmod_cpri_port_tx_agnostic_config_set(unit, port, enable, &tx_config)); 4223 } 4224 4225 return (BCM_E_NONE); 4226 #else 4227 return (BCM_E_UNAVAIL); 4228 #endif 4229 } 4230 4231 /* API to get the agnostic mode and its configuration. */ 4232 int bcm_esw_cpri_port_agnostic_config_get(int unit, bcm_port_t port, 4233 bcm_cpri_dir_t dir, 4234 int *enable, 4235 bcm_cpri_port_agnostic_config_t *config) 4236 { 4237 #ifdef CPRIMOD_SUPPORT 4238 4239 portmod_cpri_rx_agnostic_config_info_t rx_config; 4240 portmod_cpri_tx_agnostic_config_info_t tx_config; 4241 /* 4242 * convert the gport to local port. 4243 */ 4244 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 4245 4246 4247 if (dir == BCM_CPRI_DIR_RX ) { 4248 portmod_cpri_rx_agnostic_config_info_t_init(unit, &rx_config); 4249 BCM_IF_ERROR_RETURN 4250 (portmod_cpri_port_rx_agnostic_config_get(unit, port, enable, &rx_config)); 4251 config->frame_sync_mode = rx_config.sync_mode; 4252 config->basic_frame_offset = rx_config.basic_frame_offset; 4253 config->hyper_frame_offset = rx_config.hyper_frame_offset; 4254 config->radio_frame_offset = rx_config.radio_frame_offset; 4255 config->payload_multiple = rx_config.payload_multiple ; 4256 config->presentation_mod_count = rx_config.pres_mod_count; 4257 config->ordering_info_option = rx_config.ordering_info_option; 4258 4259 4260 } else { /* BCM_CPRI_DIR_TX */ 4261 portmod_cpri_tx_agnostic_config_info_t_init(unit, &tx_config); 4262 BCM_IF_ERROR_RETURN 4263 (portmod_cpri_port_tx_agnostic_config_get(unit, port, enable, &tx_config)); 4264 4265 config->frame_sync_mode = tx_config.sync_mode; 4266 config->basic_frame_offset = tx_config.basic_frame_offset; 4267 config->hyper_frame_offset = tx_config.hyper_frame_offset; 4268 config->radio_frame_offset = tx_config.radio_frame_offset; 4269 config->payload_multiple = tx_config.payload_multiple ; 4270 config->presentation_mod_count = tx_config.pres_mod_count; 4271 4272 config->tx_queue_mod_cnt = tx_config.queue_mod_count; 4273 config->presentation_mod_offset = tx_config.pres_mod_offset; 4274 config->ordering_info_option = tx_config.ordering_info_option; 4275 } 4276 4277 return (BCM_E_NONE); 4278 #else 4279 return (BCM_E_UNAVAIL); 4280 #endif 4281 } 4282 4283 /* API to set the presentation attribute. */ 4284 int bcm_esw_cpri_encap_presentation_time_config_set(int unit, bcm_port_t port, 4285 bcm_cpri_presentation_ts_attribute_t attribute, 4286 bcm_cpri_presentation_time_t *time) 4287 { 4288 #ifdef CPRIMOD_SUPPORT 4289 /* 4290 * convert the gport to local port. 4291 */ 4292 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 4293 4294 BCM_IF_ERROR_RETURN 4295 (portmod_cpri_port_encap_presentation_time_config_set(unit, port, attribute, time)); 4296 4297 return (BCM_E_NONE); 4298 #else 4299 return (BCM_E_UNAVAIL); 4300 #endif 4301 } 4302 4303 /* API to get the presentation attribute. */ 4304 int bcm_esw_cpri_encap_presentation_time_config_get(int unit, bcm_port_t port, 4305 bcm_cpri_presentation_ts_attribute_t attribute, 4306 bcm_cpri_presentation_time_t *time) 4307 { 4308 #ifdef CPRIMOD_SUPPORT 4309 /* 4310 * convert the gport to local port. 4311 */ 4312 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 4313 4314 BCM_IF_ERROR_RETURN 4315 (portmod_cpri_port_encap_presentation_time_config_get(unit, port, attribute, time)); 4316 return (BCM_E_NONE); 4317 #else 4318 return (BCM_E_UNAVAIL); 4319 #endif 4320 } 4321 4322 4323 /* API to configure the decap presentation time. */ 4324 int bcm_esw_cpri_decap_presentation_time_config_set(int unit, bcm_port_t port, 4325 bcm_cpri_decap_presentation_config_t *config) 4326 { 4327 #ifdef CPRIMOD_SUPPORT 4328 /* 4329 * convert the gport to local port. 4330 */ 4331 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 4332 4333 BCM_IF_ERROR_RETURN 4334 (portmod_cpri_port_decap_presentation_time_config_set(unit, port, config)); 4335 return (BCM_E_NONE); 4336 #else 4337 return (BCM_E_UNAVAIL); 4338 #endif 4339 } 4340 4341 /* API to retrieve the decap presentation time. */ 4342 int bcm_esw_cpri_decap_presentation_time_config_get(int unit, bcm_port_t port, 4343 bcm_cpri_decap_presentation_config_t *config) 4344 { 4345 #ifdef CPRIMOD_SUPPORT 4346 /* 4347 * convert the gport to local port. 4348 */ 4349 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 4350 4351 BCM_IF_ERROR_RETURN 4352 (portmod_cpri_port_decap_presentation_time_config_get(unit, port, config)); 4353 return (BCM_E_NONE); 4354 #else 4355 return (BCM_E_UNAVAIL); 4356 #endif 4357 } 4358 4359 /* Set CPRI port 1588 timestamp capture configuration for FIFO and HW. */ 4360 int bcm_esw_cpri_port_1588_timestamp_config_set(int unit, bcm_port_t port, 4361 bcm_cpri_dir_t direction, 4362 bcm_cpri_1588_config_t *config) 4363 { 4364 #ifdef CPRIMOD_SUPPORT 4365 cprimod_1588_time_t adj_time; 4366 4367 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 4368 4369 adj_time.nano_sec = config->nano_sec; 4370 adj_time.sub_nano_sec = config->sub_nano_sec; 4371 adj_time.sign_bit = config->sign_bit; 4372 BCM_IF_ERROR_RETURN( 4373 portmod_1588_timestamp_adjust_set(unit, port, direction, &adj_time)); 4374 4375 return (BCM_E_NONE); 4376 #else 4377 return (BCM_E_UNAVAIL); 4378 #endif 4379 } 4380 4381 /* Get CPRI port 1588 timestamp capture configuration for FIFO and HW. */ 4382 int bcm_esw_cpri_port_1588_timestamp_config_get(int unit, bcm_port_t port, 4383 bcm_cpri_dir_t direction, 4384 bcm_cpri_1588_config_t *config) 4385 { 4386 #ifdef CPRIMOD_SUPPORT 4387 cprimod_1588_time_t adj_time; 4388 4389 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 4390 4391 BCM_IF_ERROR_RETURN( 4392 portmod_1588_timestamp_adjust_get(unit, port, direction, &adj_time)); 4393 config->nano_sec = adj_time.nano_sec; 4394 config->sub_nano_sec = adj_time.sub_nano_sec; 4395 config->sign_bit = adj_time.sign_bit; 4396 4397 return (BCM_E_NONE); 4398 #else 4399 return (BCM_E_UNAVAIL); 4400 #endif 4401 } 4402 4403 /* Set CPRI port 1588 timestamp parameter configuration. */ 4404 int bcm_esw_cpri_port_1588_timestamp_ts_config_set(int unit, bcm_port_t port, 4405 bcm_cpri_dir_t direction, 4406 bcm_cpri_1588_ts_type_t type, 4407 bcm_cpri_1588_timestamp_ts_config_t *config) 4408 { 4409 #ifdef CPRIMOD_SUPPORT 4410 4411 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 4412 4413 if(type == BCM_CPRI_1588_TS_TYPE_FIFO) { 4414 if(config->enable) { 4415 BCM_IF_ERROR_RETURN( 4416 portmod_1588_timestamp_fifo_config_set(unit, port, direction, 4417 config->modulo_count)); 4418 } else { 4419 BCM_IF_ERROR_RETURN( 4420 portmod_1588_timestamp_fifo_config_set(unit, port, direction, 0)); 4421 } 4422 } else if(type == BCM_CPRI_1588_TS_TYPE_CMIC) { 4423 if(config->enable) { 4424 BCM_IF_ERROR_RETURN( 4425 portmod_1588_timestamp_cmic_config_set(unit, port, direction, 4426 config->modulo_count)); 4427 } else { 4428 BCM_IF_ERROR_RETURN( 4429 portmod_1588_timestamp_cmic_config_set(unit, port, direction, 0)); 4430 } 4431 } else { 4432 LOG_ERROR(BSL_LS_BCM_PORT, 4433 (BSL_META("Bad timestamp type %d.\n"), port)); 4434 return BCM_E_PARAM; 4435 } 4436 return (BCM_E_NONE); 4437 #else 4438 return (BCM_E_UNAVAIL); 4439 #endif 4440 } 4441 4442 /* Get CPRI port 1588 timestamp parameter configuration. */ 4443 int bcm_esw_cpri_port_1588_timestamp_ts_config_get(int unit, bcm_port_t port, 4444 bcm_cpri_dir_t direction, 4445 bcm_cpri_1588_ts_type_t type, 4446 bcm_cpri_1588_timestamp_ts_config_t *config) 4447 { 4448 #ifdef CPRIMOD_SUPPORT 4449 uint16 mod0; 4450 4451 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 4452 4453 if(type == BCM_CPRI_1588_TS_TYPE_FIFO) { 4454 BCM_IF_ERROR_RETURN( 4455 portmod_1588_timestamp_fifo_config_get(unit, port, direction, 4456 &mod0)); 4457 } else if(type == BCM_CPRI_1588_TS_TYPE_CMIC) { 4458 BCM_IF_ERROR_RETURN( 4459 portmod_1588_timestamp_cmic_config_get(unit, port, direction, 4460 &mod0)); 4461 } else { 4462 LOG_ERROR(BSL_LS_BCM_PORT, 4463 (BSL_META("Bad timestamp type %d.\n"), port)); 4464 return BCM_E_PARAM; 4465 } 4466 config->modulo_count = mod0; 4467 if(mod0 != 0) { 4468 config->enable = 1; 4469 } else { 4470 config->enable = 0; 4471 } 4472 return (BCM_E_NONE); 4473 #else 4474 return (BCM_E_UNAVAIL); 4475 #endif 4476 } 4477 4478 /* Set CPRI port 1588 timestamp parameter configuration. */ 4479 int bcm_esw_cpri_port_1588_timestamp_get(int unit, bcm_port_t port, 4480 bcm_cpri_dir_t direction, 4481 bcm_cpri_1588_ts_type_t type, 4482 int max_count, 4483 int *count, 4484 bcm_cpri_1588_timestamp_t *config) 4485 { 4486 #ifdef CPRIMOD_SUPPORT 4487 uint8 cap_cnt; 4488 4489 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 4490 4491 if((type != BCM_CPRI_1588_TS_TYPE_SW) && 4492 (type != BCM_CPRI_1588_TS_TYPE_FIFO)) { 4493 LOG_ERROR(BSL_LS_BCM_PORT, 4494 (BSL_META("TS read only availabel for SW/FIFO type port %d.\n"), port)); 4495 return BCM_E_PARAM; 4496 } 4497 BCM_IF_ERROR_RETURN( 4498 portmod_1588_captured_timestamp_get(unit, port, direction, type, 4499 max_count, &cap_cnt, config)); 4500 *count = cap_cnt; 4501 4502 return (BCM_E_NONE); 4503 #else 4504 return (BCM_E_UNAVAIL); 4505 #endif 4506 } 4507 4508 /* API to retrieve the CPRI port stats. */ 4509 int bcm_esw_cpri_port_stat_get(int unit, bcm_gport_t port, 4510 bcm_cpri_stat_type_t type, uint64 *val) 4511 { 4512 #ifdef CPRIMOD_SUPPORT 4513 soc_reg_t counter; 4514 4515 BCM_IF_ERROR_RETURN 4516 (_bcm_esw_port_gport_validate(unit, port, &port)); 4517 4518 switch (type) { 4519 case bcmCpriStatRxSymbolErr: 4520 counter = SOC_COUNTER_NON_DMA_CPRI_RX_SYMBOL_ERR; 4521 break; 4522 case bcmCpriStatRxSeedMismatch: 4523 counter = SOC_COUNTER_NON_DMA_CPRI_RX_SEED_VECTOR_MISMATCH; 4524 break; 4525 case bcmCpriStatRxStateErrTransition: 4526 counter = SOC_COUNTER_NON_DMA_CPRI_RX_STATE_TRANSITION_ERR; 4527 break; 4528 case bcmCpriStatTxVsdCtrlFlowIdErr: 4529 counter = SOC_COUNTER_NON_DMA_CPRI_TX_VSD_CTRL_PKT_FLOW_ID_ERR; 4530 break; 4531 case bcmCpriStatTxVsdCtrlPktSizeErr: 4532 counter = SOC_COUNTER_NON_DMA_CPRI_TX_VSD_CTRL_PKT_SIZE_ERR; 4533 break; 4534 case bcmCpriStatTxVsdRawPktSizeErr: 4535 counter = SOC_COUNTER_NON_DMA_CPRI_TX_VSD_RAW_PKT_SIZE_ERR; 4536 break; 4537 case bcmCpriStatTxRsvd5CrcErr: 4538 counter = SOC_COUNTER_NON_DMA_RSVD5_TX_DROP_CRC_ERR; 4539 break; 4540 case bcmCpriStatRxRsvd4SingleMsgCrcErr: 4541 counter = SOC_COUNTER_NON_DMA_RSVD4_RX_SINGLE_MSG_DROP_CRC_ERR; 4542 break; 4543 case bcmCpriStatRxTagLookupFailed: 4544 counter = SOC_COUNTER_NON_DMA_RSVD4_RX_TAG_LKUP_FAIL; 4545 break; 4546 case bcmCpriStatRxRsvd4SingleMsgCnt: 4547 counter = SOC_COUNTER_NON_DMA_RSVD4_RX_SINGLE_MSG_CTRL_STREAMS; 4548 break; 4549 case bcmCpriStatRxRsvd4MultiMsgCnt: 4550 counter = SOC_COUNTER_NON_DMA_RSVD4_RX_MULPILE_MSG_CTRL_STREAMS; 4551 break; 4552 case bcmCpriStatRxRsvd4MultiMsgSeqErr: 4553 counter = SOC_COUNTER_NON_DMA_RSVD4_RX_INCORRECT_TIME_STAMP_SEQ; 4554 break; 4555 case bcmCpriStatRxDataByteErr: 4556 counter = SOC_COUNTER_NON_DMA_CPRI_RX_DATA_BYTES_ERR; 4557 break; 4558 case bcmCpriStatRxRsvd4HeaderErr: 4559 counter = SOC_COUNTER_NON_DMA_CPRI_RX_RSVD4_HDR_MSG_ERR; 4560 break; 4561 case bcmCpriStatRxRsvd4HeaderNoMatch: 4562 counter = SOC_COUNTER_NON_DMA_CPRI_RX_RSVD4_MSG_HDR_LKUP_FAIL; 4563 break; 4564 case bcmCpriStatRxRsvd4MsgCnt: 4565 counter = SOC_COUNTER_NON_DMA_CPRI_RX_RSVD4_TOTAL_MSG_COUNT; 4566 break; 4567 case bcmCpriStatRxHfnErr: 4568 counter = SOC_COUNTER_NON_DMA_CPRI_RX_INCORRECT_HFN_EXTRACT ; 4569 break; 4570 case bcmCpriStatRxBfnErr: 4571 counter = SOC_COUNTER_NON_DMA_CPRI_RX_INCORRECT_BFN_EXTRACT; 4572 break; 4573 case bcmCpriStatRxCtrlWordErr: 4574 counter = SOC_COUNTER_NON_DMA_CPRI_RX_CTRL_WORD_ERR ; 4575 break; 4576 case bcmCpriStatRxGcwErr: 4577 counter = SOC_COUNTER_NON_DMA_CPRI_RX_GENERIC_CTRL_WORD_ERR; 4578 break; 4579 case bcmCpriStatRxVsdRawErr: 4580 counter = SOC_COUNTER_NON_DMA_CPRI_RX_VSD_RAW_PKT_DROP; 4581 break; 4582 case bcmCpriStatRxVsdCtrlErr: 4583 counter = SOC_COUNTER_NON_DMA_CPRI_RX_VSD_CTRL_PKT_DROP; 4584 break; 4585 case bcmCpriStatTxRsvd4DataMsgCnt: 4586 counter = SOC_COUNTER_NON_DMA_CPRI_TX_RSVD4_DATA_SLOT_DATA_MSG; 4587 break; 4588 case bcmCpriStatTxRsvd4DataEmptyMsgCnt: 4589 counter = SOC_COUNTER_NON_DMA_CPRI_TX_RSVD4_DATA_SLOT_EMPTY_MSG; 4590 break; 4591 case bcmCpriStatTxRsvd4CtrlMsgCnt: 4592 counter = SOC_COUNTER_NON_DMA_CPRI_TX_RSVD4_CTRL_SLOT_CTRL_MSG; 4593 break; 4594 case bcmCpriStatTxRsvd4CtrlEmptyMsgCnt: 4595 counter = SOC_COUNTER_NON_DMA_CPRI_TX_RSVD4_CTRL_SLOT_EMPTY_MSG; 4596 break; 4597 case bcmCpriStatRxRsvd5ParityErr: 4598 counter = SOC_COUNTER_NON_DMA_RSVD5_RX_MSG_PARITY_ERR; 4599 break; 4600 case bcmCpriStatRxHdlcErrFrame: 4601 counter = SOC_COUNTER_NON_DMA_CPRI_RX_HDLC_FRAME_ERR ; 4602 break; 4603 case bcmCpriStatRxHdlcGoodFrame: 4604 counter = SOC_COUNTER_NON_DMA_CPRI_RX_HDLC_FRAME_OK; 4605 break; 4606 case bcmCpriStatRxFastEthDroppedPkt: 4607 counter = SOC_COUNTER_NON_DMA_CPRI_RX_FAST_ETH_PKT_MAC_DROP; 4608 break; 4609 case bcmCpriStatRxFastEthGoodPkt: 4610 counter = SOC_COUNTER_NON_DMA_CPRI_RX_FAST_ETH_PKT_MAC_OK; 4611 break; 4612 default: 4613 LOG_ERROR(BSL_LS_BCM_PORT, 4614 (BSL_META("Bad Counter type %d.\n"), type)); 4615 return BCM_E_PARAM; 4616 } 4617 4618 BCM_IF_ERROR_RETURN 4619 (soc_counter_get(unit, port, counter,0,val)); 4620 4621 return (BCM_E_NONE); 4622 #else 4623 return (BCM_E_UNAVAIL); 4624 #endif 4625 } 4626 4627 /* API to enable/disable FEC Clause 91. */ 4628 int bcm_esw_cpri_port_fec_enable_set(int unit, bcm_gport_t port, 4629 bcm_cpri_dir_t dir, int enable) 4630 { 4631 #ifdef CPRIMOD_SUPPORT 4632 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 4633 BCM_IF_ERROR_RETURN(portmod_cpri_port_fec_enable_set(unit, port, dir, enable)); 4634 return (BCM_E_NONE); 4635 #else 4636 return (BCM_E_UNAVAIL); 4637 #endif 4638 } 4639 4640 /* API to get status if FEC Clause 91 is enabled. */ 4641 int bcm_esw_cpri_port_fec_enable_get(int unit, bcm_gport_t port, 4642 bcm_cpri_dir_t dir, int *enable) 4643 { 4644 #ifdef CPRIMOD_SUPPORT 4645 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 4646 BCM_IF_ERROR_RETURN(portmod_cpri_port_fec_enable_get(unit, port, dir, enable)); 4647 return (BCM_E_NONE); 4648 #else 4649 return (BCM_E_UNAVAIL); 4650 #endif 4651 } 4652 4653 /* API to set FEC timestamp config. */ 4654 int bcm_esw_cpri_port_fec_timestamp_config_set(int unit, bcm_gport_t port, 4655 bcm_cpri_dir_t dir, 4656 bcm_cpri_fec_timestamp_config_t *config) 4657 { 4658 #ifdef CPRIMOD_SUPPORT 4659 portmod_fec_timestamp_config_t cfg; 4660 4661 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 4662 cfg.enable = config->enable; 4663 cfg.control_bit_offset_0 = config->control_bit_offset_0; 4664 cfg.control_bit_offset_1 = config->control_bit_offset_1; 4665 cfg.control_bit_offset_2 = config->control_bit_offset_2; 4666 cfg.control_bit_offset_3 = config->control_bit_offset_3; 4667 cfg.fec_fifo_ts_source_select = config->fec_fifo_ts_source_select; 4668 cfg.fec_cmic_ts_source_select = config->fec_cmic_ts_source_select; 4669 BCM_IF_ERROR_RETURN(portmod_cpri_port_fec_timestamp_config_set(unit, port, dir, &cfg)); 4670 return (BCM_E_NONE); 4671 #else 4672 return (BCM_E_UNAVAIL); 4673 #endif 4674 } 4675 4676 /* API to retrieve FEC timestamp config. */ 4677 int bcm_esw_cpri_port_fec_timestamp_config_get(int unit, bcm_gport_t port, 4678 bcm_cpri_dir_t dir, 4679 bcm_cpri_fec_timestamp_config_t *config) 4680 { 4681 #ifdef CPRIMOD_SUPPORT 4682 portmod_fec_timestamp_config_t cfg; 4683 4684 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 4685 BCM_IF_ERROR_RETURN(portmod_cpri_port_fec_timestamp_config_get(unit, port, dir, &cfg)); 4686 config->enable = cfg.enable; 4687 config->control_bit_offset_0 = cfg.control_bit_offset_0; 4688 config->control_bit_offset_1 = cfg.control_bit_offset_1; 4689 config->control_bit_offset_2 = cfg.control_bit_offset_2; 4690 config->control_bit_offset_3 = cfg.control_bit_offset_3; 4691 config->fec_fifo_ts_source_select = cfg.fec_fifo_ts_source_select; 4692 config->fec_cmic_ts_source_select = cfg.fec_cmic_ts_source_select; 4693 return (BCM_E_NONE); 4694 #else 4695 return (BCM_E_UNAVAIL); 4696 #endif 4697 } 4698 4699 /* API to set FEC aux config. */ 4700 int bcm_esw_cpri_port_fec_aux_config_set(int unit, bcm_gport_t port, 4701 bcm_cpri_fec_aux_config_t param_id, 4702 uint32 value) 4703 { 4704 #ifdef CPRIMOD_SUPPORT 4705 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 4706 BCM_IF_ERROR_RETURN(portmod_cpri_port_fec_aux_config_set(unit, port, param_id, value)); 4707 return (BCM_E_NONE); 4708 #else 4709 return (BCM_E_UNAVAIL); 4710 #endif 4711 } 4712 4713 /* API to retrieve FEC aux config. */ 4714 int bcm_esw_cpri_port_fec_aux_config_get(int unit, bcm_gport_t port, 4715 bcm_cpri_fec_aux_config_t param_id, 4716 uint32 *value) 4717 { 4718 #ifdef CPRIMOD_SUPPORT 4719 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 4720 BCM_IF_ERROR_RETURN(portmod_cpri_port_fec_aux_config_get(unit, port, param_id, value)); 4721 return (BCM_E_NONE); 4722 #else 4723 return (BCM_E_UNAVAIL); 4724 #endif 4725 } 4726 4727 /* Set and Program Compression Table. */ 4728 int bcm_esw_cpri_port_compression_lookup_table_set( 4729 int unit, 4730 bcm_gport_t port, 4731 int table_depth, 4732 uint32 *comp_table) 4733 { 4734 #ifdef CPRIMOD_SUPPORT 4735 BCM_IF_ERROR_RETURN 4736 (_bcm_esw_port_gport_validate(unit, port, &port)); 4737 BCM_IF_ERROR_RETURN 4738 (portmod_cpri_port_compression_lookup_table_set(unit, port, table_depth, comp_table)); 4739 return (BCM_E_NONE); 4740 #else 4741 return (BCM_E_UNAVAIL); 4742 #endif 4743 } 4744 4745 /* Get Compression Table. */ 4746 int bcm_esw_cpri_port_compression_lookup_table_get( 4747 int unit, 4748 bcm_gport_t port, 4749 int max_depth, 4750 int *table_depth, 4751 uint32 *comp_table) 4752 { 4753 #ifdef CPRIMOD_SUPPORT 4754 BCM_IF_ERROR_RETURN 4755 (_bcm_esw_port_gport_validate(unit, port, &port)); 4756 BCM_IF_ERROR_RETURN 4757 (portmod_cpri_port_compression_lookup_table_get(unit, port, max_depth, table_depth, comp_table)); 4758 return (BCM_E_NONE); 4759 #else 4760 return (BCM_E_UNAVAIL); 4761 #endif 4762 } 4763 4764 /* Set and Program DeCompression Table. */ 4765 int bcm_esw_cpri_port_decompression_lookup_table_set( 4766 int unit, 4767 bcm_gport_t port, 4768 int table_depth, 4769 uint32 *comp_table) 4770 { 4771 #ifdef CPRIMOD_SUPPORT 4772 BCM_IF_ERROR_RETURN 4773 (_bcm_esw_port_gport_validate(unit, port, &port)); 4774 BCM_IF_ERROR_RETURN 4775 (portmod_cpri_port_decompression_lookup_table_set(unit, port, table_depth, comp_table)); 4776 return (BCM_E_NONE); 4777 #else 4778 return (BCM_E_UNAVAIL); 4779 #endif 4780 } 4781 4782 /* Get DeCompression Table. */ 4783 int bcm_esw_cpri_port_decompression_lookup_table_get( 4784 int unit, 4785 bcm_gport_t port, 4786 int max_depth, 4787 int *table_depth, 4788 uint32 *comp_table) 4789 { 4790 #ifdef CPRIMOD_SUPPORT 4791 BCM_IF_ERROR_RETURN 4792 (_bcm_esw_port_gport_validate(unit, port, &port)); 4793 BCM_IF_ERROR_RETURN 4794 (portmod_cpri_port_decompression_lookup_table_get(unit, port, max_depth, table_depth, comp_table)); 4795 return (BCM_E_NONE); 4796 #else 4797 return (BCM_E_UNAVAIL); 4798 #endif 4799 } 4800 4801 /* Set Decapsulation Queue Flow Control configuration. */ 4802 int bcm_esw_cpri_port_decap_queue_flow_control_set( 4803 int unit, 4804 bcm_gport_t port, 4805 uint32 queue_num, 4806 uint32 xon_threshold, 4807 uint32 xoff_threshold, 4808 int enable) { 4809 #ifdef CPRIMOD_SUPPORT 4810 BCM_IF_ERROR_RETURN 4811 (_bcm_esw_port_gport_validate(unit, port, &port)); 4812 BCM_IF_ERROR_RETURN 4813 (portmod_cpri_port_decap_queue_flow_control_set(unit, port, 4814 queue_num, 4815 enable, 4816 xon_threshold, 4817 xoff_threshold)); 4818 4819 return (BCM_E_NONE); 4820 #else 4821 return (BCM_E_UNAVAIL); 4822 #endif 4823 } 4824 4825 /* Get Decapsulation Queue Flow Control configuration. */ 4826 int bcm_esw_cpri_port_decap_queue_flow_control_get( 4827 int unit, 4828 bcm_gport_t port, 4829 uint32 queue_num, 4830 uint32 *xon_threshold, 4831 uint32 *xoff_threshold, 4832 int *enable){ 4833 #ifdef CPRIMOD_SUPPORT 4834 BCM_IF_ERROR_RETURN 4835 (_bcm_esw_port_gport_validate(unit, port, &port)); 4836 BCM_IF_ERROR_RETURN 4837 (portmod_cpri_port_decap_queue_flow_control_get(unit, port, 4838 queue_num, 4839 enable, 4840 xon_threshold, 4841 xoff_threshold)); 4842 return (BCM_E_NONE); 4843 #else 4844 return (BCM_E_UNAVAIL); 4845 #endif 4846 } 4847 4848 /* Get Rx GCW word. */ 4849 int bcm_esw_cpri_port_rx_cw_gcw_word_get( 4850 int unit, 4851 bcm_port_t port, 4852 int group_index, 4853 uint16 *gcw_word) { 4854 #ifdef CPRIMOD_SUPPORT 4855 BCM_IF_ERROR_RETURN 4856 (_bcm_esw_port_gport_validate(unit, port, &port)); 4857 BCM_IF_ERROR_RETURN 4858 (portmod_cpri_port_rx_gcw_word_get(unit, port, group_index, gcw_word)); 4859 4860 return (BCM_E_NONE); 4861 #else 4862 return (BCM_E_UNAVAIL); 4863 #endif 4864 4865 } 4866 4867 /* Set Tx GCW word. */ 4868 int bcm_esw_cpri_port_tx_cw_gcw_word_set( 4869 int unit, 4870 bcm_port_t port, 4871 int group_index, 4872 uint16 gcw_word) { 4873 4874 #ifdef CPRIMOD_SUPPORT 4875 BCM_IF_ERROR_RETURN 4876 (_bcm_esw_port_gport_validate(unit, port, &port)); 4877 BCM_IF_ERROR_RETURN 4878 (portmod_cpri_port_tx_gcw_word_set(unit, port, group_index, gcw_word)); 4879 4880 return (BCM_E_NONE); 4881 #else 4882 return (BCM_E_UNAVAIL); 4883 #endif 4884 4885 } 4886 4887 /* Set tunnel Mode configuration. */ 4888 int bcm_esw_cpri_port_tunnel_mode_config_set( 4889 int unit, 4890 bcm_port_t port, 4891 bcm_cpri_dir_t direction, 4892 int enable, 4893 bcm_cpri_port_tunnel_config_t *config) { 4894 4895 #ifdef CPRIMOD_SUPPORT 4896 portmod_cpri_rx_tunnel_mode_config_t rx_config; 4897 portmod_cpri_tx_tunnel_mode_config_t tx_config; 4898 4899 BCM_IF_ERROR_RETURN 4900 (_bcm_esw_port_gport_validate(unit, port, &port)); 4901 4902 if (direction == BCM_CPRI_DIR_RX ) { 4903 portmod_cpri_rx_tunnel_mode_config_t_init(unit, &rx_config); 4904 if(enable) { 4905 rx_config.payload_size = config->payload_size; 4906 rx_config.pres_mod_count = config->presentation_mod_count; 4907 rx_config.ordering_info_option = config->ordering_info_option; 4908 } 4909 BCM_IF_ERROR_RETURN 4910 (portmod_cpri_port_rx_tunnel_mode_config_set(unit, port, enable, &rx_config)); 4911 } else { /* BCM_CPRI_DIR_TX */ 4912 portmod_cpri_tx_tunnel_mode_config_t_init(unit, &tx_config); 4913 if(enable) { 4914 tx_config.payload_size = config->payload_size; 4915 tx_config.pres_mod_count = config->presentation_mod_count; 4916 tx_config.pres_mod_offset = config->presentation_mod_offset; 4917 tx_config.queue_mod_count = config->tx_queue_mod_count; 4918 tx_config.ordering_info_option = config->ordering_info_option; 4919 } 4920 BCM_IF_ERROR_RETURN 4921 (portmod_cpri_port_tx_tunnel_mode_config_set(unit, port, enable, &tx_config)); 4922 } 4923 return (BCM_E_NONE); 4924 #else 4925 return (BCM_E_UNAVAIL); 4926 #endif 4927 4928 } 4929 4930 /* Get tunnel Mode configuration. */ 4931 int bcm_esw_cpri_port_tunnel_mode_config_get( 4932 int unit, 4933 bcm_port_t port, 4934 bcm_cpri_dir_t direction, 4935 int *enable, 4936 bcm_cpri_port_tunnel_config_t *config) { 4937 4938 #ifdef CPRIMOD_SUPPORT 4939 portmod_cpri_rx_tunnel_mode_config_t rx_config; 4940 portmod_cpri_tx_tunnel_mode_config_t tx_config; 4941 4942 BCM_IF_ERROR_RETURN 4943 (_bcm_esw_port_gport_validate(unit, port, &port)); 4944 4945 if (direction == BCM_CPRI_DIR_RX ) { 4946 portmod_cpri_rx_tunnel_mode_config_t_init(unit, &rx_config); 4947 rx_config.ordering_info_option = 0; 4948 4949 BCM_IF_ERROR_RETURN 4950 (portmod_cpri_port_rx_tunnel_mode_config_get(unit, port, enable, &rx_config)); 4951 config->payload_size = rx_config.payload_size; 4952 config->presentation_mod_count = rx_config.pres_mod_count; 4953 config->ordering_info_option = rx_config.ordering_info_option; 4954 } else { /* BCM_CPRI_DIR_TX */ 4955 portmod_cpri_tx_tunnel_mode_config_t_init(unit, &tx_config); 4956 tx_config.ordering_info_option = 0; 4957 BCM_IF_ERROR_RETURN 4958 (portmod_cpri_port_tx_tunnel_mode_config_get(unit, port, enable, &tx_config)); 4959 config->payload_size = tx_config.payload_size; 4960 config->presentation_mod_count = tx_config.pres_mod_count; 4961 config->presentation_mod_offset = tx_config.pres_mod_offset; 4962 config->tx_queue_mod_count = tx_config.queue_mod_count; 4963 config->ordering_info_option = tx_config.ordering_info_option; 4964 } 4965 return (BCM_E_NONE); 4966 #else 4967 return (BCM_E_UNAVAIL); 4968 #endif 4969 4970 } 4971 4972 /* Set RSVD4 Agnostic Mode configuration. */ 4973 int bcm_esw_cpri_port_rsvd4_agnostic_mode_config_set( 4974 int unit, 4975 bcm_port_t port, 4976 bcm_cpri_dir_t direction, 4977 int enable, 4978 bcm_cpri_port_rsvd4_agnostic_config_t *config) { 4979 4980 #ifdef CPRIMOD_SUPPORT 4981 portmod_rsvd4_rx_agnostic_config_t rx_config; 4982 portmod_rsvd4_tx_agnostic_config_t tx_config; 4983 4984 BCM_IF_ERROR_RETURN 4985 (_bcm_esw_port_gport_validate(unit, port, &port)); 4986 4987 if (direction == BCM_CPRI_DIR_RX ) { 4988 portmod_rsvd4_rx_agnostic_config_t_init(unit, &rx_config); 4989 if(enable) { 4990 rx_config.frame_sync_mode = config->sync_mode; 4991 rx_config.master_frame_offset = config->master_frame_offset; 4992 rx_config.message_group_number = config->message_group_offset; 4993 rx_config.payload_multiple = config->payload_multiple; 4994 rx_config.pres_mod_count = config->presentation_mod_count; 4995 rx_config.ordering_info_option = config->ordering_info_option; 4996 } 4997 BCM_IF_ERROR_RETURN 4998 (portmod_rsvd4_port_rx_agnostic_config_set(unit, port, enable, &rx_config)); 4999 } else { /* BCM_CPRI_DIR_TX */ 5000 portmod_rsvd4_tx_agnostic_config_t_init(unit, &tx_config); 5001 if(enable) { 5002 tx_config.frame_sync_mode = config->sync_mode; 5003 tx_config.master_frame_offset = config->master_frame_offset; 5004 tx_config.message_group_number = config->message_group_offset; 5005 tx_config.payload_multiple = config->payload_multiple; 5006 tx_config.pres_mod_count = config->presentation_mod_count; 5007 tx_config.pres_mod_offset = config->presentation_mod_offset; 5008 tx_config.queue_mod_count = config->tx_queue_mod_count; 5009 tx_config.ordering_info_option = config->ordering_info_option; 5010 } 5011 BCM_IF_ERROR_RETURN 5012 (portmod_rsvd4_port_tx_agnostic_config_set(unit, port, enable, &tx_config)); 5013 } 5014 return (BCM_E_NONE); 5015 #else 5016 return (BCM_E_UNAVAIL); 5017 #endif 5018 5019 } 5020 5021 /* Get RSVD4 Agnostic Mode configuration. */ 5022 int bcm_esw_cpri_port_rsvd4_agnostic_mode_config_get( 5023 int unit, 5024 bcm_port_t port, 5025 bcm_cpri_dir_t direction, 5026 int *enable, 5027 bcm_cpri_port_rsvd4_agnostic_config_t *config) { 5028 5029 #ifdef CPRIMOD_SUPPORT 5030 portmod_rsvd4_rx_agnostic_config_t rx_config; 5031 portmod_rsvd4_tx_agnostic_config_t tx_config; 5032 5033 BCM_IF_ERROR_RETURN 5034 (_bcm_esw_port_gport_validate(unit, port, &port)); 5035 5036 if (direction == BCM_CPRI_DIR_RX ) { 5037 portmod_rsvd4_rx_agnostic_config_t_init(unit, &rx_config); 5038 rx_config.ordering_info_option = 0; 5039 BCM_IF_ERROR_RETURN 5040 (portmod_rsvd4_port_rx_agnostic_config_get(unit, port, enable, &rx_config)); 5041 config->sync_mode = rx_config.frame_sync_mode; 5042 config->master_frame_offset = rx_config.master_frame_offset; 5043 config->message_group_offset = rx_config.message_group_number; 5044 config->payload_multiple = rx_config.payload_multiple; 5045 config->presentation_mod_count = rx_config.pres_mod_count; 5046 config->ordering_info_option = rx_config.ordering_info_option; 5047 } else { /* BCM_CPRI_DIR_TX */ 5048 portmod_rsvd4_tx_agnostic_config_t_init(unit, &tx_config); 5049 BCM_IF_ERROR_RETURN 5050 (portmod_rsvd4_port_tx_agnostic_config_get(unit, port, enable, &tx_config)); 5051 config->sync_mode = tx_config.frame_sync_mode; 5052 config->master_frame_offset = tx_config.master_frame_offset; 5053 config->message_group_offset = tx_config.message_group_number; 5054 config->payload_multiple = tx_config.payload_multiple; 5055 config->presentation_mod_count = tx_config.pres_mod_count; 5056 config->presentation_mod_offset = tx_config.pres_mod_offset; 5057 config->tx_queue_mod_count = tx_config.queue_mod_count; 5058 config->ordering_info_option = tx_config.ordering_info_option; 5059 } 5060 return (BCM_E_NONE); 5061 #else 5062 return (BCM_E_UNAVAIL); 5063 #endif 5064 5065 } 5066 5067 /* Set RoE frame format for the port. */ 5068 int bcm_esw_cpri_port_frame_config_set( 5069 int unit, 5070 bcm_port_t port, 5071 bcm_cpri_port_frame_config_t *config) { 5072 5073 #ifdef CPRIMOD_SUPPORT 5074 portmod_cpri_port_frame_config_t pm_config; 5075 5076 BCM_IF_ERROR_RETURN 5077 (_bcm_esw_port_gport_validate(unit, port, &port)); 5078 5079 pm_config.frame_type = config->port_frame_format; 5080 pm_config.decap_primary_key = config->decap_primary_key; 5081 pm_config.decap_secondary_key = config->decap_secondary_key; 5082 5083 BCM_IF_ERROR_RETURN 5084 (portmod_cpri_port_frame_config_set(unit, port, &pm_config)); 5085 5086 return (BCM_E_NONE); 5087 #else 5088 return (BCM_E_UNAVAIL); 5089 #endif 5090 5091 } 5092 5093 /* Configure decap secondary key to queue mapping. */ 5094 int bcm_esw_cpri_port_decap_secondary_key_to_queue_mapping_set( 5095 int unit, 5096 bcm_port_t port, 5097 uint32 secondary_key, 5098 uint32 queue_num) { 5099 5100 #ifdef CPRIMOD_SUPPORT 5101 5102 BCM_IF_ERROR_RETURN 5103 (_bcm_esw_port_gport_validate(unit, port, &port)); 5104 5105 SOC_IF_ERROR_RETURN 5106 (portmod_cpri_port_decap_flow_to_queue_mapping_set(unit, port, secondary_key, queue_num)); 5107 5108 return (BCM_E_NONE); 5109 #else 5110 return (BCM_E_UNAVAIL); 5111 #endif 5112 5113 } 5114 5115 /* Retrieve decap secondary key to queue mapping. */ 5116 int bcm_esw_cpri_port_decap_secondary_key_to_queue_mapping_get( 5117 int unit, 5118 bcm_port_t port, 5119 uint32 secondary_key, 5120 uint32 *queue_num) { 5121 #ifdef CPRIMOD_SUPPORT 5122 5123 BCM_IF_ERROR_RETURN 5124 (_bcm_esw_port_gport_validate(unit, port, &port)); 5125 5126 SOC_IF_ERROR_RETURN 5127 (portmod_cpri_port_decap_flow_to_queue_mapping_get(unit, port, secondary_key, queue_num)); 5128 5129 return (BCM_E_NONE); 5130 #else 5131 return (BCM_E_UNAVAIL); 5132 #endif 5133 5134 } 5135 5136 /* Set Compression Saturation Value. */ 5137 int bcm_esw_cpri_port_compression_saturation_config_set( 5138 int unit, 5139 bcm_port_t port, 5140 uint32 threshold_value) { 5141 #ifdef CPRIMOD_SUPPORT 5142 5143 BCM_IF_ERROR_RETURN 5144 (_bcm_esw_port_gport_validate(unit, port, &port)); 5145 5146 BCM_IF_ERROR_RETURN 5147 (portmod_cpri_port_compression_saturation_config_set(unit, port, threshold_value)); 5148 5149 return (BCM_E_NONE); 5150 #else 5151 return (BCM_E_UNAVAIL); 5152 #endif 5153 5154 } 5155 5156 /* Set Compression Saturation Value. */ 5157 int bcm_esw_cpri_port_compression_saturation_config_get( 5158 int unit, 5159 bcm_port_t port, 5160 uint32* threshold_value) { 5161 #ifdef CPRIMOD_SUPPORT 5162 5163 BCM_IF_ERROR_RETURN 5164 (_bcm_esw_port_gport_validate(unit, port, &port)); 5165 5166 BCM_IF_ERROR_RETURN 5167 (portmod_cpri_port_compression_saturation_config_get(unit, port, threshold_value)); 5168 5169 return (BCM_E_NONE); 5170 #else 5171 return (BCM_E_UNAVAIL); 5172 #endif 5173 5174 } 5175 5176 /* Set DeCompression Saturation Value. */ 5177 int bcm_esw_cpri_port_decompression_saturation_config_set( 5178 int unit, 5179 bcm_port_t port, 5180 uint32 sat_value) { 5181 #ifdef CPRIMOD_SUPPORT 5182 5183 BCM_IF_ERROR_RETURN 5184 (_bcm_esw_port_gport_validate(unit, port, &port)); 5185 5186 BCM_IF_ERROR_RETURN 5187 (portmod_cpri_port_decompression_saturation_config_set(unit, port, sat_value)); 5188 return (BCM_E_NONE); 5189 #else 5190 return (BCM_E_UNAVAIL); 5191 #endif 5192 5193 } 5194 5195 /* Set DeCompression Saturation Value. */ 5196 int bcm_esw_cpri_port_decompression_saturation_config_get( 5197 int unit, 5198 bcm_port_t port, 5199 uint32* sat_value) { 5200 5201 #ifdef CPRIMOD_SUPPORT 5202 5203 BCM_IF_ERROR_RETURN 5204 (_bcm_esw_port_gport_validate(unit, port, &port)); 5205 5206 BCM_IF_ERROR_RETURN 5207 (portmod_cpri_port_decompression_saturation_config_get(unit, port, sat_value)); 5208 5209 return (BCM_E_NONE); 5210 #else 5211 return (BCM_E_UNAVAIL); 5212 #endif 5213 5214 } 5215 5216 /* Get RSVD4 Rx current frame info */ 5217 int bcm_esw_cpri_port_rsvd4_rx_current_frame_sync_info_get( 5218 int unit, 5219 bcm_gport_t port, 5220 bcm_rsvd4_frame_sync_info_t *frame_sync_info) { 5221 #ifdef CPRIMOD_SUPPORT 5222 uint32 hyper_frame_number = 0; 5223 uint32 master_frame_number = 0; 5224 5225 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 5226 5227 BCM_IF_ERROR_RETURN 5228 (portmod_cpri_port_rx_cw_sync_info_get(unit, port, &hyper_frame_number, &master_frame_number)); 5229 5230 frame_sync_info->master_frame_number = master_frame_number; 5231 5232 return (BCM_E_NONE); 5233 #else 5234 return (BCM_E_UNAVAIL); 5235 #endif 5236 } 5237 5238 int bcm_esw_cpri_port_rsvd4_tx_current_frame_sync_info_get( 5239 int unit, 5240 bcm_gport_t port, 5241 bcm_rsvd4_frame_sync_info_t *frame_sync_info) { 5242 5243 #ifdef CPRIMOD_SUPPORT 5244 uint32_t master_frame_number =0; 5245 BCM_IF_ERROR_RETURN(_bcm_esw_port_gport_validate(unit, port, &port)); 5246 5247 BCM_IF_ERROR_RETURN 5248 (portmod_cpri_port_tx_frame_next_bfn_get(unit, port, &master_frame_number)); 5249 5250 frame_sync_info->master_frame_number = master_frame_number; 5251 return (BCM_E_NONE); 5252 #else 5253 return (BCM_E_UNAVAIL); 5254 #endif 5255 } 5256